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[bsp][gd32303e-eval]add gcc support

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This commit is contained in:
luo jiao 2018-05-23 23:18:02 +08:00
parent da6f9e2dc0
commit 8d0328c784
16 changed files with 3346 additions and 234 deletions
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271
bsp/gd32303e-eval/Libraries/CMSIS/GD/GD32F30x/Source/GCC/startup_gd32f30x_hd.S Normal file
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@ -0,0 +1,271 @@
;/*
; * File : startup_gd32f30x_hd.s
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
; *
; * This program is free software; you can redistribute it and/or modify
; * it under the terms of the GNU General Public License as published by
; * the Free Software Foundation; either version 2 of the License, or
; * (at your option) any later version.
; *
; * This program is distributed in the hope that it will be useful,
; * but WITHOUT ANY WARRANTY; without even the implied warranty of
; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; * GNU General Public License for more details.
; *
; * You should have received a copy of the GNU General Public License along
; * with this program; if not, write to the Free Software Foundation, Inc.,
; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
; *
; * Change Logs:
; * Date Author Notes
; * 2018-05-22 tanek first implementation
; */
.syntax unified
.cpu cortex-m4
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
g_pfnVectors:
.word _estack // Top of Stack
.word Reset_Handler // Reset Handler
.word NMI_Handler // NMI Handler
.word HardFault_Handler // Hard Fault Handler
.word MemManage_Handler // MPU Fault Handler
.word BusFault_Handler // Bus Fault Handler
.word UsageFault_Handler // Usage Fault Handler
.word 0 // Reserved
.word 0 // Reserved
.word 0 // Reserved
.word 0 // Reserved
.word SVC_Handler // SVCall Handler
.word DebugMon_Handler // Debug Monitor Handler
.word 0 // Reserved
.word PendSV_Handler // PendSV Handler
.word SysTick_Handler // SysTick Handler
// external interrupts handler
.word WWDGT_IRQHandler // 16:Window Watchdog Timer
.word LVD_IRQHandler // 17:LVD through EXTI Line detect
.word TAMPER_IRQHandler // 18:Tamper through EXTI Line detect
.word RTC_IRQHandler // 19:RTC through EXTI Line
.word FMC_IRQHandler // 20:FMC
.word RCU_CTC_IRQHandler // 21:RCU and CTC
.word EXTI0_IRQHandler // 22:EXTI Line 0
.word EXTI1_IRQHandler // 23:EXTI Line 1
.word EXTI2_IRQHandler // 24:EXTI Line 2
.word EXTI3_IRQHandler // 25:EXTI Line 3
.word EXTI4_IRQHandler // 26:EXTI Line 4
.word DMA0_Channel0_IRQHandler // 27:DMA0 Channel0
.word DMA0_Channel1_IRQHandler // 28:DMA0 Channel1
.word DMA0_Channel2_IRQHandler // 29:DMA0 Channel2
.word DMA0_Channel3_IRQHandler // 30:DMA0 Channel3
.word DMA0_Channel4_IRQHandler // 31:DMA0 Channel4
.word DMA0_Channel5_IRQHandler // 32:DMA0 Channel5
.word DMA0_Channel6_IRQHandler // 33:DMA0 Channel6
.word ADC0_1_IRQHandler // 34:ADC0 and ADC1
.word USBD_HP_CAN0_TX_IRQHandler // 35:USBD HP and CAN0 TX
.word USBD_LP_CAN0_RX0_IRQHandler // 36:USBD LP and CAN0 RX0
.word CAN0_RX1_IRQHandler // 37:CAN0 RX1
.word CAN0_EWMC_IRQHandler // 38:CAN0 EWMC
.word EXTI5_9_IRQHandler // 39:EXTI5 to EXTI9
.word TIMER0_BRK_IRQHandler // 40:TIMER0 Break
.word TIMER0_UP_IRQHandler // 41:TIMER0 Update
.word TIMER0_TRG_CMT_IRQHandler // 42:TIMER0 Trigger and Commutation
.word TIMER0_Channel_IRQHandler // 43:TIMER0 Channel Capture Compare
.word TIMER1_IRQHandler // 44:TIMER1
.word TIMER2_IRQHandler // 45:TIMER2
.word TIMER3_IRQHandler // 46:TIMER3
.word I2C0_EV_IRQHandler // 47:I2C0 Event
.word I2C0_ER_IRQHandler // 48:I2C0 Error
.word I2C1_EV_IRQHandler // 49:I2C1 Event
.word I2C1_ER_IRQHandler // 50:I2C1 Error
.word SPI0_IRQHandler // 51:SPI0
.word SPI1_IRQHandler // 52:SPI1
.word USART0_IRQHandler // 53:USART0
.word USART1_IRQHandler // 54:USART1
.word USART2_IRQHandler // 55:USART2
.word EXTI10_15_IRQHandler // 56:EXTI10 to EXTI15
.word RTC_Alarm_IRQHandler // 57:RTC Alarm
.word USBD_WKUP_IRQHandler // 58:USBD Wakeup
.word TIMER7_BRK_IRQHandler // 59:TIMER7 Break
.word TIMER7_UP_IRQHandler // 60:TIMER7 Update
.word TIMER7_TRG_CMT_IRQHandler // 61:TIMER7 Trigger and Commutation
.word TIMER7_Channel_IRQHandler // 62:TIMER7 Channel Capture Compare
.word ADC2_IRQHandler // 63:ADC2
.word EXMC_IRQHandler // 64:EXMC
.word SDIO_IRQHandler // 65:SDIO
.word TIMER4_IRQHandler // 66:TIMER4
.word SPI2_IRQHandler // 67:SPI2
.word UART3_IRQHandler // 68:UART3
.word UART4_IRQHandler // 69:UART4
.word TIMER5_IRQHandler // 70:TIMER5
.word TIMER6_IRQHandler // 71:TIMER6
.word DMA1_Channel0_IRQHandler // 72:DMA1 Channel0
.word DMA1_Channel1_IRQHandler // 73:DMA1 Channel1
.word DMA1_Channel2_IRQHandler // 74:DMA1 Channel2
.word DMA1_Channel3_4_IRQHandler // 75:DMA1 Channel3 and Channel4
.size g_pfnVectors, .-g_pfnVectors
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r1, =_sidata
ldr r2, =_sdata
ldr r3, =_edata
subs r3, r2
ble fill_bss_start
loop_copy_data:
subs r3, #4
ldr r0, [r1,r3]
str r0, [r2,r3]
bgt loop_copy_data
fill_bss_start:
ldr r1, =__bss_start
ldr r2, =__bss_end
movs r0, 0
subs r2, r1
ble startup_enter
loop_fill_bss:
subs r2, #4
str r0, [r1, r2]
bgt loop_fill_bss
startup_enter:
bl SystemInit
bl entry
/* Exception Handlers */
.weak NMI_Handler
.type NMI_Handler, %function
NMI_Handler:
b .
.size NMI_Handler, . - NMI_Handler
.weak MemManage_Handler
.type MemManage_Handler, %function
MemManage_Handler:
b .
.size MemManage_Handler, . - MemManage_Handler
.weak BusFault_Handler
.type BusFault_Handler, %function
BusFault_Handler:
b .
.size BusFault_Handler, . - BusFault_Handler
.weak UsageFault_Handler
.type UsageFault_Handler, %function
UsageFault_Handler:
b .
.size UsageFault_Handler, . - UsageFault_Handler
.weak SVC_Handler
.type SVC_Handler, %function
SVC_Handler:
b .
.size SVC_Handler, . - SVC_Handler
.weak DebugMon_Handler
.type DebugMon_Handler, %function
DebugMon_Handler:
b .
.size DebugMon_Handler, . - DebugMon_Handler
.weak PendSV_Handler
.type PendSV_Handler, %function
PendSV_Handler:
b .
.size PendSV_Handler, . - PendSV_Handler
.weak SysTick_Handler
.type SysTick_Handler, %function
SysTick_Handler:
b .
.size SysTick_Handler, . - SysTick_Handler
/* IQR Handler */
.section .text.Default_Handler,"ax",%progbits
.type Default_Handler, %function
Default_Handler:
b .
.size Default_Handler, . - Default_Handler
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
IRQ WWDGT_IRQHandler
IRQ LVD_IRQHandler
IRQ TAMPER_IRQHandler
IRQ RTC_IRQHandler
IRQ FMC_IRQHandler
IRQ RCU_CTC_IRQHandler
IRQ EXTI0_IRQHandler
IRQ EXTI1_IRQHandler
IRQ EXTI2_IRQHandler
IRQ EXTI3_IRQHandler
IRQ EXTI4_IRQHandler
IRQ DMA0_Channel0_IRQHandler
IRQ DMA0_Channel1_IRQHandler
IRQ DMA0_Channel2_IRQHandler
IRQ DMA0_Channel3_IRQHandler
IRQ DMA0_Channel4_IRQHandler
IRQ DMA0_Channel5_IRQHandler
IRQ DMA0_Channel6_IRQHandler
IRQ ADC0_1_IRQHandler
IRQ USBD_HP_CAN0_TX_IRQHandler
IRQ USBD_LP_CAN0_RX0_IRQHandler
IRQ CAN0_RX1_IRQHandler
IRQ CAN0_EWMC_IRQHandler
IRQ EXTI5_9_IRQHandler
IRQ TIMER0_BRK_IRQHandler
IRQ TIMER0_UP_IRQHandler
IRQ TIMER0_TRG_CMT_IRQHandler
IRQ TIMER0_Channel_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ TIMER3_IRQHandler
IRQ I2C0_EV_IRQHandler
IRQ I2C0_ER_IRQHandler
IRQ I2C1_EV_IRQHandler
IRQ I2C1_ER_IRQHandler
IRQ SPI0_IRQHandler
IRQ SPI1_IRQHandler
IRQ USART0_IRQHandler
IRQ USART1_IRQHandler
IRQ USART2_IRQHandler
IRQ EXTI10_15_IRQHandler
IRQ RTC_Alarm_IRQHandler
IRQ USBD_WKUP_IRQHandler
IRQ TIMER7_BRK_IRQHandler
IRQ TIMER7_UP_IRQHandler
IRQ TIMER7_TRG_CMT_IRQHandler
IRQ TIMER7_Channel_IRQHandler
IRQ ADC2_IRQHandler
IRQ EXMC_IRQHandler
IRQ SDIO_IRQHandler
IRQ TIMER4_IRQHandler
IRQ SPI2_IRQHandler
IRQ UART3_IRQHandler
IRQ UART4_IRQHandler
IRQ TIMER5_IRQHandler
IRQ TIMER6_IRQHandler
IRQ DMA1_Channel0_IRQHandler
IRQ DMA1_Channel1_IRQHandler
IRQ DMA1_Channel2_IRQHandler
IRQ DMA1_Channel3_4_IRQHandler

5
bsp/gd32303e-eval/Libraries/SConscript
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@ -11,10 +11,7 @@ src += [cwd + '/CMSIS/GD/GD32F30x/Source/system_gd32f30x.c']
#add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
print('=================================================')
print('Not support gcc yet !')
print('=================================================')
exit(0)
src += [cwd + '/CMSIS/GD/GD32F30x/Source/GCC/startup_gd32f30x_hd.s']
elif rtconfig.CROSS_TOOL == 'keil':
src += [cwd + '/CMSIS/GD/GD32F30x/Source/ARM/startup_gd32f30x_hd.s']
elif rtconfig.CROSS_TOOL == 'iar':

3
bsp/gd32303e-eval/README.md
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@ -15,12 +15,13 @@
## 2. 编译说明
GD32303E-EVAL板级包支持MDK5和IAR。
GD32303E-EVAL板级包支持MDK5、IAR开发环境和GCC编译器，以下是具体版本信息：
| IDE/编译器 | 已测试版本 |
| -- | -- |
| MDK5 | MDK5.25 |
| IAR | IAR8.20 |
| GCC | GCC 5.4.1 20160919 (release) |
## 3. 烧写及执行

20
bsp/gd32303e-eval/RTE/_rt-thread_gd32f30x/RTE_Components.h Normal file
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@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'project'
* Target: 'rt-thread_gd32f30x'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "gd32f30x.h"
#endif /* RTE_COMPONENTS_H */

18
bsp/gd32303e-eval/cconfig.h Normal file
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@ -0,0 +1,18 @@
#ifndef CCONFIG_H__
#define CCONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* compiler configure file for RT-Thread in GCC*/
#define HAVE_NEWLIB_H 1
#define LIBC_VERSION "newlib 2.4.0"
#define HAVE_SYS_SIGNAL_H 1
#define HAVE_SYS_SELECT_H 1
#define HAVE_PTHREAD_H 1
#define HAVE_FDSET 1
#define HAVE_SIGACTION 1
#define GCC_VERSION "5.4.1 20160919 (release) [ARM/embedded-5-branch revision 240496]"
#define STDC "2011"
#endif

3
bsp/gd32303e-eval/drivers/board.c
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@ -54,7 +54,6 @@ void SysTick_Handler(void)
rt_interrupt_leave();
}
/**
* This function will initial GD32 board.
*/
@ -77,7 +76,7 @@ void rt_hw_board_init()
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device(CONSOLE_DEVICE);
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef RT_USING_HEAP

27
bsp/gd32303e-eval/drivers/board.h
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@ -42,33 +42,6 @@ extern int __bss_end;
#define HEAP_END GD32_SRAM_END
// <o> Console on USART:
// <127=> no console
// <0=>USART 0 <1=>USART 1 <2=>USART 2 <3=> USART 3
// <4=>USART 4
// <i>Default: 0
#define GD32_CONSOLE_USART 0
void rt_hw_board_init(void);
#if GD32_CONSOLE_USART == 127
#define CONSOLE_DEVICE "no"
#elif GD32_CONSOLE_USART == 0
#define CONSOLE_DEVICE "uart0"
#elif GD32_CONSOLE_USART == 1
#define CONSOLE_DEVICE "uart1"
#elif GD32_CONSOLE_USART == 2
#define CONSOLE_DEVICE "uart2"
#elif GD32_CONSOLE_USART == 3
#define CONSOLE_DEVICE "uart3"
#elif GD32_CONSOLE_USART == 4
#define CONSOLE_DEVICE "uart4"
#endif
#define FINSH_DEVICE_NAME CONSOLE_DEVICE
void Error_Handler(void);
#endif
//*** <<< end of configuration section >>> ***

3
bsp/gd32303e-eval/drivers/drv_usart.c
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@ -296,7 +296,6 @@ static rt_err_t gd32_control(struct rt_serial_device *serial, int cmd, void *arg
/* enable interrupt */
usart_interrupt_enable(uart->uart_periph, USART_INT_RBNE);
break;
}
return RT_EOK;
@ -355,7 +354,7 @@ static const struct rt_uart_ops gd32_uart_ops =
gd32_configure,
gd32_control,
gd32_putc,
gd32_getc,
gd32_getc
};
int gd32_hw_usart_init(void)

2
bsp/gd32303e-eval/gd32_rom.ld
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@ -1,5 +1,5 @@
/*
* linker script for GD32F4xx with GNU ld
* linker script for GD32F30x with GNU ld
* bernard.xiong 2009-10-14
*/

2834
bsp/gd32303e-eval/project.ewd Normal file
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File diff suppressed because it is too large Load Diff

2
bsp/gd32303e-eval/project.uvoptx
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@ -196,7 +196,7 @@
<Group>
<GroupName>Drivers</GroupName>
<tvExp>0</tvExp>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>

2
bsp/gd32303e-eval/rtconfig.py
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@ -12,7 +12,7 @@ if os.getenv('RTT_CC'):
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = 'D:/ArdaArmTools/GNUARM_4.9_2015q1/bin'
EXEC_PATH = r'D:/toolchain/gnu_tools_arm_embedded/5.4_2016q3/bin'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = r'C:/Keil_v5'