diff --git a/bsp/wch/risc-v/ch32v307v-r1/.cproject b/bsp/wch/risc-v/ch32v307v-r1/.cproject
new file mode 100644
index 0000000000..6cb396cdde
--- /dev/null
+++ b/bsp/wch/risc-v/ch32v307v-r1/.cproject
@@ -0,0 +1,205 @@
+
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diff --git a/bsp/wch/risc-v/ch32v307v-r1/.project b/bsp/wch/risc-v/ch32v307v-r1/.project
new file mode 100644
index 0000000000..2fca752ff5
--- /dev/null
+++ b/bsp/wch/risc-v/ch32v307v-r1/.project
@@ -0,0 +1,28 @@
+
+
+ project
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.rt-thread.studio.rttnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
diff --git a/bsp/wch/risc-v/ch32v307v-r1/.settings/ilg.gnumcueclipse.managedbuild.cross.arm.prefs b/bsp/wch/risc-v/ch32v307v-r1/.settings/ilg.gnumcueclipse.managedbuild.cross.arm.prefs
new file mode 100644
index 0000000000..11a25ce798
--- /dev/null
+++ b/bsp/wch/risc-v/ch32v307v-r1/.settings/ilg.gnumcueclipse.managedbuild.cross.arm.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+toolchain.path.1287942917=${toolchain_install_path}\\WCH\\RISC-V-GCC-WCH\\8.2.0\\bin
diff --git a/bsp/wch/risc-v/ch32v307v-r1/.settings/ilg.gnumcueclipse.managedbuild.cross.riscv.prefs b/bsp/wch/risc-v/ch32v307v-r1/.settings/ilg.gnumcueclipse.managedbuild.cross.riscv.prefs
new file mode 100644
index 0000000000..d6dfeb7078
--- /dev/null
+++ b/bsp/wch/risc-v/ch32v307v-r1/.settings/ilg.gnumcueclipse.managedbuild.cross.riscv.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+toolchain.path.512258282=${toolchain_install_path}/WCH/RISC-V-GCC-WCH/8.2.0/bin
diff --git a/bsp/wch/risc-v/ch32v307v-r1/.settings/language.settings.xml b/bsp/wch/risc-v/ch32v307v-r1/.settings/language.settings.xml
new file mode 100644
index 0000000000..79bf5a4bf0
--- /dev/null
+++ b/bsp/wch/risc-v/ch32v307v-r1/.settings/language.settings.xml
@@ -0,0 +1,14 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/bsp/wch/risc-v/ch32v307v-r1/.settings/local_temp_storage.prefs b/bsp/wch/risc-v/ch32v307v-r1/.settings/local_temp_storage.prefs
new file mode 100644
index 0000000000..f126d69733
--- /dev/null
+++ b/bsp/wch/risc-v/ch32v307v-r1/.settings/local_temp_storage.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+temp.toolchain.exec.path=D\:\\Apps\\RT-ThreadStudio\\repo\\Extract\\ToolChain_Support_Packages\\WCH\\RISC-V-GCC-WCH\\8.2.0/bin
diff --git a/bsp/wch/risc-v/ch32v307v-r1/.settings/org.eclipse.core.runtime.prefs b/bsp/wch/risc-v/ch32v307v-r1/.settings/org.eclipse.core.runtime.prefs
new file mode 100644
index 0000000000..9f1acfcfba
--- /dev/null
+++ b/bsp/wch/risc-v/ch32v307v-r1/.settings/org.eclipse.core.runtime.prefs
@@ -0,0 +1,3 @@
+content-types/enabled=true
+content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
+eclipse.preferences.version=1
\ No newline at end of file
diff --git a/bsp/wch/risc-v/ch32v307v-r1/.settings/projcfg.ini b/bsp/wch/risc-v/ch32v307v-r1/.settings/projcfg.ini
new file mode 100644
index 0000000000..a5fbfb2fbf
--- /dev/null
+++ b/bsp/wch/risc-v/ch32v307v-r1/.settings/projcfg.ini
@@ -0,0 +1,19 @@
+#RT-Thread Studio Project Configuration
+#Tue Mar 26 11:25:30 CST 2024
+cfg_version=v3.0
+board_name=
+example_name=
+hardware_adapter=
+project_type=rt-thread
+board_base_nano_proj=false
+chip_name=
+selected_rtt_version=latest
+bsp_version=
+os_branch=master
+project_base_rtt_bsp=true
+output_project_path=D\:\\Apps\\RT-ThreadStudio\\workspace
+is_base_example_project=false
+is_use_scons_build=true
+project_name=project
+os_version=latest
+bsp_path=
diff --git a/bsp/wch/risc-v/ch32v307v-r1/rtconfig_preinc.h b/bsp/wch/risc-v/ch32v307v-r1/rtconfig_preinc.h
new file mode 100644
index 0000000000..41ac7cc49d
--- /dev/null
+++ b/bsp/wch/risc-v/ch32v307v-r1/rtconfig_preinc.h
@@ -0,0 +1,10 @@
+
+#ifndef RTCONFIG_PREINC_H__
+#define RTCONFIG_PREINC_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread pre-include file */
+
+#define __RTTHREAD__
+
+#endif /*RTCONFIG_PREINC_H__*/