all STM32 cortex-m3 branches using /libcpu/arm/cortex-m3 instead of /libcpu/arm/stm32

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1858 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
dzzxzz 2011-12-21 09:44:52 +00:00
parent 9e127126c7
commit 8b64d24bd4
16 changed files with 906 additions and 1132 deletions

File diff suppressed because it is too large Load Diff

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<option>
@ -773,6 +819,38 @@
<name>IlinkIElfToolPostProcess</name>
<state>0</state>
</option>
<option>
<name>IlinkLogAutoLibSelect</name>
<state>0</state>
</option>
<option>
<name>IlinkLogRedirSymbols</name>
<state>0</state>
</option>
<option>
<name>IlinkLogUnusedFragments</name>
<state>0</state>
</option>
<option>
<name>IlinkCrcReverseByteOrder</name>
<state>0</state>
</option>
<option>
<name>IlinkCrcUseAsInput</name>
<state>1</state>
</option>
<option>
<name>IlinkOptInline</name>
<state>0</state>
</option>
<option>
<name>IlinkOptExceptionsAllow</name>
<state>1</state>
</option>
<option>
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -812,7 +890,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>17</version>
<version>20</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -829,7 +907,7 @@
</option>
<option>
<name>Variant</name>
<version>13</version>
<version>18</version>
<state>37</state>
</option>
<option>
@ -860,7 +938,7 @@
</option>
<option>
<name>FPU</name>
<version>0</version>
<version>2</version>
<state>0</state>
</option>
<option>
@ -881,10 +959,6 @@
<name>RTDescription</name>
<state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
</option>
<option>
<name>RTConfigPath</name>
<state>$TOOLKIT_DIR$\INC\DLib_Config_Normal.h</state>
</option>
<option>
<name>OGProductVersion</name>
<state>5.30.0.51236</state>
@ -935,13 +1009,27 @@
<version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
<option>
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GFPUCoreSlave</name>
<version>18</version>
<state>37</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>18</version>
<state>37</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>21</version>
<version>26</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1061,10 +1149,6 @@
<name>OutputFile</name>
<state></state>
</option>
<option>
<name>CCLangSelect</name>
<state>0</state>
</option>
<option>
<name>CCLibConfigHeader</name>
<state>1</state>
@ -1085,10 +1169,6 @@
<name>CCStdIncCheck</name>
<state>0</state>
</option>
<option>
<name>CCStdIncludePath</name>
<state>###Uninitialized###</state>
</option>
<option>
<name>CCCodeSection</name>
<state>.text</state>
@ -1124,13 +1204,61 @@
<version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
<option>
<name>CCPosIndRopi</name>
<state>0</state>
</option>
<option>
<name>CCPosIndRwpi</name>
<state>0</state>
</option>
<option>
<name>CCPosIndNoDynInit</name>
<state>0</state>
</option>
<option>
<name>IccLang</name>
<state>0</state>
</option>
<option>
<name>IccCDialect</name>
<state>1</state>
</option>
<option>
<name>IccAllowVLA</name>
<state>0</state>
</option>
<option>
<name>IccCppDialect</name>
<state>1</state>
</option>
<option>
<name>IccExceptions</name>
<state>1</state>
</option>
<option>
<name>IccRTTI</name>
<state>1</state>
</option>
<option>
<name>IccStaticDestr</name>
<state>1</state>
</option>
<option>
<name>IccRelaxedFpPrecision</name>
<state>0</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>AARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>7</version>
<version>8</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1274,10 +1402,6 @@
<name>AIgnoreStdInclude</name>
<state>0</state>
</option>
<option>
<name>AStdIncludes</name>
<state>$TOOLKIT_DIR$\INC\</state>
</option>
<option>
<name>AUserIncludes</name>
<state></state>
@ -1347,7 +1471,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>8</version>
<version>11</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1561,6 +1685,38 @@
<name>IlinkIElfToolPostProcess</name>
<state>0</state>
</option>
<option>
<name>IlinkLogAutoLibSelect</name>
<state>0</state>
</option>
<option>
<name>IlinkLogRedirSymbols</name>
<state>0</state>
</option>
<option>
<name>IlinkLogUnusedFragments</name>
<state>0</state>
</option>
<option>
<name>IlinkCrcReverseByteOrder</name>
<state>0</state>
</option>
<option>
<name>IlinkCrcUseAsInput</name>
<state>1</state>
</option>
<option>
<name>IlinkOptInline</name>
<state>1</state>
</option>
<option>
<name>IlinkOptExceptionsAllow</name>
<state>1</state>
</option>
<option>
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -1986,10 +2142,10 @@
<group>
<name>STM32</name>
<file>
<name>$PROJ_DIR$\..\..\libcpu\arm\stm32\context_iar.S</name>
<name>$PROJ_DIR$\..\..\libcpu\arm\cortex-m3\context_iar.S</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\libcpu\arm\stm32\cpuport.c</name>
<name>$PROJ_DIR$\..\..\libcpu\arm\cortex-m3\cpuport.c</name>
</file>
</group>
</project>

View File

@ -1,6 +1,6 @@
# toolchains options
ARCH='arm'
CPU='stm32'
CPU='cortex-m3'
CROSS_TOOL='keil'
# lcd panel options

View File

@ -1872,10 +1872,10 @@
<name>$PROJ_DIR$\..\..\libcpu\arm\common\backtrace.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\libcpu\arm\stm32\context_iar.S</name>
<name>$PROJ_DIR$\..\..\libcpu\arm\cortex-m3\context_iar.S</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\libcpu\arm\stm32\cpuport.c</name>
<name>$PROJ_DIR$\..\..\libcpu\arm\cortex-m3\cpuport.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\libcpu\arm\common\div0.c</name>

View File

@ -509,34 +509,6 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>24</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>..\..\libcpu\arm\stm32\cpuport.c</PathWithFileName>
<FilenameWithoutPath>cpuport.c</FilenameWithoutPath>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>25</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>..\..\libcpu\arm\stm32\context_rvds.S</PathWithFileName>
<FilenameWithoutPath>context_rvds.S</FilenameWithoutPath>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>26</FileNumber>
@ -579,6 +551,34 @@
<PathWithFileName>..\..\libcpu\arm\common\showmem.c</PathWithFileName>
<FilenameWithoutPath>showmem.c</FilenameWithoutPath>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>0</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>..\..\libcpu\arm\cortex-m3\context_rvds.S</PathWithFileName>
<FilenameWithoutPath>context_rvds.S</FilenameWithoutPath>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>0</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>..\..\libcpu\arm\cortex-m3\cpuport.c</PathWithFileName>
<FilenameWithoutPath>cpuport.c</FilenameWithoutPath>
</File>
</Group>
<Group>
@ -1259,8 +1259,8 @@
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<File>
<GroupNumber>0</GroupNumber>
<FileNumber>0</FileNumber>
<GroupNumber>6</GroupNumber>
<FileNumber>76</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
@ -1273,8 +1273,8 @@
<FilenameWithoutPath>dfs.c</FilenameWithoutPath>
</File>
<File>
<GroupNumber>0</GroupNumber>
<FileNumber>0</FileNumber>
<GroupNumber>6</GroupNumber>
<FileNumber>77</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
@ -1287,8 +1287,8 @@
<FilenameWithoutPath>dfs_file.c</FilenameWithoutPath>
</File>
<File>
<GroupNumber>0</GroupNumber>
<FileNumber>0</FileNumber>
<GroupNumber>6</GroupNumber>
<FileNumber>78</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
@ -1301,8 +1301,8 @@
<FilenameWithoutPath>dfs_fs.c</FilenameWithoutPath>
</File>
<File>
<GroupNumber>0</GroupNumber>
<FileNumber>0</FileNumber>
<GroupNumber>6</GroupNumber>
<FileNumber>79</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
@ -1316,45 +1316,4 @@
</File>
</Group>
<MDIGroups>
<Orientation>1</Orientation>
<ActiveMDIGroup>0</ActiveMDIGroup>
<MDIGroup>
<Size>100</Size>
<ActiveTab>3</ActiveTab>
<Documents>
<Doc>
<Name>.\application.c</Name>
<ColumnNumber>50</ColumnNumber>
<TopLine>25</TopLine>
<CurrentLine>26</CurrentLine>
</Doc>
<Doc>
<Name>.\board.c</Name>
<ColumnNumber>0</ColumnNumber>
<TopLine>65</TopLine>
<CurrentLine>65</CurrentLine>
</Doc>
<Doc>
<Name>.\stm32f20x_it.c</Name>
<ColumnNumber>0</ColumnNumber>
<TopLine>79</TopLine>
<CurrentLine>80</CurrentLine>
</Doc>
<Doc>
<Name>.\sdio_sd.c</Name>
<ColumnNumber>27</ColumnNumber>
<TopLine>1</TopLine>
<CurrentLine>15</CurrentLine>
</Doc>
<Doc>
<Name>.\startup.c</Name>
<ColumnNumber>0</ColumnNumber>
<TopLine>102</TopLine>
<CurrentLine>108</CurrentLine>
</Doc>
</Documents>
</MDIGroup>
</MDIGroups>
</ProjectOpt>

View File

@ -511,16 +511,6 @@
<Group>
<GroupName>STM32</GroupName>
<Files>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\stm32\cpuport.c</FilePath>
</File>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\libcpu\arm\stm32\context_rvds.S</FilePath>
</File>
<File>
<FileName>backtrace.c</FileName>
<FileType>1</FileType>
@ -536,6 +526,16 @@
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
</File>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
</File>
</Files>
</Group>
<Group>

View File

@ -1,6 +1,6 @@
# toolchains options
ARCH='arm'
CPU='stm32'
CPU='cortex-m3'
CROSS_TOOL='keil'
if CROSS_TOOL == 'gcc':

View File

@ -14,7 +14,7 @@
; */
;/**
; * @addtogroup STM32
; * @addtogroup cortex-m3
; */
;/*@{*/

View File

@ -1,178 +0,0 @@
/*
* File : context_gcc.S
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-10-11 Bernard first version
*/
/**
* @addtogroup STM32
*/
/*@{*/
.cpu cortex-m3
.fpu softvfp
.syntax unified
.thumb
.text
.equ NVIC_INT_CTRL, 0xE000ED04 /* interrupt control state register */
.equ NVIC_SYSPRI2, 0xE000ED20 /* system priority register (2) */
.equ NVIC_PENDSV_PRI, 0x00FF0000 /* PendSV priority value (lowest) */
.equ NVIC_PENDSVSET, 0x10000000 /* value to trigger PendSV exception */
/*
* rt_base_t rt_hw_interrupt_disable();
*/
.global rt_hw_interrupt_disable
.type rt_hw_interrupt_disable, %function
rt_hw_interrupt_disable:
MRS r0, PRIMASK
CPSID I
BX LR
/*
* void rt_hw_interrupt_enable(rt_base_t level);
*/
.global rt_hw_interrupt_enable
.type rt_hw_interrupt_enable, %function
rt_hw_interrupt_enable:
MSR PRIMASK, r0
BX LR
/*
* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
* r0 --> from
* r1 --> to
*/
.global rt_hw_context_switch_interrupt
.type rt_hw_context_switch_interrupt, %function
.global rt_hw_context_switch
.type rt_hw_context_switch, %function
rt_hw_context_switch_interrupt:
rt_hw_context_switch:
/* set rt_thread_switch_interrupt_flag to 1 */
LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */
STR r0, [r2]
_reswitch:
LDR r2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */
STR r1, [r2]
LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
BX LR
/* r0 --> swith from thread stack
* r1 --> swith to thread stack
* psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
*/
.global PendSV_Handler
.type PendSV_Handler, %function
PendSV_Handler:
/* disable interrupt to protect context switch */
MRS r2, PRIMASK
CPSID I
/* get rt_thread_switch_interrupt_flag */
LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0]
CBZ r1, pendsv_exit /* pendsv already handled */
/* clear rt_thread_switch_interrupt_flag to 0 */
MOV r1, #0x00
STR r1, [r0]
LDR r0, =rt_interrupt_from_thread
LDR r1, [r0]
CBZ r1, swtich_to_thread /* skip register save at the first time */
MRS r1, psp /* get from thread stack pointer */
STMFD r1!, {r4 - r11} /* push r4 - r11 register */
LDR r0, [r0]
STR r1, [r0] /* update from thread stack pointer */
swtich_to_thread:
LDR r1, =rt_interrupt_to_thread
LDR r1, [r1]
LDR r1, [r1] /* load thread stack pointer */
LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
MSR psp, r1 /* update stack pointer */
pendsv_exit:
/* restore interrupt */
MSR PRIMASK, r2
ORR lr, lr, #0x04
BX lr
/*
* void rt_hw_context_switch_to(rt_uint32 to);
* r0 --> to
*/
.global rt_hw_context_switch_to
.type rt_hw_context_switch_to, %function
rt_hw_context_switch_to:
LDR r1, =rt_interrupt_to_thread
STR r0, [r1]
/* set from thread to 0 */
LDR r1, =rt_interrupt_from_thread
MOV r0, #0x0
STR r0, [r1]
/* set interrupt flag to 1 */
LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1
STR r0, [r1]
/* set the PendSV exception priority */
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
LDR.W r2, [r0,#0x00] /* read */
ORR r1,r1,r2 /* modify */
STR r1, [r0] /* write-back */
LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
CPSIE I /* enable interrupts at processor level */
/* never reach here! */
/* compatible with old version */
.global rt_hw_interrupt_thread_switch
.type rt_hw_interrupt_thread_switch, %function
rt_hw_interrupt_thread_switch:
BX lr
NOP
.global HardFault_Handler
.type HardFault_Handler, %function
HardFault_Handler:
/* get current context */
MRS r0, psp /* get fault thread stack pointer */
PUSH {lr}
BL rt_hw_hard_fault_exception
POP {lr}
ORR lr, lr, #0x04
BX lr

View File

@ -1,176 +0,0 @@
;/*
; * File : context_iar.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2009, RT-Thread Development Team
; *
; * The license and distribution terms for this file may be
; * found in the file LICENSE in this distribution or at
; * http://www.rt-thread.org/license/LICENSE
; *
; * Change Logs:
; * Date Author Notes
; * 2009-01-17 Bernard first version
; * 2009-09-27 Bernard add protect when contex switch occurs
; */
;/**
; * @addtogroup STM32
; */
;/*@{*/
NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
SECTION .text:CODE(2)
THUMB
REQUIRE8
PRESERVE8
IMPORT rt_thread_switch_interrupt_flag
IMPORT rt_interrupt_from_thread
IMPORT rt_interrupt_to_thread
;/*
; * rt_base_t rt_hw_interrupt_disable();
; */
EXPORT rt_hw_interrupt_disable
rt_hw_interrupt_disable:
MRS r0, PRIMASK
CPSID I
BX LR
;/*
; * void rt_hw_interrupt_enable(rt_base_t level);
; */
EXPORT rt_hw_interrupt_enable
rt_hw_interrupt_enable:
MSR PRIMASK, r0
BX LR
;/*
; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
; * r0 --> from
; * r1 --> to
; */
EXPORT rt_hw_context_switch_interrupt
EXPORT rt_hw_context_switch
rt_hw_context_switch_interrupt:
rt_hw_context_switch:
; set rt_thread_switch_interrupt_flag to 1
LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
STR r0, [r2]
_reswitch
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
STR r1, [r2]
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
BX LR
; r0 --> swith from thread stack
; r1 --> swith to thread stack
; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
EXPORT PendSV_Handler
PendSV_Handler:
; disable interrupt to protect context switch
MRS r2, PRIMASK
CPSID I
; get rt_thread_switch_interrupt_flag
LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0]
CBZ r1, pendsv_exit ; pendsv already handled
; clear rt_thread_switch_interrupt_flag to 0
MOV r1, #0x00
STR r1, [r0]
LDR r0, =rt_interrupt_from_thread
LDR r1, [r0]
CBZ r1, swtich_to_thread ; skip register save at the first time
MRS r1, psp ; get from thread stack pointer
STMFD r1!, {r4 - r11} ; push r4 - r11 register
LDR r0, [r0]
STR r1, [r0] ; update from thread stack pointer
swtich_to_thread
LDR r1, =rt_interrupt_to_thread
LDR r1, [r1]
LDR r1, [r1] ; load thread stack pointer
LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
MSR psp, r1 ; update stack pointer
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
ORR lr, lr, #0x04
BX lr
;/*
; * void rt_hw_context_switch_to(rt_uint32 to);
; * r0 --> to
; */
EXPORT rt_hw_context_switch_to
rt_hw_context_switch_to:
LDR r1, =rt_interrupt_to_thread
STR r0, [r1]
; set from thread to 0
LDR r1, =rt_interrupt_from_thread
MOV r0, #0x0
STR r0, [r1]
; set interrupt flag to 1
LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1
STR r0, [r1]
; set the PendSV exception priority
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
LDR.W r2, [r0,#0x00] ; read
ORR r1,r1,r2 ; modify
STR r1, [r0] ; write-back
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
CPSIE I ; enable interrupts at processor level
; never reach here!
; compatible with old version
EXPORT rt_hw_interrupt_thread_switch
rt_hw_interrupt_thread_switch:
BX lr
IMPORT rt_hw_hard_fault_exception
EXPORT HardFault_Handler
HardFault_Handler:
; get current context
MRS r0, psp ; get fault thread stack pointer
PUSH {lr}
BL rt_hw_hard_fault_exception
POP {lr}
ORR lr, lr, #0x04
BX lr
END

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@ -1,188 +0,0 @@
;/*
; * File : context_rvds.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2009, RT-Thread Development Team
; *
; * The license and distribution terms for this file may be
; * found in the file LICENSE in this distribution or at
; * http://www.rt-thread.org/license/LICENSE
; *
; * Change Logs:
; * Date Author Notes
; * 2009-01-17 Bernard first version
; */
;/**
; * @addtogroup STM32
; */
;/*@{*/
NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
AREA |.text|, CODE, READONLY, ALIGN=2
THUMB
REQUIRE8
PRESERVE8
IMPORT rt_thread_switch_interrupt_flag
IMPORT rt_interrupt_from_thread
IMPORT rt_interrupt_to_thread
;/*
; * rt_base_t rt_hw_interrupt_disable();
; */
rt_hw_interrupt_disable PROC
EXPORT rt_hw_interrupt_disable
MRS r0, PRIMASK
CPSID I
BX LR
ENDP
;/*
; * void rt_hw_interrupt_enable(rt_base_t level);
; */
rt_hw_interrupt_enable PROC
EXPORT rt_hw_interrupt_enable
MSR PRIMASK, r0
BX LR
ENDP
;/*
; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
; * r0 --> from
; * r1 --> to
; */
rt_hw_context_switch_interrupt
EXPORT rt_hw_context_switch_interrupt
rt_hw_context_switch PROC
EXPORT rt_hw_context_switch
; set rt_thread_switch_interrupt_flag to 1
LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
STR r0, [r2]
_reswitch
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
STR r1, [r2]
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
BX LR
ENDP
; r0 --> swith from thread stack
; r1 --> swith to thread stack
; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
PendSV_Handler PROC
EXPORT PendSV_Handler
; disable interrupt to protect context switch
MRS r2, PRIMASK
CPSID I
; get rt_thread_switch_interrupt_flag
LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0]
CBZ r1, pendsv_exit ; pendsv already handled
; clear rt_thread_switch_interrupt_flag to 0
MOV r1, #0x00
STR r1, [r0]
LDR r0, =rt_interrupt_from_thread
LDR r1, [r0]
CBZ r1, swtich_to_thread ; skip register save at the first time
MRS r1, psp ; get from thread stack pointer
STMFD r1!, {r4 - r11} ; push r4 - r11 register
LDR r0, [r0]
STR r1, [r0] ; update from thread stack pointer
swtich_to_thread
LDR r1, =rt_interrupt_to_thread
LDR r1, [r1]
LDR r1, [r1] ; load thread stack pointer
LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
MSR psp, r1 ; update stack pointer
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
ORR lr, lr, #0x04
BX lr
ENDP
;/*
; * void rt_hw_context_switch_to(rt_uint32 to);
; * r0 --> to
; * this fucntion is used to perform the first thread switch
; */
rt_hw_context_switch_to PROC
EXPORT rt_hw_context_switch_to
; set to thread
LDR r1, =rt_interrupt_to_thread
STR r0, [r1]
; set from thread to 0
LDR r1, =rt_interrupt_from_thread
MOV r0, #0x0
STR r0, [r1]
; set interrupt flag to 1
LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1
STR r0, [r1]
; set the PendSV exception priority
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
LDR.W r2, [r0,#0x00] ; read
ORR r1,r1,r2 ; modify
STR r1, [r0] ; write-back
; trigger the PendSV exception (causes context switch)
LDR r0, =NVIC_INT_CTRL
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
; enable interrupts at processor level
CPSIE I
; never reach here!
ENDP
; compatible with old version
rt_hw_interrupt_thread_switch PROC
EXPORT rt_hw_interrupt_thread_switch
BX lr
NOP
ENDP
IMPORT rt_hw_hard_fault_exception
EXPORT HardFault_Handler
HardFault_Handler PROC
; get current context
MRS r0, psp ; get fault thread stack pointer
PUSH {lr}
BL rt_hw_hard_fault_exception
POP {lr}
ORR lr, lr, #0x04
BX lr
ENDP
END

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@ -1,87 +0,0 @@
/*
* File : cpuport.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-08-23 Bernard the first version
* 2011-06-03 Bernard merge all of C source code into cpuport.c
*/
#include <rtthread.h>
/* exception and interrupt handler table */
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag;
struct stack_contex
{
rt_uint32_t r0;
rt_uint32_t r1;
rt_uint32_t r2;
rt_uint32_t r3;
rt_uint32_t r12;
rt_uint32_t lr;
rt_uint32_t pc;
rt_uint32_t psr;
};
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
rt_uint8_t *stack_addr, void *texit)
{
unsigned long *stk;
stk = (unsigned long *)stack_addr;
*(stk) = 0x01000000L; /* PSR */
*(--stk) = (unsigned long)tentry; /* entry point, pc */
*(--stk) = (unsigned long)texit; /* lr */
*(--stk) = 0; /* r12 */
*(--stk) = 0; /* r3 */
*(--stk) = 0; /* r2 */
*(--stk) = 0; /* r1 */
*(--stk) = (unsigned long)parameter; /* r0 : argument */
*(--stk) = 0; /* r11 */
*(--stk) = 0; /* r10 */
*(--stk) = 0; /* r9 */
*(--stk) = 0; /* r8 */
*(--stk) = 0; /* r7 */
*(--stk) = 0; /* r6 */
*(--stk) = 0; /* r5 */
*(--stk) = 0; /* r4 */
/* return task's current stack address */
return (rt_uint8_t *)stk;
}
extern void rt_hw_interrupt_thread_switch(void);
extern void list_thread(void);
extern rt_thread_t rt_current_thread;
void rt_hw_hard_fault_exception(struct stack_contex* contex)
{
rt_kprintf("psr: 0x%08x\n", contex->psr);
rt_kprintf(" pc: 0x%08x\n", contex->pc);
rt_kprintf(" lr: 0x%08x\n", contex->lr);
rt_kprintf("r12: 0x%08x\n", contex->r12);
rt_kprintf("r03: 0x%08x\n", contex->r3);
rt_kprintf("r02: 0x%08x\n", contex->r2);
rt_kprintf("r01: 0x%08x\n", contex->r1);
rt_kprintf("r00: 0x%08x\n", contex->r0);
rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
#ifdef RT_USING_FINSH
list_thread();
#endif
while (1);
}
void rt_hw_cpu_shutdown()
{
rt_kprintf("shutdown...\n");
RT_ASSERT(0);
}