diff --git a/bsp/maxim/MAX32660_EVSYS/applications/application.c b/bsp/maxim/MAX32660_EVSYS/applications/application.c index 2ae592d99b..2e917824d9 100644 --- a/bsp/maxim/MAX32660_EVSYS/applications/application.c +++ b/bsp/maxim/MAX32660_EVSYS/applications/application.c @@ -11,22 +11,13 @@ #include #include -#include "gpio.h" - -const gpio_cfg_t led_pin[] = -{ - {PORT_0, PIN_13, GPIO_FUNC_OUT, GPIO_PAD_NONE}, -}; int main(void) { int count = 1; - GPIO_Config(&led_pin[0]); - GPIO_OutSet(&led_pin[0]); while (count++) { rt_thread_mdelay(500); - GPIO_OutToggle(&led_pin[0]); } return RT_EOK; } diff --git a/bsp/maxim/MAX32660_EVSYS/board/board.h b/bsp/maxim/MAX32660_EVSYS/board/board.h index 155749b002..490e91a95f 100644 --- a/bsp/maxim/MAX32660_EVSYS/board/board.h +++ b/bsp/maxim/MAX32660_EVSYS/board/board.h @@ -14,6 +14,10 @@ #include #include +#include "mxc_config.h" +#include "mxc_assert.h" + + #define MCU_FLASH_START_ADRESS ((uint32_t)0x0) #define MCU_FLASH_SIZE_KB (256) #define MCU_FLASH_END_ADDRESS ((uint32_t)(MCU_FLASH_START_ADRESS + MCU_FLASH_SIZE*1024)) diff --git a/bsp/maxim/libraries/HAL_Drivers/drv_gpio.c b/bsp/maxim/libraries/HAL_Drivers/drv_gpio.c new file mode 100644 index 0000000000..e2001371d9 --- /dev/null +++ b/bsp/maxim/libraries/HAL_Drivers/drv_gpio.c @@ -0,0 +1,208 @@ +/* + * Copyright (c) 2006-2020, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-02-11 supperthomas first version + * + */ + + +#include "drv_gpio.h" +#include +#include "gpio.h" + +#ifdef RT_USING_PIN + +#define DBG_LEVEL DBG_LOG +#include +#define LOG_TAG "drv.gpio" + +#define PIN_PORT_OFFSET 4 + +#define PIN_NUM(port, no) ((((((port) & 0xFu) << PIN_PORT_OFFSET) | ((no) & 0xFu))) +#define PIN_PORT(pin) ((uint8_t)(((pin) >> PIN_PORT_OFFSET) & 0xFu)) +#define PIN_NO(pin) ((uint8_t)((pin) & 0xFu)) + + +#define PIN_MCU_PORT(pin) PIN_PORT(pin) +#define PIN_MCU_PIN(pin) ((uint32_t)(1u << PIN_NO(pin))) + +static void mcu_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) +{ + gpio_cfg_t tmp_gpio_cfg; + tmp_gpio_cfg.port = PIN_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + if (value) + { + GPIO_OutSet(&tmp_gpio_cfg); + } + else + { + GPIO_OutClr(&tmp_gpio_cfg); + } + +} + +static int mcu_pin_read(rt_device_t dev, rt_base_t pin) +{ + int value; + gpio_cfg_t tmp_gpio_cfg; + tmp_gpio_cfg.port = PIN_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + + if (GPIO_InGet(&tmp_gpio_cfg)) + { + value = 1; + } + else + { + value = 0; + } + + return value; +} + +static void mcu_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) +{ + gpio_cfg_t tmp_gpio_cfg; + int ret = 0; + tmp_gpio_cfg.port = PIN_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + + switch (mode) + { + case PIN_MODE_OUTPUT: + tmp_gpio_cfg.func = GPIO_FUNC_OUT; + tmp_gpio_cfg.pad = GPIO_PAD_NONE; + break; + case PIN_MODE_INPUT: + tmp_gpio_cfg.func = GPIO_FUNC_IN; + tmp_gpio_cfg.pad = GPIO_PAD_NONE; + break; + case PIN_MODE_INPUT_PULLUP: + tmp_gpio_cfg.func = GPIO_FUNC_IN; + tmp_gpio_cfg.pad = GPIO_PAD_PULL_UP; + break; + case PIN_MODE_INPUT_PULLDOWN: + tmp_gpio_cfg.func = GPIO_FUNC_IN; + tmp_gpio_cfg.pad = GPIO_PAD_PULL_DOWN; + break; + case PIN_MODE_OUTPUT_OD: + //not support + LOG_E("NOT SUPPORT"); + break; + } + ret = GPIO_Config(&tmp_gpio_cfg); + if (E_NO_ERROR != ret) + { + LOG_E("GPIO_Config error :%d", ret); + } +} + + +static rt_err_t mcu_pin_attach_irq(struct rt_device *device, rt_int32_t pin, + rt_uint32_t irq_mode, void (*hdr)(void *args), void *args) +{ + gpio_cfg_t tmp_gpio_cfg; + tmp_gpio_cfg.port = PIN_MCU_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + + + tmp_gpio_cfg.pad = GPIO_PAD_PULL_UP; + tmp_gpio_cfg.func = GPIO_FUNC_IN; + GPIO_Config(&tmp_gpio_cfg); + GPIO_RegisterCallback(&tmp_gpio_cfg, hdr, args); + + gpio_int_mode_t mcu_mode; + gpio_int_pol_t mcu_pol; + + switch (irq_mode) + { + case PIN_IRQ_MODE_RISING: + mcu_mode = GPIO_INT_EDGE; + mcu_pol = GPIO_INT_RISING; + break; + case PIN_IRQ_MODE_FALLING: + mcu_mode = GPIO_INT_EDGE; + mcu_pol = GPIO_INT_FALLING; + break; + case PIN_IRQ_MODE_RISING_FALLING: + mcu_mode = GPIO_INT_EDGE; + mcu_pol = GPIO_INT_BOTH; + break; + case PIN_IRQ_MODE_HIGH_LEVEL: + mcu_mode = GPIO_INT_LEVEL; + mcu_pol = GPIO_INT_HIGH; + break; + case PIN_IRQ_MODE_LOW_LEVEL: + mcu_mode = GPIO_INT_LEVEL; + mcu_pol = GPIO_INT_LOW; + break; + } + + GPIO_IntConfig(&tmp_gpio_cfg, mcu_mode, mcu_pol); + + + return RT_EOK; +} + +static rt_err_t mcu_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) +{ + gpio_cfg_t tmp_gpio_cfg; + tmp_gpio_cfg.port = PIN_MCU_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + tmp_gpio_cfg.pad = GPIO_PAD_PULL_UP; + tmp_gpio_cfg.func = GPIO_FUNC_IN; + GPIO_Config(&tmp_gpio_cfg); + GPIO_IntDisable(&tmp_gpio_cfg); + GPIO_RegisterCallback(&tmp_gpio_cfg, NULL, NULL); + return RT_EOK; +} + +static rt_err_t mcu_pin_irq_enable(struct rt_device *device, rt_base_t pin, + rt_uint32_t enabled) +{ + gpio_cfg_t tmp_gpio_cfg; + tmp_gpio_cfg.port = PIN_MCU_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + if (enabled) + { + GPIO_IntEnable(&tmp_gpio_cfg); + NVIC_EnableIRQ((IRQn_Type)MXC_GPIO_GET_IRQ(PIN_MCU_PORT(pin))); + } + else + { + GPIO_IntDisable(&tmp_gpio_cfg); + NVIC_DisableIRQ((IRQn_Type)MXC_GPIO_GET_IRQ(PIN_MCU_PORT(pin))); + } + return RT_EOK; +} + +const static struct rt_pin_ops _mcu_pin_ops = +{ + mcu_pin_mode, + mcu_pin_write, + mcu_pin_read, + mcu_pin_attach_irq, + mcu_pin_dettach_irq, + mcu_pin_irq_enable, + NULL, +}; + +int rt_hw_pin_init(void) +{ + GPIO_Init(); + return rt_device_pin_register("pin", &_mcu_pin_ops, RT_NULL); +} +INIT_BOARD_EXPORT(rt_hw_pin_init); + + +void GPIO0_IRQHandler(void) +{ + GPIO_Handler(PORT_0); +} + +#endif /* RT_USING_PIN */ diff --git a/bsp/maxim/libraries/HAL_Drivers/drv_gpio.h b/bsp/maxim/libraries/HAL_Drivers/drv_gpio.h new file mode 100644 index 0000000000..dc81da0d4a --- /dev/null +++ b/bsp/maxim/libraries/HAL_Drivers/drv_gpio.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2006-2020, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-02-11 supperthomas first version + * + */ + +#ifndef __DRV_GPIO_H__ +#define __DRV_GPIO_H__ + +#include +#include + +int rt_hw_pin_init(void); + +#endif /* __DRV_GPIO_H__ */ + diff --git a/bsp/maxim/libraries/HAL_Drivers/drv_spi.c b/bsp/maxim/libraries/HAL_Drivers/drv_spi.c index 96a01354bb..03671652ef 100644 --- a/bsp/maxim/libraries/HAL_Drivers/drv_spi.c +++ b/bsp/maxim/libraries/HAL_Drivers/drv_spi.c @@ -166,64 +166,4 @@ rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, #endif /* BSP_USING_SPI0 || BSP_USING_SPI1 || BSP_USING_SPI2 */ #endif /*BSP_USING_SPI*/ -#define SPI_DEVICE_BUS "spi0" -#define SPI_DEVICE_NAME "spi01" -#define TEST_LEN 10 -uint8_t rx_data[TEST_LEN]; -uint8_t tx_data[TEST_LEN]; - -static void spi_sample(int argc, char *argv[]) -{ - struct rt_spi_device *spi_dev; - char name[RT_NAME_MAX]; - - - spi_dev = (struct rt_spi_device *)rt_device_find(SPI_DEVICE_NAME); - if (RT_NULL == spi_dev) - { - rt_hw_spi_device_attach(SPI_DEVICE_BUS, SPI_DEVICE_NAME, PIN_0); - spi_dev = (struct rt_spi_device *)rt_device_find(SPI_DEVICE_NAME); - } - - struct rt_spi_configuration spi_cfg = - { - .mode = 0, - .data_width = 8, - .max_hz = 1000000, - }; - rt_spi_configure(spi_dev, &spi_cfg); - - rt_kprintf("\n************** SPI Loopback Demo ****************\n"); - rt_kprintf("This example configures the SPI to send data between the MISO (P0.4) and\n"); - rt_kprintf("MOSI (P0.5) pins. Connect these two pins together. \n"); - - for (int j = 0; j < TEST_LEN; j++) - { - tx_data[j] = j ; - } - if (argc == 2) - { - rt_strncpy(name, argv[1], RT_NAME_MAX); - } - else - { - rt_strncpy(name, SPI_DEVICE_NAME, RT_NAME_MAX); - } - - /* ?? spi ???????? */ - spi_dev = (struct rt_spi_device *)rt_device_find(name); - if (!spi_dev) - { - rt_kprintf("spi sample run failed! can't find %s device!\n", name); - } - else - { - rt_spi_transfer(spi_dev, tx_data, rx_data, TEST_LEN); - for (int i = 0; i < TEST_LEN; i++) - { - rt_kprintf(" 0x%02x, ", rx_data[i]); - } - } -} -MSH_CMD_EXPORT(spi_sample, spi sample);