diff --git a/.gitattributes b/.gitattributes index 4821411509..deeee5e25c 100755 --- a/.gitattributes +++ b/.gitattributes @@ -1,3 +1,8 @@ +*.c linguist-language=C +*.C linguist-language=C +*.h linguist-language=C +*.H linguist-language=C + * text=auto *.S text diff --git a/bsp/allwinner_tina/libcpu/interrupt.c b/bsp/allwinner_tina/libcpu/interrupt.c index 14f53b6881..ccf19b0114 100644 --- a/bsp/allwinner_tina/libcpu/interrupt.c +++ b/bsp/allwinner_tina/libcpu/interrupt.c @@ -1,7 +1,7 @@ /* * File : interrupt.c * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * COPYRIGHT (C) 2017-2021, RT-Thread Development Team * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,6 +20,7 @@ * Change Logs: * Date Author Notes * 2018-02-08 RT-Thread the first version + * 2020-03-02 Howard Su Use structure to access registers */ #include @@ -38,9 +39,6 @@ static void rt_hw_interrupt_handler(int vector, void *param) rt_kprintf("Unhandled interrupt %d occured!!!\n", vector); } -#define readl(addr) (*(volatile unsigned int *)(addr)) -#define writel(value,addr) (*(volatile unsigned int *)(addr) = (value)) - /** * This function will initialize hardware interrupt */ @@ -63,20 +61,20 @@ void rt_hw_interrupt_init(void) /* set base_addr reg */ INTC->base_addr_reg = 0x00000000; /* clear enable */ - INTC->en_reg0 = 0x00000000; - INTC->en_reg1 = 0x00000000; + INTC->en_reg[0] = 0x00000000; + INTC->en_reg[1] = 0x00000000; /* mask interrupt */ - INTC->mask_reg0 = 0xFFFFFFFF; - INTC->mask_reg1 = 0xFFFFFFFF; + INTC->mask_reg[0] = 0xFFFFFFFF; + INTC->mask_reg[1] = 0xFFFFFFFF; /* clear pending */ - INTC->pend_reg0 = 0x00000000; - INTC->pend_reg1 = 0x00000000; + INTC->pend_reg[0] = 0x00000000; + INTC->pend_reg[1] = 0x00000000; /* set priority */ - INTC->resp_reg0 = 0x00000000; - INTC->resp_reg1 = 0x00000000; + INTC->resp_reg[0] = 0x00000000; + INTC->resp_reg[1] = 0x00000000; /* close fiq interrupt */ - INTC->ff_reg0 = 0x00000000; - INTC->ff_reg1 = 0x00000000; + INTC->ff_reg[0] = 0x00000000; + INTC->ff_reg[1] = 0x00000000; } /** @@ -85,20 +83,16 @@ void rt_hw_interrupt_init(void) */ void rt_hw_interrupt_mask(int vector) { - rt_uint32_t mask_addr, data; - + int index; if ((vector < 0) || (vector > INTERRUPTS_MAX)) { return; } - mask_addr = (rt_uint32_t)(&INTC->mask_reg0); - mask_addr += vector & 0xE0 ? sizeof(rt_uint32_t *) : 0; + index = (vector & 0xE0) != 0; + vector = (vector & 0x1F); - vector &= 0x1F; - data = readl(mask_addr); - data |= 0x1 << vector; - writel(data, mask_addr); + INTC->mask_reg[index] |= 1 << vector; } /** @@ -108,20 +102,16 @@ void rt_hw_interrupt_mask(int vector) */ void rt_hw_interrupt_umask(int vector) { - rt_uint32_t mask_addr, data; - + int index; if ((vector < 0) || (vector > INTERRUPTS_MAX)) { return; } - mask_addr = (rt_uint32_t)(&INTC->mask_reg0); - mask_addr += vector & 0xE0 ? sizeof(rt_uint32_t *) : 0; + index = (vector & 0xE0) != 0; + vector = (vector & 0x1F); - vector &= 0x1F; - data = readl(mask_addr); - data &= ~(0x1 << vector); - writel(data, mask_addr); + INTC->mask_reg[index] &= ~(1 << vector); } /** @@ -136,7 +126,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, void *param, const char *name) { rt_isr_handler_t old_handler = RT_NULL; - rt_uint32_t pend_addr, en_addr, data; + int index; if ((vector < 0) || (vector > INTERRUPTS_MAX)) { @@ -151,19 +141,11 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, isr_table[vector].handler = handler; isr_table[vector].param = param; - pend_addr = (rt_uint32_t)(&INTC->pend_reg0); - en_addr = (rt_uint32_t)(&INTC->en_reg0); - pend_addr += vector & 0xE0 ? sizeof(rt_uint32_t *) : 0; - en_addr += vector & 0xE0 ? sizeof(rt_uint32_t *) : 0; + index = (vector & 0xE0) != 0; + vector = (vector & 0x1F); - vector &= 0x1F; - data = readl(pend_addr); - data &= ~(0x1 << vector); - writel(data, pend_addr); - - data = readl(en_addr); - data |= 0x1 << vector; - writel(data, en_addr); + INTC->pend_reg[index] &= ~(0x1 << vector); + INTC->en_reg[index] |= 0x1 << vector; return old_handler; } @@ -173,7 +155,7 @@ void rt_interrupt_dispatch(rt_uint32_t fiq_irq) void *param; int vector; rt_isr_handler_t isr_func; - rt_uint32_t pend_addr, data; + int index; vector = INTC->vector_reg - INTC->base_addr_reg; vector = vector >> 2; @@ -184,13 +166,11 @@ void rt_interrupt_dispatch(rt_uint32_t fiq_irq) /* jump to fun */ isr_func(vector, param); /* clear pend bit */ - pend_addr = (rt_uint32_t)(&INTC->pend_reg0); - pend_addr += vector & 0xE0 ? sizeof(rt_uint32_t *) : 0; - vector &= 0x1F; - data = readl(pend_addr); - data &= ~(0x1 << vector); - writel(data, pend_addr); + index = (vector & 0xE0) != 0; + vector = (vector & 0x1F); + + INTC->pend_reg[index] &= ~(0x1 << vector); #ifdef RT_USING_INTERRUPT_INFO isr_table[vector].counter ++; diff --git a/bsp/allwinner_tina/libcpu/interrupt.h b/bsp/allwinner_tina/libcpu/interrupt.h index 2292b794bd..2790d05ec5 100644 --- a/bsp/allwinner_tina/libcpu/interrupt.h +++ b/bsp/allwinner_tina/libcpu/interrupt.h @@ -1,7 +1,7 @@ /* * File : interrupt.h * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * COPYRIGHT (C) 2017-2021, RT-Thread Development Team * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,6 +20,7 @@ * Change Logs: * Date Author Notes * 2018-02-08 RT-Thread the first version + * 2020-03-2 Howard Su Define same regsiters as an array */ #ifndef __INTERRUPT_H__ #define __INTERRUPT_H__ @@ -74,34 +75,21 @@ struct tina_intc volatile rt_uint32_t base_addr_reg; /* 0x04 */ volatile rt_uint32_t reserved0; volatile rt_uint32_t nmi_ctrl_reg; /* 0x0C */ - volatile rt_uint32_t pend_reg0; /* 0x10 */ - volatile rt_uint32_t pend_reg1; /* 0x14 */ + volatile rt_uint32_t pend_reg[2]; /* 0x10, 0x14 */ volatile rt_uint32_t reserved1[2]; - volatile rt_uint32_t en_reg0; /* 0x20 */ - volatile rt_uint32_t en_reg1; /* 0x24 */ + volatile rt_uint32_t en_reg[2]; /* 0x20, 0x24 */ volatile rt_uint32_t reserved2[2]; - volatile rt_uint32_t mask_reg0; /* 0x30 */ - volatile rt_uint32_t mask_reg1; /* 0x34 */ + volatile rt_uint32_t mask_reg[2]; /* 0x30, 0x34 */ volatile rt_uint32_t reserved3[2]; - volatile rt_uint32_t resp_reg0; /* 0x40 */ - volatile rt_uint32_t resp_reg1; /* 0x44 */ + volatile rt_uint32_t resp_reg[2]; /* 0x40, 0x44 */ volatile rt_uint32_t reserved4[2]; - volatile rt_uint32_t ff_reg0; /* 0x50 */ - volatile rt_uint32_t ff_reg1; /* 0x54 */ + volatile rt_uint32_t ff_reg[2]; /* 0x50, 0x54 */ volatile rt_uint32_t reserved5[2]; - volatile rt_uint32_t prio_reg0; /* 0x60 */ - volatile rt_uint32_t prio_reg1; /* 0x64 */ - volatile rt_uint32_t prio_reg2; /* 0x68 */ - volatile rt_uint32_t prio_reg3; /* 0x6C */ + volatile rt_uint32_t prio_reg[4]; /* 0x60 - 0x6c */ } ; typedef struct tina_intc *tina_intc_t; #define INTC ((tina_intc_t)INTC_BASE_ADDR) -void rt_hw_interrupt_init(void); -void rt_hw_interrupt_mask(int vector); -void rt_hw_interrupt_umask(int vector); -rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, void *param, const char *name); - #endif /* __INTERRUPT_H__ */ diff --git a/bsp/fh8620/libraries/driverlib/fh_mmc.c b/bsp/fh8620/libraries/driverlib/fh_mmc.c index 4a4370b9fa..5995e634fa 100644 --- a/bsp/fh8620/libraries/driverlib/fh_mmc.c +++ b/bsp/fh8620/libraries/driverlib/fh_mmc.c @@ -194,7 +194,6 @@ int MMC_SetCardWidth(struct fh_mmc_obj *mmc_obj, int width) default: rt_kprintf("ERROR: %s, card width %d is not supported\n", __func__, width); return -RT_ERROR; - break; } return 0; } diff --git a/bsp/nrf5x/nrf52832/.gitignore b/bsp/nrf5x/nrf52832/.gitignore new file mode 100644 index 0000000000..2541e31630 --- /dev/null +++ b/bsp/nrf5x/nrf52832/.gitignore @@ -0,0 +1,7 @@ +# vscode common config +.vscode/* +!.vscode/launch.json +!.vscode/tasks.json + +# OS X icon info +.DS_Store \ No newline at end of file diff --git a/bsp/nrf5x/nrf52832/.vscode/launch.json b/bsp/nrf5x/nrf52832/.vscode/launch.json new file mode 100644 index 0000000000..c3a54b371b --- /dev/null +++ b/bsp/nrf5x/nrf52832/.vscode/launch.json @@ -0,0 +1,15 @@ +{ + "version": "0.2.0", + "configurations": [ + { + "type": "cortex-debug", + "request": "launch", + "servertype": "jlink", + "cwd": "${workspaceRoot}", + "executable": "rt-thread.elf", + "name": "Cortex Debug", + "device": "nrf52", + "interface": "swd" + } + ] +} \ No newline at end of file diff --git a/bsp/nrf5x/nrf52832/.vscode/tasks.json b/bsp/nrf5x/nrf52832/.vscode/tasks.json new file mode 100644 index 0000000000..68331caaad --- /dev/null +++ b/bsp/nrf5x/nrf52832/.vscode/tasks.json @@ -0,0 +1,54 @@ +{ + // See https://go.microsoft.com/fwlink/?LinkId=733558 + // for the documentation about the tasks.json format + "version": "2.0.0", + "tasks": [ + { + "label": "config", + "type": "shell", + "command": "RTT_ROOT=../../.. scons --pyconfig", + "problemMatcher": [] + }, + { + "label": "build", + "type": "shell", + "command": "scons", + "problemMatcher": [], + "group": { + "kind": "build", + "isDefault": true + } + }, + { + "label": "clean", + "type": "shell", + "command": "scons -c", + "problemMatcher": [] + }, + { + "label": "flash", + "type": "shell", + "command": "nrfjprog -f nrf52 --program rt-thread.hex --sectorerase", + "group": "build", + "problemMatcher": [] + }, + { + "label": "flash_softdevice", + "type": "shell", + "command": "nrfjprog -f nrf52 --program packages/nrf5x_sdk-latest/components/softdevice/s132/hex/s132_nrf52_7.0.1_softdevice.hex --sectorerase", + "problemMatcher": [] + }, + { + "label": "erase", + "type": "shell", + "command": "nrfjprog -f nrf52 --eraseall", + "problemMatcher": [] + }, + { + "label": "reset", + "type": "shell", + "command": "nrfjprog -f nrf52 --reset", + "problemMatcher": [] + } + ] +} \ No newline at end of file diff --git a/bsp/nrf5x/nrf52832/README.md b/bsp/nrf5x/nrf52832/README.md index 8892190001..e5f46d456f 100644 --- a/bsp/nrf5x/nrf52832/README.md +++ b/bsp/nrf5x/nrf52832/README.md @@ -2,7 +2,7 @@ ## 简介 -该文件夹主要存放所有主芯片为nRF52840的板级支持包。目前默认支持的开发板是官方[PCA10040](https://www.nordicsemi.com/Software-and-tools/Development-Kits/nRF52-DK) +该文件夹主要存放所有主芯片为nRF52832的板级支持包。目前默认支持的开发板是官方[PCA10040](https://www.nordicsemi.com/Software-and-tools/Development-Kits/nRF52-DK) 主要内容如下： - 开发板资源介绍 @@ -61,6 +61,30 @@ PCA10040-nrf52832开发板常用 **板载资源** 如下： 4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 +### VS Code开发支持 + +配置步骤： + +1. 在命令行设置以下两个环境变量： + + ```bash + export RTT_CC=gcc + export RTT_EXEC_PATH=<工具链路径/bin> + ``` + +2. 搜索插件`Cortex-debug`并安装。 +3. 安装[nRF Command Line Tools](https://www.nordicsemi.com/Software-and-tools/Development-Tools/nRF-Command-Line-Tools)以支持`nrfjprog`命令。 +4. 在.vscode/settings.json内配置工具链和`JlinkGDBServer`，sample： + + ```json + { + "cortex-debug.armToolchainPath": "/usr/local/gcc-arm-none-eabi-9-2019-q4-major/bin/", + "cortex-debug.armToolchainPrefix": "arm-none-eabi", + "cortex-debug.JLinkGDBServerPath": "/Applications/SEGGER/JLink/JLinkGDBServer" + } + ``` + +5. 点击`终端`->`运行任务`->`build`编译，点击`终端`->`运行任务`->`flash`烧录，点击左侧`debug`->`run`使用VS Code进行debug。 ## 支持其他开发板 diff --git a/bsp/nrf5x/nrf52832/rtconfig.py b/bsp/nrf5x/nrf52832/rtconfig.py index 219d20d303..3be0db8de1 100644 --- a/bsp/nrf5x/nrf52832/rtconfig.py +++ b/bsp/nrf5x/nrf52832/rtconfig.py @@ -54,7 +54,9 @@ if PLATFORM == 'gcc': else: CFLAGS += ' -O2' - POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + POST_ACTION = OBJCPY + ' -O binary $TARGET rt-thread.bin\n' + POST_ACTION += OBJCPY + ' -O ihex $TARGET rt-thread.hex\n' + POST_ACTION += SIZE + ' $TARGET \n' elif PLATFORM == 'armcc': # toolchains diff --git a/bsp/stm32/libraries/STM32MPxx_HAL/SConscript b/bsp/stm32/libraries/STM32MPxx_HAL/SConscript index a991e588d0..ce482829bd 100644 --- a/bsp/stm32/libraries/STM32MPxx_HAL/SConscript +++ b/bsp/stm32/libraries/STM32MPxx_HAL/SConscript @@ -119,6 +119,10 @@ if GetDepend(['BSP_USING_CRYP']): src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_cryp.c'] src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_cryp_ex.c'] +if GetDepend(['BSP_USING_RTC']): + src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rtc.c'] + src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rtc_ex.c'] + path = [cwd + '/STM32MP1xx_HAL_Driver/Inc', cwd + '/CMSIS/Device/ST/STM32MP1xx/Include', cwd + '/CMSIS/Core/Include', diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Inc/stm32mp1xx_hal_conf.h b/bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Inc/stm32mp1xx_hal_conf.h index 3ba077b0b5..b7fd4ce81f 100644 --- a/bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Inc/stm32mp1xx_hal_conf.h +++ b/bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Inc/stm32mp1xx_hal_conf.h @@ -60,7 +60,7 @@ #define HAL_SAI_MODULE_ENABLED #define HAL_SD_MODULE_ENABLED /*#define HAL_MMC_MODULE_ENABLED */ -/*#define HAL_RTC_MODULE_ENABLED */ +#define HAL_RTC_MODULE_ENABLED /*#define HAL_SMBUS_MODULE_ENABLED */ /*#define HAL_SPDIFRX_MODULE_ENABLED */ #define HAL_SPI_MODULE_ENABLED diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c b/bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c index 3a6fac25d7..5ca08fbbd0 100644 --- a/bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c +++ b/bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c @@ -1003,7 +1003,66 @@ void HAL_SD_MspInit(SD_HandleTypeDef* hsd) /* USER CODE END SDMMC1_MspInit 1 */ } + if(hsd->Instance==SDMMC2) + { + /* USER CODE BEGIN SDMMC2_MspInit 0 */ + if (IS_ENGINEERING_BOOT_MODE()) + { + /** Initializes the peripherals clock + */ + PeriphClkInit.Sdmmc12ClockSelection = RCC_SDMMC12CLKSOURCE_PLL4; + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SDMMC12; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + } + /* USER CODE END SDMMC2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SDMMC2_CLK_ENABLE(); + + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + /**SDMMC2 GPIO Configuration + PB14 ------> SDMMC2_D0 + PB15 ------> SDMMC2_D1 + PB3 ------> SDMMC2_D2 + PB4 ------> SDMMC2_D3 + PE3 ------> SDMMC2_CK + PG6 ------> SDMMC2_CMD + */ + GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_14|GPIO_PIN_15; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF9_SDIO2; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + GPIO_InitStruct.Pin = GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF9_SDIO2; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_6; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF10_SDIO2; + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + __HAL_RCC_SDMMC2_FORCE_RESET(); + __HAL_RCC_SDMMC2_RELEASE_RESET(); + + /* SDMMC2 interrupt Init */ + HAL_NVIC_SetPriority(SDMMC2_IRQn, 2, 0); + HAL_NVIC_EnableIRQ(SDMMC2_IRQn); + /* USER CODE BEGIN SDMMC2_MspInit 1 */ + + /* USER CODE END SDMMC2_MspInit 1 */ + } } /** @@ -1312,6 +1371,65 @@ void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef* hcryp) } #endif + +/** +* @brief RTC MSP Initialization +* This function configures the hardware resources used in this example +* @param hrtc: RTC handle pointer +* @retval None +*/ +void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) +{ + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + if(hrtc->Instance==RTC) + { + /* USER CODE BEGIN SDMMC1_MspInit 0 */ + if (IS_ENGINEERING_BOOT_MODE()) + { + /** Initializes the peripherals clock + */ + PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + } + /* USER CODE BEGIN RTC_MspInit 0 */ + + /* USER CODE END RTC_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_RTC_ENABLE(); + + /* USER CODE BEGIN RTC_MspInit 1 */ + + /* USER CODE END RTC_MspInit 1 */ + } + +} + +/** +* @brief RTC MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hrtc: RTC handle pointer +* @retval None +*/ +void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) +{ + if(hrtc->Instance==RTC) + { + /* USER CODE BEGIN RTC_MspDeInit 0 */ + + /* USER CODE END RTC_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_RTC_DISABLE(); + + /* USER CODE BEGIN RTC_MspDeInit 1 */ + + /* USER CODE END RTC_MspDeInit 1 */ + } + +} /** * @brief This function is executed in case of error occurrence. * @retval None diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/Kconfig b/bsp/stm32/stm32mp157a-st-discovery/board/Kconfig index 9191443847..36ba61a584 100644 --- a/bsp/stm32/stm32mp157a-st-discovery/board/Kconfig +++ b/bsp/stm32/stm32mp157a-st-discovery/board/Kconfig @@ -58,10 +58,23 @@ menu "Onboard Peripheral Drivers" select RT_USING_LWIP config BSP_USING_SDMMC - bool "Enable SDMMC (SD card)" + bool "Enable SDMMC (sd card or sdio wifi)" + default n select RT_USING_SDIO select RT_USING_DFS select RT_USING_DFS_ELMFAT + if BSP_USING_SDMMC + config BSP_USING_SDIO1 + bool "Enable SDIO1 (sd card)" + default n + config BSP_USING_SDIO2 + select BSP_USING_RTC + bool "Enable SDIO2 (sdio wifi)" + default n + endif + + config BSP_USING_RTC + bool "Enable RTC" default n menuconfig BSP_USING_AUDIO diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_sdio.c b/bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_sdio.c index 3e5085c3cd..45de04328f 100644 --- a/bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_sdio.c +++ b/bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_sdio.c @@ -10,11 +10,17 @@ #include "board.h" #include "drv_sdio.h" + +#ifdef BSP_USING_SDIO1 #include +#endif #ifdef BSP_USING_SDMMC -//#define DRV_DEBUG +#ifdef BSP_USING_SDIO2 +#define DRV_DEBUG +#endif + #define DBG_TAG "drv.sdio" #ifdef DRV_DEBUG #define DBG_LVL DBG_LOG @@ -23,8 +29,9 @@ #endif /* DRV_DEBUG */ #include -static SD_HandleTypeDef hsd; -static struct rt_mmcsd_host *host; +static struct rt_mmcsd_host *host1; +static struct rt_mmcsd_host *host2; + #define SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS (100000) #define RTHW_SDIO_LOCK(_sdio) rt_mutex_take(&_sdio->mutex, RT_WAITING_FOREVER) @@ -47,13 +54,14 @@ struct rthw_sdio }; /* SYSRAM SDMMC1/2 accesses */ +#define SDCARD_ADDR 0x2FFC0000 #if defined(__CC_ARM) || defined(__CLANG_ARM) -rt_uint8_t cache_buf[SDIO_BUFF_SIZE] __attribute__((at(0x2FFC0000))); +__attribute__((at(SDCARD_ADDR))) static rt_uint8_t cache_buf[SDIO_BUFF_SIZE]; +#elif defined ( __GNUC__ ) +static rt_uint8_t cache_buf[SDIO_BUFF_SIZE] __attribute__((section(".SdCardSection"))); #elif defined(__ICCARM__) -#pragma location=0x2FFC0000 -rt_uint8_t cache_buf[SDIO_BUFF_SIZE]; -#elif defined(__GNUC__) -rt_uint8_t cache_buf[SDIO_BUFF_SIZE] __attribute__((at(0x2FFC0000))); +#pragma location = SDCARD_ADDR +__no_init static rt_uint8_t cache_buf[SDIO_BUFF_SIZE]; #endif /** @@ -461,10 +469,20 @@ struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des) rt_memcpy(&sdio->sdio_des, sdio_des, sizeof(struct stm32_sdio_des)); - sdio->sdio_des.hw_sdio = (struct stm32_sdio *)SDIO_BASE_ADDRESS; + if(sdio_des->hsd.Instance == SDMMC1) + { + sdio->sdio_des.hw_sdio = (struct stm32_sdio *)SDIO1_BASE_ADDRESS; + rt_event_init(&sdio->event, "sdio1", RT_IPC_FLAG_FIFO); + rt_mutex_init(&sdio->mutex, "sdio1", RT_IPC_FLAG_FIFO); + } + + if(sdio_des->hsd.Instance == SDMMC2) + { + sdio->sdio_des.hw_sdio = (struct stm32_sdio *)SDIO2_BASE_ADDRESS; + rt_event_init(&sdio->event, "sdio2", RT_IPC_FLAG_FIFO); + rt_mutex_init(&sdio->mutex, "sdio2", RT_IPC_FLAG_FIFO); + } - rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO); - rt_mutex_init(&sdio->mutex, "sdio", RT_IPC_FLAG_FIFO); /* set host default attributes */ host->ops = &ops; host->freq_min = 400 * 1000; @@ -503,29 +521,83 @@ void SDMMC1_IRQHandler(void) { rt_interrupt_enter(); /* Process All SDIO Interrupt Sources */ - rthw_sdio_irq_process(host); + rthw_sdio_irq_process(host1); rt_interrupt_leave(); } +void SDMMC2_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + /* Process All SDIO Interrupt Sources */ + rthw_sdio_irq_process(host2); + /* leave interrupt */ + rt_interrupt_leave(); +} + +#ifdef BSP_USING_SDIO2 +static RTC_HandleTypeDef hrtc; +static void MX_RTC_Init(void) +{ + hrtc.Instance = RTC; + hrtc.Init.HourFormat = RTC_HOURFORMAT_24; + hrtc.Init.AsynchPrediv = 127; + hrtc.Init.SynchPrediv = 255; + hrtc.Init.OutPut = RTC_OUTPUT_DISABLE; + hrtc.Instance->CFGR = 0x02 << 1; + if (HAL_RTC_Init(&hrtc) != HAL_OK) + { + Error_Handler(); + } +} +static int LBEE5KL1DX_init(void) +{ +#define LBEE5KL1DX_WL_REG_ON GET_PIN(H, 4) + + /* enable the WLAN REG pin */ + rt_pin_mode(LBEE5KL1DX_WL_REG_ON, PIN_MODE_OUTPUT); + rt_pin_write(LBEE5KL1DX_WL_REG_ON, PIN_HIGH); + + return 0; +} +#endif + int rt_hw_sdio_init(void) { - struct stm32_sdio_des sdio_des; - - hsd.Instance = SDMMC1; - HAL_SD_MspInit(&hsd); +#ifdef BSP_USING_SDIO1 + struct stm32_sdio_des sdio_des1; + sdio_des1.hsd.Instance = SDMMC1; + HAL_SD_MspInit(&sdio_des1.hsd); - host = sdio_host_create(&sdio_des); - if (host == RT_NULL) + host1 = sdio_host_create(&sdio_des1); + if (host1 == RT_NULL) { LOG_E("host create fail"); return RT_NULL; } +#endif +#ifdef BSP_USING_SDIO2 + MX_RTC_Init(); + LBEE5KL1DX_init(); + + struct stm32_sdio_des sdio_des2; + sdio_des2.hsd.Instance = SDMMC2; + HAL_SD_MspInit(&sdio_des2.hsd); + + host2 = sdio_host_create(&sdio_des2); + if (host2 == RT_NULL) + { + LOG_E("host2 create fail"); + return RT_NULL; + } +#endif return RT_EOK; } INIT_DEVICE_EXPORT(rt_hw_sdio_init); +#ifdef BSP_USING_SDIO1 int mnt_init(void) { rt_device_t sd = RT_NULL; @@ -552,4 +624,6 @@ int mnt_init(void) } INIT_ENV_EXPORT(mnt_init); +#endif /* BSP_USING_SDIO1 */ + #endif /* BSP_USING_SDMMC */ diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_sdio.h b/bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_sdio.h index a4428e4e71..da70bf1257 100644 --- a/bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_sdio.h +++ b/bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_sdio.h @@ -19,11 +19,12 @@ #include #include -#define SDIO_BUFF_SIZE 4096 -#define SDIO_ALIGN_LEN 32 +#ifndef SDIO1_BASE_ADDRESS +#define SDIO1_BASE_ADDRESS (SDMMC1) +#endif -#ifndef SDIO_BASE_ADDRESS -#define SDIO_BASE_ADDRESS (SDMMC1) +#ifndef SDIO2_BASE_ADDRESS +#define SDIO2_BASE_ADDRESS (SDMMC2) #endif #ifndef SDIO_CLOCK_FREQ @@ -39,7 +40,7 @@ #endif #ifndef SDIO_MAX_FREQ -#define SDIO_MAX_FREQ (50 * 1000 * 1000) +#define SDIO_MAX_FREQ (25 * 1000 * 1000) #endif #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) @@ -102,6 +103,7 @@ struct stm32_sdio_des { struct stm32_sdio *hw_sdio; sdio_clk_get clk_get; + SD_HandleTypeDef hsd; }; /* stm32 sdio dirver class */ diff --git a/bsp/stm32/stm32mp157a-st-discovery/project.ewp b/bsp/stm32/stm32mp157a-st-discovery/project.ewp index 3547891da5..3f12a28dbe 100644 --- a/bsp/stm32/stm32mp157a-st-discovery/project.ewp +++ b/bsp/stm32/stm32mp157a-st-discovery/project.ewp @@ -232,6 +232,8 @@ STM32MP157Axx __LOG_TRACE_IO_ __RTTHREAD__ + RT_USING_DLIBC + _DLIB_FILE_DESCRIPTOR USE_HAL_DRIVER