Bernard Xiong
GitHub
commit
863c549497
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@ -73,8 +73,24 @@ rt_err_t ls1c_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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{
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unsigned int gpio = pin;
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char irq_name[10];
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rt_uint32_t type;
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switch (mode)
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{
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case PIN_IRQ_MODE_RISING:
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type=IRQ_TYPE_EDGE_RISING;
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break;
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case PIN_IRQ_MODE_FALLING:
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type=IRQ_TYPE_EDGE_FALLING;
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break;
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case PIN_IRQ_MODE_HIGH_LEVEL:
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type=IRQ_TYPE_LEVEL_HIGH;
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break;
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case PIN_IRQ_MODE_LOW_LEVEL:
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type=IRQ_TYPE_LEVEL_LOW;
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break;
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}
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gpio_set_irq_type(gpio, type);
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gpio_set_irq_type(gpio, mode);
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rt_sprintf(irq_name, "PIN_%d", gpio);
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rt_hw_interrupt_install(LS1C_GPIO_TO_IRQ(gpio), (rt_isr_handler_t)hdr, args, irq_name);
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@ -25,13 +25,14 @@
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#include <rtthread.h>
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#include <drivers/spi.h>
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#include <rthw.h>
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#include "drv_spi.h"
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#include "ls1c_public.h"
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#include "spi_msd.h"
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#include "dfs_fs.h"
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#include "../libraries/ls1c_pin.h"
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#ifdef RT_USING_SPI
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//#define DEBUG
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#ifdef DEBUG
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#define DEBUG_PRINTF(...) rt_kprintf(__VA_ARGS__)
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#else
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@ -268,10 +269,11 @@ int ls1c_hw_spi_init(void)
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static struct rt_spi_device spi_device0;
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static struct rt_spi_device spi_device1;
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static struct rt_spi_device spi_device2;
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static struct rt_spi_device spi_device3;
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static struct ls1c_spi_cs spi_cs0;
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static struct ls1c_spi_cs spi_cs1;
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static struct ls1c_spi_cs spi_cs2;
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static struct ls1c_spi_cs spi_cs3;
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/* spi02: CS2 SD Card*/
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spi_cs2.cs = LS1C_SPI_CS_2;
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rt_spi_bus_attach_device(&spi_device2, "spi02", "spi0", (void *)&spi_cs2);
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@ -279,6 +281,9 @@ int ls1c_hw_spi_init(void)
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rt_spi_bus_attach_device(&spi_device1, "spi01", "spi0", (void *)&spi_cs1);
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spi_cs0.cs = LS1C_SPI_CS_0;
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rt_spi_bus_attach_device(&spi_device0, "spi00", "spi0", (void *)&spi_cs0);
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spi_cs3.cs = LS1C_SPI_CS_3;
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rt_spi_bus_attach_device(&spi_device3, "spi03", "spi0", (void*)&spi_cs3);
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msd_init("sd0", "spi02");
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}
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#endif
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#ifdef RT_USING_SPI1
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@ -296,5 +301,21 @@ int ls1c_hw_spi_init(void)
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INIT_BOARD_EXPORT(ls1c_hw_spi_init);
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static int board_sd_init(void)
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{
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#if defined(RT_USING_DFS) && defined(RT_USING_DFS_ELMFAT)
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/* mount sd card fat partition 1 as root directory */
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if( dfs_mount("sd0", "/", "elm", 0, 0) == 0)
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{
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rt_kprintf("File System initialized!\n");
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}
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else
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{
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rt_kprintf("File System initialzation failed!\n");
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}
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#endif /* RT_USING_DFS && RT_USING_DFS_ELMFAT */
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}
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INIT_APP_EXPORT(board_sd_init);
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#endif
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@ -572,22 +572,16 @@ struct pbuf *rt_eth_rx(rt_device_t device)
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}
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/*Handle the Receive Descriptors*/
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do
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{
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desc_index = synopGMAC_get_rx_qptr(gmacdev, &status, &dma_addr1, NULL, &data1, &dma_addr2, NULL, &data2);
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if (desc_index >= 0 && data1 != 0)
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{
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DEBUG_MES("Received Data at Rx Descriptor %d for skb 0x%08x whose status is %08x\n", desc_index, dma_addr1, status);
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if (synopGMAC_is_rx_desc_valid(status) || SYNOP_PHY_LOOPBACK)
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{
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pbuf = pbuf_alloc(PBUF_LINK, MAX_ETHERNET_PAYLOAD, PBUF_RAM);
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if (pbuf == 0) rt_kprintf("===error in pbuf_alloc\n");
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dma_addr1 = plat_dma_map_single(gmacdev, (void *)data1, RX_BUF_SIZE);
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len = synopGMAC_get_rx_desc_frame_length(status); //Not interested in Ethernet CRC bytes
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len = synopGMAC_get_rx_desc_frame_length(status)-4; //Not interested in Ethernet CRC bytes
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pbuf = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
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if (pbuf == 0) rt_kprintf("===error in pbuf_alloc\n");
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rt_memcpy(pbuf->payload, (char *)data1, len);
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DEBUG_MES("==get pkg len: %d\n", len);
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}
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@ -600,19 +594,15 @@ struct pbuf *rt_eth_rx(rt_device_t device)
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adapter->synopGMACNetStats.rx_frame_errors += synopGMAC_is_frame_dribbling_errors(status);
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adapter->synopGMACNetStats.rx_length_errors += synopGMAC_is_rx_frame_length_errors(status);
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}
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desc_index = synopGMAC_set_rx_qptr(gmacdev, dma_addr1, RX_BUF_SIZE, (u32)data1, 0, 0, 0);
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if (desc_index < 0)
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{
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#if SYNOP_RX_DEBUG
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#if SYNOP_RX_DEBUG
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rt_kprintf("Cannot set Rx Descriptor for data1 %08x\n", (u32)data1);
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#endif
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#endif
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plat_free_memory((void *)data1);
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}
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}
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}while(desc_index >= 0);
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rt_sem_release(&sem_lock);
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DEBUG_MES("%s : before return \n", __FUNCTION__);
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return pbuf;
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@ -145,8 +145,8 @@ struct ls1c_cop_regs
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/* Watch Dog registers */
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#define WDT_EN __REG32(WDT_BASE + 0x00)
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#define WDT_SET __REG32(WDT_BASE + 0x04)
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#define WDT_TIMER __REG32(WDT_BASE + 0x08)
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#define WDT_SET __REG32(WDT_BASE + 0x08)
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#define WDT_TIMER __REG32(WDT_BASE + 0x04)
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#define PLL_FREQ __REG32(0xbfe78030)
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#define PLL_DIV_PARAM __REG32(0xbfe78034)
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