[bsp][stm32]fix stm32h7 spi transmit fail probelm.
This commit is contained in:
parent
c09d7e1e49
commit
8487e774a3
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@ -232,7 +232,7 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur
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spi_handle->Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
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spi_handle->Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;
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spi_handle->Init.IOSwap = SPI_IO_SWAP_DISABLE;
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spi_handle->Init.FifoThreshold = SPI_FIFO_THRESHOLD_08DATA;
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spi_handle->Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
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#endif
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if (HAL_SPI_Init(spi_handle) != HAL_OK)
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@ -1,7 +1,5 @@
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#
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# Automatically generated file; DO NOT EDIT.
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# RT-Thread Configuration
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#
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CONFIG_SOC_STM32H750XB=y
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CONFIG_BOARD_STM32H750_ARTPI=y
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#
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# RT-Thread Kernel
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@ -19,7 +17,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
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# CONFIG_RT_THREAD_PRIORITY_256 is not set
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CONFIG_RT_THREAD_PRIORITY_MAX=32
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CONFIG_RT_TICK_PER_SECOND=1000
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CONFIG_RT_USING_OVERFLOW_CHECK=y
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CONFIG_RT_USING_HOOK=y
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CONFIG_RT_HOOK_USING_FUNC_PTR=y
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# CONFIG_RT_USING_HOOKLIST is not set
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@ -27,18 +24,28 @@ CONFIG_RT_USING_IDLE_HOOK=y
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CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
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CONFIG_IDLE_THREAD_STACK_SIZE=256
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# CONFIG_RT_USING_TIMER_SOFT is not set
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# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
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#
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# kservice optimization
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#
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# CONFIG_RT_KSERVICE_USING_STDLIB is not set
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# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
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# CONFIG_RT_USING_TINY_FFS is not set
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# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
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# end of kservice optimization
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#
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# klibc optimization
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#
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# CONFIG_RT_KLIBC_USING_STDLIB is not set
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# CONFIG_RT_KLIBC_USING_TINY_SIZE is not set
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# CONFIG_RT_KLIBC_USING_PRINTF_LONGLONG is not set
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# end of klibc optimization
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CONFIG_RT_USING_DEBUG=y
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CONFIG_RT_DEBUGING_ASSERT=y
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CONFIG_RT_DEBUGING_COLOR=y
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CONFIG_RT_DEBUGING_CONTEXT=y
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# CONFIG_RT_DEBUGING_AUTO_INIT is not set
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CONFIG_RT_USING_OVERFLOW_CHECK=y
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#
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# Inter-Thread communication
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@ -50,22 +57,28 @@ CONFIG_RT_USING_MAILBOX=y
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CONFIG_RT_USING_MESSAGEQUEUE=y
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# CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set
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# CONFIG_RT_USING_SIGNALS is not set
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# end of Inter-Thread communication
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#
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# Memory Management
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#
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CONFIG_RT_USING_MEMPOOL=y
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CONFIG_RT_USING_SMALL_MEM=y
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# CONFIG_RT_USING_SMALL_MEM is not set
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# CONFIG_RT_USING_SLAB is not set
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# CONFIG_RT_USING_MEMHEAP is not set
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CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
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# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
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CONFIG_RT_USING_MEMHEAP=y
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CONFIG_RT_MEMHEAP_FAST_MODE=y
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# CONFIG_RT_MEMHEAP_BEST_MODE is not set
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# CONFIG_RT_USING_SMALL_MEM_AS_HEAP is not set
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CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
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CONFIG_RT_USING_MEMHEAP_AUTO_BINDING=y
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# CONFIG_RT_USING_SLAB_AS_HEAP is not set
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# CONFIG_RT_USING_USERHEAP is not set
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# CONFIG_RT_USING_NOHEAP is not set
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# CONFIG_RT_USING_MEMTRACE is not set
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# CONFIG_RT_USING_HEAP_ISR is not set
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CONFIG_RT_USING_HEAP=y
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# end of Memory Management
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CONFIG_RT_USING_DEVICE=y
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# CONFIG_RT_USING_DEVICE_OPS is not set
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# CONFIG_RT_USING_INTERRUPT_INFO is not set
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@ -74,13 +87,12 @@ CONFIG_RT_USING_DEVICE=y
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=128
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
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CONFIG_RT_VER_NUM=0x50100
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CONFIG_RT_VER_NUM=0x50200
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# CONFIG_RT_USING_STDC_ATOMIC is not set
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CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
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# end of RT-Thread Kernel
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CONFIG_RT_USING_CACHE=y
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# CONFIG_RT_USING_HW_ATOMIC is not set
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# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set
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# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
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CONFIG_RT_USING_CPU_FFS=y
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CONFIG_ARCH_ARM=y
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CONFIG_ARCH_ARM_CORTEX_M=y
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@ -115,12 +127,15 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y
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# DFS: device virtual file system
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#
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# CONFIG_RT_USING_DFS is not set
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# end of DFS: device virtual file system
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# CONFIG_RT_USING_FAL is not set
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#
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# Device Drivers
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#
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# CONFIG_RT_USING_DM is not set
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# CONFIG_RT_USING_DEV_BUS is not set
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CONFIG_RT_USING_DEVICE_IPC=y
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CONFIG_RT_UNAMED_PIPE_NUMBER=64
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# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
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@ -142,6 +157,8 @@ CONFIG_RT_USING_I2C_BITOPS=y
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# CONFIG_RT_USING_ZERO is not set
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# CONFIG_RT_USING_RANDOM is not set
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# CONFIG_RT_USING_PWM is not set
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# CONFIG_RT_USING_PULSE_ENCODER is not set
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# CONFIG_RT_USING_INPUT_CAPTURE is not set
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# CONFIG_RT_USING_MTD_NOR is not set
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# CONFIG_RT_USING_MTD_NAND is not set
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# CONFIG_RT_USING_PM is not set
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@ -161,21 +178,13 @@ CONFIG_RT_USING_TOUCH=y
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# CONFIG_RT_TOUCH_PIN_IRQ is not set
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# CONFIG_RT_USING_LCD is not set
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# CONFIG_RT_USING_HWCRYPTO is not set
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# CONFIG_RT_USING_PULSE_ENCODER is not set
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# CONFIG_RT_USING_INPUT_CAPTURE is not set
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# CONFIG_RT_USING_DEV_BUS is not set
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# CONFIG_RT_USING_WIFI is not set
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# CONFIG_RT_USING_VIRTIO is not set
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CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_KTIME is not set
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# CONFIG_RT_USING_HWTIMER is not set
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#
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# Using USB
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#
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# CONFIG_RT_USING_USB is not set
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# CONFIG_RT_USING_USB_HOST is not set
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# CONFIG_RT_USING_USB_DEVICE is not set
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# CONFIG_RT_USING_CHERRYUSB is not set
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# end of Device Drivers
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#
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# C/C++ and POSIX layer
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@ -193,6 +202,8 @@ CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y
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CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8
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CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0
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CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# end of Timezone and Daylight Saving Time
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# end of ISO-ANSI C layer
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#
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# POSIX (Portable Operating System Interface) layer
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@ -214,7 +225,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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#
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# Socket is in the 'Network' category
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#
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# end of Interprocess Communication (IPC)
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# end of POSIX (Portable Operating System Interface) layer
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# CONFIG_RT_USING_CPLUSPLUS is not set
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# end of C/C++ and POSIX layer
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#
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# Network
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@ -223,12 +238,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_RT_USING_NETDEV is not set
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# CONFIG_RT_USING_LWIP is not set
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# CONFIG_RT_USING_AT is not set
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# end of Network
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#
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# Memory protection
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#
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# CONFIG_RT_USING_MEM_PROTECTION is not set
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# CONFIG_RT_USING_HW_STACK_GUARD is not set
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# end of Memory protection
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#
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# Utilities
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@ -240,12 +257,25 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_RT_USING_RESOURCE_ID is not set
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# CONFIG_RT_USING_ADT is not set
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# CONFIG_RT_USING_RT_LINK is not set
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# end of Utilities
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# CONFIG_RT_USING_VBUS is not set
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#
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# Using USB legacy version
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#
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# CONFIG_RT_USING_USB_HOST is not set
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# CONFIG_RT_USING_USB_DEVICE is not set
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# end of Using USB legacy version
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# CONFIG_RT_USING_FDT is not set
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# end of RT-Thread Components
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#
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# RT-Thread Utestcases
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#
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# CONFIG_RT_USING_UTESTCASES is not set
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# end of RT-Thread Utestcases
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#
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# RT-Thread online packages
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#
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# IoT - internet of things
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#
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# CONFIG_PKG_USING_LWIP is not set
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# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
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# CONFIG_PKG_USING_PAHOMQTT is not set
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# CONFIG_PKG_USING_UMQTT is not set
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@ -267,6 +296,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_WEBTERMINAL is not set
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# CONFIG_PKG_USING_FREEMODBUS is not set
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# CONFIG_PKG_USING_NANOPB is not set
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# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
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#
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# Wi-Fi
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# Marvell WiFi
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#
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# CONFIG_PKG_USING_WLANMARVELL is not set
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# end of Marvell WiFi
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#
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# Wiced WiFi
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#
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# CONFIG_PKG_USING_WLAN_WICED is not set
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# end of Wiced WiFi
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# CONFIG_PKG_USING_RW007 is not set
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#
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# CYW43012 WiFi
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#
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# CONFIG_PKG_USING_WLAN_CYW43012 is not set
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# end of CYW43012 WiFi
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#
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# BL808 WiFi
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#
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# CONFIG_PKG_USING_WLAN_BL808 is not set
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# end of BL808 WiFi
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#
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# CYW43439 WiFi
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#
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# CONFIG_PKG_USING_WLAN_CYW43439 is not set
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# end of CYW43439 WiFi
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# end of Wi-Fi
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# CONFIG_PKG_USING_COAP is not set
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# CONFIG_PKG_USING_NOPOLL is not set
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# CONFIG_PKG_USING_NETUTILS is not set
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@ -319,6 +357,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
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# CONFIG_PKG_USING_JOYLINK is not set
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# CONFIG_PKG_USING_IOTSHARP_SDK is not set
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# end of IoT Cloud
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# CONFIG_PKG_USING_NIMBLE is not set
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# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
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# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
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@ -361,6 +401,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_ZEPHYR_POLLING is not set
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# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
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# CONFIG_PKG_USING_LHC_MODBUS is not set
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# CONFIG_PKG_USING_QMODBUS is not set
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# end of IoT - internet of things
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#
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# security packages
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@ -371,6 +413,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_TINYCRYPT is not set
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# CONFIG_PKG_USING_TFM is not set
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# CONFIG_PKG_USING_YD_CRYPTO is not set
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# end of security packages
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#
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# language packages
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@ -386,18 +429,22 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_JSMN is not set
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# CONFIG_PKG_USING_AGILE_JSMN is not set
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# CONFIG_PKG_USING_PARSON is not set
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# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
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#
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# XML: Extensible Markup Language
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#
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# CONFIG_PKG_USING_SIMPLE_XML is not set
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# CONFIG_PKG_USING_EZXML is not set
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# end of XML: Extensible Markup Language
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# CONFIG_PKG_USING_LUATOS_SOC is not set
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# CONFIG_PKG_USING_LUA is not set
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# CONFIG_PKG_USING_JERRYSCRIPT is not set
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# CONFIG_PKG_USING_MICROPYTHON is not set
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# CONFIG_PKG_USING_PIKASCRIPT is not set
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# CONFIG_PKG_USING_RTT_RUST is not set
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# end of language packages
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#
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# multimedia packages
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@ -409,12 +456,15 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_LVGL is not set
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# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
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# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
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# end of LVGL: powerful and easy-to-use embedded GUI library
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#
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# u8g2: a monochrome graphic library
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#
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# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
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# CONFIG_PKG_USING_U8G2 is not set
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# end of u8g2: a monochrome graphic library
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# CONFIG_PKG_USING_OPENMV is not set
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# CONFIG_PKG_USING_MUPDF is not set
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# CONFIG_PKG_USING_STEMWIN is not set
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@ -435,6 +485,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_GUIENGINE is not set
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# CONFIG_PKG_USING_PERSIMMON is not set
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# CONFIG_PKG_USING_3GPP_AMRNB is not set
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# end of multimedia packages
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#
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# tools packages
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@ -484,6 +535,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_VOFA_PLUS is not set
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# CONFIG_PKG_USING_RT_TRACE is not set
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# CONFIG_PKG_USING_ZDEBUG is not set
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# end of tools packages
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#
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# system packages
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@ -495,6 +547,9 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
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# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
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# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
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# end of enhanced kernel services
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# CONFIG_PKG_USING_AUNITY is not set
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#
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# acceleration: Assembly language or algorithmic acceleration packages
|
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@ -502,6 +557,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
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# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
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# CONFIG_PKG_USING_QFPLIB_M3 is not set
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# end of acceleration: Assembly language or algorithmic acceleration packages
|
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#
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# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
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@ -512,6 +568,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_CMSIS_NN is not set
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# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
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# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
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# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
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#
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# Micrium: Micrium software products porting for RT-Thread
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@ -522,6 +579,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_UC_CLK is not set
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# CONFIG_PKG_USING_UC_COMMON is not set
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# CONFIG_PKG_USING_UC_MODBUS is not set
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# end of Micrium: Micrium software products porting for RT-Thread
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# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
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# CONFIG_PKG_USING_LITEOS_SDK is not set
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# CONFIG_PKG_USING_TZ_DATABASE is not set
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@ -569,6 +628,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_RTP is not set
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# CONFIG_PKG_USING_REB is not set
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# CONFIG_PKG_USING_R_RHEALSTONE is not set
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# end of system packages
|
||||
|
||||
#
|
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# peripheral libraries and drivers
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@ -581,9 +641,27 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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#
|
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# STM32 HAL & SDK Drivers
|
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#
|
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# CONFIG_PKG_USING_STM32L4XX_HAL_DRIVER is not set
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# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
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# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
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# CONFIG_PKG_USING_STM32WB55_SDK is not set
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# CONFIG_PKG_USING_STM32_SDIO is not set
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# end of STM32 HAL & SDK Drivers
|
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#
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# Infineon HAL Packages
|
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#
|
||||
# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
|
||||
# CONFIG_PKG_USING_INFINEON_CMSIS is not set
|
||||
# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
|
||||
# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
|
||||
# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
|
||||
# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
|
||||
# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
|
||||
# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
|
||||
# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
|
||||
# CONFIG_PKG_USING_INFINEON_USBDEV is not set
|
||||
# end of Infineon HAL Packages
|
||||
|
||||
# CONFIG_PKG_USING_BLUETRUM_SDK is not set
|
||||
# CONFIG_PKG_USING_EMBARC_BSP is not set
|
||||
# CONFIG_PKG_USING_ESP_IDF is not set
|
||||
|
@ -593,9 +671,12 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# CONFIG_PKG_USING_K210_SDK is not set
|
||||
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
|
||||
# end of Kendryte SDK
|
||||
|
||||
# CONFIG_PKG_USING_NRF5X_SDK is not set
|
||||
# CONFIG_PKG_USING_NRFX is not set
|
||||
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
|
||||
# end of HAL & SDK Drivers
|
||||
|
||||
#
|
||||
# sensors drivers
|
||||
|
@ -665,6 +746,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ICM20608 is not set
|
||||
# CONFIG_PKG_USING_PAJ7620 is not set
|
||||
# CONFIG_PKG_USING_STHS34PF80 is not set
|
||||
# end of sensors drivers
|
||||
|
||||
#
|
||||
# touch drivers
|
||||
|
@ -679,6 +761,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_XPT2046_TOUCH is not set
|
||||
# CONFIG_PKG_USING_CST816X is not set
|
||||
# CONFIG_PKG_USING_CST812T is not set
|
||||
# end of touch drivers
|
||||
|
||||
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
|
||||
# CONFIG_PKG_USING_BUTTON is not set
|
||||
# CONFIG_PKG_USING_PCF8574 is not set
|
||||
|
@ -751,6 +835,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_BT_MX01 is not set
|
||||
# CONFIG_PKG_USING_RGPOWER is not set
|
||||
# CONFIG_PKG_USING_SPI_TOOLS is not set
|
||||
# end of peripheral libraries and drivers
|
||||
|
||||
#
|
||||
# AI packages
|
||||
|
@ -765,15 +850,18 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_QUEST is not set
|
||||
# CONFIG_PKG_USING_NAXOS is not set
|
||||
# CONFIG_PKG_USING_R_TINYMAIX is not set
|
||||
# end of AI packages
|
||||
|
||||
#
|
||||
# Signal Processing and Control Algorithm Packages
|
||||
#
|
||||
# CONFIG_PKG_USING_APID is not set
|
||||
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
|
||||
# CONFIG_PKG_USING_QPID is not set
|
||||
# CONFIG_PKG_USING_UKAL is not set
|
||||
# CONFIG_PKG_USING_DIGITALCTRL is not set
|
||||
# CONFIG_PKG_USING_KISSFFT is not set
|
||||
# end of Signal Processing and Control Algorithm Packages
|
||||
|
||||
#
|
||||
# miscellaneous packages
|
||||
|
@ -782,6 +870,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# project laboratory
|
||||
#
|
||||
# end of project laboratory
|
||||
|
||||
#
|
||||
# samples: kernel and components samples
|
||||
|
@ -790,6 +879,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
|
||||
# end of samples: kernel and components samples
|
||||
|
||||
#
|
||||
# entertainment: terminal games and other interesting software packages
|
||||
|
@ -806,6 +896,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_COWSAY is not set
|
||||
# CONFIG_PKG_USING_MORSE is not set
|
||||
# CONFIG_PKG_USING_TINYSQUARE is not set
|
||||
# end of entertainment: terminal games and other interesting software packages
|
||||
|
||||
# CONFIG_PKG_USING_LIBCSV is not set
|
||||
# CONFIG_PKG_USING_OPTPARSE is not set
|
||||
# CONFIG_PKG_USING_FASTLZ is not set
|
||||
|
@ -840,6 +932,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_QPARAM is not set
|
||||
# CONFIG_PKG_USING_CorevMCU_CLI is not set
|
||||
# CONFIG_PKG_USING_GET_IRQ_PRIORITY is not set
|
||||
# end of miscellaneous packages
|
||||
|
||||
#
|
||||
# Arduino libraries
|
||||
|
@ -855,6 +948,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
|
||||
# end of Projects and Demos
|
||||
|
||||
#
|
||||
# Sensors
|
||||
|
@ -994,6 +1088,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set
|
||||
# end of Sensors
|
||||
|
||||
#
|
||||
# Display
|
||||
|
@ -1005,6 +1101,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
|
||||
# CONFIG_PKG_USING_SEEED_TM1637 is not set
|
||||
# end of Display
|
||||
|
||||
#
|
||||
# Timing
|
||||
|
@ -1013,6 +1110,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_TICKER is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
|
||||
# end of Timing
|
||||
|
||||
#
|
||||
# Data Processing
|
||||
|
@ -1020,6 +1118,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_TENSORFLOW_LITE_MICRO is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_RUNNINGMEDIAN is not set
|
||||
# end of Data Processing
|
||||
|
||||
#
|
||||
# Data Storage
|
||||
|
@ -1030,6 +1130,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set
|
||||
# end of Communication
|
||||
|
||||
#
|
||||
# Device Control
|
||||
|
@ -1041,12 +1142,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
|
||||
# end of Device Control
|
||||
|
||||
#
|
||||
# Other
|
||||
#
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set
|
||||
# end of Other
|
||||
|
||||
#
|
||||
# Signal IO
|
||||
|
@ -1059,24 +1162,27 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set
|
||||
# end of Signal IO
|
||||
|
||||
#
|
||||
# Uncategorized
|
||||
#
|
||||
# end of Arduino libraries
|
||||
# end of RT-Thread online packages
|
||||
|
||||
CONFIG_SOC_FAMILY_STM32=y
|
||||
CONFIG_SOC_SERIES_STM32H7=y
|
||||
|
||||
#
|
||||
# Hardware Drivers Config
|
||||
#
|
||||
CONFIG_SOC_STM32H750XB=y
|
||||
CONFIG_BOARD_STM32H750_ARTPI=y
|
||||
|
||||
#
|
||||
# Board extended module
|
||||
#
|
||||
# CONFIG_ART_PI_USING_MEDIA_IO is not set
|
||||
# CONFIG_ART_PI_USING_INDUSTRY_IO is not set
|
||||
# end of Board extended module
|
||||
|
||||
#
|
||||
# Onboard Peripheral Drivers
|
||||
|
@ -1086,10 +1192,13 @@ CONFIG_BSP_USING_USB_TO_USART=y
|
|||
# CONFIG_BSP_USING_QSPI_FLASH is not set
|
||||
# CONFIG_BSP_USING_FS is not set
|
||||
# CONFIG_BSP_USING_WIFI is not set
|
||||
# end of Onboard Peripheral Drivers
|
||||
|
||||
#
|
||||
# On-chip Peripheral Drivers
|
||||
#
|
||||
CONFIG_BSP_SCB_ENABLE_I_CACHE=y
|
||||
CONFIG_BSP_SCB_ENABLE_D_CACHE=y
|
||||
CONFIG_BSP_USING_GPIO=y
|
||||
CONFIG_BSP_USING_UART=y
|
||||
# CONFIG_BSP_USING_UART1 is not set
|
||||
|
@ -1109,12 +1218,14 @@ CONFIG_BSP_USING_SDRAM=y
|
|||
# CONFIG_BSP_USING_USBD is not set
|
||||
# CONFIG_BSP_USING_USBH is not set
|
||||
# CONFIG_BSP_USING_ETH_H750 is not set
|
||||
# CONFIG_BSP_USING_LTDC is not set
|
||||
# CONFIG_BSP_USING_CRC is not set
|
||||
# CONFIG_BSP_USING_RNG is not set
|
||||
# CONFIG_BSP_USING_UDID is not set
|
||||
# end of On-chip Peripheral Drivers
|
||||
|
||||
#
|
||||
# External Libraries
|
||||
#
|
||||
# CONFIG_ART_PI_USING_WIFI_6212_LIB is not set
|
||||
# end of External Libraries
|
||||
# end of Hardware Drivers Config
|
||||
|
|
|
@ -7,45 +7,8 @@
|
|||
* Date Author Notes
|
||||
* 2022-01-28 Rudy Lo The first version
|
||||
*/
|
||||
#include <rtthread.h>
|
||||
#include <lvgl.h>
|
||||
#include <lv_port_indev.h>
|
||||
#define DBG_TAG "LVGL.demo"
|
||||
#define DBG_LVL DBG_INFO
|
||||
#include <rtdbg.h>
|
||||
|
||||
#ifndef LV_THREAD_STACK_SIZE
|
||||
#define LV_THREAD_STACK_SIZE 4096
|
||||
#endif
|
||||
|
||||
#ifndef LV_THREAD_PRIO
|
||||
#define LV_THREAD_PRIO (RT_THREAD_PRIORITY_MAX * 2 / 3)
|
||||
#endif
|
||||
|
||||
static void lvgl_thread(void *parameter)
|
||||
void lv_user_gui_init(void)
|
||||
{
|
||||
extern void lv_demo_music(void);
|
||||
lv_demo_music();
|
||||
|
||||
/* handle the tasks of LVGL */
|
||||
while(1)
|
||||
{
|
||||
lv_task_handler();
|
||||
rt_thread_mdelay(10);
|
||||
}
|
||||
}
|
||||
|
||||
static int lvgl_demo_init(void)
|
||||
{
|
||||
rt_thread_t tid;
|
||||
|
||||
tid = rt_thread_create("LVGL", lvgl_thread, RT_NULL, LV_THREAD_STACK_SIZE, LV_THREAD_PRIO, 0);
|
||||
if(tid == RT_NULL)
|
||||
{
|
||||
LOG_E("Fail to create 'LVGL' thread");
|
||||
}
|
||||
rt_thread_startup(tid);
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_APP_EXPORT(lvgl_demo_init);
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx_hal_conf.h
|
||||
|
@ -6,17 +7,16 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* USER CODE END Header */
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7xx_HAL_CONF_H
|
||||
#define STM32H7xx_HAL_CONF_H
|
||||
|
@ -34,7 +34,7 @@
|
|||
*/
|
||||
#define HAL_MODULE_ENABLED
|
||||
|
||||
#define HAL_ADC_MODULE_ENABLED
|
||||
/* #define HAL_ADC_MODULE_ENABLED */
|
||||
/* #define HAL_FDCAN_MODULE_ENABLED */
|
||||
/* #define HAL_FMAC_MODULE_ENABLED */
|
||||
/* #define HAL_CEC_MODULE_ENABLED */
|
||||
|
@ -46,6 +46,7 @@
|
|||
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||
#define HAL_ETH_MODULE_ENABLED
|
||||
/* #define HAL_ETH_LEGACY_MODULE_ENABLED */
|
||||
/* #define HAL_NAND_MODULE_ENABLED */
|
||||
/* #define HAL_NOR_MODULE_ENABLED */
|
||||
/* #define HAL_OTFDEC_MODULE_ENABLED */
|
||||
|
@ -58,13 +59,14 @@
|
|||
/* #define HAL_JPEG_MODULE_ENABLED */
|
||||
/* #define HAL_OPAMP_MODULE_ENABLED */
|
||||
/* #define HAL_OSPI_MODULE_ENABLED */
|
||||
/* #define HAL_OSPI_MODULE_ENABLED */
|
||||
/* #define HAL_XSPI_MODULE_ENABLED */
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_SMBUS_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
#define HAL_IWDG_MODULE_ENABLED
|
||||
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||
#define HAL_LTDC_MODULE_ENABLED
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
/* #define HAL_XSPI_MODULE_ENABLED */
|
||||
/* #define HAL_RAMECC_MODULE_ENABLED */
|
||||
/* #define HAL_RNG_MODULE_ENABLED */
|
||||
/* #define HAL_RTC_MODULE_ENABLED */
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
|
@ -73,7 +75,7 @@
|
|||
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
/* #define HAL_SWPMI_MODULE_ENABLED */
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
/* #define HAL_TIM_MODULE_ENABLED */
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
/* #define HAL_USART_MODULE_ENABLED */
|
||||
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||
|
@ -105,11 +107,11 @@
|
|||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */
|
||||
#define HSE_VALUE (25000000UL) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
|
||||
#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
|
@ -117,7 +119,7 @@
|
|||
* This value is the default CSI value after Reset.
|
||||
*/
|
||||
#if !defined (CSI_VALUE)
|
||||
#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#define CSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* CSI_VALUE */
|
||||
|
||||
/**
|
||||
|
@ -126,7 +128,7 @@
|
|||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#define HSI_VALUE (64000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
|
@ -134,11 +136,11 @@
|
|||
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/
|
||||
#define LSE_VALUE (32768UL) /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
|
||||
#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
#if !defined (LSI_VALUE)
|
||||
|
@ -153,7 +155,7 @@
|
|||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/
|
||||
#define EXTERNAL_CLOCK_VALUE 12288000UL /*!< Value of the External clock in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
|
@ -163,11 +165,11 @@
|
|||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define USE_SD_TRANSCEIVER 1U /*!< use uSD Transceiver */
|
||||
#define USE_SPI_CRC 0U /*!< use CRC in SPI */
|
||||
#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0
|
||||
#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */
|
||||
#define USE_SPI_CRC 0U /*!< use CRC in SPI */
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||
|
@ -219,15 +221,15 @@
|
|||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||
|
||||
/* ########################### Ethernet Configuration ######################### */
|
||||
#define ETH_TX_DESC_CNT 4 /* number of Ethernet Tx DMA descriptors */
|
||||
#define ETH_RX_DESC_CNT 4 /* number of Ethernet Rx DMA descriptors */
|
||||
#define ETH_TX_DESC_CNT 4U /* number of Ethernet Tx DMA descriptors */
|
||||
#define ETH_RX_DESC_CNT 4U /* number of Ethernet Rx DMA descriptors */
|
||||
|
||||
#define ETH_MAC_ADDR0 ((uint8_t)0x02)
|
||||
#define ETH_MAC_ADDR1 ((uint8_t)0x00)
|
||||
#define ETH_MAC_ADDR2 ((uint8_t)0x00)
|
||||
#define ETH_MAC_ADDR3 ((uint8_t)0x00)
|
||||
#define ETH_MAC_ADDR4 ((uint8_t)0x00)
|
||||
#define ETH_MAC_ADDR5 ((uint8_t)0x00)
|
||||
#define ETH_MAC_ADDR0 (0x02UL)
|
||||
#define ETH_MAC_ADDR1 (0x00UL)
|
||||
#define ETH_MAC_ADDR2 (0x00UL)
|
||||
#define ETH_MAC_ADDR3 (0x00UL)
|
||||
#define ETH_MAC_ADDR4 (0x00UL)
|
||||
#define ETH_MAC_ADDR5 (0x00UL)
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
|
@ -277,10 +279,18 @@
|
|||
#include "stm32h7xx_hal_dfsdm.h"
|
||||
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DTS_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dts.h"
|
||||
#endif /* HAL_DTS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_eth_legacy.h"
|
||||
#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
@ -306,7 +316,7 @@
|
|||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORDIC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_cordic.h"
|
||||
#include "stm32h7xx_hal_cordic.h"
|
||||
#endif /* HAL_CORDIC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
|
@ -325,14 +335,14 @@
|
|||
#include "stm32h7xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FMAC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_fmac.h"
|
||||
#endif /* HAL_FMAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GFXMMU_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_gfxmmu.h"
|
||||
#endif /* HAL_GFXMMU_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FMAC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_fmac.h"
|
||||
#endif /* HAL_FMAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HRTIM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hrtim.h"
|
||||
#endif /* HAL_HRTIM_MODULE_ENABLED */
|
||||
|
@ -390,13 +400,17 @@
|
|||
#endif /* HAL_OPAMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_ospi.h"
|
||||
#include "stm32h7xx_hal_ospi.h"
|
||||
#endif /* HAL_OSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OTFDEC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_otfdec.h"
|
||||
#endif /* HAL_OTFDEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PSSI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_pssi.h"
|
||||
#endif /* HAL_PSSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
@ -407,7 +421,7 @@
|
|||
|
||||
#ifdef HAL_RAMECC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_ramecc.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
#endif /* HAL_RAMECC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_rng.h"
|
||||
|
@ -477,14 +491,6 @@
|
|||
#include "stm32h7xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PSSI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_pssi.h"
|
||||
#endif /* HAL_PSSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DTS_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dts.h"
|
||||
#endif /* HAL_DTS_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
|
@ -497,7 +503,7 @@
|
|||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
void assert_failed(uint8_t *file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
@ -506,6 +512,4 @@
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H7xx_HAL_CONF_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
#endif /* STM32H7xx_HAL_CONF_H */
|
||||
|
|
|
@ -58,13 +58,12 @@
|
|||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||
/**
|
||||
/**
|
||||
* Initializes the Global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
|
||||
/* USER CODE END MspInit 0 */
|
||||
|
@ -78,67 +77,6 @@ void HAL_MspInit(void)
|
|||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ADC MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hadc: ADC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(hadc->Instance==ADC1)
|
||||
{
|
||||
/* USER CODE BEGIN ADC1_MspInit 0 */
|
||||
|
||||
/* USER CODE END ADC1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_ADC12_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**ADC1 GPIO Configuration
|
||||
PB1 ------> ADC1_INP5
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN ADC1_MspInit 1 */
|
||||
|
||||
/* USER CODE END ADC1_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ADC MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hadc: ADC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
||||
{
|
||||
if(hadc->Instance==ADC1)
|
||||
{
|
||||
/* USER CODE BEGIN ADC1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END ADC1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_ADC12_CLK_DISABLE();
|
||||
|
||||
/**ADC1 GPIO Configuration
|
||||
PB1 ------> ADC1_INP5
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_1);
|
||||
|
||||
/* USER CODE BEGIN ADC1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END ADC1_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ETH MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
|
@ -614,7 +552,7 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
|||
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
||||
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
|
||||
|
||||
|
@ -727,76 +665,6 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
|
|||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM_PWM MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param htim_pwm: TIM_PWM handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
|
||||
{
|
||||
if(htim_pwm->Instance==TIM5)
|
||||
{
|
||||
/* USER CODE BEGIN TIM5_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM5_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM5_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM5_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM5_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(htim->Instance==TIM5)
|
||||
{
|
||||
/* USER CODE BEGIN TIM5_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM5_MspPostInit 0 */
|
||||
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
/**TIM5 GPIO Configuration
|
||||
PH10 ------> TIM5_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_10;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF2_TIM5;
|
||||
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM5_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM5_MspPostInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
/**
|
||||
* @brief TIM_PWM MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param htim_pwm: TIM_PWM handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
|
||||
{
|
||||
if(htim_pwm->Instance==TIM5)
|
||||
{
|
||||
/* USER CODE BEGIN TIM5_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM5_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM5_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM5_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM5_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
|
@ -806,11 +674,22 @@ void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
|
|||
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
if(huart->Instance==UART4)
|
||||
{
|
||||
/* USER CODE BEGIN UART4_MspInit 0 */
|
||||
|
||||
/* USER CODE END UART4_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART4;
|
||||
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_UART4_CLK_ENABLE();
|
||||
|
||||
|
@ -843,6 +722,16 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
|||
/* USER CODE BEGIN USART3_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART3_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;
|
||||
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_USART3_CLK_ENABLE();
|
||||
|
||||
|
@ -937,12 +826,26 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
|||
void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
if(hpcd->Instance==USB_OTG_FS)
|
||||
{
|
||||
/* USER CODE BEGIN USB_OTG_FS_MspInit 0 */
|
||||
|
||||
/* USER CODE END USB_OTG_FS_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
||||
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/** Enable USB Voltage detector
|
||||
*/
|
||||
HAL_PWREx_EnableUSBVoltageDetector();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**USB_OTG_FS GPIO Configuration
|
||||
PA12 ------> USB_OTG_FS_DP
|
||||
|
@ -1207,5 +1110,3 @@ void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef* hsdram){
|
|||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -1,17 +1,25 @@
|
|||
#MicroXplorer Configuration settings - do not modify
|
||||
CAD.formats=
|
||||
CAD.pinconfig=
|
||||
CAD.provider=
|
||||
CORTEX_M7.CPU_DCache=Disabled
|
||||
CORTEX_M7.CPU_ICache=Disabled
|
||||
CORTEX_M7.IPParameters=CPU_ICache,CPU_DCache
|
||||
ETH.IPParameters=MediaInterface
|
||||
ETH.MediaInterface=HAL_ETH_RMII_MODE
|
||||
File.Version=6
|
||||
GPIO.groupedBy=
|
||||
KeepUserPlacement=false
|
||||
Mcu.CPN=STM32H750XBH6
|
||||
Mcu.Family=STM32H7
|
||||
Mcu.IP0=CORTEX_M7
|
||||
Mcu.IP1=ETH
|
||||
Mcu.IP10=SPI4
|
||||
Mcu.IP11=SYS
|
||||
Mcu.IP12=UART4
|
||||
Mcu.IP13=USART3
|
||||
Mcu.IP14=USB_OTG_FS
|
||||
Mcu.IP10=SPI2
|
||||
Mcu.IP11=SPI4
|
||||
Mcu.IP12=SYS
|
||||
Mcu.IP13=UART4
|
||||
Mcu.IP14=USART3
|
||||
Mcu.IP15=USB_OTG_FS
|
||||
Mcu.IP2=FMC
|
||||
Mcu.IP3=IWDG1
|
||||
Mcu.IP4=LTDC
|
||||
|
@ -20,136 +28,140 @@ Mcu.IP6=RCC
|
|||
Mcu.IP7=SDMMC1
|
||||
Mcu.IP8=SDMMC2
|
||||
Mcu.IP9=SPI1
|
||||
Mcu.IPNb=15
|
||||
Mcu.IPNb=16
|
||||
Mcu.Name=STM32H750XBHx
|
||||
Mcu.Package=TFBGA240
|
||||
Mcu.Pin0=PB5
|
||||
Mcu.Pin1=PK5
|
||||
Mcu.Pin10=PC11
|
||||
Mcu.Pin100=PE7
|
||||
Mcu.Pin101=PE14
|
||||
Mcu.Pin102=PB14
|
||||
Mcu.Pin103=PD8
|
||||
Mcu.Pin104=VP_IWDG1_VS_IWDG
|
||||
Mcu.Pin105=VP_SYS_VS_Systick
|
||||
Mcu.Pin11=PE2
|
||||
Mcu.Pin12=PE0
|
||||
Mcu.Pin13=PB3 (JTDO/TRACESWO)
|
||||
Mcu.Pin14=PK6
|
||||
Mcu.Pin15=PK3
|
||||
Mcu.Pin16=PD7
|
||||
Mcu.Pin17=PC12
|
||||
Mcu.Pin18=PE5
|
||||
Mcu.Pin19=PG15
|
||||
Mcu.Pin10=PD6
|
||||
Mcu.Pin100=PJ3
|
||||
Mcu.Pin101=PJ4
|
||||
Mcu.Pin102=PG1
|
||||
Mcu.Pin103=PE7
|
||||
Mcu.Pin104=PE14
|
||||
Mcu.Pin105=PB14
|
||||
Mcu.Pin106=PD8
|
||||
Mcu.Pin107=VP_IWDG1_VS_IWDG
|
||||
Mcu.Pin108=VP_SYS_VS_Systick
|
||||
Mcu.Pin11=PC11
|
||||
Mcu.Pin12=PI2
|
||||
Mcu.Pin13=PE2
|
||||
Mcu.Pin14=PE0
|
||||
Mcu.Pin15=PB3 (JTDO/TRACESWO)
|
||||
Mcu.Pin16=PK6
|
||||
Mcu.Pin17=PK3
|
||||
Mcu.Pin18=PD7
|
||||
Mcu.Pin19=PC12
|
||||
Mcu.Pin2=PG9
|
||||
Mcu.Pin20=PK7
|
||||
Mcu.Pin21=PG14
|
||||
Mcu.Pin22=PG13
|
||||
Mcu.Pin23=PJ14
|
||||
Mcu.Pin24=PJ12
|
||||
Mcu.Pin25=PD2
|
||||
Mcu.Pin26=PD0
|
||||
Mcu.Pin27=PI9
|
||||
Mcu.Pin28=PE6
|
||||
Mcu.Pin29=PJ13
|
||||
Mcu.Pin20=PI3
|
||||
Mcu.Pin21=PE5
|
||||
Mcu.Pin22=PG15
|
||||
Mcu.Pin23=PK7
|
||||
Mcu.Pin24=PG14
|
||||
Mcu.Pin25=PG13
|
||||
Mcu.Pin26=PJ14
|
||||
Mcu.Pin27=PJ12
|
||||
Mcu.Pin28=PD2
|
||||
Mcu.Pin29=PD0
|
||||
Mcu.Pin3=PC10
|
||||
Mcu.Pin30=PD1
|
||||
Mcu.Pin31=PC8
|
||||
Mcu.Pin32=PC9
|
||||
Mcu.Pin33=PA12
|
||||
Mcu.Pin34=PA11
|
||||
Mcu.Pin35=PG8
|
||||
Mcu.Pin36=PF2
|
||||
Mcu.Pin37=PF1
|
||||
Mcu.Pin38=PF0
|
||||
Mcu.Pin39=PG5
|
||||
Mcu.Pin4=PE1
|
||||
Mcu.Pin40=PI12
|
||||
Mcu.Pin41=PI13
|
||||
Mcu.Pin42=PI14
|
||||
Mcu.Pin43=PF3
|
||||
Mcu.Pin44=PG4
|
||||
Mcu.Pin45=PG2
|
||||
Mcu.Pin46=PK2
|
||||
Mcu.Pin47=PH1-OSC_OUT (PH1)
|
||||
Mcu.Pin48=PH0-OSC_IN (PH0)
|
||||
Mcu.Pin49=PF5
|
||||
Mcu.Pin5=PB4 (NJTRST)
|
||||
Mcu.Pin50=PF4
|
||||
Mcu.Pin51=PK0
|
||||
Mcu.Pin52=PK1
|
||||
Mcu.Pin53=PJ11
|
||||
Mcu.Pin54=PJ10
|
||||
Mcu.Pin55=PC1
|
||||
Mcu.Pin56=PC2
|
||||
Mcu.Pin57=PC3
|
||||
Mcu.Pin58=PJ9
|
||||
Mcu.Pin59=PA2
|
||||
Mcu.Pin6=PK4
|
||||
Mcu.Pin60=PA1
|
||||
Mcu.Pin61=PA0
|
||||
Mcu.Pin62=PJ0
|
||||
Mcu.Pin63=PE10
|
||||
Mcu.Pin64=PJ8
|
||||
Mcu.Pin65=PJ7
|
||||
Mcu.Pin66=PJ6
|
||||
Mcu.Pin67=PH5
|
||||
Mcu.Pin68=PI15
|
||||
Mcu.Pin69=PJ1
|
||||
Mcu.Pin7=PG11
|
||||
Mcu.Pin70=PF13
|
||||
Mcu.Pin71=PF14
|
||||
Mcu.Pin72=PE9
|
||||
Mcu.Pin73=PE11
|
||||
Mcu.Pin74=PB10
|
||||
Mcu.Pin75=PB11
|
||||
Mcu.Pin76=PD15
|
||||
Mcu.Pin77=PD14
|
||||
Mcu.Pin78=PA7
|
||||
Mcu.Pin79=PF12
|
||||
Mcu.Pin8=PJ15
|
||||
Mcu.Pin80=PF15
|
||||
Mcu.Pin81=PE12
|
||||
Mcu.Pin82=PE15
|
||||
Mcu.Pin83=PJ5
|
||||
Mcu.Pin84=PD11
|
||||
Mcu.Pin85=PD12
|
||||
Mcu.Pin86=PA5
|
||||
Mcu.Pin87=PC4
|
||||
Mcu.Pin88=PJ2
|
||||
Mcu.Pin89=PF11
|
||||
Mcu.Pin9=PD6
|
||||
Mcu.Pin90=PG0
|
||||
Mcu.Pin91=PE8
|
||||
Mcu.Pin92=PE13
|
||||
Mcu.Pin93=PB15
|
||||
Mcu.Pin94=PD10
|
||||
Mcu.Pin95=PD9
|
||||
Mcu.Pin96=PC5
|
||||
Mcu.Pin97=PJ3
|
||||
Mcu.Pin98=PJ4
|
||||
Mcu.Pin99=PG1
|
||||
Mcu.PinsNb=106
|
||||
Mcu.Pin30=PI9
|
||||
Mcu.Pin31=PE6
|
||||
Mcu.Pin32=PJ13
|
||||
Mcu.Pin33=PD1
|
||||
Mcu.Pin34=PC8
|
||||
Mcu.Pin35=PC9
|
||||
Mcu.Pin36=PA12
|
||||
Mcu.Pin37=PA11
|
||||
Mcu.Pin38=PG8
|
||||
Mcu.Pin39=PF2
|
||||
Mcu.Pin4=PI1
|
||||
Mcu.Pin40=PF1
|
||||
Mcu.Pin41=PF0
|
||||
Mcu.Pin42=PG5
|
||||
Mcu.Pin43=PI12
|
||||
Mcu.Pin44=PI13
|
||||
Mcu.Pin45=PI14
|
||||
Mcu.Pin46=PF3
|
||||
Mcu.Pin47=PG4
|
||||
Mcu.Pin48=PG2
|
||||
Mcu.Pin49=PK2
|
||||
Mcu.Pin5=PE1
|
||||
Mcu.Pin50=PH1-OSC_OUT (PH1)
|
||||
Mcu.Pin51=PH0-OSC_IN (PH0)
|
||||
Mcu.Pin52=PF5
|
||||
Mcu.Pin53=PF4
|
||||
Mcu.Pin54=PK0
|
||||
Mcu.Pin55=PK1
|
||||
Mcu.Pin56=PJ11
|
||||
Mcu.Pin57=PJ10
|
||||
Mcu.Pin58=PC1
|
||||
Mcu.Pin59=PC2
|
||||
Mcu.Pin6=PB4 (NJTRST)
|
||||
Mcu.Pin60=PC3
|
||||
Mcu.Pin61=PJ9
|
||||
Mcu.Pin62=PA2
|
||||
Mcu.Pin63=PA1
|
||||
Mcu.Pin64=PA0
|
||||
Mcu.Pin65=PJ0
|
||||
Mcu.Pin66=PE10
|
||||
Mcu.Pin67=PJ8
|
||||
Mcu.Pin68=PJ7
|
||||
Mcu.Pin69=PJ6
|
||||
Mcu.Pin7=PK4
|
||||
Mcu.Pin70=PH5
|
||||
Mcu.Pin71=PI15
|
||||
Mcu.Pin72=PJ1
|
||||
Mcu.Pin73=PF13
|
||||
Mcu.Pin74=PF14
|
||||
Mcu.Pin75=PE9
|
||||
Mcu.Pin76=PE11
|
||||
Mcu.Pin77=PB10
|
||||
Mcu.Pin78=PB11
|
||||
Mcu.Pin79=PD15
|
||||
Mcu.Pin8=PG11
|
||||
Mcu.Pin80=PD14
|
||||
Mcu.Pin81=PA7
|
||||
Mcu.Pin82=PF12
|
||||
Mcu.Pin83=PF15
|
||||
Mcu.Pin84=PE12
|
||||
Mcu.Pin85=PE15
|
||||
Mcu.Pin86=PJ5
|
||||
Mcu.Pin87=PD11
|
||||
Mcu.Pin88=PD12
|
||||
Mcu.Pin89=PA5
|
||||
Mcu.Pin9=PJ15
|
||||
Mcu.Pin90=PC4
|
||||
Mcu.Pin91=PJ2
|
||||
Mcu.Pin92=PF11
|
||||
Mcu.Pin93=PG0
|
||||
Mcu.Pin94=PE8
|
||||
Mcu.Pin95=PE13
|
||||
Mcu.Pin96=PB15
|
||||
Mcu.Pin97=PD10
|
||||
Mcu.Pin98=PD9
|
||||
Mcu.Pin99=PC5
|
||||
Mcu.PinsNb=109
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32H750XBHx
|
||||
MxCube.Version=6.2.1
|
||||
MxDb.Version=DB.6.0.21
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.ETH_IRQn=true\:0\:0\:false\:false\:true\:true\:true
|
||||
MxCube.Version=6.11.1
|
||||
MxDb.Version=DB.6.0.111
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.ETH_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.ForceEnableDMAVector=true
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true
|
||||
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
|
||||
NVIC.SDMMC1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
|
||||
NVIC.SDMMC2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
|
||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.SDMMC1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.SDMMC2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.SPI2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
PA0.Locked=true
|
||||
PA0.Mode=Asynchronous
|
||||
PA0.Signal=UART4_TX
|
||||
|
@ -290,8 +302,9 @@ PE6.GPIOParameters=GPIO_Speed
|
|||
PE6.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
||||
PE6.Mode=Full_Duplex_Master
|
||||
PE6.Signal=SPI4_MOSI
|
||||
PE7.GPIOParameters=GPIO_Speed_High_Default
|
||||
PE7.GPIOParameters=GPIO_Speed_High_Default,PinAttribute
|
||||
PE7.GPIO_Speed_High_Default=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE7.PinAttribute=
|
||||
PE7.Signal=FMC_D4_DA4
|
||||
PE8.GPIOParameters=GPIO_Speed_High_Default
|
||||
PE8.GPIO_Speed_High_Default=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
|
@ -379,6 +392,10 @@ PH5.GPIOParameters=GPIO_Speed_High_Default
|
|||
PH5.GPIO_Speed_High_Default=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PH5.Locked=true
|
||||
PH5.Signal=FMC_SDNWE
|
||||
PI1.GPIOParameters=GPIO_Speed
|
||||
PI1.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
||||
PI1.Mode=Full_Duplex_Master
|
||||
PI1.Signal=SPI2_SCK
|
||||
PI12.GPIOParameters=GPIO_Speed
|
||||
PI12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PI12.Locked=true
|
||||
|
@ -399,6 +416,14 @@ PI15.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
|||
PI15.Locked=true
|
||||
PI15.Mode=RGB888
|
||||
PI15.Signal=LTDC_R0
|
||||
PI2.GPIOParameters=GPIO_Speed
|
||||
PI2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
||||
PI2.Mode=Full_Duplex_Master
|
||||
PI2.Signal=SPI2_MISO
|
||||
PI3.GPIOParameters=GPIO_Speed
|
||||
PI3.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
||||
PI3.Mode=Full_Duplex_Master
|
||||
PI3.Signal=SPI2_MOSI
|
||||
PI9.Locked=true
|
||||
PI9.Mode=Asynchronous
|
||||
PI9.Signal=UART4_RX
|
||||
|
@ -526,7 +551,7 @@ ProjectManager.CustomerFirmwarePackage=
|
|||
ProjectManager.DefaultFWLocation=true
|
||||
ProjectManager.DeletePrevious=true
|
||||
ProjectManager.DeviceId=STM32H750XBHx
|
||||
ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.9.0
|
||||
ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.11.2
|
||||
ProjectManager.FreePins=false
|
||||
ProjectManager.HalAssertFull=false
|
||||
ProjectManager.HeapSize=0x200
|
||||
|
@ -539,12 +564,15 @@ ProjectManager.PreviousToolchain=
|
|||
ProjectManager.ProjectBuild=false
|
||||
ProjectManager.ProjectFileName=CubeMX_Config.ioc
|
||||
ProjectManager.ProjectName=CubeMX_Config
|
||||
ProjectManager.ProjectStructure=
|
||||
ProjectManager.RegisterCallBack=
|
||||
ProjectManager.StackSize=0x400
|
||||
ProjectManager.TargetToolchain=MDK-ARM V5.27
|
||||
ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UAScriptAfterPath=
|
||||
ProjectManager.UAScriptBeforePath=
|
||||
ProjectManager.UnderRoot=false
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ETH_Init-ETH-false-HAL-true,4-MX_FMC_Init-FMC-false-HAL-true,5-MX_LTDC_Init-LTDC-false-HAL-true,6-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,7-MX_SDMMC2_SD_Init-SDMMC2-false-HAL-true,8-MX_SPI4_Init-SPI4-false-HAL-true,9-MX_UART4_Init-UART4-false-HAL-true,10-MX_SPI1_Init-SPI1-false-HAL-true,11-MX_USART3_UART_Init-USART3-false-HAL-true,12-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ETH_Init-ETH-false-HAL-true,4-MX_FMC_Init-FMC-false-HAL-true,5-MX_LTDC_Init-LTDC-false-HAL-true,6-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,7-MX_SDMMC2_SD_Init-SDMMC2-false-HAL-true,8-MX_SPI4_Init-SPI4-false-HAL-true,9-MX_UART4_Init-UART4-false-HAL-true,10-MX_SPI1_Init-SPI1-false-HAL-true,11-MX_USART3_UART_Init-USART3-false-HAL-true,12-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,13-MX_IWDG1_Init-IWDG1-false-HAL-true,14-MX_SPI2_Init-SPI2-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
||||
RCC.ADCFreq_Value=400000000
|
||||
RCC.AHB12Freq_Value=240000000
|
||||
RCC.AHB4Freq_Value=240000000
|
||||
|
@ -593,7 +621,7 @@ RCC.HPRE=RCC_HCLK_DIV2
|
|||
RCC.HRTIMFreq_Value=240000000
|
||||
RCC.I2C123Freq_Value=120000000
|
||||
RCC.I2C4Freq_Value=120000000
|
||||
RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM2,DIVM3,DIVN1,DIVN2,DIVN3,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3,DIVP3Freq_Value,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2,DIVR2Freq_Value,DIVR3,DIVR3Freq_Value,FDCANFreq_Value,FMCCLockSelection,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLLFRACN,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMC1CLockSelection,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123CLockSelection,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Spi45ClockSelection,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBCLockSelection,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
|
||||
RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM2,DIVM3,DIVN1,DIVN2,DIVN3,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3,DIVP3Freq_Value,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2,DIVR2Freq_Value,DIVR3,DIVR3Freq_Value,FDCANFreq_Value,FMCCLockSelection,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMC1CLockSelection,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123CLockSelection,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Spi45ClockSelection,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBCLockSelection,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
|
||||
RCC.LPTIM1Freq_Value=120000000
|
||||
RCC.LPTIM2Freq_Value=120000000
|
||||
RCC.LPTIM345Freq_Value=120000000
|
||||
|
@ -602,6 +630,7 @@ RCC.LTDCFreq_Value=33333333.333333332
|
|||
RCC.MCO1PinFreq_Value=64000000
|
||||
RCC.MCO2PinFreq_Value=480000000
|
||||
RCC.PLL2FRACN=0
|
||||
RCC.PLL3FRACN=0
|
||||
RCC.PLLFRACN=0
|
||||
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
|
||||
RCC.QSPIFreq_Value=240000000
|
||||
|
@ -614,8 +643,8 @@ RCC.SAI4BFreq_Value=480000000
|
|||
RCC.SDMMC1CLockSelection=RCC_SDMMCCLKSOURCE_PLL2
|
||||
RCC.SDMMCFreq_Value=200000000
|
||||
RCC.SPDIFRXFreq_Value=480000000
|
||||
RCC.SPI123CLockSelection=RCC_SPI123CLKSOURCE_PLL2
|
||||
RCC.SPI123Freq_Value=400000000
|
||||
RCC.SPI123CLockSelection=RCC_SPI123CLKSOURCE_PLL3
|
||||
RCC.SPI123Freq_Value=100000000
|
||||
RCC.SPI45Freq_Value=100000000
|
||||
RCC.SPI6Freq_Value=120000000
|
||||
RCC.SWPMI1Freq_Value=120000000
|
||||
|
@ -709,12 +738,19 @@ SH.FMC_SDNRAS.0=FMC_SDNRAS,13b-sda1
|
|||
SH.FMC_SDNRAS.ConfNb=1
|
||||
SH.FMC_SDNWE.0=FMC_SDNWE,13b-sda1
|
||||
SH.FMC_SDNWE.ConfNb=1
|
||||
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_2
|
||||
SPI1.CalculateBaudRate=200.0 MBits/s
|
||||
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_4
|
||||
SPI1.CalculateBaudRate=25.0 MBits/s
|
||||
SPI1.Direction=SPI_DIRECTION_2LINES
|
||||
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler
|
||||
SPI1.Mode=SPI_MODE_MASTER
|
||||
SPI1.VirtualType=VM_MASTER
|
||||
SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_2
|
||||
SPI2.CLKPolarity=SPI_POLARITY_LOW
|
||||
SPI2.CalculateBaudRate=50.0 MBits/s
|
||||
SPI2.Direction=SPI_DIRECTION_2LINES
|
||||
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler,CLKPolarity
|
||||
SPI2.Mode=SPI_MODE_MASTER
|
||||
SPI2.VirtualType=VM_MASTER
|
||||
SPI4.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_2
|
||||
SPI4.CalculateBaudRate=50.0 MBits/s
|
||||
SPI4.Direction=SPI_DIRECTION_2LINES
|
||||
|
|
|
@ -124,6 +124,14 @@ endmenu
|
|||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
config BSP_SCB_ENABLE_I_CACHE
|
||||
bool "Enable ICACHE"
|
||||
default y
|
||||
|
||||
config BSP_SCB_ENABLE_D_CACHE
|
||||
bool "Enable DCACHE"
|
||||
default y
|
||||
|
||||
config BSP_USING_GPIO
|
||||
bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
|
@ -302,6 +310,7 @@ menu "On-chip Peripheral Drivers"
|
|||
|
||||
config BSP_USING_SDRAM
|
||||
bool "Enable SDRAM"
|
||||
select RT_USING_MEMHEAP
|
||||
default n
|
||||
|
||||
config BSP_USING_WDT
|
||||
|
@ -314,7 +323,6 @@ menu "On-chip Peripheral Drivers"
|
|||
select BSP_USING_LTDC
|
||||
select BSP_USING_GPIO
|
||||
select BSP_USING_SDRAM
|
||||
select RT_USING_MEMHEAP
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_SDIO_ARTPI
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
#define SOC_STM32H750XB
|
||||
#define BOARD_STM32H750_ARTPI
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
|
@ -12,7 +12,6 @@
|
|||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
|
@ -21,9 +20,16 @@
|
|||
|
||||
/* kservice optimization */
|
||||
|
||||
/* end of kservice optimization */
|
||||
|
||||
/* klibc optimization */
|
||||
|
||||
/* end of klibc optimization */
|
||||
#define RT_USING_DEBUG
|
||||
#define RT_DEBUGING_ASSERT
|
||||
#define RT_DEBUGING_COLOR
|
||||
#define RT_DEBUGING_CONTEXT
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
|
@ -32,19 +38,24 @@
|
|||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
/* end of Inter-Thread communication */
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_SMALL_MEM_AS_HEAP
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_MEMHEAP_FAST_MODE
|
||||
#define RT_USING_MEMHEAP_AS_HEAP
|
||||
#define RT_USING_MEMHEAP_AUTO_BINDING
|
||||
#define RT_USING_HEAP
|
||||
/* end of Memory Management */
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart4"
|
||||
#define RT_VER_NUM 0x50100
|
||||
#define RT_VER_NUM 0x50200
|
||||
#define RT_BACKTRACE_LEVEL_MAX_NR 32
|
||||
/* end of RT-Thread Kernel */
|
||||
#define RT_USING_CACHE
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM
|
||||
|
@ -74,6 +85,7 @@
|
|||
|
||||
/* DFS: device virtual file system */
|
||||
|
||||
/* end of DFS: device virtual file system */
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
|
@ -87,9 +99,7 @@
|
|||
#define RT_USING_SPI
|
||||
#define RT_USING_TOUCH
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
/* end of Device Drivers */
|
||||
|
||||
/* C/C++ and POSIX layer */
|
||||
|
||||
|
@ -101,6 +111,8 @@
|
|||
#define RT_LIBC_TZ_DEFAULT_HOUR 8
|
||||
#define RT_LIBC_TZ_DEFAULT_MIN 0
|
||||
#define RT_LIBC_TZ_DEFAULT_SEC 0
|
||||
/* end of Timezone and Daylight Saving Time */
|
||||
/* end of ISO-ANSI C layer */
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
|
@ -110,18 +122,30 @@
|
|||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
/* end of Interprocess Communication (IPC) */
|
||||
/* end of POSIX (Portable Operating System Interface) layer */
|
||||
/* end of C/C++ and POSIX layer */
|
||||
|
||||
/* Network */
|
||||
|
||||
/* end of Network */
|
||||
|
||||
/* Memory protection */
|
||||
|
||||
/* end of Memory protection */
|
||||
|
||||
/* Utilities */
|
||||
|
||||
/* end of Utilities */
|
||||
|
||||
/* Using USB legacy version */
|
||||
|
||||
/* end of Using USB legacy version */
|
||||
/* end of RT-Thread Components */
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
/* end of RT-Thread Utestcases */
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
|
@ -132,57 +156,78 @@
|
|||
|
||||
/* Marvell WiFi */
|
||||
|
||||
/* end of Marvell WiFi */
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
/* end of Wiced WiFi */
|
||||
|
||||
/* CYW43012 WiFi */
|
||||
|
||||
/* end of CYW43012 WiFi */
|
||||
|
||||
/* BL808 WiFi */
|
||||
|
||||
/* end of BL808 WiFi */
|
||||
|
||||
/* CYW43439 WiFi */
|
||||
|
||||
/* end of CYW43439 WiFi */
|
||||
/* end of Wi-Fi */
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
/* end of IoT Cloud */
|
||||
/* end of IoT - internet of things */
|
||||
|
||||
/* security packages */
|
||||
|
||||
/* end of security packages */
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
|
||||
|
||||
/* end of JSON: JavaScript Object Notation, a lightweight data-interchange format */
|
||||
|
||||
/* XML: Extensible Markup Language */
|
||||
|
||||
/* end of XML: Extensible Markup Language */
|
||||
/* end of language packages */
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* LVGL: powerful and easy-to-use embedded GUI library */
|
||||
|
||||
/* end of LVGL: powerful and easy-to-use embedded GUI library */
|
||||
|
||||
/* u8g2: a monochrome graphic library */
|
||||
|
||||
/* end of u8g2: a monochrome graphic library */
|
||||
/* end of multimedia packages */
|
||||
|
||||
/* tools packages */
|
||||
|
||||
/* end of tools packages */
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* enhanced kernel services */
|
||||
|
||||
/* end of enhanced kernel services */
|
||||
|
||||
/* acceleration: Assembly language or algorithmic acceleration packages */
|
||||
|
||||
/* end of acceleration: Assembly language or algorithmic acceleration packages */
|
||||
|
||||
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
||||
|
||||
/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
/* end of Micrium: Micrium software products porting for RT-Thread */
|
||||
/* end of system packages */
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
@ -190,91 +235,123 @@
|
|||
|
||||
/* STM32 HAL & SDK Drivers */
|
||||
|
||||
/* end of STM32 HAL & SDK Drivers */
|
||||
|
||||
/* Infineon HAL Packages */
|
||||
|
||||
/* end of Infineon HAL Packages */
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
/* end of Kendryte SDK */
|
||||
/* end of HAL & SDK Drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
/* end of sensors drivers */
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
/* end of touch drivers */
|
||||
/* end of peripheral libraries and drivers */
|
||||
|
||||
/* AI packages */
|
||||
|
||||
/* end of AI packages */
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
/* end of Signal Processing and Control Algorithm Packages */
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
|
||||
/* end of project laboratory */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
/* end of samples: kernel and components samples */
|
||||
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
/* end of entertainment: terminal games and other interesting software packages */
|
||||
/* end of miscellaneous packages */
|
||||
|
||||
/* Arduino libraries */
|
||||
|
||||
|
||||
/* Projects and Demos */
|
||||
|
||||
/* end of Projects and Demos */
|
||||
|
||||
/* Sensors */
|
||||
|
||||
/* end of Sensors */
|
||||
|
||||
/* Display */
|
||||
|
||||
/* end of Display */
|
||||
|
||||
/* Timing */
|
||||
|
||||
/* end of Timing */
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
/* end of Data Processing */
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
/* end of Communication */
|
||||
|
||||
/* Device Control */
|
||||
|
||||
/* end of Device Control */
|
||||
|
||||
/* Other */
|
||||
|
||||
/* end of Other */
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
/* end of Signal IO */
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
/* end of Arduino libraries */
|
||||
/* end of RT-Thread online packages */
|
||||
#define SOC_FAMILY_STM32
|
||||
#define SOC_SERIES_STM32H7
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_STM32H750XB
|
||||
#define BOARD_STM32H750_ARTPI
|
||||
|
||||
/* Board extended module */
|
||||
|
||||
/* end of Board extended module */
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_USB_TO_USART
|
||||
/* end of Onboard Peripheral Drivers */
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_SCB_ENABLE_I_CACHE
|
||||
#define BSP_SCB_ENABLE_D_CACHE
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART4
|
||||
#define BSP_UART4_RX_BUFSIZE 256
|
||||
#define BSP_UART4_TX_BUFSIZE 0
|
||||
#define BSP_USING_SDRAM
|
||||
/* end of On-chip Peripheral Drivers */
|
||||
|
||||
/* External Libraries */
|
||||
|
||||
/* end of External Libraries */
|
||||
/* end of Hardware Drivers Config */
|
||||
|
||||
#endif
|
||||
|
|
Loading…
Reference in New Issue