[BSP] Add standalone i.MXRT 1050 Arch Mix BSP.
This commit is contained in:
guozhanxin
parent
5d4e4ae390
commit
7ea038373d
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@ -0,0 +1,420 @@
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#
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# Automatically generated file; DO NOT EDIT.
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# RT-Thread Configuration
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#
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#
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# RT-Thread Kernel
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#
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CONFIG_RT_NAME_MAX=8
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CONFIG_RT_ALIGN_SIZE=4
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# CONFIG_RT_THREAD_PRIORITY_8 is not set
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CONFIG_RT_THREAD_PRIORITY_32=y
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# CONFIG_RT_THREAD_PRIORITY_256 is not set
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CONFIG_RT_THREAD_PRIORITY_MAX=32
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CONFIG_RT_TICK_PER_SECOND=100
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CONFIG_RT_USING_OVERFLOW_CHECK=y
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CONFIG_RT_USING_HOOK=y
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CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
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CONFIG_IDLE_THREAD_STACK_SIZE=256
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# CONFIG_RT_USING_TIMER_SOFT is not set
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CONFIG_RT_DEBUG=y
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# CONFIG_RT_DEBUG_INIT_CONFIG is not set
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# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
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# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
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# CONFIG_RT_DEBUG_IPC_CONFIG is not set
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# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
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# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
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# CONFIG_RT_DEBUG_MEM_CONFIG is not set
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# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
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# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
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# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
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#
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# Inter-Thread communication
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#
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CONFIG_RT_USING_SEMAPHORE=y
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CONFIG_RT_USING_MUTEX=y
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CONFIG_RT_USING_EVENT=y
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CONFIG_RT_USING_MAILBOX=y
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CONFIG_RT_USING_MESSAGEQUEUE=y
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# CONFIG_RT_USING_SIGNALS is not set
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#
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# Memory Management
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#
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CONFIG_RT_USING_MEMPOOL=y
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CONFIG_RT_USING_MEMHEAP=y
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# CONFIG_RT_USING_NOHEAP is not set
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# CONFIG_RT_USING_SMALL_MEM is not set
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# CONFIG_RT_USING_SLAB is not set
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CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
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CONFIG_RT_USING_HEAP=y
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#
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# Kernel Device Object
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#
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CONFIG_RT_USING_DEVICE=y
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# CONFIG_RT_USING_DEVICE_OPS is not set
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# CONFIG_RT_USING_INTERRUPT_INFO is not set
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=128
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
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CONFIG_ARCH_ARM=y
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CONFIG_ARCH_ARM_CORTEX_M=y
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CONFIG_ARCH_ARM_CORTEX_FPU=y
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CONFIG_ARCH_ARM_CORTEX_M7=y
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#
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# RT-Thread Components
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#
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CONFIG_RT_USING_COMPONENTS_INIT=y
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CONFIG_RT_USING_USER_MAIN=y
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CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
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CONFIG_RT_MAIN_THREAD_PRIORITY=10
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#
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# C++ features
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#
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# CONFIG_RT_USING_CPLUSPLUS is not set
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#
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# Command shell
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#
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CONFIG_RT_USING_FINSH=y
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CONFIG_FINSH_THREAD_NAME="tshell"
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CONFIG_FINSH_USING_HISTORY=y
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CONFIG_FINSH_HISTORY_LINES=5
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CONFIG_FINSH_USING_SYMTAB=y
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CONFIG_FINSH_USING_DESCRIPTION=y
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# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
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CONFIG_FINSH_THREAD_PRIORITY=20
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CONFIG_FINSH_THREAD_STACK_SIZE=4096
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CONFIG_FINSH_CMD_SIZE=80
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# CONFIG_FINSH_USING_AUTH is not set
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CONFIG_FINSH_USING_MSH=y
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CONFIG_FINSH_USING_MSH_DEFAULT=y
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CONFIG_FINSH_USING_MSH_ONLY=y
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CONFIG_FINSH_ARG_MAX=10
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#
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# Device virtual file system
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#
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CONFIG_RT_USING_DFS=y
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CONFIG_DFS_USING_WORKDIR=y
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CONFIG_DFS_FILESYSTEMS_MAX=2
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CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
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CONFIG_DFS_FD_MAX=16
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# CONFIG_RT_USING_DFS_MNTTABLE is not set
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CONFIG_RT_USING_DFS_ELMFAT=y
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#
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# elm-chan's FatFs, Generic FAT Filesystem Module
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#
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CONFIG_RT_DFS_ELM_CODE_PAGE=437
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CONFIG_RT_DFS_ELM_WORD_ACCESS=y
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# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
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CONFIG_RT_DFS_ELM_USE_LFN_3=y
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CONFIG_RT_DFS_ELM_USE_LFN=3
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CONFIG_RT_DFS_ELM_MAX_LFN=255
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CONFIG_RT_DFS_ELM_DRIVES=2
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CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
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# CONFIG_RT_DFS_ELM_USE_ERASE is not set
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CONFIG_RT_DFS_ELM_REENTRANT=y
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CONFIG_RT_USING_DFS_DEVFS=y
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# CONFIG_RT_USING_DFS_ROMFS is not set
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# CONFIG_RT_USING_DFS_RAMFS is not set
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# CONFIG_RT_USING_DFS_UFFS is not set
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# CONFIG_RT_USING_DFS_JFFS2 is not set
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#
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# Device Drivers
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#
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CONFIG_RT_USING_DEVICE_IPC=y
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CONFIG_RT_PIPE_BUFSZ=512
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CONFIG_RT_USING_SERIAL=y
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# CONFIG_RT_USING_CAN is not set
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# CONFIG_RT_USING_HWTIMER is not set
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CONFIG_RT_USING_CPUTIME=y
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CONFIG_RT_USING_CPUTIME_CORTEXM=y
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CONFIG_RT_USING_I2C=y
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CONFIG_RT_USING_I2C_BITOPS=y
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CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_PWM is not set
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# CONFIG_RT_USING_MTD_NOR is not set
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# CONFIG_RT_USING_MTD_NAND is not set
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# CONFIG_RT_USING_MTD is not set
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CONFIG_RT_USING_RTC=y
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# CONFIG_RT_USING_SOFT_RTC is not set
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# CONFIG_RTC_SYNC_USING_NTP is not set
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CONFIG_RT_USING_SDIO=y
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CONFIG_RT_SDIO_STACK_SIZE=512
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CONFIG_RT_SDIO_THREAD_PRIORITY=15
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CONFIG_RT_MMCSD_STACK_SIZE=1024
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CONFIG_RT_MMCSD_THREAD_PREORITY=22
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CONFIG_RT_MMCSD_MAX_PARTITION=16
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# CONFIG_RT_SDIO_DEBUG is not set
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CONFIG_RT_USING_SPI=y
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# CONFIG_RT_USING_SPI_MSD is not set
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# CONFIG_RT_USING_SFUD is not set
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# CONFIG_RT_USING_W25QXX is not set
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# CONFIG_RT_USING_GD is not set
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# CONFIG_RT_USING_ENC28J60 is not set
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# CONFIG_RT_USING_SPI_WIFI is not set
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# CONFIG_RT_USING_WDT is not set
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# CONFIG_RT_USING_AUDIO is not set
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#
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# Using WiFi
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#
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# CONFIG_RT_USING_WIFI is not set
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#
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# Using USB
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#
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# CONFIG_RT_USING_USB_HOST is not set
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# CONFIG_RT_USING_USB_DEVICE is not set
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#
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# POSIX layer and C standard library
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#
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CONFIG_RT_USING_LIBC=y
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# CONFIG_RT_USING_PTHREADS is not set
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# CONFIG_RT_USING_POSIX is not set
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# CONFIG_RT_USING_MODULE is not set
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#
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# Network
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#
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#
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# Socket abstraction layer
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#
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# CONFIG_RT_USING_SAL is not set
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#
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# light weight TCP/IP stack
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#
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# CONFIG_RT_USING_LWIP is not set
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#
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# Modbus master and slave stack
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#
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# CONFIG_RT_USING_MODBUS is not set
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#
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# AT commands
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#
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# CONFIG_RT_USING_AT is not set
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#
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# VBUS(Virtual Software BUS)
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#
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# CONFIG_RT_USING_VBUS is not set
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#
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# Utilities
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#
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# CONFIG_RT_USING_LOGTRACE is not set
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# CONFIG_RT_USING_RYM is not set
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#
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# ARM CMSIS
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#
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# CONFIG_RT_USING_CMSIS_OS is not set
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# CONFIG_RT_USING_RTT_CMSIS is not set
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#
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# RT-Thread online packages
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#
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#
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# IoT - internet of things
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#
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# CONFIG_PKG_USING_PAHOMQTT is not set
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# CONFIG_PKG_USING_WEBCLIENT is not set
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# CONFIG_PKG_USING_MONGOOSE is not set
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# CONFIG_PKG_USING_WEBTERMINAL is not set
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# CONFIG_PKG_USING_CJSON is not set
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# CONFIG_PKG_USING_JSMN is not set
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# CONFIG_PKG_USING_LJSON is not set
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# CONFIG_PKG_USING_EZXML is not set
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# CONFIG_PKG_USING_NANOPB is not set
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#
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# Wi-Fi
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#
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#
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# Marvell WiFi
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#
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# CONFIG_PKG_USING_WLANMARVELL is not set
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#
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# Wiced WiFi
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#
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# CONFIG_PKG_USING_WLAN_WICED is not set
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# CONFIG_PKG_USING_COAP is not set
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# CONFIG_PKG_USING_NOPOLL is not set
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# CONFIG_PKG_USING_NETUTILS is not set
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# CONFIG_PKG_USING_AT_DEVICE is not set
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# CONFIG_PKG_USING_WIZNET is not set
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#
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# IoT Cloud
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#
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# CONFIG_PKG_USING_ONENET is not set
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# CONFIG_PKG_USING_GAGENT_CLOUD is not set
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# CONFIG_PKG_USING_ALI_IOTKIT is not set
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# CONFIG_PKG_USING_AZURE is not set
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#
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# security packages
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#
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# CONFIG_PKG_USING_MBEDTLS is not set
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# CONFIG_PKG_USING_libsodium is not set
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# CONFIG_PKG_USING_TINYCRYPT is not set
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#
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# language packages
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#
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# CONFIG_PKG_USING_LUA is not set
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# CONFIG_PKG_USING_JERRYSCRIPT is not set
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# CONFIG_PKG_USING_MICROPYTHON is not set
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#
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# multimedia packages
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#
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# CONFIG_PKG_USING_OPENMV is not set
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# CONFIG_PKG_USING_MUPDF is not set
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# CONFIG_PKG_USING_BEEPPLAYER is not set
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#
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# tools packages
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#
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# CONFIG_PKG_USING_CMBACKTRACE is not set
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# CONFIG_PKG_USING_EASYFLASH is not set
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# CONFIG_PKG_USING_EASYLOGGER is not set
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# CONFIG_PKG_USING_SYSTEMVIEW is not set
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# CONFIG_PKG_USING_RDB is not set
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#
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# system packages
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#
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# CONFIG_PKG_USING_GUIENGINE is not set
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# CONFIG_PKG_USING_PERSIMMON is not set
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# CONFIG_PKG_USING_CAIRO is not set
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# CONFIG_PKG_USING_PIXMAN is not set
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# CONFIG_PKG_USING_LWEXT4 is not set
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# CONFIG_PKG_USING_PARTITION is not set
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# CONFIG_PKG_USING_FAL is not set
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# CONFIG_PKG_USING_SQLITE is not set
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# CONFIG_PKG_USING_RTI is not set
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# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
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# CONFIG_PKG_USING_CMSIS is not set
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# CONFIG_PKG_USING_DFS_YAFFS is not set
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#
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# peripheral libraries and drivers
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#
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# CONFIG_PKG_USING_REALTEK_AMEBA is not set
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# CONFIG_PKG_USING_SHT2X is not set
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# CONFIG_PKG_USING_AHT10 is not set
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# CONFIG_PKG_USING_AP3216C is not set
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# CONFIG_PKG_USING_STM32_SDIO is not set
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# CONFIG_PKG_USING_ICM20608 is not set
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# CONFIG_PKG_USING_U8G2 is not set
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#
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# miscellaneous packages
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#
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# CONFIG_PKG_USING_LIBCSV is not set
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# CONFIG_PKG_USING_OPTPARSE is not set
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# CONFIG_PKG_USING_FASTLZ is not set
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# CONFIG_PKG_USING_MINILZO is not set
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# CONFIG_PKG_USING_QUICKLZ is not set
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# CONFIG_PKG_USING_MULTIBUTTON is not set
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# CONFIG_PKG_USING_CANFESTIVAL is not set
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# CONFIG_PKG_USING_ZLIB is not set
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# CONFIG_PKG_USING_DSTR is not set
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#
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# sample package
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#
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#
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# samples: kernel and components samples
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#
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# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
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# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
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# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
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# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
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#
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# example package: hello
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#
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# CONFIG_PKG_USING_HELLO is not set
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CONFIG_SOC_IMXRT1052=y
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CONFIG_BOARD_RT1050_ArchMix=y
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# CONFIG_BOARD_USING_HYPERFLASH is not set
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CONFIG_BOARD_USING_QSPIFLASH=y
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#
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# RT1050 Bsp Config
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#
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#
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# Select uart drivers
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#
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CONFIG_RT_USING_UART1=y
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# CONFIG_RT_USING_UART2 is not set
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# CONFIG_RT_USING_UART3 is not set
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# CONFIG_RT_USING_UART8 is not set
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#
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# Select spi bus and dev drivers
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#
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CONFIG_LPSPI_CLK_SOURCE_FROM_PLL3PFD1=y
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# CONFIG_LPSPI_CLK_SOURCE_FROM_PLL3PFD0 is not set
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# CONFIG_LPSPI_CLK_SOURCE_FROM_PLL2 is not set
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# CONFIG_LPSPI_CLK_SOURCE_FROM_PLL2PFD2 is not set
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CONFIG_LPSPI_CLK_SOURCE=0
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CONFIG_LPSPI_CLK_SOURCE_DIVIDER=8
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# CONFIG_RT_USING_SPIBUS3 is not set
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CONFIG_RT_USING_SPIBUS4=y
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CONFIG_LPSPI4_SCK_GPIO_2=y
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CONFIG_LPSPI4_SDO_GPIO_2=y
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CONFIG_LPSPI4_SDI_GPIO_2=y
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# CONFIG_RT_USING_SPI_FLASH is not set
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#
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# Select iic bus drivers
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#
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CONFIG_RT_USING_HW_I2C1=y
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CONFIG_HW_I2C1_BADURATE_100kHZ=y
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# CONFIG_HW_I2C1_BADURATE_400kHZ is not set
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# CONFIG_RT_USING_HW_I2C3 is not set
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# CONFIG_RT_USING_HW_I2C4 is not set
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#
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# Select lcd driver
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#
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#
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# Notice: Arch Mix Board para: 480*272 4 4 8 2 40 10 127 45
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#
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CONFIG_RT_USING_LCD=y
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CONFIG_LCD_WIDTH=480
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CONFIG_LCD_HEIGHT=272
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CONFIG_LCD_HFP=4
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CONFIG_LCD_VFP=4
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CONFIG_LCD_HBP=8
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CONFIG_LCD_VBP=2
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CONFIG_LCD_HSW=40
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CONFIG_LCD_VSW=10
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CONFIG_LCD_BL_PIN=127
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CONFIG_LCD_RST_PIN=45
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CONFIG_RT_USING_SDRAM=y
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CONFIG_RT_USING_RTC_HP=y
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@ -0,0 +1,308 @@
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mainmenu "RT-Thread Configuration"
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config $BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config $RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../.."
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config $PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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config SOC_IMXRT1052
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bool
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select ARCH_ARM_CORTEX_M7
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select ARCH_ARM_CORTEX_FPU
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default y
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# RT1050 board config!
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config BOARD_RT1050_ArchMix
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bool
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default y
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# RT1050 flash select!
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choice
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prompt "RT1050 Flash select"
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default BOARD_USING_QSPIFLASH
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config BOARD_USING_HYPERFLASH
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bool "HYPERFLASH"
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config BOARD_USING_QSPIFLASH
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bool "QSPIFLASH"
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endchoice
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menu "RT1050 Bsp Config"
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||||
menu "Select uart drivers"
|
||||
config RT_USING_UART1
|
||||
bool "Using uart1"
|
||||
select RT_USING_SERIAL
|
||||
default y
|
||||
config RT_USING_UART2
|
||||
bool "Using uart2"
|
||||
select RT_USING_SERIAL
|
||||
default n
|
||||
config RT_USING_UART3
|
||||
bool "Using uart3"
|
||||
select RT_USING_SERIAL
|
||||
default n
|
||||
config RT_USING_UART8
|
||||
bool "Using uart8"
|
||||
select RT_USING_SERIAL
|
||||
default n
|
||||
endmenu
|
||||
|
||||
menu "Select spi bus and dev drivers"
|
||||
choice
|
||||
prompt "SPI bus clock source"
|
||||
default LPSPI_CLK_SOURCE_FROM_PLL3PFD1
|
||||
|
||||
config LPSPI_CLK_SOURCE_FROM_PLL3PFD1
|
||||
bool "PLL3PFD1"
|
||||
config LPSPI_CLK_SOURCE_FROM_PLL3PFD0
|
||||
bool "PLL3PFD0"
|
||||
config LPSPI_CLK_SOURCE_FROM_PLL2
|
||||
bool "PLL2"
|
||||
config LPSPI_CLK_SOURCE_FROM_PLL2PFD2
|
||||
bool "PLL2PFD2"
|
||||
endchoice
|
||||
config LPSPI_CLK_SOURCE
|
||||
int
|
||||
default 0 if LPSPI_CLK_SOURCE_FROM_PLL3PFD1
|
||||
default 1 if LPSPI_CLK_SOURCE_FROM_PLL3PFD0
|
||||
default 2 if LPSPI_CLK_SOURCE_FROM_PLL2
|
||||
default 3 if LPSPI_CLK_SOURCE_FROM_PLL2PFD2
|
||||
|
||||
config LPSPI_CLK_SOURCE_DIVIDER
|
||||
int "SPI bus clock source divider"
|
||||
range 1 8
|
||||
default 8
|
||||
|
||||
config RT_USING_SPIBUS3
|
||||
bool "Using spi3 bus"
|
||||
select RT_USING_SPI
|
||||
default n
|
||||
choice
|
||||
prompt "spi3 bus sck io choice"
|
||||
default LPSPI3_SCK_GPIO_1
|
||||
depends on RT_USING_SPIBUS3
|
||||
config LPSPI3_SCK_GPIO_1
|
||||
bool "GPIO_AD_B1_15"
|
||||
endchoice
|
||||
choice
|
||||
prompt "spi3 bus sdo io choice"
|
||||
default LPSPI3_SDO_GPIO_1
|
||||
depends on RT_USING_SPIBUS3
|
||||
config LPSPI3_SDO_GPIO_1
|
||||
bool "GPIO_AD_B1_14"
|
||||
endchoice
|
||||
choice
|
||||
prompt "spi3 bus sdi io choice"
|
||||
default LPSPI3_SDI_GPIO_1
|
||||
depends on RT_USING_SPIBUS3
|
||||
config LPSPI3_SDI_GPIO_1
|
||||
bool "GPIO_AD_B1_13"
|
||||
endchoice
|
||||
|
||||
config RT_USING_SPIBUS4
|
||||
bool "Using spi4 bus"
|
||||
select RT_USING_SPI
|
||||
default y
|
||||
choice
|
||||
prompt "spi4 bus sck io choice"
|
||||
default LPSPI4_SCK_GPIO_1
|
||||
depends on RT_USING_SPIBUS4
|
||||
config LPSPI4_SCK_GPIO_2
|
||||
bool "GPIO_B1_07"
|
||||
endchoice
|
||||
choice
|
||||
prompt "spi4 bus sdo io choice"
|
||||
default LPSPI4_SDO_GPIO_1
|
||||
depends on RT_USING_SPIBUS4
|
||||
config LPSPI4_SDO_GPIO_2
|
||||
bool "GPIO_B1_06"
|
||||
endchoice
|
||||
choice
|
||||
prompt "spi4 bus sdi io choice"
|
||||
default LPSPI4_SDI_GPIO_1
|
||||
depends on RT_USING_SPIBUS4
|
||||
config LPSPI4_SDI_GPIO_2
|
||||
bool "GPIO_B1_05"
|
||||
endchoice
|
||||
|
||||
config RT_USING_SPI_FLASH
|
||||
bool "Using spi flash with sfud"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
select RT_USING_SFUD
|
||||
select RT_USING_PIN
|
||||
choice
|
||||
prompt "SPI flash using spibus"
|
||||
default SPI_FLASH_USING_SPIBUS4
|
||||
depends on RT_USING_SPI_FLASH
|
||||
|
||||
config SPI_FLASH_USING_SPIBUS1
|
||||
bool "spi1"
|
||||
select RT_USING_SPIBUS1
|
||||
config SPI_FLASH_USING_SPIBUS2
|
||||
bool "spi2"
|
||||
select RT_USING_SPIBUS2
|
||||
config SPI_FLASH_USING_SPIBUS3
|
||||
bool "spi3"
|
||||
select RT_USING_SPIBUS3
|
||||
config SPI_FLASH_USING_SPIBUS4
|
||||
bool "spi4"
|
||||
select RT_USING_SPIBUS4
|
||||
endchoice
|
||||
config SPI_FLASH_USING_SPIBUS_NAME
|
||||
string
|
||||
default "spi1" if SPI_FLASH_USING_SPIBUS1
|
||||
default "spi2" if SPI_FLASH_USING_SPIBUS2
|
||||
default "spi3" if SPI_FLASH_USING_SPIBUS3
|
||||
default "spi4" if SPI_FLASH_USING_SPIBUS4
|
||||
|
||||
config SPI_FLASH_NAME
|
||||
string "SPI flash device name"
|
||||
default "flash0"
|
||||
depends on RT_USING_SPI_FLASH
|
||||
|
||||
config SPI_FLASH_USING_CS_PIN
|
||||
int "SPI flash cs pin index"
|
||||
default 79
|
||||
range 1 127
|
||||
depends on RT_USING_SPI_FLASH
|
||||
endmenu
|
||||
|
||||
menu "Select iic bus drivers"
|
||||
|
||||
config RT_USING_HW_I2C1
|
||||
bool "using hardware i2c1"
|
||||
select RT_USING_I2C
|
||||
default y
|
||||
choice
|
||||
prompt "i2c1 bus badurate choice"
|
||||
default HW_I2C1_BADURATE_100kHZ
|
||||
depends on RT_USING_HW_I2C1
|
||||
config HW_I2C1_BADURATE_100kHZ
|
||||
bool "100kHZ"
|
||||
config HW_I2C1_BADURATE_400kHZ
|
||||
bool "400kHZ"
|
||||
endchoice
|
||||
|
||||
config RT_USING_HW_I2C3
|
||||
bool "using hardware i2c3"
|
||||
select RT_USING_I2C
|
||||
default n
|
||||
choice
|
||||
prompt "i2c3 bus badurate choice"
|
||||
default HW_I2C3_BADURATE_100kHZ
|
||||
depends on RT_USING_HW_I2C3
|
||||
config HW_I2C3_BADURATE_100kHZ
|
||||
bool "100kHZ"
|
||||
config HW_I2C3_BADURATE_400kHZ
|
||||
bool "400kHZ"
|
||||
endchoice
|
||||
|
||||
config RT_USING_HW_I2C4
|
||||
bool "using hardware i2c4"
|
||||
select RT_USING_I2C
|
||||
default n
|
||||
choice
|
||||
prompt "i2c4 bus badurate choice"
|
||||
default HW_I2C4_BADURATE_100kHZ
|
||||
depends on RT_USING_HW_I2C4
|
||||
config HW_I2C4_BADURATE_100kHZ
|
||||
bool "100kHZ"
|
||||
config HW_I2C4_BADURATE_400kHZ
|
||||
bool "400kHZ"
|
||||
endchoice
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Select lcd driver"
|
||||
|
||||
if RT_USING_LCD
|
||||
comment "Notice: Arch Mix Board para: 480*272 4 4 8 2 40 10 127 45"
|
||||
endif
|
||||
|
||||
config RT_USING_LCD
|
||||
bool "Using lcd"
|
||||
default n
|
||||
|
||||
config LCD_WIDTH
|
||||
int "Width pixel num"
|
||||
default 480
|
||||
depends on RT_USING_LCD
|
||||
config LCD_HEIGHT
|
||||
int "Height pixel num"
|
||||
default 272
|
||||
depends on RT_USING_LCD
|
||||
config LCD_HFP
|
||||
int "HFP"
|
||||
default 4
|
||||
depends on RT_USING_LCD
|
||||
config LCD_VFP
|
||||
int "VFP"
|
||||
default 4
|
||||
depends on RT_USING_LCD
|
||||
config LCD_HBP
|
||||
int "HBP"
|
||||
default 8
|
||||
depends on RT_USING_LCD
|
||||
config LCD_VBP
|
||||
int "VBP"
|
||||
default 2
|
||||
depends on RT_USING_LCD
|
||||
config LCD_HSW
|
||||
int "HSW"
|
||||
default 40
|
||||
depends on RT_USING_LCD
|
||||
config LCD_VSW
|
||||
int "VSW"
|
||||
default 10
|
||||
depends on RT_USING_LCD
|
||||
config LCD_BL_PIN
|
||||
int "Backlight pin index"
|
||||
default 127
|
||||
depends on RT_USING_LCD
|
||||
config LCD_RST_PIN
|
||||
int "Reset pin index"
|
||||
default 45
|
||||
depends on RT_USING_LCD
|
||||
endmenu
|
||||
|
||||
#menu "Select SDRAM driver"
|
||||
config RT_USING_SDRAM
|
||||
bool "Using sdram"
|
||||
default y
|
||||
#endmenu
|
||||
|
||||
#menu "Select RTC driver"
|
||||
config RT_USING_RTC_HP
|
||||
bool "Using hp rtc"
|
||||
select RT_USING_RTC
|
||||
default n
|
||||
#endmenu
|
||||
|
||||
if RT_USING_USB_DEVICE
|
||||
choice
|
||||
prompt "select usb device controller"
|
||||
default RT_USING_EHCI0_AS_DEVICE
|
||||
|
||||
config RT_USING_EHCI0_AS_DEVICE
|
||||
bool "set EHCI0 as device"
|
||||
config RT_USING_EHCI1_AS_DEVICE
|
||||
bool "set EHCI1 as device"
|
||||
endchoice
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
# i.MX RT1050 Arch Mix
|
||||
|
||||
## 1. 简介
|
||||
|
||||
i.MX RT 1050系列芯片，是由 NXP 半导体公司推出的跨界处理器芯片。它基于应用处理器的芯片架构，采用了微控制器的内核Cortex-M7，从而具有应用处理器的高性能及丰富的功能，又具备传统微控制器的易用、实时及低功耗的特性。
|
||||
|
||||
BSP默认支持的i.MX RT1052处理器具备以下简要的特性：
|
||||
|
||||
| 介绍 | 描述 |
|
||||
| ---- | ---- |
|
||||
| 主CPU平台 | ARM Cortex-M7 |
|
||||
| 最高频率 | 600MHz |
|
||||
| 内部存储器 | 512KB SRAM |
|
||||
| 外部存储器接口 | NAND、eMMC、QuadSPI NOR Flash 和 Parallel NOR Flash |
|
||||
|
||||
## 2. 编译说明
|
||||
|
||||
i.MX RT1050板级包支持MDK5﹑IAR开发环境和GCC编译器，以下是具体版本信息：
|
||||
|
||||
| IDE/编译器 | 已测试版本 |
|
||||
| ---------- | --------- |
|
||||
| MDK5 | MDK525 |
|
||||
| IAR | IAR 8.11.3.13984 |
|
||||
| GCC | GCC 5.4.1 20160919 (release) |
|
||||
|
||||
## 3.BSP使用
|
||||
|
||||
### 3.1 配置工程
|
||||
|
||||
i.MX RT1052 BSP 支持多种 Flash，包括 Hyper Flash 和 QSPI Flash。如果不是 QSPI Flash 版本，那么需要重新配置并生成工程：
|
||||
|
||||
- 在 bsp 下打开 env 工具
|
||||
- 输入`menuconfig`命令，`RT1052 Flash select (***)-->`选择正确的 Flash 版本。
|
||||
- 输入`scons --target=mdk5 -s`或`scons --target=iar`来生成需要的工程
|
||||
|
||||
### 3.2 下载和仿真
|
||||
|
||||
连接外置仿真器 Jlink 后，就可以进行下载和仿真。使用 TTL 转串口工具连接开发板上 J3 的19/20 引脚，在终端工具里打开相应的串口。(19 接 TX，20 接 RX)
|
||||
|
||||
### 3.3 运行结果
|
||||
|
||||
如果编译 & 烧写无误，当复位设备后，会在串口上看到RT-Thread的启动logo信息：
|
||||
|
||||
```
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 3.1.1 build Oct 9 2018
|
||||
2006 - 2018 Copyright by rt-thread team
|
||||
using armcc, version: 5060750
|
||||
build time: Oct 9 2018 14:21:49
|
||||
msh />[I/[SDIO]] SD card capacity 123904 KB.
|
||||
[I/[SDIO]] probe mmcsd block device!
|
||||
found part[0], begin: 67584, size: 120.958MB
|
||||
File System initialized!
|
||||
```
|
||||
|
||||
## 4. 驱动支持情况及计划
|
||||
|
||||
| 驱动 | 支持情况 | 备注 |
|
||||
| ------ | ---- | ------ |
|
||||
| UART | 支持 | UART 1~3/8 |
|
||||
| GPIO | 支持 | |
|
||||
| IIC | 支持 | IIC 1/3/4 |
|
||||
| SPI | 支持 | SPI 3/4 |
|
||||
| LCD | 支持 | |
|
||||
| RTC | 支持 | |
|
||||
| SDIO | 支持 | 暂时仅仅支持一个SDIO，还不支持中断方式 |
|
||||
| SDRAM | 支持 | 32M SDRAM，后面 2M 作为 Non Cache 区域 |
|
||||
|
||||
## 5. 联系人信息
|
||||
|
||||
维护人：
|
||||
|
||||
- [tanek](https://github.com/TanekLiang)
|
||||
- [liu2guang](https://github.com/liu2guang)
|
||||
|
||||
## 6. 参考
|
||||
|
||||
- [MIMXRT1050-EVK: i.MX RT1050评估套件概述](https://www.nxp.com/cn/products/processors-and-microcontrollers/applications-processors/i.mx-applications-processors/i.mx-rt-series/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK)
|
||||
- [MIMXRT1050 EVK Board Hardware User’s Guide ](https://www.nxp.com/docs/en/user-guide/MIMXRT1050EVKHUG.pdf)
|
||||
- [i.MX RT Series Crossover Processor Quick Start Guide](https://www.nxp.com/docs/en/user-guide/IMXRT1050EVKQSG.pdf)
|
||||
- [i.MX RT Series Crossover Processor Fact Sheet](https://www.nxp.com/docs/en/fact-sheet/IMXRTSERIESFS.pdf)
|
||||
- [Evaluation Kit Based on i.MX RT1050 Crossover Processors](https://www.nxp.com/docs/en/fact-sheet/IMXRT1050EVKFS.pdf)
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
# for module compiling
|
||||
import os
|
||||
Import('RTT_ROOT')
|
||||
|
||||
cwd = str(Dir('#'))
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
from building import *
|
||||
|
||||
TARGET = 'rtthread-imxrt.' + rtconfig.TARGET_EXT
|
||||
|
||||
if rtconfig.PLATFORM == 'armcc':
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
|
||||
# overwrite cflags, because cflags has '--C99'
|
||||
CXXCOM = '$CXX -o $TARGET --cpp -c $CXXFLAGS $_CCCOMCOM $SOURCES')
|
||||
else:
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
|
||||
CXXCOM = '$CXX -o $TARGET -c $CXXFLAGS $_CCCOMCOM $SOURCES')
|
||||
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT)
|
||||
|
||||
objs = objs + SConscript('../Libraries/imxrt1050/SConscript')
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
|
||||
def Update_MDKFlashProgrammingAlgorithm(flash_dict):
|
||||
import xml.etree.ElementTree as etree
|
||||
from utils import xml_indent
|
||||
|
||||
project_tree = etree.parse('project.uvoptx')
|
||||
root = project_tree.getroot()
|
||||
out = file('project.uvoptx', 'wb')
|
||||
|
||||
for elem in project_tree.iterfind('.//Target/TargetOption/TargetDriverDllRegistry/SetRegEntry'):
|
||||
Key = elem.find('Key')
|
||||
if Key.text in flash_dict.keys():
|
||||
elem.find('Name').text = flash_dict[Key.text]
|
||||
|
||||
xml_indent(root)
|
||||
out.write(etree.tostring(root, encoding='utf-8'))
|
||||
out.close()
|
||||
|
||||
if GetOption('target') and GetDepend('BOARD_USING_QSPIFLASH'):
|
||||
Update_MDKFlashProgrammingAlgorithm({
|
||||
"JL2CM3": '-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI-JP0 -JP0 -RST1 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FCF000 -FN1 -FF0iMXRT1052_W25Q256JV_By_Fire -FS060000000 -FL02000000',
|
||||
"CMSIS_AGDI": '-X"Any" -UAny -O974 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FCF000 -FN1 -FF0iMXRT1052_W25Q256JV_By_Fire -FS060000000 -FL02000000',
|
||||
})
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd, str(Dir('#'))]
|
||||
|
||||
# add for startup script
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
CPPDEFINES = ['__START=entry']
|
||||
else:
|
||||
CPPDEFINES = []
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
* File : lcd_init.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-06-12 Tanek first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#if defined(PKG_USING_GUIENGINE)
|
||||
|
||||
#include <rtgui/driver.h>
|
||||
int lcd_init(void)
|
||||
{
|
||||
struct rt_device *device;
|
||||
device = rt_device_find("lcd");
|
||||
if (device)
|
||||
{
|
||||
rtgui_graphic_set_device(device);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_APP_EXPORT(lcd_init);
|
||||
#endif
|
||||
|
|
@ -0,0 +1,143 @@
|
|||
/*
|
||||
* File : clock.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-10-10 Tanek first version
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef RT_USING_DFS
|
||||
#include <dfs_file.h>
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_DEVICE
|
||||
#include <rtdevice.h>
|
||||
#endif
|
||||
|
||||
#include <board.h>
|
||||
|
||||
void dump_clock(void)
|
||||
{
|
||||
rt_kprintf("OSC clock : %d\n", CLOCK_GetFreq(kCLOCK_OscClk));
|
||||
rt_kprintf("RTC clock : %d\n", CLOCK_GetFreq(kCLOCK_RtcClk));
|
||||
rt_kprintf("CPU clock: %d\n", CLOCK_GetFreq(kCLOCK_CpuClk));
|
||||
rt_kprintf("AHB clock : %d\n", CLOCK_GetFreq(kCLOCK_AhbClk));
|
||||
rt_kprintf("SEMC clock : %d\n", CLOCK_GetFreq(kCLOCK_SemcClk));
|
||||
rt_kprintf("IPG clock : %d\n", CLOCK_GetFreq(kCLOCK_IpgClk));
|
||||
rt_kprintf("ARMPLLCLK(PLL1) : %d\n", CLOCK_GetFreq(kCLOCK_ArmPllClk));
|
||||
rt_kprintf("SYSPLLCLK(PLL2/528_PLL) : %d\n", CLOCK_GetFreq(kCLOCK_SysPllClk));
|
||||
rt_kprintf("SYSPLLPDF0CLK : %d\n", CLOCK_GetFreq(kCLOCK_SysPllPfd0Clk));
|
||||
rt_kprintf("SYSPLLPFD1CLK : %d\n", CLOCK_GetFreq(kCLOCK_SysPllPfd1Clk));
|
||||
rt_kprintf("SYSPLLPFD2CLK : %d\n", CLOCK_GetFreq(kCLOCK_SysPllPfd2Clk));
|
||||
rt_kprintf("SYSPLLPFD3CLK : %d\n", CLOCK_GetFreq(kCLOCK_SysPllPfd3Clk));
|
||||
rt_kprintf("USB1PLLCLK(PLL3) : %d\n", CLOCK_GetFreq(kCLOCK_Usb1PllClk));
|
||||
rt_kprintf("USB1PLLPDF0CLK : %d\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk));
|
||||
rt_kprintf("USB1PLLPFD1CLK : %d\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd1Clk));
|
||||
rt_kprintf("USB1PLLPFD2CLK : %d\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd2Clk));
|
||||
rt_kprintf("USB1PLLPFD3CLK : %d\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd3Clk));
|
||||
rt_kprintf("Audio PLLCLK(PLL4) : %d\n", CLOCK_GetFreq(kCLOCK_AudioPllClk));
|
||||
rt_kprintf("Video PLLCLK(PLL5) : %d\n", CLOCK_GetFreq(kCLOCK_VideoPllClk));
|
||||
rt_kprintf("Enet PLLCLK ref_enetpll0 : %d\n", CLOCK_GetFreq(kCLOCK_EnetPll0Clk));
|
||||
rt_kprintf("Enet PLLCLK ref_enetpll1 : %d\n", CLOCK_GetFreq(kCLOCK_EnetPll1Clk));
|
||||
rt_kprintf("USB2PLLCLK(PLL7) : %d\n", CLOCK_GetFreq(kCLOCK_Usb2PllClk));
|
||||
}
|
||||
|
||||
void dump_cc_info(void)
|
||||
{
|
||||
#if defined(__CC_ARM)
|
||||
rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION);
|
||||
#elif defined(__ICCARM__)
|
||||
rt_kprintf("using iccarm, version: %d\n", __VER__);
|
||||
#elif defined(__GNUC__)
|
||||
rt_kprintf("using gcc, version: %d.%d\n", __GNUC__, __GNUC_MINOR__);
|
||||
#endif
|
||||
}
|
||||
|
||||
void dump_link_info(void)
|
||||
{
|
||||
#if defined(__CC_ARM)
|
||||
|
||||
#elif defined(__ICCARM__)
|
||||
|
||||
#elif defined(__GNUC__)
|
||||
#define DUMP_SYMBOL(__SYM) \
|
||||
extern int __SYM; \
|
||||
rt_kprintf("%s: %p\n", #__SYM, &__SYM)
|
||||
|
||||
DUMP_SYMBOL(__fsymtab_start);
|
||||
DUMP_SYMBOL(__fsymtab_end);
|
||||
DUMP_SYMBOL(__vsymtab_start);
|
||||
DUMP_SYMBOL(__vsymtab_end);
|
||||
DUMP_SYMBOL(__rt_init_start);
|
||||
DUMP_SYMBOL(__rt_init_end);
|
||||
|
||||
DUMP_SYMBOL(__exidx_start);
|
||||
DUMP_SYMBOL(__exidx_end);
|
||||
|
||||
DUMP_SYMBOL(__etext);
|
||||
|
||||
DUMP_SYMBOL(__data_start__);
|
||||
DUMP_SYMBOL(__data_end__);
|
||||
|
||||
DUMP_SYMBOL(__noncachedata_start__);
|
||||
DUMP_SYMBOL(__noncachedata_init_end__);
|
||||
|
||||
DUMP_SYMBOL(__noncachedata_end__);
|
||||
|
||||
DUMP_SYMBOL(__bss_start__);
|
||||
DUMP_SYMBOL(__bss_end__);
|
||||
|
||||
DUMP_SYMBOL(stack_start);
|
||||
DUMP_SYMBOL(stack_end);
|
||||
|
||||
DUMP_SYMBOL(heap_start);
|
||||
#endif
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
rt_uint32_t result;
|
||||
//dump_clock();
|
||||
dump_cc_info();
|
||||
dump_link_info();
|
||||
|
||||
rt_kprintf("build time: %s %s\n", __DATE__, __TIME__);
|
||||
|
||||
#if defined(RT_USING_DFS) && defined(RT_USING_SDIO)
|
||||
result = mmcsd_wait_cd_changed(RT_TICK_PER_SECOND);
|
||||
if (result == MMCSD_HOST_PLUGED)
|
||||
{
|
||||
/* mount sd card fat partition 1 as root directory */
|
||||
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
|
||||
rt_kprintf("File System initialized!\n");
|
||||
else
|
||||
rt_kprintf("File System init failed!\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf("sdcard init fail or timeout: %d!\n", result);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add the general drivers.
|
||||
src = Split("""
|
||||
board.c
|
||||
""")
|
||||
|
||||
CPPPATH = [cwd]
|
||||
CPPDEFINES = []
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
|
|
@ -0,0 +1,204 @@
|
|||
/*
|
||||
* File : board.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009 RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-01-05 Bernard first implementation
|
||||
*/
|
||||
#include <stdint.h>
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "board.h"
|
||||
#include "drv_uart.h"
|
||||
|
||||
#if defined(RT_USING_SDRAM) && defined(RT_USING_MEMHEAP_AS_HEAP)
|
||||
static struct rt_memheap system_heap;
|
||||
#endif
|
||||
|
||||
/* ARM PLL configuration for RUN mode */
|
||||
const clock_arm_pll_config_t armPllConfig = { .loopDivider = 100U };
|
||||
|
||||
/* SYS PLL configuration for RUN mode */
|
||||
const clock_sys_pll_config_t sysPllConfig = { .loopDivider = 1U };
|
||||
|
||||
/* USB1 PLL configuration for RUN mode */
|
||||
const clock_usb_pll_config_t usb1PllConfig = { .loopDivider = 0U };
|
||||
|
||||
static void BOARD_BootClockGate(void)
|
||||
{
|
||||
// /* Disable all unused peripheral clock */
|
||||
// CCM->CCGR0 = 0x00C0000FU;
|
||||
// CCM->CCGR1 = 0x30000000U;
|
||||
// CCM->CCGR2 = 0x003F0030U;
|
||||
// CCM->CCGR3 = 0xF0000330U;
|
||||
// CCM->CCGR4 = 0x0000FF3CU;
|
||||
// CCM->CCGR5 = 0xF000330FU;
|
||||
// CCM->CCGR6 = 0x00FC0300U;
|
||||
}
|
||||
|
||||
static void BOARD_BootClockRUN(void)
|
||||
{
|
||||
/* Boot ROM did initialize the XTAL, here we only sets external XTAL OSC freq */
|
||||
CLOCK_SetXtalFreq(24000000U);
|
||||
CLOCK_SetRtcXtalFreq(32768U);
|
||||
|
||||
CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0x1); /* Set PERIPH_CLK2 MUX to OSC */
|
||||
CLOCK_SetMux(kCLOCK_PeriphMux, 0x1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
|
||||
|
||||
/* Setting the VDD_SOC to 1.5V. It is necessary to config AHB to 600Mhz */
|
||||
DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12);
|
||||
|
||||
CLOCK_InitArmPll(&armPllConfig); /* Configure ARM PLL to 1200M */
|
||||
#ifndef SKIP_SYSCLK_INIT
|
||||
CLOCK_InitSysPll(&sysPllConfig); /* Configure SYS PLL to 528M */
|
||||
#endif
|
||||
#ifndef SKIP_USB_PLL_INIT
|
||||
CLOCK_InitUsb1Pll(&usb1PllConfig); /* Configure USB1 PLL to 480M */
|
||||
#endif
|
||||
CLOCK_SetDiv(kCLOCK_ArmDiv, 0x1); /* Set ARM PODF to 0, divide by 2 */
|
||||
CLOCK_SetDiv(kCLOCK_AhbDiv, 0x0); /* Set AHB PODF to 0, divide by 1 */
|
||||
CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3); /* Set IPG PODF to 3, divede by 4 */
|
||||
|
||||
CLOCK_SetMux(kCLOCK_PrePeriphMux, 0x3); /* Set PRE_PERIPH_CLK to PLL1, 1200M */
|
||||
CLOCK_SetMux(kCLOCK_PeriphMux, 0x0); /* Set PERIPH_CLK MUX to PRE_PERIPH_CLK */
|
||||
|
||||
/* Disable unused clock */
|
||||
BOARD_BootClockGate();
|
||||
|
||||
/* Power down all unused PLL */
|
||||
CLOCK_DeinitAudioPll();
|
||||
CLOCK_DeinitVideoPll();
|
||||
CLOCK_DeinitEnetPll();
|
||||
CLOCK_DeinitUsb2Pll();
|
||||
|
||||
/* iomuxc clock (iomuxc_clk_enable): 0x03u */
|
||||
CLOCK_EnableClock(kCLOCK_Iomuxc);
|
||||
|
||||
/* Update core clock */
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
|
||||
/* MPU configuration. */
|
||||
static void BOARD_ConfigMPU(void)
|
||||
{
|
||||
/* Disable I cache and D cache */
|
||||
SCB_DisableICache();
|
||||
SCB_DisableDCache();
|
||||
|
||||
/* Disable MPU */
|
||||
ARM_MPU_Disable();
|
||||
|
||||
/* Region 0 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(0, 0xC0000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
|
||||
|
||||
/* Region 1 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
|
||||
|
||||
/* Region 2 setting */
|
||||
// spi flash: normal type, cacheable, no bufferable, no shareable
|
||||
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 0, 0, ARM_MPU_REGION_SIZE_512MB);
|
||||
|
||||
/* Region 3 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(3, 0x00000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
|
||||
|
||||
/* Region 4 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
|
||||
|
||||
/* Region 5 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(5, 0x20000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
|
||||
|
||||
/* Region 6 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(6, 0x20200000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_256KB);
|
||||
|
||||
#if defined(SDRAM_MPU_INIT)
|
||||
/* Region 7 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB);
|
||||
|
||||
/* Region 8 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(8, 0x81E00000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 1, 0, 0, 0, ARM_MPU_REGION_SIZE_2MB);
|
||||
#endif
|
||||
|
||||
/* Enable MPU */
|
||||
ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
|
||||
|
||||
/* Enable I cache and D cache */
|
||||
SCB_EnableDCache();
|
||||
SCB_EnableICache();
|
||||
}
|
||||
|
||||
/**
|
||||
* This is the timer interrupt service routine.
|
||||
*
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void SystemInitHook(void)
|
||||
{
|
||||
BOARD_ConfigMPU();
|
||||
|
||||
#if defined(RT_USING_SDRAM)
|
||||
extern int imxrt_sdram_init(void);
|
||||
imxrt_sdram_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will initial rt1050 board.
|
||||
*/
|
||||
void rt_hw_board_init()
|
||||
{
|
||||
BOARD_BootClockRUN();
|
||||
|
||||
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_CONSOLE
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
|
||||
#if defined(RT_USING_SDRAM) && defined(RT_USING_MEMHEAP_AS_HEAP)
|
||||
rt_kprintf("sdram heap, begin: 0x%p, end: 0x%p\n", SDRAM_BEGIN, SDRAM_END);
|
||||
rt_system_heap_init((void *)SDRAM_BEGIN, (void *)SDRAM_END);
|
||||
|
||||
rt_kprintf("sram heap, begin: 0x%p, end: 0x%p\n", HEAP_BEGIN, HEAP_END);
|
||||
rt_memheap_init(&system_heap, "sram", (void *)HEAP_BEGIN, HEAP_SIZE);
|
||||
#else
|
||||
rt_kprintf("sram heap, begin: 0x%p, end: 0x%p\n", HEAP_BEGIN, HEAP_END);
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* File : board.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-09-22 Bernard add board.h to this bsp
|
||||
*/
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <fsl_common.h>
|
||||
#include <fsl_lpuart.h>
|
||||
#include <fsl_iomuxc.h>
|
||||
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RTT_HEAP$$ZI$$Base;
|
||||
extern int Image$$RTT_HEAP$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RTT_HEAP$$ZI$$Base)
|
||||
#define HEAP_END (&Image$$RTT_HEAP$$ZI$$Limit)
|
||||
|
||||
#elif __ICCARM__
|
||||
#pragma section="HEAP"
|
||||
#define HEAP_BEGIN (__segment_end("HEAP"))
|
||||
extern void __RTT_HEAP_END;
|
||||
#define HEAP_END (&__RTT_HEAP_END)
|
||||
|
||||
#else
|
||||
extern int heap_start;
|
||||
extern int heap_end;
|
||||
#define HEAP_BEGIN (&heap_start)
|
||||
#define HEAP_END (&heap_end)
|
||||
#endif
|
||||
|
||||
#define HEAP_SIZE ((uint32_t)HEAP_END - (uint32_t)HEAP_BEGIN)
|
||||
|
||||
#define SDRAM_MPU_INIT
|
||||
#define SDRAM_BEGIN (0x80000000u)
|
||||
#define SDRAM_END (0x81E00000u)
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
//*** <<< end of configuration section >>> ***
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
/*
|
||||
* Copyright 2017 NXP
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
FUNC void Setup (void) {
|
||||
|
||||
SP = _RDWORD(0x60002000); // Setup Stack Pointer
|
||||
PC = _RDWORD(0x60002004); // Setup Program Counter
|
||||
_WDWORD(0xE000ED08, 0x60002000); // Setup Vector Table Offset Register
|
||||
}
|
||||
|
||||
FUNC void OnResetExec (void) { // executes upon software RESET
|
||||
Setup(); // Setup for Running
|
||||
}
|
||||
|
||||
LOAD %L INCREMENTAL // Download
|
||||
|
||||
Setup(); // Setup for Running
|
||||
|
||||
// g, main
|
||||
|
|
@ -0,0 +1,276 @@
|
|||
/*
|
||||
** ###################################################################
|
||||
** Processors: MIMXRT1052CVL5A
|
||||
** MIMXRT1052DVL6A
|
||||
**
|
||||
** Compiler: GNU C Compiler
|
||||
** Reference manual: IMXRT1050RM Rev.C, 08/2017
|
||||
** Version: rev. 0.1, 2017-01-10
|
||||
** Build: b170927
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the GNU C Compiler
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2017 NXP
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
**
|
||||
** 1. Redistributions of source code must retain the above copyright notice, this list
|
||||
** of conditions and the following disclaimer.
|
||||
**
|
||||
** 2. Redistributions in binary form must reproduce the above copyright notice, this
|
||||
** list of conditions and the following disclaimer in the documentation and/or
|
||||
** other materials provided with the distribution.
|
||||
**
|
||||
** 3. Neither the name of the copyright holder nor the names of its
|
||||
** contributors may be used to endorse or promote products derived from this
|
||||
** software without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
|
||||
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
m_boot_data (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000
|
||||
m_image_vertor_table (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000
|
||||
|
||||
m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400
|
||||
m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x1F7FDC00
|
||||
|
||||
m_itcm (RW) : ORIGIN = 0x00000000, LENGTH = 0x00020000
|
||||
m_dtcm (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
|
||||
m_ocram (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000
|
||||
|
||||
m_sdram (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000
|
||||
m_nocache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
.boot_data :
|
||||
{
|
||||
KEEP(*(.boot_hdr.conf))
|
||||
} > m_boot_data
|
||||
|
||||
.image_vertor_table :
|
||||
{
|
||||
KEEP(*(.boot_hdr.ivt))
|
||||
KEEP(*(.boot_hdr.boot_data))
|
||||
KEEP(*(.boot_hdr.dcd_data))
|
||||
} > m_image_vertor_table
|
||||
|
||||
/* The startup code goes first into internal RAM */
|
||||
.interrupts :
|
||||
{
|
||||
__VECTOR_TABLE = .;
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} > m_interrupts
|
||||
|
||||
__VECTOR_RAM = __VECTOR_TABLE;
|
||||
__RAM_VECTOR_TABLE_SIZE_BYTES = 0x0;
|
||||
|
||||
/* The program code and other data goes into internal RAM */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
. = ALIGN(4);
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
} > m_text
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > m_text
|
||||
|
||||
.ARM :
|
||||
{
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} > m_text
|
||||
|
||||
.ctors :
|
||||
{
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
/* __CTOR_LIST__ = .; */
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*crtbegin?.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
from the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
/* __CTOR_END__ = .; */
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
} > m_text
|
||||
|
||||
.dtors :
|
||||
{
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
/* __DTOR_LIST__ = .; */
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*crtbegin?.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
/* __DTOR_END__ = .; */
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
} > m_text
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} > m_text
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} > m_text
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} > m_text
|
||||
|
||||
__etext = .; /* define a global symbol at end of code */
|
||||
__DATA_ROM = .; /* Symbol is used by startup for data initialization */
|
||||
|
||||
.data : AT(__DATA_ROM)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__DATA_RAM = .;
|
||||
__data_start__ = .; /* create a global symbol at data start */
|
||||
*(m_usb_dma_init_data)
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
__data_end__ = .; /* define a global symbol at data end */
|
||||
} > m_dtcm
|
||||
|
||||
__NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
|
||||
.ncache.init : AT(__NDATA_ROM)
|
||||
{
|
||||
__noncachedata_start__ = .; /* create a global symbol at ncache data start */
|
||||
*(NonCacheable.init)
|
||||
. = ALIGN(4);
|
||||
__noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */
|
||||
} > m_nocache
|
||||
. = __noncachedata_init_end__;
|
||||
.ncache :
|
||||
{
|
||||
*(NonCacheable)
|
||||
. = ALIGN(4);
|
||||
__noncachedata_end__ = .; /* define a global symbol at ncache data end */
|
||||
} > m_nocache
|
||||
|
||||
__DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
|
||||
text_end = ORIGIN(m_text) + LENGTH(m_text);
|
||||
ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
|
||||
|
||||
/* Uninitialized data section */
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
. = ALIGN(4);
|
||||
__START_BSS = .;
|
||||
__bss_start__ = .;
|
||||
*(m_usb_dma_noninit_data)
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
__END_BSS = .;
|
||||
} > m_dtcm
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
stack_start = .;
|
||||
. += STACK_SIZE;
|
||||
stack_end = .;
|
||||
__StackTop = .;
|
||||
} > m_dtcm
|
||||
|
||||
.RTT_HEAP :
|
||||
{
|
||||
heap_start = .;
|
||||
. = ALIGN(8);
|
||||
} > m_dtcm
|
||||
|
||||
PROVIDE(heap_end = ORIGIN(m_dtcm) + LENGTH(m_dtcm));
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
#! armcc -E
|
||||
/*
|
||||
** ###################################################################
|
||||
** Processors: MIMXRT1052CVL5A
|
||||
** MIMXRT1052DVL6A
|
||||
**
|
||||
** Compiler: Keil ARM C/C++ Compiler
|
||||
** Reference manual: IMXRT1050RM Rev.C, 08/2017
|
||||
** Version: rev. 0.1, 2017-01-10
|
||||
** Build: b170927
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the Keil ARM C/C++ Compiler
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2017 NXP
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
**
|
||||
** 1. Redistributions of source code must retain the above copyright notice, this list
|
||||
** of conditions and the following disclaimer.
|
||||
**
|
||||
** 2. Redistributions in binary form must reproduce the above copyright notice, this
|
||||
** list of conditions and the following disclaimer in the documentation and/or
|
||||
** other materials provided with the distribution.
|
||||
**
|
||||
** 3. Neither the name of the copyright holder nor the names of its
|
||||
** contributors may be used to endorse or promote products derived from this
|
||||
** software without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
#define m_flash_config_start 0x60000000
|
||||
#define m_flash_config_size 0x00001000
|
||||
|
||||
#define m_ivt_start 0x60001000
|
||||
#define m_ivt_size 0x00001000
|
||||
|
||||
#define m_text_start 0x60002000
|
||||
#define m_text_size 0x1F7FE000
|
||||
|
||||
#define m_data_start 0x20000000
|
||||
#define m_data_size 0x00020000
|
||||
|
||||
#define m_ncache_start 0x81E00000
|
||||
#define m_ncache_size 0x00200000
|
||||
|
||||
/* Sizes */
|
||||
#if (defined(__stack_size__))
|
||||
#define Stack_Size __stack_size__
|
||||
#else
|
||||
#define Stack_Size 0x1000
|
||||
#endif
|
||||
|
||||
#if (defined(__heap_size__))
|
||||
#define Heap_Size __heap_size__
|
||||
#else
|
||||
#define Heap_Size 0x0400
|
||||
#endif
|
||||
|
||||
#include "rtconfig.h"
|
||||
|
||||
#if (defined(BOARD_USING_HYPERFLASH))
|
||||
LR_m_rom_config m_flash_config_start m_flash_config_size ; load region size_region
|
||||
{
|
||||
RW_m_config_text m_flash_config_start m_flash_config_size ; load address = execution address
|
||||
{
|
||||
* (.boot_hdr.conf, +FIRST)
|
||||
}
|
||||
}
|
||||
|
||||
LR_m_rom_ivt m_ivt_start m_ivt_size ; load region size_region
|
||||
{
|
||||
RW_m_ivt_text m_ivt_start m_ivt_size ; load address = execution address
|
||||
{
|
||||
* (.boot_hdr.ivt, +FIRST)
|
||||
* (.boot_hdr.boot_data)
|
||||
* (.boot_hdr.dcd_data)
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#define RTT_HEAP_SIZE (m_data_size-ImageLength(RW_m_data)-ImageLength(ARM_LIB_HEAP)-ImageLength(ARM_LIB_STACK))
|
||||
|
||||
; load region size_region
|
||||
LR_IROM1 m_text_start m_text_size
|
||||
{
|
||||
ER_IROM1 m_text_start m_text_size ; load address = execution address
|
||||
{
|
||||
* (RESET,+FIRST)
|
||||
* (InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size ; RW data
|
||||
{
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP +0 EMPTY Heap_Size{} ; Heap region growing up
|
||||
ARM_LIB_STACK +0 EMPTY Stack_Size{} ; Stack region growing down
|
||||
RTT_HEAP +0 EMPTY RTT_HEAP_SIZE{}
|
||||
|
||||
; ncache RW data
|
||||
RW_m_ncache m_ncache_start m_ncache_size
|
||||
{
|
||||
* (NonCacheable.init)
|
||||
* (NonCacheable)
|
||||
}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,10 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\project.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,232 @@
|
|||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_IDEL_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
#define RT_DEBUG
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_USING_MEMHEAP_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define ARCH_ARM
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_FPU
|
||||
#define ARCH_ARM_CORTEX_M7
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
|
||||
/* C++ features */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
#define FINSH_USING_MSH_ONLY
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FILESYSTEMS_MAX 2
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 2
|
||||
#define DFS_FD_MAX 16
|
||||
#define RT_USING_DFS_ELMFAT
|
||||
|
||||
/* elm-chan's FatFs, Generic FAT Filesystem Module */
|
||||
|
||||
#define RT_DFS_ELM_CODE_PAGE 437
|
||||
#define RT_DFS_ELM_WORD_ACCESS
|
||||
#define RT_DFS_ELM_USE_LFN_3
|
||||
#define RT_DFS_ELM_USE_LFN 3
|
||||
#define RT_DFS_ELM_MAX_LFN 255
|
||||
#define RT_DFS_ELM_DRIVES 2
|
||||
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
|
||||
#define RT_DFS_ELM_REENTRANT
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_CPUTIME
|
||||
#define RT_USING_CPUTIME_CORTEXM
|
||||
#define RT_USING_I2C
|
||||
#define RT_USING_I2C_BITOPS
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_RTC
|
||||
#define RT_USING_SDIO
|
||||
#define RT_SDIO_STACK_SIZE 512
|
||||
#define RT_SDIO_THREAD_PRIORITY 15
|
||||
#define RT_MMCSD_STACK_SIZE 1024
|
||||
#define RT_MMCSD_THREAD_PREORITY 22
|
||||
#define RT_MMCSD_MAX_PARTITION 16
|
||||
#define RT_USING_SPI
|
||||
|
||||
/* Using WiFi */
|
||||
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
|
||||
/* Network */
|
||||
|
||||
/* Socket abstraction layer */
|
||||
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
|
||||
/* Modbus master and slave stack */
|
||||
|
||||
|
||||
/* AT commands */
|
||||
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* ARM CMSIS */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
|
||||
/* sample package */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* example package: hello */
|
||||
|
||||
#define SOC_IMXRT1052
|
||||
#define BOARD_RT1050_ArchMix
|
||||
#define BOARD_USING_QSPIFLASH
|
||||
|
||||
/* RT1050 Bsp Config */
|
||||
|
||||
/* Select uart drivers */
|
||||
|
||||
#define RT_USING_UART1
|
||||
|
||||
/* Select spi bus and dev drivers */
|
||||
|
||||
#define LPSPI_CLK_SOURCE_FROM_PLL3PFD1
|
||||
#define LPSPI_CLK_SOURCE 0
|
||||
#define LPSPI_CLK_SOURCE_DIVIDER 8
|
||||
#define RT_USING_SPIBUS4
|
||||
#define LPSPI4_SCK_GPIO_2
|
||||
#define LPSPI4_SDO_GPIO_2
|
||||
#define LPSPI4_SDI_GPIO_2
|
||||
|
||||
/* Select iic bus drivers */
|
||||
|
||||
#define RT_USING_HW_I2C1
|
||||
#define HW_I2C1_BADURATE_100kHZ
|
||||
|
||||
/* Select lcd driver */
|
||||
|
||||
/* Notice: Arch Mix Board para: 480*272 4 4 8 2 40 10 127 45 */
|
||||
|
||||
#define RT_USING_LCD
|
||||
#define LCD_WIDTH 480
|
||||
#define LCD_HEIGHT 272
|
||||
#define LCD_HFP 4
|
||||
#define LCD_VFP 4
|
||||
#define LCD_HBP 8
|
||||
#define LCD_VBP 2
|
||||
#define LCD_HSW 40
|
||||
#define LCD_VSW 10
|
||||
#define LCD_BL_PIN 127
|
||||
#define LCD_RST_PIN 45
|
||||
#define RT_USING_SDRAM
|
||||
#define RT_USING_RTC_HP
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,144 @@
|
|||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m7'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = '/usr/local/Cellar/arm-none-eabi-gcc/7-2017-q4-major/gcc/bin/'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = 'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iar'
|
||||
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
#BUILD = 'debug'
|
||||
BUILD = 'release'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
STRIP = PREFIX + 'strip'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -std=c99 -Wall -D__FPU_PRESENT -eentry'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb -D__START=entry'
|
||||
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread-imxrt-gcc.map,-cref,-u,Reset_Handler -T flexspi_nor.ld'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -gdwarf-2'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
CFLAGS += ' -O0'
|
||||
else:
|
||||
CFLAGS += ' -O2 -Os'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary --remove-section=.boot_data --remove-section=.image_vertor_table --remove-section=.ncache $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
# module setting
|
||||
CXXFLAGS = ' -Woverloaded-virtual -fno-exceptions -fno-rtti '
|
||||
M_CFLAGS = CFLAGS + ' -mlong-calls -fPIC '
|
||||
M_CXXFLAGS = CXXFLAGS + ' -mlong-calls -fPIC'
|
||||
M_LFLAGS = DEVICE + CXXFLAGS + ' -Wl,--gc-sections,-z,max-page-size=0x4' +\
|
||||
' -shared -fPIC -nostartfiles -static-libgcc'
|
||||
M_POST_ACTION = STRIP + ' -R .hash $TARGET\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M7.fp.sp'
|
||||
CFLAGS = DEVICE + ' --apcs=interwork'
|
||||
AFLAGS = DEVICE
|
||||
LFLAGS = DEVICE + ' --libpath "' + EXEC_PATH + '\ARM\ARMCC\lib" --info sizes --info totals --info unused --info veneers --list rtthread-imxrt-mdk.map --scatter ./Libraries/arm/MIMXRT1052xxxxx_flexspi_nor.scf'
|
||||
|
||||
CFLAGS += ' --diag_suppress=66,1296,186'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
|
||||
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
|
||||
|
||||
EXEC_PATH += '/arm/bin40/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' --c99'
|
||||
|
||||
POST_ACTION = 'fromelf -z $TARGET'
|
||||
# POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iar':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = ' -D__FPU_PRESENT'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M7'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=None'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' -Ol'
|
||||
CFLAGS += ' --use_c++_inline'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
AFLAGS = ''
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M7'
|
||||
AFLAGS += ' --fpu None'
|
||||
|
||||
LFLAGS = ' --config flexspi_nor.icf'
|
||||
LFLAGS += ' --redirect _Printf=_PrintfTiny'
|
||||
LFLAGS += ' --redirect _Scanf=_ScanfSmall'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = ''
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,184 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>RT-Thread IMXRT1052</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>8</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<nTsel>2</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile>.\flexspi_nor.ini</tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST1 -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_HYPER_256KB_SEC.FLM -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\MIMXRT105x_HYPER_256KB_SEC.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>CMSIS_AGDI</Key>
|
||||
<Name>-X"" -O974 -S0 -C0 -P00 -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_HYPER_256KB_SEC.FLM -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\MIMXRT105x_HYPER_256KB_SEC.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_HYPER_256KB_SEC -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\MIMXRT105x_HYPER_256KB_SEC.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>1</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
|
|
@ -0,0 +1,399 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>RT-Thread IMXRT1052</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>MIMXRT1052:M7</Device>
|
||||
<Vendor>NXP</Vendor>
|
||||
<PackID>NXP.iMXRT_DFP.1.0.2</PackID>
|
||||
<PackURL>http://mcuxpresso.nxp.com/cmsis_pack/repo/</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x00060000) IRAM2(0x00000000,0x00020000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0RT1050 -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\RT1050.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:MIMXRT1052$Device\Include\MIMXRT1052.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:MIMXRT1052$SVD\MIMXRT1052.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\build\</OutputDirectory>
|
||||
<OutputName>rtthread-imxrt</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin !L --output rtthread-mdk.bin</UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM7</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> -MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4099</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M7"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>0</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<hadIRAM2>1</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>0</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>0</RoSelD>
|
||||
<RwSelD>4</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>0</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x60000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x60000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>3</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls>--library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186</MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x10000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\flexspi_nor.scf</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.1.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="RT-Thread IMXRT1052"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
if GetDepend('BOARD_USING_HYPERFLASH'):
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
if rtconfig.CROSS_TOOL == 'keil':
|
||||
LINKFLAGS = '--keep=*(.boot_hdr.ivt)'
|
||||
LINKFLAGS += '--keep=*(.boot_hdr.boot_data)'
|
||||
LINKFLAGS += '--keep=*(.boot_hdr.dcd_data)'
|
||||
LINKFLAGS += '--keep=*(.boot_hdr.conf)'
|
||||
else:
|
||||
LINKFLAGS = ''
|
||||
|
||||
group = DefineGroup('xip', src, depend = [''], CPPPATH = CPPPATH, LINKFLAGS = LINKFLAGS)
|
||||
Return('group')
|
||||
|
||||
if GetDepend('BOARD_USING_QSPIFLASH'):
|
||||
group = []
|
||||
Return('group')
|
||||
|
|
@ -0,0 +1,139 @@
|
|||
/*
|
||||
* The Clear BSD License
|
||||
* Copyright 2017 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted (subject to the limitations in the disclaimer below) provided
|
||||
* that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "fsl_flexspi_nor_boot.h"
|
||||
|
||||
#if defined(__CC_ARM) || defined(__GNUC__)
|
||||
__attribute__((section(".boot_hdr.ivt")))
|
||||
#elif defined(__ICCARM__)
|
||||
#pragma location=".boot_hdr.ivt"
|
||||
#endif
|
||||
|
||||
const ivt image_vector_table = {
|
||||
IVT_HEADER, /* IVT Header */
|
||||
0x60002000, /* Image Entry Function */
|
||||
IVT_RSVD, /* Reserved = 0 */
|
||||
(uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */
|
||||
(uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */
|
||||
(uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */
|
||||
(uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */
|
||||
IVT_RSVD /* Reserved = 0 */
|
||||
};
|
||||
|
||||
#if defined(__CC_ARM) || defined(__GNUC__)
|
||||
__attribute__((section(".boot_hdr.boot_data")))
|
||||
#elif defined(__ICCARM__)
|
||||
#pragma location=".boot_hdr.boot_data"
|
||||
#endif
|
||||
|
||||
const BOOT_DATA_T boot_data = {
|
||||
FLASH_BASE, /* boot start location */
|
||||
(FLASH_END-FLASH_BASE), /* size */
|
||||
PLUGIN_FLAG, /* Plugin flag*/
|
||||
0xFFFFFFFF /* empty - extra data word */
|
||||
};
|
||||
|
||||
#if defined(__CC_ARM) || defined(__GNUC__)
|
||||
__attribute__((section(".boot_hdr.dcd_data")))
|
||||
#elif defined(__ICCARM__)
|
||||
#pragma location=".boot_hdr.dcd_data"
|
||||
#endif
|
||||
const uint8_t dcd_sdram[1072] = {
|
||||
/*0000*/ 0xD2, 0x04, 0x30, 0x41, 0xCC, 0x03, 0xAC, 0x04, 0x40, 0x0F, 0xC0, 0x68, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
/*0010*/ 0x40, 0x0F, 0xC0, 0x6C, 0xFF, 0xFF, 0xFF, 0xFF, 0x40, 0x0F, 0xC0, 0x70, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
/*0020*/ 0x40, 0x0F, 0xC0, 0x74, 0xFF, 0xFF, 0xFF, 0xFF, 0x40, 0x0F, 0xC0, 0x78, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
/*0030*/ 0x40, 0x0F, 0xC0, 0x7C, 0xFF, 0xFF, 0xFF, 0xFF, 0x40, 0x0F, 0xC0, 0x80, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
/*0040*/ 0x40, 0x0D, 0x80, 0x30, 0x00, 0x00, 0x20, 0x01, 0x40, 0x0D, 0x81, 0x00, 0x00, 0x1D, 0x00, 0x00,
|
||||
/*0050*/ 0x40, 0x0F, 0xC0, 0x14, 0x00, 0x01, 0x0D, 0x40, 0x40, 0x1F, 0x80, 0x14, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0060*/ 0x40, 0x1F, 0x80, 0x18, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x1C, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0070*/ 0x40, 0x1F, 0x80, 0x20, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x24, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0080*/ 0x40, 0x1F, 0x80, 0x28, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x2C, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0090*/ 0x40, 0x1F, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x34, 0x00, 0x00, 0x00, 0x00,
|
||||
/*00a0*/ 0x40, 0x1F, 0x80, 0x38, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x3C, 0x00, 0x00, 0x00, 0x00,
|
||||
/*00b0*/ 0x40, 0x1F, 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x44, 0x00, 0x00, 0x00, 0x00,
|
||||
/*00c0*/ 0x40, 0x1F, 0x80, 0x48, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x4C, 0x00, 0x00, 0x00, 0x00,
|
||||
/*00d0*/ 0x40, 0x1F, 0x80, 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x54, 0x00, 0x00, 0x00, 0x00,
|
||||
/*00e0*/ 0x40, 0x1F, 0x80, 0x58, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x5C, 0x00, 0x00, 0x00, 0x00,
|
||||
/*00f0*/ 0x40, 0x1F, 0x80, 0x60, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x64, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0100*/ 0x40, 0x1F, 0x80, 0x68, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x6C, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0110*/ 0x40, 0x1F, 0x80, 0x70, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x74, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0120*/ 0x40, 0x1F, 0x80, 0x78, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x7C, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0130*/ 0x40, 0x1F, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x84, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0140*/ 0x40, 0x1F, 0x80, 0x88, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x8C, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0150*/ 0x40, 0x1F, 0x80, 0x90, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x94, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0160*/ 0x40, 0x1F, 0x80, 0x98, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x9C, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0170*/ 0x40, 0x1F, 0x80, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0xA4, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0180*/ 0x40, 0x1F, 0x80, 0xA8, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0xAC, 0x00, 0x00, 0x00, 0x00,
|
||||
/*0190*/ 0x40, 0x1F, 0x80, 0xB0, 0x00, 0x00, 0x00, 0x10, 0x40, 0x1F, 0x80, 0xB4, 0x00, 0x00, 0x00, 0x00,
|
||||
/*01a0*/ 0x40, 0x1F, 0x80, 0xB8, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x82, 0x04, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*01b0*/ 0x40, 0x1F, 0x82, 0x08, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x0C, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*01c0*/ 0x40, 0x1F, 0x82, 0x10, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x14, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*01d0*/ 0x40, 0x1F, 0x82, 0x18, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x1C, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*01e0*/ 0x40, 0x1F, 0x82, 0x20, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x24, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*01f0*/ 0x40, 0x1F, 0x82, 0x28, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x2C, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*0200*/ 0x40, 0x1F, 0x82, 0x30, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x34, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*0210*/ 0x40, 0x1F, 0x82, 0x38, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x3C, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*0220*/ 0x40, 0x1F, 0x82, 0x40, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x44, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*0230*/ 0x40, 0x1F, 0x82, 0x48, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x4C, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*0240*/ 0x40, 0x1F, 0x82, 0x50, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x54, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*0250*/ 0x40, 0x1F, 0x82, 0x58, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x5C, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*0260*/ 0x40, 0x1F, 0x82, 0x60, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x64, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*0270*/ 0x40, 0x1F, 0x82, 0x68, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x6C, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*0280*/ 0x40, 0x1F, 0x82, 0x70, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x74, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*0290*/ 0x40, 0x1F, 0x82, 0x78, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x7C, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*02a0*/ 0x40, 0x1F, 0x82, 0x80, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x84, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*02b0*/ 0x40, 0x1F, 0x82, 0x88, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x8C, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*02c0*/ 0x40, 0x1F, 0x82, 0x90, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x94, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*02d0*/ 0x40, 0x1F, 0x82, 0x98, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0x9C, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*02e0*/ 0x40, 0x1F, 0x82, 0xA0, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x1F, 0x82, 0xA4, 0x00, 0x01, 0x10, 0xF9,
|
||||
/*02f0*/ 0x40, 0x1F, 0x82, 0xA8, 0x00, 0x01, 0x10, 0xF9, 0x40, 0x2F, 0x00, 0x00, 0x10, 0x00, 0x00, 0x04,
|
||||
/*0300*/ 0x40, 0x2F, 0x00, 0x08, 0x00, 0x03, 0x05, 0x24, 0x40, 0x2F, 0x00, 0x0C, 0x06, 0x03, 0x05, 0x24,
|
||||
/*0310*/ 0x40, 0x2F, 0x00, 0x10, 0x80, 0x00, 0x00, 0x1B, 0x40, 0x2F, 0x00, 0x14, 0x82, 0x00, 0x00, 0x1B,
|
||||
/*0320*/ 0x40, 0x2F, 0x00, 0x18, 0x84, 0x00, 0x00, 0x1B, 0x40, 0x2F, 0x00, 0x1C, 0x86, 0x00, 0x00, 0x1B,
|
||||
/*0330*/ 0x40, 0x2F, 0x00, 0x20, 0x90, 0x00, 0x00, 0x21, 0x40, 0x2F, 0x00, 0x24, 0xA0, 0x00, 0x00, 0x19,
|
||||
/*0340*/ 0x40, 0x2F, 0x00, 0x28, 0xA8, 0x00, 0x00, 0x17, 0x40, 0x2F, 0x00, 0x2C, 0xA9, 0x00, 0x00, 0x1B,
|
||||
/*0350*/ 0x40, 0x2F, 0x00, 0x30, 0x00, 0x00, 0x00, 0x21, 0x40, 0x2F, 0x00, 0x04, 0x00, 0x00, 0x79, 0xA8,
|
||||
/*0360*/ 0x40, 0x2F, 0x00, 0x40, 0x00, 0x00, 0x0F, 0x31, 0x40, 0x2F, 0x00, 0x44, 0x00, 0x65, 0x29, 0x22,
|
||||
/*0370*/ 0x40, 0x2F, 0x00, 0x48, 0x00, 0x01, 0x09, 0x20, 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x08,
|
||||
/*0380*/ 0x40, 0x2F, 0x00, 0x80, 0x00, 0x00, 0x00, 0x21, 0x40, 0x2F, 0x00, 0x84, 0x00, 0x88, 0x88, 0x88,
|
||||
/*0390*/ 0x40, 0x2F, 0x00, 0x94, 0x00, 0x00, 0x00, 0x02, 0x40, 0x2F, 0x00, 0x98, 0x00, 0x00, 0x00, 0x00,
|
||||
/*03a0*/ 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0F,
|
||||
/*03b0*/ 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0xCC, 0x00, 0x14, 0x04,
|
||||
/*03c0*/ 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C,
|
||||
/*03d0*/ 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0xCC, 0x00, 0x14, 0x04,
|
||||
/*03e0*/ 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C,
|
||||
/*03f0*/ 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0xCC, 0x00, 0x1C, 0x04,
|
||||
/*0400*/ 0x40, 0x2F, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x33, 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00,
|
||||
/*0410*/ 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0A, 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C,
|
||||
/*0420*/ 0x00, 0x00, 0x00, 0x01, 0xCC, 0x00, 0x0C, 0x04, 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x09,
|
||||
};
|
||||
|
|
@ -0,0 +1,118 @@
|
|||
/*
|
||||
* The Clear BSD License
|
||||
* Copyright 2017 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted (subject to the limitations in the disclaimer below) provided
|
||||
* that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _QUADSPI_BOOT_H_
|
||||
#define _QUADSPI_BOOT_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*************************************
|
||||
* IVT Data
|
||||
*************************************/
|
||||
typedef struct _ivt_ {
|
||||
/** @ref hdr with tag #HAB_TAG_IVT, length and HAB version fields
|
||||
* (see @ref data)
|
||||
*/
|
||||
uint32_t hdr;
|
||||
/** Absolute address of the first instruction to execute from the
|
||||
* image
|
||||
*/
|
||||
uint32_t entry;
|
||||
/** Reserved in this version of HAB: should be NULL. */
|
||||
uint32_t reserved1;
|
||||
/** Absolute address of the image DCD: may be NULL. */
|
||||
uint32_t dcd;
|
||||
/** Absolute address of the Boot Data: may be NULL, but not interpreted
|
||||
* any further by HAB
|
||||
*/
|
||||
uint32_t boot_data;
|
||||
/** Absolute address of the IVT.*/
|
||||
uint32_t self;
|
||||
/** Absolute address of the image CSF.*/
|
||||
uint32_t csf;
|
||||
/** Reserved in this version of HAB: should be zero. */
|
||||
uint32_t reserved2;
|
||||
} ivt;
|
||||
|
||||
#define IVT_MAJOR_VERSION 0x4
|
||||
#define IVT_MAJOR_VERSION_SHIFT 0x4
|
||||
#define IVT_MAJOR_VERSION_MASK 0xF
|
||||
#define IVT_MINOR_VERSION 0x1
|
||||
#define IVT_MINOR_VERSION_SHIFT 0x0
|
||||
#define IVT_MINOR_VERSION_MASK 0xF
|
||||
|
||||
#define IVT_VERSION(major, minor) \
|
||||
((((major) & IVT_MAJOR_VERSION_MASK) << IVT_MAJOR_VERSION_SHIFT) | \
|
||||
(((minor) & IVT_MINOR_VERSION_MASK) << IVT_MINOR_VERSION_SHIFT))
|
||||
|
||||
#define IVT_TAG_HEADER (0xD1) /**< Image Vector Table */
|
||||
#define IVT_SIZE 0x2000
|
||||
#define IVT_PAR IVT_VERSION(IVT_MAJOR_VERSION, IVT_MINOR_VERSION)
|
||||
|
||||
#define IVT_HEADER (IVT_TAG_HEADER | (IVT_SIZE << 8) | (IVT_PAR << 24))
|
||||
#define IVT_RSVD (uint32_t)(0x00000000)
|
||||
|
||||
|
||||
/*************************************
|
||||
* Boot Data
|
||||
*************************************/
|
||||
typedef struct _boot_data_ {
|
||||
uint32_t start; /* boot start location */
|
||||
uint32_t size; /* size */
|
||||
uint32_t plugin; /* plugin flag - 1 if downloaded application is plugin */
|
||||
uint32_t placeholder; /* placehoder to make even 0x10 size */
|
||||
}BOOT_DATA_T;
|
||||
|
||||
|
||||
/*************************************
|
||||
* DCD Data
|
||||
*************************************/
|
||||
#define DCD_TAG_HEADER (0xD2)
|
||||
#define DCD_TAG_HEADER_SHIFT (24)
|
||||
#define DCD_VERSION (0x40)
|
||||
#define DCD_ARRAY_SIZE 1
|
||||
|
||||
#define FLASH_BASE 0x60000000
|
||||
#define FLASH_END 0x7F7FFFFF
|
||||
#define SCLK 1
|
||||
|
||||
#define DCD_ADDRESS dcd_sdram
|
||||
#define BOOT_DATA_ADDRESS &boot_data
|
||||
#define CSF_ADDRESS 0
|
||||
#define PLUGIN_FLAG (uint32_t)0
|
||||
|
||||
/* External Variables */
|
||||
extern const uint8_t dcd_sdram[1072];
|
||||
extern const BOOT_DATA_T boot_data;
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,76 @@
|
|||
/*
|
||||
* The Clear BSD License
|
||||
* Copyright 2017 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted (subject to the limitations in the disclaimer below) provided
|
||||
* that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "fsl_flexspi_nor_flash.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
#if defined(__CC_ARM) || defined(__GNUC__)
|
||||
__attribute__((section(".boot_hdr.conf")))
|
||||
#elif defined(__ICCARM__)
|
||||
#pragma location=".boot_hdr.conf"
|
||||
#endif
|
||||
|
||||
const flexspi_nor_config_t hyperflash_config =
|
||||
{
|
||||
.memConfig =
|
||||
{
|
||||
.tag = FLEXSPI_CFG_BLK_TAG,
|
||||
.version = FLEXSPI_CFG_BLK_VERSION,
|
||||
.readSampleClkSrc = kFlexSPIReadSampleClk_ExternalInputFromDqsPad,
|
||||
.csHoldTime = 3u,
|
||||
.csSetupTime = 3u,
|
||||
.columnAddressWidth = 3u,
|
||||
// Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
|
||||
.controllerMiscOption = (1u << kFlexSpiMiscOffset_DdrModeEnable) |
|
||||
(1u << kFlexSpiMiscOffset_WordAddressableEnable) |
|
||||
(1u << kFlexSpiMiscOffset_SafeConfigFreqEnable) |
|
||||
(1u << kFlexSpiMiscOffset_DiffClkEnable),
|
||||
.sflashPadType = kSerialFlash_8Pads,
|
||||
.serialClkFreq = kFlexSpiSerialClk_133MHz,
|
||||
.sflashA1Size = 64u * 1024u * 1024u,
|
||||
.dataValidTime = {16u, 16u},
|
||||
.lookupTable =
|
||||
{
|
||||
// Read LUTs
|
||||
FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
|
||||
FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06),
|
||||
FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
|
||||
},
|
||||
},
|
||||
.pageSize = 512u,
|
||||
.sectorSize = 256u * 1024u,
|
||||
.blockSize = 256u * 1024u,
|
||||
.isUniformBlockSize = true,
|
||||
};
|
||||
|
|
@ -0,0 +1,299 @@
|
|||
/*
|
||||
* The Clear BSD License
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2017 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification,
|
||||
* are permitted (subject to the limitations in the disclaimer below) provided
|
||||
* that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this
|
||||
* list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef __FLEXSPI_NOR_FLASH_H__
|
||||
#define __FLEXSPI_NOR_FLASH_H__
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "fsl_common.h"
|
||||
|
||||
/* FLEXSPI memory config block related defintions */
|
||||
#define FLEXSPI_CFG_BLK_TAG (0x42464346UL) // ascii "FCFB" Big Endian
|
||||
#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0
|
||||
#define FLEXSPI_CFG_BLK_SIZE (512)
|
||||
|
||||
/* FLEXSPI Feature related definitions */
|
||||
#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1
|
||||
|
||||
/* Lookup table related defintions */
|
||||
#define CMD_INDEX_READ 0
|
||||
#define CMD_INDEX_READSTATUS 1
|
||||
#define CMD_INDEX_WRITEENABLE 2
|
||||
#define CMD_INDEX_WRITE 4
|
||||
|
||||
#define CMD_LUT_SEQ_IDX_READ 0
|
||||
#define CMD_LUT_SEQ_IDX_READSTATUS 1
|
||||
#define CMD_LUT_SEQ_IDX_WRITEENABLE 3
|
||||
#define CMD_LUT_SEQ_IDX_WRITE 9
|
||||
|
||||
#define CMD_SDR 0x01
|
||||
#define CMD_DDR 0x21
|
||||
#define RADDR_SDR 0x02
|
||||
#define RADDR_DDR 0x22
|
||||
#define CADDR_SDR 0x03
|
||||
#define CADDR_DDR 0x23
|
||||
#define MODE1_SDR 0x04
|
||||
#define MODE1_DDR 0x24
|
||||
#define MODE2_SDR 0x05
|
||||
#define MODE2_DDR 0x25
|
||||
#define MODE4_SDR 0x06
|
||||
#define MODE4_DDR 0x26
|
||||
#define MODE8_SDR 0x07
|
||||
#define MODE8_DDR 0x27
|
||||
#define WRITE_SDR 0x08
|
||||
#define WRITE_DDR 0x28
|
||||
#define READ_SDR 0x09
|
||||
#define READ_DDR 0x29
|
||||
#define LEARN_SDR 0x0A
|
||||
#define LEARN_DDR 0x2A
|
||||
#define DATSZ_SDR 0x0B
|
||||
#define DATSZ_DDR 0x2B
|
||||
#define DUMMY_SDR 0x0C
|
||||
#define DUMMY_DDR 0x2C
|
||||
#define DUMMY_RWDS_SDR 0x0D
|
||||
#define DUMMY_RWDS_DDR 0x2D
|
||||
#define JMP_ON_CS 0x1F
|
||||
#define STOP 0
|
||||
|
||||
#define FLEXSPI_1PAD 0
|
||||
#define FLEXSPI_2PAD 1
|
||||
#define FLEXSPI_4PAD 2
|
||||
#define FLEXSPI_8PAD 3
|
||||
|
||||
#define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \
|
||||
(FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
|
||||
FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
|
||||
|
||||
//!@brief Definitions for FlexSPI Serial Clock Frequency
|
||||
typedef enum _FlexSpiSerialClockFreq
|
||||
{
|
||||
kFlexSpiSerialClk_30MHz = 1,
|
||||
kFlexSpiSerialClk_50MHz = 2,
|
||||
kFlexSpiSerialClk_60MHz = 3,
|
||||
kFlexSpiSerialClk_75MHz = 4,
|
||||
kFlexSpiSerialClk_80MHz = 5,
|
||||
kFlexSpiSerialClk_100MHz = 6,
|
||||
kFlexSpiSerialClk_133MHz = 7,
|
||||
kFlexSpiSerialClk_166MHz = 8,
|
||||
kFlexSpiSerialClk_200MHz = 9,
|
||||
} flexspi_serial_clk_freq_t;
|
||||
|
||||
//!@brief FlexSPI clock configuration type
|
||||
enum
|
||||
{
|
||||
kFlexSpiClk_SDR, //!< Clock configure for SDR mode
|
||||
kFlexSpiClk_DDR, //!< Clock configurat for DDR mode
|
||||
};
|
||||
|
||||
//!@brief FlexSPI Read Sample Clock Source definition
|
||||
typedef enum _FlashReadSampleClkSource
|
||||
{
|
||||
kFlexSPIReadSampleClk_LoopbackInternally = 0,
|
||||
kFlexSPIReadSampleClk_LoopbackFromDqsPad = 1,
|
||||
kFlexSPIReadSampleClk_LoopbackFromSckPad = 2,
|
||||
kFlexSPIReadSampleClk_ExternalInputFromDqsPad = 3,
|
||||
} flexspi_read_sample_clk_t;
|
||||
|
||||
|
||||
//!@brief Misc feature bit definitions
|
||||
enum
|
||||
{
|
||||
kFlexSpiMiscOffset_DiffClkEnable = 0, //!< Bit for Differential clock enable
|
||||
kFlexSpiMiscOffset_Ck2Enable = 1, //!< Bit for CK2 enable
|
||||
kFlexSpiMiscOffset_ParallelEnable = 2, //!< Bit for Parallel mode enable
|
||||
kFlexSpiMiscOffset_WordAddressableEnable = 3, //!< Bit for Word Addressable enable
|
||||
kFlexSpiMiscOffset_SafeConfigFreqEnable = 4, //!< Bit for Safe Configuration Frequency enable
|
||||
kFlexSpiMiscOffset_PadSettingOverrideEnable = 5, //!< Bit for Pad setting override enable
|
||||
kFlexSpiMiscOffset_DdrModeEnable = 6, //!< Bit for DDR clock confiuration indication.
|
||||
};
|
||||
|
||||
//!@brief Flash Type Definition
|
||||
enum
|
||||
{
|
||||
kFlexSpiDeviceType_SerialNOR = 1, //!< Flash devices are Serial NOR
|
||||
kFlexSpiDeviceType_SerialNAND = 2, //!< Flash devices are Serial NAND
|
||||
kFlexSpiDeviceType_SerialRAM = 3, //!< Flash devices are Serial RAM/HyperFLASH
|
||||
kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND
|
||||
kFlexSpiDeviceType_MCP_NOR_RAM = 0x13, //!< Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs
|
||||
};
|
||||
|
||||
//!@brief Flash Pad Definitions
|
||||
enum
|
||||
{
|
||||
kSerialFlash_1Pad = 1,
|
||||
kSerialFlash_2Pads = 2,
|
||||
kSerialFlash_4Pads = 4,
|
||||
kSerialFlash_8Pads = 8,
|
||||
};
|
||||
|
||||
//!@brief FlexSPI LUT Sequence structure
|
||||
typedef struct _lut_sequence
|
||||
{
|
||||
uint8_t seqNum; //!< Sequence Number, valid number: 1-16
|
||||
uint8_t seqId; //!< Sequence Index, valid number: 0-15
|
||||
uint16_t reserved;
|
||||
} flexspi_lut_seq_t;
|
||||
|
||||
//!@brief Flash Configuration Command Type
|
||||
enum
|
||||
{
|
||||
kDeviceConfigCmdType_Generic, //!< Generic command, for example: configure dummy cycles, drive strength, etc
|
||||
kDeviceConfigCmdType_QuadEnable, //!< Quad Enable command
|
||||
kDeviceConfigCmdType_Spi2Xpi, //!< Switch from SPI to DPI/QPI/OPI mode
|
||||
kDeviceConfigCmdType_Xpi2Spi, //!< Switch from DPI/QPI/OPI to SPI mode
|
||||
kDeviceConfigCmdType_Spi2NoCmd, //!< Switch to 0-4-4/0-8-8 mode
|
||||
kDeviceConfigCmdType_Reset, //!< Reset device command
|
||||
};
|
||||
|
||||
//!@brief FlexSPI Memory Configuration Block
|
||||
typedef struct _FlexSPIConfig
|
||||
{
|
||||
uint32_t tag; //!< [0x000-0x003] Tag, fixed value 0x42464346UL
|
||||
uint32_t version; //!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix
|
||||
uint32_t reserved0; //!< [0x008-0x00b] Reserved for future use
|
||||
uint8_t readSampleClkSrc; //!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
|
||||
uint8_t csHoldTime; //!< [0x00d-0x00d] CS hold time, default value: 3
|
||||
uint8_t csSetupTime; //!< [0x00e-0x00e] CS setup time, default value: 3
|
||||
uint8_t columnAddressWidth; //!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For
|
||||
//! Serial NAND, need to refer to datasheet
|
||||
uint8_t deviceModeCfgEnable; //!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable
|
||||
uint8_t deviceModeType; //!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch,
|
||||
//! Generic configuration, etc.
|
||||
uint16_t waitTimeCfgCommands; //!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for
|
||||
//! DPI/QPI/OPI switch or reset command
|
||||
flexspi_lut_seq_t deviceModeSeq; //!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt
|
||||
//! sequence number, [31:16] Reserved
|
||||
uint32_t deviceModeArg; //!< [0x018-0x01b] Argument/Parameter for device configuration
|
||||
uint8_t configCmdEnable; //!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
|
||||
uint8_t configModeType[3]; //!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
|
||||
flexspi_lut_seq_t
|
||||
configCmdSeqs[3]; //!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq
|
||||
uint32_t reserved1; //!< [0x02c-0x02f] Reserved for future use
|
||||
uint32_t configCmdArgs[3]; //!< [0x030-0x03b] Arguments/Parameters for device Configuration commands
|
||||
uint32_t reserved2; //!< [0x03c-0x03f] Reserved for future use
|
||||
uint32_t controllerMiscOption; //!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more
|
||||
//! details
|
||||
uint8_t deviceType; //!< [0x044-0x044] Device Type: See Flash Type Definition for more details
|
||||
uint8_t sflashPadType; //!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal
|
||||
uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot
|
||||
//! Chapter for more details
|
||||
uint8_t lutCustomSeqEnable; //!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot
|
||||
//! be done using 1 LUT sequence, currently, only applicable to HyperFLASH
|
||||
uint32_t reserved3[2]; //!< [0x048-0x04f] Reserved for future use
|
||||
uint32_t sflashA1Size; //!< [0x050-0x053] Size of Flash connected to A1
|
||||
uint32_t sflashA2Size; //!< [0x054-0x057] Size of Flash connected to A2
|
||||
uint32_t sflashB1Size; //!< [0x058-0x05b] Size of Flash connected to B1
|
||||
uint32_t sflashB2Size; //!< [0x05c-0x05f] Size of Flash connected to B2
|
||||
uint32_t csPadSettingOverride; //!< [0x060-0x063] CS pad setting override value
|
||||
uint32_t sclkPadSettingOverride; //!< [0x064-0x067] SCK pad setting override value
|
||||
uint32_t dataPadSettingOverride; //!< [0x068-0x06b] data pad setting override value
|
||||
uint32_t dqsPadSettingOverride; //!< [0x06c-0x06f] DQS pad setting override value
|
||||
uint32_t timeoutInMs; //!< [0x070-0x073] Timeout threshold for read status command
|
||||
uint32_t commandInterval; //!< [0x074-0x077] CS deselect interval between two commands
|
||||
uint16_t dataValidTime[2]; //!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in terms of 0.1ns
|
||||
uint16_t busyOffset; //!< [0x07c-0x07d] Busy offset, valid value: 0-31
|
||||
uint16_t busyBitPolarity; //!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 -
|
||||
//! busy flag is 0 when flash device is busy
|
||||
uint32_t lookupTable[64]; //!< [0x080-0x17f] Lookup table holds Flash command sequences
|
||||
flexspi_lut_seq_t lutCustomSeq[12]; //!< [0x180-0x1af] Customizable LUT Sequences
|
||||
uint32_t reserved4[4]; //!< [0x1b0-0x1bf] Reserved for future use
|
||||
} flexspi_mem_config_t;
|
||||
|
||||
/* */
|
||||
#define NOR_CMD_INDEX_READ CMD_INDEX_READ //!< 0
|
||||
#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS //!< 1
|
||||
#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE //!< 2
|
||||
#define NOR_CMD_INDEX_ERASESECTOR 3 //!< 3
|
||||
#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE //!< 4
|
||||
#define NOR_CMD_INDEX_CHIPERASE 5 //!< 5
|
||||
#define NOR_CMD_INDEX_DUMMY 6 //!< 6
|
||||
#define NOR_CMD_INDEX_ERASEBLOCK 7 //!< 7
|
||||
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ //!< 0 READ LUT sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS \
|
||||
CMD_LUT_SEQ_IDX_READSTATUS //!< 1 Read Status LUT sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
|
||||
2 //!< 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \
|
||||
CMD_LUT_SEQ_IDX_WRITEENABLE //!< 3 Write Enable sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
|
||||
4 //!< 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 //!< 5 Erase Sector sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8 //!< 8 Erase Block sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \
|
||||
CMD_LUT_SEQ_IDX_WRITE //!< 9 Program sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 //!< 11 Chip Erase sequence in lookupTable id stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 //!< 13 Read SFDP sequence in lookupTable id stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
|
||||
14 //!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
|
||||
15 //!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk
|
||||
|
||||
|
||||
/*
|
||||
* Serial NOR configuration block
|
||||
*/
|
||||
typedef struct _flexspi_nor_config
|
||||
{
|
||||
flexspi_mem_config_t memConfig; //!< Common memory configuration info via FlexSPI
|
||||
uint32_t pageSize; //!< Page size of Serial NOR
|
||||
uint32_t sectorSize; //!< Sector size of Serial NOR
|
||||
uint8_t ipcmdSerialClkFreq; //!< Clock frequency for IP command
|
||||
uint8_t isUniformBlockSize; //!< Sector/Block size is the same
|
||||
uint8_t reserved0[2]; //!< Reserved for future use
|
||||
uint8_t serialNorType; //!< Serial NOR Flash type: 0/1/2/3
|
||||
uint8_t needExitNoCmdMode; //!< Need to exit NoCmd mode before other IP command
|
||||
uint8_t halfClkForNonReadCmd; //!< Half the Serial Clock for non-read command: true/false
|
||||
uint8_t needRestoreNoCmdMode; //!< Need to Restore NoCmd mode after IP commmand execution
|
||||
uint32_t blockSize; //!< Block size
|
||||
uint32_t reserve2[11]; //!< Reserved for future use
|
||||
} flexspi_nor_config_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __FLEXSPI_NOR_FLASH_H__
|
||||
Loading…
Reference in New Issue