Merge branch 'master' into gitee_master

bsp/essemi/es8p508x/SConscript

@@ -1,5 +1,6 @@
 # RT-Thread SConscript bridge
 import os
+from building import *
 
 objs = []
 cwd = GetCurrentDir()

bsp/imx6ul/SConstruct

@@ -20,6 +20,7 @@ env = Environment(tools = ['mingw'],
 	AR = rtconfig.AR, ARFLAGS = '-rc',
 	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
 env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+env['ASCOM'] = env['ASPPCOM']
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/imxrt/imxrt1052-nxp-evk/rtconfig.py

@@ -53,6 +53,9 @@ if PLATFORM == 'gcc':
     CPATH = ''
     LPATH = ''
 
+    AFLAGS += ' -D__STARTUP_INITIALIZE_NONCACHEDATA'
+    AFLAGS += ' -D__STARTUP_CLEAR_BSS'
+
     if BUILD == 'debug':
         CFLAGS += ' -gdwarf-2'
         AFLAGS += ' -gdwarf-2'
@@ -60,7 +63,7 @@ if PLATFORM == 'gcc':
     else:
         CFLAGS += ' -O2 -Os'
 
-    POST_ACTION = OBJCPY + ' -O binary --remove-section=.boot_data --remove-section=.image_vertor_table --remove-section=.ncache $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
 
     # module setting 
     CXXFLAGS = ' -Woverloaded-virtual -fno-exceptions -fno-rtti '

bsp/imxrt/imxrt1064-nxp-evk/README.md

@@ -71,7 +71,7 @@
 
 ### 快速上手
 
-本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，暂不支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
+本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，以及GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
 
 #### 硬件连接
 
@@ -115,4 +115,4 @@ msh >
 
 维护人:
 
--  [王强](https://github.com/xfwangqiang), 邮箱：<164877907@qq.com>
+-  [王强](https://github.com/xfwangqiang, https://gitee.com/xfwangqiang), 邮箱：<164877907@qq.com>

bsp/imxrt/imxrt1064-nxp-evk/rtconfig.py

@@ -53,6 +53,9 @@ if PLATFORM == 'gcc':
     CPATH = ''
     LPATH = ''
 
+    AFLAGS += ' -D__STARTUP_INITIALIZE_NONCACHEDATA'
+    AFLAGS += ' -D__STARTUP_CLEAR_BSS'
+
     if BUILD == 'debug':
         CFLAGS += ' -gdwarf-2'
         AFLAGS += ' -gdwarf-2'

bsp/nrf5x/libraries/drivers/SConscript

@@ -19,9 +19,13 @@ if GetDepend(['BSP_USING_QSPI_FLASH']):
 
 if GetDepend(['BSP_USING_SPI']):
     src += ['drv_spi.c']
+    
 if GetDepend(['BSP_USING_GPIO']):
     src += ['drv_gpio.c']
     
+if GetDepend(['BSP_USING_PWM']):
+    src += ['drv_pwm.c']
+
 path =  [cwd]
 
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)

bsp/nrf5x/libraries/drivers/drv_gpio.c

@@ -46,22 +46,6 @@ static const struct pin_index pins[] =
     __NRF5X_PIN(29,  0, 29),
     __NRF5X_PIN(30,  0, 30),
     __NRF5X_PIN(31,  0, 31),
-    __NRF5X_PIN(32,  1, 0 ),
-    __NRF5X_PIN(33,  1, 1 ),
-    __NRF5X_PIN(34,  1, 2 ),
-    __NRF5X_PIN(35,  1, 3 ),
-    __NRF5X_PIN(36,  1, 4 ),
-    __NRF5X_PIN(37,  1, 5 ),
-    __NRF5X_PIN(38,  1, 6 ),
-    __NRF5X_PIN(39,  1, 7 ),
-    __NRF5X_PIN(40,  1, 8 ),
-    __NRF5X_PIN(41,  1, 9 ),
-    __NRF5X_PIN(42,  1, 10),
-    __NRF5X_PIN(43,  1, 11),
-    __NRF5X_PIN(44,  1, 12),
-    __NRF5X_PIN(45,  1, 13),
-    __NRF5X_PIN(46,  1, 14),
-    __NRF5X_PIN(47,  1, 15),
 };
 
 /* EVENTS_IN[n](n=0..7) and EVENTS_PORT */

bsp/nrf5x/libraries/drivers/drv_gpio.h

@@ -13,7 +13,6 @@
 
 #include <board.h>
 #include <rtdevice.h>
-#include <nrf52840.h>
 #include <hal/nrf_gpio.h>
 #include <drivers/include/nrfx_gpiote.h>
 

bsp/nrf5x/libraries/drivers/drv_pwm.c

@@ -0,0 +1,432 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-07-26     supperthomas first version
+ *
+ */
+
+
+#include <board.h>
+#include "rtdevice.h"
+#include "rtservice.h"
+
+#ifdef RT_USING_PWM
+
+#include <nrfx_pwm.h>
+
+struct mcu_pwm
+{
+    struct rt_device_pwm pwm_device;
+    
+    nrfx_pwm_t *pwm_handle;
+    nrf_pwm_values_individual_t m_demo1_seq_values;
+    nrf_pwm_sequence_t m_demo1_seq;
+
+    rt_uint8_t channel;
+    char *name;
+    rt_uint64_t pwm_src_clk;
+    uint8_t channel_0_pin;
+    uint8_t channel_1_pin;
+    uint8_t channel_2_pin;
+    uint8_t channel_3_pin;
+};
+
+enum
+{
+#ifdef BSP_USING_PWM0
+    PWM0_INDEX,
+#endif
+#ifdef BSP_USING_PWM1
+    PWM1_INDEX,
+#endif
+#ifdef BSP_USING_PWM2
+    PWM2_INDEX,
+#endif
+#ifdef BSP_USING_PWM3
+    PWM3_INDEX,
+#endif
+};
+#ifdef BSP_USING_PWM0
+static nrfx_pwm_t m_pwm0 = NRFX_PWM_INSTANCE(0);
+#define PWM0_CONFIG                             \
+    {                                           \
+       .pwm_handle              =  &m_pwm0,     \
+       .name                    = "pwm0",       \
+       .pwm_src_clk             = 1000000,      \
+    }
+#endif
+
+#ifdef BSP_USING_PWM1
+static nrfx_pwm_t m_pwm1 = NRFX_PWM_INSTANCE(1);
+#define PWM1_CONFIG                             \
+    {                                           \
+       .pwm_handle              =  &m_pwm1,         \
+       .name                    = "pwm1",       \
+       .pwm_src_clk             = 1000000,             \
+    }
+#endif
+
+#ifdef BSP_USING_PWM2
+static nrfx_pwm_t m_pwm2 = NRFX_PWM_INSTANCE(2);
+#define PWM2_CONFIG                             \
+    {                                           \
+       .pwm_handle              =  &m_pwm2,         \
+       .name                    = "pwm2",       \
+       .pwm_src_clk             = 1000000,             \
+    }
+#endif
+
+#ifdef BSP_USING_PWM3
+static nrfx_pwm_t m_pwm3 = NRFX_PWM_INSTANCE(3);
+#define PWM3_CONFIG                             \
+    {                                           \
+       .pwm_handle              =  &m_pwm3,         \
+       .name                    = "pwm3",       \
+       .pwm_src_clk             = 1000000,             \
+    }
+#endif
+
+static struct mcu_pwm mcu_pwm_obj[] =
+{
+#ifdef BSP_USING_PWM0
+    PWM0_CONFIG,
+#endif
+#ifdef BSP_USING_PWM1
+    PWM1_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM2
+    PWM2_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM3
+    PWM3_CONFIG,
+#endif
+};
+
+static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg);
+static struct rt_pwm_ops drv_ops =
+{
+    drv_pwm_control
+};
+
+static rt_err_t drv_pwm_enable(struct mcu_pwm *p_mcu, struct rt_pwm_configuration *configuration, rt_bool_t enable)
+{
+    if (!enable)
+    {
+        nrfx_pwm_stop(p_mcu->pwm_handle, true);
+    }
+    else
+    {
+        (void)nrfx_pwm_simple_playback(p_mcu->pwm_handle, &p_mcu->m_demo1_seq, 1, NRFX_PWM_FLAG_LOOP);
+    }
+
+    return RT_EOK;
+}
+
+uint8_t mcu_get_channel_number(uint8_t channel)
+{
+    if (channel & 0x01)
+    {
+        return 0;
+    }
+    else if (channel & 0x02)
+    {
+        return 1;
+    }
+    else if (channel & 0x04)
+    {
+        return 2;
+    }
+    else if (channel & 0x08)
+    {
+        return 3;
+    }
+    return 0;
+}
+
+static rt_err_t drv_pwm_get(struct mcu_pwm *pwm_handle, struct rt_pwm_configuration *configuration)
+{
+    rt_uint8_t channel_number = mcu_get_channel_number(configuration->channel);
+    uint8_t tick_pscond;
+
+    tick_pscond = pwm_handle->pwm_src_clk / 1000000UL;
+    configuration->period = pwm_handle->pwm_handle->p_registers->COUNTERTOP * 1000UL / tick_pscond;
+    configuration->pulse = pwm_handle->pwm_handle->p_registers->SEQ[channel_number].PTR / tick_pscond;
+
+    return RT_EOK;
+}
+
+static void nrfx_set_prioid(nrfx_pwm_t *pwm_handle, uint32_t perioid)
+{
+    pwm_handle->p_registers->COUNTERTOP = perioid;
+}
+
+static rt_err_t drv_pwm_set(struct mcu_pwm *p_mcu, struct rt_pwm_configuration *configuration)
+{
+    rt_uint32_t period, pulse;
+    uint8_t tick_pscond;
+    tick_pscond = p_mcu->pwm_src_clk / 1000000UL;
+
+    p_mcu->pwm_handle->p_registers->COUNTERTOP = (unsigned long long)configuration->period * tick_pscond;
+    if (configuration->channel & 0x01)
+    {
+        p_mcu->m_demo1_seq_values.channel_0 = configuration->pulse;
+    }
+
+    if (configuration->channel & 0x02)
+    {
+        p_mcu->m_demo1_seq_values.channel_1 = configuration->pulse;
+    }
+
+    if (configuration->channel & 0x04)
+    {
+        p_mcu->m_demo1_seq_values.channel_2 = configuration->pulse;
+    }
+
+    if (configuration->channel & 0x08)
+    {
+        p_mcu->m_demo1_seq_values.channel_3 = configuration->pulse;
+    }
+    return RT_EOK;
+}
+
+static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
+{
+    struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
+    void *pwm_handle = (void *)device->parent.user_data;
+    nrfx_pwm_t *p_handle = (nrfx_pwm_t *)pwm_handle;
+    struct mcu_pwm *p_mcu = rt_container_of(p_handle, struct mcu_pwm, pwm_handle);
+    switch (cmd)
+    {
+    case PWM_CMD_ENABLE:
+        return drv_pwm_enable(p_mcu, configuration, RT_TRUE);
+    case PWM_CMD_DISABLE:
+        return drv_pwm_enable(p_mcu, configuration, RT_FALSE);
+    case PWM_CMD_SET:
+        return drv_pwm_set(p_mcu, configuration);
+    case PWM_CMD_GET:
+        return drv_pwm_get(p_mcu, configuration);
+    default:
+        return RT_EINVAL;
+    }
+}
+
+static rt_err_t mcu_hw_pwm_init(struct mcu_pwm *device)
+{
+#define NRFX_PWM_PIN_INVERTED    0x80
+#define _PRIO_APP_LOWEST    7
+    nrfx_pwm_config_t config0 =
+    {
+        .irq_priority = _PRIO_APP_LOWEST,
+        .base_clock   = NRF_PWM_CLK_1MHz,  //default value
+        .count_mode   = NRF_PWM_MODE_UP,
+        .top_value    = 5000,              //default vaule
+        .load_mode    = NRF_PWM_LOAD_INDIVIDUAL,
+        .step_mode    = NRF_PWM_STEP_AUTO
+    };
+    rt_err_t result = RT_EOK;
+    if (device->pwm_src_clk == 1000000)
+    {
+        config0.base_clock = NRF_PWM_CLK_1MHz;
+    }
+    else if (device->pwm_src_clk == 2000000)
+    {
+        config0.base_clock = NRF_PWM_CLK_2MHz;
+    }
+    else if (device->pwm_src_clk == 8000000)
+    {
+        config0.base_clock = NRF_PWM_CLK_8MHz;
+    }
+    else
+    {
+        config0.base_clock = NRF_PWM_CLK_1MHz;
+    }
+
+    if (device->channel & 0x01)
+    {
+        config0.output_pins[0] = device->channel_0_pin | NRFX_PWM_PIN_INVERTED;
+    }
+
+    if (device->channel & 0x02)
+    {
+        config0.output_pins[1] = device->channel_1_pin | NRFX_PWM_PIN_INVERTED;
+    }
+
+    if (device->channel & 0x04)
+    {
+        config0.output_pins[2] = device->channel_2_pin | NRFX_PWM_PIN_INVERTED;
+    }
+
+    if (device->channel & 0x08)
+    {
+        config0.output_pins[3] = device->channel_3_pin | NRFX_PWM_PIN_INVERTED;
+    }
+    device->m_demo1_seq.values.p_individual = &device->m_demo1_seq_values;
+    device->m_demo1_seq.length = NRF_PWM_VALUES_LENGTH(device->m_demo1_seq_values),
+                        nrfx_pwm_init(device->pwm_handle, &config0, NULL, NULL);
+    return result;
+}
+
+static void pwm_get_channel(void)
+{
+#ifdef BSP_USING_PWM0_CH0
+    mcu_pwm_obj[PWM0_INDEX].channel |= 1 << 0;
+    mcu_pwm_obj[PWM0_INDEX].channel_0_pin = BSP_USING_PWM0_CH0;
+#endif
+#ifdef BSP_USING_PWM0_CH1
+    mcu_pwm_obj[PWM0_INDEX].channel |= 1 << 1;
+    mcu_pwm_obj[PWM0_INDEX].channel_1_pin = BSP_USING_PWM0_CH1;
+#endif
+#ifdef BSP_USING_PWM0_CH2
+    mcu_pwm_obj[PWM0_INDEX].channel |= 1 << 2;
+    mcu_pwm_obj[PWM0_INDEX].channel_2_pin = BSP_USING_PWM0_CH2;
+#endif
+#ifdef BSP_USING_PWM0_CH3
+    mcu_pwm_obj[PWM0_INDEX].channel |= 1 << 3;
+    mcu_pwm_obj[PWM0_INDEX].channel_3_pin = BSP_USING_PWM0_CH3;
+#endif
+#ifdef BSP_USING_PWM1_CH0
+    mcu_pwm_obj[PWM1_INDEX].channel |= 1 << 0;
+    mcu_pwm_obj[PWM1_INDEX].channel_0_pin = BSP_USING_PWM1_CH0;
+#endif
+#ifdef BSP_USING_PWM1_CH1
+    mcu_pwm_obj[PWM1_INDEX].channel |= 1 << 1;
+    mcu_pwm_obj[PWM1_INDEX].channel_1_pin = BSP_USING_PWM1_CH1;
+#endif
+#ifdef BSP_USING_PWM1_CH2
+    mcu_pwm_obj[PWM1_INDEX].channel |= 1 << 2;
+    mcu_pwm_obj[PWM1_INDEX].channel_2_pin = BSP_USING_PWM1_CH2;
+#endif
+#ifdef BSP_USING_PWM1_CH3
+    mcu_pwm_obj[PWM1_INDEX].channel |= 1 << 3;
+    mcu_pwm_obj[PWM1_INDEX].channel_3_pin = BSP_USING_PWM1_CH3;
+#endif
+#ifdef BSP_USING_PWM2_CH0
+    mcu_pwm_obj[PWM2_INDEX].channel |= 1 << 0;
+    mcu_pwm_obj[PWM2_INDEX].channel_0_pin = BSP_USING_PWM2_CH0;
+#endif
+#ifdef BSP_USING_PWM2_CH1
+    mcu_pwm_obj[PWM2_INDEX].channel |= 1 << 1;
+    mcu_pwm_obj[PWM2_INDEX].channel_1_pin = BSP_USING_PWM2_CH1;
+#endif
+#ifdef BSP_USING_PWM2_CH2
+    mcu_pwm_obj[PWM2_INDEX].channel |= 1 << 2;
+    mcu_pwm_obj[PWM2_INDEX].channel_2_pin = BSP_USING_PWM2_CH2;
+#endif
+#ifdef BSP_USING_PWM2_CH3
+    mcu_pwm_obj[PWM2_INDEX].channel |= 1 << 3;
+    mcu_pwm_obj[PWM2_INDEX].channel_3_pin = BSP_USING_PWM2_CH3;
+#endif
+#ifdef BSP_USING_PWM3_CH0
+    mcu_pwm_obj[PWM3_INDEX].channel |= 1 << 0;
+    mcu_pwm_obj[PWM3_INDEX].channel_0_pin = BSP_USING_PWM3_CH0;
+#endif
+#ifdef BSP_USING_PWM3_CH1
+    mcu_pwm_obj[PWM3_INDEX].channel |= 1 << 1;
+    mcu_pwm_obj[PWM3_INDEX].channel_1_pin = BSP_USING_PWM3_CH1;
+#endif
+#ifdef BSP_USING_PWM3_CH2
+    mcu_pwm_obj[PWM3_INDEX].channel |= 1 << 2;
+    mcu_pwm_obj[PWM3_INDEX].channel_2_pin = BSP_USING_PWM3_CH2;
+#endif
+#ifdef BSP_USING_PWM3_CH3
+    mcu_pwm_obj[PWM3_INDEX].channel |= 1 << 3;
+    mcu_pwm_obj[PWM3_INDEX].channel_3_pin = BSP_USING_PWM3_CH3;
+#endif
+}
+
+static int mcu_pwm_init(void)
+{
+    int i = 0;
+    int result = RT_EOK;
+
+    pwm_get_channel();
+    for (i = 0; i < sizeof(mcu_pwm_obj) / sizeof(mcu_pwm_obj[0]); i++)
+    {
+        /* pwm init */
+        if (mcu_hw_pwm_init(&mcu_pwm_obj[i]) != RT_EOK)
+        {
+            rt_kprintf("\r\n %s init failed", mcu_pwm_obj[i].name);
+            result = -RT_ERROR;
+            goto __exit;
+        }
+        else
+        {
+            rt_kprintf("\r\n %s init success", mcu_pwm_obj[i].name);
+
+            /* register pwm device */
+            if (rt_device_pwm_register(&mcu_pwm_obj[i].pwm_device, mcu_pwm_obj[i].name, &drv_ops, &mcu_pwm_obj[i].pwm_handle) == RT_EOK)
+            {
+                rt_kprintf("\r\n %s register success", mcu_pwm_obj[i].name);
+            }
+            else
+            {
+                rt_kprintf("\r\n %s register failed", mcu_pwm_obj[i].name);
+                result = -RT_ERROR;
+            }
+        }
+    }
+__exit:
+    return result;
+}
+INIT_DEVICE_EXPORT(mcu_pwm_init);
+
+
+
+/* test example */
+#define PWM_DEV_NAME        "pwm0"  /* PWM  name*/
+#define PWM_DEV_CHANNEL     15       /* PWM  channel */
+
+struct rt_device_pwm *pwm_dev;
+
+static int pwm_led_sample(int argc, char *argv[])
+{
+    rt_uint32_t period, pulse, dir;
+
+    period = 50000;   /* 50ms*/
+    dir = 1;
+    pulse = 0;
+
+
+    pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_DEV_NAME);
+    if (pwm_dev == RT_NULL)
+    {
+        rt_kprintf("pwm sample run failed! can't find %s device!\n", PWM_DEV_NAME);
+        return RT_ERROR;
+    }
+
+    rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, period, pulse);
+    rt_pwm_enable(pwm_dev, PWM_DEV_CHANNEL);
+
+    while (1)
+    {
+        rt_thread_mdelay(50);
+        if (dir)
+        {
+            pulse += 500;
+        }
+        else
+        {
+            pulse -= 500;
+        }
+        if (pulse >= period)
+        {
+            dir = 0;
+        }
+        if (0 == pulse)
+        {
+            dir = 1;
+        }
+
+
+        rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, period, pulse);
+    }
+}
+MSH_CMD_EXPORT(pwm_led_sample, pwm sample);
+
+#endif

bsp/nrf5x/nrf52832/.config

@@ -74,7 +74,9 @@ CONFIG_RT_VER_NUM=0x40003
 # RT-Thread Components
 #
 CONFIG_RT_USING_COMPONENTS_INIT=y
-# CONFIG_RT_USING_USER_MAIN is not set
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
 
 #
 # C++ features
@@ -112,7 +114,7 @@ CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_PIPE_BUFSZ=512
 # CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
 CONFIG_RT_USING_SERIAL=y
-CONFIG_RT_SERIAL_USING_DMA=y
+# CONFIG_RT_SERIAL_USING_DMA is not set
 CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_HWTIMER is not set
@@ -120,6 +122,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_I2C is not set
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
 # CONFIG_RT_USING_PWM is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
@@ -192,12 +195,15 @@ CONFIG_RT_USING_LIBC=y
 #
 # IoT - internet of things
 #
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
 # CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_MYMQTT is not set
 # CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_CJSON is not set
 # CONFIG_PKG_USING_JSMN is not set
@@ -224,6 +230,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
 # CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
 # CONFIG_PKG_USING_ATSRV_SOCKET is not set
@@ -236,9 +243,10 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
 # CONFIG_PKG_USING_JIOT-C-SDK is not set
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 # CONFIG_PKG_USING_IPMSG is not set
@@ -257,6 +265,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_CAPNP is not set
 # CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
 # CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
 
 #
 # security packages
@@ -265,6 +274,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_libsodium is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
 
 #
 # language packages
@@ -299,6 +309,8 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
 # CONFIG_PKG_USING_LUNAR_CALENDAR is not set
 # CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
 
 #
 # system packages
@@ -309,6 +321,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_PARTITION is not set
 # CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_FLASHDB is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
 # CONFIG_PKG_USING_LITTLEVGL2RTT is not set
@@ -321,6 +334,9 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_SYSWATCH is not set
 # CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
 # CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
 
 #
 # peripheral libraries and drivers
@@ -338,6 +354,13 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_SIGNAL_LED is not set
 # CONFIG_PKG_USING_LEDBLINK is not set
 # CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+CONFIG_PKG_USING_NRFX=y
+CONFIG_PKG_NRFX_PATH="/packages/peripherals/nrfx"
+CONFIG_PKG_USING_NRFX_V210=y
+# CONFIG_PKG_USING_NRFX_LATEST_VERSION is not set
+CONFIG_PKG_NRFX_VER="v2.1.0"
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
@@ -355,13 +378,19 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_RPLIDAR is not set
 # CONFIG_PKG_USING_AS608 is not set
 # CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
 # CONFIG_PKG_USING_EMBARC_BSP is not set
 # CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
 # CONFIG_PKG_USING_MAX7219 is not set
 # CONFIG_PKG_USING_BEEP is not set
-# CONFIG_PKG_USING_NORDIC_SDK is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
-# CONFIG_PKG_USING_NORDIC_SDK_V100 is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
-# CONFIG_PKG_USING_NORDIC_SDK_LATEST_VERSION is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
 
 #
 # miscellaneous packages
@@ -398,17 +427,39 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_VT100 is not set
 # CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_CRCLIB is not set
 
 #
 # Hardware Drivers Config
 #
 CONFIG_SOC_NRF52832=y
+CONFIG_SOC_NORDIC=y
 
 #
 # Onboard Peripheral Drivers
 #
+# CONFIG_BSP_USING_JLINK_TO_USART is not set
+# CONFIG_BSP_USING_QSPI_FLASH is not set
 
 #
 # On-chip Peripheral Drivers
 #
+CONFIG_BSP_USING_GPIO=y
+# CONFIG_BSP_USING_PWM is not set
+# CONFIG_BSP_USING_SOFTDEVICE is not set
 CONFIG_BSP_USING_UART=y
+CONFIG_BSP_USING_UART0=y
+CONFIG_BSP_UART0_RX_PIN=8
+CONFIG_BSP_UART0_TX_PIN=6
+# CONFIG_BSP_USING_UART1 is not set
+# CONFIG_BSP_USING_SPI is not set
+# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
+
+#
+# On-chip flash config
+#
+CONFIG_MCU_FLASH_START_ADDRESS=0x00000000
+CONFIG_MCU_FLASH_SIZE_KB=1024
+CONFIG_MCU_SRAM_START_ADDRESS=0x20000000
+CONFIG_MCU_SRAM_SIZE_KB=256
+CONFIG_MCU_FLASH_PAGE_SIZE=0x1000

bsp/nrf5x/nrf52832/SConstruct

@@ -50,5 +50,8 @@ objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
 # include drivers
 objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
 
+# include cmsis
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'cmsis', 'SConscript')))
+
 # make a building
 DoBuilding(TARGET, objs)

bsp/nrf5x/nrf52832/applications/application.c

@@ -1,48 +1,32 @@
 /*
- * File      : application.c
+ * Copyright (c) 2006-2020, RT-Thread Development Team
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2015, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
+ * SPDX-License-Identifier: Apache-2.0
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
  *
  * Change Logs:
  * Date           Author       Notes
- * 2015-03-01     Yangfs       the first version
+ * 2020-04-29     supperthomas first version
- * 2015-03-27     Bernard      code cleanup.
+ *
  */
 
-/**
- * @addtogroup NRF52832
- */
-/*@{*/
-
 #include <rtthread.h>
+#include <rtdevice.h>
+#define DK_BOARD_LED_1  17
+#define DK_BOARD_LED_2  18
 
-#ifdef RT_USING_FINSH
+int main(void)
-#include <finsh.h>
-#include <shell.h>
-#endif
-
-void rt_init_thread_entry(void* parameter)
 {
-    extern rt_err_t ble_init(void);
+    int count = 1; 
+    rt_pin_mode(DK_BOARD_LED_1, PIN_MODE_OUTPUT);
     
-    ble_init();
+    while (count++)
+    {    
+        rt_pin_write(DK_BOARD_LED_1, PIN_HIGH);
+        rt_thread_mdelay(500);
+        
+        rt_pin_write(DK_BOARD_LED_1, PIN_LOW);
+        rt_thread_mdelay(500);                    
+    }
+    return RT_EOK;
 }
 
-int rt_application_init(void)
-{
-    rt_thread_t tid;
-
-    tid = rt_thread_create("init", rt_init_thread_entry, RT_NULL, 1024,
-                            RT_THREAD_PRIORITY_MAX / 3, 20);
-    if (tid != RT_NULL)
-        rt_thread_startup(tid);
-
-    return 0;
-}
-
-
-/*@}*/

bsp/nrf5x/nrf52832/applications/ble_nus_app.c

@@ -1,670 +0,0 @@
-#include "nordic_common.h"
-#include "nrf.h"
-#include "ble_hci.h"
-#include "ble_advdata.h"
-#include "ble_advertising.h"
-#include "ble_conn_params.h"
-#include "softdevice_handler.h"
-#include "nrf_ble_gatt.h"
-#include "app_timer.h"
-#include "ble_nus.h"
-#include "app_util_platform.h"
-
-#include <rtthread.h>
-
-typedef rt_size_t (*BLE_NOTIFY_T)(rt_uint8_t *buf, rt_uint16_t size);
-
-#define STACK_EVT_MQ_NUM        10
-
-#define FAST_ADV()          \
-    do {                    \
-        uint32_t err_code;  \
-        err_code = ble_advertising_start(BLE_ADV_MODE_FAST);    \
-        APP_ERROR_CHECK(err_code);  \
-    } while(0)
-
-typedef enum
-{
-    STACK_EV_DISCON = 1,
-    STACK_EV_DISPATCH = 2,
-    STACK_EV_KEY = 4,
-} STACK_EV_E;
-
-typedef struct
-{
-    rt_list_t node;
-    void* evt;
-} evt_list_t;
-
-typedef enum
-{
-    STACK_STATE_IDLE = 0,
-    STACK_STATE_ADV = 1,
-    STACK_STATE_CON = 2,
-    STACK_STATE_DISC = 3
-} STACK_STATE_E;
-
-STACK_STATE_E stack_state = STACK_STATE_IDLE;
-
-rt_event_t stack_event;
-rt_sem_t sd_evt_sem;
-rt_mq_t stack_evt_mq;
-rt_uint8_t *evt_sample;
-
-BLE_NOTIFY_T rx_notify = RT_NULL;
-
-// Low frequency clock source to be used by the SoftDevice
-#define NRF_CLOCK_LFCLKSRC      {.source        = NRF_CLOCK_LF_SRC_XTAL,            \
-                                 .rc_ctiv       = 0,                                \
-                                 .rc_temp_ctiv  = 0,                                \
-                                 .xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
-
-
-#define CONN_CFG_TAG                    1                                           /**< A tag that refers to the BLE stack configuration we set with @ref sd_ble_cfg_set. Default tag is @ref BLE_CONN_CFG_TAG_DEFAULT. */
-
-#define APP_FEATURE_NOT_SUPPORTED       BLE_GATT_STATUS_ATTERR_APP_BEGIN + 2        /**< Reply when unsupported features are requested. */
-
-#define DEVICE_NAME                     "Nordic_UART"                               /**< Name of device. Will be included in the advertising data. */
-#define NUS_SERVICE_UUID_TYPE           BLE_UUID_TYPE_VENDOR_BEGIN                  /**< UUID type for the Nordic UART Service (vendor specific). */
-
-#define APP_ADV_INTERVAL                64                                          /**< The advertising interval (in units of 0.625 ms. This value corresponds to 40 ms). */
-#define APP_ADV_TIMEOUT_IN_SECONDS      30                                         /**< The advertising timeout (in units of seconds). */
-
-#define MIN_CONN_INTERVAL               MSEC_TO_UNITS(20, UNIT_1_25_MS)             /**< Minimum acceptable connection interval (20 ms), Connection interval uses 1.25 ms units. */
-#define MAX_CONN_INTERVAL               MSEC_TO_UNITS(75, UNIT_1_25_MS)             /**< Maximum acceptable connection interval (75 ms), Connection interval uses 1.25 ms units. */
-#define SLAVE_LATENCY                   0                                           /**< Slave latency. */
-#define CONN_SUP_TIMEOUT                MSEC_TO_UNITS(4000, UNIT_10_MS)             /**< Connection supervisory timeout (4 seconds), Supervision Timeout uses 10 ms units. */
-#define FIRST_CONN_PARAMS_UPDATE_DELAY  APP_TIMER_TICKS(5000)                       /**< Time from initiating event (connect or start of notification) to first time sd_ble_gap_conn_param_update is called (5 seconds). */
-#define NEXT_CONN_PARAMS_UPDATE_DELAY   APP_TIMER_TICKS(30000)                      /**< Time between each call to sd_ble_gap_conn_param_update after the first call (30 seconds). */
-#define MAX_CONN_PARAMS_UPDATE_COUNT    3                                           /**< Number of attempts before giving up the connection parameter negotiation. */
-
-#define DEAD_BEEF                       0xDEADBEEF                                  /**< Value used as error code on stack dump, can be used to identify stack location on stack unwind. */
-
-#define UART_TX_BUF_SIZE                256                                         /**< UART TX buffer size. */
-#define UART_RX_BUF_SIZE                256                                         /**< UART RX buffer size. */
-
-static ble_nus_t                        m_nus;                                      /**< Structure to identify the Nordic UART Service. */
-static uint16_t                         m_conn_handle = BLE_CONN_HANDLE_INVALID;    /**< Handle of the current connection. */
-
-static nrf_ble_gatt_t                   m_gatt;                                     /**< GATT module instance. */
-static ble_uuid_t                       m_adv_uuids[] = {{BLE_UUID_NUS_SERVICE, NUS_SERVICE_UUID_TYPE}};  /**< Universally unique service identifier. */
-static uint16_t                         m_ble_nus_max_data_len = BLE_GATT_ATT_MTU_DEFAULT - 3;  /**< Maximum length of data (in bytes) that can be transmitted to the peer by the Nordic UART service module. */
-
-/**@brief Function for assert macro callback.
- *
- * @details This function will be called in case of an assert in the SoftDevice.
- *
- * @warning This handler is an example only and does not fit a final product. You need to analyse
- *          how your product is supposed to react in case of Assert.
- * @warning On assert from the SoftDevice, the system can only recover on reset.
- *
- * @param[in] line_num    Line number of the failing ASSERT call.
- * @param[in] p_file_name File name of the failing ASSERT call.
- */
-void assert_nrf_callback(uint16_t line_num, const uint8_t * p_file_name)
-{
-    app_error_handler(DEAD_BEEF, line_num, p_file_name);
-}
-
-
-/**@brief Function for the GAP initialization.
- *
- * @details This function will set up all the necessary GAP (Generic Access Profile) parameters of
- *          the device. It also sets the permissions and appearance.
- */
-static void gap_params_init(void)
-{
-    uint32_t                err_code;
-    ble_gap_conn_params_t   gap_conn_params;
-    ble_gap_conn_sec_mode_t sec_mode;
-
-    BLE_GAP_CONN_SEC_MODE_SET_OPEN(&sec_mode);
-
-    err_code = sd_ble_gap_device_name_set(&sec_mode,
-                                          (const uint8_t *) DEVICE_NAME,
-                                          strlen(DEVICE_NAME));
-    APP_ERROR_CHECK(err_code);
-
-    memset(&gap_conn_params, 0, sizeof(gap_conn_params));
-
-    gap_conn_params.min_conn_interval = MIN_CONN_INTERVAL;
-    gap_conn_params.max_conn_interval = MAX_CONN_INTERVAL;
-    gap_conn_params.slave_latency     = SLAVE_LATENCY;
-    gap_conn_params.conn_sup_timeout  = CONN_SUP_TIMEOUT;
-
-    err_code = sd_ble_gap_ppcp_set(&gap_conn_params);
-    APP_ERROR_CHECK(err_code);
-}
-
-
-/**@brief Function for handling the data from the Nordic UART Service.
- *
- * @details This function will process the data received from the Nordic UART BLE Service and send
- *          it to the UART module.
- *
- * @param[in] p_nus    Nordic UART Service structure.
- * @param[in] p_data   Data to be send to UART module.
- * @param[in] length   Length of the data.
- */
-/**@snippet [Handling the data received over BLE] */
-static void nus_data_handler(ble_nus_t * p_nus, uint8_t * p_data, uint16_t length)
-{
-    rt_kprintf("Received data from BLE NUS. Writing data on UART.\r\n");
-
-    for (uint32_t i = 0; i < length; i++)
-    {
-        rt_kprintf("%02x ", p_data[i]);
-    }
-
-    // ble_send(p_data, length);
-
-    if (rx_notify != RT_NULL)
-    {
-        rx_notify(p_data, length);
-    }
-}
-/**@snippet [Handling the data received over BLE] */
-
-
-/**@brief Function for initializing services that will be used by the application.
- */
-static void services_init(void)
-{
-    uint32_t       err_code;
-    ble_nus_init_t nus_init;
-
-    memset(&nus_init, 0, sizeof(nus_init));
-
-    nus_init.data_handler = nus_data_handler;
-
-    err_code = ble_nus_init(&m_nus, &nus_init);
-    APP_ERROR_CHECK(err_code);
-}
-
-
-/**@brief Function for handling an event from the Connection Parameters Module.
- *
- * @details This function will be called for all events in the Connection Parameters Module
- *          which are passed to the application.
- *
- * @note All this function does is to disconnect. This could have been done by simply setting
- *       the disconnect_on_fail config parameter, but instead we use the event handler
- *       mechanism to demonstrate its use.
- *
- * @param[in] p_evt  Event received from the Connection Parameters Module.
- */
-static void on_conn_params_evt(ble_conn_params_evt_t * p_evt)
-{
-    uint32_t err_code;
-
-    if (p_evt->evt_type == BLE_CONN_PARAMS_EVT_FAILED)
-    {
-        err_code = sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_CONN_INTERVAL_UNACCEPTABLE);
-        APP_ERROR_CHECK(err_code);
-    }
-}
-
-
-/**@brief Function for handling errors from the Connection Parameters module.
- *
- * @param[in] nrf_error  Error code containing information about what went wrong.
- */
-static void conn_params_error_handler(uint32_t nrf_error)
-{
-    APP_ERROR_HANDLER(nrf_error);
-}
-
-
-/**@brief Function for initializing the Connection Parameters module.
- */
-static void conn_params_init(void)
-{
-    uint32_t               err_code;
-    ble_conn_params_init_t cp_init;
-
-    memset(&cp_init, 0, sizeof(cp_init));
-
-    cp_init.p_conn_params                  = NULL;
-    cp_init.first_conn_params_update_delay = FIRST_CONN_PARAMS_UPDATE_DELAY;
-    cp_init.next_conn_params_update_delay  = NEXT_CONN_PARAMS_UPDATE_DELAY;
-    cp_init.max_conn_params_update_count   = MAX_CONN_PARAMS_UPDATE_COUNT;
-    cp_init.start_on_notify_cccd_handle    = BLE_GATT_HANDLE_INVALID;
-    cp_init.disconnect_on_fail             = false;
-    cp_init.evt_handler                    = on_conn_params_evt;
-    cp_init.error_handler                  = conn_params_error_handler;
-
-    err_code = ble_conn_params_init(&cp_init);
-    APP_ERROR_CHECK(err_code);
-}
-
-/**@brief Function for handling advertising events.
- *
- * @details This function will be called for advertising events which are passed to the application.
- *
- * @param[in] ble_adv_evt  Advertising event.
- */
-static void on_adv_evt(ble_adv_evt_t ble_adv_evt)
-{
-    // uint32_t err_code;
-
-    switch (ble_adv_evt)
-    {
-        case BLE_ADV_EVT_FAST:
-            // err_code = bsp_indication_set(BSP_INDICATE_ADVERTISING);
-            // APP_ERROR_CHECK(err_code);
-            stack_state = STACK_STATE_ADV;
-            rt_kprintf("ble fast advert\n");
-            break;
-        case BLE_ADV_EVT_IDLE:
-            // sleep_mode_enter();
-            stack_state = STACK_STATE_IDLE;
-            rt_kprintf("advert idle\n");
-            break;
-        default:
-            break;
-    }
-}
-
-
-/**@brief Function for the application's SoftDevice event handler.
- *
- * @param[in] p_ble_evt SoftDevice event.
- */
-static void on_ble_evt(ble_evt_t * p_ble_evt)
-{
-    uint32_t err_code;
-
-    switch (p_ble_evt->header.evt_id)
-    {
-        case BLE_GAP_EVT_CONNECTED:
-            // err_code = bsp_indication_set(BSP_INDICATE_CONNECTED);
-            // APP_ERROR_CHECK(err_code);
-            m_conn_handle = p_ble_evt->evt.gap_evt.conn_handle;
-            stack_state = STACK_STATE_CON;
-            rt_kprintf("Connected\r\n");
-            break; // BLE_GAP_EVT_CONNECTED
-
-        case BLE_GAP_EVT_DISCONNECTED:
-            // err_code = bsp_indication_set(BSP_INDICATE_IDLE);
-            // APP_ERROR_CHECK(err_code);
-            m_conn_handle = BLE_CONN_HANDLE_INVALID;
-            stack_state = STACK_STATE_DISC;
-            rt_kprintf("Disconnected\r\n");
-            break; // BLE_GAP_EVT_DISCONNECTED
-
-        case BLE_GAP_EVT_SEC_PARAMS_REQUEST:
-            // Pairing not supported
-            err_code = sd_ble_gap_sec_params_reply(m_conn_handle, BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP, NULL, NULL);
-            APP_ERROR_CHECK(err_code);
-            break; // BLE_GAP_EVT_SEC_PARAMS_REQUEST
-
-        case BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST:
-        {
-            ble_gap_data_length_params_t dl_params;
-
-            // Clearing the struct will effectivly set members to @ref BLE_GAP_DATA_LENGTH_AUTO
-            memset(&dl_params, 0, sizeof(ble_gap_data_length_params_t));
-            err_code = sd_ble_gap_data_length_update(p_ble_evt->evt.gap_evt.conn_handle, &dl_params, NULL);
-            APP_ERROR_CHECK(err_code);
-        } break;
-
-        case BLE_GATTS_EVT_SYS_ATTR_MISSING:
-            // No system attributes have been stored.
-            err_code = sd_ble_gatts_sys_attr_set(m_conn_handle, NULL, 0, 0);
-            APP_ERROR_CHECK(err_code);
-            break; // BLE_GATTS_EVT_SYS_ATTR_MISSING
-
-        case BLE_GATTC_EVT_TIMEOUT:
-            // Disconnect on GATT Client timeout event.
-            err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gattc_evt.conn_handle,
-                                             BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
-            APP_ERROR_CHECK(err_code);
-            break; // BLE_GATTC_EVT_TIMEOUT
-
-        case BLE_GATTS_EVT_TIMEOUT:
-            // Disconnect on GATT Server timeout event.
-            err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gatts_evt.conn_handle,
-                                             BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
-            APP_ERROR_CHECK(err_code);
-            break; // BLE_GATTS_EVT_TIMEOUT
-
-        case BLE_EVT_USER_MEM_REQUEST:
-            err_code = sd_ble_user_mem_reply(p_ble_evt->evt.gattc_evt.conn_handle, NULL);
-            APP_ERROR_CHECK(err_code);
-            break; // BLE_EVT_USER_MEM_REQUEST
-
-        case BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST:
-        {
-            ble_gatts_evt_rw_authorize_request_t  req;
-            ble_gatts_rw_authorize_reply_params_t auth_reply;
-
-            req = p_ble_evt->evt.gatts_evt.params.authorize_request;
-
-            if (req.type != BLE_GATTS_AUTHORIZE_TYPE_INVALID)
-            {
-                if ((req.request.write.op == BLE_GATTS_OP_PREP_WRITE_REQ)     ||
-                    (req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_NOW) ||
-                    (req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL))
-                {
-                    if (req.type == BLE_GATTS_AUTHORIZE_TYPE_WRITE)
-                    {
-                        auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_WRITE;
-                    }
-                    else
-                    {
-                        auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_READ;
-                    }
-                    auth_reply.params.write.gatt_status = APP_FEATURE_NOT_SUPPORTED;
-                    err_code = sd_ble_gatts_rw_authorize_reply(p_ble_evt->evt.gatts_evt.conn_handle,
-                                                               &auth_reply);
-                    APP_ERROR_CHECK(err_code);
-                }
-            }
-        } break; // BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST
-
-        default:
-            // No implementation needed.
-            break;
-    }
-}
-
-
-/**@brief Function for dispatching a SoftDevice event to all modules with a SoftDevice
- *        event handler.
- *
- * @details This function is called from the SoftDevice event interrupt handler after a
- *          SoftDevice event has been received.
- *
- * @param[in] p_ble_evt  SoftDevice event.
- */
-static void ble_evt_dispatch(ble_evt_t * p_ble_evt)
-{
-    if (rt_mq_send(stack_evt_mq, p_ble_evt, p_ble_evt->header.evt_len) != RT_EOK)
-    {
-        rt_kprintf("dispatch malloc failure\n");
-    }
-    else
-    {
-        rt_event_send(stack_event, STACK_EV_DISPATCH);
-    }
-}
-
-static rt_err_t evt_dispatch_worker(void)
-{
-    ble_evt_t * p_ble_evt = (ble_evt_t *)evt_sample;
-    rt_err_t err;
-
-    err = rt_mq_recv(stack_evt_mq, (void*)evt_sample, BLE_STACK_EVT_MSG_BUF_SIZE, RT_WAITING_NO);
-
-    if (RT_EOK == err)
-    {
-        ble_conn_params_on_ble_evt(p_ble_evt);
-        nrf_ble_gatt_on_ble_evt(&m_gatt, p_ble_evt);
-        ble_nus_on_ble_evt(&m_nus, p_ble_evt);
-        on_ble_evt(p_ble_evt);
-        ble_advertising_on_ble_evt(p_ble_evt);
-        // bsp_btn_ble_on_ble_evt(p_ble_evt);
-
-        rt_kprintf("ble evt dispatch\n");
-    }
-
-    return err;
-}
-
-static uint32_t _softdevice_evt_schedule(void)
-{
-    rt_sem_release(sd_evt_sem);
-
-    return NRF_SUCCESS;
-}
-
-/**@brief Function for the SoftDevice initialization.
- *
- * @details This function initializes the SoftDevice and the BLE event interrupt.
- */
-static void ble_stack_init(void)
-{
-    uint32_t err_code;
-
-    nrf_clock_lf_cfg_t clock_lf_cfg = NRF_CLOCK_LFCLKSRC;
-
-    // Initialize SoftDevice.
-    SOFTDEVICE_HANDLER_INIT(&clock_lf_cfg, _softdevice_evt_schedule);
-
-    // Fetch the start address of the application RAM.
-    uint32_t ram_start = 0;
-    err_code = softdevice_app_ram_start_get(&ram_start);
-    APP_ERROR_CHECK(err_code);
-
-    // Overwrite some of the default configurations for the BLE stack.
-    ble_cfg_t ble_cfg;
-
-    // Configure the maximum number of connections.
-    memset(&ble_cfg, 0, sizeof(ble_cfg));
-    ble_cfg.gap_cfg.role_count_cfg.periph_role_count  = BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT;
-    ble_cfg.gap_cfg.role_count_cfg.central_role_count = 0;
-    ble_cfg.gap_cfg.role_count_cfg.central_sec_count  = 0;
-    err_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &ble_cfg, ram_start);
-    APP_ERROR_CHECK(err_code);
-
-    // Configure the maximum ATT MTU.
-    memset(&ble_cfg, 0x00, sizeof(ble_cfg));
-    ble_cfg.conn_cfg.conn_cfg_tag                 = CONN_CFG_TAG;
-    ble_cfg.conn_cfg.params.gatt_conn_cfg.att_mtu = NRF_BLE_GATT_MAX_MTU_SIZE;
-    err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATT, &ble_cfg, ram_start);
-    APP_ERROR_CHECK(err_code);
-
-    // Configure the maximum event length.
-    memset(&ble_cfg, 0x00, sizeof(ble_cfg));
-    ble_cfg.conn_cfg.conn_cfg_tag                     = CONN_CFG_TAG;
-    ble_cfg.conn_cfg.params.gap_conn_cfg.event_length = 320;
-    ble_cfg.conn_cfg.params.gap_conn_cfg.conn_count   = BLE_GAP_CONN_COUNT_DEFAULT;
-    err_code = sd_ble_cfg_set(BLE_CONN_CFG_GAP, &ble_cfg, ram_start);
-    APP_ERROR_CHECK(err_code);
-
-    // Enable BLE stack.
-    err_code = softdevice_enable(&ram_start);
-    APP_ERROR_CHECK(err_code);
-
-    // Subscribe for BLE events.
-    err_code = softdevice_ble_evt_handler_set(ble_evt_dispatch);
-    APP_ERROR_CHECK(err_code);
-}
-
-/**@brief Function for handling events from the GATT library. */
-static void gatt_evt_handler(nrf_ble_gatt_t * p_gatt, const nrf_ble_gatt_evt_t * p_evt)
-{
-    if ((m_conn_handle == p_evt->conn_handle) && (p_evt->evt_id == NRF_BLE_GATT_EVT_ATT_MTU_UPDATED))
-    {
-        m_ble_nus_max_data_len = p_evt->params.att_mtu_effective - OPCODE_LENGTH - HANDLE_LENGTH;
-        rt_kprintf("Data len is set to 0x%X(%d)\r\n", m_ble_nus_max_data_len, m_ble_nus_max_data_len);
-    }
-    rt_kprintf("ATT MTU exchange completed. central 0x%x peripheral 0x%x\r\n", p_gatt->att_mtu_desired_central, p_gatt->att_mtu_desired_periph);
-}
-
-/**@brief Function for initializing the GATT library. */
-static void gatt_init(void)
-{
-    ret_code_t err_code;
-
-    err_code = nrf_ble_gatt_init(&m_gatt, gatt_evt_handler);
-    APP_ERROR_CHECK(err_code);
-
-    err_code = nrf_ble_gatt_att_mtu_periph_set(&m_gatt, 64);
-    APP_ERROR_CHECK(err_code);
-}
-
-/**@brief Function for initializing the Advertising functionality.
- */
-static void advertising_init(void)
-{
-    uint32_t               err_code;
-    ble_advdata_t          advdata;
-    ble_advdata_t          scanrsp;
-    ble_adv_modes_config_t options;
-
-    // Build advertising data struct to pass into @ref ble_advertising_init.
-    memset(&advdata, 0, sizeof(advdata));
-    advdata.name_type          = BLE_ADVDATA_FULL_NAME;
-    advdata.include_appearance = false;
-    advdata.flags              = BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE;
-
-    memset(&scanrsp, 0, sizeof(scanrsp));
-    scanrsp.uuids_complete.uuid_cnt = sizeof(m_adv_uuids) / sizeof(m_adv_uuids[0]);
-    scanrsp.uuids_complete.p_uuids  = m_adv_uuids;
-
-    memset(&options, 0, sizeof(options));
-    options.ble_adv_fast_enabled  = true;
-    options.ble_adv_fast_interval = APP_ADV_INTERVAL;
-    options.ble_adv_fast_timeout  = APP_ADV_TIMEOUT_IN_SECONDS;
-
-    err_code = ble_advertising_init(&advdata, &scanrsp, &options, on_adv_evt, NULL);
-    APP_ERROR_CHECK(err_code);
-
-    ble_advertising_conn_cfg_tag_set(CONN_CFG_TAG);
-}
-
-/**@brief   Function for handling app_uart events.
- *
- * @details This function will receive a single character from the app_uart module and append it to
- *          a string. The string will be be sent over BLE when the last character received was a
- *          'new line' '\n' (hex 0x0A) or if the string has reached the maximum data length.
- */
-/**@snippet [Handling the data received over UART] */
-void uart_event_handle(rt_device_t uart)
-{
-    uint8_t data_array[BLE_NUS_MAX_DATA_LEN];
-    rt_size_t size = 0;
-    uint32_t       err_code;
-
-    size = rt_device_read(uart, 0, data_array, BLE_NUS_MAX_DATA_LEN);
-
-    if (size <= 0)
-    {
-        return;
-    }
-
-    do
-    {
-        err_code = ble_nus_string_send(&m_nus, data_array, size);
-        if ( (err_code != NRF_ERROR_INVALID_STATE) && (err_code != NRF_ERROR_BUSY) )
-        {
-            APP_ERROR_CHECK(err_code);
-        }
-    } while (err_code == NRF_ERROR_BUSY);
-}
-/**@snippet [Handling the data received over UART] */
-
-/**@brief  Function for initializing the UART module.
- */
-/**@snippet [UART Initialization] */
-static rt_bool_t _stack_init(void)
-{
-    uint32_t err_code;
-
-    stack_event = rt_event_create("stackev", RT_IPC_FLAG_FIFO);
-    sd_evt_sem = rt_sem_create("sdsem", 0, RT_IPC_FLAG_FIFO);
-    stack_evt_mq = rt_mq_create("stackmq", BLE_STACK_EVT_MSG_BUF_SIZE, STACK_EVT_MQ_NUM, RT_IPC_FLAG_FIFO);
-    evt_sample = rt_malloc(BLE_STACK_EVT_MSG_BUF_SIZE);
-
-    if (!stack_event || !sd_evt_sem || !stack_evt_mq || !evt_sample)
-    {
-        rt_kprintf("uart rx sem create failure\n");
-        return RT_FALSE;
-    }
-
-    // Initialize.
-    err_code = app_timer_init();
-    APP_ERROR_CHECK(err_code);
-
-    ble_stack_init();
-    gap_params_init();
-    gatt_init();
-    services_init();
-    advertising_init();
-    conn_params_init();
-
-    return RT_TRUE;
-}
-
-/**@brief Application main function.
- */
-static void _stack_thread(void *parameter)
-{
-    rt_tick_t next_timeout = (rt_tick_t)RT_WAITING_FOREVER;
-
-    FAST_ADV();
-    // Enter main loop.
-    for (;;)
-    {
-        rt_uint32_t event = 0;
-        rt_tick_t dispatch_timeout = RT_WAITING_NO;
-
-        rt_event_recv(stack_event, STACK_EV_DISCON | STACK_EV_DISPATCH | STACK_EV_KEY,
-                    RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, next_timeout, &event);
-
-        if (evt_dispatch_worker() != RT_EOK)
-        {
-            dispatch_timeout = (rt_tick_t)RT_WAITING_FOREVER;
-        }
-
-        if (event & STACK_EV_DISCON)
-        {
-            if (BLE_CONN_HANDLE_INVALID != m_conn_handle)
-            {
-                sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
-            }
-        }
-
-        if (event & STACK_EV_KEY)
-        {
-            if (stack_state != STACK_STATE_CON && stack_state != STACK_STATE_ADV)
-            {
-                FAST_ADV();
-            }
-        }
-
-        next_timeout = (rt_tick_t)RT_WAITING_FOREVER;
-
-        if (dispatch_timeout < next_timeout)
-        {
-            next_timeout = dispatch_timeout;
-        }
-    }
-}
-
-static void _softdevice_thread(void* parameter)
-{
-    for (;;)
-    {
-        rt_sem_take(sd_evt_sem, RT_WAITING_FOREVER);
-        intern_softdevice_events_execute();
-    }
-}
-
-rt_err_t ble_init(void)
-{
-    rt_thread_t thread;
-
-    _stack_init();
-
-    thread = rt_thread_create("sdth", _softdevice_thread, RT_NULL, 512, 0, 10);
-
-    if (thread != RT_NULL)
-    {
-        rt_thread_startup(thread);
-    }
-    else
-    {
-        return RT_ERROR;
-    }
-
-    thread = rt_thread_create("bleth", _stack_thread, RT_NULL, 2048, 1, 10);
-
-    if (thread != RT_NULL)
-    {
-        return rt_thread_startup(thread);
-    }
-
-    return RT_ERROR;
-}

bsp/nrf5x/nrf52832/applications/startup.c

@@ -1,98 +0,0 @@
-/*
- * File      : startup.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2015, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2015-03-01     Yangfs       the first version
- * 2015-03-27     Bernard      code cleanup.
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-
-#include "board.h"
-
-/**
- * @addtogroup NRF52832
- */
-
-/*@{*/
-
-extern int  rt_application_init(void);
-
-#ifdef __CC_ARM
-extern int Image$$RW_IRAM1$$ZI$$Limit;
-#define NRF_SRAM_BEGIN    (&Image$$RW_IRAM1$$ZI$$Limit)
-#elif __ICCARM__
-#pragma section="HEAP"
-#define NRF_SRAM_BEGIN    (__segment_end("HEAP"))
-#else
-extern int __bss_end;
-#define NRF_SRAM_BEGIN    (&__bss_end)
-#endif
-
-/**
- * This function will startup RT-Thread RTOS.
- */
-void rtthread_startup(void)
-{
-    /* init board */
-    rt_hw_board_init();
-
-    /* show version */
-    rt_show_version();
-
-    /* init tick */
-    rt_system_tick_init();
-
-    /* init kernel object */
-    rt_system_object_init();
-
-    /* init timer system */
-    rt_system_timer_init();
-
-#ifdef RT_USING_HEAP
-    rt_system_heap_init((void*)NRF_SRAM_BEGIN, (void*)CHIP_SRAM_END);
-#endif
-
-    /* init scheduler system */
-    rt_system_scheduler_init();
-
-#ifdef RT_USING_COMPONENTS_INIT
-    rt_components_init();
-#endif
-
-    /* init application */
-    rt_application_init();
-
-    /* init timer thread */
-    rt_system_timer_thread_init();
-
-    /* init idle thread */
-    rt_thread_idle_init();
-
-    /* start scheduler */
-    rt_system_scheduler_start();
-
-    /* never reach here */
-    return ;
-}
-
-int main(void)
-{
-    /* disable interrupt first */
-    // rt_hw_interrupt_disable();
-
-    /* startup RT-Thread RTOS */
-    rtthread_startup();
-
-    return 0;
-}
-
-/*@}*/

bsp/nrf5x/nrf52832/board/Kconfig

@@ -2,21 +2,293 @@ menu "Hardware Drivers Config"
 
 config SOC_NRF52832
     bool
+    config SOC_NRF52832
     select RT_USING_COMPONENTS_INIT
-    # select RT_USING_USER_MAIN
+    select RT_USING_USER_MAIN
     default y
 
-menu "Onboard Peripheral Drivers"
+config SOC_NORDIC
+    bool 
+    config SOC_NORDIC
+    default y
 
+
+menu "Onboard Peripheral Drivers"
+    config BSP_USING_JLINK_TO_USART
+        bool "Enable JLINK TO USART (uart0|RX_PIN:8|TX_PIN:6)"
+        select BSP_USING_UART
+        select BSP_USING_UART0
+        default y
 endmenu
 
 menu "On-chip Peripheral Drivers"
-
+    config BSP_USING_GPIO
+        bool "Enable GPIO"
+        select RT_USING_PIN
+        default y
+    menuconfig BSP_USING_PWM
+        bool "Enable PWM"
+        select RT_USING_PWM
+        default n
+        if BSP_USING_PWM
+                config NRFX_PWM_ENABLED
+                int 
+                default 1
+                config BSP_USING_PWM0
+                    bool "Enable PWM0 bus"
+                    default y
+                if BSP_USING_PWM0
+                    config NRFX_PWM0_ENABLED
+                    int 
+                    default 1
+                    config BSP_USING_PWM0_CH0
+                        int "PWM0 channel 0 pin number set"
+                        range 0 47
+                        default 13
+                    config BSP_USING_PWM0_CH1
+                        int "PWM0 channel 1 pin number set"
+                        range 0 47
+                        default 14
+                    config BSP_USING_PWM0_CH2
+                        int "PWM0 channel 2 pin number set"
+                        range 0 47
+                        default 15
+                    config BSP_USING_PWM0_CH3
+                        int "PWM0 channel 3 pin number set"
+                        range 0 47
+                        default 16
+                endif
+                config BSP_USING_PWM1
+                    bool "Enable PWM1 bus"
+                    default n
+                if BSP_USING_PWM1
+                    config NRFX_PWM1_ENABLED
+                    int 
+                    default 1
+                    config BSP_USING_PWM1_CH0
+                        int "PWM1 channel 0 pin number set"
+                        range 0 47
+                        default 13
+                    config BSP_USING_PWM1_CH1
+                        int "PWM1 channel 1 pin number set"
+                        range 0 47
+                        default 14
+                    config BSP_USING_PWM1_CH2
+                        int "PWM1 channel 2 pin number set"
+                        range 0 47
+                        default 15
+                    config BSP_USING_PWM1_CH3
+                        int "PWM1 channel 3 pin number set"
+                        range 0 47
+                        default 16
+                endif
+                config BSP_USING_PWM2
+                    bool "Enable PWM2 bus"
+                    default n
+                if BSP_USING_PWM2
+                    config NRFX_PWM2_ENABLED
+                    int 
+                    default 1
+                    config BSP_USING_PWM2_CH0
+                        int "PWM2 channel 0 pin number set"
+                        range 0 47
+                        default 13
+                    config BSP_USING_PWM2_CH1
+                        int "PWM2 channel 1 pin number set"
+                        range 0 47
+                        default 14
+                    config BSP_USING_PWM2_CH2
+                        int "PWM2 channel 2 pin number set"
+                        range 0 47
+                        default 15
+                    config BSP_USING_PWM2_CH3
+                        int "PWM2 channel 3 pin number set"
+                        range 0 47
+                        default 16
+                endif
+                config BSP_USING_PWM3
+                    bool "Enable PWM3 bus"
+                    default n
+                if BSP_USING_PWM3
+                    config NRFX_PWM3_ENABLED
+                    int 
+                    default 1
+                    config BSP_USING_PWM3_CH0
+                        int "PWM3 channel 0 pin number set"
+                        range 0 47
+                        default 13
+                    config BSP_USING_PWM3_CH1
+                        int "PWM3 channel 1 pin number set"
+                        range 0 47
+                        default 14
+                    config BSP_USING_PWM3_CH2
+                        int "PWM3 channel 2 pin number set"
+                        range 0 47
+                        default 15
+                    config BSP_USING_PWM3_CH3
+                        int "PWM3 channel 3 pin number set"
+                        range 0 47
+                        default 16
+                endif
+        endif
+    menuconfig BSP_USING_SOFTDEVICE
+        bool "Enable NRF SOFTDEVICE"
+        select PKG_USING_NRF5X_SDK
+        select NRFX_CLOCK_ENABLED
+        default n
+if BSP_USING_SOFTDEVICE
+    config NRFX_CLOCK_ENABLED
+    int 
+    default 1
+    config NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
+    int 
+    default 7
+    config NRFX_RTC_ENABLED
+    int 
+    default 1
+    config NRFX_RTC1_ENABLED
+    int 
+    default 1
+    config NRF_CLOCK_ENABLED
+    int 
+    default 1
+    config NRF_SDH_BLE_ENABLED
+    int 
+    default 1
+    config NRF_SDH_ENABLED
+    int 
+    default 1
+    config NRF_SDH_SOC_ENABLED
+    int 
+    default 1
+endif
     menuconfig BSP_USING_UART
         bool "Enable UART"
         default y
         select RT_USING_SERIAL
 
+        if BSP_USING_UART
+            config BSP_USING_UART0
+                bool "Enable UART0"
+                default y 
+                if BSP_USING_UART0
+                    config BSP_UART0_RX_PIN
+                        int "uart0 rx pin number"
+                        range 0 31
+                        default 8
+                    config BSP_UART0_TX_PIN
+                        int "uart0 tx pin number"
+                        range 0 31
+                        default 6
+                endif
+            config BSP_USING_UART1
+                bool "Enable UART1"
+                default n
+        endif
+
+    config BSP_USING_SPI
+        bool "Enable SPI"
+        select RT_USING_PIN
+        default y
+
+        if BSP_USING_SPI
+            config BSP_USING_SPI0
+                bool "Enable SPI0 bus"
+                default y
+            if BSP_USING_SPI0
+                config BSP_SPI0_SCK_PIN
+                    int "SPI0 sck pin number set"
+                    range 0 47
+                    default 28
+                config BSP_SPI0_MOSI_PIN
+                    int "SPI0 mosi pin number set"
+                    range 0 47
+                    default 29
+                config BSP_SPI0_MISO_PIN
+                    int "SPI0 miso pin number set"
+                    range 0 47
+                    default 30
+                config BSP_SPI0_SS_PIN
+                    int "SPI0 ss pin number set"
+                    range 0 47
+                    default 31
+            endif
+
+            config BSP_USING_SPI1
+                bool "Enable SPI1 bus"
+                default n
+            if BSP_USING_SPI1
+                config BSP_SPI1_SCK_PIN
+                    int "SPI0 sck pin number set"
+                    range 0 47
+                    default 28
+                config BSP_SPI1_MOSI_PIN
+                    int "SPI0 mosi pin number set"
+                    range 0 47
+                    default 29
+                config BSP_SPI1_MISO_PIN
+                    int "SPI0 miso pin number set"
+                    range 0 47
+                    default 30
+                config BSP_SPI1_SS_PIN
+                    int "SPI0 ss pin number set"
+                    range 0 47
+                    default 31
+            endif
+
+            config BSP_USING_SPI2
+                bool "Enable SPI2 bus"
+                default n
+            if BSP_USING_SPI2
+                config BSP_SPI2_SCK_PIN
+                    int "SPI0 sck pin number set"
+                    range 0 47
+                    default 28
+                config BSP_SPI2_MOSI_PIN
+                    int "SPI0 mosi pin number set"
+                    range 0 47
+                    default 29
+                config BSP_SPI2_MISO_PIN
+                    int "SPI0 miso pin number set"
+                    range 0 47
+                    default 30
+                config BSP_SPI2_SS_PIN
+                    int "SPI0 ss pin number set"
+                    range 0 47
+                    default 31
+            endif
+
+        endif
+    config BSP_USING_ON_CHIP_FLASH
+        select PKG_USING_FAL
+        bool "Enable on-chip FLASH"
+        default n
+
+    menu "On-chip flash config"
+
+        config MCU_FLASH_START_ADDRESS  
+            hex "MCU FLASH START ADDRESS"
+            default 0x00000000
+
+        config MCU_FLASH_SIZE_KB  
+            int "MCU FLASH SIZE, MAX size 1024 KB"
+            range 1 1024
+            default 1024		
+
+        config MCU_SRAM_START_ADDRESS 
+            hex "MCU RAM START ADDRESS"
+            default 0x20000000
+
+        config MCU_SRAM_SIZE_KB 
+            int "MCU RAM SIZE, MAX size 256 KB"
+            range 1 256
+            default 256
+
+        config MCU_FLASH_PAGE_SIZE 
+            hex "MCU FLASH PAGE SIZE, please not change,nrfx default is 0x1000"
+            range 0x1000 0x1000
+            default 0x1000
+	endmenu
 endmenu
 
 endmenu

bsp/nrf5x/nrf52832/board/SConscript

@@ -5,6 +5,7 @@ from building import *
 cwd = GetCurrentDir()
 src = Glob('*.c')
 CPPPATH = [cwd]
+define = ['USE_APP_CONFIG']
 
-group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH,)
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH,CPPDEFINES = define)
 Return('group')

bsp/nrf5x/nrf52832/board/app_config.h

@@ -0,0 +1,4 @@
+#ifndef APP_CONFIG_H
+#define APP_CONFIG_H
+
+#endif	//APP_CONFIG_H

bsp/nrf5x/nrf52832/board/board.c

@@ -1,17 +1,60 @@
-#include "board.h"
+/*
-#include "drv_uart.h"
+ * Copyright (c) 2006-2020, RT-Thread Development Team
-#include "app_util_platform.h"
+ *
-#include "nrf_drv_common.h"
+ * SPDX-License-Identifier: Apache-2.0
-#include "nrf_systick.h"
+ *
-#include "nrf_rtc.h"
+ * Change Logs:
-#include "nrf_drv_clock.h"
+ * Date           Author       Notes
-#include "softdevice_handler.h"
+ * 2020-04-29     supperthomas first version
-#include "nrf_drv_uart.h"
+ *
-#include "nrf_gpio.h"
+ */
-
 #include <rtthread.h>
 #include <rthw.h>
+#include <nrfx_systick.h>
 
+#include "board.h"
+#include "drv_uart.h"
+#ifdef BSP_USING_SOFTDEVICE
+#include <nrfx_rtc.h>
+#include <nrfx_clock.h>
+#include "app_error.h"
+#include "nrf_drv_clock.h"
+const nrfx_rtc_t rtc = NRFX_RTC_INSTANCE(1); /**< Declaring an instance of nrf_drv_rtc for RTC0. */
+
+static void rtc_handler(nrfx_rtc_int_type_t int_type)
+{
+    if (int_type == NRFX_RTC_INT_TICK)
+    {
+        rt_interrupt_enter();
+
+        rt_tick_increase();
+
+        rt_interrupt_leave();
+    }
+}
+#else
+/**
+ * This is the timer interrupt service routine.
+ *
+ */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+void SysTick_Configuration(void)
+{
+#ifdef BSP_USING_SOFTDEVICE
+    nrf_drv_clock_init();
+    nrf_drv_clock_lfclk_request(NULL);
+
+    uint32_t err_code;
 #define TICK_RATE_HZ  RT_TICK_PER_SECOND
 #define SYSTICK_CLOCK_HZ  ( 32768UL )
 
@@ -19,202 +62,49 @@
     /* IRQn used by the selected RTC */
 #define NRF_RTC_IRQn       RTC1_IRQn
     /* Constants required to manipulate the NVIC. */
-#define NRF_RTC_PRESCALER  ( (uint32_t) (ROUNDED_DIV(SYSTICK_CLOCK_HZ, TICK_RATE_HZ) - 1) )
+#define NRF_RTC_PRESCALER  ( (uint32_t) (NRFX_ROUNDED_DIV(SYSTICK_CLOCK_HZ, TICK_RATE_HZ) - 1) )
-    /* Maximum RTC ticks */
+    nrfx_rtc_config_t config = NRFX_RTC_DEFAULT_CONFIG;
-#define NRF_RTC_MAXTICKS   ((1U<<24)-1U)
+    config.prescaler = NRF_RTC_PRESCALER;
 
-static volatile uint32_t m_tick_overflow_count = 0;
+    err_code = nrfx_rtc_init(&rtc, &config, rtc_handler);
-#define NRF_RTC_BITWIDTH 24
+    // APP_ERROR_CHECK(err_code);
-#define OSTick_Handler     RTC1_IRQHandler
+    nrfx_rtc_tick_enable(&rtc, true);
-#define EXPECTED_IDLE_TIME_BEFORE_SLEEP   2
+#define COMPARE_COUNTERTIME  (3UL)                                        /**< Get Compare event COMPARE_TIME seconds after the counter starts from 0. */
+    //Set compare channel to trigger interrupt after COMPARE_COUNTERTIME seconds
+    err_code = nrfx_rtc_cc_set(&rtc, 0, COMPARE_COUNTERTIME * 8, true);
+    // APP_ERROR_CHECK(err_code);
 
-void SysTick_Configuration(void)
+    //Power on RTC instance
-{
+    nrfx_rtc_enable(&rtc);
-    nrf_drv_clock_lfclk_request(NULL);
+#else
+    /* Set interrupt priority */
+    NVIC_SetPriority(SysTick_IRQn, 0xf);
 
     /* Configure SysTick to interrupt at the requested rate. */
-    nrf_rtc_prescaler_set(NRF_RTC_REG, NRF_RTC_PRESCALER);
+    nrf_systick_load_set(SystemCoreClock / RT_TICK_PER_SECOND);
-    nrf_rtc_int_enable   (NRF_RTC_REG, RTC_INTENSET_TICK_Msk);
+    nrf_systick_val_clear();
-    nrf_rtc_task_trigger (NRF_RTC_REG, NRF_RTC_TASK_CLEAR);
+    nrf_systick_csr_set(NRF_SYSTICK_CSR_CLKSOURCE_CPU | NRF_SYSTICK_CSR_TICKINT_ENABLE
-    nrf_rtc_task_trigger (NRF_RTC_REG, NRF_RTC_TASK_START);
+                        | NRF_SYSTICK_CSR_ENABLE);
-    nrf_rtc_event_enable(NRF_RTC_REG, RTC_EVTEN_OVRFLW_Msk);
-
-    NVIC_SetPriority(NRF_RTC_IRQn, 0xF);
-    NVIC_EnableIRQ(NRF_RTC_IRQn);
-}
-
-static rt_tick_t _tick_distance(void)
-{
-    nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
-
-    uint32_t systick_counter = nrf_rtc_counter_get(NRF_RTC_REG);
-    nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_TICK);
-
-    /* check for overflow in TICK counter */
-    if(nrf_rtc_event_pending(NRF_RTC_REG, NRF_RTC_EVENT_OVERFLOW))
-    {
-        nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_OVERFLOW);
-        m_tick_overflow_count++;
-    }
-
-    return ((m_tick_overflow_count << NRF_RTC_BITWIDTH) + systick_counter) - rt_tick_get();
-}
-
-void OSTick_Handler( void )
-{
-    uint32_t diff;
-
-	/* enter interrupt */
-    rt_interrupt_enter();
-    diff = _tick_distance();
-
-    while((diff--) > 0)
-    {
-        if (rt_thread_self() != RT_NULL)
-        {
-          rt_tick_increase();
-        }
-    }
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-
-static void _wakeup_tick_adjust(void)
-{
-    uint32_t diff;
-    uint32_t level;
-
-    level = rt_hw_interrupt_disable();
-
-    diff = _tick_distance();
-
-    rt_tick_set(rt_tick_get() + diff);
-
-    if (rt_thread_self() != RT_NULL)
-    {
-    	struct rt_thread *thread;
-
-        /* check time slice */
-        thread = rt_thread_self();
-
-        if (thread->remaining_tick <= diff)
-        {
-            /* change to initialized tick */
-            thread->remaining_tick = thread->init_tick;
-
-            /* yield */
-            rt_thread_yield();
-        }
-        else
-        {
-            thread->remaining_tick -= diff;
-        }
-
-        /* check timer */
-        rt_timer_check();
-    }
-
-    rt_hw_interrupt_enable(level);
-}
-
-static void _sleep_ongo( uint32_t sleep_tick )
-{
-    uint32_t enterTime;
-    uint32_t entry_tick;
-
-    /* Make sure the SysTick reload value does not overflow the counter. */
-    if ( sleep_tick > NRF_RTC_MAXTICKS - EXPECTED_IDLE_TIME_BEFORE_SLEEP )
-    {
-        sleep_tick = NRF_RTC_MAXTICKS - EXPECTED_IDLE_TIME_BEFORE_SLEEP;
-    }
-
-    rt_enter_critical();
-
-    enterTime = nrf_rtc_counter_get(NRF_RTC_REG);
-
-    {
-        uint32_t wakeupTime = (enterTime + sleep_tick) & NRF_RTC_MAXTICKS;
-
-        /* Stop tick events */
-        nrf_rtc_int_disable(NRF_RTC_REG, NRF_RTC_INT_TICK_MASK);
-
-        /* Configure CTC interrupt */
-        nrf_rtc_cc_set(NRF_RTC_REG, 0, wakeupTime);
-        nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
-        nrf_rtc_int_enable(NRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK);
-
-        entry_tick = rt_tick_get();
-
-        __DSB();
-
-        if ( sleep_tick > 0 )
-        {
-#ifdef SOFTDEVICE_PRESENT
-            if (softdevice_handler_is_enabled())
-            {
-                uint32_t err_code = sd_app_evt_wait();
-                APP_ERROR_CHECK(err_code);
-            }
-            else
 #endif
-            {
-                /* No SD -  we would just block interrupts globally.
-                * BASEPRI cannot be used for that because it would prevent WFE from wake up.
-                */
-                do{
-                    __WFE();
-                } while (0 == (NVIC->ISPR[0] | NVIC->ISPR[1]));
-            }
-        }
-
-        nrf_rtc_int_disable(NRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK);
-        nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
-
-        _wakeup_tick_adjust();
-
-        /* Correct the system ticks */
-        {
-
-            nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_TICK);
-            nrf_rtc_int_enable (NRF_RTC_REG, NRF_RTC_INT_TICK_MASK);
-            /* It is important that we clear pending here so that our corrections are latest and in sync with tick_interrupt handler */
-            NVIC_ClearPendingIRQ(NRF_RTC_IRQn);
-        }
-
-        // rt_kprintf("entry tick:%u, expected:%u, current tick:%u\n", entry_tick, sleep_tick, rt_tick_get());
-    }
-
-    rt_exit_critical();
 }
 
 
-void rt_hw_system_powersave(void)
-{
-    uint32_t sleep_tick;
-
-    sleep_tick = rt_timer_next_timeout_tick() - rt_tick_get();
-
-    if ( sleep_tick >= EXPECTED_IDLE_TIME_BEFORE_SLEEP)
-    {
-        // rt_kprintf("sleep entry:%u\n", rt_tick_get());
-        _sleep_ongo( sleep_tick );
-    }
-}
-
 void rt_hw_board_init(void)
 {
+    rt_hw_interrupt_enable(0);
     // sd_power_dcdc_mode_set(NRF_POWER_DCDC_ENABLE);
     /* Activate deep sleep mode */
     SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
 
-    nrf_drv_clock_init();
-    // nrf_drv_clock_hfclk_request(0);
-
     SysTick_Configuration();
 
-    rt_thread_idle_sethook(rt_hw_system_powersave);
+#if defined(RT_USING_HEAP)
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
+#endif
 
+#ifdef RT_USING_SERIAL
     rt_hw_uart_init();
+#endif
 
 #ifdef RT_USING_CONSOLE
     rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
@@ -223,5 +113,20 @@ void rt_hw_board_init(void)
 #ifdef RT_USING_COMPONENTS_INIT
     rt_components_board_init();
 #endif
+
+#ifdef BSP_USING_SOFTDEVICE
+    extern uint32_t  Image$$RW_IRAM1$$Base;
+    uint32_t const *const m_ram_start  = &Image$$RW_IRAM1$$Base;
+    if ((uint32_t)m_ram_start == 0x20000000)
+    {
+        rt_kprintf("\r\n using softdevice the RAM couldn't be %p,please use the templete from package\r\n", m_ram_start);
+        while (1);
+    }
+    else
+    {
+        rt_kprintf("\r\n using softdevice the RAM at %p\r\n", m_ram_start);
+    }
+#endif
+
 }
 

bsp/nrf5x/nrf52832/board/board.h

@@ -2,10 +2,26 @@
 #define _BOARD_H_
 
 #include <rtthread.h>
-
+#include <rthw.h>
 #include "nrf.h"
 
-#define CHIP_SRAM_END       (0x20000000 + 64*1024)
+#define MCU_FLASH_SIZE MCU_FLASH_SIZE_KB*1024
+#define MCU_FLASH_END_ADDRESS        ((uint32_t)(MCU_FLASH_START_ADDRESS + MCU_FLASH_SIZE))
+#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
+#define MCU_SRAM_END_ADDRESS        (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
+
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
+#else
+extern int __bss_end;
+#define HEAP_BEGIN      ((void *)&__bss_end)
+#endif
+
+#define HEAP_END       (0x20000000 + 64*1024)
 
 void rt_hw_board_init(void);
 

bsp/nrf5x/nrf52832/board/linker_scripts/link.sct

@@ -2,13 +2,13 @@
 ; *** Scatter-Loading Description File generated by uVision ***
 ; *************************************************************
 
-LR_IROM1 0x0001F000 0x00061000  {    ; load region size_region
+LR_IROM1 0x00000000 0x100000  {    ; load region size_region
-  ER_IROM1 0x0001F000 0x00061000  {  ; load address = execution address
+  ER_IROM1 0x00000000 0x100000  {  ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
   }
-  RW_IRAM1 0x200025F8 0x0000DA08  {  ; RW data
+  RW_IRAM1 0x20000000 0x40000  {  ; RW data
    .ANY (+RW +ZI)
   }
 }

bsp/nrf5x/nrf52832/board/nrfx_config.h

@@ -0,0 +1,47 @@
+/**
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef NRFX_CONFIG_H__
+#define NRFX_CONFIG_H__
+
+// TODO - temporary redirection
+#include <sdk_config.h>
+
+#endif // NRFX_CONFIG_H__

bsp/nrf5x/nrf52832/board/nrfx_glue.h

@@ -0,0 +1,269 @@
+/*
+ * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_GLUE_H__
+#define NRFX_GLUE_H__
+
+// THIS IS A TEMPLATE FILE.
+// It should be copied to a suitable location within the host environment into
+// which nrfx is integrated, and the following macros should be provided with
+// appropriate implementations.
+// And this comment should be removed from the customized file.
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include <stdbool.h>
+#include "nrf.h"
+/**
+ * @defgroup nrfx_glue nrfx_glue.h
+ * @{
+ * @ingroup nrfx
+ *
+ * @brief This file contains macros that should be implemented according to
+ *        the needs of the host environment into which @em nrfx is integrated.
+ */
+
+// Uncomment this line to use the standard MDK way of binding IRQ handlers
+// at linking time.
+#include <soc/nrfx_irqs.h>
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief Macro for placing a runtime assertion.
+ *
+ * @param expression Expression to be evaluated.
+ */
+#define NRFX_ASSERT(expression)
+
+/**
+ * @brief Macro for placing a compile time assertion.
+ *
+ * @param expression Expression to be evaluated.
+ */
+#define NRFX_STATIC_ASSERT(expression)
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief Macro for setting the priority of a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ * @param priority   Priority to be set.
+ */
+#define NRFX_IRQ_PRIORITY_SET(irq_number, priority)     NVIC_SetPriority(irq_number, priority)
+
+/**
+ * @brief Macro for enabling a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_ENABLE(irq_number)     NVIC_EnableIRQ(irq_number)
+
+/**
+ * @brief Macro for checking if a specific IRQ is enabled.
+ *
+ * @param irq_number IRQ number.
+ *
+ * @retval true  If the IRQ is enabled.
+ * @retval false Otherwise.
+ */
+#define NRFX_IRQ_IS_ENABLED(irq_number)  _NRFX_IRQ_IS_ENABLED(irq_number)
+static inline bool _NRFX_IRQ_IS_ENABLED(IRQn_Type irq_number)
+{
+    return 0 != (NVIC->ISER[irq_number / 32] & (1UL << (irq_number % 32)));
+}
+
+
+/**
+ * @brief Macro for disabling a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_DISABLE(irq_number)  _NRFX_IRQ_DISABLE(irq_number)
+static inline void _NRFX_IRQ_DISABLE(IRQn_Type irq_number)
+{
+    NVIC_DisableIRQ(irq_number);
+}
+
+
+/**
+ * @brief Macro for setting a specific IRQ as pending.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_PENDING_SET(irq_number)
+
+/**
+ * @brief Macro for clearing the pending status of a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_PENDING_CLEAR(irq_number)
+
+/**
+ * @brief Macro for checking the pending status of a specific IRQ.
+ *
+ * @retval true  If the IRQ is pending.
+ * @retval false Otherwise.
+ */
+#define NRFX_IRQ_IS_PENDING(irq_number)
+
+/** @brief Macro for entering into a critical section. */
+#define NRFX_CRITICAL_SECTION_ENTER()
+
+/** @brief Macro for exiting from a critical section. */
+#define NRFX_CRITICAL_SECTION_EXIT()
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief When set to a non-zero value, this macro specifies that
+ *        @ref nrfx_coredep_delay_us uses a precise DWT-based solution.
+ *        A compilation error is generated if the DWT unit is not present
+ *        in the SoC used.
+ */
+#define NRFX_DELAY_DWT_BASED    0
+
+/**
+ * @brief Macro for delaying the code execution for at least the specified time.
+ *
+ * @param us_time Number of microseconds to wait.
+ */
+#define NRFX_DELAY_US(us_time)
+
+//------------------------------------------------------------------------------
+
+/** @brief Atomic 32-bit unsigned type. */
+#define nrfx_atomic_t
+
+/**
+ * @brief Macro for storing a value to an atomic object and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value to store.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_STORE(p_data, value)
+
+/**
+ * @brief Macro for running a bitwise OR operation on an atomic object and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the OR operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_OR(p_data, value)
+
+/**
+ * @brief Macro for running a bitwise AND operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the AND operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_AND(p_data, value)
+
+/**
+ * @brief Macro for running a bitwise XOR operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the XOR operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_XOR(p_data, value)
+
+/**
+ * @brief Macro for running an addition operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the ADD operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_ADD(p_data, value)
+
+/**
+ * @brief Macro for running a subtraction operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the SUB operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_SUB(p_data, value)
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief When set to a non-zero value, this macro specifies that the
+ *        @ref nrfx_error_codes and the @ref nrfx_err_t type itself are defined
+ *        in a customized way and the default definitions from @c <nrfx_error.h>
+ *        should not be used.
+ */
+#define NRFX_CUSTOM_ERROR_CODES 0
+
+//------------------------------------------------------------------------------
+
+/** @brief Bitmask that defines DPPI channels that are reserved for use outside of the nrfx library. */
+#define NRFX_DPPI_CHANNELS_USED  0
+
+/** @brief Bitmask that defines DPPI groups that are reserved for use outside of the nrfx library. */
+#define NRFX_DPPI_GROUPS_USED    0
+
+/** @brief Bitmask that defines PPI channels that are reserved for use outside of the nrfx library. */
+#define NRFX_PPI_CHANNELS_USED  0
+
+/** @brief Bitmask that defines PPI groups that are reserved for use outside of the nrfx library. */
+#define NRFX_PPI_GROUPS_USED    0
+
+/** @brief Bitmask that defines EGU instances that are reserved for use outside of the nrfx library. */
+#define NRFX_EGUS_USED          0
+
+/** @brief Bitmask that defines TIMER instances that are reserved for use outside of the nrfx library. */
+#define NRFX_TIMERS_USED        0
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRFX_GLUE_H__

bsp/nrf5x/nrf52832/board/nrfx_log.h

@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_LOG_H__
+#define NRFX_LOG_H__
+
+// THIS IS A TEMPLATE FILE.
+// It should be copied to a suitable location within the host environment into
+// which nrfx is integrated, and the following macros should be provided with
+// appropriate implementations.
+// And this comment should be removed from the customized file.
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrfx_log nrfx_log.h
+ * @{
+ * @ingroup nrfx
+ *
+ * @brief This file contains macros that should be implemented according to
+ *        the needs of the host environment into which @em nrfx is integrated.
+ */
+
+/**
+ * @brief Macro for logging a message with the severity level ERROR.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_ERROR(format, ...)
+
+/**
+ * @brief Macro for logging a message with the severity level WARNING.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_WARNING(format, ...)
+
+/**
+ * @brief Macro for logging a message with the severity level INFO.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_INFO(format, ...)
+
+/**
+ * @brief Macro for logging a message with the severity level DEBUG.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_DEBUG(format, ...)
+
+
+/**
+ * @brief Macro for logging a memory dump with the severity level ERROR.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_ERROR(p_memory, length)
+
+/**
+ * @brief Macro for logging a memory dump with the severity level WARNING.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_WARNING(p_memory, length)
+
+/**
+ * @brief Macro for logging a memory dump with the severity level INFO.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_INFO(p_memory, length)
+
+/**
+ * @brief Macro for logging a memory dump with the severity level DEBUG.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_DEBUG(p_memory, length)
+
+
+/**
+ * @brief Macro for getting the textual representation of a given error code.
+ *
+ * @param[in] error_code Error code.
+ *
+ * @return String containing the textual representation of the error code.
+ */
+#define NRFX_LOG_ERROR_STRING_GET(error_code)
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRFX_LOG_H__

bsp/nrf5x/nrf52832/project.uvprojx

@@ -18,7 +18,7 @@
           <Vendor>Nordic Semiconductor</Vendor>
           <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.27.1</PackID>
           <PackURL>http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/</PackURL>
-          <Cpu>IRAM(0x20000000,0x10000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
+          <Cpu>IRAM(0x20000000,0x00010000) IROM(0x00000000,0x00080000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
           <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm))</FlashDriverDll>
@@ -274,8 +274,8 @@
               </OCR_RVCT3>
               <OCR_RVCT4>
                 <Type>1</Type>
-                <StartAddress>0x1f000</StartAddress>
+                <StartAddress>0x0</StartAddress>
-                <Size>0x61000</Size>
+                <Size>0x80000</Size>
               </OCR_RVCT4>
               <OCR_RVCT5>
                 <Type>1</Type>
@@ -299,8 +299,8 @@
               </OCR_RVCT8>
               <OCR_RVCT9>
                 <Type>0</Type>
-                <StartAddress>0x200025f8</StartAddress>
+                <StartAddress>0x20000000</StartAddress>
-                <Size>0xda08</Size>
+                <Size>0x10000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
@@ -315,7 +315,7 @@
             <Optim>1</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>1</OneElfS>
+            <OneElfS>0</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
@@ -336,9 +336,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls>--reduce_paths</MiscControls>
-              <Define>NRF52_PAN_55, NRF52_PAN_12, NRF52_PAN_15, NRF52_PAN_58, SWI_DISABLE0, SOFTDEVICE_PRESENT, NRF52_PAN_54, NRF52, BLE_STACK_SUPPORT_REQD, NRF52_PAN_51, NRF52_PAN_36, RTTHREAD, CONFIG_GPIO_AS_PINRESET, NRF52_PAN_64, NRF52_PAN_20, NRF52_PAN_74, NRF52832_XXAA, S132, NRF_SD_BLE_API_VERSION=4, NRF52_PAN_31, RT_USING_ARM_LIBC</Define>
+              <Define>USE_APP_CONFIG, NRF52832_XXAA, RT_USING_ARM_LIBC</Define>
               <Undefine></Undefine>
-              <IncludePath>.;..\..\..\include;applications;.;board;..\libraries\drivers;packages\Nordic_sdk-latest\components;packages\Nordic_sdk-latest\components\softdevice\common\softdevice_handler;packages\Nordic_sdk-latest\components\softdevice\s132\headers;packages\Nordic_sdk-latest\components\softdevice\s132\headers\nrf52;packages\Nordic_sdk-latest\components\ble\common;packages\Nordic_sdk-latest\components\ble\nrf_ble_gatt;packages\Nordic_sdk-latest\components\ble\ble_advertising;packages\Nordic_sdk-latest\components\ble\ble_services\ble_nus;packages\Nordic_sdk-latest\components;packages\Nordic_sdk-latest\components\device;packages\Nordic_sdk-latest\components\drivers_nrf\delay;packages\Nordic_sdk-latest\components\drivers_nrf\uart;packages\Nordic_sdk-latest\components\drivers_nrf\clock;packages\Nordic_sdk-latest\components\drivers_nrf\gpiote;packages\Nordic_sdk-latest\components\drivers_nrf\common;packages\Nordic_sdk-latest\components\drivers_nrf\hal;packages\Nordic_sdk-latest\components\drivers_nrf\pwm;packages\Nordic_sdk-latest\components\drivers_nrf\saadc;packages\Nordic_sdk-latest\components\libraries\util;packages\Nordic_sdk-latest\components\libraries\timer;packages\Nordic_sdk-latest\components\libraries\fstorage;packages\Nordic_sdk-latest\components\libraries\experimental_section_vars;packages\Nordic_sdk-latest\components\libraries\log;packages\Nordic_sdk-latest\components\libraries\log\src;packages\Nordic_sdk-latest\components\libraries\strerror;packages\Nordic_sdk-latest\components\toolchain\cmsis\include;packages\Nordic_sdk-latest\components\toolchain;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common</IncludePath>
+              <IncludePath>applications;.;..\libraries\cmsis\include;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\drivers;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common;packages\nrfx-v2.1.0;packages\nrfx-v2.1.0\drivers;packages\nrfx-v2.1.0\drivers\include;packages\nrfx-v2.1.0\mdk;packages\nrfx-v2.1.0\hal</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -354,7 +354,7 @@
             <uClangAs>0</uClangAs>
             <VariousControls>
               <MiscControls>--cpreproc_opts=-DBLE_STACK_SUPPORT_REQD,-DNRF_SD_BLE_API_VERSION=4,-DS132,-DSOFTDEVICE_PRESENT,-DSWI_DISABLE0,-DCONFIG_GPIO_AS_PINRESET,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_12,-DNRF52_PAN_15,-DNRF52_PAN_20,-DNRF52_PAN_31,-DNRF52_PAN_36,-DNRF52_PAN_51,-DNRF52_PAN_54,-DNRF52_PAN_55,-DNRF52_PAN_58,-DNRF52_PAN_64,-DNRF52_PAN_74</MiscControls>
-              <Define>BLE_STACK_SUPPORT_REQD NRF_SD_BLE_API_VERSION=4 S132 SOFTDEVICE_PRESENT SWI_DISABLE0 CONFIG_GPIO_AS_PINRESET NRF52 NRF52832_XXAA NRF52_PAN_12 NRF52_PAN_15 NRF52_PAN_20 NRF52_PAN_31 NRF52_PAN_36 NRF52_PAN_51 NRF52_PAN_54 NRF52_PAN_55 NRF52_PAN_58 NRF52_PAN_64 NRF52_PAN_74</Define>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -379,81 +379,6 @@
         </TargetArmAds>
       </TargetOption>
       <Groups>
-        <Group>
-          <GroupName>Kernel</GroupName>
-          <Files>
-            <File>
-              <FileName>clock.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\clock.c</FilePath>
-            </File>
-            <File>
-              <FileName>components.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\components.c</FilePath>
-            </File>
-            <File>
-              <FileName>device.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\device.c</FilePath>
-            </File>
-            <File>
-              <FileName>idle.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\idle.c</FilePath>
-            </File>
-            <File>
-              <FileName>ipc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\ipc.c</FilePath>
-            </File>
-            <File>
-              <FileName>irq.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\irq.c</FilePath>
-            </File>
-            <File>
-              <FileName>kservice.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\kservice.c</FilePath>
-            </File>
-            <File>
-              <FileName>mem.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\mem.c</FilePath>
-            </File>
-            <File>
-              <FileName>mempool.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\mempool.c</FilePath>
-            </File>
-            <File>
-              <FileName>object.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\object.c</FilePath>
-            </File>
-            <File>
-              <FileName>scheduler.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\scheduler.c</FilePath>
-            </File>
-            <File>
-              <FileName>signal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\signal.c</FilePath>
-            </File>
-            <File>
-              <FileName>thread.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\thread.c</FilePath>
-            </File>
-            <File>
-              <FileName>timer.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\timer.c</FilePath>
-            </File>
-          </Files>
-        </Group>
         <Group>
           <GroupName>Applications</GroupName>
           <Files>
@@ -462,171 +387,6 @@
               <FileType>1</FileType>
               <FilePath>applications\application.c</FilePath>
             </File>
-            <File>
-              <FileName>ble_nus_app.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>applications\ble_nus_app.c</FilePath>
-            </File>
-            <File>
-              <FileName>startup.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>applications\startup.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>Drivers</GroupName>
-          <Files>
-            <File>
-              <FileName>board.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>board\board.c</FilePath>
-            </File>
-            <File>
-              <FileName>drv_uart.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\libraries\drivers\drv_uart.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>BLE_STACK</GroupName>
-          <Files>
-            <File>
-              <FileName>ble_advdata.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\ble\common\ble_advdata.c</FilePath>
-            </File>
-            <File>
-              <FileName>ble_conn_params.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\ble\common\ble_conn_params.c</FilePath>
-            </File>
-            <File>
-              <FileName>ble_conn_state.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\ble\common\ble_conn_state.c</FilePath>
-            </File>
-            <File>
-              <FileName>ble_srv_common.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\ble\common\ble_srv_common.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_ble_gatt.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\ble\nrf_ble_gatt\nrf_ble_gatt.c</FilePath>
-            </File>
-            <File>
-              <FileName>ble_nus.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\ble\ble_services\ble_nus\ble_nus.c</FilePath>
-            </File>
-            <File>
-              <FileName>ble_advertising.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\ble\ble_advertising\ble_advertising.c</FilePath>
-            </File>
-            <File>
-              <FileName>softdevice_handler.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\softdevice\common\softdevice_handler\softdevice_handler.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>NRF_DRIVERS</GroupName>
-          <Files>
-            <File>
-              <FileName>nrf_saadc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\drivers_nrf\hal\nrf_saadc.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_drv_common.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\drivers_nrf\common\nrf_drv_common.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_drv_clock.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\drivers_nrf\clock\nrf_drv_clock.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_drv_gpiote.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\drivers_nrf\gpiote\nrf_drv_gpiote.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_drv_pwm.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\drivers_nrf\pwm\nrf_drv_pwm.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_drv_saadc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\drivers_nrf\saadc\nrf_drv_saadc.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_log_backend_serial.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\libraries\log\src\nrf_log_backend_serial.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_log_frontend.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\libraries\log\src\nrf_log_frontend.c</FilePath>
-            </File>
-            <File>
-              <FileName>app_timer_rtthread.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\libraries\timer\app_timer_rtthread.c</FilePath>
-            </File>
-            <File>
-              <FileName>app_error.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\libraries\util\app_error.c</FilePath>
-            </File>
-            <File>
-              <FileName>app_error_weak.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\libraries\util\app_error_weak.c</FilePath>
-            </File>
-            <File>
-              <FileName>app_util_platform.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\libraries\util\app_util_platform.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_assert.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\libraries\util\nrf_assert.c</FilePath>
-            </File>
-            <File>
-              <FileName>sdk_mapped_flags.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\libraries\util\sdk_mapped_flags.c</FilePath>
-            </File>
-            <File>
-              <FileName>fstorage.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\libraries\fstorage\fstorage.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_strerror.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\libraries\strerror\nrf_strerror.c</FilePath>
-            </File>
-            <File>
-              <FileName>system_nrf52.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\toolchain\system_nrf52.c</FilePath>
-            </File>
-            <File>
-              <FileName>arm_startup_nrf52.s</FileName>
-              <FileType>2</FileType>
-              <FilePath>packages\Nordic_sdk-latest\components\toolchain\arm\arm_startup_nrf52.s</FilePath>
-            </File>
           </Files>
         </Group>
         <Group>
@@ -709,6 +469,26 @@
             </File>
           </Files>
         </Group>
+        <Group>
+          <GroupName>Drivers</GroupName>
+          <Files>
+            <File>
+              <FileName>board.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>board\board.c</FilePath>
+            </File>
+            <File>
+              <FileName>drv_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\drivers\drv_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>drv_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\drivers\drv_gpio.c</FilePath>
+            </File>
+          </Files>
+        </Group>
         <Group>
           <GroupName>finsh</GroupName>
           <Files>
@@ -729,6 +509,81 @@
             </File>
           </Files>
         </Group>
+        <Group>
+          <GroupName>Kernel</GroupName>
+          <Files>
+            <File>
+              <FileName>clock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\clock.c</FilePath>
+            </File>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\components.c</FilePath>
+            </File>
+            <File>
+              <FileName>device.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\device.c</FilePath>
+            </File>
+            <File>
+              <FileName>idle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\idle.c</FilePath>
+            </File>
+            <File>
+              <FileName>ipc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\ipc.c</FilePath>
+            </File>
+            <File>
+              <FileName>irq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\irq.c</FilePath>
+            </File>
+            <File>
+              <FileName>kservice.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\kservice.c</FilePath>
+            </File>
+            <File>
+              <FileName>mem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\mem.c</FilePath>
+            </File>
+            <File>
+              <FileName>mempool.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\mempool.c</FilePath>
+            </File>
+            <File>
+              <FileName>object.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\object.c</FilePath>
+            </File>
+            <File>
+              <FileName>scheduler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\scheduler.c</FilePath>
+            </File>
+            <File>
+              <FileName>signal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\signal.c</FilePath>
+            </File>
+            <File>
+              <FileName>thread.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\thread.c</FilePath>
+            </File>
+            <File>
+              <FileName>timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\timer.c</FilePath>
+            </File>
+          </Files>
+        </Group>
         <Group>
           <GroupName>libc</GroupName>
           <Files>
@@ -754,6 +609,191 @@
             </File>
           </Files>
         </Group>
+        <Group>
+          <GroupName>nrfx</GroupName>
+          <Files>
+            <File>
+              <FileName>nrfx_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_clock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_clock.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_comp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_comp.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_dppi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_dppi.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_egu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_egu.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_gpiote.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_gpiote.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_i2s.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_i2s.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_ipc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_ipc.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_lpcomp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_lpcomp.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_nfct.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_nfct.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_nvmc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_nvmc.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_pdm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_pdm.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_power.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_power.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_ppi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_ppi.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_pwm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_pwm.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_qdec.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_qdec.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_rng.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_rng.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_rtc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_rtc.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_saadc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_saadc.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_spim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_spim.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_spis.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_spis.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_systick.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_systick.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_temp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_temp.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_timer.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_twi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_twi.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_twi_twim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_twi_twim.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_twim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_twim.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_twis.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_twis.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_uarte.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_uarte.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_usbd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_usbd.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_usbreg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_usbreg.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_wdt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_wdt.c</FilePath>
+            </File>
+            <File>
+              <FileName>system_nrf52.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\mdk\system_nrf52.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_startup_nrf52.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>packages\nrfx-v2.1.0\mdk\arm_startup_nrf52.s</FilePath>
+            </File>
+          </Files>
+        </Group>
       </Groups>
     </Target>
   </Targets>

bsp/nrf5x/nrf52832/rtconfig.h

@@ -46,6 +46,9 @@
 /* RT-Thread Components */
 
 #define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
 
 /* C++ features */
 
@@ -74,7 +77,6 @@
 #define RT_USING_DEVICE_IPC
 #define RT_PIPE_BUFSZ 512
 #define RT_USING_SERIAL
-#define RT_SERIAL_USING_DMA
 #define RT_SERIAL_RB_BUFSZ 64
 #define RT_USING_PIN
 
@@ -138,6 +140,8 @@
 
 /* peripheral libraries and drivers */
 
+#define PKG_USING_NRFX
+#define PKG_USING_NRFX_V210
 
 /* miscellaneous packages */
 
@@ -148,11 +152,25 @@
 /* Hardware Drivers Config */
 
 #define SOC_NRF52832
+#define SOC_NORDIC
 
 /* Onboard Peripheral Drivers */
 
+
 /* On-chip Peripheral Drivers */
 
+#define BSP_USING_GPIO
 #define BSP_USING_UART
+#define BSP_USING_UART0
+#define BSP_UART0_RX_PIN 8
+#define BSP_UART0_TX_PIN 6
+
+/* On-chip flash config */
+
+#define MCU_FLASH_START_ADDRESS 0x00000000
+#define MCU_FLASH_SIZE_KB 1024
+#define MCU_SRAM_START_ADDRESS 0x20000000
+#define MCU_SRAM_SIZE_KB 256
+#define MCU_FLASH_PAGE_SIZE 0x1000
 
 #endif

bsp/nrf5x/nrf52832/template.uvoptx

@@ -120,12 +120,12 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>JL2CM3</Key>
-          <Name>-U59401765 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000 -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
+          <Name>-U682327541 -O78 -S8 -ZTIFSpeedSel50000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000 -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>UL2CM3</Key>
-          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm))</Name>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN2 -FC4000 -FD20000000 -FF0nrf52xxx -FF1nrf52xxx_uicr -FL0200000 -FL11000 -FS00 -FS110001000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
       <Breakpoint/>

bsp/nrf5x/nrf52832/template.uvprojx

@@ -16,9 +16,9 @@
         <TargetCommonOption>
           <Device>nRF52832_xxAA</Device>
           <Vendor>Nordic Semiconductor</Vendor>
-          <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.24.1</PackID>
+          <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.27.1</PackID>
           <PackURL>http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/</PackURL>
-          <Cpu>IRAM(0x20000000,0x10000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
+          <Cpu>IRAM(0x20000000,0x00010000) IROM(0x00000000,0x00080000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
           <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm))</FlashDriverDll>
@@ -274,8 +274,8 @@
               </OCR_RVCT3>
               <OCR_RVCT4>
                 <Type>1</Type>
-                <StartAddress>0x1f000</StartAddress>
+                <StartAddress>0x0</StartAddress>
-                <Size>0x61000</Size>
+                <Size>0x80000</Size>
               </OCR_RVCT4>
               <OCR_RVCT5>
                 <Type>1</Type>
@@ -299,8 +299,8 @@
               </OCR_RVCT8>
               <OCR_RVCT9>
                 <Type>0</Type>
-                <StartAddress>0x200025f8</StartAddress>
+                <StartAddress>0x20000000</StartAddress>
-                <Size>0xda08</Size>
+                <Size>0x10000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
@@ -315,7 +315,7 @@
             <Optim>1</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>1</OneElfS>
+            <OneElfS>0</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
@@ -336,7 +336,7 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls>--reduce_paths</MiscControls>
-              <Define>BLE_STACK_SUPPORT_REQD NRF_SD_BLE_API_VERSION=4 S132 SOFTDEVICE_PRESENT SWI_DISABLE0 CONFIG_GPIO_AS_PINRESET NRF52 NRF52832_XXAA NRF52_PAN_12 NRF52_PAN_15 NRF52_PAN_20 NRF52_PAN_31 NRF52_PAN_36 NRF52_PAN_51 NRF52_PAN_54 NRF52_PAN_55 NRF52_PAN_58 NRF52_PAN_64 NRF52_PAN_74</Define>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -354,7 +354,7 @@
             <uClangAs>0</uClangAs>
             <VariousControls>
               <MiscControls>--cpreproc_opts=-DBLE_STACK_SUPPORT_REQD,-DNRF_SD_BLE_API_VERSION=4,-DS132,-DSOFTDEVICE_PRESENT,-DSWI_DISABLE0,-DCONFIG_GPIO_AS_PINRESET,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_12,-DNRF52_PAN_15,-DNRF52_PAN_20,-DNRF52_PAN_31,-DNRF52_PAN_36,-DNRF52_PAN_51,-DNRF52_PAN_54,-DNRF52_PAN_55,-DNRF52_PAN_58,-DNRF52_PAN_64,-DNRF52_PAN_74</MiscControls>
-              <Define>BLE_STACK_SUPPORT_REQD NRF_SD_BLE_API_VERSION=4 S132 SOFTDEVICE_PRESENT SWI_DISABLE0 CONFIG_GPIO_AS_PINRESET NRF52 NRF52832_XXAA NRF52_PAN_12 NRF52_PAN_15 NRF52_PAN_20 NRF52_PAN_31 NRF52_PAN_36 NRF52_PAN_51 NRF52_PAN_54 NRF52_PAN_55 NRF52_PAN_58 NRF52_PAN_64 NRF52_PAN_74</Define>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>

bsp/nrf5x/nrf52840/board/Kconfig

@@ -7,6 +7,12 @@ config SOC_NRF52840
     select RT_USING_USER_MAIN
     default y
 
+config SOC_NORDIC
+    bool 
+    config SOC_NORDIC
+    default y
+
+
 menu "Onboard Peripheral Drivers"
     config BSP_USING_JLINK_TO_USART
         bool "Enable JLINK TO USART (uart0|RX_PIN:8|TX_PIN:6)"
@@ -55,38 +61,142 @@ menu "On-chip Peripheral Drivers"
         bool "Enable GPIO"
         select RT_USING_PIN
         default y
+    menuconfig BSP_USING_PWM
+        bool "Enable PWM"
+        select RT_USING_PWM
+        default n
+        if BSP_USING_PWM
+                config NRFX_PWM_ENABLED
+                int 
+                default 1
+                config BSP_USING_PWM0
+                    bool "Enable PWM0 bus"
+                    default y
+                if BSP_USING_PWM0
+                    config NRFX_PWM0_ENABLED
+                    int 
+                    default 1
+                    config BSP_USING_PWM0_CH0
+                        int "PWM0 channel 0 pin number set"
+                        range 0 47
+                        default 13
+                    config BSP_USING_PWM0_CH1
+                        int "PWM0 channel 1 pin number set"
+                        range 0 47
+                        default 14
+                    config BSP_USING_PWM0_CH2
+                        int "PWM0 channel 2 pin number set"
+                        range 0 47
+                        default 15
+                    config BSP_USING_PWM0_CH3
+                        int "PWM0 channel 3 pin number set"
+                        range 0 47
+                        default 16
+                endif
+                config BSP_USING_PWM1
+                    bool "Enable PWM1 bus"
+                    default n
+                if BSP_USING_PWM1
+                    config NRFX_PWM1_ENABLED
+                    int 
+                    default 1
+                    config BSP_USING_PWM1_CH0
+                        int "PWM1 channel 0 pin number set"
+                        range 0 47
+                        default 13
+                    config BSP_USING_PWM1_CH1
+                        int "PWM1 channel 1 pin number set"
+                        range 0 47
+                        default 14
+                    config BSP_USING_PWM1_CH2
+                        int "PWM1 channel 2 pin number set"
+                        range 0 47
+                        default 15
+                    config BSP_USING_PWM1_CH3
+                        int "PWM1 channel 3 pin number set"
+                        range 0 47
+                        default 16
+                endif
+                config BSP_USING_PWM2
+                    bool "Enable PWM2 bus"
+                    default n
+                if BSP_USING_PWM2
+                    config NRFX_PWM2_ENABLED
+                    int 
+                    default 1
+                    config BSP_USING_PWM2_CH0
+                        int "PWM2 channel 0 pin number set"
+                        range 0 47
+                        default 13
+                    config BSP_USING_PWM2_CH1
+                        int "PWM2 channel 1 pin number set"
+                        range 0 47
+                        default 14
+                    config BSP_USING_PWM2_CH2
+                        int "PWM2 channel 2 pin number set"
+                        range 0 47
+                        default 15
+                    config BSP_USING_PWM2_CH3
+                        int "PWM2 channel 3 pin number set"
+                        range 0 47
+                        default 16
+                endif
+                config BSP_USING_PWM3
+                    bool "Enable PWM3 bus"
+                    default n
+                if BSP_USING_PWM3
+                    config NRFX_PWM3_ENABLED
+                    int 
+                    default 1
+                    config BSP_USING_PWM3_CH0
+                        int "PWM3 channel 0 pin number set"
+                        range 0 47
+                        default 13
+                    config BSP_USING_PWM3_CH1
+                        int "PWM3 channel 1 pin number set"
+                        range 0 47
+                        default 14
+                    config BSP_USING_PWM3_CH2
+                        int "PWM3 channel 2 pin number set"
+                        range 0 47
+                        default 15
+                    config BSP_USING_PWM3_CH3
+                        int "PWM3 channel 3 pin number set"
+                        range 0 47
+                        default 16
+                endif
+        endif
     menuconfig BSP_USING_SOFTDEVICE
         bool "Enable NRF SOFTDEVICE"
         select PKG_USING_NRF5X_SDK
+        select NRFX_CLOCK_ENABLED
         default n
 if BSP_USING_SOFTDEVICE
     config NRFX_CLOCK_ENABLED
-	int "NRFX_CLOCK_ENABLED"
+    int 
     default 1
     config NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
-	int "NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY"
+    int 
-    default 7
-	config NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
-	int "NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY"
     default 7
     config NRFX_RTC_ENABLED
-	int "NRFX_RTC_ENABLED"
+    int 
+    default 1
+    config NRFX_RTC1_ENABLED
+    int 
     default 1
     config NRF_CLOCK_ENABLED
-	int "NRF_CLOCK_ENABLED"
+    int 
     default 1
     config NRF_SDH_BLE_ENABLED
-	int "NRF_SDH_BLE_ENABLED"
+    int 
     default 1
     config NRF_SDH_ENABLED
-	int "NRF_SDH_ENABLED"
+    int 
     default 1
     config NRF_SDH_SOC_ENABLED
-	int "NRF_SDH_SOC_ENABLED"
+    int 
     default 1
-	
 endif
-
     menuconfig BSP_USING_UART
         bool "Enable UART"
         default y

bsp/nuvoton/libraries/m480/StdDriver/inc/nu_eadc.h

@@ -433,11 +433,12 @@ extern "C"
                          u32ModuleNum,\
                          u32Condition,\
                          u16CMPData,\
-                         u32MatchCount) ((eadc)->CMP[0] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
+                         u32MatchCount) ((eadc)->CMP[0] = (((eadc)->CMP[0] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
+                                                            (((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
                                                             (u32Condition) |\
                                                             ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
                                                             (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
-                                                            EADC_CMP_ADCMPEN_Msk))
+                                                            EADC_CMP_ADCMPEN_Msk)))
 
 /**
   * @brief Configure the comparator 1 and enable it.
@@ -458,11 +459,12 @@ extern "C"
                          u32ModuleNum,\
                          u32Condition,\
                          u16CMPData,\
-                         u32MatchCount) ((eadc)->CMP[1] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
+                         u32MatchCount) ((eadc)->CMP[1] = (((eadc)->CMP[1] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
+                                                            (((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
                                                             (u32Condition) |\
                                                             ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
                                                             (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
-                                                            EADC_CMP_ADCMPEN_Msk))
+                                                            EADC_CMP_ADCMPEN_Msk)))
 
 /**
   * @brief Configure the comparator 2 and enable it.
@@ -483,11 +485,12 @@ extern "C"
                          u32ModuleNum,\
                          u32Condition,\
                          u16CMPData,\
-                         u32MatchCount) ((eadc)->CMP[2] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
+                         u32MatchCount) ((eadc)->CMP[2] = (((eadc)->CMP[2] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
+                                                            (((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
                                                             (u32Condition) |\
                                                             ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
                                                             (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
-                                                            EADC_CMP_ADCMPEN_Msk))
+                                                            EADC_CMP_ADCMPEN_Msk)))
 
 /**
   * @brief Configure the comparator 3 and enable it.
@@ -508,11 +511,12 @@ extern "C"
                          u32ModuleNum,\
                          u32Condition,\
                          u16CMPData,\
-                         u32MatchCount) ((eadc)->CMP[3] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
+                         u32MatchCount) ((eadc)->CMP[3] = (((eadc)->CMP[3] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
+                                                            (((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
                                                             (u32Condition) |\
                                                             ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
                                                             (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
-                                                            EADC_CMP_ADCMPEN_Msk))
+                                                            EADC_CMP_ADCMPEN_Msk)))
 
 /**
   * @brief Enable the compare window mode.

bsp/nuvoton/libraries/m480/StdDriver/inc/nu_qspi.h

@@ -95,6 +95,15 @@ extern "C"
   */
 #define QSPI_TRIGGER_TX_PDMA(qspi)   ((qspi)->PDMACTL |= QSPI_PDMACTL_TXPDMAEN_Msk)
 
+/**
+  * @brief      Trigger TX and RX PDMA function.
+  * @param[in]  qspi The pointer of the specified QSPI module.
+  * @return     None.
+  * @details    Set TXPDMAEN bit and RXPDMAEN bit of QSPI_PDMACTL register to enable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define QSPI_TRIGGER_TX_RX_PDMA(qspi)   ((qspi)->PDMACTL |= (QSPI_PDMACTL_TXPDMAEN_Msk | QSPI_PDMACTL_RXPDMAEN_Msk))
+
 /**
   * @brief      Disable RX PDMA transfer.
   * @param[in]  qspi The pointer of the specified QSPI module.
@@ -113,6 +122,15 @@ extern "C"
   */
 #define QSPI_DISABLE_TX_PDMA(qspi) ( (qspi)->PDMACTL &= ~QSPI_PDMACTL_TXPDMAEN_Msk )
 
+/**
+  * @brief      Disable TX and RX PDMA transfer.
+  * @param[in]  qspi The pointer of the specified QSPI module.
+  * @return     None.
+  * @details    Clear TXPDMAEN bit and RXPDMAEN bit of QSPI_PDMACTL register to disable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define QSPI_DISABLE_TX_RX_PDMA(qspi) ( (qspi)->PDMACTL &= ~(QSPI_PDMACTL_TXPDMAEN_Msk | QSPI_PDMACTL_RXPDMAEN_Msk) )
+
 /**
   * @brief      Get the count of available data in RX FIFO.
   * @param[in]  qspi The pointer of the specified QSPI module.

bsp/nuvoton/libraries/m480/StdDriver/inc/nu_spi.h

@@ -133,6 +133,15 @@ extern "C"
   */
 #define SPI_TRIGGER_TX_PDMA(spi)   ((spi)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk)
 
+/**
+  * @brief      Trigger TX and RX PDMA function.
+  * @param[in]  spi The pointer of the specified SPI module.
+  * @return     None.
+  * @details    Set TXPDMAEN bit and RXPDMAEN bit of SPI_PDMACTL register to enable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define SPI_TRIGGER_TX_RX_PDMA(spi)   ((spi)->PDMACTL |= (SPI_PDMACTL_TXPDMAEN_Msk | SPI_PDMACTL_RXPDMAEN_Msk))
+
 /**
   * @brief      Disable RX PDMA transfer.
   * @param[in]  spi The pointer of the specified SPI module.
@@ -151,6 +160,15 @@ extern "C"
   */
 #define SPI_DISABLE_TX_PDMA(spi) ( (spi)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk )
 
+/**
+  * @brief      Disable TX and RX PDMA transfer.
+  * @param[in]  spi The pointer of the specified SPI module.
+  * @return     None.
+  * @details    Clear TXPDMAEN bit and RXPDMAEN bit of SPI_PDMACTL register to disable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define SPI_DISABLE_TX_RX_PDMA(spi) ( (spi)->PDMACTL &= ~(SPI_PDMACTL_TXPDMAEN_Msk | SPI_PDMACTL_RXPDMAEN_Msk) )
+
 /**
   * @brief      Get the count of available data in RX FIFO.
   * @param[in]  spi The pointer of the specified SPI module.

bsp/nuvoton/libraries/m480/StdDriver/inc/nu_usci_spi.h

@@ -361,6 +361,15 @@ extern "C"
   */
 #define USPI_TRIGGER_TX_PDMA(uspi)   ((uspi)->PDMACTL |= USPI_PDMACTL_TXPDMAEN_Msk|USPI_PDMACTL_PDMAEN_Msk)
 
+/**
+  * @brief      Trigger TX and RX PDMA function.
+  * @param[in]  uspi The pointer of the specified USCI_SPI module.
+  * @return     None.
+  * @details    Set TXPDMAEN bit and RXPDMAEN bit of USPI_PDMACTL register to enable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define USPI_TRIGGER_TX_RX_PDMA(uspi)   ((uspi)->PDMACTL |= USPI_PDMACTL_TXPDMAEN_Msk|USPI_PDMACTL_RXPDMAEN_Msk|USPI_PDMACTL_PDMAEN_Msk)
+
 /**
   * @brief      Disable RX PDMA transfer.
   * @param[in]  uspi The pointer of the specified USCI_SPI module.
@@ -379,6 +388,15 @@ extern "C"
   */
 #define USPI_DISABLE_TX_PDMA(uspi) ( (uspi)->PDMACTL &= ~USPI_PDMACTL_TXPDMAEN_Msk )
 
+/**
+  * @brief      Disable TX and RX PDMA transfer.
+  * @param[in]  uspi The pointer of the specified USCI_SPI module.
+  * @return     None.
+  * @details    Clear TXPDMAEN bit and RXPDMAEN bit of USPI_PDMACTL register to disable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define USPI_DISABLE_TX_RX_PDMA(uspi) ( (uspi)->PDMACTL &= ~(USPI_PDMACTL_TXPDMAEN_Msk | USPI_PDMACTL_RXPDMAEN_Msk))
+
 uint32_t USPI_Open(USPI_T *uspi, uint32_t u32MasterSlave, uint32_t u32SPIMode,  uint32_t u32DataWidth, uint32_t u32BusClock);
 void USPI_Close(USPI_T *uspi);
 void USPI_ClearRxBuf(USPI_T *uspi);

bsp/nuvoton/libraries/m480/rtt_port/Kconfig

@@ -57,7 +57,7 @@ config SOC_SERIES_M480
         select RT_USING_NETDEV
 
         config NU_EMAC_PDMA_MEMCOPY
-            bool "Use PDMA for data tranferring"
+            bool "Use PDMA for data transferring"
             select BSP_USING_PDMA
             depends on BSP_USING_EMAC
             default y
@@ -82,14 +82,15 @@ config SOC_SERIES_M480
 
     menuconfig BSP_USING_EADC
         bool "Enable Enhanced Analog-to-Digital Converter(EADC)"
+        select RT_USING_ADC
 
+        if BSP_USING_EADC
             config BSP_USING_EADC0
                 bool "Enable EADC0"
-            depends on BSP_USING_EADC && RT_USING_ADC
 
             config BSP_USING_EADC1
                 bool "Enable EADC1"
-            depends on BSP_USING_EADC && RT_USING_ADC
+        endif
 
     menuconfig BSP_USING_TMR
         bool "Enable Timer Controller(TIMER)"
@@ -371,12 +372,14 @@ config SOC_SERIES_M480
 
                 config BSP_USING_UI2C0
                     select RT_USING_I2C
+                    select BSP_USING_UI2C
                     bool "UI2C0"
                     help
                         Choose this option if you need I2C function mode.
 
                 config BSP_USING_USPI0
                     select RT_USING_SPI
+                    select BSP_USING_USPI
                     bool "USPI0"
                     help
                         Choose this option if you need SPI function mode.
@@ -391,7 +394,7 @@ config SOC_SERIES_M480
                 depends on BSP_USING_UUART0 && RT_SERIAL_USING_DMA
 
             config BSP_USING_USPI0_PDMA
-                bool "Use PDMA for data tranferring"
+                bool "Use PDMA for data transferring"
                 select BSP_USING_USPI_PDMA
                 depends on BSP_USING_USPI0
         endif
@@ -434,7 +437,7 @@ config SOC_SERIES_M480
                     depends on BSP_USING_UUART1 && RT_SERIAL_USING_DMA
 
                 config BSP_USING_USPI1_PDMA
-                    bool "Use PDMA for data tranferring"
+                    bool "Use PDMA for data transferring"
                     select BSP_USING_USPI_PDMA
                     depends on BSP_USING_USPI1
             endif
@@ -459,6 +462,10 @@ config SOC_SERIES_M480
             config NU_SDH_HOTPLUG
                 bool "Using HOTPLUG"
                 default y
+
+            config NU_SDH_MOUNT_ON_ROOT
+                bool "Mount on root"
+
         endif
 
     menuconfig BSP_USING_CAN
@@ -724,6 +731,7 @@ config SOC_SERIES_M480
         bool "Enable Quad Serial Peripheral Interface(QSPI)"
         select RT_USING_SPI
         select RT_USING_QSPI
+        select BSP_USING_SPI
 
         if BSP_USING_QSPI
            config BSP_USING_QSPI0
@@ -731,6 +739,7 @@ config SOC_SERIES_M480
 
            config BSP_USING_QSPI0_PDMA
                 bool "Enable PDMA for QSPI0"
+                select BSP_USING_SPI_PDMA
                 depends on BSP_USING_QSPI0
 
            config BSP_USING_QSPI1
@@ -738,6 +747,7 @@ config SOC_SERIES_M480
 
            config BSP_USING_QSPI1_PDMA
                 bool "Enable PDMA for QSPI1"
+                select BSP_USING_SPI_PDMA
                 depends on BSP_USING_QSPI1
         endif
 
@@ -857,7 +867,7 @@ config SOC_SERIES_M480
 
             if BSP_USING_CRC
                 config NU_CRC_USE_PDMA
-                bool "Use PDMA for data tranferring."
+                bool "Use PDMA for data transferring."
                 select BSP_USING_PDMA
                 default y
             endif

bsp/nuvoton/libraries/m480/rtt_port/drv_can.c

@@ -97,7 +97,7 @@ static struct nu_can nu_can_arr[] =
     },
 #endif
     {0}
-}; /* usart nu_usart */
+}; /* struct nu_can */
 
 /* Public functions ------------------------------------------------------------*/
 
@@ -112,7 +112,7 @@ static const struct rt_can_ops nu_can_ops =
 
 static const struct can_configure nu_can_default_config = NU_CAN_CONFIG_DEFAULT;
 
-/* Interrupt Handle Funtion  ----------------------------------------------------*/
+/* Interrupt Handle Function  ----------------------------------------------------*/
 #if defined(BSP_USING_CAN0)
 /* CAN0 interrupt entry */
 void CAN0_IRQHandler(void)
@@ -238,7 +238,7 @@ static rt_err_t nu_can_configure(struct rt_can_device *can, struct can_configure
     RT_ASSERT(can != RT_NULL);
     RT_ASSERT(cfg != RT_NULL);
 
-    /* Get base address of uart register */
+    /* Get base address of CAN register */
     CAN_T *can_base = ((nu_can_t)can)->can_base;
 
     RT_ASSERT(can_base != RT_NULL);
@@ -312,7 +312,7 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
 #ifdef RT_CAN_USING_HDR
     struct rt_can_filter_config *filter_cfg;
 #endif
-    /* Get base address of uart register */
+    /* Get base address of CAN register */
     CAN_T *can_base = ((nu_can_t)can)->can_base;
 
     RT_ASSERT(can_base != RT_NULL);
@@ -346,7 +346,6 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
         {
             /* Enable Status Change Interrupt  */
             CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
-            NVIC_SetPriority(((nu_can_t)can)->can_irq_n, (1 << __NVIC_PRIO_BITS) - 2);
             /* Enable NVIC interrupt. */
             NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
 
@@ -355,7 +354,6 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
         {
             /* Enable Error Status and Status Change Interrupt  */
             CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
-            NVIC_SetPriority(((nu_can_t)can)->can_irq_n, (1 << __NVIC_PRIO_BITS) - 2);
             /* Enable NVIC interrupt. */
             NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
         }
@@ -440,6 +438,9 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
         rt_memcpy(arg, &can->status, sizeof(can->status));
     }
     break;
+    default:
+       return -(RT_EINVAL);
+
     }
 
     return RT_EOK;
@@ -449,7 +450,7 @@ static int nu_can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_
 {
     STR_CANMSG_T tMsg;
     struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
-    /* Get base address of uart register */
+    /* Get base address of CAN register */
     CAN_T *can_base = ((nu_can_t)can)->can_base;
 
     RT_ASSERT(can_base != RT_NULL);
@@ -495,7 +496,7 @@ static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxn
 {
     STR_CANMSG_T tMsg;
     struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
-    /* Get base address of uart register */
+    /* Get base address of CAN register */
     CAN_T *can_base = ((nu_can_t)can)->can_base;
 
     RT_ASSERT(can_base != RT_NULL);
@@ -558,7 +559,7 @@ static int rt_hw_can_init(void)
         RT_ASSERT(ret == RT_EOK);
     }
 
-    return ret;
+    return (int)ret;
 }
 INIT_DEVICE_EXPORT(rt_hw_can_init);
 #endif  //#if defined(BSP_USING_CAN)

bsp/nuvoton/libraries/m480/rtt_port/drv_clk.c

@@ -165,8 +165,8 @@ static void pm_run(struct rt_pm *pm, rt_uint8_t mode)
 
     SYS_UnlockReg();
 
-    /* Switch run mdoe frequency using PLL + HXT if HXT is enabled.
+    /* Switch run mode frequency using PLL + HXT if HXT is enabled.
-       Otherwise, the systme clock will use PLL + HIRC. */
+       Otherwise, the system clock will use PLL + HIRC. */
     switch (mode)
     {
     case PM_RUN_MODE_HIGH_SPEED:
@@ -209,7 +209,7 @@ static void hw_timer_init(void)
     CLK_EnableModuleClock(PM_TIMER_MODULE);
     SYS_LockReg();
 
-    /* Initialise timer and enable wakeup function. */
+    /* Initialize timer and enable wakeup function. */
     TIMER_Open(PM_TIMER, TIMER_CONTINUOUS_MODE, 1);
     TIMER_SET_PRESCALE_VALUE(PM_TIMER, 0);
     TIMER_EnableInt(PM_TIMER);
@@ -262,7 +262,7 @@ static void pm_timer_start(struct rt_pm *pm, rt_uint32_t timeout)
     if (timeout == RT_TICK_MAX)
         return;
 
-    /* start pm timer to compenstate the os tick in power down mode */
+    /* start pm timer to compensate the os tick in power down mode */
     tick = pm_tick_from_os_tick(timeout);
     TIMER_SET_CMP_VALUE(PM_TIMER, tick);
     TIMER_Start(PM_TIMER);
@@ -277,7 +277,7 @@ static void pm_timer_stop(struct rt_pm *pm)
 }
 
 
-/* pm device driver initialise. */
+/* pm device driver initialize. */
 int rt_hw_pm_init(void)
 {
     rt_uint8_t timer_mask;

bsp/nuvoton/libraries/m480/rtt_port/drv_fmc.c

@@ -21,9 +21,9 @@
 #endif
 
 /* Private define ---------------------------------------------------------------*/
-#define NU_GETBYTE_OFST(addr)         ((addr&0x3)*8)
+#define NU_GETBYTE_OFST(addr)         (((addr)&0x3)*8)
-#define NU_GET_WALIGN(addr)           (addr&~0x3)
+#define NU_GET_WALIGN(addr)           ((addr)&~0x3)
-#define NU_GET_LSB2BIT(addr)          (addr&0x3)
+#define NU_GET_LSB2BIT(addr)          ((addr)&0x3)
 /* Private typedef --------------------------------------------------------------*/
 
 /* Private functions ------------------------------------------------------------*/
@@ -159,7 +159,8 @@ int nu_fmc_erase(long addr, size_t size)
     uint32_t addr_end = addr + size;
 
 #if defined(NU_SUPPORT_NONALIGN)
-    uint8_t *page_sdtemp = RT_NULL, *page_edtemp = RT_NULL;
+    uint8_t *page_sdtemp = RT_NULL; 
+    uint8_t *page_edtemp = RT_NULL;
 
 
     addrptr = addr & (FMC_FLASH_PAGE_SIZE - 1);
@@ -315,7 +316,7 @@ static int nu_fmc_init(void)
 
     g_mutex_fmc = rt_mutex_create("nu_fmc_lock", RT_IPC_FLAG_FIFO);
 
-    return RT_EOK;
+    return (int)RT_EOK;
 }
 INIT_APP_EXPORT(nu_fmc_init);
 

bsp/nuvoton/libraries/m480/rtt_port/drv_gpio.c

@@ -166,7 +166,7 @@ static rt_err_t nu_gpio_attach_irq(struct rt_device *device, rt_int32_t pin, rt_
     if ((irqindex = nu_find_irqindex(pin)) >= 0)
         goto exit_nu_gpio_attach_irq;
 
-    // Find avaiable index of pin in pool.
+    // Find available index of pin in pool.
     if ((irqindex = nu_cto(g_u32PinIrqMask)) < IRQ_MAX_NUM)  // Count Trailing Ones ==> Find First Zero
         goto exit_nu_gpio_attach_irq;
 

bsp/nuvoton/libraries/m480/rtt_port/drv_gpio.h

@@ -26,7 +26,7 @@ typedef enum
     NU_PORT_CNT,
 } nu_gpio_port;
 
-#define NU_GET_PININDEX(port, pin)        (port*16+pin)
+#define NU_GET_PININDEX(port, pin)        ((port)*16+(pin))
 #define NU_GET_PINS(rt_pin_index)         ((rt_pin_index) & 0x0000000F)
 #define NU_GET_PORT(rt_pin_index)         (((rt_pin_index)>>4) & 0x0000000F)
 #define NU_GET_PIN_MASK(nu_gpio_pin)      (1 << (nu_gpio_pin))

bsp/nuvoton/libraries/m480/rtt_port/drv_i2s.c

@@ -306,6 +306,10 @@ static rt_err_t nu_i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_ca
         } // switch (caps->sub_type)
         break;
 
+    default:
+        result = -RT_ERROR;
+        break;
+
     } // switch (caps->main_type)
 
     return result;
@@ -449,6 +453,9 @@ static rt_err_t nu_i2s_start(struct rt_audio_device *audio, int stream)
         LOG_I("Start record.");
     }
     break;
+
+    default:
+        return -RT_ERROR;
     }
 
     return RT_EOK;

bsp/nuvoton/libraries/m480/rtt_port/drv_qspi.c

@@ -12,6 +12,14 @@
 #include <rtconfig.h>
 
 #if defined(BSP_USING_QSPI)
+
+#define LOG_TAG                 "drv.qspi"
+#define DBG_ENABLE
+#define DBG_SECTION_NAME        LOG_TAG
+#define DBG_LEVEL               DBG_INFO
+#define DBG_COLOR
+#include <rtdbg.h>
+
 #include <rthw.h>
 #include <rtdef.h>
 
@@ -87,8 +95,8 @@ static rt_err_t nu_qspi_bus_configure(struct rt_spi_device *device,
                                       struct rt_spi_configuration *configuration)
 {
     struct nu_spi *spi_bus;
-    uint32_t u32SPIMode;
+    rt_uint32_t u32SPIMode;
-    uint32_t u32BusClock;
+    rt_uint32_t u32BusClock;
     rt_err_t ret = RT_EOK;
 
     RT_ASSERT(device != RT_NULL);
@@ -130,7 +138,7 @@ static rt_err_t nu_qspi_bus_configure(struct rt_spi_device *device,
     u32BusClock = QSPI_SetBusClock((QSPI_T *)spi_bus->spi_base, configuration->max_hz);
     if (configuration->max_hz > u32BusClock)
     {
-        rt_kprintf("%s clock max frequency is %dHz (!= %dHz)\n", spi_bus->name, u32BusClock, configuration->max_hz);
+        LOG_W("%s clock max frequency is %dHz (!= %dHz)\n", spi_bus->name, u32BusClock, configuration->max_hz);
         configuration->max_hz = u32BusClock;
     }
 
@@ -173,7 +181,7 @@ exit_nu_qspi_bus_configure:
 }
 
 #if defined(RT_SFUD_USING_QSPI)
-static int nu_qspi_mode_config(struct nu_spi *qspi_bus, uint8_t *tx, uint8_t *rx, int qspi_lines)
+static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8_t *rx, int qspi_lines)
 {
     QSPI_T *qspi_base = (QSPI_T *)qspi_bus->spi_base;
     if (qspi_lines > 1)
@@ -188,6 +196,9 @@ static int nu_qspi_mode_config(struct nu_spi *qspi_bus, uint8_t *tx, uint8_t *rx
             case 4:
                 QSPI_ENABLE_QUAD_OUTPUT_MODE(qspi_base);
                 break;
+            default:
+                LOG_E("Data line is not supported.\n");
+                break;
             }
         }
         else
@@ -200,6 +211,9 @@ static int nu_qspi_mode_config(struct nu_spi *qspi_bus, uint8_t *tx, uint8_t *rx
             case 4:
                 QSPI_ENABLE_QUAD_INPUT_MODE(qspi_base);
                 break;
+            default:
+                LOG_E("Data line is not supported.\n");
+                break;
             }
         }
     }
@@ -218,11 +232,11 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
     struct rt_qspi_configuration *qspi_configuration;
 #if defined(RT_SFUD_USING_QSPI)
     struct rt_qspi_message *qspi_message;
-    int last = 1;
+    rt_uint8_t u8last = 1;
 #endif
-    uint8_t bytes_per_word;
+    rt_uint8_t bytes_per_word;
     QSPI_T *qspi_base;
-    int len = 0;
+    rt_uint32_t u32len = 0;
 
     RT_ASSERT(device != RT_NULL);
     RT_ASSERT(message != RT_NULL);
@@ -252,9 +266,9 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
     /* Command stage */
     if (qspi_message->instruction.content != 0)
     {
-        last = nu_qspi_mode_config(qspi_bus, (uint8_t *) &qspi_message->instruction.content, RT_NULL, qspi_message->instruction.qspi_lines);
+        u8last = nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) &qspi_message->instruction.content, RT_NULL, qspi_message->instruction.qspi_lines);
         nu_spi_transfer((struct nu_spi *)qspi_bus,
-                        (uint8_t *) &qspi_message->instruction.content,
+                        (rt_uint8_t *) &qspi_message->instruction.content,
                         RT_NULL,
                         1,
                         1);
@@ -263,29 +277,29 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
     /* Address stage */
     if (qspi_message->address.size != 0)
     {
-        uint32_t u32ReversedAddr = 0;
+        rt_uint32_t u32ReversedAddr = 0;
-        uint32_t u32AddrNumOfByte = qspi_message->address.size / 8;
+        rt_uint32_t u32AddrNumOfByte = qspi_message->address.size / 8;
         switch (u32AddrNumOfByte)
         {
         case 1:
             u32ReversedAddr = (qspi_message->address.content & 0xff);
             break;
         case 2:
-            nu_set16_be((uint8_t *)&u32ReversedAddr, qspi_message->address.content);
+            nu_set16_be((rt_uint8_t *)&u32ReversedAddr, qspi_message->address.content);
             break;
         case 3:
-            nu_set24_be((uint8_t *)&u32ReversedAddr, qspi_message->address.content);
+            nu_set24_be((rt_uint8_t *)&u32ReversedAddr, qspi_message->address.content);
             break;
         case 4:
-            nu_set32_be((uint8_t *)&u32ReversedAddr, qspi_message->address.content);
+            nu_set32_be((rt_uint8_t *)&u32ReversedAddr, qspi_message->address.content);
             break;
         default:
             RT_ASSERT(0);
             break;
         }
-        last = nu_qspi_mode_config(qspi_bus, (uint8_t *)&u32ReversedAddr, RT_NULL, qspi_message->address.qspi_lines);
+        u8last = nu_qspi_mode_config(qspi_bus, (rt_uint8_t *)&u32ReversedAddr, RT_NULL, qspi_message->address.qspi_lines);
         nu_spi_transfer((struct nu_spi *)qspi_bus,
-                        (uint8_t *) &u32ReversedAddr,
+                        (rt_uint8_t *) &u32ReversedAddr,
                         RT_NULL,
                         u32AddrNumOfByte,
                         1);
@@ -294,32 +308,32 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
     /* Dummy_cycles stage */
     if (qspi_message->dummy_cycles != 0)
     {
-        qspi_bus->dummy = 0xff;
+        qspi_bus->dummy = 0x00;
 
-        last = nu_qspi_mode_config(qspi_bus, (uint8_t *) &qspi_bus->dummy, RT_NULL, last);
+        u8last = nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) &qspi_bus->dummy, RT_NULL, u8last);
         nu_spi_transfer((struct nu_spi *)qspi_bus,
-                        (uint8_t *) &qspi_bus->dummy,
+                        (rt_uint8_t *) &qspi_bus->dummy,
                         RT_NULL,
-                        qspi_message->dummy_cycles / (8 / last),
+                        qspi_message->dummy_cycles / (8 / u8last),
                         1);
     }
 
     /* Data stage */
-    nu_qspi_mode_config(qspi_bus, (uint8_t *) message->send_buf, (uint8_t *) message->recv_buf, qspi_message->qspi_data_lines);
+    nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) message->send_buf, (rt_uint8_t *) message->recv_buf, qspi_message->qspi_data_lines);
 #endif //#if defined(RT_SFUD_USING_QSPI)
 
     if (message->length != 0)
     {
         nu_spi_transfer((struct nu_spi *)qspi_bus,
-                        (uint8_t *) message->send_buf,
+                        (rt_uint8_t *) message->send_buf,
-                        (uint8_t *) message->recv_buf,
+                        (rt_uint8_t *) message->recv_buf,
                         message->length,
                         bytes_per_word);
-        len = message->length;
+        u32len = message->length;
     }
     else
     {
-        len = 1;
+        u32len = 1;
     }
 
     if (message->cs_release && !(qspi_configuration->parent.mode & RT_SPI_NO_CS))
@@ -334,12 +348,12 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
         }
     }
 
-    return len;
+    return u32len;
 }
 
-static int nu_qspi_register_bus(struct nu_spi *qspi_device, const char *name)
+static int nu_qspi_register_bus(struct nu_spi *qspi_bus, const char *name)
 {
-    return rt_qspi_bus_register(&qspi_device->dev, name, &nu_qspi_poll_ops);
+    return rt_qspi_bus_register(&qspi_bus->dev, name, &nu_qspi_poll_ops);
 }
 
 /**
@@ -347,19 +361,21 @@ static int nu_qspi_register_bus(struct nu_spi *qspi_device, const char *name)
  */
 static int rt_hw_qspi_init(void)
 {
-    int i;
+    rt_uint8_t i;
 
     for (i = (QSPI_START + 1); i < QSPI_CNT; i++)
     {
         nu_qspi_register_bus(&nu_qspi_arr[i], nu_qspi_arr[i].name);
-#if defined(BSP_USING_QSPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
         nu_qspi_arr[i].pdma_chanid_tx = -1;
         nu_qspi_arr[i].pdma_chanid_rx = -1;
+#endif
+#if defined(BSP_USING_QSPI_PDMA)
         if ((nu_qspi_arr[i].pdma_perp_tx != NU_PDMA_UNUSED) && (nu_qspi_arr[i].pdma_perp_rx != NU_PDMA_UNUSED))
         {
             if (nu_hw_spi_pdma_allocate(&nu_qspi_arr[i]) != RT_EOK)
             {
-                rt_kprintf("Failed to allocate DMA channels for %s. We will use poll-mode for this bus.\n", nu_qspi_arr[i].name);
+                LOG_E("Failed to allocate DMA channels for %s. We will use poll-mode for this bus.\n", nu_qspi_arr[i].name);
             }
         }
 #endif
@@ -381,7 +397,7 @@ rt_err_t nu_qspi_bus_attach_device(const char *bus_name, const char *device_name
     qspi_device = (struct rt_qspi_device *)rt_malloc(sizeof(struct rt_qspi_device));
     if (qspi_device == RT_NULL)
     {
-        rt_kprintf("no memory, qspi bus attach device failed!\n");
+        LOG_E("no memory, qspi bus attach device failed!\n");
         result = -RT_ENOMEM;
         goto __exit;
     }

bsp/nuvoton/libraries/m480/rtt_port/drv_scuart.c

@@ -1,24 +1,25 @@
 /**************************************************************************//**
-*
+ *
-* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
+ * @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
-*
+ *
-* SPDX-License-Identifier: Apache-2.0
+ * SPDX-License-Identifier: Apache-2.0
-*
+ *
-* Change Logs:
+ * Change Logs:
-* Date            Author       Notes
+ * Date            Author       Notes
-* 2020-5-31       Egbert       First version
+ * 2020-7-21       Egbert       First version
-*
+ *
-******************************************************************************/
+ ******************************************************************************/
 
 #include <rtconfig.h>
 
 #if defined(BSP_USING_SCUART)
 
+#include <NuMicro.h>
 #include <rtdevice.h>
 #include <rthw.h>
-#include <NuMicro.h>
 
-/* Private define ---------------------------------------------------------------*/
+/* Private definition
+ * ---------------------------------------------------------------*/
 #define LOG_TAG "drv.scuart"
 #define DBG_ENABLE
 #define DBG_SECTION_NAME "drv.scuart"
@@ -41,7 +42,8 @@ enum
     SCUART_CNT
 };
 
-/* Private typedef --------------------------------------------------------------*/
+/* Private typedef
+ * --------------------------------------------------------------*/
 struct nu_scuart
 {
     rt_serial_t dev;
@@ -49,21 +51,19 @@ struct nu_scuart
     SC_T *scuart_base;
     uint32_t scuart_rst;
     IRQn_Type scuart_irq_n;
-
 };
 typedef struct nu_scuart *nu_scuart_t;
 
-/* Private functions ------------------------------------------------------------*/
+/* Private functions
-static rt_err_t nu_scuart_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
+ * ------------------------------------------------------------*/
-static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd, void *arg);
+static rt_err_t nu_scuart_configure(struct rt_serial_device *serial,
+                                    struct serial_configure *cfg);
+static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd,
+                                  void *arg);
 static int nu_scuart_send(struct rt_serial_device *serial, char c);
 static int nu_scuart_receive(struct rt_serial_device *serial);
 static void nu_scuart_isr(nu_scuart_t serial);
 
-/* Public functions ------------------------------------------------------------*/
-
-/* Private variables ------------------------------------------------------------*/
-
 static const struct rt_uart_ops nu_scuart_ops =
 {
     .configure = nu_scuart_configure,
@@ -76,7 +76,7 @@ static const struct rt_uart_ops nu_scuart_ops =
 static const struct serial_configure nu_scuart_default_config =
         RT_SERIAL_CONFIG_DEFAULT;
 
-static struct nu_scuart nu_scuart_arr [] =
+static struct nu_scuart nu_scuart_arr[] =
 {
 #if defined(BSP_USING_SCUART0)
     {
@@ -108,7 +108,8 @@ static struct nu_scuart nu_scuart_arr [] =
     {0}
 }; /* scuart nu_scuart */
 
-/* Interrupt Handle Funtion  ----------------------------------------------------*/
+/* Interrupt Handle Function
+ * ----------------------------------------------------*/
 #if defined(BSP_USING_SCUART0)
 /* SCUART0 interrupt entry */
 void SC0_IRQHandler(void)
@@ -151,8 +152,6 @@ void SC2_IRQHandler(void)
 }
 #endif
 
-
-
 /**
  * All SCUART interrupt service routine
  */
@@ -177,9 +176,10 @@ static void nu_scuart_isr(nu_scuart_t serial)
 }
 
 /**
- * Configurae scuart port
+ * Configure scuart port
  */
-static rt_err_t nu_scuart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+static rt_err_t nu_scuart_configure(struct rt_serial_device *serial,
+                                    struct serial_configure *cfg)
 {
     rt_err_t ret = RT_EOK;
     uint32_t scuart_word_len = 0;
@@ -189,7 +189,7 @@ static rt_err_t nu_scuart_configure(struct rt_serial_device *serial, struct seri
     /* Get base address of scuart register */
     SC_T *scuart_base = ((nu_scuart_t)serial)->scuart_base;
 
-    /* Check baudrate */
+    /* Check baud rate */
     RT_ASSERT(cfg->baud_rate != 0);
 
     /* Check word len */
@@ -258,11 +258,12 @@ static rt_err_t nu_scuart_configure(struct rt_serial_device *serial, struct seri
     /* Reset this module */
     SYS_ResetModule(((nu_scuart_t)serial)->scuart_rst);
 
-    /* Open SCUART and set SCUART Baudrate */
+    /* Open SCUART and set SCUART baud rate */
     SCUART_Open(scuart_base, cfg->baud_rate);
 
     /* Set line configuration. */
-    SCUART_SetLineConfig(scuart_base, 0, scuart_word_len, scuart_parity, scuart_stop_bit);
+    SCUART_SetLineConfig(scuart_base, 0, scuart_word_len, scuart_parity,
+                         scuart_stop_bit);
 
     /* Enable NVIC interrupt. */
     NVIC_EnableIRQ(((nu_scuart_t)serial)->scuart_irq_n);
@@ -278,14 +279,14 @@ exit_nu_scuart_configure:
 /**
  * SCUART interrupt control
  */
-static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd, void *arg)
+static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd,
+                                  void *arg)
 {
     rt_err_t result = RT_EOK;
     rt_uint32_t flag;
     rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
 
     RT_ASSERT(serial != RT_NULL);
-    RT_ASSERT(arg != RT_NULL);
 
     /* Get base address of scuart register */
     SC_T *scuart_base = ((nu_scuart_t)serial)->scuart_base;
@@ -298,10 +299,6 @@ static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd, void
             flag = SC_INTEN_RDAIEN_Msk | SC_INTEN_RXTOIEN_Msk;
             SCUART_DISABLE_INT(scuart_base, flag);
         }
-        else if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) /* Disable DMA-RX */
-        {
-            LOG_E("SCUART does not support dma transmission");
-        }
         break;
 
     case RT_DEVICE_CTRL_SET_INT:
@@ -312,6 +309,21 @@ static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd, void
         }
         break;
 
+    case RT_DEVICE_CTRL_CLOSE:
+        /* Disable NVIC interrupt. */
+        NVIC_DisableIRQ(((nu_scuart_t)serial)->scuart_irq_n);
+
+        /* Reset this module */
+        SYS_ResetModule(((nu_scuart_t)serial)->scuart_rst);
+
+        /* Close SCUART port */
+        SCUART_Close(scuart_base);
+
+        break;
+
+    default:
+        result = -RT_EINVAL;
+        break;
     }
     return result;
 }
@@ -327,7 +339,8 @@ static int nu_scuart_send(struct rt_serial_device *serial, char c)
     SC_T *scuart_base = ((nu_scuart_t)serial)->scuart_base;
 
     /* Waiting if TX-FIFO is full. */
-    while (SCUART_IS_TX_FULL(scuart_base));
+    while (SCUART_IS_TX_FULL(scuart_base))
+        ;
 
     /* Put char into TX-FIFO */
     SCUART_WRITE(scuart_base, c);
@@ -371,7 +384,8 @@ static int rt_hw_scuart_init(void)
         nu_scuart_arr[i].dev.ops = &nu_scuart_ops;
         nu_scuart_arr[i].dev.config = nu_scuart_default_config;
 
-        ret = rt_hw_serial_register(&nu_scuart_arr[i].dev, nu_scuart_arr[i].name, flag, NULL);
+        ret = rt_hw_serial_register(&nu_scuart_arr[i].dev, nu_scuart_arr[i].name,
+                                    flag, NULL);
         RT_ASSERT(ret == RT_EOK);
     }
 

bsp/nuvoton/libraries/m480/rtt_port/drv_sdh.c

@@ -25,17 +25,30 @@
 #endif
 
 /* Private define ---------------------------------------------------------------*/
-// RT_DEV_NAME_PREFIX sdh
 
-#ifndef NU_SDH_MOUNTPOINT_ROOT
+#if defined(NU_SDH_MOUNT_ON_ROOT)
+
+    #if !defined(NU_SDH_MOUNTPOINT_SDH0)
+        #define NU_SDH_MOUNTPOINT_SDH0  "/"
+    #endif
+
+    #if !defined(NU_SDH_MOUNTPOINT_SDH1)
+        #define NU_SDH_MOUNTPOINT_SDH1  NU_SDH_MOUNTPOINT_SDH0"/sd1"
+    #endif
+
+#else
+
+    #if !defined(NU_SDH_MOUNTPOINT_ROOT)
         #define NU_SDH_MOUNTPOINT_ROOT  "/mnt"
+    #endif
+
 #endif
 
-#ifndef NU_SDH_MOUNTPOINT_SDH0
+#if !defined(NU_SDH_MOUNTPOINT_SDH0)
     #define NU_SDH_MOUNTPOINT_SDH0  NU_SDH_MOUNTPOINT_ROOT"/sd0"
 #endif
 
-#ifndef NU_SDH_MOUNTPOINT_SDH1
+#if !defined(NU_SDH_MOUNTPOINT_SDH1)
     #define NU_SDH_MOUNTPOINT_SDH1  NU_SDH_MOUNTPOINT_ROOT"/sd1"
 #endif
 
@@ -66,11 +79,9 @@ enum
 #if defined(NU_SDH_HOTPLUG)
 enum
 {
-    NU_SDH_CARD_INSERTED_SD0 = (1 << 0),
+    NU_SDH_CARD_DETECTED_SD0 = (1 << 0),
-    NU_SDH_CARD_REMOVED_SD0 = (1 << 1),
+    NU_SDH_CARD_DETECTED_SD1 = (1 << 1),
-    NU_SDH_CARD_INSERTED_SD1 = (1 << 2),
+    NU_SDH_CARD_EVENT_ALL = (NU_SDH_CARD_DETECTED_SD0 | NU_SDH_CARD_DETECTED_SD1)
-    NU_SDH_CARD_REMOVED_SD1 = (1 << 3),
-    NU_SDH_CARD_EVENT_ALL = (NU_SDH_CARD_INSERTED_SD0 | NU_SDH_CARD_REMOVED_SD0 | NU_SDH_CARD_INSERTED_SD1 | NU_SDH_CARD_REMOVED_SD1)
 };
 #endif
 
@@ -166,40 +177,12 @@ static void nu_sdh_isr(nu_sdh_t sdh)
 
     if (isr & SDH_INTSTS_CDIF_Msk)   // card detect
     {
-        /* SD interrupt status */
-        // it is work to delay 50 times for SD_CLK = 200KHz
-        {
-            int volatile i;         // delay 30 fail, 50 OK
-            for (i = 0; i < 0x500; i++); // delay to make sure got updated value from REG_SDISR.
-            isr = sdh_base->INTSTS;
-        }
-
-        if (isr & SDH_INTSTS_CDSTS_Msk)
-        {
-            /* Card removed */
 #if defined(NU_SDH_HOTPLUG)
         if (sdh->base == SDH0)
-                rt_event_send(&sdh_event, NU_SDH_CARD_REMOVED_SD0);
+            rt_event_send(&sdh_event, NU_SDH_CARD_DETECTED_SD0);
         else if (sdh->base == SDH1)
-                rt_event_send(&sdh_event, NU_SDH_CARD_REMOVED_SD1);
+            rt_event_send(&sdh_event, NU_SDH_CARD_DETECTED_SD1);
 #endif
-            sdh->info->IsCardInsert = FALSE;   // SDISR_CD_Card = 1 means card remove for GPIO mode
-            rt_memset((void *)sdh->info, 0, sizeof(SDH_INFO_T));
-        }
-        else
-        {
-            SDH_Open(sdh_base, CardDetect_From_GPIO);
-            if (!SDH_Probe(sdh_base))
-            {
-                /* Card inserted */
-#if defined(NU_SDH_HOTPLUG)
-                if (sdh->base == SDH0)
-                    rt_event_send(&sdh_event, NU_SDH_CARD_INSERTED_SD0);
-                else if (sdh->base == SDH1)
-                    rt_event_send(&sdh_event, NU_SDH_CARD_INSERTED_SD1);
-#endif
-            }
-        }
         /* Clear CDIF interrupt flag */
         SDH_CLR_INT_FLAG(sdh_base, SDH_INTSTS_CDIF_Msk);
     }
@@ -210,14 +193,14 @@ static void nu_sdh_isr(nu_sdh_t sdh)
         if (!(isr & SDH_INTSTS_CRC16_Msk))
         {
             /* CRC_16 error */
-            // handle CRC 16 error
+            // TODO: handle CRC 16 error
         }
         else if (!(isr & SDH_INTSTS_CRC7_Msk))
         {
             if (!pSD->R3Flag)
             {
                 /* CRC_7 error */
-                // handle CRC 7 error
+                // TODO: handle CRC 7 error
             }
         }
         /* Clear CRCIF interrupt flag */
@@ -502,6 +485,7 @@ static rt_err_t nu_sdh_hotplug_mount(nu_sdh_t sdh)
     {
         closedir(t);
     }
+#if !defined(NU_SDH_MOUNT_ON_ROOT)
     else
     {
 
@@ -523,6 +507,7 @@ static rt_err_t nu_sdh_hotplug_mount(nu_sdh_t sdh)
         }
 
     } //else
+#endif
 
     if ((ret = dfs_mount(sdh->name, sdh->mounted_point, "elm", 0, 0)) == 0)
     {
@@ -567,6 +552,29 @@ exit_nu_sdh_hotplug_unmount:
 
     return -(ret);
 }
+
+static void nu_card_detector(nu_sdh_t sdh)
+{
+    SDH_T *sdh_base = sdh->base;
+    unsigned int volatile isr = sdh_base->INTSTS;
+    if (isr & SDH_INTSTS_CDSTS_Msk)
+    {
+        /* Card removed */
+        sdh->info->IsCardInsert = FALSE;   // SDISR_CD_Card = 1 means card remove for GPIO mode
+        rt_memset((void *)sdh->info, 0, sizeof(SDH_INFO_T));
+        nu_sdh_hotplug_unmount(sdh);
+    }
+    else
+    {
+        SDH_Open(sdh_base, CardDetect_From_GPIO);
+        if (!SDH_Probe(sdh_base))
+        {
+            /* Card inserted */
+            nu_sdh_hotplug_mount(sdh);
+        }
+    }
+}
+
 static void sdh_hotplugger(void *param)
 {
     rt_uint32_t e;
@@ -586,24 +594,18 @@ static void sdh_hotplugger(void *param)
                           RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
                           RT_WAITING_FOREVER, &e) == RT_EOK)
         {
-            /* Debouce */
+            /* Debounce */
             rt_thread_delay(200);
             switch (e)
             {
 #if defined(BSP_USING_SDH0)
-            case NU_SDH_CARD_INSERTED_SD0:
+            case NU_SDH_CARD_DETECTED_SD0:
-                nu_sdh_hotplug_mount(&nu_sdh_arr[SDH0_IDX]);
+                nu_card_detector(&nu_sdh_arr[SDH0_IDX]);
-                break;
-            case NU_SDH_CARD_REMOVED_SD0:
-                nu_sdh_hotplug_unmount(&nu_sdh_arr[SDH0_IDX]);
                 break;
 #endif
 #if defined(BSP_USING_SDH1)
-            case NU_SDH_CARD_INSERTED_SD1:
+            case NU_SDH_CARD_DETECTED_SD1:
-                nu_sdh_hotplug_mount(&nu_sdh_arr[SDH1_IDX]);
+                nu_card_detector(&nu_sdh_arr[SDH1_IDX]);
-                break;
-            case NU_SDH_CARD_REMOVED_SD1:
-                nu_sdh_hotplug_unmount(&nu_sdh_arr[SDH1_IDX]);
                 break;
 #endif
             default:

bsp/nuvoton/libraries/m480/rtt_port/drv_softi2c.c

@@ -24,7 +24,6 @@
 #define DBG_ENABLE
 #define DBG_SECTION_NAME LOG_TAG
 #define DBG_LEVEL        DBG_INFO
-#define DBG_COLOR
 #include <rtdbg.h>
 
 #ifdef BSP_USING_SOFT_I2C0
@@ -58,7 +57,7 @@ struct nu_soft_i2c_config
     rt_uint8_t sda;
     const char *bus_name;
 };
-/* soft i2c dirver class */
+/* soft i2c driver class */
 struct nu_soft_i2c
 {
     struct rt_i2c_bit_ops ops;

bsp/nuvoton/libraries/m480/rtt_port/drv_spi.c

@@ -11,7 +11,15 @@
 ******************************************************************************/
 #include <rtconfig.h>
 
-#if defined(BSP_USING_SPI) || defined(BSP_USING_QSPI)
+#if defined(BSP_USING_SPI)
+
+#define LOG_TAG                 "drv.spi"
+#define DBG_ENABLE
+#define DBG_SECTION_NAME        LOG_TAG
+#define DBG_LEVEL               DBG_INFO
+#define DBG_COLOR
+#include <rtdbg.h>
+
 #include <rthw.h>
 #include <rtdevice.h>
 #include <rtdef.h>
@@ -22,7 +30,7 @@
 /* Private define ---------------------------------------------------------------*/
 
 #ifndef NU_SPI_USE_PDMA_MIN_THRESHOLD
-    #define NU_SPI_USE_PDMA_MIN_THRESHOLD 128
+    #define NU_SPI_USE_PDMA_MIN_THRESHOLD (128)
 #endif
 
 enum
@@ -52,9 +60,8 @@ static int nu_spi_register_bus(struct nu_spi *spi_bus, const char *name);
 static rt_uint32_t nu_spi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message);
 static rt_err_t nu_spi_bus_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration);
 
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
     static void nu_pdma_spi_rx_cb(void *pvUserData, uint32_t u32EventFilter);
-    static void nu_pdma_spi_tx_cb(void *pvUserData, uint32_t u32EventFilter);
     static rt_err_t nu_pdma_spi_rx_config(struct nu_spi *spi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word);
     static rt_err_t nu_pdma_spi_tx_config(struct nu_spi *spi_bus, const uint8_t *pu8Buf, int32_t i32SndLen, uint8_t bytes_per_word);
     static rt_size_t nu_spi_pdma_transmit(struct nu_spi *spi_bus, const uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
@@ -63,10 +70,6 @@ static rt_err_t nu_spi_bus_configure(struct rt_spi_device *device, struct rt_spi
 void nu_spi_transfer(struct nu_spi *spi_bus, uint8_t *tx, uint8_t *rx, int length, uint8_t bytes_per_word);
 void nu_spi_drain_rxfifo(SPI_T *spi_base);
 
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA)
-    rt_err_t nu_hw_spi_pdma_allocate(struct nu_spi *spi_bus);
-#endif
-
 /* Private variables ------------------------------------------------------------*/
 static struct rt_spi_ops nu_spi_poll_ops =
 {
@@ -193,7 +196,7 @@ static rt_err_t nu_spi_bus_configure(struct rt_spi_device *device,
     u32BusClock = SPI_SetBusClock(spi_bus->spi_base, configuration->max_hz);
     if (configuration->max_hz > u32BusClock)
     {
-        rt_kprintf("%s clock max frequency is %dHz (!= %dHz)\n", spi_bus->name, u32BusClock, configuration->max_hz);
+        LOG_W("%s clock max frequency is %dHz (!= %dHz)\n", spi_bus->name, u32BusClock, configuration->max_hz);
         configuration->max_hz = u32BusClock;
     }
 
@@ -235,21 +238,14 @@ exit_nu_spi_bus_configure:
     return -(ret);
 }
 
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
 static void nu_pdma_spi_rx_cb(void *pvUserData, uint32_t u32EventFilter)
 {
-    struct nu_spi *spi_bus;
+    struct nu_spi *spi_bus = (struct nu_spi *)pvUserData;
-    spi_bus = (struct nu_spi *)pvUserData;
 
     RT_ASSERT(spi_bus != RT_NULL);
 
-    /* Get base address of spi register */
+    rt_sem_release(spi_bus->m_psSemBus);
-    SPI_T *spi_base = spi_bus->spi_base;
-
-    if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
-    {
-        SPI_DISABLE_RX_PDMA(spi_base);  // Stop DMA TX transfer
-    }
 }
 static rt_err_t nu_pdma_spi_rx_config(struct nu_spi *spi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word)
 {
@@ -299,24 +295,6 @@ exit_nu_pdma_spi_rx_config:
     return result;
 }
 
-static void nu_pdma_spi_tx_cb(void *pvUserData, uint32_t u32EventFilter)
-{
-    struct nu_spi *spi_bus;
-    spi_bus = (struct nu_spi *)pvUserData;
-
-    RT_ASSERT(spi_bus != RT_NULL);
-
-    /* Get base address of spi register */
-    SPI_T *spi_base = spi_bus->spi_base;
-
-    if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
-    {
-        SPI_DISABLE_TX_PDMA(spi_base);  // Stop DMA TX transfer
-    }
-    rt_sem_release(spi_bus->m_psSemBus);
-
-}
-
 static rt_err_t nu_pdma_spi_tx_config(struct nu_spi *spi_bus, const uint8_t *pu8Buf, int32_t i32SndLen, uint8_t bytes_per_word)
 {
     rt_err_t result = RT_EOK;
@@ -328,15 +306,6 @@ static rt_err_t nu_pdma_spi_tx_config(struct nu_spi *spi_bus, const uint8_t *pu8
 
     rt_uint8_t spi_pdma_tx_chid = spi_bus->pdma_chanid_tx;
 
-    result = nu_pdma_callback_register(spi_pdma_tx_chid,
-                                       nu_pdma_spi_tx_cb,
-                                       (void *)spi_bus,
-                                       NU_PDMA_EVENT_TRANSFER_DONE);
-    if (result != RT_EOK)
-    {
-        goto exit_nu_pdma_spi_tx_config;
-    }
-
     if (pu8Buf == RT_NULL)
     {
         spi_bus->dummy = 0;
@@ -382,14 +351,14 @@ static rt_size_t nu_spi_pdma_transmit(struct nu_spi *spi_bus, const uint8_t *sen
     result = nu_pdma_spi_tx_config(spi_bus, send_addr, length, bytes_per_word);
     RT_ASSERT(result == RT_EOK);
 
-    /* Trigger TX/RX at the same time. */
+    /* Trigger TX/RX PDMA transfer. */
-    SPI_TRIGGER_TX_PDMA(spi_base);
+    SPI_TRIGGER_TX_RX_PDMA(spi_base);
-    SPI_TRIGGER_RX_PDMA(spi_base);
 
-    /* Wait PDMA transfer done */
+    /* Wait RX-PDMA transfer done */
     rt_sem_take(spi_bus->m_psSemBus, RT_WAITING_FOREVER);
 
-    while (SPI_IS_BUSY(spi_base));
+    /* Stop TX/RX DMA transfer. */
+    SPI_DISABLE_TX_RX_PDMA(spi_base);
 
     return result;
 }
@@ -416,7 +385,7 @@ exit_nu_hw_spi_pdma_allocate:
 
     return -(RT_ERROR);
 }
-#endif /* #if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA) */
+#endif /* #if defined(BSP_USING_SPI_PDMA) */
 
 void nu_spi_drain_rxfifo(SPI_T *spi_base)
 {
@@ -432,11 +401,11 @@ void nu_spi_drain_rxfifo(SPI_T *spi_base)
 static int nu_spi_read(SPI_T *spi_base, uint8_t *recv_addr, uint8_t bytes_per_word)
 {
     int size = 0;
-    uint32_t val;
 
     // Read RX data
     if (!SPI_GET_RX_FIFO_EMPTY_FLAG(spi_base))
     {
+        uint32_t val;
         // Read data from SPI RX FIFO
         switch (bytes_per_word)
         {
@@ -455,6 +424,9 @@ static int nu_spi_read(SPI_T *spi_base, uint8_t *recv_addr, uint8_t bytes_per_wo
         case 1:
             *recv_addr = SPI_READ_RX(spi_base);
             break;
+        default:
+            LOG_E("Data length is not supported.\n");
+            break;
         }
         size = bytes_per_word;
     }
@@ -481,6 +453,9 @@ static int nu_spi_write(SPI_T *spi_base, const uint8_t *send_addr, uint8_t bytes
     case 1:
         SPI_WRITE_TX(spi_base, *((uint8_t *)send_addr));
         break;
+    default:
+        LOG_E("Data length is not supported.\n");
+        break;
     }
 
     return bytes_per_word;
@@ -534,7 +509,7 @@ static void nu_spi_transmission_with_poll(struct nu_spi *spi_bus,
         }
     } // else
 
-    /* Wait RX or drian RX-FIFO */
+    /* Wait RX or drain RX-FIFO */
     if (recv_addr)
     {
         // Wait SPI transmission done
@@ -565,8 +540,8 @@ void nu_spi_transfer(struct nu_spi *spi_bus, uint8_t *tx, uint8_t *rx, int lengt
 #if defined(BSP_USING_SPI_PDMA)
     /* DMA transfer constrains */
     if ((spi_bus->pdma_chanid_rx >= 0) &&
-            (!(uint32_t)tx % bytes_per_word) &&
+            !((uint32_t)tx % bytes_per_word) &&
-            (!(uint32_t)rx % bytes_per_word) &&
+            !((uint32_t)rx % bytes_per_word) &&
             (bytes_per_word != 3) &&
             (length >= NU_SPI_USE_PDMA_MIN_THRESHOLD))
         nu_spi_pdma_transmit(spi_bus, tx, rx, length, bytes_per_word);
@@ -594,7 +569,7 @@ static rt_uint32_t nu_spi_bus_xfer(struct rt_spi_device *device, struct rt_spi_m
     if ((message->length % bytes_per_word) != 0)
     {
         /* Say bye. */
-        rt_kprintf("%s: error payload length(%d%%%d != 0).\n", spi_bus->name, message->length, bytes_per_word);
+        LOG_E("%s: error payload length(%d%%%d != 0).\n", spi_bus->name, message->length, bytes_per_word);
         return 0;
     }
 
@@ -653,7 +628,7 @@ static int rt_hw_spi_init(void)
         {
             if (nu_hw_spi_pdma_allocate(&nu_spi_arr[i]) != RT_EOK)
             {
-                rt_kprintf("Failed to allocate DMA channels for %s. We will use poll-mode for this bus.\n", nu_spi_arr[i].name);
+                LOG_W("Failed to allocate DMA channels for %s. We will use poll-mode for this bus.\n", nu_spi_arr[i].name);
             }
         }
 #endif

bsp/nuvoton/libraries/m480/rtt_port/drv_spi.h

@@ -13,11 +13,13 @@
 #ifndef __DRV_SPI_H__
 #define __DRV_SPI_H__
 
+#include <rtconfig.h>
+
 #include <rtdevice.h>
 #include <NuMicro.h>
 #include <nu_bitutil.h>
 
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
     #include <drv_pdma.h>
 #endif
 
@@ -27,7 +29,7 @@ struct nu_spi
     char *name;
     SPI_T *spi_base;
     uint32_t dummy;
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_SPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
     int16_t pdma_perp_tx;
     int8_t  pdma_chanid_tx;
     int16_t pdma_perp_rx;
@@ -42,7 +44,7 @@ typedef struct nu_spi *nu_spi_t;
 void nu_spi_drain_rxfifo(SPI_T *spi_base);
 void nu_spi_transfer(struct nu_spi *spi_bus, uint8_t *tx, uint8_t *rx, int length, uint8_t bytes_per_word);
 
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_SPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
     rt_err_t nu_hw_spi_pdma_allocate(struct nu_spi *spi_bus);
 #endif
 

bsp/nuvoton/libraries/m480/rtt_port/drv_tpwm.c

@@ -19,7 +19,6 @@
 #define DBG_ENABLE
 #define DBG_SECTION_NAME        LOG_TAG
 #define DBG_LEVEL               DBG_INFO
-#define DBG_COLOR
 #define TPWM_CHANNEL_NUM        2
 #include <rtdbg.h>
 

bsp/nuvoton/libraries/m480/rtt_port/drv_uart.c

@@ -291,7 +291,7 @@ static struct nu_uart nu_uart_arr [] =
     {0}
 }; /* uart nu_uart */
 
-/* Interrupt Handle Funtion  ----------------------------------------------------*/
+/* Interrupt Handle Function  ----------------------------------------------------*/
 #if defined(BSP_USING_UART0)
 /* UART0 interrupt entry */
 void UART0_IRQHandler(void)
@@ -419,6 +419,8 @@ static void nu_uart_isr(nu_uart_t serial)
 #if defined(RT_SERIAL_USING_DMA)
     if (u32IntSts & UART_INTSTS_HWRLSIF_Msk)
     {
+        /* Drain RX FIFO to remove remain FEF frames in FIFO. */
+        uart_base->FIFO |= UART_FIFO_RXRST_Msk;
         uart_base->FIFOSTS |= (UART_FIFOSTS_BIF_Msk | UART_FIFOSTS_FEF_Msk | UART_FIFOSTS_PEF_Msk);
         return;
     }
@@ -434,7 +436,7 @@ static void nu_uart_isr(nu_uart_t serial)
 }
 
 /**
- * Configurae uart port
+ * Configure uart port
  */
 static rt_err_t nu_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
 {
@@ -544,6 +546,10 @@ static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t
                                        nu_pdma_uart_rx_cb,
                                        (void *)serial,
                                        NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT);
+    if ( result != RT_EOK )
+    {
+        goto exit_nu_pdma_uart_rx_config;
+    }
 
     result = nu_pdma_transfer(((nu_uart_t)serial)->pdma_chanid_rx,
                               8,
@@ -551,17 +557,24 @@ static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t
                               (uint32_t)pu8Buf,
                               i32TriggerLen,
                               1000);  //Idle-timeout, 1ms
+    if ( result != RT_EOK )
+    {
+        goto exit_nu_pdma_uart_rx_config;
+    }
 
     /* Enable Receive Line interrupt & Start DMA RX transfer. */
     UART_ENABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk);
     UART_PDMA_ENABLE(uart_base, UART_INTEN_RXPDMAEN_Msk);
 
+
+exit_nu_pdma_uart_rx_config:
+
     return result;
 }
 
 static void nu_pdma_uart_rx_cb(void *pvOwner, uint32_t u32Events)
 {
-    rt_size_t recv_len=0;
+    rt_size_t recv_len = 0;
     rt_size_t transferred_rxbyte = 0;
     struct rt_serial_device *serial = (struct rt_serial_device *)pvOwner;
     nu_uart_t puart = (nu_uart_t)serial;
@@ -715,7 +728,6 @@ static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void *
     rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
 
     RT_ASSERT(serial != RT_NULL);
-    RT_ASSERT(arg != RT_NULL);
 
     /* Get base address of uart register */
     UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
@@ -763,6 +775,27 @@ static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void *
         break;
 #endif
 
+    case RT_DEVICE_CTRL_CLOSE:
+        /* Disable NVIC interrupt. */
+        NVIC_DisableIRQ(((nu_uart_t)serial)->uart_irq_n);
+
+#if defined(RT_SERIAL_USING_DMA)
+        nu_pdma_channel_terminate(((nu_uart_t)serial)->pdma_chanid_tx);
+        nu_pdma_channel_terminate(((nu_uart_t)serial)->pdma_chanid_rx);
+#endif
+
+        /* Reset this module */
+        SYS_ResetModule(((nu_uart_t)serial)->uart_rst);
+
+        /* Close UART port */
+        UART_Close(uart_base);
+
+        break;
+
+    default:
+        result = -RT_EINVAL;
+        break;
+
     }
     return result;
 }

bsp/nuvoton/libraries/m480/rtt_port/drv_ui2c.c

@@ -22,7 +22,6 @@
 #define DBG_ENABLE
 #define DBG_SECTION_NAME LOG_TAG
 #define DBG_LEVEL        DBG_INFO
-#define DBG_COLOR
 #include <rtdbg.h>
 
 #define SLV_10BIT_ADDR (0x1E<<2)             //1111+0xx+r/w
@@ -110,7 +109,7 @@ static rt_err_t nu_ui2c_send_address(nu_ui2c_bus_t *nu_ui2c,
         LOG_D("addr1: %d, addr2: %d\n", addr1, addr2);
 
         ret = nu_ui2c_send_data(nu_ui2c, addr1);
-        if (ret != RT_EOK) //for timeout conditrion
+        if (ret != RT_EOK) //for timeout condition
             return -RT_EIO;
 
         if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_ACKIF_Msk) != UI2C_PROTSTS_ACKIF_Msk) && !ignore_nack)
@@ -122,7 +121,7 @@ static rt_err_t nu_ui2c_send_address(nu_ui2c_bus_t *nu_ui2c,
         UI2C_CLR_PROT_INT_FLAG(nu_ui2c->ui2c_base, UI2C_PROTSTS_ACKIF_Msk);
 
         ret = nu_ui2c_send_data(nu_ui2c,  addr2);
-        if (ret != RT_EOK) //for timeout conditrion
+        if (ret != RT_EOK) //for timeout condition
             return -RT_EIO;
 
         if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_ACKIF_Msk) != UI2C_PROTSTS_ACKIF_Msk) && !ignore_nack)
@@ -139,7 +138,7 @@ static rt_err_t nu_ui2c_send_address(nu_ui2c_bus_t *nu_ui2c,
 
             UI2C_SET_CONTROL_REG(nu_ui2c->ui2c_base, (UI2C_CTL_PTRG | UI2C_CTL_STA));
             ret = nu_ui2c_wait_ready_with_timeout(nu_ui2c);
-            if (ret != RT_EOK) //for timeout conditrion
+            if (ret != RT_EOK) //for timeout condition
                 return -RT_EIO;
 
             if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_STARIF_Msk) != UI2C_PROTSTS_STARIF_Msk) && !ignore_nack)
@@ -150,16 +149,15 @@ static rt_err_t nu_ui2c_send_address(nu_ui2c_bus_t *nu_ui2c,
             }
             UI2C_CLR_PROT_INT_FLAG(nu_ui2c->ui2c_base, UI2C_PROTSTS_STARIF_Msk);
 
-            addr1 |= 0x01;
+            addr1 |= RT_I2C_RD;
 
             ret = nu_ui2c_send_data(nu_ui2c,  addr1);
-            if (ret != RT_EOK) //for timeout conditrion
+            if (ret != RT_EOK) //for timeout condition
                 return -RT_EIO;
 
             if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_ACKIF_Msk) != UI2C_PROTSTS_ACKIF_Msk) && !ignore_nack)
             {
                 LOG_E("NACK: sending repeated addr\n");
-
                 return -RT_EIO;
             }
             UI2C_CLR_PROT_INT_FLAG(nu_ui2c->ui2c_base, UI2C_PROTSTS_ACKIF_Msk);
@@ -170,11 +168,11 @@ static rt_err_t nu_ui2c_send_address(nu_ui2c_bus_t *nu_ui2c,
         /* 7-bit addr */
         addr1 = msg->addr << 1;
         if (flags & RT_I2C_RD)
-            addr1 |= 1;
+            addr1 |= RT_I2C_RD;
 
         /* Send device address */
         ret = nu_ui2c_send_data(nu_ui2c,  addr1); /* Send Address */
-        if (ret != RT_EOK) //for timeout conditrion
+        if (ret != RT_EOK) //for timeout condition
             return -RT_EIO;
 
         if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_ACKIF_Msk) != UI2C_PROTSTS_ACKIF_Msk)
@@ -210,7 +208,7 @@ static rt_size_t nu_ui2c_mst_xfer(struct rt_i2c_bus_device *bus,
     UI2C_SET_CONTROL_REG(nu_ui2c->ui2c_base, UI2C_CTL_STA);
     ret = nu_ui2c_wait_ready_with_timeout(nu_ui2c);
 
-    if (ret != RT_EOK) //for timeout conditrion
+    if (ret != RT_EOK) //for timeout condition
     {
         rt_set_errno(-RT_ETIMEOUT);
         return 0;
@@ -235,7 +233,7 @@ static rt_size_t nu_ui2c_mst_xfer(struct rt_i2c_bus_device *bus,
             {
                 UI2C_SET_CONTROL_REG(nu_ui2c->ui2c_base, (UI2C_CTL_PTRG | UI2C_CTL_STA));/* Send repeat START */
                 ret = nu_ui2c_wait_ready_with_timeout(nu_ui2c);
-                if (ret != RT_EOK) //for timeout conditrion
+                if (ret != RT_EOK) //for timeout condition
                     break;
 
                 if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_STARIF_Msk) != UI2C_PROTSTS_STARIF_Msk)) /* Check Send repeat START */
@@ -272,7 +270,7 @@ static rt_size_t nu_ui2c_mst_xfer(struct rt_i2c_bus_device *bus,
                 }
 
                 ret = nu_ui2c_wait_ready_with_timeout(nu_ui2c);
-                if (ret != RT_EOK) //for timeout conditrion
+                if (ret != RT_EOK) //for timeout condition
                     break;
 
                 if (nu_ui2c->ui2c_base->PROTCTL & UI2C_CTL_AA)
@@ -303,12 +301,12 @@ static rt_size_t nu_ui2c_mst_xfer(struct rt_i2c_bus_device *bus,
             {
                 /* Send register number and MSB of data */
                 ret = nu_ui2c_send_data(nu_ui2c, (uint8_t)(nu_ui2c->msg[i].buf[cnt_data]));
-                if (ret != RT_EOK) //for timeout conditrion
+                if (ret != RT_EOK) //for timeout condition
                     break;
 
                 if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_ACKIF_Msk) != UI2C_PROTSTS_ACKIF_Msk)
                         && !ignore_nack
-                   ) /* Send aata and get Ack */
+                   ) /* Send data and get Ack */
                 {
                     i = 0;
                     break;
@@ -320,7 +318,7 @@ static rt_size_t nu_ui2c_mst_xfer(struct rt_i2c_bus_device *bus,
 
     UI2C_SET_CONTROL_REG(nu_ui2c->ui2c_base, (UI2C_CTL_PTRG | UI2C_CTL_STO));            /* Send STOP signal */
     ret = nu_ui2c_wait_ready_with_timeout(nu_ui2c);
-    if (ret != RT_EOK) //for timeout conditrion
+    if (ret != RT_EOK) //for timeout condition
     {
         rt_set_errno(-RT_ETIMEOUT);
         return 0;
@@ -357,8 +355,11 @@ int rt_hw_ui2c_init(void)
 
 #if defined(BSP_USING_UI2C0)
     /* Enable UI2C0 clock */
+    SYS_UnlockReg();
     CLK_EnableModuleClock(USCI0_MODULE);
     SYS_ResetModule(USCI0_RST);
+    SYS_LockReg();
+
     nu_ui2c0.ui2c_dev.ops = &nu_ui2c_ops;
     ret = rt_i2c_bus_device_register(&nu_ui2c0.ui2c_dev, nu_ui2c0.dev_name);
     RT_ASSERT(RT_EOK == ret);
@@ -366,8 +367,11 @@ int rt_hw_ui2c_init(void)
 
 #if defined(BSP_USING_UI2C1)
     /* Enable UI2C1 clock */
+    SYS_UnlockReg();
     CLK_EnableModuleClock(USCI1_MODULE);
     SYS_ResetModule(USCI1_RST);
+    SYS_LockReg();
+
     nu_ui2c1.ui2c_dev.ops = &nu_ui2c_ops;
     ret = rt_i2c_bus_device_register(&nu_ui2c1.ui2c_dev, nu_ui2c1.dev_name);
     RT_ASSERT(RT_EOK == ret);

bsp/nuvoton/libraries/m480/rtt_port/drv_uspi.c

@@ -56,14 +56,12 @@ typedef struct nu_uspi *uspi_t;
 /* Private functions ------------------------------------------------------------*/
 static rt_err_t nu_uspi_bus_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration);
 static rt_uint32_t nu_uspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message);
-static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
+static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus, uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
-        uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
 static int nu_uspi_register_bus(struct nu_uspi *uspi_bus, const char *name);
 static void nu_uspi_drain_rxfifo(USPI_T *uspi_base);
 
 #if defined(BSP_USING_USPI_PDMA)
     static void nu_pdma_uspi_rx_cb(void *pvUserData, uint32_t u32EventFilter);
-    static void nu_pdma_uspi_tx_cb(void *pvUserData, uint32_t u32EventFilter);
     static rt_err_t nu_pdma_uspi_rx_config(struct nu_uspi *uspi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word);
     static rt_err_t nu_pdma_uspi_tx_config(struct nu_uspi *uspi_bus, const uint8_t *pu8Buf, int32_t i32SndLen, uint8_t bytes_per_word);
     static rt_size_t nu_uspi_pdma_transmit(struct nu_uspi *uspi_bus, const uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
@@ -187,12 +185,12 @@ static rt_err_t nu_uspi_bus_configure(struct rt_spi_device *device,
         if (configuration->mode & RT_SPI_MSB)
         {
             /* Set sequence to MSB first */
-            SPI_SET_MSB_FIRST(uspi_bus->uspi_base);
+            USPI_SET_MSB_FIRST(uspi_bus->uspi_base);
         }
         else
         {
             /* Set sequence to LSB first */
-            SPI_SET_LSB_FIRST(uspi_bus->uspi_base);
+            USPI_SET_LSB_FIRST(uspi_bus->uspi_base);
         }
     }
 
@@ -212,17 +210,11 @@ static void nu_pdma_uspi_rx_cb(void *pvUserData, uint32_t u32EventFilter)
 
     RT_ASSERT(uspi_bus != RT_NULL);
 
-    /* Get base address of uspi register */
+    rt_sem_release(uspi_bus->m_psSemBus);
-    USPI_T *uspi_base = uspi_bus->uspi_base;
-
-    if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
-    {
-        USPI_DISABLE_RX_PDMA(uspi_base);  // Stop DMA TX transfer
-    }
 }
 static rt_err_t nu_pdma_uspi_rx_config(struct nu_uspi *uspi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word)
 {
-    rt_err_t result = RT_EOK;
+    rt_err_t result = RT_ERROR;
     rt_uint8_t *dst_addr = NULL;
     nu_pdma_memctrl_t memctrl = eMemCtl_Undefined;
 
@@ -269,27 +261,9 @@ exit_nu_pdma_uspi_rx_config:
     return result;
 }
 
-static void nu_pdma_uspi_tx_cb(void *pvUserData, uint32_t u32EventFilter)
-{
-    struct nu_uspi *uspi_bus;
-    uspi_bus = (struct nu_uspi *)pvUserData;
-
-    RT_ASSERT(uspi_bus != RT_NULL);
-
-    /* Get base address of uspi register */
-    USPI_T *uspi_base = uspi_bus->uspi_base;
-
-    if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
-    {
-        USPI_DISABLE_TX_PDMA(uspi_base);  // Stop DMA TX transfer
-    }
-    rt_sem_release(uspi_bus->m_psSemBus);
-
-}
-
 static rt_err_t nu_pdma_uspi_tx_config(struct nu_uspi *uspi_bus, const uint8_t *pu8Buf, int32_t i32SndLen, uint8_t bytes_per_word)
 {
-    rt_err_t result = RT_EOK;
+    rt_err_t result = RT_ERROR;
     rt_uint8_t *src_addr = NULL;
     nu_pdma_memctrl_t memctrl = eMemCtl_Undefined;
 
@@ -298,15 +272,6 @@ static rt_err_t nu_pdma_uspi_tx_config(struct nu_uspi *uspi_bus, const uint8_t *
 
     rt_uint8_t uspi_pdma_tx_chid = uspi_bus->pdma_chanid_tx;
 
-    result = nu_pdma_callback_register(uspi_pdma_tx_chid,
-                                       nu_pdma_uspi_tx_cb,
-                                       (void *)uspi_bus,
-                                       NU_PDMA_EVENT_TRANSFER_DONE);
-    if (result != RT_EOK)
-    {
-        goto exit_nu_pdma_uspi_tx_config;
-    }
-
     if (pu8Buf == RT_NULL)
     {
         uspi_bus->dummy = 0;
@@ -343,7 +308,7 @@ exit_nu_pdma_uspi_tx_config:
  */
 static rt_size_t nu_uspi_pdma_transmit(struct nu_uspi *uspi_bus, const uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word)
 {
-    rt_err_t result = RT_EOK;
+    rt_err_t result = RT_ERROR;
 
     /* Get base address of uspi register */
     USPI_T *uspi_base = uspi_bus->uspi_base;
@@ -354,13 +319,13 @@ static rt_size_t nu_uspi_pdma_transmit(struct nu_uspi *uspi_bus, const uint8_t *
     RT_ASSERT(result == RT_EOK);
 
     /* Trigger TX/RX at the same time. */
-    USPI_TRIGGER_TX_PDMA(uspi_base);
+    USPI_TRIGGER_TX_RX_PDMA(uspi_base);
-    USPI_TRIGGER_RX_PDMA(uspi_base);
 
     /* Wait PDMA transfer done */
     rt_sem_take(uspi_bus->m_psSemBus, RT_WAITING_FOREVER);
 
-    while (USPI_IS_BUSY(uspi_base));
+    /* Stop DMA TX/RX transfer */
+    USPI_DISABLE_TX_RX_PDMA(uspi_base);
 
     return result;
 }
@@ -404,7 +369,6 @@ static void nu_uspi_drain_rxfifo(USPI_T *uspi_base)
 static int nu_uspi_read(USPI_T *uspi_base, uint8_t *recv_addr, uint8_t bytes_per_word)
 {
     int size = 0;
-    uint32_t val;
 
     // Read RX data
     if (!USPI_GET_RX_EMPTY_FLAG(uspi_base))
@@ -412,6 +376,7 @@ static int nu_uspi_read(USPI_T *uspi_base, uint8_t *recv_addr, uint8_t bytes_per
         // Read data from USPI RX FIFO
         switch (bytes_per_word)
         {
+            uint32_t val;
         case 2:
             val = USPI_READ_RX(uspi_base);
             nu_set16_le(recv_addr, val);
@@ -419,6 +384,8 @@ static int nu_uspi_read(USPI_T *uspi_base, uint8_t *recv_addr, uint8_t bytes_per
         case 1:
             *recv_addr = USPI_READ_RX(uspi_base);
             break;
+        default:
+            break;
         }
         size = bytes_per_word;
     }
@@ -439,6 +406,8 @@ static int nu_uspi_write(USPI_T *uspi_base, const uint8_t *send_addr, uint8_t by
     case 1:
         USPI_WRITE_TX(uspi_base, *((uint8_t *)send_addr));
         break;
+    default:
+        break;
     }
 
     return bytes_per_word;
@@ -475,6 +444,7 @@ static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
             length -= nu_uspi_write(uspi_base, (const uint8_t *)&uspi_bus->dummy, bytes_per_word);
 
             /* Read data from RX FIFO */
+            while (USPI_GET_RX_EMPTY_FLAG(uspi_base));
             recv_addr += nu_uspi_read(uspi_base, recv_addr, bytes_per_word);
         }
     } // else if (send_addr == RT_NULL && recv_addr != RT_NULL)
@@ -488,11 +458,12 @@ static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
             length -= bytes_per_word;
 
             /* Read data from RX FIFO */
+            while (USPI_GET_RX_EMPTY_FLAG(uspi_base));
             recv_addr += nu_uspi_read(uspi_base, recv_addr, bytes_per_word);
         }
     } // else
 
-    /* Wait RX or drian RX-FIFO */
+    /* Wait RX or drain RX-FIFO */
     if (recv_addr)
     {
         // Wait SPI transmission done
@@ -521,9 +492,8 @@ static void nu_uspi_transfer(struct nu_uspi *uspi_bus, uint8_t *tx, uint8_t *rx,
 #if defined(BSP_USING_USPI_PDMA)
     /* DMA transfer constrains */
     if ((uspi_bus->pdma_chanid_rx >= 0) &&
-            (!(uint32_t)tx % bytes_per_word) &&
+            !((uint32_t)tx % bytes_per_word) &&
-            (!(uint32_t)rx % bytes_per_word) &&
+            !((uint32_t)rx % bytes_per_word) )
-            (bytes_per_word != 3))
         nu_uspi_pdma_transmit(uspi_bus, tx, rx, length, bytes_per_word);
     else
         nu_uspi_transmission_with_poll(uspi_bus, tx, rx, length, bytes_per_word);

bsp/nuvoton/libraries/m480/rtt_port/drv_uuart.c

@@ -139,7 +139,7 @@ static struct nu_uuart nu_uuart_arr [] =
     {0}
 }; /* uuart nu_uuart */
 
-/* Interrupt Handle Funtion  ----------------------------------------------------*/
+/* Interrupt Handle Function  ----------------------------------------------------*/
 #if defined(BSP_USING_UUART0)
 /* USCI0 interrupt entry */
 void USCI0_IRQHandler(void)
@@ -197,7 +197,7 @@ static void nu_uuart_isr(nu_uuart_t serial)
 }
 
 /**
- * Configurae uuart port
+ * Configure uuart port
  */
 static rt_err_t nu_uuart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
 {
@@ -209,12 +209,9 @@ static rt_err_t nu_uuart_configure(struct rt_serial_device *serial, struct seria
     /* Get base address of uuart register */
     UUART_T *uuart_base = ((nu_uuart_t)serial)->uuart_base;
 
-
+    /* Check baud rate */
-    /* Check baudrate */
     RT_ASSERT(cfg->baud_rate != 0);
 
-
-
     /* Check word len */
     switch (cfg->data_bits)
     {
@@ -280,8 +277,7 @@ static rt_err_t nu_uuart_configure(struct rt_serial_device *serial, struct seria
     /* Reset this module */
     SYS_ResetModule(((nu_uuart_t)serial)->uuart_rst);
 
-
+    /* Open UUart and set UUART baud rate */
-    /* Open UUart and set UUART Baudrate */
     UUART_Open(uuart_base, cfg->baud_rate);
 
     /* Set line configuration. */
@@ -311,6 +307,11 @@ static rt_err_t nu_pdma_uuart_rx_config(struct rt_serial_device *serial, uint8_t
                                        (void *)serial,
                                        NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT);
 
+    if (result != RT_EOK)
+    {
+        goto exit_nu_pdma_uuart_rx_config;
+    }
+
     result = nu_pdma_transfer(((nu_uuart_t)serial)->pdma_chanid_rx,
                               8,
                               (uint32_t)&uuart_base->RXDAT,
@@ -318,7 +319,10 @@ static rt_err_t nu_pdma_uuart_rx_config(struct rt_serial_device *serial, uint8_t
                               i32TriggerLen,
                               1000);  //Idle-timeout, 1ms
 
-
+    if (result != RT_EOK)
+    {
+        goto exit_nu_pdma_uuart_rx_config;
+    }
 
     //UUART PDMA reset
     UUART_PDMA_ENABLE(uuart_base, UUART_PDMACTL_PDMARST_Msk);
@@ -327,6 +331,7 @@ static rt_err_t nu_pdma_uuart_rx_config(struct rt_serial_device *serial, uint8_t
     UUART_EnableInt(uuart_base, UUART_RLS_INT_MASK);
     UUART_PDMA_ENABLE(uuart_base, UUART_PDMACTL_RXPDMAEN_Msk | UUART_PDMACTL_PDMAEN_Msk);
 
+exit_nu_pdma_uuart_rx_config:
 
     return result;
 }
@@ -483,7 +488,6 @@ static rt_err_t nu_uuart_control(struct rt_serial_device *serial, int cmd, void
     rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
 
     RT_ASSERT(serial != RT_NULL);
-    RT_ASSERT(arg != RT_NULL);
 
     /* Get base address of uuart register */
     UUART_T *uuart_base = ((nu_uuart_t)serial)->uuart_base;
@@ -530,6 +534,25 @@ static rt_err_t nu_uuart_control(struct rt_serial_device *serial, int cmd, void
         break;
 #endif
 
+    case RT_DEVICE_CTRL_CLOSE:
+        /* Disable NVIC interrupt. */
+        NVIC_DisableIRQ(((nu_uuart_t)serial)->uuart_irq_n);
+
+#if defined(RT_SERIAL_USING_DMA)
+        nu_pdma_channel_terminate(((nu_uuart_t)serial)->pdma_chanid_tx);
+        nu_pdma_channel_terminate(((nu_uuart_t)serial)->pdma_chanid_rx);
+#endif
+
+        /* Reset this module */
+        SYS_ResetModule(((nu_uuart_t)serial)->uuart_rst);
+
+        /* Close UUART port */
+        UUART_Close(uuart_base);
+
+        break;
+    default:
+        result = -RT_EINVAL;
+        break;
     }
     return result;
 }
@@ -599,7 +622,7 @@ static int rt_hw_uuart_init(void)
         RT_ASSERT(ret == RT_EOK);
     }
 
-    return ret;
+    return (int)ret;
 }
 
 INIT_DEVICE_EXPORT(rt_hw_uuart_init);

bsp/nuvoton/libraries/m480/rtt_port/drv_wdt.c

@@ -13,7 +13,6 @@
 #include <rtconfig.h>
 
 #if defined(BSP_USING_WDT)
-
 #include <rthw.h>
 #include <rtdevice.h>
 #include <rtdbg.h>
@@ -22,7 +21,7 @@
 /*-------------------------------------------------------------------------------*/
 /* watchdog timer timeout look up table                                          */
 /*-------------------------------------------------------------------------------*/
-/* clock = LIRC 10Khz.                                                           */
+/* clock = LIRC 10KHz.                                                           */
 /*                                                                               */
 /*      working hz   toutsel     exp     cycles      timeout (s)                 */
 /*      10000        0           4       16          0.0016                      */
@@ -34,7 +33,7 @@
 /*                   6           16      65536       6.5536                      */
 /*                   7           18      262144      26.2144                     */
 /*-------------------------------------------------------------------------------*/
-/* clock = LXT 32.76Khz.                                                         */
+/* clock = LXT 32768Hz.                                                          */
 /*                                                                               */
 /*      working hz   toutsel     exp     cycles      timeout (s)                 */
 /*      32768        0           4       16          0.0005                      */
@@ -46,7 +45,7 @@
 /*                   6           16      65536       2.0000                      */
 /*                   7           18      262144      8.0000                      */
 /*-------------------------------------------------------------------------------*/
-/* clock = 192Mhz HCLK divide 2048 = 93750 hz.                                   */
+/* clock = 192MHz HCLK divide 2048 = 93750 Hz.                                   */
 /*                                                                               */
 /*      working hz   toutsel     exp     cycles      timeout (s)                 */
 /*      93750        0           4       16          0.00017                     */
@@ -69,10 +68,10 @@
 #define MIN_CYCLES                  (1024)
 
 
-/* Macros to convert the value bewtween the timeout interval and the soft time iterations. */
+/* Macros to convert the value between the timeout interval and the soft time iterations. */
 #define ROUND_TO_INTEGER(value)         ((int)(((value) * 10 + 5) / 10))
-#define CONV_SEC_TO_IT(hz, secs)        ROUND_TO_INTEGER((float)((secs) * (hz)) / (float)MIN_CYCLES)
+#define CONV_SEC_TO_IT(hz, secs)        (ROUND_TO_INTEGER((float)((secs) * (hz)) / (float)(MIN_CYCLES)))
-#define CONV_IT_TO_SEC(hz, iterations)  ROUND_TO_INTEGER((float)(iterations * MIN_CYCLES) / (float)hz)
+#define CONV_IT_TO_SEC(hz, iterations)  (ROUND_TO_INTEGER((float)((iterations) * (MIN_CYCLES)) / (float)(hz)))
 
 
 /* Private typedef --------------------------------------------------------------*/
@@ -98,12 +97,10 @@ static void soft_time_setup(uint32_t wanted_sec, uint32_t hz, soft_time_handle_t
 static void soft_time_feed_dog(soft_time_handle_t *const soft_time);
 
 #if defined(RT_USING_PM)
-    static int wdt_pm_suspend(const struct rt_device *device, rt_uint8_t mode);
+static int wdt_pm_suspend(const struct rt_device *device, rt_uint8_t mode);
-    static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode);
+static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode);
-    static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode);
+static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode);
-
+static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const soft_time);
-    static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const soft_time);
-
 #endif
 
 /* Public functions -------------------------------------------------------------*/
@@ -129,8 +126,6 @@ static struct rt_device_pm_ops device_pm_ops =
 #endif
 
 
-
-
 #if defined(RT_USING_PM)
 
 /* device pm suspend() entry. */
@@ -204,7 +199,7 @@ static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mo
         if (new_hz == soft_time.clock_hz)
             return (int)(RT_EOK);
 
-        /* frequency change occurs in critial section */
+        /* frequency change occurs in critical section */
         soft_time_freqeucy_change(new_hz, &soft_time);
     }
 
@@ -241,7 +236,7 @@ static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const
 
     if (corner_case)
     {
-        LOG_W("pm frequency change cause wdt intenal left iterations convert to 0.\n\r  \
+        LOG_W("pm frequency change cause wdt internal left iterations convert to 0.\n\r  \
                wdt driver will add another 1 iteration for this corner case.");
     }
 }
@@ -263,7 +258,7 @@ static void hw_wdt_init(void)
 }
 
 
-/* wdt device driver initialise. */
+/* wdt device driver initialize. */
 int rt_hw_wdt_init(void)
 {
     rt_err_t ret;
@@ -278,13 +273,12 @@ int rt_hw_wdt_init(void)
     rt_pm_device_register((struct rt_device *)&device_wdt, &device_pm_ops);
 #endif
 
-
     return (int)ret;
 }
 INIT_BOARD_EXPORT(rt_hw_wdt_init);
 
 
-/* Reigster rt-thread device.init() entry. */
+/* Register rt-thread device.init() entry. */
 static rt_err_t wdt_init(rt_watchdog_t *dev)
 {
     soft_time_init(&soft_time);

bsp/nuvoton/numaker-iot-m487/README.md

@@ -35,7 +35,7 @@ NuMaker-IoT-M487 provides multiple networking, interfaces, audio recording, play
 |Ethernet PHY| IP101GR | Supported |
 |Sensor| BMX055 | Supported |
 |Wi-Fi module| ESP8266-ESP12, AT firmware v1.7 | Supported |
-|Audio Codec| NAU88L25, Supports MIC and earphone | Coming soon |
+|Audio Codec| NAU88L25, Supports MIC and earphone | Supported |
 
 ## 2. Supported compiler
 Support GCC, MDK4, MDK5, IAR IDE/compilers. More information of these compiler version as following:

bsp/nuvoton/numaker-iot-m487/applications/main.c

@@ -10,7 +10,7 @@
 *
 ******************************************************************************/
 
-#include <rtthread.h>
+#include <rtconfig.h>
 #include <rtdevice.h>
 #include <drv_gpio.h>
 
@@ -19,6 +19,8 @@
 
 int main(int argc, char **argv)
 {
+#if defined(RT_USING_PIN)
+
     int counter = 0;
 
     /* set LEDR1 pin mode to output */
@@ -32,5 +34,6 @@ int main(int argc, char **argv)
         rt_thread_mdelay(500);
     }
 
+#endif
     return 0;
 }

bsp/nuvoton/numaker-iot-m487/board/board_dev.c

@@ -146,6 +146,7 @@ INIT_APP_EXPORT(rt_hw_bmx055_port);
 #include <at_device_esp8266.h>
 
 #define LOG_TAG    "at.sample.esp"
+#undef DBG_TAG
 #include <at_log.h>
 
 static struct at_device_esp8266 esp0 =

bsp/nuvoton/numaker-pfm-m487/README.md

@@ -32,7 +32,7 @@ NuMaker-PFM-M487 provides multiple networking, interfaces, audio recording, play
 | -- | -- | -- |
 |SPI flash | W25Q32 | Supported |
 |Ethernet PHY| IP101GR | Supported |
-|Audio Codec| NAU88L25, Supports MIC and earphone | Coming soon |
+|Audio Codec| NAU88L25, Supports MIC and earphone | Supported |
 
 ## 2. Supported compiler
 Support GCC, MDK4, MDK5, IAR IDE/compilers. More information of these compiler version as following:

bsp/stm32/libraries/HAL_Drivers/drv_adc.c

@@ -209,10 +209,12 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch
 #elif defined(SOC_SERIES_STM32MP1)
     ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_810CYCLES_5;
 #endif
+
 #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
     ADC_ChanConf.Offset = 0;
 #endif
-#ifdef SOC_SERIES_STM32L4
+
+#if defined(SOC_SERIES_STM32L4)
     ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE;
     ADC_ChanConf.SingleDiff = LL_ADC_SINGLE_ENDED;
 #elif defined(SOC_SERIES_STM32MP1)
@@ -221,9 +223,17 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch
     ADC_ChanConf.SingleDiff   = ADC_SINGLE_ENDED; /* ADC channel differential mode */
 #endif
     HAL_ADC_ConfigChannel(stm32_adc_handler, &ADC_ChanConf);
-#ifdef SOC_SERIES_STM32MP1
+
+    /* perform an automatic ADC calibration to improve the conversion accuracy */
+#if defined(SOC_SERIES_STM32L4)
+    if (HAL_ADCEx_Calibration_Start(stm32_adc_handler, ADC_ChanConf.SingleDiff) != HAL_OK)
+    {
+        LOG_E("ADC calibration error!\n");
+        return -RT_ERROR;
+    }
+#elif defined(SOC_SERIES_STM32MP1)
     /* Run the ADC linear calibration in single-ended mode */
-    if (HAL_ADCEx_Calibration_Start(stm32_adc_handler, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED) != HAL_OK)
+    if (HAL_ADCEx_Calibration_Start(stm32_adc_handler, ADC_CALIB_OFFSET_LINEARITY, ADC_ChanConf.SingleDiff) != HAL_OK)
     {
         LOG_E("ADC open linear calibration error!\n");
         /* Calibration Error */

bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Source/Templates/arm/startup_stm32mp15xx.s

@@ -14,8 +14,8 @@
 ;****************************************************************************** 
 ;* @attention
 ;*
-;* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. 
+;* &copy; Copyright (c) 2019 STMicroelectronics. 
-;* All rights reserved.</center></h2>
+;* All rights reserved.
 ;*
 ;* This software component is licensed by ST under BSD 3-Clause license,
 ;* the "License"; You may not use this file except in compliance with the 
@@ -30,7 +30,7 @@
 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
 ; </h>
 
-Stack_Size      EQU     0x00000400
+Stack_Size      EQU     0x00000800
 
                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
 __stack_limit

bsp/stm32/stm32f072-st-nucleo/README.md

@@ -29,7 +29,7 @@ NUCLEO-F072RB 开发板常用 **板载资源** 如下：
 - 常用接口：USB 转串口、Arduino Uno 和 ST morpho 两类扩展接口
 - 调试接口：板载 ST-LINK/V2-1 调试器。
 
-更多相关信息资料见 ST 官网详情页：[NUCLEO_F072RB_STM32Nucleo-64开发板]https://www.stmcu.com.cn/Designresource/design_resource_detail?file_name=NUCLEO_F072RB_STM32Nucleo-64%E5%BC%80%E5%8F%91%E6%9D%BF&lang=EN&ver=
+开发板更多详细信息请参考意法半导体[NUCLEO-F072RB](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-f072rb.html)
 
 ## 外设支持
 

bsp/stm32/stm32f091-st-nucleo/README.md

@@ -1,8 +1,8 @@
-# BSP README 模板
+# NUCLEO-F091RC 开发板 BSP 说明
 
 ## 简介
 
-本文档为 RT-Thread 开发团队为 STM32F091RC-NuCLEO 开发板提供的 BSP (板级支持包) 说明。
+本文档为 RT-Thread 开发团队为 STM32F091RC-NUCLEO 开发板提供的 BSP (板级支持包) 说明。
 
 主要内容如下：
 
@@ -22,7 +22,7 @@ STM32F091RC-NuCLEO 开发板是 ST 官方推出的一款基于 ARM Cortex-M0 内
 
 该开发板常用 **板载资源** 如下：
 
-- MCU：STM32F091，主频 48MHz，256KB FLASH ，32KB RAM
+- MCU：STM32F091RC，主频 48MHz，256KB FLASH ，32KB RAM
 - 外部 RAM：无
 - 外部 FLASH：无
 - 常用外设
@@ -30,7 +30,7 @@ STM32F091RC-NuCLEO 开发板是 ST 官方推出的一款基于 ARM Cortex-M0 内
 - 常用接口：USB 转串口、arduino 接口等
 - 调试接口，标准 SWD
 
-开发板更多详细信息请参考 ST 的 [NUCLEO 开发板介绍](https://www.st.com/en/evaluation-tools/stm32-mcu-nucleo.html?querycriteria=productId=LN1847)。
+开发板更多详细信息请参考意法半导体[NUCLEO-F091RC](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-f091rc.html)。
 
 ## 外设支持
 

bsp/stm32/stm32f412-st-nucleo/README.md

@@ -20,9 +20,9 @@
 
 ![board](figures/board.png)
 
-该开发板常用 ** 板载资源 ** 如下：
+该开发板常用 **板载资源** 如下：
 
-- MCU：STM32F411ZG，主频 100MHz，1024KB FLASH ，256KB RAM。
+- MCU：STM32F412ZG，主频 100MHz，1024KB FLASH ，256KB RAM。
 - 常用外设
   - LED：3 个，USB communication (LD1), user LED (LD2), power LED (LD3) 。
   - 按键，2 个，USER and RESET 。
@@ -71,7 +71,7 @@
 
 #### 运行结果
 
-下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD3 和 LD1 常亮、绿色 LD2 会周期性闪烁。
+下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD3 和 LD1 常亮、蓝色 LD2 会周期性闪烁。
 
 USB 虚拟 COM 端口默认连接串口 3，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
 

bsp/stm32/stm32f429-st-disco/.config

@@ -42,7 +42,7 @@ CONFIG_RT_USING_MUTEX=y
 CONFIG_RT_USING_EVENT=y
 CONFIG_RT_USING_MAILBOX=y
 CONFIG_RT_USING_MESSAGEQUEUE=y
-# CONFIG_RT_USING_SIGNALS is not set
+CONFIG_RT_USING_SIGNALS=y
 
 #
 # Memory Management
@@ -50,10 +50,9 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
 CONFIG_RT_USING_MEMPOOL=y
 CONFIG_RT_USING_MEMHEAP=y
 # CONFIG_RT_USING_NOHEAP is not set
-CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SMALL_MEM is not set
 # CONFIG_RT_USING_SLAB is not set
-# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
+CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
-# CONFIG_RT_USING_MEMTRACE is not set
 CONFIG_RT_USING_HEAP=y
 
 #
@@ -65,7 +64,7 @@ CONFIG_RT_USING_DEVICE=y
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
-CONFIG_RT_VER_NUM=0x40002
+CONFIG_RT_VER_NUM=0x40003
 CONFIG_ARCH_ARM=y
 CONFIG_RT_USING_CPU_FFS=y
 CONFIG_ARCH_ARM_CORTEX_M=y
@@ -101,7 +100,7 @@ CONFIG_FINSH_CMD_SIZE=80
 # CONFIG_FINSH_USING_AUTH is not set
 CONFIG_FINSH_USING_MSH=y
 CONFIG_FINSH_USING_MSH_DEFAULT=y
-# CONFIG_FINSH_USING_MSH_ONLY is not set
+CONFIG_FINSH_USING_MSH_ONLY=y
 CONFIG_FINSH_ARG_MAX=10
 
 #
@@ -133,16 +132,19 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_HWTIMER is not set
 # CONFIG_RT_USING_CPUTIME is not set
 CONFIG_RT_USING_I2C=y
+# CONFIG_RT_I2C_DEBUG is not set
 CONFIG_RT_USING_I2C_BITOPS=y
+# CONFIG_RT_I2C_BITOPS_DEBUG is not set
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
 # CONFIG_RT_USING_PWM is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
 # CONFIG_RT_USING_PM is not set
 # CONFIG_RT_USING_RTC is not set
 # CONFIG_RT_USING_SDIO is not set
-# CONFIG_RT_USING_SPI is not set
+CONFIG_RT_USING_SPI=y
 # CONFIG_RT_USING_WDT is not set
 # CONFIG_RT_USING_AUDIO is not set
 # CONFIG_RT_USING_SENSOR is not set
@@ -162,7 +164,8 @@ CONFIG_RT_USING_PIN=y
 # POSIX layer and C standard library
 #
 CONFIG_RT_USING_LIBC=y
-# CONFIG_RT_USING_PTHREADS is not set
+CONFIG_RT_USING_PTHREADS=y
+CONFIG_PTHREAD_NUM_MAX=8
 CONFIG_RT_USING_POSIX=y
 # CONFIG_RT_USING_POSIX_MMAP is not set
 # CONFIG_RT_USING_POSIX_TERMIOS is not set
@@ -213,10 +216,15 @@ CONFIG_RT_USING_POSIX=y
 #
 # IoT - internet of things
 #
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
 # CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_CJSON is not set
 # CONFIG_PKG_USING_JSMN is not set
@@ -243,6 +251,7 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
 # CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
 # CONFIG_PKG_USING_ATSRV_SOCKET is not set
@@ -255,8 +264,10 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
 # CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 # CONFIG_PKG_USING_IPMSG is not set
@@ -268,6 +279,14 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_ONNX_PARSER is not set
 # CONFIG_PKG_USING_ONNX_BACKEND is not set
 # CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
 
 #
 # security packages
@@ -275,6 +294,8 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_MBEDTLS is not set
 # CONFIG_PKG_USING_libsodium is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
 
 #
 # language packages
@@ -303,6 +324,14 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
 # CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
 
 #
 # system packages
@@ -314,6 +343,7 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_PARTITION is not set
 # CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_FLASHDB is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
 # CONFIG_PKG_USING_LITTLEVGL2RTT is not set
@@ -322,6 +352,13 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_LITTLEFS is not set
 # CONFIG_PKG_USING_THREAD_POOL is not set
 # CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
 
 #
 # peripheral libraries and drivers
@@ -329,6 +366,7 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_SENSORS_DRIVERS is not set
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_SHT3X is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_U8G2 is not set
@@ -337,10 +375,16 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_SX12XX is not set
 # CONFIG_PKG_USING_SIGNAL_LED is not set
 # CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
 # CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
 # CONFIG_PKG_USING_AT24CXX is not set
 # CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
 # CONFIG_PKG_USING_AD7746 is not set
@@ -348,9 +392,23 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_I2C_TOOLS is not set
 # CONFIG_PKG_USING_NRF24L01 is not set
 # CONFIG_PKG_USING_TOUCH_DRIVERS is not set
-# CONFIG_PKG_USING_LCD_DRIVERS is not set
 # CONFIG_PKG_USING_MAX17048 is not set
 # CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
 
 #
 # miscellaneous packages
@@ -385,6 +443,42 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_ELAPACK is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
 # CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+
+#
+# Privated Packages of RealThread
+#
+# CONFIG_PKG_USING_CODEC is not set
+# CONFIG_PKG_USING_PLAYER is not set
+# CONFIG_PKG_USING_MPLAYER is not set
+# CONFIG_PKG_USING_PERSIMMON_SRC is not set
+# CONFIG_PKG_USING_JS_PERSIMMON is not set
+# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
+
+#
+# Network Utilities
+#
+# CONFIG_PKG_USING_WICED is not set
+# CONFIG_PKG_USING_CLOUDSDK is not set
+# CONFIG_PKG_USING_POWER_MANAGER is not set
+# CONFIG_PKG_USING_RT_OTA is not set
+# CONFIG_PKG_USING_RDBD_SRC is not set
+# CONFIG_PKG_USING_RTINSIGHT is not set
+# CONFIG_PKG_USING_SMARTCONFIG is not set
+# CONFIG_PKG_USING_RTX is not set
+# CONFIG_RT_USING_TESTCASE is not set
+# CONFIG_PKG_USING_NGHTTP2 is not set
+# CONFIG_PKG_USING_AVS is not set
+# CONFIG_PKG_USING_ALI_LINKKIT is not set
+# CONFIG_PKG_USING_STS is not set
+# CONFIG_PKG_USING_DLMS is not set
+# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set
+# CONFIG_PKG_USING_ZBAR is not set
+# CONFIG_PKG_USING_MCF is not set
+# CONFIG_PKG_USING_URPC is not set
+# CONFIG_PKG_USING_BSAL is not set
 CONFIG_SOC_FAMILY_STM32=y
 CONFIG_SOC_SERIES_STM32F4=y
 
@@ -393,6 +487,11 @@ CONFIG_SOC_SERIES_STM32F4=y
 #
 CONFIG_SOC_STM32F429ZI=y
 
+#
+# Onboard Peripheral Drivers
+#
+CONFIG_BSP_USING_SDRAM=y
+
 #
 # On-chip Peripheral Drivers
 #
@@ -400,12 +499,14 @@ CONFIG_BSP_USING_GPIO=y
 CONFIG_BSP_USING_UART=y
 CONFIG_BSP_USING_UART1=y
 # CONFIG_BSP_UART1_RX_USING_DMA is not set
+# CONFIG_BSP_USING_UART2 is not set
 # CONFIG_BSP_USING_I2C1 is not set
 # CONFIG_BSP_USING_SPI is not set
 # CONFIG_BSP_USING_QSPI is not set
-# CONFIG_BSP_USING_FMC is not set
+CONFIG_BSP_USING_FMC=y
-# CONFIG_BSP_USING_USBD_FS is not set
+# CONFIG_BSP_USING_USBD is not set
-# CONFIG_BSP_USING_LTDC is not set
+CONFIG_BSP_USING_LCD=y
+CONFIG_BSP_USING_LTDC=y
 # CONFIG_BSP_USING_RNG is not set
 # CONFIG_BSP_USING_UDID is not set
 

bsp/stm32/stm32f429-st-disco/.project

@@ -0,0 +1,30 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+  <name>stm32f429</name>
+  <comment />
+  <projects>
+	</projects>
+  <buildSpec>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+      <triggers>clean,full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+      <triggers>full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+  </buildSpec>
+  <natures>
+    <nature>org.eclipse.cdt.core.cnature</nature>
+    <nature>org.eclipse.cdt.core.ccnature</nature>
+    <nature>org.rt-thread.studio.rttnature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+  </natures>
+  <linkedResources>
+    </linkedResources>
+</projectDescription>

bsp/stm32/stm32f429-st-disco/.settings/language.settings.xml

@@ -0,0 +1,14 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project>
+	<configuration id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.553091094" name="Debug">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1530062170212089103" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+</project>

bsp/stm32/stm32f429-st-disco/.settings/org.eclipse.core.runtime.prefs

@@ -0,0 +1,3 @@
+content-types/enabled=true
+content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
+eclipse.preferences.version=1

bsp/stm32/stm32f429-st-disco/.settings/projcfg.ini

@@ -0,0 +1,9 @@
+#RT-Thread Studio Project Configuration
+#Thu Aug 06 07:31:27 CST 2020
+qemu_supported_board=stm32f429-st-disco
+mcu_name=STM32F429ZI
+hardware_adapter=QEMU
+selected_rtt_version=latest
+mcu_base_nano_proj=true
+project_base_bsp=true
+cfg_version=v2.0

bsp/stm32/stm32f429-st-disco/.settings/stm32f429.DAPLink.Debug.rttlaunch

@@ -0,0 +1,57 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.pyocd.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.adapterName" value="DAP-LINK"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.enableSemihosting" value="true"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.firstResetType" value="init"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.gdbServerExecutable" value="${rtt_install_path}/repo/Extract/Debugger_Support_Packages/RealThread/PyOCD/0.1.0/pyocd.exe"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.gdbServerGdbPortNumber" value="3333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.gdbServerOther" value=""/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.gdbServerTelnetPortNumber" value="4444"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.pyocd.secondResetType" value="halt"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${rtt_install_path}\repo\Extract\Chip_Support_Packages\RealThread\STM32F4\0.1.7\debug\svd\STM32F429x.svd"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU PyOCD"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="false"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${rtt_gnu_gcc}/arm-none-eabi-gdb.exe"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/rtthread.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="stm32f429"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/stm32f429"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.debug.core.source_locator_id" value="org.eclipse.cdt.debug.core.sourceLocator"/>
+<stringAttribute key="org.eclipse.debug.core.source_locator_memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;sourceLookupDirector&gt;&#13;&#10;&lt;sourceContainers duplicates=&quot;false&quot;&gt;&#13;&#10;&lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#13;&amp;#10;&amp;lt;default/&amp;gt;&amp;#13;&amp;#10;&quot; typeId=&quot;org.eclipse.debug.core.containerType.default&quot;/&gt;&#13;&#10;&lt;/sourceContainers&gt;&#13;&#10;&lt;/sourceLookupDirector&gt;&#13;&#10;"/>
+<stringAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_ENCODING" value="GBK"/>
+<booleanAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_OUTPUT_ON" value="true"/>
+<booleanAttribute key="org.eclipse.debug.ui.ATTR_LAUNCH_IN_BACKGROUND" value="true"/>
+</launchConfiguration>

bsp/stm32/stm32f429-st-disco/.settings/stm32f429.JLink.Debug.rttlaunch

@@ -0,0 +1,83 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.adapterName" value="J-Link"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="true"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.flashDeviceName" value="STM32F429ZI"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="swd"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="STM32F429ZI"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="1000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${rtt_install_path}/repo/Extract/Debugger_Support_Packages/SEGGER/J-Link/6.30i/JLinkGDBServerCL.exe"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2331"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerRunAfterStopDebug" value="true"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerSwoPortNumber" value="2332"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerTelnetPortNumber" value="2333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.interfaceSpeed" value="auto"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.jlinkExecutable" value="${rtt_install_path}/repo/Extract/Debugger_Support_Packages/SEGGER/J-Link/6.30i/JLink.exe"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.secondResetType" value=""/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${rtt_install_path}\repo\Extract\Chip_Support_Packages\RealThread\STM32F4\0.1.7\debug\svd\STM32F429x.svd"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2331"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${rtt_gnu_gcc}/arm-none-eabi-gdb.exe"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/rtthread.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="stm32f429"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/stm32f429"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.debug.core.source_locator_id" value="org.eclipse.cdt.debug.core.sourceLocator"/>
+<stringAttribute key="org.eclipse.debug.core.source_locator_memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;sourceLookupDirector&gt;&#13;&#10;&lt;sourceContainers duplicates=&quot;false&quot;&gt;&#13;&#10;&lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#13;&amp;#10;&amp;lt;default/&amp;gt;&amp;#13;&amp;#10;&quot; typeId=&quot;org.eclipse.debug.core.containerType.default&quot;/&gt;&#13;&#10;&lt;/sourceContainers&gt;&#13;&#10;&lt;/sourceLookupDirector&gt;&#13;&#10;"/>
+<stringAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_ENCODING" value="GBK"/>
+<booleanAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_OUTPUT_ON" value="true"/>
+<booleanAttribute key="org.eclipse.debug.ui.ATTR_LAUNCH_IN_BACKGROUND" value="true"/>
+</launchConfiguration>

bsp/stm32/stm32f429-st-disco/.settings/stm32f429.Qemu.Debug.rttlaunch

@@ -0,0 +1,60 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.qemu.launchConfigurationType">
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.disableGraphics" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.doFirstReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.enableSemihosting" value="true"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.gdbServerBoardModel" value="stm32f429-st-disco"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.gdbServerCpuQuantity" value="1"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.gdbServerEnableNetwork" value="false"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.gdbServerExecutable" value="D:/RT-ThreadStudio/repo/Extract/Debugger_Support_Packages/RealThread/QEMU/4.2.0/qemu-system-arm.exe"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.gdbServerExtraQemuCmd" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.gdbServerSdcardMemory" value="64.0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.gdbServerStartup" value="D:/RT-ThreadStudio/repo/Extract/Debugger_Support_Packages/RealThread/QEMU/4.2.0/qemu-system-arm.exe -M stm32f429-st-disco --kernel Debug/rtthread.elf -serial stdio -show-cursor -S -s"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.gdbServerTapName" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.qemu.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${rtt_install_path}\repo\Extract\Chip_Support_Packages\RealThread\STM32F4\0.1.7\debug\svd\STM32F429x.svd"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU QEMU"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="1234"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/rtthread.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="stm32f429"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/stm32f429"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.debug.core.source_locator_id" value="org.eclipse.cdt.debug.core.sourceLocator"/>
+<stringAttribute key="org.eclipse.debug.core.source_locator_memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;sourceLookupDirector&gt;&#13;&#10;&lt;sourceContainers duplicates=&quot;false&quot;&gt;&#13;&#10;&lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#13;&amp;#10;&amp;lt;default/&amp;gt;&amp;#13;&amp;#10;&quot; typeId=&quot;org.eclipse.debug.core.containerType.default&quot;/&gt;&#13;&#10;&lt;/sourceContainers&gt;&#13;&#10;&lt;/sourceLookupDirector&gt;&#13;&#10;"/>
+<stringAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_ENCODING" value="GBK"/>
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#13;&#10;"/>
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>

bsp/stm32/stm32f429-st-disco/.settings/stm32f429.STLink.Debug.rttlaunch

@@ -0,0 +1,54 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.adapterName" value="ST-LINK"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${rtt_install_path}\repo\Extract\Chip_Support_Packages\RealThread\STM32F4\0.1.7\debug\svd\STM32F429x.svd"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.connectMode" value="NORMAL"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.debugInterface" value="SWD"/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="3"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.flashVerify" value="false"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDeviceId" value="org.eclipse.cdt.debug.gdbjtag.core.jtagdevice.genericDevice"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.otherDownloadOption" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.otherGdbserverOption" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="61235"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.resetMode" value=" -hardRst"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.resetRun" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${rtt_gnu_gcc}/arm-none-eabi-gdb.exe"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="remote"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/rtthread.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="stm32f429"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/stm32f429"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.debug.core.source_locator_id" value="org.eclipse.cdt.debug.core.sourceLocator"/>
+<stringAttribute key="org.eclipse.debug.core.source_locator_memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;sourceLookupDirector&gt;&#13;&#10;&lt;sourceContainers duplicates=&quot;false&quot;&gt;&#13;&#10;&lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#13;&amp;#10;&amp;lt;default/&amp;gt;&amp;#13;&amp;#10;&quot; typeId=&quot;org.eclipse.debug.core.containerType.default&quot;/&gt;&#13;&#10;&lt;/sourceContainers&gt;&#13;&#10;&lt;/sourceLookupDirector&gt;&#13;&#10;"/>
+<stringAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_ENCODING" value="GBK"/>
+<booleanAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_OUTPUT_ON" value="true"/>
+<booleanAttribute key="org.eclipse.debug.ui.ATTR_LAUNCH_IN_BACKGROUND" value="true"/>
+</launchConfiguration>

bsp/stm32/stm32f429-st-disco/board/Kconfig

@@ -7,7 +7,17 @@ config SOC_STM32F429ZI
     select RT_USING_USER_MAIN
     default y
 
+menu "Onboard Peripheral Drivers"
+
+    config BSP_USING_SDRAM
+        bool "Enable SDRAM"
+        select BSP_USING_FMC
+        default n
+
+endmenu
+
 menu "On-chip Peripheral Drivers"
+
     config BSP_USING_GPIO
         bool "Enable GPIO"
         select RT_USING_PIN
@@ -15,8 +25,8 @@ menu "On-chip Peripheral Drivers"
 
     menuconfig BSP_USING_UART
         bool "Enable UART"
-        select RT_USING_SERIAL
         default y
+        select RT_USING_SERIAL
         if BSP_USING_UART
             config BSP_USING_UART1
                 bool "Enable UART1"
@@ -26,14 +36,24 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable UART1 RX DMA"
                 depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
                 default n
+
+            config BSP_USING_UART2
+                bool "Enable UART2"
+                default n
+
+            config BSP_UART2_RX_USING_DMA
+                bool "Enable UART2 RX DMA"
+                depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
+                default n
+                
         endif
         
     menuconfig BSP_USING_I2C1
         bool "Enable I2C1 BUS (software simulation)"
+        default n
         select RT_USING_I2C
         select RT_USING_I2C_BITOPS
         select RT_USING_PIN
-        default n
         if BSP_USING_I2C1
             config BSP_I2C1_SCL_PIN
                 int "I2C1 scl pin number"
@@ -48,7 +68,7 @@ menu "On-chip Peripheral Drivers"
     menuconfig BSP_USING_SPI
         bool "Enable SPI BUS"
         select RT_USING_SPI
-        default n
+        default y
         if BSP_USING_SPI  
             config BSP_USING_SPI3
                 bool "Enable SPI3 BUS"
@@ -81,9 +101,16 @@ menu "On-chip Peripheral Drivers"
         select RT_USING_USB_DEVICE
         default n
 
+    config BSP_USING_LCD
+        bool "Enable LCD"
+        default n
+
     config BSP_USING_LTDC
         bool "Enable LTDC"
+        select BSP_USING_SDRAM
+        select BSP_USING_LCD
         default n
+
     source "../libraries/HAL_Drivers/Kconfig"
 
 endmenu

bsp/stm32/stm32f429-st-disco/board/SConscript

@@ -18,9 +18,6 @@ if GetDepend(['BSP_USING_QSPI_FLASH']):
 if GetDepend(['PKG_USING_FAL']):
     src += ['ports/qspi_mnt.c']
 
-if GetDepend(['BSP_USING_LCD_OTM8009A']):
-    src += ['ports/drv_otm8009a.c']
-    
 if GetDepend(['BSP_USING_TOUCH']):
     src += Glob('ports/touch/*.c')
 
@@ -30,6 +27,9 @@ if GetDepend(['BSP_USING_SDCARD']):
 if GetDepend(['BSP_USING_QSPI']):
     src += ['ports/drv_qspi_flash.c']
 
+if GetDepend(['BSP_USING_LCD']):
+    src += ['ports/ili9341.c']
+
 path =  [cwd]
 path += [cwd + '/CubeMX_Config/Inc']
 path += [cwd + '/ports']

bsp/stm32/stm32f429-st-disco/board/board.c

@@ -48,12 +48,15 @@ void SystemClock_Config(void)
   {
     Error_Handler();
   }
+  /*##-2- LTDC Clock Configuration ###########################################*/  
+  /* LCD clock configuration */
+  /* PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 MHz */
+  /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 192 MHz */
+  /* PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 192/4 = 48 MHz */
+  /* LTDC clock frequency = PLLLCDCLK / RCC_PLLSAIDIVR_8 = 48/8 = 6 MHz */
   PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
-  PeriphClkInitStruct.PLLSAI.PLLSAIN = 50;
+  PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
-  PeriphClkInitStruct.PLLSAI.PLLSAIR = 2;
+  PeriphClkInitStruct.PLLSAI.PLLSAIR = 4;
-  PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
+  PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_8;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); 
-  {
-    Error_Handler();
-  }
 }

bsp/stm32/stm32f429-st-disco/board/ports/ili9341.c

@@ -0,0 +1,313 @@
+/*
+ * File      : ili9341.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2020, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-11     RT-Thread    the first version
+ */
+#include "rtthread.h"
+#include "stm32f4xx_hal.h"
+#include "ili9341.h"
+
+/** 
+  * @brief  LCD Control pin  
+  */ 
+#define LCD_NCS_PIN                             GPIO_PIN_2
+#define LCD_NCS_GPIO_PORT                       GPIOC
+#define LCD_NCS_GPIO_CLK_ENABLE()               __HAL_RCC_GPIOC_CLK_ENABLE()
+#define LCD_NCS_GPIO_CLK_DISABLE()              __HAL_RCC_GPIOC_CLK_DISABLE()
+
+/** 
+  * @brief  LCD Command/data pin  
+  */
+#define LCD_WRX_PIN                             GPIO_PIN_13
+#define LCD_WRX_GPIO_PORT                       GPIOD
+#define LCD_WRX_GPIO_CLK_ENABLE()               __HAL_RCC_GPIOD_CLK_ENABLE()
+#define LCD_WRX_GPIO_CLK_DISABLE()              __HAL_RCC_GPIOD_CLK_DISABLE()
+  
+#define LCD_RDX_PIN                             GPIO_PIN_12
+#define LCD_RDX_GPIO_PORT                       GPIOD
+#define LCD_RDX_GPIO_CLK_ENABLE()               __HAL_RCC_GPIOD_CLK_ENABLE()
+#define LCD_RDX_GPIO_CLK_DISABLE()              __HAL_RCC_GPIOD_CLK_DISABLE()
+
+/* Maximum Timeout values for flags waiting loops */   
+#define SPIx_TIMEOUT_MAX              ((uint32_t)0x1000)
+
+/* Chip Select macro definition */
+#define LCD_CS_LOW()       HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_RESET)
+#define LCD_CS_HIGH()      HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_SET)
+
+/* Set WRX High to send data */
+#define LCD_WRX_LOW()      HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_RESET)
+#define LCD_WRX_HIGH()     HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_SET)
+
+/* Set WRX High to send data */
+#define LCD_RDX_LOW()      HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_RESET)
+#define LCD_RDX_HIGH()     HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_SET)
+
+static uint8_t Is_LCD_IO_Initialized = 0;
+static SPI_HandleTypeDef SpiHandle;
+
+/**
+  * @brief  SPIx Bus initialization
+  */
+static void SPIx_Init(void)
+{
+  if(HAL_SPI_GetState(&SpiHandle) == HAL_SPI_STATE_RESET)
+  {
+    /* SPI configuration -----------------------------------------------------*/
+    SpiHandle.Instance = SPI5;
+    /* SPI baudrate is set to 5.6 MHz (PCLK2/SPI_BaudRatePrescaler = 90/16 = 5.625 MHz) 
+    */  
+    SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
+
+    /* On STM32F429I-Discovery, LCD ID cannot be read then keep a common configuration */
+    /* for LCD and GYRO (SPI_DIRECTION_2LINES) */
+    /* Note: To read a register a LCD, SPI_DIRECTION_1LINE should be set */
+    SpiHandle.Init.Direction      = SPI_DIRECTION_2LINES;
+    SpiHandle.Init.CLKPhase       = SPI_PHASE_1EDGE;
+    SpiHandle.Init.CLKPolarity    = SPI_POLARITY_LOW;
+    SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
+    SpiHandle.Init.CRCPolynomial  = 7;
+    SpiHandle.Init.DataSize       = SPI_DATASIZE_8BIT;
+    SpiHandle.Init.FirstBit       = SPI_FIRSTBIT_MSB;
+    SpiHandle.Init.NSS            = SPI_NSS_SOFT;
+    SpiHandle.Init.TIMode         = SPI_TIMODE_DISABLED;
+    SpiHandle.Init.Mode           = SPI_MODE_MASTER;
+  
+    HAL_SPI_Init(&SpiHandle);
+  } 
+}
+
+/**
+  * @brief  Configures the LCD_SPI interface.
+  */
+static void LCD_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStructure;
+  
+  if(Is_LCD_IO_Initialized == 0)
+  {
+    Is_LCD_IO_Initialized = 1; 
+    
+    /* Configure NCS in Output Push-Pull mode */
+    LCD_WRX_GPIO_CLK_ENABLE();
+    GPIO_InitStructure.Pin     = LCD_WRX_PIN;
+    GPIO_InitStructure.Mode    = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStructure.Pull    = GPIO_NOPULL;
+    GPIO_InitStructure.Speed   = GPIO_SPEED_FAST;
+    HAL_GPIO_Init(LCD_WRX_GPIO_PORT, &GPIO_InitStructure);
+    
+    LCD_RDX_GPIO_CLK_ENABLE();
+    GPIO_InitStructure.Pin     = LCD_RDX_PIN;
+    GPIO_InitStructure.Mode    = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStructure.Pull    = GPIO_NOPULL;
+    GPIO_InitStructure.Speed   = GPIO_SPEED_FAST;
+    HAL_GPIO_Init(LCD_RDX_GPIO_PORT, &GPIO_InitStructure);
+    
+    /* Configure the LCD Control pins ----------------------------------------*/
+    LCD_NCS_GPIO_CLK_ENABLE();
+    
+    /* Configure NCS in Output Push-Pull mode */
+    GPIO_InitStructure.Pin     = LCD_NCS_PIN;
+    GPIO_InitStructure.Mode    = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStructure.Pull    = GPIO_NOPULL;
+    GPIO_InitStructure.Speed   = GPIO_SPEED_FAST;
+    HAL_GPIO_Init(LCD_NCS_GPIO_PORT, &GPIO_InitStructure);
+    
+    /* Set or Reset the control line */
+    LCD_CS_LOW();
+    LCD_CS_HIGH();
+    
+    SPIx_Init();
+  }
+}
+
+/**
+  * @brief  Writes data to the selected LCD register.
+  * @param  data: data to lcd.
+  * @retval None
+  */
+static void ili9341_write_data(uint16_t data)
+{
+  /* Set WRX to send data */
+  LCD_WRX_HIGH();
+  
+  /* Reset LCD control line(/CS) and Send data */  
+  LCD_CS_LOW();
+  
+	HAL_SPI_Transmit(&SpiHandle, (uint8_t*) &data, 1, SPIx_TIMEOUT_MAX);
+	
+  /* Deselect: Chip Select high */
+  LCD_CS_HIGH();
+}
+
+/**
+  * @brief  Writes  to the selected LCD register.
+  * @param  reg: address of the selected register.
+  * @retval None
+  */
+static void ili9341_write_register(uint8_t reg)
+{
+  /* Reset WRX to send command */
+  LCD_WRX_LOW();
+  
+  /* Reset LCD control line(/CS) and Send command */
+  LCD_CS_LOW();
+  
+  HAL_SPI_Transmit(&SpiHandle, (uint8_t*) &reg, 1, SPIx_TIMEOUT_MAX);
+  
+  /* Deselect: Chip Select high */
+  LCD_CS_HIGH();
+}
+
+/**
+  * @brief  Power on the LCD.
+  * @param  None
+  * @retval int
+  */
+int ili9341_hw_init(void)
+{
+  /* Initialize ILI9341 low level bus layer ----------------------------------*/
+  LCD_GPIO_Init();
+  
+  /* Configure LCD */
+  ili9341_write_register(0xCA);
+  ili9341_write_data(0xC3);
+  ili9341_write_data(0x08);
+  ili9341_write_data(0x50);
+  ili9341_write_register(LCD_POWERB);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0xC1);
+  ili9341_write_data(0x30);
+  ili9341_write_register(LCD_POWER_SEQ);
+  ili9341_write_data(0x64);
+  ili9341_write_data(0x03);
+  ili9341_write_data(0x12);
+  ili9341_write_data(0x81);
+  ili9341_write_register(LCD_DTCA);
+  ili9341_write_data(0x85);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0x78);
+  ili9341_write_register(LCD_POWERA);
+  ili9341_write_data(0x39);
+  ili9341_write_data(0x2C);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0x34);
+  ili9341_write_data(0x02);
+  ili9341_write_register(LCD_PRC);
+  ili9341_write_data(0x20);
+  ili9341_write_register(LCD_DTCB);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0x00);
+  ili9341_write_register(LCD_FRMCTR1);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0x1B);
+  ili9341_write_register(LCD_DFC);
+  ili9341_write_data(0x0A);
+  ili9341_write_data(0xA2);
+  ili9341_write_register(LCD_POWER1);
+  ili9341_write_data(0x10);
+  ili9341_write_register(LCD_POWER2);
+  ili9341_write_data(0x10);
+  ili9341_write_register(LCD_VCOM1);
+  ili9341_write_data(0x45);
+  ili9341_write_data(0x15);
+  ili9341_write_register(LCD_VCOM2);
+  ili9341_write_data(0x90);
+  ili9341_write_register(LCD_MAC);
+  ili9341_write_data(0xC8);
+  ili9341_write_register(LCD_3GAMMA_EN);
+  ili9341_write_data(0x00);
+  ili9341_write_register(LCD_RGB_INTERFACE);
+  ili9341_write_data(0xC2);
+  ili9341_write_register(LCD_DFC);
+  ili9341_write_data(0x0A);
+  ili9341_write_data(0xA7);
+  ili9341_write_data(0x27);
+  ili9341_write_data(0x04);
+  
+  /* Colomn address set */
+  ili9341_write_register(LCD_COLUMN_ADDR);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0xEF);
+  /* Page address set */
+  ili9341_write_register(LCD_PAGE_ADDR);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0x01);
+  ili9341_write_data(0x3F);
+  ili9341_write_register(LCD_INTERFACE);
+  ili9341_write_data(0x01);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0x06);
+  
+  ili9341_write_register(LCD_GRAM);
+  rt_thread_mdelay(20);
+  
+  ili9341_write_register(LCD_GAMMA);
+  ili9341_write_data(0x01);
+  
+  ili9341_write_register(LCD_PGAMMA);
+  ili9341_write_data(0x0F);
+  ili9341_write_data(0x29);
+  ili9341_write_data(0x24);
+  ili9341_write_data(0x0C);
+  ili9341_write_data(0x0E);
+  ili9341_write_data(0x09);
+  ili9341_write_data(0x4E);
+  ili9341_write_data(0x78);
+  ili9341_write_data(0x3C);
+  ili9341_write_data(0x09);
+  ili9341_write_data(0x13);
+  ili9341_write_data(0x05);
+  ili9341_write_data(0x17);
+  ili9341_write_data(0x11);
+  ili9341_write_data(0x00);
+  ili9341_write_register(LCD_NGAMMA);
+  ili9341_write_data(0x00);
+  ili9341_write_data(0x16);
+  ili9341_write_data(0x1B);
+  ili9341_write_data(0x04);
+  ili9341_write_data(0x11);
+  ili9341_write_data(0x07);
+  ili9341_write_data(0x31);
+  ili9341_write_data(0x33);
+  ili9341_write_data(0x42);
+  ili9341_write_data(0x05);
+  ili9341_write_data(0x0C);
+  ili9341_write_data(0x0A);
+  ili9341_write_data(0x28);
+  ili9341_write_data(0x2F);
+  ili9341_write_data(0x0F);
+  
+  ili9341_write_register(LCD_SLEEP_OUT);
+  rt_thread_mdelay(20);
+  ili9341_write_register(LCD_DISPLAY_ON);
+  /* GRAM start writing */
+  ili9341_write_register(LCD_GRAM);
+	
+	return 0;
+}
+INIT_DEVICE_EXPORT(ili9341_hw_init);
+
+
+

bsp/stm32/stm32f429-st-disco/board/ports/ili9341.h

@@ -0,0 +1,145 @@
+/*
+ * File      : ili9341.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2020, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-11     RT-Thread    the first version
+ */
+#ifndef __ILI9341_H
+#define __ILI9341_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif 
+
+
+/** 
+  * @brief ILI9341 chip IDs  
+  */ 
+#define ILI9341_ID                  0x9341
+
+/** 
+  * @brief  ILI9341 Registers  
+  */
+
+/* Level 1 Commands */
+#define LCD_SWRESET             0x01   /* Software Reset */
+#define LCD_READ_DISPLAY_ID     0x04   /* Read display identification information */
+#define LCD_RDDST               0x09   /* Read Display Status */
+#define LCD_RDDPM               0x0A   /* Read Display Power Mode */
+#define LCD_RDDMADCTL           0x0B   /* Read Display MADCTL */
+#define LCD_RDDCOLMOD           0x0C   /* Read Display Pixel Format */
+#define LCD_RDDIM               0x0D   /* Read Display Image Format */
+#define LCD_RDDSM               0x0E   /* Read Display Signal Mode */
+#define LCD_RDDSDR              0x0F   /* Read Display Self-Diagnostic Result */
+#define LCD_SPLIN               0x10   /* Enter Sleep Mode */
+#define LCD_SLEEP_OUT           0x11   /* Sleep out register */
+#define LCD_PTLON               0x12   /* Partial Mode ON */
+#define LCD_NORMAL_MODE_ON      0x13   /* Normal Display Mode ON */
+#define LCD_DINVOFF             0x20   /* Display Inversion OFF */
+#define LCD_DINVON              0x21   /* Display Inversion ON */
+#define LCD_GAMMA               0x26   /* Gamma register */
+#define LCD_DISPLAY_OFF         0x28   /* Display off register */
+#define LCD_DISPLAY_ON          0x29   /* Display on register */
+#define LCD_COLUMN_ADDR         0x2A   /* Colomn address register */ 
+#define LCD_PAGE_ADDR           0x2B   /* Page address register */ 
+#define LCD_GRAM                0x2C   /* GRAM register */   
+#define LCD_RGBSET              0x2D   /* Color SET */   
+#define LCD_RAMRD               0x2E   /* Memory Read */   
+#define LCD_PLTAR               0x30   /* Partial Area */   
+#define LCD_VSCRDEF             0x33   /* Vertical Scrolling Definition */   
+#define LCD_TEOFF               0x34   /* Tearing Effect Line OFF */   
+#define LCD_TEON                0x35   /* Tearing Effect Line ON */   
+#define LCD_MAC                 0x36   /* Memory Access Control register*/
+#define LCD_VSCRSADD            0x37   /* Vertical Scrolling Start Address */   
+#define LCD_IDMOFF              0x38   /* Idle Mode OFF */   
+#define LCD_IDMON               0x39   /* Idle Mode ON */   
+#define LCD_PIXEL_FORMAT        0x3A   /* Pixel Format register */
+#define LCD_WRITE_MEM_CONTINUE  0x3C   /* Write Memory Continue */   
+#define LCD_READ_MEM_CONTINUE   0x3E   /* Read Memory Continue */   
+#define LCD_SET_TEAR_SCANLINE   0x44   /* Set Tear Scanline */   
+#define LCD_GET_SCANLINE        0x45   /* Get Scanline */   
+#define LCD_WDB                 0x51   /* Write Brightness Display register */
+#define LCD_RDDISBV             0x52   /* Read Display Brightness */   
+#define LCD_WCD                 0x53   /* Write Control Display register*/
+#define LCD_RDCTRLD             0x54   /* Read CTRL Display */   
+#define LCD_WRCABC              0x55   /* Write Content Adaptive Brightness Control */   
+#define LCD_RDCABC              0x56   /* Read Content Adaptive Brightness Control */   
+#define LCD_WRITE_CABC          0x5E   /* Write CABC Minimum Brightness */   
+#define LCD_READ_CABC           0x5F   /* Read CABC Minimum Brightness */   
+#define LCD_READ_ID1            0xDA   /* Read ID1 */
+#define LCD_READ_ID2            0xDB   /* Read ID2 */
+#define LCD_READ_ID3            0xDC   /* Read ID3 */
+
+/* Level 2 Commands */
+#define LCD_RGB_INTERFACE       0xB0   /* RGB Interface Signal Control */
+#define LCD_FRMCTR1             0xB1   /* Frame Rate Control (In Normal Mode) */
+#define LCD_FRMCTR2             0xB2   /* Frame Rate Control (In Idle Mode) */
+#define LCD_FRMCTR3             0xB3   /* Frame Rate Control (In Partial Mode) */
+#define LCD_INVTR               0xB4   /* Display Inversion Control */
+#define LCD_BPC                 0xB5   /* Blanking Porch Control register */
+#define LCD_DFC                 0xB6   /* Display Function Control register */
+#define LCD_ETMOD               0xB7   /* Entry Mode Set */
+#define LCD_BACKLIGHT1          0xB8   /* Backlight Control 1 */
+#define LCD_BACKLIGHT2          0xB9   /* Backlight Control 2 */
+#define LCD_BACKLIGHT3          0xBA   /* Backlight Control 3 */
+#define LCD_BACKLIGHT4          0xBB   /* Backlight Control 4 */
+#define LCD_BACKLIGHT5          0xBC   /* Backlight Control 5 */
+#define LCD_BACKLIGHT7          0xBE   /* Backlight Control 7 */
+#define LCD_BACKLIGHT8          0xBF   /* Backlight Control 8 */
+#define LCD_POWER1              0xC0   /* Power Control 1 register */
+#define LCD_POWER2              0xC1   /* Power Control 2 register */
+#define LCD_VCOM1               0xC5   /* VCOM Control 1 register */
+#define LCD_VCOM2               0xC7   /* VCOM Control 2 register */
+#define LCD_NVMWR               0xD0   /* NV Memory Write */
+#define LCD_NVMPKEY             0xD1   /* NV Memory Protection Key */
+#define LCD_RDNVM               0xD2   /* NV Memory Status Read */
+#define LCD_READ_ID4            0xD3   /* Read ID4 */
+#define LCD_PGAMMA              0xE0   /* Positive Gamma Correction register */
+#define LCD_NGAMMA              0xE1   /* Negative Gamma Correction register */
+#define LCD_DGAMCTRL1           0xE2   /* Digital Gamma Control 1 */
+#define LCD_DGAMCTRL2           0xE3   /* Digital Gamma Control 2 */
+#define LCD_INTERFACE           0xF6   /* Interface control register */
+
+/* Extend register commands */
+#define LCD_POWERA               0xCB   /* Power control A register */
+#define LCD_POWERB               0xCF   /* Power control B register */
+#define LCD_DTCA                 0xE8   /* Driver timing control A */
+#define LCD_DTCB                 0xEA   /* Driver timing control B */
+#define LCD_POWER_SEQ            0xED   /* Power on sequence register */
+#define LCD_3GAMMA_EN            0xF2   /* 3 Gamma enable register */
+#define LCD_PRC                  0xF7   /* Pump ratio control register */
+
+/* Size of read registers */
+#define LCD_READ_ID4_SIZE        3      /* Size of Read ID4 */
+
+  
+/** @defgroup ILI9341_Exported_Functions
+  * @{
+  */ 
+int ili9341_hw_init(void);
+
+      
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ILI9341_H */
+
+

bsp/stm32/stm32f429-st-disco/board/ports/lcd_port.h

@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-08     bernard      The first version for STM32F429 DISCO
+ */
+
+#ifndef __LCD_PORT_H__
+#define __LCD_PORT_H__
+
+/* 240 * 320 */
+#define LCD_WIDTH           240
+#define LCD_HEIGHT          320
+#define LCD_BITS_PER_PIXEL  16
+#define LCD_BUF_SIZE        (LCD_WIDTH * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8)
+#define LCD_PIXEL_FORMAT    RTGRAPHIC_PIXEL_FORMAT_RGB565
+
+#define LCD_HSYNC_WIDTH     10
+#define LCD_VSYNC_HEIGHT    2
+#define LCD_HBP             20
+#define LCD_VBP             2
+#define LCD_HFP             10
+#define LCD_VFP             5
+
+#define LCD_BACKLIGHT_USING_GPIO
+#define LCD_BL_GPIO_NUM     GET_PIN(D, 7)
+#define LCD_DISP_GPIO_NUM   GET_PIN(D, 4)
+
+#endif /* __LCD_PORT_H__ */

bsp/stm32/stm32f429-st-disco/board/ports/sdram_port.h

@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-08     bernard      The first version for STM32F429 DISCO
+ */
+
+#ifndef __SDRAM_PORT_H__
+#define __SDRAM_PORT_H__
+
+/* parameters for sdram peripheral */
+/* Bank1 or Bank2 */
+#define SDRAM_TARGET_BANK               2
+/* stm32f4 Bank1:0XC0000000  Bank2:0XD0000000 */
+#define SDRAM_BANK_ADDR                 ((uint32_t)0XD0000000)
+/* data width: 8, 16, 32 */
+#define SDRAM_DATA_WIDTH                16
+/* column bit numbers: 8, 9, 10, 11 */
+#define SDRAM_COLUMN_BITS               8
+/* row bit numbers: 11, 12, 13 */
+#define SDRAM_ROW_BITS                  12
+/* cas latency clock number: 1, 2, 3 */
+#define SDRAM_CAS_LATENCY               3
+/* read pipe delay: 0, 1, 2 */
+#define SDRAM_RPIPE_DELAY               1
+/* clock divid: 2, 3 */
+#define SDCLOCK_PERIOD                  2
+/* refresh rate counter */
+#define SDRAM_REFRESH_COUNT             ((uint32_t)0x056A)
+#define SDRAM_SIZE                      ((uint32_t)0x800000)
+
+/* Timing configuration for IS42S16400J */
+/* 90 MHz of SD clock frequency (180MHz/2) */
+/* TMRD: 2 Clock cycles */
+#define LOADTOACTIVEDELAY               2
+/* TXSR: 7x11.90ns */
+#define EXITSELFREFRESHDELAY            7
+/* TRAS: 4x11.90ns */
+#define SELFREFRESHTIME                 4
+/* TRC:  7x11.90ns */
+#define ROWCYCLEDELAY                   7
+/* TWR:  2 Clock cycles */
+#define WRITERECOVERYTIME               2
+/* TRP:  2x11.90ns */
+#define RPDELAY                         2
+/* TRCD: 2x11.90ns */
+#define RCDDELAY                        2
+
+/* memory mode register */
+#define SDRAM_MODEREG_BURST_LENGTH_1             ((uint16_t)0x0000)
+#define SDRAM_MODEREG_BURST_LENGTH_2             ((uint16_t)0x0001)
+#define SDRAM_MODEREG_BURST_LENGTH_4             ((uint16_t)0x0002)
+#define SDRAM_MODEREG_BURST_LENGTH_8             ((uint16_t)0x0004)
+#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL      ((uint16_t)0x0000)
+#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED     ((uint16_t)0x0008)
+#define SDRAM_MODEREG_CAS_LATENCY_2              ((uint16_t)0x0020)
+#define SDRAM_MODEREG_CAS_LATENCY_3              ((uint16_t)0x0030)
+#define SDRAM_MODEREG_OPERATING_MODE_STANDARD    ((uint16_t)0x0000)
+#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
+#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE     ((uint16_t)0x0200)
+
+#endif

bsp/stm32/stm32f429-st-disco/rtconfig.h

@@ -26,12 +26,13 @@
 #define RT_USING_EVENT
 #define RT_USING_MAILBOX
 #define RT_USING_MESSAGEQUEUE
+#define RT_USING_SIGNALS
 
 /* Memory Management */
 
 #define RT_USING_MEMPOOL
 #define RT_USING_MEMHEAP
-#define RT_USING_SMALL_MEM
+#define RT_USING_MEMHEAP_AS_HEAP
 #define RT_USING_HEAP
 
 /* Kernel Device Object */
@@ -40,7 +41,7 @@
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart1"
-#define RT_VER_NUM 0x40002
+#define RT_VER_NUM 0x40003
 #define ARCH_ARM
 #define RT_USING_CPU_FFS
 #define ARCH_ARM_CORTEX_M
@@ -69,6 +70,7 @@
 #define FINSH_CMD_SIZE 80
 #define FINSH_USING_MSH
 #define FINSH_USING_MSH_DEFAULT
+#define FINSH_USING_MSH_ONLY
 #define FINSH_ARG_MAX 10
 
 /* Device virtual file system */
@@ -90,13 +92,15 @@
 #define RT_USING_I2C
 #define RT_USING_I2C_BITOPS
 #define RT_USING_PIN
-
+#define RT_USING_SPI
 /* Using USB */
 
 
 /* POSIX layer and C standard library */
 
 #define RT_USING_LIBC
+#define RT_USING_PTHREADS
+#define PTHREAD_NUM_MAX 8
 #define RT_USING_POSIX
 
 /* Network */
@@ -158,6 +162,12 @@
 
 /* samples: kernel and components samples */
 
+
+/* Privated Packages of RealThread */
+
+
+/* Network Utilities */
+
 #define SOC_FAMILY_STM32
 #define SOC_SERIES_STM32F4
 
@@ -165,11 +175,18 @@
 
 #define SOC_STM32F429ZI
 
+/* Onboard Peripheral Drivers */
+
+#define BSP_USING_SDRAM
+
 /* On-chip Peripheral Drivers */
 
 #define BSP_USING_GPIO
 #define BSP_USING_UART
 #define BSP_USING_UART1
+#define BSP_USING_FMC
+#define BSP_USING_LCD
+#define BSP_USING_LTDC
 
 /* Board extended module Drivers */
 

bsp/stm32/stm32h743-st-nucleo/board/SConscript

@@ -1,6 +1,8 @@
 import rtconfig
 from building import *
 
+Import('SDK_LIB')
+
 cwd = GetCurrentDir()
 
 # add the general drivers.
@@ -10,12 +12,14 @@ src += Glob('CubeMX_Config/Src/stm32h7xx_hal_msp.c')
 path = [cwd]
 path += [cwd + '/CubeMX_Config/Inc']
 
+startup_path_prefix = SDK_LIB
+
 if rtconfig.CROSS_TOOL == 'gcc':
-    src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h743xx.s']
+    src += [startup_path_prefix + '/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h743xx.s']
 elif rtconfig.CROSS_TOOL == 'keil':
-    src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h743xx.s']
+    src += [startup_path_prefix + '/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h743xx.s']
 elif rtconfig.CROSS_TOOL == 'iar':
-    src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h743xx.s']
+    src += [startup_path_prefix + '/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h743xx.s']
 
 # STM32H743xx || STM32H750xx || STM32F753xx
 # You can select chips from the list above

bsp/stm32/stm32h750-armfly-h7-tool/board/SConscript

@@ -17,11 +17,11 @@ path = [cwd]
 path += [cwd + '/CubeMX_Config/Inc']
 
 if rtconfig.CROSS_TOOL == 'gcc':
-    src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h743xx.s']
+    src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h750xx.s']
 elif rtconfig.CROSS_TOOL == 'keil':
-    src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h743xx.s']
+    src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h750xx.s']
 elif rtconfig.CROSS_TOOL == 'iar':
-    src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h743xx.s']
+    src += [cwd + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h750xx.s']
 
 # STM32H743xx || STM32H750xx || STM32F753xx
 # You can select chips from the list above

bsp/stm32/stm32mp157a-st-ev1/.config

@@ -0,0 +1,450 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# RT-Thread Configuration
+#
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_ALIGN_SIZE=4
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=100
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=256
+CONFIG_RT_USING_TIMER_SOFT=y
+CONFIG_RT_TIMER_THREAD_PRIO=4
+CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
+CONFIG_RT_DEBUG=y
+CONFIG_RT_DEBUG_COLOR=y
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_SIGNALS is not set
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+CONFIG_RT_USING_MEMHEAP=y
+# CONFIG_RT_USING_NOHEAP is not set
+# CONFIG_RT_USING_SMALL_MEM is not set
+# CONFIG_RT_USING_SLAB is not set
+CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
+CONFIG_RT_USING_HEAP=y
+
+#
+# Kernel Device Object
+#
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
+CONFIG_RT_VER_NUM=0x40003
+CONFIG_ARCH_ARM=y
+CONFIG_RT_USING_CPU_FFS=y
+CONFIG_ARCH_ARM_CORTEX_M=y
+CONFIG_ARCH_ARM_CORTEX_M4=y
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+
+#
+# C++ features
+#
+# CONFIG_RT_USING_CPLUSPLUS is not set
+
+#
+# Command shell
+#
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=4096
+CONFIG_FINSH_CMD_SIZE=80
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_USING_MSH_DEFAULT=y
+# CONFIG_FINSH_USING_MSH_ONLY is not set
+CONFIG_FINSH_ARG_MAX=10
+
+#
+# Device virtual file system
+#
+# CONFIG_RT_USING_DFS is not set
+
+#
+# Device Drivers
+#
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
+CONFIG_RT_USING_SERIAL=y
+CONFIG_RT_SERIAL_USING_DMA=y
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+# CONFIG_RT_USING_SPI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
+# CONFIG_RT_USING_WIFI is not set
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+
+#
+# POSIX layer and C standard library
+#
+CONFIG_RT_USING_LIBC=y
+# CONFIG_RT_USING_PTHREADS is not set
+# CONFIG_RT_USING_MODULE is not set
+
+#
+# Network
+#
+
+#
+# Socket abstraction layer
+#
+# CONFIG_RT_USING_SAL is not set
+
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
+#
+# light weight TCP/IP stack
+#
+# CONFIG_RT_USING_LWIP is not set
+
+#
+# AT commands
+#
+# CONFIG_RT_USING_AT is not set
+
+#
+# VBUS(Virtual Software BUS)
+#
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_LWP is not set
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
+# CONFIG_PKG_USING_NANOPB is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
+# CONFIG_PKG_USING_WIZNET is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_libsodium is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+
+#
+# language packages
+#
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+
+#
+# multimedia packages
+#
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+
+#
+# system packages
+#
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+
+#
+# miscellaneous packages
+#
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_UKAL is not set
+CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_SERIES_STM32MP1=y
+
+#
+# Hardware Drivers Config
+#
+CONFIG_SOC_STM32MP157A=y
+
+#
+# Onboard Peripheral Drivers
+#
+CONFIG_BSP_USING_STLINK_TO_USART=y
+
+#
+# On-chip Peripheral Drivers
+#
+CONFIG_BSP_USING_GPIO=y
+# CONFIG_BSP_USING_WWDG is not set
+CONFIG_BSP_USING_UART=y
+# CONFIG_BSP_USING_UART3 is not set
+# CONFIG_BSP_UART3_RX_USING_DMA is not set
+CONFIG_BSP_USING_UART4=y
+# CONFIG_BSP_UART4_RX_USING_DMA is not set
+# CONFIG_BSP_UART4_TX_USING_DMA is not set
+# CONFIG_BSP_USING_TIM is not set
+# CONFIG_BSP_USING_LPTIM is not set
+# CONFIG_BSP_USING_PWM is not set
+# CONFIG_BSP_USING_ADC is not set
+# CONFIG_BSP_USING_DAC is not set
+# CONFIG_BSP_USING_I2C1 is not set
+# CONFIG_BSP_USING_SPI is not set
+# CONFIG_BSP_USING_CRC is not set
+# CONFIG_BSP_USING_RNG is not set
+# CONFIG_BSP_USING_UDID is not set
+
+#
+# Board extended module Drivers
+#

bsp/stm32/stm32mp157a-st-ev1/.gitignore

@@ -0,0 +1,42 @@
+*.pyc
+*.map
+*.dblite
+*.elf
+*.bin
+*.hex
+*.axf
+*.exe
+*.pdb
+*.idb
+*.ilk
+*.old
+build
+Debug
+documentation/html
+packages/
+*~
+*.o
+*.obj
+*.out
+*.bak
+*.dep
+*.lib
+*.i
+*.d
+.DS_Stor*
+.config 3
+.config 4
+.config 5
+Midea-X1
+*.uimg
+GPATH
+GRTAGS
+GTAGS
+.vscode
+JLinkLog.txt
+JLinkSettings.ini
+DebugConfig/
+RTE/
+settings/
+*.uvguix*
+cconfig.h

bsp/stm32/stm32mp157a-st-ev1/.project

@@ -0,0 +1,29 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+  <name>stm32mp157a-st-ev1</name>
+  <comment />
+  <projects>
+	</projects>
+  <buildSpec>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+      <triggers>clean,full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+      <triggers>full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+  </buildSpec>
+  <natures>
+    <nature>org.eclipse.cdt.core.cnature</nature>
+    <nature>org.rt-thread.studio.rttnature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+  </natures>
+  <linkedResources>
+    </linkedResources>
+</projectDescription>

bsp/stm32/stm32mp157a-st-ev1/.settings/language.settings.xml

@@ -0,0 +1,14 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project>
+	<configuration id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.553091094" name="Debug">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="371189542906764503" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+</project>

bsp/stm32/stm32mp157a-st-ev1/.settings/org.eclipse.core.runtime.prefs

@@ -0,0 +1,3 @@
+content-types/enabled=true
+content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
+eclipse.preferences.version=1

bsp/stm32/stm32mp157a-st-ev1/.settings/projcfg.ini

@@ -0,0 +1,8 @@
+#RT-Thread Studio Project Configuration
+#Thu Jul 23 15:17:50 CST 2020
+mcu_name=STM32MP157A
+hardware_adapter=ST-LINK
+mcu_base_nano_proj=true
+selected_rtt_version=latest
+project_base_bsp=true
+cfg_version=v2.0

bsp/stm32/stm32mp157a-st-ev1/.settings/stm32mp1.JLink.Debug.rttlaunch

@@ -0,0 +1,82 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.adapterName" value="J-Link"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="true"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.flashDeviceName" value="STM32MP157A"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="swd"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="STM32MP157A"/>
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+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${rtt_install_path}/repo/Extract/Debugger_Support_Packages/SEGGER/J-Link/6.30i/JLinkGDBServerCL.exe"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2331"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerRunAfterStopDebug" value="true"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerSwoPortNumber" value="2332"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerTelnetPortNumber" value="2333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.interfaceSpeed" value="auto"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.jlinkExecutable" value="${rtt_install_path}/repo/Extract/Debugger_Support_Packages/SEGGER/J-Link/6.30i/JLink.exe"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.secondResetType" value=""/>
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+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
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+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
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+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${rtt_gnu_gcc}/arm-none-eabi-gdb.exe"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/rtthread.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="stm32mp1"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/stm32mp1"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.debug.core.source_locator_id" value="org.eclipse.cdt.debug.core.sourceLocator"/>
+<stringAttribute key="org.eclipse.debug.core.source_locator_memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;sourceLookupDirector&gt;&#13;&#10;&lt;sourceContainers duplicates=&quot;false&quot;&gt;&#13;&#10;&lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#13;&amp;#10;&amp;lt;default/&amp;gt;&amp;#13;&amp;#10;&quot; typeId=&quot;org.eclipse.debug.core.containerType.default&quot;/&gt;&#13;&#10;&lt;/sourceContainers&gt;&#13;&#10;&lt;/sourceLookupDirector&gt;&#13;&#10;"/>
+<stringAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_ENCODING" value="GBK"/>
+<booleanAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_OUTPUT_ON" value="true"/>
+<booleanAttribute key="org.eclipse.debug.ui.ATTR_LAUNCH_IN_BACKGROUND" value="true"/>
+</launchConfiguration>

bsp/stm32/stm32mp157a-st-ev1/.settings/stm32mp1.STLink.Debug.rttlaunch

@@ -0,0 +1,51 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.adapterName" value="ST-LINK"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.connectMode" value="NORMAL"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.debugInterface" value="SWD"/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="3"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.erase" value="--skipErase"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.flashVerify" value="false"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDeviceId" value="org.eclipse.cdt.debug.gdbjtag.core.jtagdevice.genericDevice"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.otherDownloadOption" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.otherGdbserverOption" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="61235"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.resetMode" value=" -rst"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.resetRun" value="false"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${rtt_gnu_gcc}/arm-none-eabi-gdb.exe"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="remote"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/rtthread.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="stm32mp1"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/stm32mp1"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_ENCODING" value="GBK"/>
+</launchConfiguration>

bsp/stm32/stm32mp157a-st-ev1/Kconfig

@@ -0,0 +1,22 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "../libraries/Kconfig"
+source "board/Kconfig"
+

bsp/stm32/stm32mp157a-st-ev1/README.md

@@ -0,0 +1,165 @@
+# STM32MP157A-EV1 BSP (Board Support Package) Execution Instruction
+
+[中文页](README_zh.md) |
+
+## Introduction
+
+This document records the execution instruction of the BSP (board support package) provided by the RT-Thread development team for the STM32MP157A-EV1 development board.
+
+The document is covered in three parts:
+
+- STM32MP157A-EV1 Board Resources Introduction
+
+- Quickly Get Started
+
+- Advanced Features
+
+By reading the Quickly Get Started section developers can quickly get their hands on this BSP and run RT-Thread on the board. More advanced features will be introduced in the Advanced Features section to help developers take advantage of RT-Thread to drive more on-board resources.
+
+## STM32MP157A-EV1 Board Resources Introduction
+
+The STM32MP157A-EV1 is a development board based on a dual Cortex-A7 and Cortex-M4 core. The Cortex-A7 core operates at 650 MHZ and the Cortex-M4 operates at 209MHZ. There is no Flash inside the STM32MP157A.
+
+![board](figures/board.png)
+
+The mainly-used **on-board resources** are shown as follows:
+
+- MCU : STM32MP157AAAx
+- Common peripherals:
+  - 4 LEDs: LD4(PD8), LD5(PD9), LD2(PA13), LD3(PA14)
+  - 4 Buttons:  WAKE_UP, RESET (NRST), USER1(PA13), USER2 (PA14)
+- Common-used interface: USB, SD card, Ethernet, MIPI, USB HOST, Audio, HDMI, Arduino.
+- Debug interface: Standard JTAG/SWD.
+
+For more details about this board, please refer to the ST official documentation:
+
+[STM32MP157A-EV1 Development board introduction](https://www.st.com/content/st_com/zh/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-eval-boards/stm32mp157a-ev1.html)
+
+## Peripheral Condition
+
+Each peripheral supporting condition for this BSP is as follows:
+
+| On-board Peripheral            | **Support** |    **Remark**    |
+| :----------------------------- | :---------: | :--------------: |
+| USB TO UART                    |     YES     |                  |
+| PMIC                           |     NO      |                  |
+| CAMERA                         |     NO      |      OV5640      |
+| MFX                            |     NO      |                  |
+| FMC                            |     NO      | MT25F8G08A8ACAH4 |
+| QSPI FLASH                     |     NO      |   MX25L51245G    |
+| OpenAMP                        |     NO      |                  |
+| POWER                          |     NO      |                  |
+| SD Card (SDMMC1)               |     NO      |                  |
+| EMMC(SDMMC2)                   |     NO      |                  |
+| ETH                            |     NO      |                  |
+| AUDIO                          |     NO      |      WM8994      |
+| **On-chip Peripheral Drivers** | **Support** |    **Remark**    |
+| GPIO                           |     YES     |                  |
+| UART                           |     YES     | UART4 (ST-Link)  |
+| EXTI                           |     YES     |                  |
+| SPI                            |     YES     |                  |
+| TIM                            |     YES     |                  |
+| LPTIM                          |     YES     |                  |
+| I2C                            |     YES     |     Software     |
+| ADC                            |     YES     |                  |
+| DAC                            |     YES     |                  |
+| WWDG                           |     YES     |                  |
+| MDMA                           |     NO      |                  |
+| SPDIFRX                        |     NO      |                  |
+| DFSDM                          |     NO      |                  |
+| PWM                            |     NO      |                  |
+| FDCAN                          |     NO      |                  |
+| CRC                            |     NO      |                  |
+| RNG                            |     NO      |                  |
+| HASH                           |     NO      |                  |
+
+## Execution Instruction
+
+### Quickly Get Started
+
+This BSP provides MDK4,MDK5 and IAR projects for developers. Also support GCC development environment,Here's an example of the MDK5 development environment, to introduce how to run the system.
+
+#### Hardware Connection
+
+Use a USB cable to connect the development board to the PC and turn on the power switch.
+
+#### Compile And Download
+
+Double-click the project.uvprojx file, to open the MDK5 project, compile and download the program to the board.
+
+> By default, the project uses ST_LINK simulator to download the program, when the ST_LINK connects the board, clicking the download button can download the program to the board.
+
+#### Running Results
+
+After the program is successfully downloaded, the system runs automatically. Observe the running results of the LED on the development board, the orange LD4 will flash periodically.
+
+Connect the serial port of the board to PC, communicate with it via a serial terminal tool (115200-8-1-N). Restart the board and the startup information of RT-Thread will be observed:
+
+```bash
+ \ | /
+- RT -     Thread Operating System
+ / | \     3.1.1 build Nov 19 2018
+ 2006 - 2018 Copyright by rt-thread team
+msh >
+```
+
+#### Drivers
+
+##### 1. DAC
+
+- Open the [Env](https://www.rt-thread.io/download.html?download=Env) tool under this BSP;
+- Enter the `menuconfig` command, enter the Hardware Drivers config and open DAC, save and exit;
+- Enter the `scons --target=iar` command to regenerate project.
+
+###### Finsh
+
+Before you use a device, you need to find out if the device exists, and you can use the name of the DAC device that is enrolled with the command  `dac probe` . As shown as follows.
+
+```c
+msh />dac probe dac1
+probe dac1 success
+```
+
+Enable the channel of the device can use the command  `dac enable`  followed by the channel number.
+
+ ```c
+msh />dac probe dac1
+probe dac1 success
+ ```
+
+Set up the data of the channel for a DAC device can use the command  `dac write` followed by the channel number.
+
+```c
+msh />dac write 1 1000
+dac1 channel 1 write value is 1000
+```
+
+Disable the channel of the device can use the command `dac disable` followed by the channel number.
+
+```c
+msh />dac disable 1
+dac1 channel 1 disable success
+```
+
+### Advanced Features
+
+This BSP only enables GPIO and serial port 4 by default. If need more advanced features, you need to configure the BSP with RT-Thread Env tools, as follows:
+
+- Open the [Env](https://www.rt-thread.io/download.html?download=Env) tool under this BSP;
+- Enter the `menuconfig` command to configure the project, then save and exit;
+- Enter the  `pkgs --update` command to update the packages;
+- Enter the `scons --target=iar`command to regenerate the  project.
+
+## Notes
+
+- Before downloading the program, set the board to the mode of "Engineering Mode".  The BOOT switch sets to BOOT0=0,BOOT1 = 0 and BOOT2=1, as shown below:
+
+![boot](figures/boot.png)
+
+- If need to reburn the program, please reset the development board.
+
+## Contact Information
+
+accendant:
+
+- [liukang](https://github.com/thread-liu)

bsp/stm32/stm32mp157a-st-ev1/README_zh.md

@@ -0,0 +1,179 @@
+# STM32MP157A-EV1 开发板 BSP 说明
+
+## 简介
+
+本文档为 RT-Thread 开发团队为 STM32MP157A-EV1 开发板提供的 BSP (板级支持包) 说明。
+
+主要内容如下：
+
+- 开发板资源介绍
+- BSP 快速上手
+- 进阶使用方法
+
+通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
+
+## 开发板介绍
+
+STM32MP157A-EV1 是 ST 推出的一款基于双 Cortex-A7  + Cortex-M4 内核的开发板。Cortex-A7 核工作频率为 650MHZ，Cortex-M4 工作频率为 209MHZ。
+
+开发板外观如下图所示：
+
+​											![board](figures/board.png)
+
+该开发板常用 **板载资源** 如下：
+
+- MCU：STM32MP157AAAx
+- 常用外设
+  - LED：4个 ，LD4(PD8), LD5(PD9), LD2(PA13), LD3(PA14)
+  - 按键，4个，WAKE_UP, RESET (NRST), USER1(PA13), USER2 (PA14)
+- 常用接口：USB 转串口、SD 卡接口、以太网接口、MIPI接口、USB HOST、Audio、HDMI、Arduino
+- 调试接口，标准 JTAG/SWD
+
+开发板更多详细信息请参考 ST 官方文档 [STM32MP157A-DK1 开发板介绍](https://www.st.com/content/st_com/zh/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-discovery-kits/stm32mp157a-dk1.html)。
+
+## 外设支持
+
+本 BSP 目前对外设的支持情况如下：
+
+| **板载外设**   | **支持情况** |    **备注**     |
+| :------------- | :----------: | :-------------: |
+| USB 转串口     |     支持     |                 |
+| PMIC           |   暂不支持   | ST 电源管理 IC  |
+| 摄像头         |   暂不支持   |     OV5640      |
+| MFX            |   暂不支持   | ST 多功能拓展器 |
+| FMC            |   暂不支持   |   NAND FLASH    |
+| QSPI FLASH     |   暂不支持   |   MX25L51245G   |
+| OpenAMP        |   暂不支持   |    双核通讯     |
+| 低功耗电源管理 |   暂不支持   |                 |
+| SD卡           |   暂不支持   |     SDMMC1      |
+| eMMC           |   暂不支持   |     SDMMC2      |
+| 以太网         |   暂不支持   |  千兆以太网卡   |
+| 音频接口       |   暂不支持   |                 |
+| **片上外设**   | **支持情况** |    **备注**     |
+| GPIO           |     支持     |                 |
+| UART           |     支持     | UART4 (ST-Link) |
+| EXTI           |     支持     |                 |
+| SPI            |     支持     |                 |
+| TIM            |     支持     |                 |
+| LPTIM          |     支持     |                 |
+| I2C            |     支持     |      软件       |
+| ADC            |     支持     |                 |
+| DAC            |     支持     |                 |
+| WWDG           |     支持     |                 |
+| MDMA           |   暂不支持   |                 |
+| SPDIFRX        |   暂不支持   |                 |
+| DFSDM          |   暂不支持   |                 |
+| PWM            |   暂不支持   |                 |
+| FDCAN          |   暂不支持   |                 |
+| CRC            |   暂不支持   |                 |
+| RNG            |   暂不支持   |                 |
+| HASH           |   暂不支持   |                 |
+
+
+## 使用说明
+
+使用说明分为如下两个章节：
+
+- 快速上手
+
+    本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
+
+- 进阶使用
+
+    本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
+
+
+### 快速上手
+
+本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
+
+#### 硬件连接
+
+使用数据线连接开发板到 PC，打开电源开关。
+
+#### 编译下载
+
+双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
+
+> 工程默认配置使用 ST-LINK 下载程序，在通过 ST-LINK 连接开发板的基础上，点击下载按钮即可下载程序到开发板
+
+#### 运行结果
+
+下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，橙色 LD4 会周期性闪烁。
+
+连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），可以看到 RT-Thread 的输出信息:
+
+> 注：正点原子开发板 在使用终端工具如：PuTTy、XShell 时，会出现系统不能启动的问题，推荐使用串口调试助手如：sscom
+
+```bash
+ \ | /
+- RT -     Thread Operating System
+ / | \     3.1.1 build Nov 19 2018
+ 2006 - 2018 Copyright by rt-thread team
+msh >
+```
+#### 驱动使用
+##### 1. DAC
+
+1. 在 bsp 下打开 env 工具；
+2. 输入`menuconfig`命令， 进入 Hardware Drivers config 打开 dac，保存并退出；
+3. 输入  `scons --target=iar` 命令重新生成工程；
+
+###### Finsh
+
+在使用设备前，需要先查找设备是否存在，可以使用命令 `dac probe` 后面跟注册的 DAC 设备的名称。如下所示：
+
+```c
+msh />dac probe dac1
+probe dac1 success
+```
+
+使能设备的某个通道可以使用命令 `dac enable` 后面跟通道号。
+
+```c
+msh />dac enable 1
+dac1 channel 1 enables success
+```
+
+设置 DAC 设备某个通道的数据可以使用命令 `dac write` 后面跟通道号。
+
+```c
+msh />dac write 1 1000
+dac1 channel 1 write value is 1000
+```
+
+关闭设备的某个通道可以使用命令 `dac disable` 后面跟通道号。
+
+```c
+msh />dac disable 1
+dac1 channel 1 disable success
+```
+
+### 进阶使用
+
+此 BSP 默认只开启了 GPIO 和 串口4 的功能，如果需使用 SD 卡、Flash 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
+
+1. 在 bsp 下打开 env 工具。
+
+2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
+
+3. 输入`pkgs --update`命令更新软件包。
+
+4. 输入`scons --target=iar` 命令重新生成工程。
+
+本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
+
+## 注意事项
+
+1. 下载程序前，将开发板设置为 "Engineering Mode" 模式。 在 DK1 开发板上，将底下的BOOT开关设成 BOOT0=0，BOOT2=1状态，就进入"Engineering Mode"，如下图所示：
+
+   ​																<img src="figures\boot.png" alt="boot" style="zoom:50%;" />
+
+2. 再次烧写程序时，需要复位开发板。
+
+## 联系人信息
+
+维护人:
+
+- [liukang](https://github.com/thread-liu) 
+

bsp/stm32/stm32mp157a-st-ev1/SConscript

@@ -0,0 +1,15 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

bsp/stm32/stm32mp157a-st-ev1/SConstruct

@@ -0,0 +1,60 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+    env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+    libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+SDK_LIB = libraries_path_prefix
+Export('SDK_LIB')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+stm32_library = 'STM32MPxx_HAL'
+rtconfig.BSP_LIBRARY_TYPE = stm32_library
+
+# include libraries
+objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript')))
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
+
+# make a building
+DoBuilding(TARGET, objs)

bsp/stm32/stm32mp157a-st-ev1/applications/SConscript

@@ -0,0 +1,11 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')