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rt-thread
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Merge pull request #47 from RT-Thread/master 

sycn
This commit is contained in:
Meco Jianting Man 2021-05-01 03:49:09 +08:00 committed by GitHub
parent f90c522308 072899e137
commit 79a452b26d
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
126 changed files with 3865 additions and 3150 deletions
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2
.github/workflows/action.yml vendored
View File

@ -97,7 +97,7 @@ jobs:
- {RTT_BSP: "stm32/stm32f469-st-disco", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f746-st-disco", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f767-atk-apollo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f767-fire-challenger", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f767-fire-challenger-v1", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f767-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32g070-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32g071-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}

232
bsp/stm32/stm32f767-fire-challenger/.config → bsp/juicevm/.config Normal file → Executable file
View File

@ -1,20 +1,19 @@
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
# RT-Thread Project Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
@ -48,11 +47,11 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
CONFIG_RT_USING_MEMHEAP=y
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
# CONFIG_RT_USING_SMALL_MEM is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
@ -63,12 +62,9 @@ CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x40002
CONFIG_ARCH_ARM=y
CONFIG_RT_USING_CPU_FFS=y
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M7=y
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
CONFIG_RT_VER_NUM=0x40000
CONFIG_ARCH_RISCV=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
@ -107,21 +103,46 @@ CONFIG_FINSH_ARG_MAX=10
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
# CONFIG_DFS_USING_WORKDIR is not set
# CONFIG_DFS_FILESYSTEMS_MAX is not set
# CONFIG_DFS_FILESYSTEM_TYPES_MAX is not set
# CONFIG_DFS_FD_MAX is not set
# CONFIG_RT_USING_DFS_MNTTABLE is not set
# CONFIG_RT_USING_DFS_ELMFAT is not set
#
# elm-chan's FatFs, Generic FAT Filesystem Module
#
# CONFIG_RT_DFS_ELM_CODE_PAGE is not set
# CONFIG_RT_DFS_ELM_WORD_ACCESS is not set
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_3=y
# CONFIG_RT_DFS_ELM_USE_LFN=3
# CONFIG_RT_DFS_ELM_MAX_LFN=255
# CONFIG_RT_DFS_ELM_DRIVES=2
# CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
# CONFIG_RT_DFS_ELM_REENTRANT=y
# CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
# CONFIG_RT_USING_DFS_JFFS2 is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
CONFIG_RT_SERIAL_USING_DMA=y
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_PIN is not set
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
@ -129,16 +150,11 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SOFT_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
#
# Using Hardware Crypto drivers
#
# CONFIG_RT_USING_HWCRYPTO is not set
#
# Using WiFi
@ -154,8 +170,13 @@ CONFIG_RT_USING_PIN=y
#
# POSIX layer and C standard library
#
# CONFIG_RT_USING_LIBC is not set
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_RT_USING_MODULE is not set
#
# Network
@ -166,11 +187,6 @@ CONFIG_RT_USING_PIN=y
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
@ -194,10 +210,34 @@ CONFIG_RT_USING_PIN=y
#
# Utilities
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_LWP is not set
CONFIG_RT_USING_ULOG=y
# CONFIG_ULOG_OUTPUT_LVL_A is not set
# CONFIG_ULOG_OUTPUT_LVL_E is not set
# CONFIG_ULOG_OUTPUT_LVL_W is not set
# CONFIG_ULOG_OUTPUT_LVL_I is not set
CONFIG_ULOG_OUTPUT_LVL_D=y
CONFIG_ULOG_OUTPUT_LVL=7
CONFIG_ULOG_USING_ISR_LOG=y
CONFIG_ULOG_ASSERT_ENABLE=y
CONFIG_ULOG_LINE_BUF_SIZE=128
# CONFIG_ULOG_USING_ASYNC_OUTPUT is not set
#
# log format
#
# CONFIG_ULOG_OUTPUT_FLOAT is not set
CONFIG_ULOG_USING_COLOR=y
CONFIG_ULOG_OUTPUT_TIME=y
# CONFIG_ULOG_TIME_USING_TIMESTAMP is not set
CONFIG_ULOG_OUTPUT_LEVEL=y
CONFIG_ULOG_OUTPUT_TAG=y
# CONFIG_ULOG_OUTPUT_THREAD_NAME is not set
CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_ULOG_USING_FILTER is not set
# CONFIG_ULOG_USING_SYSLOG is not set
CONFIG_ULOG_SW_VERSION_NUM=0x00101
#
# RT-Thread online packages
@ -213,7 +253,6 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
@ -231,12 +270,10 @@ CONFIG_RT_USING_PIN=y
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
@ -247,11 +284,6 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
#
# security packages
@ -265,14 +297,52 @@ CONFIG_RT_USING_PIN=y
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
CONFIG_PKG_USING_MICROPYTHON=y
CONFIG_PKG_MICROPYTHON_PATH="/packages/language/micropython"
#
# Hardware Module
#
# CONFIG_MICROPYTHON_USING_MACHINE_I2C is not set
# CONFIG_MICROPYTHON_USING_MACHINE_SPI is not set
CONFIG_MICROPYTHON_USING_MACHINE_UART=y
#
# System Module
#
CONFIG_MICROPYTHON_USING_UOS=y
CONFIG_MICROPYTHON_USING_THREAD=y
# CONFIG_MICROPYTHON_USING_USELECT is not set
# CONFIG_MICROPYTHON_USING_UCTYPES is not set
# CONFIG_MICROPYTHON_USING_UERRNO is not set
#
# Tools Module
#
# CONFIG_MICROPYTHON_USING_CMATH is not set
# CONFIG_MICROPYTHON_USING_UBINASCII is not set
# CONFIG_MICROPYTHON_USING_UHASHLIB is not set
# CONFIG_MICROPYTHON_USING_UHEAPQ is not set
CONFIG_MICROPYTHON_USING_UJSON=y
# CONFIG_MICROPYTHON_USING_URE is not set
# CONFIG_MICROPYTHON_USING_UZLIB is not set
# CONFIG_MICROPYTHON_USING_URANDOM is not set
#
# Network Module
#
# CONFIG_MICROPYTHON_USING_USOCKET is not set
# CONFIG_MICROPYTHON_USING_USSL is not set
CONFIG_PKG_MICROPYTHON_HEAP_SIZE=8192
CONFIG_PKG_USING_MICROPYTHON_LATEST_VERSION=y
# CONFIG_PKG_USING_MICROPYTHON_V10903 is not set
CONFIG_PKG_MICROPYTHON_VER="latest"
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
#
# tools packages
@ -284,13 +354,11 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ADBD is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
@ -302,32 +370,21 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_MPU6XXX is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
#
# miscellaneous packages
@ -342,8 +399,10 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
#
# sample package
#
#
# samples: kernel and components samples
@ -352,48 +411,31 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
#
# example package: hello
#
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
CONFIG_SOC_FAMILY_STM32=y
CONFIG_SOC_SERIES_STM32F7=y
#
# Hardware Drivers Config
# Privated Packages of RealThread
#
CONFIG_SOC_STM32F767IG=y
# CONFIG_PKG_USING_CODEC is not set
# CONFIG_PKG_USING_PLAYER is not set
# CONFIG_PKG_USING_PERSIMMON_SRC is not set
# CONFIG_PKG_USING_JS_PERSIMMON is not set
# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
#
# Onboard Peripheral Drivers
# Network Utilities
#
CONFIG_BSP_USING_USB_TO_USART=y
# CONFIG_BSP_USING_RS232 is not set
# CONFIG_BSP_USING_SDRAM is not set
# CONFIG_BSP_USING_QSPI_FLASH is not set
# CONFIG_BSP_USING_LCD is not set
# CONFIG_BSP_USING_MPU6050 is not set
# CONFIG_BSP_USING_POT is not set
# CONFIG_BSP_USING_SDCARD is not set
# CONFIG_PKG_USING_WICED is not set
# CONFIG_PKG_USING_CLOUDSDK is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_POWER_MANAGER is not set
# CONFIG_PKG_USING_RT_OTA is not set
# CONFIG_PKG_USING_RDBD_SRC is not set
# CONFIG_PKG_USING_RTINSIGHT is not set
# CONFIG_PKG_USING_SMARTCONFIG is not set
# CONFIG_PKG_USING_RTX is not set
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART1=y
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_QSPI is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_I2C1 is not set
# CONFIG_BSP_USING_ONCHIP_RTC is not set
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_SDIO is not set
# CONFIG_BSP_USING_FMC is not set
# CONFIG_BSP_USING_LTDC is not set
#
# Board extended module Drivers
#

32
bsp/juicevm/Kconfig Executable file
View File

@ -0,0 +1,32 @@
mainmenu "RT-Thread Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
config SOC_JUICEVM_RV64
bool
select ARCH_RISCV
config BOARD_RV64_FRDM_JUICEVM
bool
select SOC_JUICEVM_RV64
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
default y
source "driver/Kconfig"

162
bsp/juicevm/README.md Normal file
View File

@ -0,0 +1,162 @@
# JuiceVm 虚拟机 BSP 说明
标签： Risc-V 64bit ima、JuiceVm
---
## 简介
本文档为 JuiceVm 开发团队为 JuiceVm 虚拟机提供的 BSP (板级支持包) 说明。
主要内容如下：
- 开发板资源介绍
- BSP 快速上手
- 进阶使用方法
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
## 虚拟机介绍
JuiceVm 虚拟机是 juice 开发的一款 Risc-V 64bit ima 虚拟机，Risc-V 64bit 虚拟机界面如下图所示：
![开发板外观](static/juicevm_rtt.jpg)
该虚拟机常用**资源**如下：
- MCU：Risc-V 64bit ima，300MB RAM，支持M-MODE,S-MODE,
- 常用外设
- UART0
- 常用接口：UART
- 调试接口: 标准 GDB 【TODO】
更多详细信息请参考【Juice】[JuiceVm 虚拟机](https://whycan.com/t_5844.html)。
## 外设支持
本 BSP 目前对外设的支持情况如下：
|**片上外设** |**支持情况**|**备注** |
| :----------------- | :----------: | :-----------------------------------|
| GPIO | 暂不支持 | 即将支持 |
| MMU(SV39) | 暂不支持 | 即将支持 |
| UART | 支持 | UART0 |
| SDIO | 暂不支持 | 即将支持 |
| RTC | 暂不支持 | 即将支持 |
| PWM | 暂不支持 | 即将支持 |
| USB Device | 暂不支持 | 即将支持 |
| USB Host | 暂不支持 | 即将支持 |
## 使用说明
使用说明分为如下两个章节：
- 快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
- 进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
### 快速上手
本 BSP 为开发者提供 GCC 开发环境。下面以 GCC 开发环境为例，介绍如何将系统运行起来。
#### 编译下载
##### toolchain 下载
- 到 xpack-dev-tools 下载 [点击跳转](https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/tag/v8.3.0-2.1)
```
wget https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.3.0-2.1/xpack-riscv-none-embed-gcc-8.3.0-2.1-linux-x64.tar.gz
```
- 解压到/opt目录下
```
tar vxf xpack-riscv-none-embed-gcc-8.3.0-2.1-linux-x64.tar.gz -C /opt
```
- 到rt-thread/bsp/juicevm目录下执行
```
scons
```
- 下载 JuiceVm
浏览器打开：
https://whycan.com/files/members/1390/juice_vm_release_for_Linux_57ba985a.zip
- 运行固件
./juice_vm_for_Linux.out -a -g ./rtthread.bin
#### 运行结果
在console可以看到 RT-Thread 的输出信息:
```c
global_vm_log_init output_mode_sel: 0 JUICE_VM_LOG_MAX_NUM:600
gg ,ggg, gg ,a8a, ,gggg, ,ggggggg, ,ggg, ,g,ggg, ,ggg,_,ggg,
dP8dP Y8a 88 ,8 8, ,88 Y8b,dP Y8dP Y8a ,8dP Y8dP Y88P Y8b
dP YYb, `88 88 d8 8b d8 `Yd8' a YYb, `88 d8Yb, `88' `88' `88
,8 `8` 88 88 88 88d8' 8b d88 Y8P'` 88 88 ` 88 88 88
I8 Yb 88 88 88 8,8I Y88P`8baaaa 88 88 88 88 88
`8b, `8, 88 88 Y8 8I8' ,d8P I8 8I 88 88 88
` Y88888 88 88 `8, ,8d8 d8 `8, ,8' 88 88 88
Y8 88 888888 8,8 Y8, Y8, Y8, ,8P 88 88 88
,88,Y8b,____,d88`8b, ,d8b,`Yba,,_____`Yba,,_____, Yb,_,dP 88 88 Y8,
,ad88888 Y888888P Y8 Y88P Y8 ` Y8888888 ` Y8888888 Y8P 88 88 `Y8
,dP ' Yb
,8' I8
,8' I8
I8, ,8'
`Y8,___,d8'
Y888P
email: juicemail@163.com
version:57ba985a 57ba985a Fri, 23 Apr 2021 17:22:20 +0800 xiaoxiaohuixxh feat(Rt-thread): uart port pass
firm_addr:./rtthread.bin
fd = 3
file_size = 44872
interrupt_vertor_register_mag_init
rv_csr_register_init
csr_addr_misa 8000000000040101
csr_addr_mvendorid 0000000000000000
csr_addr_marchid 0000000000000000
csr_addr_mimpid 0000000000000000
csr_addr_mhartid 0000000000000000
rv_peripheral_device_init
[rv64_sim][dev][mmu]rv.c(5593):rv_peripheral_device_mmu_init,Sv39 mode support only
[rv64_sim][dev][mtime]rv.c(5252):rv_peripheral_device_mtime_init
[rv64_sim][dev][mtime]rv.c(5271):pdev_mtime_irq_info 0x7f334d2d0910 92c00003 92c00007
[rv64_sim][dev][mtime]rv.c(5277):pdev_mtime_irq_info_smode 0x7f334d2d0900 92c00003 92c00007
[rv64_sim][dev][uart0]rv.c(5061):rv_peripheral_device_uart0_init
[rv64_sim][dev][uart0]rv.c(5077):pdev_uart0_irq_info 0x7f334d2d08f0
rv sim start...loading
cpu run...
heap: [0x8000cb60 - 0x92c00000]
\ | /
- RT - Thread Operating System
/ | \ 4.0.3 build Apr 26 2021
2006 - 2021 Copyright by rt-thread team
Hello RT-Thread!
msh >
```
### 进阶使用
此 BSP 默认只开启了 UART0 的功能和直接运行功能
如果需使用更多功能，可以执行
```
./juice_vm_for_Linux.out
```
查看相关帮助信息开启调试和实时汇编输出功能
## 注意事项
编译参数请使用rv64ima,暂不支持Risc-V的c模块
## 维护人信息
- [Juice](https://github.com/xiaoxiaohuixxh)
- [邮箱](juicemail@163.com)
## 参考资料
* [RT-Thread 文档中心](https://www.rt-thread.org/document/site/)
* [JuiceVm 虚拟机更新发布页](https://whycan.com/t_5844.html)

4
bsp/realview-a8/SConscript → bsp/juicevm/SConscript Normal file → Executable file
View File

@ -1,8 +1,8 @@
# for module compiling
import os
Import('RTT_ROOT')
from building import *
cwd = str(Dir('#'))
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)

36
bsp/juicevm/SConstruct Executable file
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@ -0,0 +1,36 @@
import os
import sys
import rtconfig
from rtconfig import RTT_ROOT
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
env['ASCOM'] = env['ASPPCOM']
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
stack_size = 4096
stack_lds = open('link_stacksize.lds', 'w')
if GetDepend('__STACKSIZE__'): stack_size = GetDepend('__STACKSIZE__')
stack_lds.write('__STACKSIZE__ = %d;' % stack_size)
stack_lds.close()
# make a building
DoBuilding(TARGET, objs)

9
bsp/juicevm/applications/SConscript Executable file
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@ -0,0 +1,9 @@
from building import *
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

20
bsp/juicevm/applications/main.c Executable file
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@ -0,0 +1,20 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021/04/26 Juice The first version
*/
#include <stdio.h>
#include <stdlib.h>
#include <rtthread.h>
int main(int argc, char **argv)
{
rt_kprintf("Hello RT-Thread!\n");
return 0;
}

10
bsp/realview-a8/drivers/SConscript → bsp/juicevm/board/SConscript Normal file → Executable file
View File

@ -1,11 +1,11 @@
import copy
Import('RTT_ROOT')
Import('rtconfig')
# RT-Thread building script for component
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
src = Split('''
board.c
''')
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)

38
bsp/juicevm/board/board.c Executable file
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@ -0,0 +1,38 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021/04/22 Juice the first version
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#include "drv_uart.h"
void rt_hw_board_init(void)
{
/* initialize hardware interrupt */
rt_hw_uart_init();
// rt_hw_systick_init();
#ifdef RT_USING_CONSOLE
/* set console device */
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif /* RT_USING_CONSOLE */
#ifdef RT_USING_HEAP
rt_kprintf("heap: [0x%08x - 0x%08x]\n", (rt_ubase_t) RT_HW_HEAP_BEGIN, (rt_ubase_t) RT_HW_HEAP_END);
/* initialize memory system */
rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}

24
bsp/juicevm/board/board.h Executable file
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@ -0,0 +1,24 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-04-24 Juice the first version
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <stdint.h>
extern unsigned int __bss_start;
extern unsigned int __bss_end;
#define RT_HW_HEAP_BEGIN (void*)&__bss_end
#define RT_HW_HEAP_END (void*)(0x80000000 + 300 * 1024 * 1024)
void rt_hw_board_init(void);
#endif

3
bsp/juicevm/driver/Kconfig Executable file
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@ -0,0 +1,3 @@
config BSP_USING_UART0
bool "Enable UART0"
default y

13
bsp/juicevm/driver/SConscript Executable file
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@ -0,0 +1,13 @@
# RT-Thread building script for component
from building import *
cwd = GetCurrentDir()
src = Split('''
drv_uart.c
''')
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

137
bsp/juicevm/driver/drv_uart.c Executable file
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@ -0,0 +1,137 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021/04/22 Juice Add UART0 support for JuiceVm.
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include "board.h"
#include "drv_uart.h"
#include "rv_mtvec_map.h"
struct rt_serial_device *serial;
char *device_name = "uart0";
static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg);
static int uart_putc(struct rt_serial_device *serial, char c);
static int uart_getc(struct rt_serial_device *serial);
static rt_size_t uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction);
void UART0_DriverIRQHandler(void);
const struct rt_uart_ops _uart_ops =
{
uart_configure,
uart_control,
uart_putc,
uart_getc,
uart_dma_transmit
};
static void uart_isr(struct rt_serial_device *serial);
#if defined(BSP_USING_UART0)
struct rt_serial_device serial0;
void UART0_DriverIRQHandler(void)
{
uart_isr(&serial0);
}
#endif
/*
* UART Initiation
*/
int rt_hw_uart_init(void)
{
int i;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
serial = &serial0;
serial->ops = &_uart_ops;
serial->config = config;
/* register UART device */
rt_hw_serial_register(serial,
device_name,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
(void *)0);
return 0;
}
/*
* UART interface
*/
static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
return RT_EOK;
}
static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
RT_ASSERT(serial != RT_NULL);
return RT_EOK;
}
static int uart_putc(struct rt_serial_device *serial, char c)
{
RT_ASSERT(serial != RT_NULL);
*((char *)(pdev_uart0_write_addr)) = c;
return (1);
}
static int uart_getc(struct rt_serial_device *serial)
{
int ch;
RT_ASSERT(serial != RT_NULL);
ch = -1;
if (*(char *)(pdev_uart0_state_addr) == pdev_uart0_readbusy_state)
{
ch = *(char *)(pdev_uart0_read_addr);
*(char *)(pdev_uart0_state_addr) = pdev_uart0_free_state;
}
return ch;
}
static rt_size_t uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
{
return (0);
}
/* UART ISR */
/**
* Uart common interrupt process. This need add to uart ISR.
*
* @param serial serial device
*/
static void uart_isr(struct rt_serial_device *serial)
{
RT_ASSERT(serial != RT_NULL);
if (*(char *)(pdev_uart0_state_addr) == pdev_uart0_readbusy_state)
{
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
}
}

11
bsp/realview-a8/drivers/serial.h → bsp/juicevm/driver/drv_uart.h Normal file → Executable file
View File

@ -5,16 +5,11 @@
*
* Change Logs:
* Date Author Notes
* 2013-03-30 Bernard the first verion
*/
#ifndef __UART_H__
#define __UART_H__
#include <board.h>
#ifndef __DRV_UART_H__
#define __DRV_UART_H__
int rt_hw_uart_init(void);
#endif
#endif /* __DRV_UART_H__ */

22
bsp/juicevm/juicevm_sdk/SConscript Executable file
View File

@ -0,0 +1,22 @@
# RT-Thread building script for component
from building import *
cwd = GetCurrentDir()
src = Split('''
system.c
''')
CPPPATH = [cwd]
group = DefineGroup('JuiceVm_sdk', src, depend = [''], CPPPATH = CPPPATH)
objs = [group]
list = os.listdir(cwd)
for item in list:
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
objs = objs + SConscript(os.path.join(item, 'SConscript'))
Return('objs')

106
bsp/juicevm/juicevm_sdk/rv_config.h Executable file
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@ -0,0 +1,106 @@
/*
* Copyright (c) 2006-2021, JuiceVm Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021/04/22 Juice the first version
*/
#ifndef __RV_CONFIG_H__
#define __RV_CONFIG_H__
#define RV64I_SUPPORT_ENBALE
#define RV64_MMU_ENBALE 1
#define RV_ENDLESS_LOOP_CHECK_ENBALE 1
#if defined(RV_ENDLESS_LOOP_CHECK_ENBALE) && RV_ENDLESS_LOOP_CHECK_ENBALE == 1
#define RV_ENDLESS_LOOP_CHECK_BUF_SIZE (30)
#define RV_ENDLESS_LOOP_CHECK_EXIT_CNT (3)
#define RV_ENDLESS_LOOP_CHECK_MD5_HASH 1
#endif
// #define RISCV_ANGEL_ONLY
#define Machine_Mode_SUPPORT
#define Supervisor_Mode_SUPPORT
// #define User_Mode_SUPPORT
// #define Hypervisor_Mode_SUPPORT
#define ATOMIC_Module_SUPPORT
#define RV_CPU_CSR_DEF_Vendor_ID 0
#define RV_CPU_CSR_DEF_March_ID 0
#define RV_CPU_CSR_DEF_Mimp_ID 0
#define RV_CPU_CSR_DEF_Mhart_ID 0
#define JUICE_VM_LOG_MAX_NUM (600)
#define JUICE_VM_INC_CHANGELOG 0
#define RAM_SIZE_KB (1024)
#define RAM_SIZE_MB (1024*RAM_SIZE_KB)
#define RV_CPU_SIM_RAM_START_ADDR (0x80000000)
#define RV_CPU_SIM_RAM_SIZE (300 * RAM_SIZE_MB)
#define RV_CPU_SIM_CAUSETABLE_MAX_NUM 100//MXLEN-1 bit
#define RV_CPU_SIM_PERDEV_NUM 50
#define rv_peripheral_device_add_check_dev 1
// | MXLEN-1 MXLEN-2 | MXLEN-3 26| 25 0 |
// | MXL[1:0](WARL) | WLRL | Extensions[25:0] (WARL) |
// | 2 | MXLEN-28 | 26 |
// Figure 3.1: Machine ISA register (misa).
// Bit | Character | Description
// 0 | A | Atomic extension
// 1 | B | Tentatively reserved for Bit-Manipulation extension
// 2 | C | Compressed extension
// 3 | D | Double-precision floating-point extension
// 4 | E | RV32E base ISA
// 5 | F | Single-precision floating-point extension
// 6 | G | Reserved
// 7 | H | Hypervisor extension
// 8 | I | RV32I/64I/128I base ISA
// 9 | J | Tentatively reserved for Dynamically Translated Languages extension
// 10 | K | Reserved
// 11 | L | Tentatively reserved for Decimal Floating-Point extension
// 12 | M | Integer Multiply/Divide extension
// 13 | N | User-level interrupts supported
// 14 | O | Reserved
// 15 | P | Tentatively reserved for Packed-SIMD extension
// 16 | Q | Quad-precision floating-point extension
// 17 | R | Reserved
// 18 | S | Supervisor mode implemented
// 19 | T | Tentatively reserved for Transactional Memory extension
// 20 | U | User mode implemented
// 21 | V | Tentatively reserved for Vector extension
// 22 | W | Reserved
// 23 | X | Non-standard extensions present
// 24 | Y | Reserved
// 25 | Z | Reserved
#define RV_MISA_ATOMIC_EXT (1<<0)
#define RV_MISA_INTEGER_EXT (1<<8)
#define RV_MISA_UMODE_INT_EXT (1<<13)
#define RV_MISA_SMODE_IMP_EXT (1<<18)
#define RV_MISA_UMODE_IMP_EXT (1<<20)
// | MXL | XLEN |
// | 1 | 32 |
// | 2 | 64 |
// | 3 | 128 |
#define RV_MISA_XLEN_32 (1<<(32-2))
#define RV_MISA_XLEN_64 (uint64_t)((uint64_t)(2)<<(64-2))
// #define RV_MISA_XLEN_128 ((uint128_t)(3)<<(128-2))
#define RV_MISA_CSR_REGISTER ((uint64_t)(RV_MISA_XLEN_64 | RV_MISA_ATOMIC_EXT | RV_MISA_INTEGER_EXT /*| RV_MISA_UMODE_INT_EXT*/ | RV_MISA_SMODE_IMP_EXT /*| RV_MISA_UMODE_IMP_EXT*/))
#endif // __RV_CONFIG_H__

131
bsp/juicevm/juicevm_sdk/rv_mtvec_map.h Executable file
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@ -0,0 +1,131 @@
/*
* Copyright (c) 2006-2021, JuiceVm Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021/04/22 Juice the first version
*/
#ifndef __RV_MTVEC_MAP_H__
#define __RV_MTVEC_MAP_H__
#include "rv_config.h"
#define rv_sim_pdev_base_addr (RV_CPU_SIM_RAM_START_ADDR+RV_CPU_SIM_RAM_SIZE)
#define rv_sim_pdev_uart0_base_addr (rv_sim_pdev_base_addr)
#define pdev_uart0_write_addr (rv_sim_pdev_uart0_base_addr)
#define pdev_uart0_read_addr (rv_sim_pdev_uart0_base_addr+1)
#define pdev_uart0_free_state 0x00
#define pdev_uart0_readbusy_state 0x01
#define pdev_uart0_state_addr (rv_sim_pdev_uart0_base_addr+2)
#define rv_sim_pdev_mtime_base_addr (rv_sim_pdev_base_addr+3)
#define pdev_mtime_mtime_addr (rv_sim_pdev_mtime_base_addr)
#define pdev_mtime_mtimecmp_addr (rv_sim_pdev_mtime_base_addr+4)
#define uart0_irq_flag 0
#define uart0_irq_ecode 24
#define RV_exception_Instruction_address_misaligned_IFLAG 0
#define RV_exception_Instruction_address_misaligned_ECODE 0
#define RV_exception_Instruction_access_fault_IFLAG 0
#define RV_exception_Instruction_access_fault_ECODE 1
#define RV_exception_Illegal_Instruction_IFLAG 0
#define RV_exception_Illegal_Instruction_ECODE 2
#define RV_exception_Breakpoint_IFLAG 0
#define RV_exception_Breakpoint_ECODE 3
#define RV_exception_LoadAddress_Misaligned_IFLAG 0
#define RV_exception_LoadAddress_Misaligned_ECODE 4
#define RV_exception_Load_access_fault_IFLAG 0
#define RV_exception_Load_access_fault_ECODE 5
#define RV_exception_Store_or_AMO_Address_Misaligned_IFLAG 0
#define RV_exception_Store_or_AMO_Address_Misaligned_ECODE 6
#define RV_exception_Store_or_AMO_access_fault_IFLAG 0
#define RV_exception_Store_or_AMO_access_fault_ECODE 7
#define RV_exception_Environment_call_from_Umode_IFLAG 0
#define RV_exception_Environment_call_from_Umode_ECODE 8
#define RV_exception_Environment_call_from_Smode_IFLAG 0
#define RV_exception_Environment_call_from_Smode_ECODE 9
#define RV_exception_Environment_Call_FromMachine_IFLAG 0
#define RV_exception_Environment_Call_FromMachine_ECODE 11
#define RV_exception_FloatingPoint_Disabled_IFLAG
#define RV_exception_FloatingPoint_Disabled_ECODE
#define RV_exception_Instruction_page_fault_IFLAG 0
#define RV_exception_Instruction_page_fault_ECODE 12
#define RV_exception_Load_page_fault_IFLAG 0
#define RV_exception_Load_page_fault_ECODE 13
#define RV_exception_Store_or_AMO_page_fault_IFLAG 0
#define RV_exception_Store_or_AMO_page_fault_ECODE 15
// Interrupt Exception Code Description
// 1 0 Reserved
// 1 1 Supervisor software interrupt not support
// 1 2 Reserved
// 1 3 Machine software interrupt not support
// 1 4 Reserved
// 1 5 Supervisor timer interrupt not support
// 1 6 Reserved
// 1 7 Machine timer interrupt support
// 1 8 Reserved
// 1 9 Supervisor external interrupt not support
// 1 10 Reserved
// 1 11 Machine external interrupt not support
// 1 12 Reserved
// 1 13 Reserved
// 1 14 Reserved
// 1 15 Reserved
// // 1 ≥16 Designated for platform use
// 0 0 Instruction address misaligned not support
// 0 1 Instruction access fault not support
// 0 2 Illegal instruction support
// 0 3 Breakpoint support
// 0 4 Load address misaligned support
// 0 5 Load access fault not support
// 0 6 Store/AMO address misaligned support
// 0 7 Store/AMO access fault not support
// 0 8 Environment call from U-mode not support
// 0 9 Environment call from S-mode not support
// 0 10 Reserved
// 0 11 Environment call from M-mode support
// 0 12 Instruction page fault not support
// 0 13 Load page fault not support
// 0 14 Reserved
// 0 15 Store/AMO page fault not support
// 0 16-23 Reserved
// // 0 24–31 Designated for custom use
// 0 32-47 Reserved
// // 0 48–63 Designated for custom use
// 0 ≥64 Reserved
// #define mtime_irq_flag 1
// #define mtime_irq_ecode 7
#define RV_Supervisor_software_interrupt_IFLAG 1
#define RV_Supervisor_software_interrupt_ECODE 1
#define RV_Machine_software_interrupt_IFLAG 1
#define RV_Machine_software_interrupt_ECODE 3
#define RV_Supervisor_timer_interrupt_IFLAG 1
#define RV_Supervisor_timer_interrupt_ECODE 5
#define RV_Machine_timer_interrupt_IFLAG 1
#define RV_Machine_timer_interrupt_ECODE 7
#define RV_Supervisor_external_interrupt_IFLAG 1
#define RV_Supervisor_external_interrupt_ECODE 9
#define RV_Machine_external_interrupt_IFLAG 1
#define RV_Machine_external_interrupt_ECODE 10
#endif // __RV_MTVEC_MAP_H__

47
bsp/juicevm/juicevm_sdk/system.c Executable file
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@ -0,0 +1,47 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021/04/22 Juice Add isrtable for JuiceVm.
*/
typedef void (*irq_handler_t)(void);
// #define DEFINE_IRQ_HANDLER(irq_handler, driver_irq_handler) \
// void __attribute__((weak)) irq_handler(void) { driver_irq_handler();}
// #define DEFINE_DEFAULT_IRQ_HANDLER(irq_handler) void irq_handler() __attribute__((weak, alias("DefaultIRQHandler")))
// DEFINE_IRQ_HANDLER(UART0_IRQHandler, UART0_DriverIRQHandler);
extern void UART0_DriverIRQHandler(void);
const irq_handler_t isrTable[] =
{
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
UART0_DriverIRQHandler, // uart0_irq_ecode = 24
};

161
bsp/juicevm/link.lds Executable file
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@ -0,0 +1,161 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
INCLUDE "link_stacksize.lds"
/*
* The OUTPUT_ARCH command specifies the machine architecture where the
* argument is one of the names used in the Kendryte library.
*/
OUTPUT_ARCH( "riscv" )
MEMORY
{
/* 300M SRAM */
SRAM : ORIGIN = 0x80000000, LENGTH = 0x12c00000
}
ENTRY(_start)
SECTIONS
{
. = 0x80000000 ;
/* __STACKSIZE__ = 4096; */
.start :
{
*(.start);
} > SRAM
. = ALIGN(8);
.text :
{
*(.text) /* remaining code */
*(.text.*) /* remaining code */
*(.rodata) /* read-only data (constants) */
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.gnu.linkonce.t*)
/* section information for finsh shell */
. = ALIGN(8);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(8);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(8);
/* section information for initial. */
. = ALIGN(8);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(8);
__rt_utest_tc_tab_start = .;
KEEP(*(UtestTcTab))
__rt_utest_tc_tab_end = .;
. = ALIGN(8);
_etext = .;
} > SRAM
.eh_frame_hdr :
{
*(.eh_frame_hdr)
*(.eh_frame_entry)
} > SRAM
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM
. = ALIGN(8);
.data :
{
*(.data)
*(.data.*)
*(.data1)
*(.data1.*)
. = ALIGN(8);
PROVIDE( __global_pointer$ = . + 0x800 );
*(.sdata)
*(.sdata.*)
} > SRAM
/* stack for dual core */
.stack :
{
. = ALIGN(64);
__stack_start__ = .;
. += __STACKSIZE__;
__stack = .;
} > SRAM
.sbss :
{
__bss_start = .;
*(.sbss)
*(.sbss.*)
*(.dynsbss)
*(.scommon)
} > SRAM
.bss :
{
*(.bss)
*(.bss.*)
*(.dynbss)
*(COMMON)
__bss_end = .;
} > SRAM
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to the beginning
* of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}

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bsp/juicevm/link_stacksize.lds Executable file
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__STACKSIZE__ = 4096;

218
bsp/juicevm/rtconfig.h Executable file
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#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Project Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 100
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 1024
#define RT_DEBUG
#define RT_DEBUG_COLOR
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40000
#define ARCH_CPU_64BIT
#define ARCH_RISCV
#define ARCH_RISCV64
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80
#define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT
#define FINSH_USING_MSH_ONLY
#define FINSH_ARG_MAX 10
/* Device virtual file system */
// #define RT_USING_DFS
// #define DFS_USING_WORKDIR
// #define DFS_FILESYSTEMS_MAX 4
// #define DFS_FILESYSTEM_TYPES_MAX 4
// #define DFS_FD_MAX 16
// #define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
// #define RT_DFS_ELM_CODE_PAGE 437
// #define RT_DFS_ELM_WORD_ACCESS
// #define RT_DFS_ELM_USE_LFN_3
// #define RT_DFS_ELM_USE_LFN 3
// #define RT_DFS_ELM_MAX_LFN 255
// #define RT_DFS_ELM_DRIVES 2
// #define RT_DFS_ELM_MAX_SECTOR_SIZE 512
// #define RT_DFS_ELM_REENTRANT
// #define RT_USING_DFS_DEVFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
/* Using WiFi */
/* Using USB */
/* POSIX layer and C standard library */
#define RT_USING_LIBC
// #define RT_USING_POSIX
/* Network */
/* Socket abstraction layer */
/* light weight TCP/IP stack */
/* Modbus master and slave stack */
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
#define RT_USING_ULOG
#define ULOG_OUTPUT_LVL_D
#define ULOG_OUTPUT_LVL 7
#define ULOG_USING_ISR_LOG
#define ULOG_ASSERT_ENABLE
#define ULOG_LINE_BUF_SIZE 128
/* log format */
#define ULOG_USING_COLOR
#define ULOG_OUTPUT_TIME
#define ULOG_OUTPUT_LEVEL
#define ULOG_OUTPUT_TAG
#define ULOG_BACKEND_USING_CONSOLE
#define ULOG_SW_VERSION_NUM 0x00101
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
#define PKG_USING_MICROPYTHON
/* Hardware Module */
#define MICROPYTHON_USING_MACHINE_UART
/* System Module */
#define MICROPYTHON_USING_UOS
#define MICROPYTHON_USING_THREAD
/* Tools Module */
#define MICROPYTHON_USING_UJSON
/* Network Module */
#define PKG_MICROPYTHON_HEAP_SIZE 8192
#define PKG_USING_MICROPYTHON_LATEST_VERSION
/* multimedia packages */
/* tools packages */
/* system packages */
/* peripheral libraries and drivers */
/* miscellaneous packages */
/* sample package */
/* samples: kernel and components samples */
/* example package: hello */
/* Privated Packages of RealThread */
/* Network Utilities */
#define BSP_USING_UART0
#define __STACKSIZE__ 4096
#endif

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bsp/juicevm/rtconfig.py Executable file
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import os
# toolchains options
ARCH ='risc-v'
CPU ='juicevm'
CROSS_TOOL ='gcc'
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = r'../..'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'/opt/xpack-riscv-none-embed-gcc-8.3.0-2.1/bin'
else:
print('Please make sure your toolchains is GNU GCC!')
exit(0)
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'riscv-none-embed-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -march=rv64ima -mabi=lp64 -mcmodel=medany'
CFLAGS = DEVICE + ' -fno-builtin -fno-exceptions -ffunction-sections -static'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T link.lds'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O2 -Os -g'
AFLAGS += ' -g'
else:
CFLAGS += ' -O2 -Os'
CXXFLAGS = CFLAGS
DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
POST_ACTION += DUMP_ACTION
# POST_ACTION = SIZE + ' $TARGET \n'

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26
bsp/realview-a8/.gitignore vendored
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# Object files
*.o
*.bin
*.pyc
*.map
*.elf
# Libraries
*.lib
*.a
# Shared objects (inc. Windows DLLs)
*.dll
*.so
*.so.*
*.dylib
# Executables
*.exe
*.out
*.app
.scons*
# directory
build/*

11
bsp/realview-a8/README.md
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VMM BSP on realview-pb-a8
This is a demo program that run RT-Thread VMM(Virtual Machine Module) on
the single core RealView-PB-A8.
To compile it, you need buildroot and a linux 3.8.x source tree. You should
build the patched Linux kernel and builroot before building the VMM. This
directory has a "mk.sh" helper script to build both the RT-Thread, Linux kernel
module and the ramdisk.
Linux console is serial0 and RT-Thread console is serial1.

44
bsp/realview-a8/SConstruct
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import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread-realview.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
env['ASCOM'] = env['ASPPCOM']
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT)
if GetDepend('RT_USING_VMM'):
if os.system('{cppcmd} -P -C -E -I. -D__ASSEMBLY__ {ldfile}.S -o {ldfile}'.format(
cppcmd = os.path.join(rtconfig.EXEC_PATH, 'arm-none-eabi-gcc'),
ldfile = rtconfig.LINK_SCRIPT)) != 0:
print('failed to generate linker script %s' % rtconfig.LINK_SCRIPT)
sys.exit(255)
# if the linker script changed, relink the target
Depends(TARGET, rtconfig.LINK_SCRIPT)
else:
# we should use none-vmm link script
link_flags = str(env['LINKFLAGS'])
env['LINKFLAGS'] = link_flags.replace('_vmm.lds', '.lds')
# make a building
DoBuilding(TARGET, objs)

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bsp/realview-a8/applications/SConscript
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Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

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bsp/realview-a8/applications/application.c
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-11-20 Bernard the first version
*/
#include <rtthread.h>
void init_thread(void* parameter)
{
rt_components_init();
}
int rt_application_init()
{
rt_thread_t tid;
tid = rt_thread_create("init", init_thread, RT_NULL,
1024, RT_THREAD_PRIORITY_MAX/3, 10);
if (tid != RT_NULL) rt_thread_startup(tid);
return 0;
}

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bsp/realview-a8/applications/startup.c
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-12-05 Bernard the first version
*/
#include <rthw.h>
#include <rtthread.h>
#include <board.h>
extern int rt_application_init(void);
extern void rt_hw_board_init(void);
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* initialzie hardware interrupt */
rt_hw_interrupt_init();
/* initialize board */
rt_hw_board_init();
/* show RT-Thread version */
rt_show_version();
/* initialize memory system */
#ifdef RT_USING_HEAP
rt_system_heap_init(HEAP_BEGIN, HEAP_END);
#endif
/* initialize scheduler system */
rt_system_scheduler_init();
/* initialize timer and soft timer thread */
rt_system_timer_init();
rt_system_timer_thread_init();
/* initialize application */
rt_application_init();
/* initialize idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* invoke rtthread_startup */
rtthread_startup();
return 0;
}

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bsp/realview-a8/boot.sh
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#!/bin/sh -e
scons -j12
qemu-system-arm -M realview-pb-a8 -kernel rtthread-realview.elf -serial vc -serial stdio

99
bsp/realview-a8/drivers/board.c
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-11-20 Bernard the first version
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#define TIMER_LOAD(hw_base) __REG32(hw_base + 0x00)
#define TIMER_VALUE(hw_base) __REG32(hw_base + 0x04)
#define TIMER_CTRL(hw_base) __REG32(hw_base + 0x08)
#define TIMER_CTRL_ONESHOT (1 << 0)
#define TIMER_CTRL_32BIT (1 << 1)
#define TIMER_CTRL_DIV1 (0 << 2)
#define TIMER_CTRL_DIV16 (1 << 2)
#define TIMER_CTRL_DIV256 (2 << 2)
#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable (versatile only) */
#define TIMER_CTRL_PERIODIC (1 << 6)
#define TIMER_CTRL_ENABLE (1 << 7)
#define TIMER_INTCLR(hw_base) __REG32(hw_base + 0x0c)
#define TIMER_RIS(hw_base) __REG32(hw_base + 0x10)
#define TIMER_MIS(hw_base) __REG32(hw_base + 0x14)
#define TIMER_BGLOAD(hw_base) __REG32(hw_base + 0x18)
#define SYS_CTRL __REG32(REALVIEW_SCTL_BASE)
#ifdef RT_USING_VMM
#include <vmm.h>
static rt_uint32_t timer_hw_base = 0;
#define TIMER_HW_BASE (timer_hw_base)
#else
#define TIMER_HW_BASE REALVIEW_TIMER2_3_BASE
#endif
void rt_hw_timer_ack(void)
{
/* clear interrupt */
TIMER_INTCLR(TIMER_HW_BASE) = 0x01;
}
static void rt_hw_timer_isr(int vector, void *param)
{
rt_tick_increase();
rt_hw_timer_ack();
}
int rt_hw_timer_init(void)
{
rt_uint32_t val;
#ifdef RT_USING_VMM
{
rt_uint32_t sys_ctrl;
sys_ctrl = vmm_find_iomap("SYS_CTRL");
__REG32(sys_ctrl) |= REALVIEW_REFCLK;
}
timer_hw_base = vmm_find_iomap("TIMER");
#else
SYS_CTRL |= REALVIEW_REFCLK;
#endif
/* Setup Timer0 for generating irq */
val = TIMER_CTRL(TIMER_HW_BASE);
val &= ~TIMER_CTRL_ENABLE;
val |= (TIMER_CTRL_32BIT | TIMER_CTRL_PERIODIC | TIMER_CTRL_IE);
TIMER_CTRL(TIMER_HW_BASE) = val;
TIMER_LOAD(TIMER_HW_BASE) = 1000;
/* enable timer */
TIMER_CTRL(TIMER_HW_BASE) |= TIMER_CTRL_ENABLE;
rt_hw_interrupt_install(IRQ_PBA8_TIMER2_3, rt_hw_timer_isr, RT_NULL, "tick");
rt_hw_interrupt_umask(IRQ_PBA8_TIMER2_3);
return 0;
}
INIT_BOARD_EXPORT(rt_hw_timer_init);
/**
* This function will initialize beaglebone board
*/
void rt_hw_board_init(void)
{
rt_components_board_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
}
/*@}*/

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bsp/realview-a8/drivers/board.h
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-07-06 Bernard the first version
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <realview.h>
#if defined(__CC_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void*)&Image$$RW_IRAM1$$ZI$$Limit)
#elif defined(__GNUC__)
extern int __bss_end;
#define HEAP_BEGIN ((void*)&__bss_end)
#endif
#define HEAP_END (void*)(0x70000000 + 8 * 1024 * 1024)
void rt_hw_board_init(void);
#endif

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bsp/realview-a8/drivers/realview.h
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#ifndef __AM33XX_H__
#define __AM33XX_H__
#define __REG32(x) (*((volatile unsigned int *)(x)))
#define __REG16(x) (*((volatile unsigned short *)(x)))
/*
* Peripheral addresses
*/
#define REALVIEW_UART0_BASE 0x10009000 /* UART 0 */
#define REALVIEW_UART1_BASE 0x1000A000 /* UART 1 */
#define REALVIEW_UART2_BASE 0x1000B000 /* UART 2 */
#define REALVIEW_UART3_BASE 0x1000C000 /* UART 3 */
#define REALVIEW_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
#define REALVIEW_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
#define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */
#define REALVIEW_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
#define REALVIEW_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
#define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */
#define REALVIEW_RTC_BASE 0x10017000 /* Real Time Clock */
#define REALVIEW_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
#define REALVIEW_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
#define REALVIEW_SCTL_BASE 0x1001A000 /* System Controller */
#define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */
#define REALVIEW_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
#define REALVIEW_DMC_BASE 0x100E0000 /* DMC configuration */
#define REALVIEW_SMC_BASE 0x100E1000 /* SMC configuration */
#define REALVIEW_CAN_BASE 0x100E2000 /* CAN bus */
#define REALVIEW_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
#define REALVIEW_FLASH0_BASE 0x40000000
#define REALVIEW_FLASH0_SIZE SZ_64M
#define REALVIEW_FLASH1_BASE 0x44000000
#define REALVIEW_FLASH1_SIZE SZ_64M
#define REALVIEW_ETH_BASE 0x4E000000 /* Ethernet */
#define REALVIEW_USB_BASE 0x4F000000 /* USB */
#define REALVIEW_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
#define REALVIEW_LT_BASE 0xC0000000 /* Logic Tile expansion */
#define REALVIEW_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
#define REALVIEW_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
#define REALVIEW_SYS_PLD_CTRL1 0x74
/*
* PCI regions
*/
#define REALVIEW_PCI_BASE 0x90040000 /* PCI-X Unit base */
#define REALVIEW_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
#define REALVIEW_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
#define REALVIEW_PCI_BASE_SIZE 0x10000 /* 16 Kb */
#define REALVIEW_PCI_IO_SIZE 0x1000 /* 4 Kb */
#define REALVIEW_PCI_MEM_SIZE 0x20000000 /* 512 MB */
/*
* Memory definitions
*/
#define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)... */
#define REALVIEW_BOOT_ROM_HI 0x30000000
#define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */
#define REALVIEW_BOOT_ROM_SIZE SZ_64M
#define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */
#define REALVIEW_SSRAM_SIZE SZ_2M
/*
* SDRAM
*/
#define REALVIEW_SDRAM_BASE 0x00000000
/*
* Logic expansion modules
*
*/
#define IRQ_PBA8_GIC_START 32
/*
* PB-A8 on-board gic irq sources
*/
#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
/* 9 reserved */
#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
#define IRQ_PBA8_PMU (IRQ_PBA8_GIC_START + 47) /* Cortex-A8 PMU */
/* ... */
#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
#define IRQ_PBA8_SMC -1
#define IRQ_PBA8_SCTL -1
#define NR_GIC_PBA8 1
/*
* Only define NR_IRQS if less than NR_IRQS_PBA8
*/
#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
/* ------------------------------------------------------------------------
* RealView Registers
* ------------------------------------------------------------------------
*
*/
#define REALVIEW_SYS_ID_OFFSET 0x00
#define REALVIEW_SYS_SW_OFFSET 0x04
#define REALVIEW_SYS_LED_OFFSET 0x08
#define REALVIEW_SYS_OSC0_OFFSET 0x0C
#define REALVIEW_SYS_OSC1_OFFSET 0x10
#define REALVIEW_SYS_OSC2_OFFSET 0x14
#define REALVIEW_SYS_OSC3_OFFSET 0x18
#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */
#define REALVIEW_SYS_LOCK_OFFSET 0x20
#define REALVIEW_SYS_100HZ_OFFSET 0x24
#define REALVIEW_SYS_CFGDATA1_OFFSET 0x28
#define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C
#define REALVIEW_SYS_FLAGS_OFFSET 0x30
#define REALVIEW_SYS_FLAGSSET_OFFSET 0x30
#define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34
#define REALVIEW_SYS_NVFLAGS_OFFSET 0x38
#define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38
#define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C
#define REALVIEW_SYS_RESETCTL_OFFSET 0x40
#define REALVIEW_SYS_PCICTL_OFFSET 0x44
#define REALVIEW_SYS_MCI_OFFSET 0x48
#define REALVIEW_SYS_FLASH_OFFSET 0x4C
#define REALVIEW_SYS_CLCD_OFFSET 0x50
#define REALVIEW_SYS_CLCDSER_OFFSET 0x54
#define REALVIEW_SYS_BOOTCS_OFFSET 0x58
#define REALVIEW_SYS_24MHz_OFFSET 0x5C
#define REALVIEW_SYS_MISC_OFFSET 0x60
#define REALVIEW_SYS_IOSEL_OFFSET 0x70
#define REALVIEW_SYS_PROCID_OFFSET 0x84
#define REALVIEW_SYS_TEST_OSC0_OFFSET 0xC0
#define REALVIEW_SYS_TEST_OSC1_OFFSET 0xC4
#define REALVIEW_SYS_TEST_OSC2_OFFSET 0xC8
#define REALVIEW_SYS_TEST_OSC3_OFFSET 0xCC
#define REALVIEW_SYS_TEST_OSC4_OFFSET 0xD0
#define REALVIEW_SYS_BASE 0x10000000
#define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET)
#define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET)
#define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET)
#define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET)
#define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET)
#define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET)
#define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET)
#define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET)
#define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET)
#define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET)
#define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET)
#define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET)
#define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET)
#define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET)
#define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET)
#define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET)
#define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET)
#define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET)
#define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET)
#define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET)
#define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET)
#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)
#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)
#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET)
#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)
#define REALVIEW_SYS_PROCID (REALVIEW_SYS_BASE + REALVIEW_SYS_PROCID_OFFSET)
#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
#define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET)
#define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET)
#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
#define REALVIEW_SYS_CTRL_LED (1 << 0)
/* ------------------------------------------------------------------------
* RealView control registers
* ------------------------------------------------------------------------
*/
/*
* REALVIEW_IDFIELD
*
* 31:24 = manufacturer (0x41 = ARM)
* 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
* 15:12 = FPGA (0x3 = XVC600 or XVC600E)
* 11:4 = build value
* 3:0 = revision number (0x1 = rev B (AHB))
*/
/*
* REALVIEW_SYS_LOCK
* control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
* SYS_CLD, SYS_BOOTCS
*/
#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
#define REALVIEW_SYS_LOCKVAL 0xA05F
#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
/*
* REALVIEW_SYS_FLASH
*/
#define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
/*
* REALVIEW_INTREG
* - used to acknowledge and control MMCI and UART interrupts
*/
#define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
#define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
#define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */
/* write 1 to acknowledge and clear */
#define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
/*
* LED settings, bits [7:0]
*/
#define REALVIEW_SYS_LED0 (1 << 0)
#define REALVIEW_SYS_LED1 (1 << 1)
#define REALVIEW_SYS_LED2 (1 << 2)
#define REALVIEW_SYS_LED3 (1 << 3)
#define REALVIEW_SYS_LED4 (1 << 4)
#define REALVIEW_SYS_LED5 (1 << 5)
#define REALVIEW_SYS_LED6 (1 << 6)
#define REALVIEW_SYS_LED7 (1 << 7)
#define ALL_LEDS 0xFF
#define LED_BANK REALVIEW_SYS_LED
/*
* Control registers
*/
#define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */
#define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */
#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
/*
* Clean base - dummy
*
*/
#define CLEAN_BASE REALVIEW_BOOT_ROM_HI
/*
* System controller bit assignment
*/
#define REALVIEW_REFCLK 0
#define REALVIEW_TIMCLK 1
#define REALVIEW_TIMER1_EnSel 15
#define REALVIEW_TIMER2_EnSel 17
#define REALVIEW_TIMER3_EnSel 19
#define REALVIEW_TIMER4_EnSel 21
/*
*struct rt_hw_register
*{
* unsigned long r0;
* unsigned long r1;
* unsigned long r2;
* unsigned long r3;
* unsigned long r4;
* unsigned long r5;
* unsigned long r6;
* unsigned long r7;
* unsigned long r8;
* unsigned long r9;
* unsigned long r10;
* unsigned long fp;
* unsigned long ip;
* unsigned long sp;
* unsigned long lr;
* unsigned long pc;
* unsigned long cpsr;
* unsigned long ORIG_r0;
*};
*/
#include <armv7.h>
/* Interrupt Control Interface */
#define ARM_GIC_CPU_BASE 0x1E000000
/* number of interrupts on board */
#define ARM_GIC_NR_IRQS 96
/* only one GIC available */
#define ARM_GIC_MAX_NR 1
#endif

185
bsp/realview-a8/drivers/serial.c
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@ -1,185 +0,0 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-03-30 Bernard the first verion
*/
#include <rthw.h>
#include <rtdevice.h>
#include "serial.h"
#ifdef RT_USING_VMM
#include <vmm.h>
#endif
struct hw_uart_device
{
rt_uint32_t hw_base;
rt_uint32_t irqno;
};
#define UART_DR(base) __REG32(base + 0x00)
#define UART_FR(base) __REG32(base + 0x18)
#define UART_CR(base) __REG32(base + 0x30)
#define UART_IMSC(base) __REG32(base + 0x38)
#define UART_ICR(base) __REG32(base + 0x44)
#define UARTFR_RXFE 0x10
#define UARTFR_TXFF 0x20
#define UARTIMSC_RXIM 0x10
#define UARTIMSC_TXIM 0x20
#define UARTICR_RXIC 0x10
#define UARTICR_TXIC 0x20
static void rt_hw_uart_isr(int irqno, void *param)
{
struct rt_serial_device *serial = (struct rt_serial_device *)param;
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
}
static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
return RT_EOK;
}
static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
UART_IMSC(uart->hw_base) &= ~UARTIMSC_RXIM;
break;
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
UART_IMSC(uart->hw_base) |= UARTIMSC_RXIM;
rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, serial, "uart");
rt_hw_interrupt_umask(uart->irqno);
break;
}
return RT_EOK;
}
static int uart_putc(struct rt_serial_device *serial, char c)
{
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
while (UART_FR(uart->hw_base) & UARTFR_TXFF);
UART_DR(uart->hw_base) = c;
return 1;
}
static int uart_getc(struct rt_serial_device *serial)
{
int ch;
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
ch = -1;
if (!(UART_FR(uart->hw_base) & UARTFR_RXFE))
{
ch = UART_DR(uart->hw_base) & 0xff;
}
return ch;
}
static const struct rt_uart_ops _uart_ops =
{
uart_configure,
uart_control,
uart_putc,
uart_getc,
};
#ifdef RT_USING_UART0
/* UART device driver structure */
static struct hw_uart_device _uart0_device =
{
REALVIEW_UART0_BASE,
IRQ_PBA8_UART0,
};
static struct rt_serial_device _serial0;
#endif
#ifdef RT_USING_UART1
/* UART1 device driver structure */
static struct hw_uart_device _uart1_device =
{
REALVIEW_UART1_BASE,
IRQ_PBA8_UART1,
};
static struct rt_serial_device _serial1;
#endif
int uart_isr_test(void)
{
return uart_getc(&_serial1);
}
int rt_hw_uart_init(void)
{
struct hw_uart_device *uart;
struct serial_configure config;
config.baud_rate = BAUD_RATE_115200;
config.bit_order = BIT_ORDER_LSB;
config.data_bits = DATA_BITS_8;
config.parity = PARITY_NONE;
config.stop_bits = STOP_BITS_1;
config.invert = NRZ_NORMAL;
config.bufsz = RT_SERIAL_RB_BUFSZ;
#ifdef RT_USING_UART0
uart = &_uart0_device;
#ifdef RT_USING_VMM
uart->hw_base = vmm_find_iomap("UART0");
#endif
_serial0.ops = &_uart_ops;
_serial0.config = config;
/* register UART1 device */
rt_hw_serial_register(&_serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
/* enable Rx and Tx of UART */
UART_CR(uart->hw_base) = (1 << 0) | (1 << 8) | (1 << 9);
#endif
#ifdef RT_USING_UART1
uart = &_uart1_device;
#ifdef RT_USING_VMM
uart->hw_base = vmm_find_iomap("UART1");
#endif
_serial1.ops = &_uart_ops;
_serial1.config = config;
/* register UART1 device */
rt_hw_serial_register(&_serial1, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
/* enable Rx and Tx of UART */
UART_CR(uart->hw_base) = (1 << 0) | (1 << 8) | (1 << 9);
#endif
return 0;
}
INIT_BOARD_EXPORT(rt_hw_uart_init);

10
bsp/realview-a8/linux_vmm/.gitignore vendored
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@ -1,10 +0,0 @@
*.o
*.o.cmd
*.ko
*.ko.cmd
*.mod.c
Module.symvers
modules.order
.tmp_versions/

6
bsp/realview-a8/linux_vmm/Makefile
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@ -1,6 +0,0 @@
ccflags-y := -I$(VMM_HDR_DIR)
obj-m += rtvmm.o
rtvmm-objs := vmm_linux.o

22
bsp/realview-a8/linux_vmm/build.sh
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@ -1,22 +0,0 @@
#!/bin/sh
set -e
# local variable
TISDK_DIR=/home/grissiom/ti-sdk-am335x-evm-06.00.00.00/
# external variable {{{
ROOTFS_DIR=${ROOTFS_DIR:-~/remotedir/buildroot-rootfs/}
KDIR=${KDIR:-$PWD/../../bfm-kernel/}
TOOLCHAIN_DIR=${TOOLCHAIN_DIR:-${TISDK_DIR}/linux-devkit/sysroots/i686-arago-linux/usr/bin}
TOOLCHAIN_PREFIX=${TOOLCHAIN_PREFIX:-"arm-linux-gnueabihf-"}
# }}}
export PATH="${TOOLCHAIN_DIR}:$PATH"
make -C $KDIR M=$PWD ARCH=arm CROSS_COMPILE="${TOOLCHAIN_PREFIX}" V=0
#sudo PATH="${TOOLCHAIN_DIR}:$PATH" \
#make -C $KDIR M=$PWD ARCH=arm CROSS_COMPILE=${TOOLCHAIN_PREFIX} \
#INSTALL_MOD_PATH=${ROOTFS_DIR} modules_install

257
bsp/realview-a8/linux_vmm/vmm_linux.c
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@ -1,257 +0,0 @@
#include <linux/module.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <linux/memblock.h>
#include <asm/cacheflush.h>
#include <mach/hardware.h>
#include "vmm_linux.h"
#define IOMAP_NUM 3
#define BUFF_SZ (4 * 1024)
struct vmm_iomap *_linux_iomap = NULL;
const char *uart_name = "uart";
/* some exported Linux Kernel patch */
extern void vmm_set_status(int status);
extern void vmm_context_init(void *context_addr);
extern unsigned long vmm_save_irq(void);
extern void vmm_restore_irq(unsigned long flags);
static struct vmm_domain domain =
{
.kernel = DOMAIN_KERNEL,
.user = DOMAIN_USER,
.io = DOMAIN_IO,
.vmm = DOMAIN_RTVMM,
.vmm_share = DOMAIN_RTVMM_SHR,
};
static struct vmm_iomap iomap[RT_VMM_IOMAP_MAXNR] =
{
{.name = "UART1", .pa = 0x1000A000, .size = 4096},
{.name = "TIMER", .pa = 0x10012000, .size = 4096},
{.name = "GIC_CPU", .pa = 0x1E000000, .size = 4096},
{.name = "GIC_DIST", .pa = 0x1E001000, .size = 4096},
{.name = "SYS_CTRL", .pa = 0x1001A000, .size = 4096},
{.pa = 0},
};
void vmm_iomap_init(void)
{
int index;
_linux_iomap = &iomap[0];
BUILD_BUG_ON(ARRAY_SIZE(iomap) > RT_VMM_IOMAP_MAXNR);
for (index = 0; index < ARRAY_SIZE(iomap); index++) {
if (_linux_iomap[index].pa == 0)
break;
if (_linux_iomap[index].size != 0)
_linux_iomap[index].va =
ioremap_nocache(_linux_iomap[index].pa,
_linux_iomap[index].size);
printk("%s: 0x%08lx --> 0x%p, size %u\n",
_linux_iomap[index].name,
_linux_iomap[index].pa,
_linux_iomap[index].va,
_linux_iomap[index].size);
}
printk("vmm: init iomap done!\n");
}
#if 0
void trap_set_vector(unsigned long start, unsigned int length)
{
int sctrl;
/* C12-C0 is only active when SCTLR.V = 0 */
asm volatile ("mrc p15, #0, %0, c1, c0, #0"
:"=r" (sctrl));
sctrl &= ~(1 << 13);
asm volatile ("mcr p15, #0, %0, c1, c0, #0"
:
:"r" (sctrl));
asm volatile ("mcr p15, #0, %0, c12, c0, #0"
:
:"r" (start));
rmb();
}
#else
extern void trap_set_vector(unsigned long start, unsigned int length);
#endif
static void vmm_open_domain(void)
{
unsigned long dval;
asm volatile ("mrc p15, 0, %0, c3, c0\n"
: "=r" (dval));
dval |= (0x1 << (DOMAIN_RTVMM * 2)) |
(0x1 << (DOMAIN_RTVMM_SHR * 2));
asm volatile ("mcr p15, 0, %0, c3, c0\n"
: : "r" (dval));
}
static void vmm_close_domain(void)
{
unsigned long dval;
asm volatile ("mrc p15, 0, %0, c3, c0\n"
: "=r" (dval));
/* we still need access tp DOMAIN_RTVMM_SHR because the IRQ stack is
* there. */
dval &= ~(0x3 << (DOMAIN_RTVMM * 2));
asm volatile ("mcr p15, 0, %0, c3, c0\n"
: : "r" (dval));
}
static DEFINE_SPINLOCK(init_lock);
void vmm_entry(void)
{
vmm_entry_t entry;
unsigned long flags;
struct vmm_entry_param eparam = {
.iomap = &iomap[0],
.domain = &domain,
};
printk("Entry VMM:0x%08x with iomap 0x%p\n", VMM_BEGIN, _linux_iomap);
spin_lock_irqsave(&init_lock, flags);
memcpy((void*)(LINUX_VECTOR_POS), (void*)0xFFFF0000,
LINUX_VECTOR_PGSZ);
flush_icache_range(LINUX_VECTOR_POS,
LINUX_VECTOR_POS + LINUX_VECTOR_PGSZ);
/*dump_vector(0xFFFF0000);*/
/* set the interrupt vector to RTT */
trap_set_vector(VMM_BEGIN, 16 * 4);
/*dump_vector(VMM_END-LINUX_VECTOR_PGSZ);*/
entry = (vmm_entry_t)VMM_BEGIN;
vmm_context_init(&RT_VMM_SHARE->ctx);
vmm_set_status(0x01);
pr_info("Linux domain: kernel: %d, user: %d, io: %d\n",
DOMAIN_KERNEL, DOMAIN_USER, DOMAIN_IO);
/* switch to RTT and Good Luck */
entry(&eparam);
spin_unlock_irqrestore(&init_lock, flags);
/* we now switched to virtual IRQ but the hardware IRQ is disabled
* before entering RT-Thread. So we have to enabled it by hand. */
{
asm volatile ("cpsie i":::"memory", "cc");
}
printk("come back to Linux.\n");
}
int vmm_load_fw(const char* filename)
{
mm_segment_t oldfs = {0};
unsigned long len;
unsigned long file_sz;
loff_t pos = 0;
struct file *flp = NULL;
char *buf_ptr = (char*)VMM_BEGIN;
printk("loading RT-Thread:%s ....", filename);
/* FIXME: we should not need this actually. But currently Linux would
* hang without this. Let's just proceed and I will go back to handle
* this in the future. */
memset((void*)VMM_BEGIN, 0, VMM_SIZE);
flp = filp_open(filename, O_RDONLY, S_IRWXU);
if (IS_ERR(flp))
{
printk("vmm loader: open file failed. "
"Return 0x%p\n", flp);
return -1;
}
/* get file size */
file_sz = vfs_llseek(flp, 0, SEEK_END);
vfs_llseek(flp, 0, SEEK_SET);
oldfs = get_fs();
set_fs(get_ds());
while (file_sz > 0)
{
// len = vfs_read(flp, (void __user __force *)buff, BUFF_SZ, &pos);
len = vfs_read(flp, (void __user __force*)buf_ptr, BUFF_SZ, &pos);
file_sz -= len;
buf_ptr += len;
}
set_fs(oldfs);
filp_close(flp, NULL);
printk("done!\n");
/* flush RT-Thread memory */
flush_cache_vmap(VMM_BEGIN, VMM_END);
return 0;
}
static int __init vmm_init(void)
{
printk("VMM started.\n");
vmm_iomap_init();
/* Open the domain permission so we could write firmware to it */
vmm_open_domain();
if (vmm_load_fw("/vmm/rtthread.bin") == 0)
vmm_entry();
return 0;
}
static void __exit vmm_exit(void)
{
int i;
unsigned long flags;
spin_lock_irqsave(&init_lock, flags);
vmm_set_status(0x00);
trap_set_vector(LINUX_VECTOR_POS, 16 * 4);
spin_unlock_irqrestore(&init_lock, flags);
for (i = 0; i < ARRAY_SIZE(iomap); i++)
{
if (iomap[i].pa == 0)
break;
printk("iounmap %s(0x%p)\n",
iomap[i].name,
iomap[i].va);
iounmap(iomap[i].va);
}
vmm_close_domain();
printk("vmm exit\n");
}
module_init(vmm_init);
module_exit(vmm_exit);
MODULE_AUTHOR("bernard.xiong <bernard.xiong@gmail.com>");
MODULE_DESCRIPTION("RT-VMM");
MODULE_LICENSE("GPL");

8
bsp/realview-a8/linux_vmm/vmm_linux.h
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#ifndef __VMM_H__
#define __VMM_H__
#include <rtt_api.h>
#define RT_VMM_ON_AM335X
#endif

19
bsp/realview-a8/mk.sh
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@ -1,19 +0,0 @@
#!/bin/sh
set -e
KDIR=~/linux-git
BUILD_ROOT_DIR=/temp-build/buildroot-2014.02/
scons -j20
mkdir -p $BUILD_ROOT_DIR/output/target/vmm
cp rtthread.bin $BUILD_ROOT_DIR/output/target/vmm
(
cd ./linux_vmm/
export PATH=/opt/gcc-linaro-arm-linux-gnueabihf-4.8-2013.10_linux/bin/:"$PATH"
make -C $KDIR M=$PWD VMM_HDR_DIR=$PWD/../ ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf-
cp rtvmm.ko $BUILD_ROOT_DIR/output/target/root/
)
make -C $BUILD_ROOT_DIR

1
bsp/realview-a8/qemu.sh
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@ -1 +0,0 @@
qemu-system-arm -M realview-pb-a8 -kernel rtthread-realview.elf -serial vc -serial vc

91
bsp/realview-a8/realview.lds
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@ -1,91 +0,0 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SECTIONS
{
. = 0x70000000;
__text_start = .;
.text :
{
*(.vectors)
*(.text)
*(.text.*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for modules */
. = ALIGN(4);
__rtmsymtab_start = .;
KEEP(*(RTMSymTab))
__rtmsymtab_end = .;
/* section information for initialization */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
} =0
__text_end = .;
__rodata_start = .;
.rodata : { *(.rodata) *(.rodata.*) }
__rodata_end = .;
. = ALIGN(4);
.ctors :
{
PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors))
PROVIDE(__ctors_end__ = .);
}
.dtors :
{
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .);
}
. = ALIGN(8);
__data_start = .;
.data :
{
*(.data)
*(.data.*)
}
__data_end = .;
. = ALIGN(8);
__bss_start = .;
.bss :
{
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
}
. = ALIGN(4);
__bss_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
_end = .;
}

140
bsp/realview-a8/realview_vmm.lds.S
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@ -1,140 +0,0 @@
#include <rtt_api.h>
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SECTIONS
{
. = VMM_BEGIN;
__text_start = .;
.text.share :
{
KEEP(*(.vectors))
*(.text.isr)
*(.vmm_glue)
}
ASSERT(SIZEOF(.text.share) <= VMM_SHARE_TEXT_PGSZ, ".text.share too big")
. = VMM_BEGIN + VMM_SHARE_TEXT_PGSZ;
/* the vectore page is saved here
* {
* }
*/
. = VMM_SHARE_DATA_POS;
.data.share :
{
__data_share_start = .;
*(.data.share*)
__data_share_end = .;
}
ASSERT(SIZEOF(.data.share) <= (VMM_SHARE_DATA_PGSZ), ".data.share is too big")
. = VMM_SHARE_BSS_POS;
.bss.share :
{
__bss_share_start = .;
*(.bss.share*)
__bss_share_end = .;
}
ASSERT(SIZEOF(.bss.share) <= (VMM_SHARE_BSS_PGSZ), ".bss.share is too big")
. = VMM_SHARE_CTX_POS;
.vmm.share :
{
/* the vmm context goes here */
__vmm_share_start = .;
*(.vmm.share*)
__vmm_share_end = .;
}
ASSERT(SIZEOF(.vmm.share) <= (VMM_SHARE_CTX_PGSZ), "vmm share context is too big")
. = VMM_BEGIN + VMM_SHARE_PGSZ;
.text :
{
*(.vmm_init)
*(.text)
*(.text.*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for modules */
. = ALIGN(4);
__rtmsymtab_start = .;
KEEP(*(RTMSymTab))
__rtmsymtab_end = .;
/* section information for initialization */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
}
__text_end = .;
__rodata_start = .;
.rodata : { *(.rodata) *(.rodata.*) }
__rodata_end = .;
. = ALIGN(4);
.ctors :
{
PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors))
PROVIDE(__ctors_end__ = .);
}
.dtors :
{
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .);
}
__data_start = .;
. = ALIGN(8);
.data :
{
*(.data)
*(.data.*)
}
__data_end = .;
. = ALIGN(8);
__bss_start = __data_end;
.bss :
{
vmm_stack_start = .;
. = vmm_stack_start + RT_VMM_STACK_SIZE;
vmm_stack_end = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
}
. = ALIGN(4);
__bss_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
_end = .;
}

153
bsp/realview-a8/rtconfig.h
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@ -1,153 +0,0 @@
/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// <integer name="RT_NAME_MAX" description="Maximal size of kernel object name length" default="6" />
#define RT_NAME_MAX 6
// <integer name="RT_ALIGN_SIZE" description="Alignment size for CPU architecture data access" default="4" />
#define RT_ALIGN_SIZE 4
// <integer name="RT_THREAD_PRIORITY_MAX" description="Maximal level of thread priority" default="32">
// <item description="8">8</item>
// <item description="32">32</item>
// <item description="256">256</item>
// </integer>
#define RT_THREAD_PRIORITY_MAX 32
// <integer name="RT_TICK_PER_SECOND" description="OS tick per second" default="1000" />
#define RT_TICK_PER_SECOND 1000
// <integer name="IDLE_THREAD_STACK_SIZE" description="The stack size of idle thread" default="512" />
#define IDLE_THREAD_STACK_SIZE 512
// <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" >
#define RT_DEBUG
#define RT_DEBUG_COLOR
// <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" />
// #define RT_THREAD_DEBUG
// <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" />
// #define RT_USING_OVERFLOW_CHECK
// </section>
// <bool name="RT_USING_HOOK" description="Using hook functions" default="true" />
#define RT_USING_HOOK
// <section name="RT_USING_TIMER_SOFT" description="Using software timer which will start a thread to handle soft-timer" default="true" >
// #define RT_USING_TIMER_SOFT
// <integer name="RT_TIMER_THREAD_PRIO" description="The priority level of timer thread" default="4" />
#define RT_TIMER_THREAD_PRIO 4
// <integer name="RT_TIMER_THREAD_STACK_SIZE" description="The stack size of timer thread" default="512" />
#define RT_TIMER_THREAD_STACK_SIZE 512
// <integer name="RT_TIMER_TICK_PER_SECOND" description="The soft-timer tick per second" default="10" />
#define RT_TIMER_TICK_PER_SECOND 10
// </section>
// <section name="IPC" description="Inter-Thread communication" default="always" >
// <bool name="RT_USING_SEMAPHORE" description="Using semaphore in the system" default="true" />
#define RT_USING_SEMAPHORE
// <bool name="RT_USING_MUTEX" description="Using mutex in the system" default="true" />
#define RT_USING_MUTEX
// <bool name="RT_USING_EVENT" description="Using event group in the system" default="true" />
#define RT_USING_EVENT
// <bool name="RT_USING_MAILBOX" description="Using mailbox in the system" default="true" />
#define RT_USING_MAILBOX
// <bool name="RT_USING_MESSAGEQUEUE" description="Using message queue in the system" default="true" />
#define RT_USING_MESSAGEQUEUE
// </section>
// <section name="MM" description="Memory Management" default="always" >
// <bool name="RT_USING_MEMPOOL" description="Using Memory Pool Management in the system" default="true" />
#define RT_USING_MEMPOOL
// <bool name="RT_USING_MEMHEAP" description="Using Memory Heap Object in the system" default="true" />
// #define RT_USING_MEMHEAP
// <bool name="RT_USING_HEAP" description="Using Dynamic Heap Management in the system" default="true" />
#define RT_USING_HEAP
// <bool name="RT_USING_MEMHEAP_AS_HEAP" description="Using Memory Heap Object as system heap" default="true" />
// #define RT_USING_MEMHEAP_AS_HEAP
// <bool name="RT_USING_SMALL_MEM" description="Optimizing for small memory" default="false" />
#define RT_USING_SMALL_MEM
// <bool name="RT_USING_SLAB" description="Using SLAB memory management for large memory" default="false" />
// #define RT_USING_SLAB
// </section>
// <section name="RT_USING_DEVICE" description="Using Device Driver Framework" default="true" >
#define RT_USING_DEVICE
// <bool name="RT_USING_DEVICE_IPC" description="Using IPC in Device Driver Framework" default="true" />
#define RT_USING_DEVICE_IPC
// <bool name="RT_USING_SERIAL" description="Using Serial Device Driver Framework" default="true" />
#define RT_USING_SERIAL
#define RT_SERIAL_USING_DMA
// <integer name="RT_UART_RX_BUFFER_SIZE" description="The buffer size for UART reception" default="64" />
#define RT_UART_RX_BUFFER_SIZE 64
// <bool name="RT_USING_INTERRUPT_INFO" description="Using interrupt information description" default="true" />
#define RT_USING_INTERRUPT_INFO
// <bool name="RT_USING_UART0" description="Enable UART0" default="false" />
// #define RT_USING_UART0
// <bool name="RT_USING_UART1" description="Enable UART1" default="true" />
#define RT_USING_UART1
// </section>
// <section name="RT_USING_CONSOLE" description="Using console" default="true" >
#define RT_USING_CONSOLE
// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />
#define RT_CONSOLEBUF_SIZE 128
// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart" />
#define RT_CONSOLE_DEVICE_NAME "uart1"
// </section>
// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
#define RT_USING_COMPONENTS_INIT
// <section name="RT_USING_FINSH" description="Using finsh as shell, which is a C-Express shell" default="true" >
#define RT_USING_FINSH
// <bool name="FINSH_USING_MSH" description="Using module shell" default="true" />
#define FINSH_USING_MSH
// <bool name="FINSH_USING_MSH_DEFAULT" description="The default shell is msh" default="true" />
#define FINSH_USING_MSH_DEFAULT
// <bool name="FINSH_USING_SYMTAB" description="Using symbol table in finsh shell" default="true" />
#define FINSH_USING_SYMTAB
// <bool name="FINSH_USING_DESCRIPTION" description="Keeping description in symbol table" default="true" />
#define FINSH_USING_DESCRIPTION
// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />
#define FINSH_THREAD_STACK_SIZE 4096
// </section>
// <section name="LIBC" description="C Runtime library setting" default="always" >
// <bool name="RT_USING_LIBC" description="Using libc library" default="true" />
#define RT_USING_LIBC
// <bool name="RT_USING_PTHREADS" description="Using POSIX threads library" default="true" />
#define RT_USING_PTHREADS
// </section>
// <section name="RT_USING_DFS" description="Device file system" default="true" >
// #define RT_USING_DFS
// <bool name="DFS_USING_WORKDIR" description="Using working directory" default="true" />
// #define DFS_USING_WORKDIR
// <integer name="DFS_FILESYSTEMS_MAX" description="The maximal number of mounted file system" default="4" />
#define DFS_FILESYSTEMS_MAX 2
// <integer name="DFS_FD_MAX" description="The maximal number of opened files" default="4" />
#define DFS_FD_MAX 4
// <bool name="RT_USING_DFS_ELMFAT" description="Using ELM FatFs" default="true" />
#define RT_USING_DFS_ELMFAT
// <integer name="RT_DFS_ELM_USE_LFN" description="Support long file name" default="0">
// <item description="LFN1">1</item>
// <item description="LFN1">2</item>
// </integer>
#define RT_DFS_ELM_USE_LFN 1
// <integer name="RT_DFS_ELM_MAX_LFN" description="Maximal size of file name length" default="255" />
#define RT_DFS_ELM_MAX_LFN 64
// <bool name="RT_USING_DFS_YAFFS2" description="Using YAFFS2" default="false" />
// #define RT_USING_DFS_YAFFS2
// <bool name="RT_USING_DFS_UFFS" description="Using UFFS" default="false" />
// #define RT_USING_DFS_UFFS
// <bool name="RT_USING_DFS_DEVFS" description="Using devfs for device objects" default="true" />
// #define RT_USING_DFS_DEVFS
// <bool name="RT_USING_DFS_NFS" description="Using NFS v3 client file system" default="false" />
// #define RT_USING_DFS_NFS
// <string name="RT_NFS_HOST_EXPORT" description="NFSv3 host export" default="192.168.1.5:/" />
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
// </section>
// </RDTConfigurator>
// <section name="RT_USING_VMM" description="Enable RT-Thread hypervisor" default="true" >
// #define RT_USING_VMM
// </section>
#endif

55
bsp/realview-a8/rtconfig.py
View File

@ -1,55 +0,0 @@
import os
# toolchains options
ARCH='arm'
CPU='realview-a8-vmm'
CROSS_TOOL='gcc'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
PLATFORM = 'gcc'
# EXEC_PATH = r'/opt/arm-2012.09/bin'
EXEC_PATH = r'C:\Program Files (x86)\CodeSourcery\Sourcery_CodeBench_Lite_for_ARM_EABI\bin'
EXEC_PATH = '/opt/gcc-arm-none-eabi-4_8-2014q1_gri/bin'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -march=armv7-a -mtune=cortex-a8 -mfpu=vfpv3-d16 -ftree-vectorize -ffast-math -mfloat-abi=softfp'
CFLAGS = DEVICE + ' -Wall'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__'
LINK_SCRIPT = 'realview_vmm.lds'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=realview.map,-cref,-u,system_vectors'+\
' -T %s' % LINK_SCRIPT
CPATH = ''
LPATH = ''
# generate debug info in all cases
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -g -gdwarf-2'
if BUILD == 'debug':
CFLAGS += ' -O0'
else:
CFLAGS += ' -O2'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' +\
SIZE + ' $TARGET \n' +\
OBJDUMP + ' -S $TARGET > rtt.S\n'

164
bsp/realview-a8/rtt_api.h
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@ -1,164 +0,0 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2014-04-07 Grissiom first version
*/
#ifndef __RTT_API_H__
#define __RTT_API_H__
/* 4MB in size */
#define VMM_SIZE 0x400000
#define VMM_END 0xc8000000
#define VMM_BEGIN (VMM_END - VMM_SIZE)
/* VMM Memory Map:
*
* --- VMM_BEGIN --- +------+
* .vectors | 4KB |
* .text.share | |
* ----------------- + |
* guest vector page | 4KB |
* ----------------- + |
* .data.share | 4KB |
* ----------------- + |
* .bss.share | 4KB |
* -- SHARE_BASE -- + | 1MB
* shared context | shared region
* ----------------- |
* blabla... |
* ----------------- +------+
* vmm text |
* rodata |
* blabla... |
* ----------------- | private region
* vmm data |
* ----------------- |
* vmm bss |
* ---- VMM_END ---- +------+
*
*/
/* 1MB is one level one page table entry, if we want to page table to be
* simple(avoid TLB miss), we could allocate 1MB for shared memory. */
#define VMM_SHARE_PGSZ (1024*1024)
/* the size and position of shared code text */
#define VMM_SHARE_TEXT_PGSZ 4096
/* the size and position of vector's page size in Linux */
#define LINUX_VECTOR_PGSZ 4096
#define LINUX_VECTOR_POS (VMM_BEGIN + VMM_SHARE_TEXT_PGSZ)
/* the size and position of shared code data */
#define VMM_SHARE_DATA_PGSZ 4096
#define VMM_SHARE_DATA_POS (LINUX_VECTOR_POS + LINUX_VECTOR_PGSZ)
/* the size and position of shared code bss */
#define VMM_SHARE_BSS_PGSZ 4096
#define VMM_SHARE_BSS_POS (VMM_SHARE_DATA_POS + VMM_SHARE_DATA_PGSZ)
/* the size and position of shared code bss */
#define VMM_SHARE_CTX_PGSZ (VMM_SHARE_PGSZ - \
LINUX_VECTOR_PGSZ - \
VMM_SHARE_TEXT_PGSZ - \
VMM_SHARE_DATA_PGSZ - \
VMM_SHARE_BSS_PGSZ)
#if VMM_SHARE_CTX_PGSZ <= 0
#error
#endif
#define VMM_SHARE_CTX_POS (VMM_SHARE_BSS_POS + VMM_SHARE_BSS_PGSZ)
/* the size of FIQ stack page size in RT-Thread */
#define RT_FIQ_STACK_PGSZ 0
/* the size of IRQ stack page size in RT-Thread */
#define RT_IRQ_STACK_PGSZ 4096
#ifdef HEAP_END
#undef HEAP_END
#endif
#define HEAP_END (VMM_END)
#define RT_VMM_VIRQ_TRIGGER 10
#define RT_VMM_STACK_SIZE 1024
/* the max number of iomap entries */
#define RT_VMM_IOMAP_MAXNR 16
#ifndef __iomem
#define __iomem
#endif
#define IRQS_NR_32 ((96 + 31)/32)
/*#define RT_VMM_USING_DOMAIN*/
#ifndef __ASSEMBLY__
/* keep consistent with linux/arch/arm/include/vmm/vmm.h */
struct vmm_context
{
/* the status of vGuest irq, read only for RT-Thread */
volatile unsigned long virq_status;
/* has interrupt pended on vGuest OS IRQ */
volatile unsigned long virq_pended;
/* pending interrupt for vGuest OS */
volatile unsigned long virq_pending[IRQS_NR_32];
};
struct vmm_domain
{
/* the number of kernel domain */
char kernel;
/* the number of user domain */
char user;
/* the number of io domain */
char io;
/* the number of vmm domain */
char vmm;
/* the number of vmm_share domain */
char vmm_share;
};
struct vmm_iomap
{
const char name[16]; /* iomap name */
unsigned long pa; /* physical address */
volatile void __iomem * va; /* virtual address */
size_t size; /* memory size */
};
struct vmm_entry_param
{
struct vmm_iomap *iomap;
struct vmm_domain *domain;
};
typedef void (*vmm_entry_t)(struct vmm_entry_param* param);
struct rt_vmm_share_layout
{
struct vmm_context ctx;
};
#ifndef __KERNEL__
/* not in Linux, use better type check */
extern struct rt_vmm_share_layout rt_vmm_share;
#define RT_VMM_SHARE (&rt_vmm_share)
#else
#define RT_VMM_SHARE ((struct rt_vmm_share_layout*)VMM_SHARE_CTX_POS)
#endif
#endif
#endif /* end of include guard: __RTT_API_H__ */

4
bsp/simulator/drivers/SConscript
View File

@ -26,10 +26,8 @@ if GetDepend('RT_USING_DFS') == False or GetDepend('RT_USING_DFS_WINSHAREDIR') =
SrcRemove(src, 'dfs_win32.c')
if GetDepend('RT_USING_DFS') == False or GetDepend('RT_USING_MODULE') == False:
SrcRemove(src, ['module_win32.c'])
if GetDepend('RT_USING_TAPNETIF') == False:
SrcRemove(src, ['tap_netif.c'])
if sys.platform[0:5]=="linux": #check whether under linux
SrcRemove(src, ['module_win32.c', 'dfs_win32.c', 'tap_netif.c'])
SrcRemove(src, ['module_win32.c', 'dfs_win32.c'])
group = DefineGroup('Drivers', src, depend = [''],
CPPPATH = CPPPATH, LIBS=LIBS, LIBPATH=LIBPATH)

791
bsp/simulator/drivers/tap_netif.c
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@ -1,791 +0,0 @@
/*
* TAP-Win32 -- A kernel driver to provide virtual tap device functionality
* on Windows. Originally derived from the CIPE-Win32
* project by Damion K. Wilson, with extensive modifications by
* James Yonan.
*
* All source code which derives from the CIPE-Win32 project is
* Copyright (C) Damion K. Wilson, 2003, and is released under the
* GPL version 2 (see below).
*
* All other source code is Copyright (C) James Yonan, 2003-2004,
* and is released under the GPL version 2 (see below).
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program (see the file COPYING included with this
* distribution); if not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include <windows.h>
#include <winioctl.h>
#include <rtthread.h>
#include <netif/ethernetif.h>
#define MAX_ADDR_LEN 6
#define TAP_IFNAME "RT-net"
//=============
// TAP IOCTLs
//=============
#define TAP_CONTROL_CODE(request,method) \
CTL_CODE (FILE_DEVICE_UNKNOWN, request, method, FILE_ANY_ACCESS)
#define TAP_IOCTL_GET_MAC TAP_CONTROL_CODE (1, METHOD_BUFFERED)
#define TAP_IOCTL_GET_VERSION TAP_CONTROL_CODE (2, METHOD_BUFFERED)
#define TAP_IOCTL_GET_MTU TAP_CONTROL_CODE (3, METHOD_BUFFERED)
#define TAP_IOCTL_GET_INFO TAP_CONTROL_CODE (4, METHOD_BUFFERED)
#define TAP_IOCTL_CONFIG_POINT_TO_POINT TAP_CONTROL_CODE (5, METHOD_BUFFERED)
#define TAP_IOCTL_SET_MEDIA_STATUS TAP_CONTROL_CODE (6, METHOD_BUFFERED)
#define TAP_IOCTL_CONFIG_DHCP_MASQ TAP_CONTROL_CODE (7, METHOD_BUFFERED)
#define TAP_IOCTL_GET_LOG_LINE TAP_CONTROL_CODE (8, METHOD_BUFFERED)
#define TAP_IOCTL_CONFIG_DHCP_SET_OPT TAP_CONTROL_CODE (9, METHOD_BUFFERED)
//=================
// Registry keys
//=================
#define ADAPTER_KEY "SYSTEM\\CurrentControlSet\\Control\\Class\\{4D36E972-E325-11CE-BFC1-08002BE10318}"
#define NETWORK_CONNECTIONS_KEY "SYSTEM\\CurrentControlSet\\Control\\Network\\{4D36E972-E325-11CE-BFC1-08002BE10318}"
//======================
// Filesystem prefixes
//======================
#define USERMODEDEVICEDIR "\\\\.\\Global\\"
#define TAPSUFFIX ".tap"
//======================
// Compile time configuration
//======================
//#define DEBUG_TAP_WIN32
#define TUN_ASYNCHRONOUS_WRITES 1
#define TUN_BUFFER_SIZE 1560
#define TUN_MAX_BUFFER_COUNT 32
/*
* The data member "buffer" must be the first element in the tun_buffer
* structure. See the function, tap_win32_free_buffer.
*/
typedef struct tun_buffer_s {
unsigned char buffer [TUN_BUFFER_SIZE];
unsigned long read_size;
struct tun_buffer_s* next;
} tun_buffer_t;
typedef struct tap_win32_overlapped {
HANDLE handle;
HANDLE read_event;
HANDLE write_event;
HANDLE output_queue_semaphore;
HANDLE free_list_semaphore;
HANDLE tap_semaphore;
CRITICAL_SECTION output_queue_cs;
CRITICAL_SECTION free_list_cs;
OVERLAPPED read_overlapped;
OVERLAPPED write_overlapped;
tun_buffer_t buffers[TUN_MAX_BUFFER_COUNT];
tun_buffer_t* free_list;
tun_buffer_t* output_queue_front;
tun_buffer_t* output_queue_back;
} tap_win32_overlapped_t;
static tap_win32_overlapped_t tap_overlapped;
/************************************************************************/
/* RT-Thread Network Interface */
/************************************************************************/
struct tap_netif
{
/* inherit from ethernet device */
struct eth_device parent;
tap_win32_overlapped_t *handle;
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
};
#define NETIF_DEVICE(netif) ((struct tap_netif*)(netif))
#define NETIF_TAP(netif) (NETIF_DEVICE(netif)->handle)
static struct tap_netif tap_netif_device;
static struct rt_semaphore sem_lock;
static tun_buffer_t* get_buffer_from_free_list(tap_win32_overlapped_t* const overlapped)
{
tun_buffer_t* buffer = NULL;
WaitForSingleObject(overlapped->free_list_semaphore, INFINITE);
EnterCriticalSection(&overlapped->free_list_cs);
buffer = overlapped->free_list;
overlapped->free_list = buffer->next;
LeaveCriticalSection(&overlapped->free_list_cs);
buffer->next = NULL;
return buffer;
}
static void put_buffer_on_free_list(tap_win32_overlapped_t* const overlapped, tun_buffer_t* const buffer)
{
EnterCriticalSection(&overlapped->free_list_cs);
buffer->next = overlapped->free_list;
overlapped->free_list = buffer;
LeaveCriticalSection(&overlapped->free_list_cs);
ReleaseSemaphore(overlapped->free_list_semaphore, 1, NULL);
}
static tun_buffer_t* get_buffer_from_output_queue(tap_win32_overlapped_t* const overlapped, const int block)
{
tun_buffer_t* buffer = NULL;
DWORD result, timeout = block ? INFINITE : 0L;
// Non-blocking call
result = WaitForSingleObject(overlapped->output_queue_semaphore, timeout);
switch (result)
{
// The semaphore object was signaled.
case WAIT_OBJECT_0:
EnterCriticalSection(&overlapped->output_queue_cs);
buffer = overlapped->output_queue_front;
overlapped->output_queue_front = buffer->next;
if(overlapped->output_queue_front == NULL) {
overlapped->output_queue_back = NULL;
}
LeaveCriticalSection(&overlapped->output_queue_cs);
break;
// Semaphore was nonsignaled, so a time-out occurred.
case WAIT_TIMEOUT:
// Cannot open another window.
break;
}
return buffer;
}
static tun_buffer_t* get_buffer_from_output_queue_immediate (tap_win32_overlapped_t* const overlapped)
{
return get_buffer_from_output_queue(overlapped, 0);
}
static void put_buffer_on_output_queue(tap_win32_overlapped_t* const overlapped, tun_buffer_t* const buffer)
{
EnterCriticalSection(&overlapped->output_queue_cs);
if(overlapped->output_queue_front == NULL && overlapped->output_queue_back == NULL) {
overlapped->output_queue_front = overlapped->output_queue_back = buffer;
} else {
buffer->next = NULL;
overlapped->output_queue_back->next = buffer;
overlapped->output_queue_back = buffer;
}
LeaveCriticalSection(&overlapped->output_queue_cs);
ReleaseSemaphore(overlapped->output_queue_semaphore, 1, NULL);
}
static int is_tap_win32_dev(const char *guid)
{
HKEY netcard_key;
LONG status;
DWORD len;
int i = 0;
status = RegOpenKeyEx(
HKEY_LOCAL_MACHINE,
ADAPTER_KEY,
0,
KEY_READ,
&netcard_key);
if (status != ERROR_SUCCESS) {
return FALSE;
}
for (;;) {
char enum_name[256];
char unit_string[256];
HKEY unit_key;
char component_id_string[] = "ComponentId";
char component_id[256];
char net_cfg_instance_id_string[] = "NetCfgInstanceId";
char net_cfg_instance_id[256];
DWORD data_type;
len = sizeof (enum_name);
status = RegEnumKeyEx(
netcard_key,
i,
enum_name,
&len,
NULL,
NULL,
NULL,
NULL);
if (status == ERROR_NO_MORE_ITEMS)
break;
else if (status != ERROR_SUCCESS) {
return FALSE;
}
rt_snprintf (unit_string, sizeof(unit_string), "%s\\%s",
ADAPTER_KEY, enum_name);
status = RegOpenKeyEx(
HKEY_LOCAL_MACHINE,
unit_string,
0,
KEY_READ,
&unit_key);
if (status != ERROR_SUCCESS) {
return FALSE;
} else {
len = sizeof (component_id);
status = RegQueryValueEx(
unit_key,
component_id_string,
NULL,
&data_type,
(LPBYTE)component_id,
&len);
if (!(status != ERROR_SUCCESS || data_type != REG_SZ)) {
len = sizeof (net_cfg_instance_id);
status = RegQueryValueEx(
unit_key,
net_cfg_instance_id_string,
NULL,
&data_type,
(LPBYTE)net_cfg_instance_id,
&len);
if (status == ERROR_SUCCESS && data_type == REG_SZ) {
if (/* !strcmp (component_id, TAP_COMPONENT_ID) &&*/
!strcmp (net_cfg_instance_id, guid)) {
RegCloseKey (unit_key);
RegCloseKey (netcard_key);
return TRUE;
}
}
}
RegCloseKey (unit_key);
}
++i;
}
RegCloseKey (netcard_key);
return FALSE;
}
static int get_device_guid(
char *name,
int name_size,
char *actual_name,
int actual_name_size)
{
LONG status;
HKEY control_net_key;
DWORD len;
int i = 0;
int stop = 0;
status = RegOpenKeyEx(
HKEY_LOCAL_MACHINE,
NETWORK_CONNECTIONS_KEY,
0,
KEY_READ,
&control_net_key);
if (status != ERROR_SUCCESS) {
return -1;
}
while (!stop)
{
char enum_name[256];
char connection_string[256];
HKEY connection_key;
char name_data[256];
DWORD name_type;
const char name_string[] = "Name";
len = sizeof (enum_name);
status = RegEnumKeyEx(
control_net_key,
i,
enum_name,
&len,
NULL,
NULL,
NULL,
NULL);
if (status == ERROR_NO_MORE_ITEMS)
break;
else if (status != ERROR_SUCCESS) {
return -1;
}
rt_snprintf(connection_string,
sizeof(connection_string),
"%s\\%s\\Connection",
NETWORK_CONNECTIONS_KEY, enum_name);
status = RegOpenKeyEx(
HKEY_LOCAL_MACHINE,
connection_string,
0,
KEY_READ,
&connection_key);
if (status == ERROR_SUCCESS) {
len = sizeof (name_data);
status = RegQueryValueEx(
connection_key,
name_string,
NULL,
&name_type,
(LPBYTE)name_data,
&len);
if (status != ERROR_SUCCESS || name_type != REG_SZ) {
return -1;
}
else {
if (is_tap_win32_dev(enum_name)) {
rt_snprintf(name, name_size, "%s", enum_name);
if (actual_name) {
if (strcmp(actual_name, "") != 0) {
if (strcmp(name_data, actual_name) != 0) {
RegCloseKey (connection_key);
++i;
continue;
}
}
else {
rt_snprintf(actual_name, actual_name_size, "%s", name_data);
}
}
stop = 1;
}
}
RegCloseKey (connection_key);
}
++i;
}
RegCloseKey (control_net_key);
if (stop == 0)
return -1;
return 0;
}
static int tap_win32_set_status(HANDLE handle, int status)
{
unsigned long len = 0;
return DeviceIoControl(handle, TAP_IOCTL_SET_MEDIA_STATUS,
&status, sizeof (status),
&status, sizeof (status), &len, NULL);
}
static void tap_win32_overlapped_init(tap_win32_overlapped_t* const overlapped, const HANDLE handle)
{
overlapped->handle = handle;
overlapped->read_event = CreateEvent(NULL, FALSE, FALSE, NULL);
overlapped->write_event = CreateEvent(NULL, FALSE, FALSE, NULL);
overlapped->read_overlapped.Offset = 0;
overlapped->read_overlapped.OffsetHigh = 0;
overlapped->read_overlapped.hEvent = overlapped->read_event;
overlapped->write_overlapped.Offset = 0;
overlapped->write_overlapped.OffsetHigh = 0;
overlapped->write_overlapped.hEvent = overlapped->write_event;
InitializeCriticalSection(&overlapped->output_queue_cs);
InitializeCriticalSection(&overlapped->free_list_cs);
overlapped->output_queue_semaphore = CreateSemaphore(
NULL, // default security attributes
0, // initial count
TUN_MAX_BUFFER_COUNT, // maximum count
NULL); // unnamed semaphore
if(!overlapped->output_queue_semaphore) {
fprintf(stderr, "error creating output queue semaphore!\n");
}
overlapped->free_list_semaphore = CreateSemaphore(
NULL, // default security attributes
TUN_MAX_BUFFER_COUNT, // initial count
TUN_MAX_BUFFER_COUNT, // maximum count
NULL); // unnamed semaphore
if(!overlapped->free_list_semaphore) {
fprintf(stderr, "error creating free list semaphore!\n");
}
overlapped->free_list = overlapped->output_queue_front = overlapped->output_queue_back = NULL;
{
unsigned index;
for(index = 0; index < TUN_MAX_BUFFER_COUNT; index++) {
tun_buffer_t* element = &overlapped->buffers[index];
element->next = overlapped->free_list;
overlapped->free_list = element;
}
}
/* To count buffers, initially no-signal. */
overlapped->tap_semaphore = CreateSemaphore(NULL, 0, TUN_MAX_BUFFER_COUNT, NULL);
if(!overlapped->tap_semaphore)
fprintf(stderr, "error creating tap_semaphore.\n");
}
static int tap_win32_write(tap_win32_overlapped_t *overlapped,
const void *buffer, unsigned long size)
{
unsigned long write_size;
BOOL result;
DWORD error;
result = GetOverlappedResult( overlapped->handle, &overlapped->write_overlapped,
&write_size, FALSE);
if (!result && GetLastError() == ERROR_IO_INCOMPLETE)
WaitForSingleObject(overlapped->write_event, INFINITE);
result = WriteFile(overlapped->handle, buffer, size,
&write_size, &overlapped->write_overlapped);
if (!result) {
switch (error = GetLastError())
{
case ERROR_IO_PENDING:
#ifndef TUN_ASYNCHRONOUS_WRITES
WaitForSingleObject(overlapped->write_event, INFINITE);
#endif
break;
default:
return -1;
}
}
return write_size;
}
static void tap_win32_thread_entry(void* param)
{
tap_win32_overlapped_t *overlapped;
unsigned long read_size;
BOOL result;
DWORD dwError;
tun_buffer_t* buffer;
struct eth_device* eth;
eth = (struct eth_device*) &tap_netif_device;
overlapped = NETIF_TAP(&tap_netif_device);
buffer = get_buffer_from_free_list(overlapped);
for (;;) {
result = ReadFile(overlapped->handle,
buffer->buffer,
sizeof(buffer->buffer),
&read_size,
&overlapped->read_overlapped);
if (!result) {
dwError = GetLastError();
if (dwError == ERROR_IO_PENDING) {
WaitForSingleObject(overlapped->read_event, INFINITE);
result = GetOverlappedResult( overlapped->handle, &overlapped->read_overlapped,
&read_size, FALSE);
if (!result) {
#ifdef DEBUG_TAP_WIN32
LPVOID lpBuffer;
dwError = GetLastError();
FormatMessage( FORMAT_MESSAGE_ALLOCATE_BUFFER | FORMAT_MESSAGE_FROM_SYSTEM,
NULL, dwError, MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT),
(LPTSTR) & lpBuffer, 0, NULL );
fprintf(stderr, "Tap-Win32: Error GetOverlappedResult %d - %s\n", dwError, lpBuffer);
LocalFree( lpBuffer );
#endif
}
} else {
#ifdef DEBUG_TAP_WIN32
LPVOID lpBuffer;
FormatMessage( FORMAT_MESSAGE_ALLOCATE_BUFFER | FORMAT_MESSAGE_FROM_SYSTEM,
NULL, dwError, MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT),
(LPTSTR) & lpBuffer, 0, NULL );
fprintf(stderr, "Tap-Win32: Error ReadFile %d - %s\n", dwError, lpBuffer);
LocalFree( lpBuffer );
#endif
}
}
if(read_size > 0) {
// rt_kprintf("rx packet, length=%d\n", read_size);
buffer->read_size = read_size;
put_buffer_on_output_queue(overlapped, buffer);
/* notify eth rx thread to receive packet */
eth_device_ready(eth);
buffer = get_buffer_from_free_list(overlapped);
}
}
}
static int tap_win32_read(tap_win32_overlapped_t *overlapped,
rt_uint8_t **pbuf, int max_size)
{
int size = 0;
tun_buffer_t* buffer = get_buffer_from_output_queue_immediate(overlapped);
if(buffer != NULL) {
*pbuf = buffer->buffer;
size = (int)buffer->read_size;
if(size > max_size) {
size = max_size;
}
}
return size;
}
static void tap_win32_free_buffer(tap_win32_overlapped_t *overlapped,
rt_uint8_t *pbuf)
{
tun_buffer_t* buffer = (tun_buffer_t*)pbuf;
put_buffer_on_free_list(overlapped, buffer);
}
static int tap_win32_open(tap_win32_overlapped_t **phandle,
const char *preferred_name)
{
char device_path[256];
char device_guid[0x100];
int rc;
HANDLE handle;
BOOL bret;
char name_buffer[0x100] = {0, };
struct {
unsigned long major;
unsigned long minor;
unsigned long debug;
} version;
DWORD version_len;
if (preferred_name != NULL) {
rt_snprintf(name_buffer, sizeof(name_buffer), "%s", preferred_name);
}
rc = get_device_guid(device_guid, sizeof(device_guid), name_buffer, sizeof(name_buffer));
if (rc)
return -1;
rt_snprintf (device_path, sizeof(device_path), "%s%s%s",
USERMODEDEVICEDIR,
device_guid,
TAPSUFFIX);
handle = CreateFile (
device_path,
GENERIC_READ | GENERIC_WRITE,
0,
0,
OPEN_EXISTING,
FILE_ATTRIBUTE_SYSTEM | FILE_FLAG_OVERLAPPED,
0 );
if (handle == INVALID_HANDLE_VALUE) {
return -1;
}
bret = DeviceIoControl(handle, TAP_IOCTL_GET_VERSION,
&version, sizeof (version),
&version, sizeof (version), &version_len, NULL);
if (bret == FALSE) {
CloseHandle(handle);
return -1;
}
if (!tap_win32_set_status(handle, TRUE)) {
return -1;
}
tap_win32_overlapped_init(&tap_overlapped, handle);
*phandle = &tap_overlapped;
return 0;
}
static rt_err_t tap_netif_init(rt_device_t dev)
{
rt_thread_t tid;
tap_win32_overlapped_t *handle;
if (tap_win32_open(&handle, TAP_IFNAME) < 0) {
printf("tap: Could not open '%s'\n", TAP_IFNAME);
return -RT_ERROR;
}
tap_netif_device.handle = handle;
/* create recv thread */
tid = rt_thread_create("tap", tap_win32_thread_entry, RT_NULL,
2048, RT_THREAD_PRIORITY_MAX - 1, 10);
if (tid != RT_NULL)
{
rt_thread_startup(tid);
}
rt_thread_sleep(RT_TICK_PER_SECOND);
return RT_EOK;
}
static rt_err_t tap_netif_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
}
static rt_err_t tap_netif_close(rt_device_t dev)
{
return RT_EOK;
}
static rt_size_t tap_netif_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_size_t tap_netif_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_err_t tap_netif_control(rt_device_t dev, int cmd, void *args)
{
switch (cmd)
{
case NIOCTL_GADDR:
/* get mac address */
if (args) rt_memcpy(args, tap_netif_device.dev_addr, 6);
else return -RT_ERROR;
break;
default :
break;
}
return RT_EOK;
}
rt_err_t tap_netif_tx( rt_device_t dev, struct pbuf* p)
{
struct pbuf *q;
char buffer[2048];
int length;
tap_win32_overlapped_t *handle;
unsigned char* ptr;
handle = NETIF_TAP(dev);
/* lock EMAC device */
rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
/* copy data to tx buffer */
q = p;
ptr = (rt_uint8_t*)buffer;
while (q)
{
memcpy(ptr, q->payload, q->len);
ptr += q->len;
q = q->next;
}
length = p->tot_len;
tap_win32_write(handle, buffer, length);
/* unlock EMAC device */
rt_sem_release(&sem_lock);
return RT_EOK;
}
struct pbuf *tap_netif_rx(rt_device_t dev)
{
struct pbuf* p = RT_NULL;
tap_win32_overlapped_t *handle;
rt_uint8_t *buf;
int max_size = 4096;
int size;
handle = NETIF_TAP(dev);
size = tap_win32_read(handle, &buf, max_size);
if (size > 0) {
p = pbuf_alloc(PBUF_LINK, size, PBUF_RAM);
pbuf_take(p, buf, size);
tap_win32_free_buffer(handle, buf);
}
return p;
}
void tap_netif_hw_init(void)
{
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
tap_netif_device.dev_addr[0] = 0x00;
tap_netif_device.dev_addr[1] = 0x60;
tap_netif_device.dev_addr[2] = 0x37;
/* set mac address: (only for test) */
tap_netif_device.dev_addr[3] = 0x12;
tap_netif_device.dev_addr[4] = 0x34;
tap_netif_device.dev_addr[5] = 0x56;
tap_netif_device.parent.parent.init = tap_netif_init;
tap_netif_device.parent.parent.open = tap_netif_open;
tap_netif_device.parent.parent.close = tap_netif_close;
tap_netif_device.parent.parent.read = tap_netif_read;
tap_netif_device.parent.parent.write = tap_netif_write;
tap_netif_device.parent.parent.control = tap_netif_control;
tap_netif_device.parent.parent.user_data= RT_NULL;
tap_netif_device.parent.eth_rx = tap_netif_rx;
tap_netif_device.parent.eth_tx = tap_netif_tx;
eth_device_init(&(tap_netif_device.parent), "e0");
}

2
bsp/stm32/README.md
View File

@ -43,7 +43,7 @@ STM32 系列 BSP 目前支持情况如下表所示：
| **F7 系列** | |
| [stm32f746-st-disco](stm32f746-st-disco) | ST 官方 STM32F746-discovery 开发板 |
| [stm32f767-atk-apollo](stm32f767-atk-apollo) | 正点原子 F767 阿波罗开发板 |
| [stm32f767-fire-challenger](stm32f767-fire-challenger/) | 野火 F767 挑战者开发板 |
| [stm32f767-fire-challenger-v1](stm32f767-fire-challenger-v1/) | 野火 F767-V1 挑战者开发板 |
| [stm32f767-st-nucleo](stm32f767-st-nucleo) | ST 官方 STM32F767-nucleo 开发板 |
| [stm32f769-st-disco](stm32f769-st-disco) | ST 官方 STM32f769-discovery 开发板 |
| **G0 系列** | |

2
bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h
View File

@ -24,6 +24,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -56,6 +57,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */

3
bsp/stm32/libraries/HAL_Drivers/config/f1/spi_config.h
View File

@ -24,6 +24,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -56,6 +57,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
@ -88,6 +90,7 @@ extern "C" {
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */

3
bsp/stm32/libraries/HAL_Drivers/config/f2/spi_config.h
View File

@ -24,6 +24,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -58,6 +59,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
@ -92,6 +94,7 @@ extern "C" {
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */

5
bsp/stm32/libraries/HAL_Drivers/config/f4/spi_config.h
View File

@ -24,6 +24,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -58,6 +59,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
@ -92,6 +94,7 @@ extern "C" {
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */
@ -126,6 +129,7 @@ extern "C" {
{ \
.Instance = SPI4, \
.bus_name = "spi4", \
.irq_type = SPI4_IRQn, \
}
#endif /* SPI4_BUS_CONFIG */
#endif /* BSP_USING_SPI4 */
@ -160,6 +164,7 @@ extern "C" {
{ \
.Instance = SPI5, \
.bus_name = "spi5", \
.irq_type = SPI5_IRQn, \
}
#endif /* SPI5_BUS_CONFIG */
#endif /* BSP_USING_SPI5 */

5
bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h
View File

@ -23,6 +23,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -57,6 +58,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
@ -91,6 +93,7 @@ extern "C" {
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */
@ -125,6 +128,7 @@ extern "C" {
{ \
.Instance = SPI4, \
.bus_name = "spi4", \
.irq_type = SPI4_IRQn, \
}
#endif /* SPI4_BUS_CONFIG */
#endif /* BSP_USING_SPI4 */
@ -159,6 +163,7 @@ extern "C" {
{ \
.Instance = SPI5, \
.bus_name = "spi5", \
.irq_type = SPI5_IRQn, \
}
#endif /* SPI5_BUS_CONFIG */
#endif /* BSP_USING_SPI5 */

2
bsp/stm32/libraries/HAL_Drivers/config/g0/spi_config.h
View File

@ -24,6 +24,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -58,6 +59,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */

5
bsp/stm32/libraries/HAL_Drivers/config/g4/spi_config.h
View File

@ -24,6 +24,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -58,6 +59,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
@ -92,6 +94,7 @@ extern "C" {
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */
@ -126,6 +129,7 @@ extern "C" {
{ \
.Instance = SPI4, \
.bus_name = "spi4", \
.irq_type = SPI4_IRQn, \
}
#endif /* SPI4_BUS_CONFIG */
#endif /* BSP_USING_SPI4 */
@ -160,6 +164,7 @@ extern "C" {
{ \
.Instance = SPI5, \
.bus_name = "spi5", \
.irq_type = SPI5_IRQn, \
}
#endif /* SPI5_BUS_CONFIG */
#endif /* BSP_USING_SPI5 */

5
bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h
View File

@ -23,6 +23,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -57,6 +58,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
@ -91,6 +93,7 @@ extern "C" {
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */
@ -125,6 +128,7 @@ extern "C" {
{ \
.Instance = SPI4, \
.bus_name = "spi4", \
.irq_type = SPI4_IRQn, \
}
#endif /* SPI4_BUS_CONFIG */
#endif /* BSP_USING_SPI4 */
@ -159,6 +163,7 @@ extern "C" {
{ \
.Instance = SPI5, \
.bus_name = "spi5", \
.irq_type = SPI5_IRQn, \
}
#endif /* SPI5_BUS_CONFIG */
#endif /* BSP_USING_SPI5 */

3
bsp/stm32/libraries/HAL_Drivers/config/l1/spi_config.h
View File

@ -24,6 +24,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -56,6 +57,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
@ -88,6 +90,7 @@ extern "C" {
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */

3
bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h
View File

@ -23,6 +23,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -57,6 +58,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
@ -91,6 +93,7 @@ extern "C" {
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */

5
bsp/stm32/libraries/HAL_Drivers/config/mp1/spi_config.h
View File

@ -23,6 +23,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -57,6 +58,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
@ -91,6 +93,7 @@ extern "C" {
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */
@ -125,6 +128,7 @@ extern "C" {
{ \
.Instance = SPI4, \
.bus_name = "spi4", \
.irq_type = SPI4_IRQn, \
}
#endif /* SPI4_BUS_CONFIG */
#endif /* BSP_USING_SPI4 */
@ -159,6 +163,7 @@ extern "C" {
{ \
.Instance = SPI5, \
.bus_name = "spi5", \
.irq_type = SPI5_IRQn, \
}
#endif /* SPI5_BUS_CONFIG */
#endif /* BSP_USING_SPI5 */

3
bsp/stm32/libraries/HAL_Drivers/config/wb/spi_config.h
View File

@ -23,6 +23,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -57,6 +58,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
@ -91,6 +93,7 @@ extern "C" {
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */

3
bsp/stm32/libraries/HAL_Drivers/config/wl/spi_config.h
View File

@ -23,6 +23,7 @@ extern "C" {
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
@ -57,6 +58,7 @@ extern "C" {
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
@ -91,6 +93,7 @@ extern "C" {
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */

6
bsp/stm32/libraries/HAL_Drivers/drv_spi.c
View File

@ -264,6 +264,12 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur
HAL_NVIC_EnableIRQ(spi_drv->config->dma_tx->dma_irq);
}
if(spi_drv->spi_dma_flag & SPI_USING_TX_DMA_FLAG || spi_drv->spi_dma_flag & SPI_USING_RX_DMA_FLAG)
{
HAL_NVIC_SetPriority(spi_drv->config->irq_type, 2, 0);
HAL_NVIC_EnableIRQ(spi_drv->config->irq_type);
}
LOG_D("%s init done", spi_drv->config->bus_name);
return RT_EOK;
}

1
bsp/stm32/libraries/HAL_Drivers/drv_spi.h
View File

@ -37,6 +37,7 @@ struct stm32_spi_config
{
SPI_TypeDef *Instance;
char *bus_name;
IRQn_Type irq_type;
struct dma_config *dma_rx, *dma_tx;
};

40
bsp/stm32/stm32f072-st-nucleo/board/Kconfig
View File

@ -32,7 +32,7 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART2
config BSP_USING_UART2
bool "Enable UART2"
default y
@ -41,44 +41,6 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
default n
endif
menuconfig BSP_USING_SPI
bool "Enable SPI BUS"
default n
select RT_USING_SPI
if BSP_USING_SPI
config BSP_USING_SPI1
bool "Enable SPI1 BUS"
default n
config BSP_SPI1_TX_USING_DMA
bool "Enable SPI1 TX DMA"
depends on BSP_USING_SPI1
default n
config BSP_SPI1_RX_USING_DMA
bool "Enable SPI1 RX DMA"
depends on BSP_USING_SPI1
select BSP_SPI1_TX_USING_DMA
default n
endif
menuconfig BSP_USING_I2C1
bool "Enable I2C1 BUS (software simulation)"
default n
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
if BSP_USING_I2C1
config BSP_I2C1_SCL_PIN
int "i2c1 scl pin number"
range 1 216
default 15
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 1 216
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu

2
bsp/stm32/stm32f767-atk-apollo/README.md
View File

@ -52,7 +52,7 @@
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | PA0，PA1... PK15 ---> PIN: 0，1...176 |
| UART | 支持 | |
| SPI | 支持 | |
| SPI | 支持 | SPI2 |
| I2C | 支持 | 软件 I2C |
| ADC | 支持 | |
| RTC | 支持 | 支持外部晶振和内部低速时钟 |

15
bsp/stm32/stm32f767-atk-apollo/board/Kconfig
View File

@ -110,21 +110,6 @@ menu "On-chip Peripheral Drivers"
default n
select RT_USING_SPI
if BSP_USING_SPI
config BSP_USING_SPI1
bool "Enable SPI1 BUS"
default n
config BSP_SPI1_TX_USING_DMA
bool "Enable SPI1 TX DMA"
depends on BSP_USING_SPI1
default n
config BSP_SPI1_RX_USING_DMA
bool "Enable SPI1 RX DMA"
depends on BSP_USING_SPI1
select BSP_SPI1_TX_USING_DMA
default n
config BSP_USING_SPI2
bool "Enable SPI2 BUS"
default n

585
bsp/stm32/stm32f767-fire-challenger-v1/.config Normal file
View File

@ -0,0 +1,585 @@
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=1024
# CONFIG_RT_USING_TIMER_SOFT is not set
#
# kservice optimization
#
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
CONFIG_RT_USING_MEMHEAP=y
# CONFIG_RT_USING_NOHEAP is not set
# CONFIG_RT_USING_SMALL_MEM is not set
# CONFIG_RT_USING_SLAB is not set
CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
# CONFIG_RT_USING_USERHEAP is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x40003
CONFIG_ARCH_ARM=y
CONFIG_RT_USING_CPU_FFS=y
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M7=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
CONFIG_FINSH_USING_MSH_ONLY=y
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_QSPI is not set
# CONFIG_RT_USING_SPI_MSD is not set
# CONFIG_RT_USING_SFUD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
# CONFIG_RT_USING_LIBC is not set
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_LIBC_USING_TIME=y
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_LWP is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_CMUX is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PDULIB is not set
# CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
# CONFIG_PKG_USING_MAVLINK is not set
# CONFIG_PKG_USING_RAPIDJSON is not set
# CONFIG_PKG_USING_BSAL is not set
# CONFIG_PKG_USING_AGILE_MODBUS is not set
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set
# CONFIG_PKG_USING_PDFGEN is not set
# CONFIG_PKG_USING_HELIX is not set
# CONFIG_PKG_USING_AZUREGUIX is not set
# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ULOG_FILE is not set
# CONFIG_PKG_USING_LOGMGR is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_MEMORYPERF is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
# CONFIG_PKG_USING_LWRB2RTT is not set
# CONFIG_PKG_USING_CPU_USAGE is not set
# CONFIG_PKG_USING_GBK2UTF8 is not set
# CONFIG_PKG_USING_VCONSOLE is not set
# CONFIG_PKG_USING_KDB is not set
# CONFIG_PKG_USING_WAMR is not set
# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
# CONFIG_PKG_USING_LWLOG is not set
# CONFIG_PKG_USING_ANV_TRACE is not set
# CONFIG_PKG_USING_ANV_MEMLEAK is not set
# CONFIG_PKG_USING_ANV_TESTSUIT is not set
# CONFIG_PKG_USING_ANV_BENCH is not set
# CONFIG_PKG_USING_DEVMEM is not set
# CONFIG_PKG_USING_REGEX is not set
# CONFIG_PKG_USING_MEM_SANDBOX is not set
# CONFIG_PKG_USING_SOLAR_TERMS is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_DFS_JFFS2 is not set
# CONFIG_PKG_USING_DFS_UFFS is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
#
# Micrium: Micrium software products porting for RT-Thread
#
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
# CONFIG_PKG_USING_UC_CRC is not set
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_PKG_USING_PPOOL is not set
# CONFIG_PKG_USING_OPENAMP is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
# CONFIG_PKG_USING_EVENT_RECORDER is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_AS7341 is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_WS2812B is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
# CONFIG_PKG_USING_MAX7219 is not set
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set
# CONFIG_PKG_USING_LY68L6400 is not set
# CONFIG_PKG_USING_DM9051 is not set
# CONFIG_PKG_USING_SSD1306 is not set
# CONFIG_PKG_USING_QKEY is not set
# CONFIG_PKG_USING_RS485 is not set
# CONFIG_PKG_USING_NES is not set
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
# CONFIG_PKG_USING_SGM706 is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_RDA58XX is not set
# CONFIG_PKG_USING_LIBNFC is not set
# CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set
#
# AI packages
#
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_QUEST is not set
# CONFIG_PKG_USING_NAXOS is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_LZMA is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
#
# entertainment: terminal games and other interesting software packages
#
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_SNAKE is not set
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_DONUT is not set
# CONFIG_PKG_USING_ACLOCK is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_COWSAY is not set
CONFIG_SOC_FAMILY_STM32=y
CONFIG_SOC_SERIES_STM32F7=y
#
# Hardware Drivers Config
#
CONFIG_SOC_STM32F767IG=y
#
# Onboard Peripheral Drivers
#
CONFIG_BSP_USING_USB_TO_USART=y
# CONFIG_BSP_USING_RS232 is not set
# CONFIG_BSP_USING_SDRAM is not set
# CONFIG_BSP_USING_QSPI_FLASH is not set
# CONFIG_BSP_USING_LCD is not set
# CONFIG_BSP_USING_MPU6050 is not set
# CONFIG_BSP_USING_POT is not set
# CONFIG_BSP_USING_SDCARD is not set
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART1=y
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_QSPI is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_I2C1 is not set
# CONFIG_BSP_USING_ONCHIP_RTC is not set
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_SDIO is not set
# CONFIG_BSP_USING_FMC is not set
# CONFIG_BSP_USING_LTDC is not set
# CONFIG_BSP_USING_CRC is not set
# CONFIG_BSP_USING_RNG is not set
# CONFIG_BSP_USING_UDID is not set
#
# Board extended module Drivers
#

0
bsp/stm32/stm32f767-fire-challenger/.gitignore → bsp/stm32/stm32f767-fire-challenger-v1/.gitignore vendored
View File

0
bsp/stm32/stm32f767-fire-challenger/Kconfig → bsp/stm32/stm32f767-fire-challenger-v1/Kconfig
View File

8
bsp/stm32/stm32f767-fire-challenger/README.md → bsp/stm32/stm32f767-fire-challenger-v1/README.md
View File

@ -1,8 +1,8 @@
# STM32F767 挑战者开发板 BSP 说明
# STM32F767-V1 挑战者开发板 BSP 说明
## 简介
本文档为 野火stm32f767 开发板的 BSP (板级支持包) 说明。
本文档为 野火stm32f767-v1 开发板的 BSP (板级支持包) 说明。
主要内容如下：
@ -14,7 +14,7 @@
## 开发板介绍
挑战者 STM32F767 是野火推出的一款基于 ARM Cortex-M7 内核的开发板，最高主频为 216Mhz，该开发板具有丰富的板载资源，可以充分发挥 STM32F767 的芯片性能。
挑战者 STM32F767-V1 是野火推出的一款基于 ARM Cortex-M7 内核的开发板，最高主频为 216Mhz，该开发板具有丰富的板载资源，可以充分发挥 STM32F767 的芯片性能。
开发板外观如下图所示：
@ -53,7 +53,7 @@
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | PA0, PA1... PK15 ---> PIN: 0, 1...176 |
| UART | 支持 | UART1/x/x |
| SPI | 支持 | SPI1/x/x |
| SPI | 暂不支持 | |
| I2C | 支持 | 软件 I2C |
| ADC | 支持 | |
| RTC | 支持 | 支持外部晶振和内部低速时钟 |

0
bsp/stm32/stm32f767-fire-challenger/SConscript → bsp/stm32/stm32f767-fire-challenger-v1/SConscript
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0
bsp/stm32/stm32f767-fire-challenger/SConstruct → bsp/stm32/stm32f767-fire-challenger-v1/SConstruct
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0
bsp/stm32/stm32f767-fire-challenger/applications/SConscript → bsp/stm32/stm32f767-fire-challenger-v1/applications/SConscript
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0
bsp/stm32/stm32f767-fire-challenger/applications/main.c → bsp/stm32/stm32f767-fire-challenger-v1/applications/main.c
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0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/.mxproject → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/.mxproject
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0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/CubeMX_Config.ioc → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/CubeMX_Config.ioc
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0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/Inc/main.h → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/Inc/main.h
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0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/Inc/stm32f7xx_hal_conf.h → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/Inc/stm32f7xx_hal_conf.h
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0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/Inc/stm32f7xx_it.h → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/Inc/stm32f7xx_it.h
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0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/MDK-ARM/CubeMX_Config.uvoptx → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/MDK-ARM/CubeMX_Config.uvoptx
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0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/MDK-ARM/CubeMX_Config.uvprojx → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/MDK-ARM/CubeMX_Config.uvprojx
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0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/MDK-ARM/startup_stm32f767xx.s → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/MDK-ARM/startup_stm32f767xx.s
View File

0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/Src/main.c → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/Src/main.c
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0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/Src/stm32f7xx_hal_msp.c → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/Src/stm32f7xx_hal_msp.c
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0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/Src/stm32f7xx_it.c → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/Src/stm32f7xx_it.c
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0
bsp/stm32/stm32f767-fire-challenger/board/CubeMX_Config/Src/system_stm32f7xx.c → bsp/stm32/stm32f767-fire-challenger-v1/board/CubeMX_Config/Src/system_stm32f7xx.c
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51
bsp/stm32/stm32f767-fire-challenger/board/Kconfig → bsp/stm32/stm32f767-fire-challenger-v1/board/Kconfig
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@ -105,57 +105,6 @@ menu "On-chip Peripheral Drivers"
bool "Enable on-chip FLASH"
default n
menuconfig BSP_USING_SPI
bool "Enable SPI BUS"
default n
select RT_USING_SPI
if BSP_USING_SPI
config BSP_USING_SPI1
bool "Enable SPI1 BUS"
default n
config BSP_SPI1_TX_USING_DMA
bool "Enable SPI1 TX DMA"
depends on BSP_USING_SPI1
default n
config BSP_SPI1_RX_USING_DMA
bool "Enable SPI1 RX DMA"
depends on BSP_USING_SPI1
select BSP_SPI1_TX_USING_DMA
default n
config BSP_USING_SPI2
bool "Enable SPI2 BUS"
default n
config BSP_SPI2_TX_USING_DMA
bool "Enable SPI2 TX DMA"
depends on BSP_USING_SPI2
default n
config BSP_SPI2_RX_USING_DMA
bool "Enable SPI2 RX DMA"
depends on BSP_USING_SPI2
select BSP_SPI2_TX_USING_DMA
default n
config BSP_USING_SPI5
bool "Enable SPI5 BUS"
default n
config BSP_SPI5_TX_USING_DMA
bool "Enable SPI5 TX DMA"
depends on BSP_USING_SPI5
default n
config BSP_SPI5_RX_USING_DMA
bool "Enable SPI5 RX DMA"
depends on BSP_USING_SPI5
select BSP_SPI5_TX_USING_DMA
default n
endif
config BSP_USING_QSPI
bool "Enable QSPI BUS"
select RT_USING_QSPI

0
bsp/stm32/stm32f767-fire-challenger/board/SConscript → bsp/stm32/stm32f767-fire-challenger-v1/board/SConscript
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0
bsp/stm32/stm32f767-fire-challenger/board/board.c → bsp/stm32/stm32f767-fire-challenger-v1/board/board.c
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0
bsp/stm32/stm32f767-fire-challenger/board/board.h → bsp/stm32/stm32f767-fire-challenger-v1/board/board.h
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0
bsp/stm32/stm32f767-fire-challenger/board/linker_scripts/link.icf → bsp/stm32/stm32f767-fire-challenger-v1/board/linker_scripts/link.icf
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0
bsp/stm32/stm32f767-fire-challenger/board/linker_scripts/link.lds → bsp/stm32/stm32f767-fire-challenger-v1/board/linker_scripts/link.lds
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0
bsp/stm32/stm32f767-fire-challenger/board/linker_scripts/link.sct → bsp/stm32/stm32f767-fire-challenger-v1/board/linker_scripts/link.sct
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0
bsp/stm32/stm32f767-fire-challenger/board/ports/drv_qspi_flash.c → bsp/stm32/stm32f767-fire-challenger-v1/board/ports/drv_qspi_flash.c
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0
bsp/stm32/stm32f767-fire-challenger/board/ports/fal_cfg.h → bsp/stm32/stm32f767-fire-challenger-v1/board/ports/fal_cfg.h
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0
bsp/stm32/stm32f767-fire-challenger/board/ports/lcd_port.h → bsp/stm32/stm32f767-fire-challenger-v1/board/ports/lcd_port.h
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0
bsp/stm32/stm32f767-fire-challenger/board/ports/phy_reset.c → bsp/stm32/stm32f767-fire-challenger-v1/board/ports/phy_reset.c
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0
bsp/stm32/stm32f767-fire-challenger/board/ports/sdcard_port.c → bsp/stm32/stm32f767-fire-challenger-v1/board/ports/sdcard_port.c
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