From 782bdd479a3acd9ce0ecd957814c6d2eda28d6b8 Mon Sep 17 00:00:00 2001 From: wuyangyong Date: Fri, 10 Jun 2011 02:51:02 +0000 Subject: [PATCH] update pic32 port git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1478 bbd45198-f89e-11dd-88c7-29a3b14d5316 --- libcpu/mips/pic32/context_gcc.S | 87 +++++++++++++++++++++++++++++++++ libcpu/mips/pic32/interrupt.c | 11 +++++ libcpu/mips/pic32/stack.c | 53 +++++++++++++++++++- 3 files changed, 150 insertions(+), 1 deletion(-) diff --git a/libcpu/mips/pic32/context_gcc.S b/libcpu/mips/pic32/context_gcc.S index 078d0727d8..da9138c06a 100644 --- a/libcpu/mips/pic32/context_gcc.S +++ b/libcpu/mips/pic32/context_gcc.S @@ -1,14 +1,31 @@ +#include +#include "../common/mips.inc" +#include "../common/stackframe.h" + + .section ".text", "ax" + .set noat + .set noreorder + /* * rt_base_t rt_hw_interrupt_disable() */ .globl rt_hw_interrupt_disable rt_hw_interrupt_disable: + mfc0 v0, CP0_STATUS /* v0 = status */ + addiu v1, zero, -2 /* v1 = 0-2 = 0xFFFFFFFE */ + and v1, v0, v1 /* v1 = v0 & 0xFFFFFFFE */ + mtc0 v1, CP0_STATUS /* status = v1 */ + jr ra + nop /* * void rt_hw_interrupt_enable(rt_base_t level) */ .globl rt_hw_interrupt_enable rt_hw_interrupt_enable: + mtc0 a0, CP0_STATUS + jr ra + nop /* * void rt_hw_context_switch_to(rt_uint32 to)/* @@ -16,6 +33,9 @@ rt_hw_interrupt_enable: */ .globl rt_hw_context_switch_to rt_hw_context_switch_to: + lw sp, 0(a0) /* get new task stack pointer */ + + RESTORE_ALL_AND_RET /* * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to) @@ -24,6 +44,13 @@ rt_hw_context_switch_to: */ .globl rt_hw_context_switch rt_hw_context_switch: + mtc0 ra, CP0_EPC + SAVE_ALL + + sw sp, 0(a0) /* store sp in preempted tasks TCB */ + lw sp, 0(a1) /* get new task stack pointer */ + + RESTORE_ALL_AND_RET /* * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to)/* @@ -33,4 +60,64 @@ rt_hw_context_switch: .globl rt_interrupt_to_thread .globl rt_hw_context_switch_interrupt rt_hw_context_switch_interrupt: + la t0, rt_thread_switch_interrput_flag + lw t1, 0(t0) + nop + bnez t1, _reswitch + nop + li t1, 0x01 /* set rt_thread_switch_interrput_flag to 1 */ + sw t1, 0(t0) + la t0, rt_interrupt_from_thread /* set rt_interrupt_from_thread */ + sw a0, 0(t0) +_reswitch: + la t0, rt_interrupt_to_thread /* set rt_interrupt_to_thread */ + sw a1, 0(t0) + /* trigger the soft exception (causes context switch) */ + mfc0 t0, CP0_CAUSE /* t0 = Cause */ + ori t0, t0, (1<<8) /* t0 |= (1<<8) */ + mtc0 t0, CP0_CAUSE /* cause = t0 */ + addiu t1, zero, -257 /* t1 = ~(1<<8) */ + and t0, t0, t1 /* t0 &= t1 */ + mtc0 t0, CP0_CAUSE /* cause = t0 */ + jr ra + nop + +/* + * void __ISR(_CORE_SOFTWARE_0_VECTOR, ipl2) CoreSW0Handler(void) + */ + .section ".text", "ax" + .set noreorder + .set noat + .ent CoreSW0Handler + + .globl CoreSW0Handler +CoreSW0Handler: + SAVE_ALL + + /* mCS0ClearIntFlag(); */ + la t0, IFS0CLR /* t0 = IFS0CLR */ + addiu t1,zero,0x02 /* t1 = (1<<2) */ + sw t1, 0(t0) /* IFS0CLR = t1 */ + + /* tol rd2 */ + lui v1,0xbf88 + addiu v0,zero,(1<<0) + sw v0,24812(v1) + + /* + * switch to the new thread + */ + la k0, rt_interrupt_from_thread + lw k1, 0(k0) + nop + sw sp, 0(k1) /* store sp in preempted tasks's TCB */ + + la k0, rt_interrupt_to_thread + lw k1, 0(k0) + nop + lw sp, 0(k1) /* get new task's stack pointer */ + + RESTORE_ALL_AND_RET + + .end CoreSW0Handler diff --git a/libcpu/mips/pic32/interrupt.c b/libcpu/mips/pic32/interrupt.c index db333c0185..5e63295b6c 100644 --- a/libcpu/mips/pic32/interrupt.c +++ b/libcpu/mips/pic32/interrupt.c @@ -14,3 +14,14 @@ #include +/** + * @addtogroup PIC32 + */ +/*@{*/ + +rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread; +rt_uint32_t rt_thread_switch_interrput_flag; + + +/*@}*/ + diff --git a/libcpu/mips/pic32/stack.c b/libcpu/mips/pic32/stack.c index 61cc88d51d..f7510ce4ce 100644 --- a/libcpu/mips/pic32/stack.c +++ b/libcpu/mips/pic32/stack.c @@ -15,10 +15,20 @@ #include /** - * @addtogroup Loogonson SoC3210 + * @addtogroup PIC32 */ /*@{*/ +rt_uint32_t __attribute__((nomips16)) _get_gp(void) +{ + rt_uint32_t result; + + // get the gp reg + asm volatile("move %0, $28" : "=r"(result)); + + return result; +} + /** * This function will initialize thread stack * @@ -33,6 +43,47 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_ad { rt_uint32_t *stk; + /** Start at stack top */ + stk = (rt_uint32_t *)stack_addr; + *(stk) = (rt_uint32_t) tentry; /* pc: Entry Point */ + *(--stk) = (rt_uint32_t) 0x00800000; /* c0_cause: IV=1, */ + *(--stk) = (rt_uint32_t) 0; /* c0_badvaddr */ + *(--stk) = (rt_uint32_t) 0; /* lo */ + *(--stk) = (rt_uint32_t) 0; /* hi */ + *(--stk) = (rt_uint32_t) 1; /* C0_SR: IE = En, */ + *(--stk) = (rt_uint32_t) texit; /* 31 ra */ + *(--stk) = (rt_uint32_t) 0x0000001e; /* 30 s8 */ + *(--stk) = (rt_uint32_t) stack_addr; /* 29 sp */ + *(--stk) = (rt_uint32_t) _get_gp(); /* 28 gp */ + *(--stk) = (rt_uint32_t) 0x0000001b; /* 27 k1 */ + *(--stk) = (rt_uint32_t) 0x0000001a; /* 26 k0 */ + *(--stk) = (rt_uint32_t) 0x00000019; /* 25 t9 */ + *(--stk) = (rt_uint32_t) 0x00000018; /* 24 t8 */ + *(--stk) = (rt_uint32_t) 0x00000017; /* 23 s7 */ + *(--stk) = (rt_uint32_t) 0x00000016; /* 22 s6 */ + *(--stk) = (rt_uint32_t) 0x00000015; /* 21 s5 */ + *(--stk) = (rt_uint32_t) 0x00000014; /* 20 s4 */ + *(--stk) = (rt_uint32_t) 0x00000013; /* 19 s3 */ + *(--stk) = (rt_uint32_t) 0x00000012; /* 18 s2 */ + *(--stk) = (rt_uint32_t) 0x00000011; /* 17 s1 */ + *(--stk) = (rt_uint32_t) 0x00000010; /* 16 s0 */ + *(--stk) = (rt_uint32_t) 0x0000000f; /* 15 t7 */ + *(--stk) = (rt_uint32_t) 0x0000000e; /* 14 t6 */ + *(--stk) = (rt_uint32_t) 0x0000000d; /* 13 t5 */ + *(--stk) = (rt_uint32_t) 0x0000000c; /* 12 t4 */ + *(--stk) = (rt_uint32_t) 0x0000000b; /* 11 t3 */ + *(--stk) = (rt_uint32_t) 0x0000000a; /* 10 t2 */ + *(--stk) = (rt_uint32_t) 0x00000009; /* 9 t1 */ + *(--stk) = (rt_uint32_t) 0x00000008; /* 8 t0 */ + *(--stk) = (rt_uint32_t) 0x00000007; /* 7 a3 */ + *(--stk) = (rt_uint32_t) 0x00000006; /* 6 a2 */ + *(--stk) = (rt_uint32_t) 0x00000005; /* 5 a1 */ + *(--stk) = (rt_uint32_t) parameter; /* 4 a0 */ + *(--stk) = (rt_uint32_t) 0x00000003; /* 3 v1 */ + *(--stk) = (rt_uint32_t) 0x00000002; /* 2 v0 */ + *(--stk) = (rt_uint32_t) 0x00000001; /* 1 at */ + *(--stk) = (rt_uint32_t) 0x00000000; /* 0 zero */ + /* return task's current stack address */ return (rt_uint8_t *)stk; }