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This commit is contained in:
Ouxiaolong 2022-01-07 21:32:00 +08:00
parent eeae3f7b71
commit 77ccb89590
6 changed files with 61 additions and 46 deletions
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15
bsp/gd32/libraries/Kconfig
View File

@ -1,6 +1,21 @@
config SOC_FAMILY_GD32
bool
config SOC_SERIES_GD32F1
bool
select ARCH_ARM_CORTEX_M3
select SOC_FAMILY_GD32
config SOC_SERIES_GD32F2
bool
select ARCH_ARM_CORTEX_M3
select SOC_FAMILY_GD32
config SOC_SERIES_GD32F3
bool
select ARCH_ARM_CORTEX_M4
select SOC_FAMILY_GD32
config SOC_SERIES_GD32F4
bool
select ARCH_ARM_CORTEX_M4

12
bsp/gd32/libraries/gd32_drivers/drv_gpio.c
View File

@ -200,7 +200,7 @@ static void gd32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
pin_pupd = GPIO_PUPD_NONE;
pin_odpp = GPIO_OTYPE_PP;
#else
pin_mode = GPIO_MODE_OUT_PP;
pin_mode = GPIO_MODE_OUT_PP;
#endif
break;
case PIN_MODE_OUTPUT_OD:
@ -210,7 +210,7 @@ static void gd32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
pin_pupd = GPIO_PUPD_NONE;
pin_odpp = GPIO_OTYPE_OD;
#else
pin_mode = GPIO_MODE_OUT_OD;
pin_mode = GPIO_MODE_OUT_OD;
#endif
break;
case PIN_MODE_INPUT:
@ -219,7 +219,7 @@ static void gd32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
pin_mode = GPIO_MODE_INPUT;
pin_pupd = GPIO_PUPD_PULLUP | GPIO_PUPD_PULLDOWN;
#else
pin_mode = GPIO_MODE_IN_FLOATING;
pin_mode = GPIO_MODE_IN_FLOATING;
#endif
break;
case PIN_MODE_INPUT_PULLUP:
@ -228,7 +228,7 @@ static void gd32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
pin_mode = GPIO_MODE_INPUT;
pin_pupd = GPIO_PUPD_PULLUP;
#else
pin_mode = GPIO_MODE_IPU;
pin_mode = GPIO_MODE_IPU;
#endif
break;
case PIN_MODE_INPUT_PULLDOWN:
@ -237,7 +237,7 @@ static void gd32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
pin_mode = GPIO_MODE_INPUT;
pin_pupd = GPIO_PUPD_PULLDOWN;
#else
pin_mode = GPIO_MODE_IPD;
pin_mode = GPIO_MODE_IPD;
#endif
break;
default:
@ -476,7 +476,7 @@ static rt_err_t gd32_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_
#if defined SOC_SERIES_GD32F4xx
syscfg_exti_line_config(index->port_src, index->pin_src);
#else
gpio_exti_source_select(index->port_src, index->pin_src);
gpio_exti_source_select(index->port_src, index->pin_src);
#endif
/* configure EXTI line */

6
bsp/gd32/libraries/gd32_drivers/drv_soft_i2c.c
View File

@ -182,11 +182,11 @@ int rt_hw_i2c_init(void)
i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops;
gd32_i2c_gpio_init(&i2c_obj[i]);
result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name);
result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name);
RT_ASSERT(result == RT_EOK);
RT_ASSERT(result == RT_EOK);
gd32_i2c_bus_unlock(&soft_i2c_config[i]);
gd32_i2c_bus_unlock(&soft_i2c_config[i]);
LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
soft_i2c_config[i].bus_name,

48
bsp/gd32/libraries/gd32_drivers/drv_spi.c
View File

@ -32,13 +32,13 @@ static const struct gd32_spi spi_bus_obj[] = {
{
SPI0,
"spi0",
RCU_SPI0,
RCU_GPIOA,
&spi_bus0,
GPIOA,
GPIO_PIN_5,
GPIO_PIN_6,
GPIO_PIN_7,
RCU_SPI0,
RCU_GPIOA,
&spi_bus0,
GPIOA,
GPIO_PIN_5,
GPIO_PIN_6,
GPIO_PIN_7,
}
#endif /* BSP_USING_SPI0 */
@ -46,13 +46,13 @@ static const struct gd32_spi spi_bus_obj[] = {
{
SPI1,
"spi1",
RCU_SPI1,
RCU_GPIOB,
&spi_bus1,
GPIOB,
RCU_SPI1,
RCU_GPIOB,
&spi_bus1,
GPIOB,
GPIO_PIN_12,
GPIO_PIN_14,
GPIO_PIN_15,
GPIO_PIN_14,
GPIO_PIN_15,
}
#endif /* BSP_USING_SPI1 */
@ -60,13 +60,13 @@ static const struct gd32_spi spi_bus_obj[] = {
{
SPI2,
"spi2",
RCU_SPI2,
RCU_GPIOB,
&spi_bus2,
GPIOB,
GPIO_PIN_3,
GPIO_PIN_4,
GPIO_PIN_5,
RCU_SPI2,
RCU_GPIOB,
&spi_bus2,
GPIOB,
GPIO_PIN_3,
GPIO_PIN_4,
GPIO_PIN_5,
}
#endif /* BSP_USING_SPI2 */
};
@ -93,10 +93,10 @@ static void gd32_spi_init(struct gd32_spi *gd32_spi)
rcu_periph_clock_enable(gd32_spi->gpio_clk);
#if defined SOC_SERIES_GD32F4xx
/*GPIO pin configuration*/
/*GPIO pin configuration*/
gpio_af_set(gd32_spi->spi_port, GPIO_AF_5, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
gpio_mode_set(gd32_spi->spi_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gd32_spi->miso_pin| gd32_spi->miso_pin);
gpio_mode_set(gd32_spi->spi_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gd32_spi->miso_pin| gd32_spi->miso_pin);
gpio_output_options_set(gd32_spi->spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_200MHZ,gd32_spi->miso_pin| gd32_spi->miso_pin);
#else
@ -120,8 +120,8 @@ static rt_err_t spi_configure(struct rt_spi_device* device,
RT_ASSERT(device != RT_NULL);
RT_ASSERT(configuration != RT_NULL);
//Init SPI
gd32_spi_init(spi_device);
//Init SPI
gd32_spi_init(spi_device);
/* data_width */
if(configuration->data_width <= 8)

12
bsp/gd32/libraries/gd32_drivers/drv_spi_flash.c
View File

@ -29,22 +29,22 @@ static int rt_hw_spi_flash_init(void)
{
rt_err_t res;
static struct rt_spi_device spi_dev_gd25q; /* SPI device */
static struct gd32_spi_cs spi_cs;
spi_cs.GPIOx = GD25Q_SPI_CS_GPIOX;
static struct gd32_spi_cs spi_cs;
spi_cs.GPIOx = GD25Q_SPI_CS_GPIOX;
spi_cs.GPIO_Pin = GD25Q_SPI_CS_GPIOX_PIN_X;
#if defined SOC_SERIES_GD32F4xx
gpio_mode_set(spi_cs.GPIOx, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, spi_cs.GPIO_Pin);
gpio_mode_set(spi_cs.GPIOx, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, spi_cs.GPIO_Pin);
gpio_output_options_set(spi_cs.GPIOx, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, spi_cs.GPIO_Pin);
gpio_bit_set(spi_cs.GPIOx, spi_cs.GPIO_Pin);
#else
gpio_init(spi_cs.GPIOx, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, spi_cs.GPIO_Pin);
gpio_init(spi_cs.GPIOx, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, spi_cs.GPIO_Pin);
#endif
res = rt_spi_bus_attach_device(&spi_dev_gd25q, SPI_FLASH_DEVICE_NAME, SPI_BUS_NAME, (void*)&spi_cs);
res = rt_spi_bus_attach_device(&spi_dev_gd25q, SPI_FLASH_DEVICE_NAME, SPI_BUS_NAME, (void*)&spi_cs);
if (res != RT_EOK)
if (res != RT_EOK)
{
rt_kprintf("rt_spi_bus_attach_device() run failed!\n");
return res;

14
bsp/gd32/libraries/gd32_drivers/drv_usart.c
View File

@ -178,7 +178,7 @@ static const struct gd32_uart uart_obj[] = {
GPIOA, GPIO_AF_7, GPIO_PIN_2, // tx port, tx alternate, tx pin
GPIOA, GPIO_AF_7, GPIO_PIN_3, // rx port, rx alternate, rx pin
#else
GPIOA, GPIO_PIN_2, // tx port, tx pin
GPIOA, GPIO_PIN_2, // tx port, tx pin
GPIOA, GPIO_PIN_3, // rx port, rx pin
#endif
&serial1,
@ -229,7 +229,7 @@ static const struct gd32_uart uart_obj[] = {
GPIOC, GPIO_AF_8, GPIO_PIN_12, // tx port, tx alternate, tx pin
GPIOD, GPIO_AF_8, GPIO_PIN_2, // rx port, rx alternate, rx pin
#else
GPIOC, GPIO_PIN_12, // tx port, tx pin
GPIOC, GPIO_PIN_12, // tx port, tx pin
GPIOD, GPIO_PIN_2, // rx port, rx pin
#endif
&serial4,
@ -246,7 +246,7 @@ static const struct gd32_uart uart_obj[] = {
GPIOC, GPIO_AF_8, GPIO_PIN_6, // tx port, tx alternate, tx pin
GPIOC, GPIO_AF_8, GPIO_PIN_7, // rx port, rx alternate, rx pin
#else
GPIOC, GPIO_PIN_6, // tx port, tx pin
GPIOC, GPIO_PIN_6, // tx port, tx pin
GPIOC, GPIO_PIN_7, // rx port, rx pin
#endif
&serial5,
@ -280,7 +280,7 @@ static const struct gd32_uart uart_obj[] = {
GPIOE, GPIO_AF_8, GPIO_PIN_0, // tx port, tx alternate, tx pin
GPIOE, GPIO_AF_8, GPIO_PIN_1, // rx port, rx alternate, rx pin
#else
GPIOE, GPIO_PIN_0, // tx port, tx pin
GPIOE, GPIO_PIN_0, // tx port, tx pin
GPIOE, GPIO_PIN_1, // rx port, rx pin
#endif
&serial7,
@ -488,7 +488,7 @@ static const struct rt_uart_ops gd32_uart_ops =
.control = gd32_uart_control,
.putc = gd32_uart_putc,
.getc = gd32_uart_getc,
RT_NULL,
RT_NULL,
};
/**
@ -501,7 +501,7 @@ int gd32_hw_usart_init(void)
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
int i;
int result;
int result;
for (i = 0; i < sizeof(uart_obj) / sizeof(uart_obj[0]); i++)
{
@ -513,7 +513,7 @@ int gd32_hw_usart_init(void)
uart_obj[i].device_name,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
(void *)&uart_obj[i]);
RT_ASSERT(result == RT_EOK);
RT_ASSERT(result == RT_EOK);
}
return result;