From f8e21052ef4609cec22c65112028dac6703bc7c9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E6=9E=97=E6=B0=B8?= <42107741+ynkan@users.noreply.github.com> Date: Tue, 25 Aug 2020 13:44:32 +0800 Subject: [PATCH] Update drv_hwtimer.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit STM32的硬件定时器在 APBxCLKDivider 为 RCC_HCLK_DIV1 的时候，timer clocks 频率等于外设总线时钟PCLKx. 反之 timer clocks 为 PCLKx 的2倍. --- bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c | 29 ++++++++++++------- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c b/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c index 29c7fa1e67..e71c190c65 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c @@ -7,6 +7,7 @@ * Date Author Notes * 2018-12-10 zylx first version * 2020-06-16 thread-liu Porting for stm32mp1 + * 2020-08-25 linyongkang Fix the timer clock frequency doubling problem */ #include @@ -164,6 +165,12 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) tim = (TIM_HandleTypeDef *)timer->parent.user_data; tim_device = (struct stm32_hwtimer *)timer; + uint32_t FLatency = 0; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &FLatency); + uint32_t pclk1_doubler = 1 + ( RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1 ); + uint32_t pclk2_doubler = 1 + ( RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1 ); + /* time init */ #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11) @@ -176,12 +183,12 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) #endif { #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0) - prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * 2 / 10000) - 1; + prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * pclk2_doubler / 10000) - 1; #endif } else { - prescaler_value = (uint32_t)(HAL_RCC_GetPCLK1Freq() * 2 / 10000) - 1; + prescaler_value = (uint32_t)(HAL_RCC_GetPCLK1Freq() * pclk1_doubler / 10000) - 1; } tim->Init.Period = 10000 - 1; tim->Init.Prescaler = prescaler_value; @@ -290,6 +297,12 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) /* set timer frequence */ freq = *((rt_uint32_t *)arg); + uint32_t FLatency = 0; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &FLatency); + uint32_t pclk1_doubler = 1 + ( RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1 ); + uint32_t pclk2_doubler = 1 + ( RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1 ); + #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11) #elif defined(SOC_SERIES_STM32L4) @@ -300,19 +313,13 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) if (0) #endif { -#if defined(SOC_SERIES_STM32L4) - val = HAL_RCC_GetPCLK2Freq() / freq; -#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1) - val = HAL_RCC_GetPCLK2Freq() * 2 / freq; +#if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0) + val = (uint32_t)(HAL_RCC_GetPCLK2Freq() * pclk2_doubler / 10000) - 1; #endif } else { -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1) - val = HAL_RCC_GetPCLK1Freq() * 2 / freq; -#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) - val = HAL_RCC_GetPCLK1Freq() / freq; -#endif + val = HAL_RCC_GetPCLK1Freq() * pclk1_doubler / freq; } __HAL_TIM_SET_PRESCALER(tim, val - 1);