diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript b/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript
index 77ca10652b..84aa3254dc 100644
--- a/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript
+++ b/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript
@@ -26,6 +26,9 @@ if  GetDepend('SOC_RISCV_FAMILY_CH32'):
         if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2'):
             src += ['drv_soft_i2c.c']
 
+    if GetDepend(['RT_USING_RTC', 'BSP_USING_RTC']):
+        src += ['drv_rtc.c']
+
 path =  [cwd]
 
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_rtc.c b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_rtc.c
new file mode 100644
index 0000000000..5624792ec3
--- /dev/null
+++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_rtc.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date         Author        Notes
+ * 2021-08-10   charlown      first version
+ * 2022-09-22   hg0720        the first version which add from wch
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <sys/time.h>
+#include "board.h"
+
+#ifdef BSP_USING_RTC
+
+#define LOG_TAG "drv.rtc"
+#include "drv_log.h"
+
+#ifndef BKP_DR1
+#define BKP_DR1 RT_NULL
+#endif
+
+#define BKUP_REG_DATA 0xA1A1
+
+static struct rt_rtc_device rtc;
+
+static void rt_rtc_config(void)
+{
+    /* Allow access to BKP Domain */
+    PWR_BackupAccessCmd(ENABLE);
+
+#if defined(BSP_USING_RTC_LSI) && defined(LSI_VALUE)
+    RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI);
+#else /* BSP_USING_RTC_LSE */
+    RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
+#endif
+
+    RCC_RTCCLKCmd(ENABLE);
+    RTC_WaitForLastTask();
+    RTC_WaitForSynchro();
+    if (BKP_ReadBackupRegister(BKP_DR1) != BKUP_REG_DATA)
+    {
+        LOG_I("RTC hasn't been configured, please use <date> command to config.");
+        /* Set RTC prescaler: set RTC period to 1sec */
+        RTC_SetPrescaler(32767);
+        /* Wait until last write operation on RTC registers has finished */
+        RTC_WaitForLastTask();
+    }
+}
+
+static rt_err_t ch32_rtc_init(void)
+{
+    RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
+    PWR_BackupAccessCmd(ENABLE);
+
+#if defined(BSP_USING_RTC_LSI) && defined(LSI_VALUE)
+    RCC_LSICmd(ENABLE);
+    while (RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET);
+#else /* BSP_USING_RTC_LSE */
+    RCC_LSEConfig(RCC_LSE_ON);
+    while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET);
+#endif
+
+    rt_rtc_config();
+
+    return RT_EOK;
+}
+
+static rt_err_t ch32_get_secs(time_t *sec)
+{
+    *(rt_uint32_t *)sec = RTC_GetCounter();
+    LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)sec);
+
+    return RT_EOK;
+}
+
+static rt_err_t ch32_set_secs(time_t *sec)
+{
+    /* Set the RTC counter value */
+    RTC_SetCounter(*(rt_uint32_t *)sec);
+    /* Wait until last write operation on RTC registers has finished */
+    RTC_WaitForLastTask();
+    LOG_D("set rtc time.");
+    BKP_WriteBackupRegister(BKP_DR1, BKUP_REG_DATA);
+    LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)sec);
+
+    return RT_EOK;
+}
+
+const static struct rt_rtc_ops rtc_ops =
+{
+    ch32_rtc_init,
+    ch32_get_secs,
+    ch32_set_secs,
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+    RT_NULL
+};
+
+int rt_hw_rtc_init(void)
+{
+    rt_err_t result;
+
+    rtc.ops = &rtc_ops;
+    result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL);
+    if (result != RT_EOK)
+    {
+        LOG_E("rtc register err code: %d", result);
+        return result;
+    }
+    LOG_D("rtc init success");
+
+    return RT_EOK;
+}
+INIT_DEVICE_EXPORT(rt_hw_rtc_init);
+#endif /* BSP_USING_RTC */
diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_rtc.h b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_rtc.h
new file mode 100644
index 0000000000..6ae852a7ba
--- /dev/null
+++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_rtc.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date         Author        Notes
+ * 2021-08-10   charlown      first version
+ * 2022-09-22   hg0720        the first version which add from wch
+ */
+
+#ifndef DRV_RTC_H__
+#define DRV_RTC_H__
+
+int rt_hw_rtc_init(void);
+
+#endif
diff --git a/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig b/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig
index a14488992a..0a9f387fe6 100644
--- a/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig
+++ b/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig
@@ -122,6 +122,23 @@ menu "On-chip Peripheral Drivers"
                 endif
         endif
 
+    config BSP_USING_RTC
+        bool "Enable RTC"
+        select RT_USING_RTC
+        default n
+        if BSP_USING_RTC
+            choice
+                prompt "Select clock source"
+                default BSP_RTC_USING_LSE
+
+                config BSP_RTC_USING_LSE
+                    bool "RTC USING LSE"
+
+                config BSP_RTC_USING_LSI
+                    bool "RTC USING LSI"
+            endchoice
+        endif
+
 endmenu
 
 menu "Onboard Peripheral Drivers"