fix the cortex-m3 context switch bug when interrupt preempts pendsv exception; add RT_LWIP_ETH_PAD_SIZE option; fix device activate flag set issue in init function.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@193 bbd45198-f89e-11dd-88c7-29a3b14d5316
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@ -91,8 +91,12 @@ rt_hw_pend_sv PROC
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MRS r2, PRIMASK
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MRS r2, PRIMASK
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CPSID I
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CPSID I
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; clear rt_thread_switch_interrput_flag to 0
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; get rt_thread_switch_interrupt_flag
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LDR r0, =rt_thread_switch_interrput_flag
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LDR r0, =rt_thread_switch_interrput_flag
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LDR r1, [r0]
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CBZ r1, pendsv_exit ; pendsv already handled
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; clear rt_thread_switch_interrput_flag to 0
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MOV r1, #0x00
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MOV r1, #0x00
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STR r1, [r0]
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STR r1, [r0]
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@ -103,6 +107,7 @@ rt_hw_pend_sv PROC
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MRS r1, psp ; get from thread stack pointer
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MRS r1, psp ; get from thread stack pointer
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STMFD r1!, {r4 - r11} ; push r4 - r11 register
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STMFD r1!, {r4 - r11} ; push r4 - r11 register
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LDR r0, [r0]
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LDR r0, [r0]
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STR r1, [r0] ; update from thread stack pointer
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STR r1, [r0] ; update from thread stack pointer
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swtich_to_thread
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swtich_to_thread
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@ -113,6 +118,7 @@ swtich_to_thread
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LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
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LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
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MSR psp, r1 ; update stack pointer
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MSR psp, r1 ; update stack pointer
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pendsv_exit
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; restore interrupt
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; restore interrupt
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MSR PRIMASK, r2
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MSR PRIMASK, r2
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@ -123,9 +129,11 @@ swtich_to_thread
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;/*
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;/*
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; * void rt_hw_context_switch_to(rt_uint32 to);
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; * void rt_hw_context_switch_to(rt_uint32 to);
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; * r0 --> to
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; * r0 --> to
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; * this fucntion is used to perform the first thread switch
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; */
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; */
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rt_hw_context_switch_to PROC
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rt_hw_context_switch_to PROC
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EXPORT rt_hw_context_switch_to
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EXPORT rt_hw_context_switch_to
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; set to thread
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LDR r1, =rt_interrupt_to_thread
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LDR r1, =rt_interrupt_to_thread
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STR r0, [r1]
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STR r0, [r1]
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@ -134,16 +142,23 @@ rt_hw_context_switch_to PROC
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MOV r0, #0x0
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MOV r0, #0x0
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STR r0, [r1]
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STR r0, [r1]
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; set interrupt flag to 1
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LDR r1, =rt_thread_switch_interrput_flag
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MOV r0, #1
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STR r0, [r1]
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; set the PendSV exception priority
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; set the PendSV exception priority
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LDR r0, =NVIC_SYSPRI2
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LDR r0, =NVIC_SYSPRI2
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LDR r1, =NVIC_PENDSV_PRI
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LDR r1, =NVIC_PENDSV_PRI
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STR r1, [r0]
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STR r1, [r0]
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LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
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; trigger the PendSV exception (causes context switch)
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LDR r0, =NVIC_INT_CTRL
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LDR r1, =NVIC_PENDSVSET
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LDR r1, =NVIC_PENDSVSET
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STR r1, [r0]
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STR r1, [r0]
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CPSIE I ; enable interrupts at processor level
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; enable interrupts at processor level
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CPSIE I
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; never reach here!
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; never reach here!
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ENDP
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ENDP
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@ -46,6 +46,9 @@
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#define LWIP_DEBUG
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#define LWIP_DEBUG
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#endif
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#endif
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/* Enable SO_RCVTIMEO processing. */
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#define LWIP_SO_RCVTIMEO 1
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/* ---------- Debug options ---------- */
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/* ---------- Debug options ---------- */
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#ifdef LWIP_DEBUG
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#ifdef LWIP_DEBUG
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#define SYS_DEBUG LWIP_DBG_OFF
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#define SYS_DEBUG LWIP_DBG_OFF
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@ -142,7 +145,9 @@
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link level header. */
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link level header. */
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#define PBUF_LINK_HLEN 16
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#define PBUF_LINK_HLEN 16
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#define ETH_PAD_SIZE 2 // default is 0
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#ifdef RT_LWIP_ETH_PAD_SIZE
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#define ETH_PAD_SIZE RT_LWIP_ETH_PAD_SIZE
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#endif
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/** SYS_LIGHTWEIGHT_PROT
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/** SYS_LIGHTWEIGHT_PROT
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* define SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection
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* define SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection
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@ -84,6 +84,10 @@ rt_err_t rt_device_init_all()
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rt_kprintf("init device:%s error:\n", device->parent.name);
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rt_kprintf("init device:%s error:\n", device->parent.name);
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rt_kprintf("error code:%d\n", result);
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rt_kprintf("error code:%d\n", result);
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}
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}
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else
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{
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device->flag |= RT_DEVICE_FLAG_ACTIVATED;
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}
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}
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}
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}
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}
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@ -318,7 +318,7 @@ void *rt_malloc(rt_size_t size)
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#ifdef RT_USING_HOOK
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#ifdef RT_USING_HOOK
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if (rt_malloc_hook != RT_NULL)
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if (rt_malloc_hook != RT_NULL)
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rt_malloc_hook((rt_uint8_t*)mem, size);
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rt_malloc_hook((rt_uint8_t *)mem + SIZEOF_STRUCT_MEM, size);
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#endif
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#endif
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/* return the memory data except mem struct */
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/* return the memory data except mem struct */
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return (rt_uint8_t *)mem + SIZEOF_STRUCT_MEM;
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return (rt_uint8_t *)mem + SIZEOF_STRUCT_MEM;
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