diff --git a/.github/workflows/action.yml b/.github/workflows/action.yml index ab48262224..2a5697964a 100644 --- a/.github/workflows/action.yml +++ b/.github/workflows/action.yml @@ -123,7 +123,6 @@ jobs: - {RTT_BSP: "swm320", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "swm320-lq100", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "beaglebone", RTT_TOOL_CHAIN: "sourcery-arm"} - - {RTT_BSP: "zynq7000", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "zynqmp-r5-axu4ev", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "frdm-k64f", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "fh8620", RTT_TOOL_CHAIN: "sourcery-arm"} diff --git a/Jenkinsfile b/Jenkinsfile index a106793bbb..0e4192003b 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -107,7 +107,6 @@ pipeline { ['stm32f20x', 'sourcery-arm'], ['swm320-lq100', 'sourcery-arm'], ['beaglebone', 'sourcery-arm'], - ['zynq7000', 'sourcery-arm'], ['frdm-k64f', 'sourcery-arm'], ['fh8620', 'sourcery-arm'], ['xplorer4330/M4', 'sourcery-arm'], diff --git a/bsp/allwinner_tina/applications/main.c b/bsp/allwinner_tina/applications/main.c index 7aaf1f8db3..e974c71ec2 100644 --- a/bsp/allwinner_tina/applications/main.c +++ b/bsp/allwinner_tina/applications/main.c @@ -1,21 +1,7 @@ /* - * File : main.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/board.c b/bsp/allwinner_tina/drivers/board.c index e3b54b3536..c9be412067 100644 --- a/bsp/allwinner_tina/drivers/board.c +++ b/bsp/allwinner_tina/drivers/board.c @@ -1,21 +1,7 @@ /* - * File : board.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/board.h b/bsp/allwinner_tina/drivers/board.h index 11c6a9a15f..7b05b21c66 100644 --- a/bsp/allwinner_tina/drivers/board.h +++ b/bsp/allwinner_tina/drivers/board.h @@ -1,21 +1,7 @@ /* - * File : board.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/drv_clock.c b/bsp/allwinner_tina/drivers/drv_clock.c index b55cd6af4c..9fec431f4b 100644 --- a/bsp/allwinner_tina/drivers/drv_clock.c +++ b/bsp/allwinner_tina/drivers/drv_clock.c @@ -1,21 +1,7 @@ /* - * File : drv_clock.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -541,7 +527,7 @@ rt_err_t mmc_set_clk(enum mmc_clk_id clk_id, int hz) *mmc_clk &= ~(0x1 << 31); return RT_EOK; } - + if (hz <= 24000000) { pll = (0x0 << 24); @@ -593,7 +579,7 @@ rt_err_t mmc_set_clk(enum mmc_clk_id clk_id, int hz) oclk_dly = 1; sclk_dly = 4; } - + *mmc_clk = (0x1 << 31) | pll | (sclk_dly << 20) | \ (n << 16) | (oclk_dly << 8) | (div - 1); diff --git a/bsp/allwinner_tina/drivers/drv_clock.h b/bsp/allwinner_tina/drivers/drv_clock.h index c1cb87af0a..1623791672 100644 --- a/bsp/allwinner_tina/drivers/drv_clock.h +++ b/bsp/allwinner_tina/drivers/drv_clock.h @@ -1,21 +1,7 @@ /* - * File : drv_clock.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -252,4 +238,4 @@ rt_err_t dram_gate_clk_enable(enum dram_gate dram_gate); rt_err_t dram_gate_clk_disable(enum dram_gate dram_gate); rt_err_t mmc_set_clk(enum mmc_clk_id clk_id, int hz); -#endif \ No newline at end of file +#endif diff --git a/bsp/allwinner_tina/drivers/drv_gpio.c b/bsp/allwinner_tina/drivers/drv_gpio.c index 999ab473a0..099ea7621d 100644 --- a/bsp/allwinner_tina/drivers/drv_gpio.c +++ b/bsp/allwinner_tina/drivers/drv_gpio.c @@ -1,21 +1,7 @@ /* - * File : drv_gpio.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/drv_gpio.h b/bsp/allwinner_tina/drivers/drv_gpio.h index 35d368f1c8..74dd5a9be0 100644 --- a/bsp/allwinner_tina/drivers/drv_gpio.h +++ b/bsp/allwinner_tina/drivers/drv_gpio.h @@ -1,21 +1,7 @@ /* - * File : drv_gpio.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -241,4 +227,4 @@ void gpio_set_debounce(enum gpio_port port, rt_uint8_t prescaler); void gpio_set_irq_callback(enum gpio_port port, enum gpio_pin pin, void (*irq_cb)(void *), void *irq_arg); int rt_hw_gpio_init(void); -#endif /* __DRV_GPIO_H__ */ \ No newline at end of file +#endif /* __DRV_GPIO_H__ */ diff --git a/bsp/allwinner_tina/drivers/drv_sdio.c b/bsp/allwinner_tina/drivers/drv_sdio.c index 11b5a63d02..f19cd60d5c 100644 --- a/bsp/allwinner_tina/drivers/drv_sdio.c +++ b/bsp/allwinner_tina/drivers/drv_sdio.c @@ -1,21 +1,7 @@ /* - * File : drv_sdio.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -34,10 +20,10 @@ #define DBG_TAG "MMC" -// #define DBG_LVL DBG_LOG -// #define DBG_LVL DBG_INFO +// #define DBG_LVL DBG_LOG +// #define DBG_LVL DBG_INFO #define DBG_LVL DBG_WARNING -// #define DBG_LVL DBG_ERROR +// #define DBG_LVL DBG_ERROR #include #ifdef RT_USING_SDIO @@ -47,12 +33,12 @@ struct mmc_xfe_des { rt_uint32_t size; /* block size */ - rt_uint32_t num; /* block num */ - rt_uint8_t *buff; /* buff addr */ - rt_uint32_t flag; /* write or read or stream */ -#define MMC_DATA_WRITE (1 << 0) -#define MMC_DATA_READ (1 << 1) -#define MMC_DATA_STREAM (1 << 2) + rt_uint32_t num; /* block num */ + rt_uint8_t *buff; /* buff addr */ + rt_uint32_t flag; /* write or read or stream */ +#define MMC_DATA_WRITE (1 << 0) +#define MMC_DATA_READ (1 << 1) +#define MMC_DATA_STREAM (1 << 2) }; struct mmc_flag @@ -71,7 +57,7 @@ struct sdio_drv tina_mmc_t mmc_des; rt_uint8_t *mmc_buf; rt_uint8_t usedma; - + }; #ifdef CONFIG_MMC_USE_DMA @@ -136,7 +122,7 @@ static int mmc_update_clk(tina_mmc_t mmc) mmc->risr_reg = mmc->risr_reg; return RT_EOK; } - + static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe) { ALIGN(32) static struct mmc_des_v4p1 pdes[128]; // mast ALIGN(32) @@ -145,7 +131,7 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe) unsigned length = xfe->size * xfe->num; unsigned buff_frag_num = length >> SDXC_DES_NUM_SHIFT; unsigned remain = length & (SDXC_DES_BUFFER_MAX_LEN - 1); - + if (remain) { buff_frag_num ++; @@ -156,7 +142,7 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe) } memset(pdes, 0, sizeof(pdes)); mmu_clean_dcache((rt_uint32_t)(xfe->buff), length); - for (i = 0, des_idx = 0; i < buff_frag_num; i++, des_idx++) + for (i = 0, des_idx = 0; i < buff_frag_num; i++, des_idx++) { // memset((void*)&pdes[des_idx], 0, sizeof(struct mmc_v4p1)); pdes[des_idx].des_chain = 1; @@ -182,8 +168,8 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe) pdes[des_idx].last_des = 1; pdes[des_idx].end_of_ring = 1; pdes[des_idx].buf_addr_ptr2 = 0; - } - else + } + else { pdes[des_idx].buf_addr_ptr2 = (unsigned long)&pdes[des_idx+1]; } @@ -217,7 +203,7 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe) mmc->dmac_reg = (1 << 1) | (1 << 7); /* idma on */ rval = mmc->idie_reg & (~3); if (xfe->flag == MMC_DATA_WRITE) - rval |= (1 << 0); + rval |= (1 << 0); else rval |= (1 << 1); mmc->idie_reg = rval; @@ -236,7 +222,7 @@ static rt_err_t mmc_trans_data_by_cpu(tina_mmc_t mmc, struct mmc_xfe_des *xfe) if (xfe->flag == MMC_DATA_WRITE) { - for (i = 0; i < (byte_cnt >> 2); i++) + for (i = 0; i < (byte_cnt >> 2); i++) { while(--timeout && (mmc->star_reg & (1 << 3))); @@ -251,7 +237,7 @@ static rt_err_t mmc_trans_data_by_cpu(tina_mmc_t mmc, struct mmc_xfe_des *xfe) } else { - for (i = 0; i < (byte_cnt >> 2); i++) + for (i = 0; i < (byte_cnt >> 2); i++) { while(--timeout && (mmc->star_reg & (1 << 2))); @@ -290,7 +276,7 @@ static rt_err_t mmc_config_clock(tina_mmc_t mmc, int clk) { mmc_set_clk(SDMMC1, clk); } - + /* Re-enable card clock */ rval = mmc->ckcr_reg; rval |= (0x1 << 16); //(3 << 16); @@ -383,7 +369,7 @@ static int mmc_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd) cmdval |= (1 << 7); if ((resp_type(cmd) != RESP_R3) && (resp_type(cmd) != RESP_R4)) cmdval |= (1 << 8); - + if (data) { cmdval |= (1 << 9) | (1 << 13); @@ -606,7 +592,7 @@ static void sdio_request_send(struct rt_mmcsd_host *host, struct rt_mmcsd_req *r memset(&sdio->flag, 0, sizeof(struct mmc_flag)); mmc_send_cmd(host, req->cmd); - + return; } diff --git a/bsp/allwinner_tina/drivers/drv_sdio.h b/bsp/allwinner_tina/drivers/drv_sdio.h index 742d5362e1..ef7a7c4108 100644 --- a/bsp/allwinner_tina/drivers/drv_sdio.h +++ b/bsp/allwinner_tina/drivers/drv_sdio.h @@ -1,21 +1,7 @@ /* - * File : drv_sdio.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -133,8 +119,8 @@ REG[31] : Load cmd #define SDXC_UPDATE_CLOCK_CMD BIT(21) #define SDXC_LOAD_CMD BIT(31) -/* - SD status reg +/* + SD status reg REG[0] : FIFO_RX_LEVEL REG[1] : FIFO_TX_LEVEL REG[2] : FIFO_EMPTY @@ -143,7 +129,7 @@ REG[4-7] : FSM_STA REG[8] : CARD_PRESENT REG[9] : CARD_BUSY REG[10] : FSM_BUSY -REG[11-16]: RESP_IDX +REG[11-16]: RESP_IDX REG[17-21]: FIFO_LEVEL REG[31] : DMA_REQ */ diff --git a/bsp/allwinner_tina/drivers/drv_uart.c b/bsp/allwinner_tina/drivers/drv_uart.c index ede0eee4e4..a2889c598f 100644 --- a/bsp/allwinner_tina/drivers/drv_uart.c +++ b/bsp/allwinner_tina/drivers/drv_uart.c @@ -1,21 +1,7 @@ /* - * File : drv_uart.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -324,4 +310,4 @@ void uart_irq_handler(int irqno, void *param) } -#endif \ No newline at end of file +#endif diff --git a/bsp/allwinner_tina/drivers/drv_uart.h b/bsp/allwinner_tina/drivers/drv_uart.h index 25cb271c6e..d7c923d373 100644 --- a/bsp/allwinner_tina/drivers/drv_uart.h +++ b/bsp/allwinner_tina/drivers/drv_uart.h @@ -1,21 +1,7 @@ /* - * File : drv_uart.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/spi/drv_spi.c b/bsp/allwinner_tina/drivers/spi/drv_spi.c index d57cc15d7c..cd1f2aa383 100644 --- a/bsp/allwinner_tina/drivers/spi/drv_spi.c +++ b/bsp/allwinner_tina/drivers/spi/drv_spi.c @@ -1,21 +1,7 @@ /* - * File : drv_spi.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/spi/drv_spi.h b/bsp/allwinner_tina/drivers/spi/drv_spi.h index e9b9981542..1384663774 100644 --- a/bsp/allwinner_tina/drivers/spi/drv_spi.h +++ b/bsp/allwinner_tina/drivers/spi/drv_spi.h @@ -1,21 +1,7 @@ /* - * File : drv_spi.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c b/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c index 7aecc5411d..5e4edc9c6b 100644 --- a/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c +++ b/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c @@ -1,21 +1,7 @@ /* - * File : drv_spi_flash.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -65,4 +51,4 @@ INIT_PREV_EXPORT(rt_hw_spi_flash_with_sfud_init); #endif -#endif \ No newline at end of file +#endif diff --git a/bsp/allwinner_tina/libcpu/cpu.c b/bsp/allwinner_tina/libcpu/cpu.c index 23953dea42..19baa4d9fe 100644 --- a/bsp/allwinner_tina/libcpu/cpu.c +++ b/bsp/allwinner_tina/libcpu/cpu.c @@ -1,21 +1,7 @@ /* - * File : cpu.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/cpuport.c b/bsp/allwinner_tina/libcpu/cpuport.c index 5def9905f8..94f2baf415 100644 --- a/bsp/allwinner_tina/libcpu/cpuport.c +++ b/bsp/allwinner_tina/libcpu/cpuport.c @@ -1,21 +1,7 @@ /* - * File : cpuport.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/interrupt.c b/bsp/allwinner_tina/libcpu/interrupt.c index ccf19b0114..7c4e5cda1b 100644 --- a/bsp/allwinner_tina/libcpu/interrupt.c +++ b/bsp/allwinner_tina/libcpu/interrupt.c @@ -1,21 +1,7 @@ /* - * File : interrupt.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017-2021, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/interrupt.h b/bsp/allwinner_tina/libcpu/interrupt.h index 2790d05ec5..bdc0d33c39 100644 --- a/bsp/allwinner_tina/libcpu/interrupt.h +++ b/bsp/allwinner_tina/libcpu/interrupt.h @@ -1,21 +1,7 @@ /* - * File : interrupt.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017-2021, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/mmu.c b/bsp/allwinner_tina/libcpu/mmu.c index 177668a23b..a30f613ca9 100644 --- a/bsp/allwinner_tina/libcpu/mmu.c +++ b/bsp/allwinner_tina/libcpu/mmu.c @@ -1,21 +1,7 @@ /* - * File : mmu.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/mmu.h b/bsp/allwinner_tina/libcpu/mmu.h index b73f59c288..63853e6d34 100644 --- a/bsp/allwinner_tina/libcpu/mmu.h +++ b/bsp/allwinner_tina/libcpu/mmu.h @@ -1,21 +1,7 @@ /* - * File : mmu.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/rt_low_level_init.c b/bsp/allwinner_tina/libcpu/rt_low_level_init.c index 807b9b203d..eb576979c4 100644 --- a/bsp/allwinner_tina/libcpu/rt_low_level_init.c +++ b/bsp/allwinner_tina/libcpu/rt_low_level_init.c @@ -1,21 +1,7 @@ /* - * File : rt_low_level_init.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/stack.c b/bsp/allwinner_tina/libcpu/stack.c index 8f4c218ee1..69e50a9b47 100644 --- a/bsp/allwinner_tina/libcpu/stack.c +++ b/bsp/allwinner_tina/libcpu/stack.c @@ -1,21 +1,7 @@ /* - * File : stack.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/trap.c b/bsp/allwinner_tina/libcpu/trap.c index 84bb3e7f8a..daf3501c68 100644 --- a/bsp/allwinner_tina/libcpu/trap.c +++ b/bsp/allwinner_tina/libcpu/trap.c @@ -1,21 +1,7 @@ /* - * File : trap.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/applications/main.c b/bsp/apollo2/applications/main.c index b058fc7711..4761cae664 100644 --- a/bsp/apollo2/applications/main.c +++ b/bsp/apollo2/applications/main.c @@ -1,21 +1,7 @@ /* - * File : main.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/adc.c b/bsp/apollo2/board/adc.c index a0044bcc37..26b926a209 100644 --- a/bsp/apollo2/board/adc.c +++ b/bsp/apollo2/board/adc.c @@ -1,21 +1,7 @@ /* - * File : adc.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -32,15 +18,15 @@ struct rt_messagequeue adcbat_mq; #define BATTERY_GPIO 35 /* Battery */ -#define BATTERY_ADC_PIN AM_HAL_PIN_35_ADCSE7 -#define BATTERY_ADC_CHANNEL AM_HAL_ADC_SLOT_CHSEL_SE7 /* BATTERY ADC采集通道 */ -#define BATTERY_ADC_CHANNELNUM 7 /* BATTERY ADC采集通道号 */ +#define BATTERY_ADC_PIN AM_HAL_PIN_35_ADCSE7 +#define BATTERY_ADC_CHANNEL AM_HAL_ADC_SLOT_CHSEL_SE7 /* BATTERY ADC閲囬泦閫氶亾 */ +#define BATTERY_ADC_CHANNELNUM 7 /* BATTERY ADC閲囬泦閫氶亾鍙 */ -#define ADC_CTIMER_NUM 3 /* ADC使用定时器 */ +#define ADC_CTIMER_NUM 3 /* ADC浣跨敤瀹氭椂鍣 */ #define ADC_CTIMER_COUNT (2048/512 - 1) -#define ADC_CHANNEL_NUM 1 /* ADC采集通道个数 */ -#define ADC_SAMPLE_NUM 8 /* ADC采样个数 */ +#define ADC_CHANNEL_NUM 1 /* ADC閲囬泦閫氶亾涓暟 */ +#define ADC_SAMPLE_NUM 8 /* ADC閲囨牱涓暟 */ rt_uint8_t bat_adc_cnt = 0; static rt_uint8_t am_adcbat_buffer_pool[256]; @@ -52,7 +38,7 @@ rt_uint8_t am_adc_data_get(rt_uint8_t channel, rt_int16_t *buff, rt_uint16_t siz if (channel == BATTERY_ADC_CHANNELNUM) { - /* wait adc message forever */ + /* wait adc message forever */ rt_mq_recv(&adcbat_mq, adc_bufftemp, 32, RT_WAITING_FOREVER); } diff --git a/bsp/apollo2/board/adc.h b/bsp/apollo2/board/adc.h index 4e4396bae3..552b704ab8 100644 --- a/bsp/apollo2/board/adc.h +++ b/bsp/apollo2/board/adc.h @@ -1,21 +1,7 @@ /* - * File : adc.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/board.c b/bsp/apollo2/board/board.c index 23bc332af4..907455a998 100644 --- a/bsp/apollo2/board/board.c +++ b/bsp/apollo2/board/board.c @@ -1,21 +1,7 @@ /* - * File : board.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/board.h b/bsp/apollo2/board/board.h index 67dfdd5e39..ef21bdb05f 100644 --- a/bsp/apollo2/board/board.h +++ b/bsp/apollo2/board/board.h @@ -1,21 +1,7 @@ /* - * File : board.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/flash.c b/bsp/apollo2/board/flash.c index ae224e85a1..2d28920daf 100644 --- a/bsp/apollo2/board/flash.c +++ b/bsp/apollo2/board/flash.c @@ -1,21 +1,7 @@ /* - * File : flash.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -77,7 +63,7 @@ static rt_err_t rt_flash_control(rt_device_t dev, int cmd, void *args) ui32CurrentPage = AM_HAL_FLASH_ADDR2PAGE(erase->addrstart); ui32CurrentBlock = AM_HAL_FLASH_ADDR2INST(erase->addrstart); - am_hal_flash_page_erase(AM_HAL_FLASH_PROGRAM_KEY, ui32CurrentBlock, ui32CurrentPage); //单扇区擦除命令 + am_hal_flash_page_erase(AM_HAL_FLASH_PROGRAM_KEY, ui32CurrentBlock, ui32CurrentPage); //鍗曟墖鍖烘摝闄ゅ懡浠 erase->addrstart += 8192; } } diff --git a/bsp/apollo2/board/flash.h b/bsp/apollo2/board/flash.h index c9c8f9492c..b628983ce3 100644 --- a/bsp/apollo2/board/flash.h +++ b/bsp/apollo2/board/flash.h @@ -1,21 +1,7 @@ /* - * File : flash.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/gpio.c b/bsp/apollo2/board/gpio.c index c985e0f2a7..edfaef1431 100644 --- a/bsp/apollo2/board/gpio.c +++ b/bsp/apollo2/board/gpio.c @@ -1,21 +1,7 @@ /* - * File : gpio.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -70,7 +56,7 @@ void am_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) else if (value == PIN_HIGH) { am_hal_gpio_out_bit_set(pin); - } + } } int am_pin_read(rt_device_t dev, rt_base_t pin) diff --git a/bsp/apollo2/board/gpio.h b/bsp/apollo2/board/gpio.h index 1ea3c42013..495fde6f6e 100644 --- a/bsp/apollo2/board/gpio.h +++ b/bsp/apollo2/board/gpio.h @@ -1,27 +1,13 @@ /* - * File : gpio.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2017-09-16 Haley the first version */ - + #ifndef __GPIO_H #define __GPIO_H diff --git a/bsp/apollo2/board/i2c.c b/bsp/apollo2/board/i2c.c index 6d1bcdc0c0..0a1311d7e6 100644 --- a/bsp/apollo2/board/i2c.c +++ b/bsp/apollo2/board/i2c.c @@ -1,21 +1,7 @@ /* - * File :_i2c.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -133,7 +119,7 @@ static const struct rt_i2c_bus_device_ops am_i2c_ops = }; #ifdef RT_USING_I2C0 -static struct am_i2c_bus am_i2c_bus_0 = +static struct am_i2c_bus am_i2c_bus_0 = { {0}, AM_I2C0_IOM_INST @@ -141,7 +127,7 @@ static struct am_i2c_bus am_i2c_bus_0 = #endif #ifdef RT_USING_I2C1 -static struct am_i2c_bus am_i2c_bus_1 = +static struct am_i2c_bus am_i2c_bus_1 = { {1}, AM_I2C1_IOM_INST @@ -149,7 +135,7 @@ static struct am_i2c_bus am_i2c_bus_1 = #endif #ifdef RT_USING_I2C2 -static struct am_i2c_bus am_i2c_bus_2 = +static struct am_i2c_bus am_i2c_bus_2 = { {2}, AM_I2C2_IOM_INST @@ -157,7 +143,7 @@ static struct am_i2c_bus am_i2c_bus_2 = #endif #ifdef RT_USING_I2C3 -static struct am_i2c_bus am_i2c_bus_3 = +static struct am_i2c_bus am_i2c_bus_3 = { {3}, AM_I2C3_IOM_INST @@ -165,7 +151,7 @@ static struct am_i2c_bus am_i2c_bus_3 = #endif #ifdef RT_USING_I2C4 -static struct am_i2c_bus am_i2c_bus_4 = +static struct am_i2c_bus am_i2c_bus_4 = { {4}, AM_I2C4_IOM_INST diff --git a/bsp/apollo2/board/i2c.h b/bsp/apollo2/board/i2c.h index 004d5eb3c1..b0a24b51cd 100644 --- a/bsp/apollo2/board/i2c.h +++ b/bsp/apollo2/board/i2c.h @@ -1,21 +1,7 @@ /* - * File : i2c.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/led.c b/bsp/apollo2/board/led.c index d8eb2fb753..5364667679 100644 --- a/bsp/apollo2/board/led.c +++ b/bsp/apollo2/board/led.c @@ -1,21 +1,7 @@ /* - * File :_led.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/led.h b/bsp/apollo2/board/led.h index c6f6bd8728..76832e32b9 100644 --- a/bsp/apollo2/board/led.h +++ b/bsp/apollo2/board/led.h @@ -1,21 +1,7 @@ /* - * File : led.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/pdm.c b/bsp/apollo2/board/pdm.c index 3eb46f7411..f1b719c6d1 100644 --- a/bsp/apollo2/board/pdm.c +++ b/bsp/apollo2/board/pdm.c @@ -1,21 +1,7 @@ /* - * File :_pdm.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -66,7 +52,7 @@ rt_uint8_t am_pdm_data_get(rt_uint8_t *buff, rt_uint16_t size) { rt_uint8_t pdm_rbufftemp[340]; - /* wait pdm message forever */ + /* wait pdm message forever */ rt_mq_recv(&pdm_mq, pdm_rbufftemp, 340, RT_WAITING_FOREVER); /* copy the data */ diff --git a/bsp/apollo2/board/pdm.h b/bsp/apollo2/board/pdm.h index 43ed075da8..2975c8aad1 100644 --- a/bsp/apollo2/board/pdm.h +++ b/bsp/apollo2/board/pdm.h @@ -1,21 +1,7 @@ /* - * File : pdm.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/pwm.c b/bsp/apollo2/board/pwm.c index 7591291eac..8b23a8c290 100644 --- a/bsp/apollo2/board/pwm.c +++ b/bsp/apollo2/board/pwm.c @@ -1,21 +1,7 @@ /* - * File :_pwm.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/pwm.h b/bsp/apollo2/board/pwm.h index 53a6571264..973848c6f6 100644 --- a/bsp/apollo2/board/pwm.h +++ b/bsp/apollo2/board/pwm.h @@ -1,21 +1,7 @@ /* - * File : pwm.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/rtc.c b/bsp/apollo2/board/rtc.c index dbae7cf3c1..5c8fbb13fe 100644 --- a/bsp/apollo2/board/rtc.c +++ b/bsp/apollo2/board/rtc.c @@ -1,21 +1,7 @@ /* - * File :_rtc.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -116,7 +102,7 @@ int rt_hw_rtc_init(void) /* Select LFRC for RTC clock source */ am_hal_rtc_osc_select(AM_HAL_RTC_OSC_LFRC); #endif - + #if RTC_CLK_SRC == XT /* Enable the XT for the RTC */ am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_XT); @@ -129,12 +115,12 @@ int rt_hw_rtc_init(void) am_hal_rtc_osc_enable(); /* register rtc device */ - rtc.type = RT_Device_Class_RTC; - rtc.init = RT_NULL; - rtc.open = rt_rtc_open; - rtc.close = RT_NULL; - rtc.read = rt_rtc_read; - rtc.write = RT_NULL; + rtc.type = RT_Device_Class_RTC; + rtc.init = RT_NULL; + rtc.open = rt_rtc_open; + rtc.close = RT_NULL; + rtc.read = rt_rtc_read; + rtc.write = RT_NULL; rtc.control = rt_rtc_control; /* no private */ diff --git a/bsp/apollo2/board/rtc.h b/bsp/apollo2/board/rtc.h index 83087bc47e..a4a7fbd5e7 100644 --- a/bsp/apollo2/board/rtc.h +++ b/bsp/apollo2/board/rtc.h @@ -1,27 +1,13 @@ /* - * File : rtc.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2017-09-14 Haley the first version */ - + #ifndef __RTC_H #define __RTC_H diff --git a/bsp/apollo2/board/smbus.c b/bsp/apollo2/board/smbus.c index ae41f9fac6..7437b68ffa 100644 --- a/bsp/apollo2/board/smbus.c +++ b/bsp/apollo2/board/smbus.c @@ -1,21 +1,7 @@ /* - * File : smbus.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -42,8 +28,8 @@ #define mSDA_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_SDA, AM_HAL_GPIO_OUTPUT) /* Set SDA as Output */ #define mSCL_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_SCL, AM_HAL_GPIO_OUTPUT) /* Set SCL as Output */ -#define ACK 0 -#define NACK 1 +#define ACK 0 +#define NACK 1 /* SCL keep time */ static void keep_delay(void) @@ -60,7 +46,7 @@ static void few_delay(void) } static rt_uint8_t am_smbus_send_bit(rt_uint8_t send_bit) -{ +{ mSDA_OUT(); few_delay(); @@ -128,7 +114,7 @@ static void am_smbus_stop_bit(void) static rt_uint8_t am_smbus_tx_byte(rt_uint8_t tx_byte) { - int i; + int i; rt_uint8_t ack_bit; rt_uint8_t bit_out; @@ -176,7 +162,7 @@ rt_uint8_t am_smbus_tx_then_tx(rt_uint8_t SlaveAddress, rt_uint8_t command, rt_u int i; am_smbus_start_bit(); /* Start condition */ - + if(am_smbus_tx_byte(SlaveAddress)) /* Send SlaveAddress and write */ return 1; diff --git a/bsp/apollo2/board/smbus.h b/bsp/apollo2/board/smbus.h index 6f518b8f9e..62f8afc1b9 100644 --- a/bsp/apollo2/board/smbus.h +++ b/bsp/apollo2/board/smbus.h @@ -1,21 +1,7 @@ /* - * File : smbus.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/spi.c b/bsp/apollo2/board/spi.c index 783f359af0..f59610975f 100644 --- a/bsp/apollo2/board/spi.c +++ b/bsp/apollo2/board/spi.c @@ -1,21 +1,7 @@ /* - * File : spi.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -180,7 +166,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes am_hal_gpio_out_bit_clear(am_spi_cs->chip_select); } - // 读数据 + // 璇绘暟鎹 if (recv_ptr != RT_NULL) { while (u32BytesRemaining) @@ -213,7 +199,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes } } - // 写数据 + // 鍐欐暟鎹 else { while (u32BytesRemaining) @@ -225,7 +211,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes u32TransferSize = 64; am_hal_iom_spi_write(am_spi_bus->u32Module, am_spi_cs->chip_select, (uint32_t *)send_ptr, u32TransferSize, AM_HAL_IOM_RAW); - + } else { @@ -257,7 +243,7 @@ static const struct rt_spi_ops am_spi_ops = }; #ifdef RT_USING_SPI0 -static struct am_spi_bus am_spi_bus_0 = +static struct am_spi_bus am_spi_bus_0 = { {0}, AM_SPI0_IOM_INST diff --git a/bsp/apollo2/board/spi.h b/bsp/apollo2/board/spi.h index d88bb587e9..4c23f54621 100644 --- a/bsp/apollo2/board/spi.h +++ b/bsp/apollo2/board/spi.h @@ -1,21 +1,7 @@ /* - * File : spi.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -27,7 +13,7 @@ #include -/* 片选信号结构声明 */ +/* 鐗囬変俊鍙风粨鏋勫0鏄 */ struct am_spi_cs { rt_uint32_t chip_select; diff --git a/bsp/apollo2/board/uart.c b/bsp/apollo2/board/uart.c index fc3884bf2d..ec97599b80 100644 --- a/bsp/apollo2/board/uart.c +++ b/bsp/apollo2/board/uart.c @@ -1,21 +1,7 @@ /* - * File : uart.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -164,11 +150,11 @@ static rt_err_t am_configure(struct rt_serial_device *serial, struct serial_conf else if (cfg->stop_bits == STOP_BITS_2) uart_cfg.bTwoStopBits = true; - if (cfg->parity == PARITY_NONE) + if (cfg->parity == PARITY_NONE) uart_cfg.ui32Parity = AM_HAL_UART_PARITY_NONE; - else if (cfg->parity == PARITY_ODD) + else if (cfg->parity == PARITY_ODD) uart_cfg.ui32Parity = AM_HAL_UART_PARITY_ODD; - else if (cfg->parity == PARITY_EVEN) + else if (cfg->parity == PARITY_EVEN) uart_cfg.ui32Parity = AM_HAL_UART_PARITY_EVEN; uart_cfg.ui32FlowCtrl = AM_HAL_UART_FLOW_CTRL_NONE; diff --git a/bsp/apollo2/board/uart.h b/bsp/apollo2/board/uart.h index 8e92068d5d..d858d68b21 100644 --- a/bsp/apollo2/board/uart.h +++ b/bsp/apollo2/board/uart.h @@ -1,21 +1,7 @@ /* - * File : uart.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig b/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig index decdf156d7..2bdce74a2d 100644 --- a/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig +++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig @@ -176,6 +176,10 @@ menu "On-chip Peripheral Drivers" config RTC_USING_INTERNAL_CLK bool "Using internal clock RTC" default y + config RTC_USING_1S_INT + bool "Using 1 second interrupt" + depends on RT_USING_ALARM + default n endif menuconfig BSP_USING_ADC diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c b/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c index 4f462e9040..4749ba51ef 100644 --- a/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c +++ b/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c @@ -7,6 +7,7 @@ * Date Author Notes * 2021-01-28 greedyhao first version * 2021-03-19 iysheng modify just set time first power up + * 2021-03-26 iysheng add alarm and 1s interrupt support */ #include "board.h" @@ -134,15 +135,22 @@ void hal_rtc_init(void) irtc_time_write(RTCCNT_CMD, sec); } +#ifdef RT_USING_ALARM + RTCCON |= RTC_CON_ALM_INTERRUPT; +#ifdef RTC_USING_1S_INT + RTCCON |= RTC_CON_1S_INTERRUPT; +#endif +#endif } /************** HAL End *******************/ -static time_t get_rtc_timestamp(void) +static time_t get_rtc_time_stamp(void) { time_t sec = 0; sec = irtc_time_read(RTCCNT_CMD); LOG_D("get rtc time."); + return sec; } @@ -153,6 +161,22 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp) return RT_EOK; } +static rt_err_t set_rtc_alarm_stamp(time_t alarm_stamp) +{ + irtc_time_write(RTCALM_CMD, alarm_stamp); + + return RT_EOK; +} + +static time_t get_rtc_alarm_stamp(void) +{ + time_t sec = 0; + + sec = irtc_time_read(RTCALM_CMD); + + return sec; +} + static void rt_rtc_init(void) { hal_rtc_init(); @@ -165,8 +189,8 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args) switch (cmd) { case RT_DEVICE_CTRL_RTC_GET_TIME: - *(rt_uint32_t *)args = get_rtc_timestamp(); - LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args); + *(rt_uint32_t *)args = get_rtc_time_stamp(); + LOG_D("RTC: get rtc_time %x", *(rt_uint32_t *)args); break; case RT_DEVICE_CTRL_RTC_SET_TIME: @@ -174,7 +198,18 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args) { result = -RT_ERROR; } - LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args); + LOG_D("RTC: set rtc_time %x", *(rt_uint32_t *)args); + break; + case RT_DEVICE_CTRL_RTC_SET_ALARM: + if (set_rtc_alarm_stamp(*(rt_uint32_t *)args)) + { + result = -RT_ERROR; + } + LOG_D("RTC: set alarm_stamp %x", *(rt_uint32_t *)args); + break; + case RT_DEVICE_CTRL_RTC_GET_ALARM: + *(rt_uint32_t *)args = get_rtc_alarm_stamp(); + LOG_D("RTC: get alarm_stamp %x", *(rt_uint32_t *)args); break; } @@ -217,15 +252,41 @@ static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint return rt_device_register(device, name, flag); } +#ifdef RT_USING_ALARM +static void rtc_isr(int vector, void *param) +{ + rt_interrupt_enter(); + + if (RTCCON & RTC_CON_ALM_PEND) + { + RTCCPND |= RTC_CPND_ALM; + } + +#ifdef RTC_USING_1S_INT + if (RTCCON & RTC_CON_1S_PEND) + { + RTCCPND |= RTC_CPND_1S; + } +#endif + + rt_interrupt_leave(); +} +#endif + int rt_hw_rtc_init(void) { rt_err_t result; + result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR); if (result != RT_EOK) { LOG_E("rtc register err code: %d", result); return result; } + +#ifdef RT_USING_ALARM + rt_hw_interrupt_install(IRQ_RTC_VECTOR, rtc_isr, RT_NULL, "rtc_isr"); +#endif LOG_D("rtc init success"); return RT_EOK; } diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rtc.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rtc.h index 483f3e3f42..6961d8da90 100644 --- a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rtc.h +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rtc.h @@ -32,6 +32,10 @@ enum #define RTC_CON_BAUD_SELECT (0x3u << 1) /*!< Increase clock selection */ #define RTC_CON_CHIP_SELECT (0x1u << 0) /*!< RTC chip select */ +// RTCCPND +#define RTC_CPND_1S (0x1u << 18) /*!< Clear RTC 1S pending */ +#define RTC_CPND_ALM (0x1u << 17) /*!< Clear RTC alarm pendind */ + // RTCCON0 #define RTC_CON0_PWRUP_FIRST (0x01u << 7) /*!< RTC first power up flag */ #define RTC_CON0_INTERNAL_32K (0x01u << 6) /*!< Internal 32K select */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM0x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM0x_math.uvopt deleted file mode 100644 index 5514cddd39..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM0x_math.uvopt +++ /dev/null @@ -1,4197 +0,0 @@ - - - - 1.0 - -
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM0x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM0x_math.uvproj deleted file mode 100644 index d2ce9bebcc..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM0x_math.uvproj +++ /dev/null @@ -1,6855 +0,0 @@ - - - - 1.1 - -
### uVision Project, (C) Keil Software
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM3x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM3x_math.uvopt deleted file mode 100644 index 55ead361f4..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM3x_math.uvopt +++ /dev/null @@ -1,4197 +0,0 @@ - - - - 1.0 - -
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### uVision Project, (C) Keil Software
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM4x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM4x_math.uvopt deleted file mode 100644 index 60cf3438c6..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM4x_math.uvopt +++ /dev/null @@ -1,4717 +0,0 @@ - - - - 1.0 - -
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM4x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM4x_math.uvproj deleted file mode 100644 index f64df8febf..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM4x_math.uvproj +++ /dev/null @@ -1,13699 +0,0 @@ - - - - 1.1 - -
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1 - ..\FilteringFunctions\arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ..\FilteringFunctions\arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ..\FilteringFunctions\arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ..\FilteringFunctions\arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ..\FilteringFunctions\arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ..\FilteringFunctions\arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ..\FilteringFunctions\arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ..\FilteringFunctions\arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ..\FilteringFunctions\arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ..\FilteringFunctions\arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ..\FilteringFunctions\arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ..\FilteringFunctions\arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ..\FilteringFunctions\arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ..\FilteringFunctions\arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ..\FilteringFunctions\arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ..\FilteringFunctions\arm_lms_q15.c - - - arm_lms_q31.c - 1 - ..\FilteringFunctions\arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ..\MatrixFunctions\arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ..\MatrixFunctions\arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ..\MatrixFunctions\arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ..\MatrixFunctions\arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ..\MatrixFunctions\arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ..\MatrixFunctions\arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ..\MatrixFunctions\arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ..\MatrixFunctions\arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ..\MatrixFunctions\arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ..\MatrixFunctions\arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ..\MatrixFunctions\arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ..\MatrixFunctions\arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ..\MatrixFunctions\arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ..\MatrixFunctions\arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ..\MatrixFunctions\arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ..\MatrixFunctions\arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ..\MatrixFunctions\arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ..\MatrixFunctions\arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ..\MatrixFunctions\arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ..\MatrixFunctions\arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ..\MatrixFunctions\arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ..\TransformFunctions\arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ..\TransformFunctions\arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ..\TransformFunctions\arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ..\TransformFunctions\arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ..\TransformFunctions\arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ..\TransformFunctions\arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ..\TransformFunctions\arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ..\TransformFunctions\arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ..\TransformFunctions\arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ..\TransformFunctions\arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ..\TransformFunctions\arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ..\TransformFunctions\arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ..\TransformFunctions\arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ..\TransformFunctions\arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ..\TransformFunctions\arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ..\TransformFunctions\arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ..\TransformFunctions\arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ..\TransformFunctions\arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ..\TransformFunctions\arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ..\TransformFunctions\arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ..\TransformFunctions\arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ..\TransformFunctions\arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ..\TransformFunctions\arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ..\TransformFunctions\arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ..\TransformFunctions\arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ..\ControllerFunctions\arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ..\ControllerFunctions\arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ..\ControllerFunctions\arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ..\ControllerFunctions\arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ..\ControllerFunctions\arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ..\ControllerFunctions\arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ..\ControllerFunctions\arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ..\ControllerFunctions\arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ..\StatisticsFunctions\arm_max_f32.c - - - arm_max_q7.c - 1 - ..\StatisticsFunctions\arm_max_q7.c - - - arm_max_q15.c - 1 - ..\StatisticsFunctions\arm_max_q15.c - - - arm_max_q31.c - 1 - ..\StatisticsFunctions\arm_max_q31.c - - - arm_mean_f32.c - 1 - ..\StatisticsFunctions\arm_mean_f32.c - - - arm_mean_q7.c - 1 - ..\StatisticsFunctions\arm_mean_q7.c - - - arm_mean_q15.c - 1 - ..\StatisticsFunctions\arm_mean_q15.c - - - arm_mean_q31.c - 1 - ..\StatisticsFunctions\arm_mean_q31.c - - - arm_min_f32.c - 1 - ..\StatisticsFunctions\arm_min_f32.c - - - arm_min_q7.c - 1 - ..\StatisticsFunctions\arm_min_q7.c - - - arm_min_q15.c - 1 - ..\StatisticsFunctions\arm_min_q15.c - - - arm_min_q31.c - 1 - ..\StatisticsFunctions\arm_min_q31.c - - - arm_power_f32.c - 1 - ..\StatisticsFunctions\arm_power_f32.c - - - arm_power_q7.c - 1 - ..\StatisticsFunctions\arm_power_q7.c - - - arm_power_q15.c - 1 - ..\StatisticsFunctions\arm_power_q15.c - - - arm_power_q31.c - 1 - ..\StatisticsFunctions\arm_power_q31.c - - - arm_rms_f32.c - 1 - ..\StatisticsFunctions\arm_rms_f32.c - - - arm_rms_q15.c - 1 - ..\StatisticsFunctions\arm_rms_q15.c - - - arm_rms_q31.c - 1 - ..\StatisticsFunctions\arm_rms_q31.c - - - arm_std_f32.c - 1 - ..\StatisticsFunctions\arm_std_f32.c - - - arm_std_q15.c - 1 - ..\StatisticsFunctions\arm_std_q15.c - - - arm_std_q31.c - 1 - ..\StatisticsFunctions\arm_std_q31.c - - - arm_var_f32.c - 1 - ..\StatisticsFunctions\arm_var_f32.c - - - arm_var_q15.c - 1 - ..\StatisticsFunctions\arm_var_q15.c - - - arm_var_q31.c - 1 - ..\StatisticsFunctions\arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ..\SupportFunctions\arm_copy_f32.c - - - arm_copy_q7.c - 1 - ..\SupportFunctions\arm_copy_q7.c - - - arm_copy_q15.c - 1 - ..\SupportFunctions\arm_copy_q15.c - - - arm_copy_q31.c - 1 - ..\SupportFunctions\arm_copy_q31.c - - - arm_fill_f32.c - 1 - ..\SupportFunctions\arm_fill_f32.c - - - arm_fill_q7.c - 1 - ..\SupportFunctions\arm_fill_q7.c - - - arm_fill_q15.c - 1 - ..\SupportFunctions\arm_fill_q15.c - - - arm_fill_q31.c - 1 - ..\SupportFunctions\arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ..\SupportFunctions\arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ..\SupportFunctions\arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ..\SupportFunctions\arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ..\SupportFunctions\arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ..\SupportFunctions\arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ..\SupportFunctions\arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ..\SupportFunctions\arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ..\SupportFunctions\arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ..\SupportFunctions\arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ..\SupportFunctions\arm_q31_to_float.c - - - arm_q31_to_q7.c - 1 - ..\SupportFunctions\arm_q31_to_q7.c - - - arm_q31_to_q15.c - 1 - ..\SupportFunctions\arm_q31_to_q15.c - - - - - CommonTables - - - arm_common_tables.c - 1 - ..\CommonTables\arm_common_tables.c - - - - - - - -
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexMx_math_Build.bat b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexMx_math_Build.bat deleted file mode 100644 index 69cf1aa0e8..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexMx_math_Build.bat +++ /dev/null @@ -1,29 +0,0 @@ - -SET TMP=C:\Temp -SET TEMP=C:\Temp - -SET UVEXE=C:\Keil\UV4\UV4.EXE - -@echo Building DSP Library for Cortex-M0 Little Endian -%UVEXE% -rb arm_cortexM0x_math.uvproj -t"DSP_Lib CM0 LE" -o"DSP_Lib CM0 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M0 Big Endian -%UVEXE% -rb arm_cortexM0x_math.uvproj -t"DSP_Lib CM0 BE" -o"DSP_Lib CM0 BE.txt" -j0 - -@echo Building DSP Library for Cortex-M3 Little Endian -%UVEXE% -rb arm_cortexM3x_math.uvproj -t"DSP_Lib CM3 LE" -o"DSP_Lib CM3 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M3 Big Endian -%UVEXE% -rb arm_cortexM3x_math.uvproj -t"DSP_Lib CM3 BE" -o"DSP_Lib CM3 BE.txt" -j0 - -@echo Building DSP Library for Cortex-M4 Little Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE" -o"DSP_Lib CM4 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M4 Big Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 BE" -o"DSP_Lib CM4 BE.txt" -j0 - -@echo Building DSP Library for Cortex-M4 with FPU Little Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE FPU" -o"DSP_Lib CM4 LE FPU.txt" -j0 - -@echo Building DSP Library for Cortex-M4 with FPU Big Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 BE FPU" -o"DSP_Lib CM4 BE FPU.txt" -j0 \ No newline at end of file diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c deleted file mode 100644 index 3c9d360c66..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c +++ /dev/null @@ -1,159 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_abs_f32.c -* -* Description: Vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" -#include - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicAbs Vector Absolute Value - * - * Computes the absolute value of a vector on an element-by-element basis. - * - *
        
- *     pDst[n] = abs(pSrcA[n]),   0 <= n < blockSize.        
- * 
- * - * The operation can be done in-place by setting the input and output pointers to the same buffer. - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - -/** - * @brief Floating-point vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_abs_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; /* temporary variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute and then store the results in the destination buffer. */ - /* read sample from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - - /* find absolute value */ - in1 = fabsf(in1); - - /* read sample from source */ - in4 = *(pSrc + 3); - - /* find absolute value */ - in2 = fabsf(in2); - - /* read sample from source */ - *pDst = in1; - - /* find absolute value */ - in3 = fabsf(in3); - - /* find absolute value */ - in4 = fabsf(in4); - - /* store result to destination */ - *(pDst + 1) = in2; - - /* store result to destination */ - *(pDst + 2) = in3; - - /* store result to destination */ - *(pDst + 3) = in4; - - - /* Update source pointer to process next sampels */ - pSrc += 4u; - - /* Update destination pointer to process next sampels */ - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute and then store the results in the destination buffer. */ - *pDst++ = fabsf(*pSrc++); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicAbs group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c deleted file mode 100644 index 6b6fdf4ef4..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c +++ /dev/null @@ -1,173 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_abs_q15.c -* -* Description: Q15 vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - -/** - * @brief Q15 vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF. - */ - -void arm_abs_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q15_t in1; /* Input value1 */ - q15_t in2; /* Input value2 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read two inputs */ - in1 = *pSrc++; - in2 = *pSrc++; - - - /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = - __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)), - ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16); - -#else - - - *__SIMD32(pDst)++ = - __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)), - ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = *pSrc++; - in2 = *pSrc++; - - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = - __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)), - ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16); - -#else - - - *__SIMD32(pDst)++ = - __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)), - ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read the input */ - in1 = *pSrc++; - - /* Calculate absolute value of input and then store the result in the destination buffer. */ - *pDst++ = (in1 > 0) ? in1 : __QSUB16(0, in1); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - q15_t in; /* Temporary input variable */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read the input */ - in = *pSrc++; - - /* Calculate absolute value of input and then store the result in the destination buffer. */ - *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of BasicAbs group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c deleted file mode 100644 index 5c3d56f749..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c +++ /dev/null @@ -1,125 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_abs_q31.c -* -* Description: Q31 vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - - -/** - * @brief Q31 vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF. - */ - -void arm_abs_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q31_t in; /* Input value */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - *pDst++ = (in1 > 0) ? in1 : __QSUB(0, in1); - *pDst++ = (in2 > 0) ? in2 : __QSUB(0, in2); - *pDst++ = (in3 > 0) ? in3 : __QSUB(0, in3); - *pDst++ = (in4 > 0) ? in4 : __QSUB(0, in4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */ - in = *pSrc++; - *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in); - - /* Decrement the loop counter */ - blkCnt--; - } - -} - -/** - * @} end of BasicAbs group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c deleted file mode 100644 index 0ae0a2f5b3..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c +++ /dev/null @@ -1,152 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_abs_q7.c -* -* Description: Q7 vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - -/** - * @brief Q7 vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - * - * \par Conditions for optimum performance - * Input and output buffers should be aligned by 32-bit - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F. - */ - -void arm_abs_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q7_t in; /* Input value1 */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; /* temporary input variables */ - q31_t out1, out2, out3, out4; /* temporary output variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read inputs */ - in1 = (q31_t) * pSrc; - in2 = (q31_t) * (pSrc + 1); - in3 = (q31_t) * (pSrc + 2); - - /* find absolute value */ - out1 = (in1 > 0) ? in1 : __QSUB8(0, in1); - - /* read input */ - in4 = (q31_t) * (pSrc + 3); - - /* find absolute value */ - out2 = (in2 > 0) ? in2 : __QSUB8(0, in2); - - /* store result to destination */ - *pDst = (q7_t) out1; - - /* find absolute value */ - out3 = (in3 > 0) ? in3 : __QSUB8(0, in3); - - /* find absolute value */ - out4 = (in4 > 0) ? in4 : __QSUB8(0, in4); - - /* store result to destination */ - *(pDst + 1) = (q7_t) out2; - - /* store result to destination */ - *(pDst + 2) = (q7_t) out3; - - /* store result to destination */ - *(pDst + 3) = (q7_t) out4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; -#else - - /* Run the below code for Cortex-M0 */ - blkCnt = blockSize; - -#endif // #define ARM_MATH_CM0 - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read the input */ - in = *pSrc++; - - /* Store the Absolute result in the destination buffer */ - *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicAbs group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c deleted file mode 100644 index 29425373f2..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c +++ /dev/null @@ -1,145 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_add_f32.c -* -* Description: Floating-point vector addition. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicAdd Vector Addition - * - * Element-by-element addition of two vectors. - * - *
        
- *     pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.        
- * 
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - -/** - * @brief Floating-point vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_add_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */ - float32_t inB1, inB2, inB3, inB4; /* temporary input variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - - /* read four inputs from sourceA and four inputs from sourceB */ - inA1 = *pSrcA; - inB1 = *pSrcB; - inA2 = *(pSrcA + 1); - inB2 = *(pSrcB + 1); - inA3 = *(pSrcA + 2); - inB3 = *(pSrcB + 2); - inA4 = *(pSrcA + 3); - inB4 = *(pSrcB + 3); - - /* C = A + B */ - /* add and store result to destination */ - *pDst = inA1 + inB1; - *(pDst + 1) = inA2 + inB2; - *(pDst + 2) = inA3 + inB3; - *(pDst + 3) = inA4 + inB4; - - /* update pointers to process next samples */ - pSrcA += 4u; - pSrcB += 4u; - pDst += 4u; - - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (*pSrcA++) + (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicAdd group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c deleted file mode 100644 index 6de4a03368..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_add_q15.c -* -* Description: Q15 vector addition -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - -/** - * @brief Q15 vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_add_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inB1, inB2; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - inA1 = *__SIMD32(pSrcA)++; - inA2 = *__SIMD32(pSrcA)++; - inB1 = *__SIMD32(pSrcB)++; - inB2 = *__SIMD32(pSrcB)++; - - *__SIMD32(pDst)++ = __QADD16(inA1, inB1); - *__SIMD32(pDst)++ = __QADD16(inA2, inB2); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - -} - -/** - * @} end of BasicAdd group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c deleted file mode 100644 index 576efe6c74..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c +++ /dev/null @@ -1,143 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_add_q31.c -* -* Description: Q31 vector addition. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - - -/** - * @brief Q31 vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_add_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; - q31_t inB1, inB2, inB3, inB4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - *pDst++ = __QADD(inA1, inB1); - *pDst++ = __QADD(inA2, inB2); - *pDst++ = __QADD(inA3, inB3); - *pDst++ = __QADD(inA4, inB4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = __QADD(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of BasicAdd group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c deleted file mode 100644 index 6f75e1d42f..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_add_q7.c -* -* Description: Q7 vector addition. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - -/** - * @brief Q7 vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - */ - -void arm_add_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - -} - -/** - * @} end of BasicAdd group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c deleted file mode 100644 index 933b001703..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c +++ /dev/null @@ -1,125 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_f32.c -* -* Description: Floating-point dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup dot_prod Vector Dot Product - * - * Computes the dot product of two vectors. - * The vectors are multiplied element-by-element and then summed. - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of floating-point vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - */ - - -void arm_dot_prod_f32( - float32_t * pSrcA, - float32_t * pSrcB, - uint32_t blockSize, - float32_t * result) -{ - float32_t sum = 0.0f; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer */ - sum += (*pSrcA++) * (*pSrcB++); - sum += (*pSrcA++) * (*pSrcB++); - sum += (*pSrcA++) * (*pSrcB++); - sum += (*pSrcA++) * (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - sum += (*pSrcA++) * (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - /* Store the result back in the destination buffer */ - *result = sum; -} - -/** - * @} end of dot_prod group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c deleted file mode 100644 index 865e4c4331..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_q15.c -* -* Description: Q15 dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of Q15 vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these - * results are added to a 64-bit accumulator in 34.30 format. - * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator - * there is no risk of overflow. - * The return result is in 34.30 format. - */ - -void arm_dot_prod_q15( - q15_t * pSrcA, - q15_t * pSrcB, - uint32_t blockSize, - q63_t * result) -{ - q63_t sum = 0; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum); - sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the results in a temporary buffer. */ - sum = __SMLALD(*pSrcA++, *pSrcB++, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the results in a temporary buffer. */ - sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - /* Store the result in the destination buffer in 34.30 format */ - *result = sum; - -} - -/** - * @} end of dot_prod group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c deleted file mode 100644 index 1f98e41d6c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c +++ /dev/null @@ -1,138 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_q31.c -* -* Description: Q31 dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of Q31 vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these - * are truncated to 2.48 format by discarding the lower 14 bits. - * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. - * There are 15 guard bits in the accumulator and there is no risk of overflow as long as - * the length of the vectors is less than 2^16 elements. - * The return result is in 16.48 format. - */ - -void arm_dot_prod_q31( - q31_t * pSrcA, - q31_t * pSrcB, - uint32_t blockSize, - q63_t * result) -{ - q63_t sum = 0; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; - q31_t inB1, inB2, inB3, inB4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - sum += ((q63_t) inA1 * inB1) >> 14u; - sum += ((q63_t) inA2 * inB2) >> 14u; - sum += ((q63_t) inA3 * inB3) >> 14u; - sum += ((q63_t) inA4 * inB4) >> 14u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the result in the destination buffer in 16.48 format */ - *result = sum; -} - -/** - * @} end of dot_prod group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c deleted file mode 100644 index 9cf0bf4034..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c +++ /dev/null @@ -1,154 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_q7.c -* -* Description: Q7 dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of Q7 vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these - * results are added to an accumulator in 18.14 format. - * Nonsaturating additions are used and there is no danger of wrap around as long as - * the vectors are less than 2^18 elements long. - * The return result is in 18.14 format. - */ - -void arm_dot_prod_q7( - q7_t * pSrcA, - q7_t * pSrcB, - uint32_t blockSize, - q31_t * result) -{ - uint32_t blkCnt; /* loop counter */ - - q31_t sum = 0; /* Temporary variables to store output */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t input1, input2; /* Temporary variables to store input */ - q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */ - - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read 4 samples at a time from sourceA */ - input1 = *__SIMD32(pSrcA)++; - /* read 4 samples at a time from sourceB */ - input2 = *__SIMD32(pSrcB)++; - - /* extract two q7_t samples to q15_t samples */ - inA1 = __SXTB16(__ROR(input1, 8)); - /* extract reminaing two samples */ - inA2 = __SXTB16(input1); - /* extract two q7_t samples to q15_t samples */ - inB1 = __SXTB16(__ROR(input2, 8)); - /* extract reminaing two samples */ - inB2 = __SXTB16(input2); - - /* multiply and accumulate two samples at a time */ - sum = __SMLAD(inA1, inB1, sum); - sum = __SMLAD(inA2, inB2, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Dot product and then store the results in a temporary buffer. */ - sum = __SMLAD(*pSrcA++, *pSrcB++, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Dot product and then store the results in a temporary buffer. */ - sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - - /* Store the result in the destination buffer in 18.14 format */ - *result = sum; -} - -/** - * @} end of dot_prod group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c deleted file mode 100644 index 682931eacd..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c +++ /dev/null @@ -1,172 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mult_f32.c -* -* Description: Floating-point vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicMult Vector Multiplication - * - * Element-by-element multiplication of two vectors. - * - *
        
- *     pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.        
- * 
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicMult - * @{ - */ - -/** - * @brief Floating-point vector multiplication. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_mult_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t inA1, inA2, inA3, inA4; /* temporary input variables */ - float32_t inB1, inB2, inB3, inB4; /* temporary input variables */ - float32_t out1, out2, out3, out4; /* temporary output variables */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the results in output buffer */ - /* read sample from sourceA */ - inA1 = *pSrcA; - /* read sample from sourceB */ - inB1 = *pSrcB; - /* read sample from sourceA */ - inA2 = *(pSrcA + 1); - /* read sample from sourceB */ - inB2 = *(pSrcB + 1); - - /* out = sourceA * sourceB */ - out1 = inA1 * inB1; - - /* read sample from sourceA */ - inA3 = *(pSrcA + 2); - /* read sample from sourceB */ - inB3 = *(pSrcB + 2); - - /* out = sourceA * sourceB */ - out2 = inA2 * inB2; - - /* read sample from sourceA */ - inA4 = *(pSrcA + 3); - - /* store result to destination buffer */ - *pDst = out1; - - /* read sample from sourceB */ - inB4 = *(pSrcB + 3); - - /* out = sourceA * sourceB */ - out3 = inA3 * inB3; - - /* store result to destination buffer */ - *(pDst + 1) = out2; - - /* out = sourceA * sourceB */ - out4 = inA4 * inB4; - /* store result to destination buffer */ - *(pDst + 2) = out3; - /* store result to destination buffer */ - *(pDst + 3) = out4; - - - /* update pointers to process next samples */ - pSrcA += 4u; - pSrcB += 4u; - pDst += 4u; - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the results in output buffer */ - *pDst++ = (*pSrcA++) * (*pSrcB++); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c deleted file mode 100644 index 00a522d97a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c +++ /dev/null @@ -1,152 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mult_q15.c -* -* Description: Q15 vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicMult - * @{ - */ - - -/** - * @brief Q15 vector multiplication - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_mult_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inB1, inB2; /* temporary input variables */ - q15_t out1, out2, out3, out4; /* temporary output variables */ - q31_t mul1, mul2, mul3, mul4; /* temporary variables */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read two samples at a time from sourceA */ - inA1 = *__SIMD32(pSrcA)++; - /* read two samples at a time from sourceB */ - inB1 = *__SIMD32(pSrcB)++; - /* read two samples at a time from sourceA */ - inA2 = *__SIMD32(pSrcA)++; - /* read two samples at a time from sourceB */ - inB2 = *__SIMD32(pSrcB)++; - - /* multiply mul = sourceA * sourceB */ - mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); - mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1); - mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16)); - mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2); - - /* saturate result to 16 bit */ - out1 = (q15_t) __SSAT(mul1 >> 15, 16); - out2 = (q15_t) __SSAT(mul2 >> 15, 16); - out3 = (q15_t) __SSAT(mul3 >> 15, 16); - out4 = (q15_t) __SSAT(mul4 >> 15, 16); - - /* store the result */ -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); - *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); - *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the result in the destination buffer */ - *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c deleted file mode 100644 index 4697a80626..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c +++ /dev/null @@ -1,143 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mult_q31.c -* -* Description: Q31 vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicMult - * @{ - */ - -/** - * @brief Q31 vector multiplication. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_mult_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; /* temporary input variables */ - q31_t inB1, inB2, inB3, inB4; /* temporary input variables */ - q31_t out1, out2, out3, out4; /* temporary output variables */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and then store the results in the destination buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - out1 = ((q63_t) inA1 * inB1) >> 32; - out2 = ((q63_t) inA2 * inB2) >> 32; - out3 = ((q63_t) inA3 * inB3) >> 32; - out4 = ((q63_t) inA4 * inB4) >> 32; - - out1 = __SSAT(out1, 31); - out2 = __SSAT(out2, 31); - out3 = __SSAT(out3, 31); - out4 = __SSAT(out4, 31); - - *pDst++ = out1 << 1u; - *pDst++ = out2 << 1u; - *pDst++ = out3 << 1u; - *pDst++ = out4 << 1u; - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and then store the results in the destination buffer. */ - *pDst++ = - (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c deleted file mode 100644 index 1e65a77a9c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c +++ /dev/null @@ -1,128 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mult_q7.c -* -* Description: Q7 vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 DP -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicMult - * @{ - */ - -/** - * @brief Q7 vector multiplication - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - */ - -void arm_mult_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q7_t out1, out2, out3, out4; /* Temporary variables to store the product */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the results in temporary variables */ - out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - - /* Store the results of 4 inputs in the destination buffer in single cycle by packing */ - *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the result in the destination buffer */ - *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c deleted file mode 100644 index b0f82896db..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c +++ /dev/null @@ -1,137 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_negate_f32.c -* -* Description: Negates floating-point vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup negate Vector Negate - * - * Negates the elements of a vector. - * - *
        
- *     pDst[n] = -pSrc[n],   0 <= n < blockSize.        
- * 
- */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - */ - -void arm_negate_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; /* temporary variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read inputs from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* negate the input */ - in1 = -in1; - in2 = -in2; - in3 = -in3; - in4 = -in4; - - /* store the result to destination */ - *pDst = in1; - *(pDst + 1) = in2; - *(pDst + 2) = in3; - *(pDst + 3) = in4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the results in the destination buffer. */ - *pDst++ = -*pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c deleted file mode 100644 index c47e03eeff..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c +++ /dev/null @@ -1,137 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_negate_q15.c -* -* Description: Negates Q15 vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * \par Conditions for optimum performance - * Input and output buffers should be aligned by 32-bit - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF. - */ - -void arm_negate_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q15_t in; - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in1, in2; /* Temporary variables */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = -A */ - /* Read two inputs at a time */ - in1 = _SIMD32_OFFSET(pSrc); - in2 = _SIMD32_OFFSET(pSrc + 2); - - /* negate two samples at a time */ - in1 = __QSUB16(0, in1); - - /* negate two samples at a time */ - in2 = __QSUB16(0, in2); - - /* store the result to destination 2 samples at a time */ - _SIMD32_OFFSET(pDst) = in1; - /* store the result to destination 2 samples at a time */ - _SIMD32_OFFSET(pDst + 2) = in2; - - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the result in the destination buffer. */ - in = *pSrc++; - *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c deleted file mode 100644 index 362b54ecbc..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c +++ /dev/null @@ -1,124 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_negate_q31.c -* -* Description: Negates Q31 vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF. - */ - -void arm_negate_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t in; /* Temporary variable */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the results in the destination buffer. */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - *pDst++ = __QSUB(0, in1); - *pDst++ = __QSUB(0, in2); - *pDst++ = __QSUB(0, in3); - *pDst++ = __QSUB(0, in4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the result in the destination buffer. */ - in = *pSrc++; - *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c deleted file mode 100644 index 64914d291e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c +++ /dev/null @@ -1,120 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_negate_q7.c -* -* Description: Negates Q7 vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a Q7 vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F. - */ - -void arm_negate_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q7_t in; - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t input; /* Input values1-4 */ - q31_t zero = 0x00000000; - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = -A */ - /* Read four inputs */ - input = *__SIMD32(pSrc)++; - - /* Store the Negated results in the destination buffer in a single cycle by packing the results */ - *__SIMD32(pDst)++ = __QSUB8(zero, input); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the results in the destination buffer. */ \ - in = *pSrc++; - *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c deleted file mode 100644 index d7ca663bbd..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c +++ /dev/null @@ -1,158 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_offset_f32.c -* -* Description: Floating-point vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup offset Vector Offset - * - * Adds a constant offset to each element of a vector. - * - *
        
- *     pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.        
- * 
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - */ - - -void arm_offset_f32( - float32_t * pSrc, - float32_t offset, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - /* read samples from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - - /* add offset to input */ - in1 = in1 + offset; - - /* read samples from source */ - in3 = *(pSrc + 2); - - /* add offset to input */ - in2 = in2 + offset; - - /* read samples from source */ - in4 = *(pSrc + 3); - - /* add offset to input */ - in3 = in3 + offset; - - /* store result to destination */ - *pDst = in1; - - /* add offset to input */ - in4 = in4 + offset; - - /* store result to destination */ - *(pDst + 1) = in2; - - /* store result to destination */ - *(pDst + 2) = in3; - - /* store result to destination */ - *(pDst + 3) = in4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (*pSrc++) + offset; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of offset group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c deleted file mode 100644 index 0a06f4c9c1..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c +++ /dev/null @@ -1,131 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_offset_q15.c -* -* Description: Q15 vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - */ - -void arm_offset_q15( - q15_t * pSrc, - q15_t offset, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t offset_packed; /* Offset packed to 32 bit */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Offset is packed to 32 bit in order to use SIMD32 for addition */ - offset_packed = __PKHBT(offset, offset, 16); - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer, 2 samples at a time. */ - *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed); - *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __QADD16(*pSrc++, offset); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of offset group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c deleted file mode 100644 index 4c2997ce6d..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_offset_q31.c -* -* Description: Q31 vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. - */ - -void arm_offset_q31( - q31_t * pSrc, - q31_t offset, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - *pDst++ = __QADD(in1, offset); - *pDst++ = __QADD(in2, offset); - *pDst++ = __QADD(in3, offset); - *pDst++ = __QADD(in4, offset); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = __QADD(*pSrc++, offset); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of offset group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c deleted file mode 100644 index e54dba9dab..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_offset_q7.c -* -* Description: Q7 vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a Q7 vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] are saturated. - */ - -void arm_offset_q7( - q7_t * pSrc, - q7_t offset, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t offset_packed; /* Offset packed to 32 bit */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Offset is packed to 32 bit in order to use SIMD32 for addition */ - offset_packed = __PACKq7(offset, offset, offset, offset); - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */ - *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of offset group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c deleted file mode 100644 index 0baf3863fe..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c +++ /dev/null @@ -1,161 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_scale_f32.c -* -* Description: Multiplies a floating-point vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup scale Vector Scale - * - * Multiply a vector by a scalar value. For floating-point data, the algorithm used is: - * - *
        
- *     pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.        
- * 
- * - * In the fixed-point Q7, Q15, and Q31 functions, scale is represented by - * a fractional multiplication scaleFract and an arithmetic shift shift. - * The shift allows the gain of the scaling operation to exceed 1.0. - * The algorithm used with fixed-point data is: - * - *
        
- *     pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.        
- * 
- * - * The overall scale factor applied to the fixed-point data is - *
        
- *     scale = scaleFract * 2^shift.        
- * 
- */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a floating-point vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scale scale factor to be applied - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - */ - - -void arm_scale_f32( - float32_t * pSrc, - float32_t scale, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; /* temporary variabels */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the results in the destination buffer. */ - /* read input samples from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - - /* multiply with scaling factor */ - in1 = in1 * scale; - - /* read input sample from source */ - in3 = *(pSrc + 2); - - /* multiply with scaling factor */ - in2 = in2 * scale; - - /* read input sample from source */ - in4 = *(pSrc + 3); - - /* multiply with scaling factor */ - in3 = in3 * scale; - in4 = in4 * scale; - /* store the result to destination */ - *pDst = in1; - *(pDst + 1) = in2; - *(pDst + 2) = in3; - *(pDst + 3) = in4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (*pSrc++) * scale; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of scale group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c deleted file mode 100644 index 9b35ffec66..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c +++ /dev/null @@ -1,157 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_scale_q15.c -* -* Description: Multiplies a Q15 vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a Q15 vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.15 format. - * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. - */ - - -void arm_scale_q15( - q15_t * pSrc, - q15_t scaleFract, - int8_t shift, - q15_t * pDst, - uint32_t blockSize) -{ - int8_t kShift = 15 - shift; /* shift to apply after scaling */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q15_t in1, in2, in3, in4; - q31_t inA1, inA2; /* Temporary variables */ - q31_t out1, out2, out3, out4; - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Reading 2 inputs from memory */ - inA1 = *__SIMD32(pSrc)++; - inA2 = *__SIMD32(pSrc)++; - - /* C = A * scale */ - /* Scale the inputs and then store the 2 results in the destination buffer - * in single cycle by packing the outputs */ - out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract); - out2 = (q31_t) ((q15_t) inA1 * scaleFract); - out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract); - out4 = (q31_t) ((q15_t) inA2 * scaleFract); - - /* apply shifting */ - out1 = out1 >> kShift; - out2 = out2 >> kShift; - out3 = out3 >> kShift; - out4 = out4 >> kShift; - - /* saturate the output */ - in1 = (q15_t) (__SSAT(out1, 16)); - in2 = (q15_t) (__SSAT(out2, 16)); - in3 = (q15_t) (__SSAT(out3, 16)); - in4 = (q15_t) (__SSAT(out4, 16)); - - /* store the result to destination */ - *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16); - *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of scale group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c deleted file mode 100644 index cef8102450..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c +++ /dev/null @@ -1,221 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_scale_q31.c -* -* Description: Multiplies a Q31 vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a Q31 vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.31 format. - * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format. - */ - -void arm_scale_q31( - q31_t * pSrc, - q31_t scaleFract, - int8_t shift, - q31_t * pDst, - uint32_t blockSize) -{ - int8_t kShift = shift + 1; /* Shift to apply after scaling */ - int8_t sign = (kShift & 0x80); - uint32_t blkCnt; /* loop counter */ - q31_t in, out; - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in1, in2, in3, in4; /* temporary input variables */ - q31_t out1, out2, out3, out4; /* temporary output variabels */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read four inputs from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* multiply input with scaler value */ - in1 = ((q63_t) in1 * scaleFract) >> 32; - in2 = ((q63_t) in2 * scaleFract) >> 32; - in3 = ((q63_t) in3 * scaleFract) >> 32; - in4 = ((q63_t) in4 * scaleFract) >> 32; - - /* apply shifting */ - out1 = in1 << kShift; - out2 = in2 << kShift; - - /* saturate the results. */ - if(in1 != (out1 >> kShift)) - out1 = 0x7FFFFFFF ^ (in1 >> 31); - - if(in2 != (out2 >> kShift)) - out2 = 0x7FFFFFFF ^ (in2 >> 31); - - out3 = in3 << kShift; - out4 = in4 << kShift; - - *pDst = out1; - *(pDst + 1) = out2; - - if(in3 != (out3 >> kShift)) - out3 = 0x7FFFFFFF ^ (in3 >> 31); - - if(in4 != (out4 >> kShift)) - out4 = 0x7FFFFFFF ^ (in4 >> 31); - - /* Store result destination */ - *(pDst + 2) = out3; - *(pDst + 3) = out4; - - /* Update pointers to process next sampels */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - } - else - { - kShift = -kShift; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read four inputs from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* multiply input with scaler value */ - in1 = ((q63_t) in1 * scaleFract) >> 32; - in2 = ((q63_t) in2 * scaleFract) >> 32; - in3 = ((q63_t) in3 * scaleFract) >> 32; - in4 = ((q63_t) in4 * scaleFract) >> 32; - - /* apply shifting */ - out1 = in1 >> kShift; - out2 = in2 >> kShift; - - out3 = in3 >> kShift; - out4 = in4 >> kShift; - - /* Store result destination */ - *pDst = out1; - *(pDst + 1) = out2; - - *(pDst + 2) = out3; - *(pDst + 3) = out4; - - /* Update pointers to process next sampels */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - } - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - - if(sign == 0) - { - out = in << kShift; - if(in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - } - else - { - out = in >> kShift; - } - - *pDst++ = out; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of scale group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c deleted file mode 100644 index c899d91044..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c +++ /dev/null @@ -1,144 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_scale_q7.c -* -* Description: Multiplies a Q7 vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a Q7 vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.7 format. - * These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format. - */ - -void arm_scale_q7( - q7_t * pSrc, - q7_t scaleFract, - int8_t shift, - q7_t * pDst, - uint32_t blockSize) -{ - int8_t kShift = 7 - shift; /* shift to apply after scaling */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Reading 4 inputs from memory */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - /* C = A * scale */ - /* Scale the inputs and then store the results in the temporary variables. */ - out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8)); - out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8)); - out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8)); - out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8)); - - /* Packing the individual outputs into 32bit and storing in - * destination buffer in single write */ - *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of scale group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c deleted file mode 100644 index b2ee2a5a41..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c +++ /dev/null @@ -1,243 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_shift_q15.c -* -* Description: Shifts the elements of a Q15 vector by a specified number of bits. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup shift - * @{ - */ - -/** - * @brief Shifts the elements of a Q15 vector a specified number of bits. - * @param[in] *pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_shift_q15( - q15_t * pSrc, - int8_t shiftBits, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - uint8_t sign; /* Sign of shiftBits */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q15_t in1, in2; /* Temporary variables */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Read 2 inputs */ - in1 = *pSrc++; - in2 = *pSrc++; - /* C = A << shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16), - __SSAT((in2 << shiftBits), 16), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16), - __SSAT((in1 << shiftBits), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = *pSrc++; - in2 = *pSrc++; - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16), - __SSAT((in2 << shiftBits), 16), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16), - __SSAT((in1 << shiftBits), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift and then store the results in the destination buffer. */ - *pDst++ = __SSAT((*pSrc++ << shiftBits), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Read 2 inputs */ - in1 = *pSrc++; - in2 = *pSrc++; - - /* C = A >> shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits), - (in2 >> -shiftBits), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits), - (in1 >> -shiftBits), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = *pSrc++; - in2 = *pSrc++; - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits), - (in2 >> -shiftBits), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits), - (in1 >> -shiftBits), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift and then store the results in the destination buffer. */ - *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of shift group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c deleted file mode 100644 index 799035e80c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c +++ /dev/null @@ -1,195 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_shift_q31.c -* -* Description: Shifts the elements of a Q31 vector by a specified number of bits. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ -/** - * @defgroup shift Vector Shift - * - * Shifts the elements of a fixed-point vector by a specified number of bits. - * There are separate functions for Q7, Q15, and Q31 data types. - * The underlying algorithm used is: - * - *
        
- *     pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.        
- * 
- * - * If shift is positive then the elements of the vector are shifted to the left. - * If shift is negative then the elements of the vector are shifted to the right. - */ - -/** - * @addtogroup shift - * @{ - */ - -/** - * @brief Shifts the elements of a Q31 vector a specified number of bits. - * @param[in] *pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_shift_q31( - q31_t * pSrc, - int8_t shiftBits, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */ - -#ifndef ARM_MATH_CM0 - - q31_t in1, in2, in3, in4; /* Temporary input variables */ - q31_t out1, out2, out3, out4; /* Temporary output variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift the input and then store the results in the destination buffer. */ - in1 = *pSrc; - in2 = *(pSrc + 1); - out1 = in1 << shiftBits; - in3 = *(pSrc + 2); - out2 = in2 << shiftBits; - in4 = *(pSrc + 3); - if(in1 != (out1 >> shiftBits)) - out1 = 0x7FFFFFFF ^ (in1 >> 31); - - if(in2 != (out2 >> shiftBits)) - out2 = 0x7FFFFFFF ^ (in2 >> 31); - - *pDst = out1; - out3 = in3 << shiftBits; - *(pDst + 1) = out2; - out4 = in4 << shiftBits; - - if(in3 != (out3 >> shiftBits)) - out3 = 0x7FFFFFFF ^ (in3 >> 31); - - if(in4 != (out4 >> shiftBits)) - out4 = 0x7FFFFFFF ^ (in4 >> 31); - - *(pDst + 2) = out3; - *(pDst + 3) = out4; - - /* Update destination pointer to process next sampels */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the input and then store the results in the destination buffer. */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - *pDst = (in1 >> -shiftBits); - *(pDst + 1) = (in2 >> -shiftBits); - *(pDst + 2) = (in3 >> -shiftBits); - *(pDst + 3) = (in4 >> -shiftBits); - - - pSrc += 4u; - pDst += 4u; - - blkCnt--; - } - - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A (>> or <<) shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) : - (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - - -} - -/** - * @} end of shift group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c deleted file mode 100644 index 687a333234..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c +++ /dev/null @@ -1,215 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_shift_q7.c -* -* Description: Processing function for the Q7 Shifting -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup shift - * @{ - */ - - -/** - * @brief Shifts the elements of a Q7 vector a specified number of bits. - * @param[in] *pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * \par Conditions for optimum performance - * Input and output buffers should be aligned by 32-bit - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated. - */ - -void arm_shift_q7( - q7_t * pSrc, - int8_t shiftBits, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - uint8_t sign; /* Sign of shiftBits */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q7_t in1; /* Input value1 */ - q7_t in2; /* Input value2 */ - q7_t in3; /* Input value3 */ - q7_t in4; /* Input value4 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Read 4 inputs */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ - *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8), - __SSAT((in2 << shiftBits), 8), - __SSAT((in3 << shiftBits), 8), - __SSAT((in4 << shiftBits), 8)); - /* Update source pointer to process next sampels */ - pSrc += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - shiftBits = -shiftBits; - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Read 4 inputs */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ - *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits), - (in3 >> shiftBits), (in4 >> shiftBits)); - - - pSrc += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - in1 = *pSrc++; - *pDst++ = (in1 >> shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#endif /* #ifndef ARM_MATH_CM0 */ -} - -/** - * @} end of shift group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c deleted file mode 100644 index 0fcd328693..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c +++ /dev/null @@ -1,145 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sub_f32.c -* -* Description: Floating-point vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicSub Vector Subtraction - * - * Element-by-element subtraction of two vectors. - * - *
        
- *     pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.        
- * 
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicSub - * @{ - */ - - -/** - * @brief Floating-point vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_sub_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t inA1, inA2, inA3, inA4; /* temporary variables */ - float32_t inB1, inB2, inB3, inB4; /* temporary variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer. */ - /* Read 4 input samples from sourceA and sourceB */ - inA1 = *pSrcA; - inB1 = *pSrcB; - inA2 = *(pSrcA + 1); - inB2 = *(pSrcB + 1); - inA3 = *(pSrcA + 2); - inB3 = *(pSrcB + 2); - inA4 = *(pSrcA + 3); - inB4 = *(pSrcB + 3); - - /* dst = srcA - srcB */ - /* subtract and store the result */ - *pDst = inA1 - inB1; - *(pDst + 1) = inA2 - inB2; - *(pDst + 2) = inA3 - inB3; - *(pDst + 3) = inA4 - inB4; - - - /* Update pointers to process next sampels */ - pSrcA += 4u; - pSrcB += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer. */ - *pDst++ = (*pSrcA++) - (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicSub group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c deleted file mode 100644 index c372c12357..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sub_q15.c -* -* Description: Q15 vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicSub - * @{ - */ - -/** - * @brief Q15 vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_sub_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2; - q31_t inB1, inB2; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer two samples at a time. */ - inA1 = *__SIMD32(pSrcA)++; - inA2 = *__SIMD32(pSrcA)++; - inB1 = *__SIMD32(pSrcB)++; - inB2 = *__SIMD32(pSrcB)++; - - *__SIMD32(pDst)++ = __QSUB16(inA1, inB1); - *__SIMD32(pDst)++ = __QSUB16(inA2, inB2); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - -} - -/** - * @} end of BasicSub group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c deleted file mode 100644 index 829f25db0b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sub_q31.c -* -* Description: Q31 vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicSub - * @{ - */ - -/** - * @brief Q31 vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_sub_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; - q31_t inB1, inB2, inB3, inB4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - *pDst++ = __QSUB(inA1, inB1); - *pDst++ = __QSUB(inA2, inB2); - *pDst++ = __QSUB(inA3, inB3); - *pDst++ = __QSUB(inA4, inB4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = __QSUB(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of BasicSub group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c deleted file mode 100644 index 0bbaf8f055..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c +++ /dev/null @@ -1,126 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sub_q7.c -* -* Description: Q7 vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicSub - * @{ - */ - -/** - * @brief Q7 vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - */ - -void arm_sub_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer 4 samples at a time. */ - *__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - -} - -/** - * @} end of BasicSub group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c deleted file mode 100644 index eeea42387f..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c +++ /dev/null @@ -1,4689 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_common_tables.c -* -* Description: This file has common tables like fft twiddle factors, Bitreverse, reciprocal etc which are used across different functions -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup CFFT_CIFFT Complex FFT Tables - * @{ - */ - -/** -* \par -* Pseudo code for Generation of Bit reversal Table is -* \par -*
for(l=1;l <= N/4;l++)    
-* {    
-*   for(i=0;i> 1;    
-*  } 
-* \par -* where N = 4096 logN2 = 12 -* \par -* N is the maximum FFT Size supported -*/ - -/* -* @brief Table for bit reversal process -*/ -const uint16_t armBitRevTable[1024] = { - 0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, - 0x80, 0x480, 0x280, 0x680, 0x180, 0x580, 0x380, - 0x780, 0x40, 0x440, 0x240, 0x640, 0x140, 0x540, - 0x340, 0x740, 0xc0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, - 0x5c0, 0x3c0, 0x7c0, 0x20, 0x420, 0x220, 0x620, - 0x120, 0x520, 0x320, 0x720, 0xa0, 0x4a0, 0x2a0, - 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x60, 0x460, - 0x260, 0x660, 0x160, 0x560, 0x360, 0x760, 0xe0, - 0x4e0, 0x2e0, 0x6e0, 0x1e0, 0x5e0, 0x3e0, 0x7e0, - 0x10, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310, - 0x710, 0x90, 0x490, 0x290, 0x690, 0x190, 0x590, - 0x390, 0x790, 0x50, 0x450, 0x250, 0x650, 0x150, - 0x550, 0x350, 0x750, 0xd0, 0x4d0, 0x2d0, 0x6d0, - 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x30, 0x430, 0x230, - 0x630, 0x130, 0x530, 0x330, 0x730, 0xb0, 0x4b0, - 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0, 0x7b0, 0x70, - 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, - 0xf0, 0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, - 0x7f0, 0x8, 0x408, 0x208, 0x608, 0x108, 0x508, - 0x308, 0x708, 0x88, 0x488, 0x288, 0x688, 0x188, - 0x588, 0x388, 0x788, 0x48, 0x448, 0x248, 0x648, - 0x148, 0x548, 0x348, 0x748, 0xc8, 0x4c8, 0x2c8, - 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x28, 0x428, - 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0xa8, - 0x4a8, 0x2a8, 0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, - 0x68, 0x468, 0x268, 0x668, 0x168, 0x568, 0x368, - 0x768, 0xe8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, - 0x3e8, 0x7e8, 0x18, 0x418, 0x218, 0x618, 0x118, - 0x518, 0x318, 0x718, 0x98, 0x498, 0x298, 0x698, - 0x198, 0x598, 0x398, 0x798, 0x58, 0x458, 0x258, - 0x658, 0x158, 0x558, 0x358, 0x758, 0xd8, 0x4d8, - 0x2d8, 0x6d8, 0x1d8, 0x5d8, 0x3d8, 0x7d8, 0x38, - 0x438, 0x238, 0x638, 0x138, 0x538, 0x338, 0x738, - 0xb8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, - 0x7b8, 0x78, 0x478, 0x278, 0x678, 0x178, 0x578, - 0x378, 0x778, 0xf8, 0x4f8, 0x2f8, 0x6f8, 0x1f8, - 0x5f8, 0x3f8, 0x7f8, 0x4, 0x404, 0x204, 0x604, - 0x104, 0x504, 0x304, 0x704, 0x84, 0x484, 0x284, - 0x684, 0x184, 0x584, 0x384, 0x784, 0x44, 0x444, - 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0xc4, - 0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, - 0x24, 0x424, 0x224, 0x624, 0x124, 0x524, 0x324, - 0x724, 0xa4, 0x4a4, 0x2a4, 0x6a4, 0x1a4, 0x5a4, - 0x3a4, 0x7a4, 0x64, 0x464, 0x264, 0x664, 0x164, - 0x564, 0x364, 0x764, 0xe4, 0x4e4, 0x2e4, 0x6e4, - 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x14, 0x414, 0x214, - 0x614, 0x114, 0x514, 0x314, 0x714, 0x94, 0x494, - 0x294, 0x694, 0x194, 0x594, 0x394, 0x794, 0x54, - 0x454, 0x254, 0x654, 0x154, 0x554, 0x354, 0x754, - 0xd4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4, - 0x7d4, 0x34, 0x434, 0x234, 0x634, 0x134, 0x534, - 0x334, 0x734, 0xb4, 0x4b4, 0x2b4, 0x6b4, 0x1b4, - 0x5b4, 0x3b4, 0x7b4, 0x74, 0x474, 0x274, 0x674, - 0x174, 0x574, 0x374, 0x774, 0xf4, 0x4f4, 0x2f4, - 0x6f4, 0x1f4, 0x5f4, 0x3f4, 0x7f4, 0xc, 0x40c, - 0x20c, 0x60c, 0x10c, 0x50c, 0x30c, 0x70c, 0x8c, - 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, - 0x4c, 0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, - 0x74c, 0xcc, 0x4cc, 0x2cc, 0x6cc, 0x1cc, 0x5cc, - 0x3cc, 0x7cc, 0x2c, 0x42c, 0x22c, 0x62c, 0x12c, - 0x52c, 0x32c, 0x72c, 0xac, 0x4ac, 0x2ac, 0x6ac, - 0x1ac, 0x5ac, 0x3ac, 0x7ac, 0x6c, 0x46c, 0x26c, - 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0xec, 0x4ec, - 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x1c, - 0x41c, 0x21c, 0x61c, 0x11c, 0x51c, 0x31c, 0x71c, - 0x9c, 0x49c, 0x29c, 0x69c, 0x19c, 0x59c, 0x39c, - 0x79c, 0x5c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, - 0x35c, 0x75c, 0xdc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, - 0x5dc, 0x3dc, 0x7dc, 0x3c, 0x43c, 0x23c, 0x63c, - 0x13c, 0x53c, 0x33c, 0x73c, 0xbc, 0x4bc, 0x2bc, - 0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x7c, 0x47c, - 0x27c, 0x67c, 0x17c, 0x57c, 0x37c, 0x77c, 0xfc, - 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc, 0x7fc, - 0x2, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, - 0x702, 0x82, 0x482, 0x282, 0x682, 0x182, 0x582, - 0x382, 0x782, 0x42, 0x442, 0x242, 0x642, 0x142, - 0x542, 0x342, 0x742, 0xc2, 0x4c2, 0x2c2, 0x6c2, - 0x1c2, 0x5c2, 0x3c2, 0x7c2, 0x22, 0x422, 0x222, - 0x622, 0x122, 0x522, 0x322, 0x722, 0xa2, 0x4a2, - 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x62, - 0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, - 0xe2, 0x4e2, 0x2e2, 0x6e2, 0x1e2, 0x5e2, 0x3e2, - 0x7e2, 0x12, 0x412, 0x212, 0x612, 0x112, 0x512, - 0x312, 0x712, 0x92, 0x492, 0x292, 0x692, 0x192, - 0x592, 0x392, 0x792, 0x52, 0x452, 0x252, 0x652, - 0x152, 0x552, 0x352, 0x752, 0xd2, 0x4d2, 0x2d2, - 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x32, 0x432, - 0x232, 0x632, 0x132, 0x532, 0x332, 0x732, 0xb2, - 0x4b2, 0x2b2, 0x6b2, 0x1b2, 0x5b2, 0x3b2, 0x7b2, - 0x72, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372, - 0x772, 0xf2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, - 0x3f2, 0x7f2, 0xa, 0x40a, 0x20a, 0x60a, 0x10a, - 0x50a, 0x30a, 0x70a, 0x8a, 0x48a, 0x28a, 0x68a, - 0x18a, 0x58a, 0x38a, 0x78a, 0x4a, 0x44a, 0x24a, - 0x64a, 0x14a, 0x54a, 0x34a, 0x74a, 0xca, 0x4ca, - 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca, 0x7ca, 0x2a, - 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, - 0xaa, 0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, - 0x7aa, 0x6a, 0x46a, 0x26a, 0x66a, 0x16a, 0x56a, - 0x36a, 0x76a, 0xea, 0x4ea, 0x2ea, 0x6ea, 0x1ea, - 0x5ea, 0x3ea, 0x7ea, 0x1a, 0x41a, 0x21a, 0x61a, - 0x11a, 0x51a, 0x31a, 0x71a, 0x9a, 0x49a, 0x29a, - 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a, 0x45a, - 0x25a, 0x65a, 0x15a, 0x55a, 0x35a, 0x75a, 0xda, - 0x4da, 0x2da, 0x6da, 0x1da, 0x5da, 0x3da, 0x7da, - 0x3a, 0x43a, 0x23a, 0x63a, 0x13a, 0x53a, 0x33a, - 0x73a, 0xba, 0x4ba, 0x2ba, 0x6ba, 0x1ba, 0x5ba, - 0x3ba, 0x7ba, 0x7a, 0x47a, 0x27a, 0x67a, 0x17a, - 0x57a, 0x37a, 0x77a, 0xfa, 0x4fa, 0x2fa, 0x6fa, - 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x6, 0x406, 0x206, - 0x606, 0x106, 0x506, 0x306, 0x706, 0x86, 0x486, - 0x286, 0x686, 0x186, 0x586, 0x386, 0x786, 0x46, - 0x446, 0x246, 0x646, 0x146, 0x546, 0x346, 0x746, - 0xc6, 0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, - 0x7c6, 0x26, 0x426, 0x226, 0x626, 0x126, 0x526, - 0x326, 0x726, 0xa6, 0x4a6, 0x2a6, 0x6a6, 0x1a6, - 0x5a6, 0x3a6, 0x7a6, 0x66, 0x466, 0x266, 0x666, - 0x166, 0x566, 0x366, 0x766, 0xe6, 0x4e6, 0x2e6, - 0x6e6, 0x1e6, 0x5e6, 0x3e6, 0x7e6, 0x16, 0x416, - 0x216, 0x616, 0x116, 0x516, 0x316, 0x716, 0x96, - 0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796, - 0x56, 0x456, 0x256, 0x656, 0x156, 0x556, 0x356, - 0x756, 0xd6, 0x4d6, 0x2d6, 0x6d6, 0x1d6, 0x5d6, - 0x3d6, 0x7d6, 0x36, 0x436, 0x236, 0x636, 0x136, - 0x536, 0x336, 0x736, 0xb6, 0x4b6, 0x2b6, 0x6b6, - 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x76, 0x476, 0x276, - 0x676, 0x176, 0x576, 0x376, 0x776, 0xf6, 0x4f6, - 0x2f6, 0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0xe, - 0x40e, 0x20e, 0x60e, 0x10e, 0x50e, 0x30e, 0x70e, - 0x8e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e, - 0x78e, 0x4e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, - 0x34e, 0x74e, 0xce, 0x4ce, 0x2ce, 0x6ce, 0x1ce, - 0x5ce, 0x3ce, 0x7ce, 0x2e, 0x42e, 0x22e, 0x62e, - 0x12e, 0x52e, 0x32e, 0x72e, 0xae, 0x4ae, 0x2ae, - 0x6ae, 0x1ae, 0x5ae, 0x3ae, 0x7ae, 0x6e, 0x46e, - 0x26e, 0x66e, 0x16e, 0x56e, 0x36e, 0x76e, 0xee, - 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, - 0x1e, 0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, - 0x71e, 0x9e, 0x49e, 0x29e, 0x69e, 0x19e, 0x59e, - 0x39e, 0x79e, 0x5e, 0x45e, 0x25e, 0x65e, 0x15e, - 0x55e, 0x35e, 0x75e, 0xde, 0x4de, 0x2de, 0x6de, - 0x1de, 0x5de, 0x3de, 0x7de, 0x3e, 0x43e, 0x23e, - 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0xbe, 0x4be, - 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x7e, - 0x47e, 0x27e, 0x67e, 0x17e, 0x57e, 0x37e, 0x77e, - 0xfe, 0x4fe, 0x2fe, 0x6fe, 0x1fe, 0x5fe, 0x3fe, - 0x7fe, 0x1 -}; - - -/* -* @brief Floating-point Twiddle factors Table Generation -*/ - - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -*
for(i = 0; i< 3N/4; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
-* \par -* where N = 4096 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float32_t twiddleCoef[6144] = { - 1.000000000000000000f, 0.000000000000000000f, 0.999998823451701880f, - 0.001533980186284766f, 0.999995293809576190f, 0.003067956762965976f, - 0.999989411081928400f, 0.004601926120448571f, 0.999981175282601110f, - 0.006135884649154475f, 0.999970586430974140f, 0.007669828739531097f, - 0.999957644551963900f, 0.009203754782059819f, 0.999942349676023910f, - 0.010737659167264491f, 0.999924701839144500f, 0.012271538285719925f, - 0.999904701082852900f, 0.013805388528060391f, 0.999882347454212560f, - 0.015339206284988100f, 0.999857641005823860f, 0.016872987947281710f, - 0.999830581795823400f, 0.018406729905804820f, 0.999801169887884260f, - 0.019940428551514441f, 0.999769405351215280f, 0.021474080275469508f, - 0.999735288260561680f, 0.023007681468839369f, 0.999698818696204250f, - 0.024541228522912288f, 0.999659996743959220f, 0.026074717829103901f, - 0.999618822495178640f, 0.027608145778965740f, 0.999575296046749220f, - 0.029141508764193722f, 0.999529417501093140f, 0.030674803176636626f, - 0.999481186966166950f, 0.032208025408304586f, 0.999430604555461730f, - 0.033741171851377580f, 0.999377670388002850f, 0.035274238898213947f, - 0.999322384588349540f, 0.036807222941358832f, 0.999264747286594420f, - 0.038340120373552694f, 0.999204758618363890f, 0.039872927587739811f, - 0.999142418724816910f, 0.041405640977076739f, 0.999077727752645360f, - 0.042938256934940820f, 0.999010685854073380f, 0.044470771854938668f, - 0.998941293186856870f, 0.046003182130914623f, 0.998869549914283560f, - 0.047535484156959303f, 0.998795456205172410f, 0.049067674327418015f, - 0.998719012233872940f, 0.050599749036899282f, 0.998640218180265270f, - 0.052131704680283324f, 0.998559074229759310f, 0.053663537652730520f, - 0.998475580573294770f, 0.055195244349689934f, 0.998389737407340160f, - 0.056726821166907748f, 0.998301544933892890f, 0.058258264500435752f, - 0.998211003360478190f, 0.059789570746639868f, 0.998118112900149180f, - 0.061320736302208578f, 0.998022873771486240f, 0.062851757564161406f, - 0.997925286198596000f, 0.064382630929857465f, 0.997825350411111640f, - 0.065913352797003805f, 0.997723066644191640f, 0.067443919563664051f, - 0.997618435138519550f, 0.068974327628266746f, 0.997511456140303450f, - 0.070504573389613856f, 0.997402129901275300f, 0.072034653246889332f, - 0.997290456678690210f, 0.073564563599667426f, 0.997176436735326190f, - 0.075094300847921305f, 0.997060070339482960f, 0.076623861392031492f, - 0.996941357764982160f, 0.078153241632794232f, 0.996820299291165670f, - 0.079682437971430126f, 0.996696895202896060f, 0.081211446809592441f, - 0.996571145790554840f, 0.082740264549375692f, 0.996443051350042630f, - 0.084268887593324071f, 0.996312612182778000f, 0.085797312344439894f, - 0.996179828595696980f, 0.087325535206192059f, 0.996044700901251970f, - 0.088853552582524600f, 0.995907229417411720f, 0.090381360877864983f, - 0.995767414467659820f, 0.091908956497132724f, 0.995625256380994310f, - 0.093436335845747787f, 0.995480755491926940f, 0.094963495329638992f, - 0.995333912140482280f, 0.096490431355252593f, 0.995184726672196930f, - 0.098017140329560604f, 0.995033199438118630f, 0.099543618660069319f, - 0.994879330794805620f, 0.101069862754827820f, 0.994723121104325700f, - 0.102595869022436280f, 0.994564570734255420f, 0.104121633872054590f, - 0.994403680057679100f, 0.105647153713410620f, 0.994240449453187900f, - 0.107172424956808840f, 0.994074879304879370f, 0.108697444013138720f, - 0.993906970002356060f, 0.110222207293883060f, 0.993736721940724600f, - 0.111746711211126590f, 0.993564135520595300f, 0.113270952177564350f, - 0.993389211148080650f, 0.114794926606510080f, 0.993211949234794500f, - 0.116318630911904750f, 0.993032350197851410f, 0.117842061508324980f, - 0.992850414459865100f, 0.119365214810991350f, 0.992666142448948020f, - 0.120888087235777080f, 0.992479534598709970f, 0.122410675199216200f, - 0.992290591348257370f, 0.123932975118512160f, 0.992099313142191800f, - 0.125454983411546230f, 0.991905700430609330f, 0.126976696496885870f, - 0.991709753669099530f, 0.128498110793793170f, 0.991511473318743900f, - 0.130019222722233350f, 0.991310859846115440f, 0.131540028702883120f, - 0.991107913723276890f, 0.133060525157139060f, 0.990902635427780010f, - 0.134580708507126170f, 0.990695025442664630f, 0.136100575175706200f, - 0.990485084256457090f, 0.137620121586486040f, 0.990272812363169110f, - 0.139139344163826200f, 0.990058210262297120f, 0.140658239332849210f, - 0.989841278458820530f, 0.142176803519448030f, 0.989622017463200890f, - 0.143695033150294470f, 0.989400427791380380f, 0.145212924652847460f, - 0.989176509964781010f, 0.146730474455361750f, 0.988950264510302990f, - 0.148247678986896030f, 0.988721691960323780f, 0.149764534677321510f, - 0.988490792852696590f, 0.151281037957330220f, 0.988257567730749460f, - 0.152797185258443440f, 0.988022017143283530f, 0.154312973013020100f, - 0.987784141644572180f, 0.155828397654265230f, 0.987543941794359230f, - 0.157343455616238250f, 0.987301418157858430f, 0.158858143333861450f, - 0.987056571305750970f, 0.160372457242928280f, 0.986809401814185530f, - 0.161886393780111830f, 0.986559910264775410f, 0.163399949382973230f, - 0.986308097244598670f, 0.164913120489969890f, 0.986053963346195440f, - 0.166425903540464100f, 0.985797509167567480f, 0.167938294974731170f, - 0.985538735312176060f, 0.169450291233967960f, 0.985277642388941220f, - 0.170961888760301220f, 0.985014231012239840f, 0.172473083996795950f, - 0.984748501801904210f, 0.173983873387463820f, 0.984480455383220930f, - 0.175494253377271430f, 0.984210092386929030f, 0.177004220412148750f, - 0.983937413449218920f, 0.178513770938997510f, 0.983662419211730250f, - 0.180022901405699510f, 0.983385110321551180f, 0.181531608261124970f, - 0.983105487431216290f, 0.183039887955140950f, 0.982823551198705240f, - 0.184547736938619620f, 0.982539302287441240f, 0.186055151663446630f, - 0.982252741366289370f, 0.187562128582529600f, 0.981963869109555240f, - 0.189068664149806190f, 0.981672686196983110f, 0.190574754820252740f, - 0.981379193313754560f, 0.192080397049892440f, 0.981083391150486710f, - 0.193585587295803610f, 0.980785280403230430f, 0.195090322016128250f, - 0.980484861773469380f, 0.196594597670080220f, 0.980182135968117430f, - 0.198098410717953560f, 0.979877103699517640f, 0.199601757621130970f, - 0.979569765685440520f, 0.201104634842091900f, 0.979260122649082020f, - 0.202607038844421130f, 0.978948175319062200f, 0.204108966092816870f, - 0.978633924429423210f, 0.205610413053099240f, 0.978317370719627650f, - 0.207111376192218560f, 0.977998514934557140f, 0.208611851978263490f, - 0.977677357824509930f, 0.210111836880469610f, 0.977353900145199960f, - 0.211611327369227550f, 0.977028142657754390f, 0.213110319916091360f, - 0.976700086128711840f, 0.214608810993786760f, 0.976369731330021140f, - 0.216106797076219520f, 0.976037079039039020f, 0.217604274638483640f, - 0.975702130038528570f, 0.219101240156869800f, 0.975364885116656980f, - 0.220597690108873510f, 0.975025345066994120f, 0.222093620973203510f, - 0.974683510688510670f, 0.223589029229789990f, 0.974339382785575860f, - 0.225083911359792830f, 0.973992962167955830f, 0.226578263845610000f, - 0.973644249650811980f, 0.228072083170885730f, 0.973293246054698250f, - 0.229565365820518870f, 0.972939952205560180f, 0.231058108280671110f, - 0.972584368934732210f, 0.232550307038775240f, 0.972226497078936270f, - 0.234041958583543430f, 0.971866337480279400f, 0.235533059404975490f, - 0.971503890986251780f, 0.237023605994367200f, 0.971139158449725090f, - 0.238513594844318420f, 0.970772140728950350f, 0.240003022448741500f, - 0.970402838687555500f, 0.241491885302869330f, 0.970031253194543970f, - 0.242980179903263870f, 0.969657385124292450f, 0.244467902747824150f, - 0.969281235356548530f, 0.245955050335794590f, 0.968902804776428870f, - 0.247441619167773270f, 0.968522094274417380f, 0.248927605745720150f, - 0.968139104746362440f, 0.250413006572965220f, 0.967753837093475510f, - 0.251897818154216970f, 0.967366292222328510f, 0.253382036995570160f, - 0.966976471044852070f, 0.254865659604514570f, 0.966584374478333120f, - 0.256348682489942910f, 0.966190003445412500f, 0.257831102162158990f, - 0.965793358874083680f, 0.259312915132886230f, 0.965394441697689400f, - 0.260794117915275510f, 0.964993252854920320f, 0.262274707023913590f, - 0.964589793289812760f, 0.263754678974831350f, 0.964184063951745830f, - 0.265234030285511790f, 0.963776065795439840f, 0.266712757474898370f, - 0.963365799780954050f, 0.268190857063403180f, 0.962953266873683880f, - 0.269668325572915090f, 0.962538468044359160f, 0.271145159526808010f, - 0.962121404269041580f, 0.272621355449948980f, 0.961702076529122540f, - 0.274096909868706380f, 0.961280485811320640f, 0.275571819310958140f, - 0.960856633107679660f, 0.277046080306099900f, 0.960430519415565790f, - 0.278519689385053060f, 0.960002145737665960f, 0.279992643080273220f, - 0.959571513081984520f, 0.281464937925757940f, 0.959138622461841890f, - 0.282936570457055390f, 0.958703474895871600f, 0.284407537211271880f, - 0.958266071408017670f, 0.285877834727080620f, 0.957826413027532910f, - 0.287347459544729510f, 0.957384500788975860f, 0.288816408206049480f, - 0.956940335732208820f, 0.290284677254462330f, 0.956493918902395100f, - 0.291752263234989260f, 0.956045251349996410f, 0.293219162694258630f, - 0.955594334130771110f, 0.294685372180514330f, 0.955141168305770780f, - 0.296150888243623790f, 0.954685754941338340f, 0.297615707435086200f, - 0.954228095109105670f, 0.299079826308040480f, 0.953768189885990330f, - 0.300543241417273450f, 0.953306040354193860f, 0.302005949319228080f, - 0.952841647601198720f, 0.303467946572011320f, 0.952375012719765880f, - 0.304929229735402370f, 0.951906136807932350f, 0.306389795370860920f, - 0.951435020969008340f, 0.307849640041534870f, 0.950961666311575080f, - 0.309308760312268730f, 0.950486073949481700f, 0.310767152749611470f, - 0.950008245001843000f, 0.312224813921824880f, 0.949528180593036670f, - 0.313681740398891520f, 0.949045881852700560f, 0.315137928752522440f, - 0.948561349915730270f, 0.316593375556165850f, 0.948074585922276230f, - 0.318048077385014950f, 0.947585591017741090f, 0.319502030816015690f, - 0.947094366352777220f, 0.320955232427875210f, 0.946600913083283530f, - 0.322407678801069850f, 0.946105232370403450f, 0.323859366517852850f, - 0.945607325380521280f, 0.325310292162262930f, 0.945107193285260610f, - 0.326760452320131730f, 0.944604837261480260f, 0.328209843579092500f, - 0.944100258491272660f, 0.329658462528587490f, 0.943593458161960390f, - 0.331106305759876430f, 0.943084437466093490f, 0.332553369866044220f, - 0.942573197601446870f, 0.333999651442009380f, 0.942059739771017310f, - 0.335445147084531600f, 0.941544065183020810f, 0.336889853392220050f, - 0.941026175050889260f, 0.338333766965541130f, 0.940506070593268300f, - 0.339776884406826850f, 0.939983753034014050f, 0.341219202320282360f, - 0.939459223602189920f, 0.342660717311994380f, 0.938932483532064600f, - 0.344101425989938810f, 0.938403534063108060f, 0.345541324963989090f, - 0.937872376439989890f, 0.346980410845923680f, 0.937339011912574960f, - 0.348418680249434560f, 0.936803441735921560f, 0.349856129790134920f, - 0.936265667170278260f, 0.351292756085567090f, 0.935725689481080370f, - 0.352728555755210730f, 0.935183509938947610f, 0.354163525420490340f, - 0.934639129819680780f, 0.355597661704783850f, 0.934092550404258980f, - 0.357030961233429980f, 0.933543772978836170f, 0.358463420633736540f, - 0.932992798834738960f, 0.359895036534988110f, 0.932439629268462360f, - 0.361325805568454280f, 0.931884265581668150f, 0.362755724367397230f, - 0.931326709081180430f, 0.364184789567079890f, 0.930766961078983710f, - 0.365612997804773850f, 0.930205022892219070f, 0.367040345719767180f, - 0.929640895843181330f, 0.368466829953372320f, 0.929074581259315860f, - 0.369892447148934100f, 0.928506080473215590f, 0.371317193951837540f, - 0.927935394822617890f, 0.372741067009515760f, 0.927362525650401110f, - 0.374164062971457930f, 0.926787474304581750f, 0.375586178489217220f, - 0.926210242138311380f, 0.377007410216418260f, 0.925630830509872720f, - 0.378427754808765560f, 0.925049240782677580f, 0.379847208924051160f, - 0.924465474325262600f, 0.381265769222162380f, 0.923879532511286740f, - 0.382683432365089780f, 0.923291416719527640f, 0.384100195016935040f, - 0.922701128333878630f, 0.385516053843918850f, 0.922108668743345180f, - 0.386931005514388580f, 0.921514039342042010f, 0.388345046698826250f, - 0.920917241529189520f, 0.389758174069856410f, 0.920318276709110590f, - 0.391170384302253870f, 0.919717146291227360f, 0.392581674072951470f, - 0.919113851690057770f, 0.393992040061048100f, 0.918508394325212250f, - 0.395401478947816350f, 0.917900775621390500f, 0.396809987416710310f, - 0.917290997008377910f, 0.398217562153373560f, 0.916679059921042700f, - 0.399624199845646790f, 0.916064965799331720f, 0.401029897183575620f, - 0.915448716088267830f, 0.402434650859418430f, 0.914830312237946200f, - 0.403838457567654070f, 0.914209755703530690f, 0.405241314004989860f, - 0.913587047945250810f, 0.406643216870369030f, 0.912962190428398210f, - 0.408044162864978690f, 0.912335184623322750f, 0.409444148692257590f, - 0.911706032005429880f, 0.410843171057903910f, 0.911074734055176360f, - 0.412241226669882890f, 0.910441292258067250f, 0.413638312238434500f, - 0.909805708104652220f, 0.415034424476081630f, 0.909167983090522380f, - 0.416429560097637150f, 0.908528118716306120f, 0.417823715820212270f, - 0.907886116487666260f, 0.419216888363223910f, 0.907241977915295820f, - 0.420609074448402510f, 0.906595704514915330f, 0.422000270799799680f, - 0.905947297807268460f, 0.423390474143796050f, 0.905296759318118820f, - 0.424779681209108810f, 0.904644090578246240f, 0.426167888726799620f, - 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-0.997402129901275300f, -0.070504573389614356f, -0.997511456140303450f, - -0.068974327628267079f, -0.997618435138519550f, -0.067443919563664231f, - -0.997723066644191640f, -0.065913352797003832f, -0.997825350411111640f, - -0.064382630929857312f, -0.997925286198596000f, -0.062851757564161989f, - -0.998022873771486130f, -0.061320736302208995f, -0.998118112900149180f, - -0.059789570746640132f, -0.998211003360478190f, -0.058258264500435857f, - -0.998301544933892780f, -0.056726821166907686f, -0.998389737407340160f, - -0.055195244349689712f, -0.998475580573294770f, -0.053663537652731026f, - -0.998559074229759310f, -0.052131704680283657f, -0.998640218180265160f, - -0.050599749036899455f, -0.998719012233872940f, -0.049067674327418029f, - -0.998795456205172410f, -0.047535484156959157f, -0.998869549914283560f, - -0.046003182130915206f, -0.998941293186856870f, -0.044470771854939084f, - -0.999010685854073270f, -0.042938256934941084f, -0.999077727752645360f, - -0.041405640977076837f, -0.999142418724816910f, -0.039872927587739748f, - -0.999204758618363890f, -0.038340120373552472f, -0.999264747286594420f, - -0.036807222941359331f, -0.999322384588349430f, -0.035274238898214294f, - -0.999377670388002850f, -0.033741171851377760f, -0.999430604555461730f, - -0.032208025408304600f, -0.999481186966166950f, -0.030674803176636484f, - -0.999529417501093140f, -0.029141508764194309f, -0.999575296046749220f, - -0.027608145778966163f, -0.999618822495178640f, -0.026074717829104161f, - -0.999659996743959220f, -0.024541228522912389f, -0.999698818696204250f, - -0.023007681468839310f, -0.999735288260561680f, -0.021474080275469286f, - -0.999769405351215280f, -0.019940428551514944f, -0.999801169887884260f, - -0.018406729905805164f, -0.999830581795823400f, -0.016872987947281894f, - -0.999857641005823860f, -0.015339206284988121f, -0.999882347454212560f, - -0.013805388528060250f, -0.999904701082852900f, -0.012271538285720512f, - -0.999924701839144500f, -0.010737659167264916f, -0.999942349676023910f, - -0.009203754782060083f, -0.999957644551963900f, -0.007669828739531199f, - -0.999970586430974140f, -0.006135884649154416f, -0.999981175282601110f, - -0.004601926120448350f, -0.999989411081928400f, -0.003067956762966483f, - -0.999995293809576190f, -0.001533980186285111f, -0.999998823451701880f, -}; - -/* -* @brief Q31 Twiddle factors Table -*/ - -/** -* \par -* Example code for Q31 Twiddle factors Generation:: -* \par -*
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
-* \par -* where N = 4096 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q31(Fixed point 1.31): -* round(twiddleCoefQ31(i) * pow(2, 31)) -* -*/ - -const q31_t twiddleCoefQ31[6144] = { - 0x7fffffff, 0x0, 0x7ffff621, 0x3243f5, 0x7fffd886, 0x6487e3, 0x7fffa72c, - 0x96cbc1, - 0x7fff6216, 0xc90f88, 0x7fff0943, 0xfb5330, 0x7ffe9cb2, 0x12d96b1, - 0x7ffe1c65, 0x15fda03, - 0x7ffd885a, 0x1921d20, 0x7ffce093, 0x1c45ffe, 0x7ffc250f, 0x1f6a297, - 0x7ffb55ce, 0x228e4e2, - 0x7ffa72d1, 0x25b26d7, 0x7ff97c18, 0x28d6870, 0x7ff871a2, 0x2bfa9a4, - 0x7ff75370, 0x2f1ea6c, - 0x7ff62182, 0x3242abf, 0x7ff4dbd9, 0x3566a96, 0x7ff38274, 0x388a9ea, - 0x7ff21553, 0x3bae8b2, - 0x7ff09478, 0x3ed26e6, 0x7feeffe1, 0x41f6480, 0x7fed5791, 0x451a177, - 0x7feb9b85, 0x483ddc3, - 0x7fe9cbc0, 0x4b6195d, 0x7fe7e841, 0x4e8543e, 0x7fe5f108, 0x51a8e5c, - 0x7fe3e616, 0x54cc7b1, - 0x7fe1c76b, 0x57f0035, 0x7fdf9508, 0x5b137df, 0x7fdd4eec, 0x5e36ea9, - 0x7fdaf519, 0x615a48b, - 0x7fd8878e, 0x647d97c, 0x7fd6064c, 0x67a0d76, 0x7fd37153, 0x6ac406f, - 0x7fd0c8a3, 0x6de7262, - 0x7fce0c3e, 0x710a345, 0x7fcb3c23, 0x742d311, 0x7fc85854, 0x77501be, - 0x7fc560cf, 0x7a72f45, - 0x7fc25596, 0x7d95b9e, 0x7fbf36aa, 0x80b86c2, 0x7fbc040a, 0x83db0a7, - 0x7fb8bdb8, 0x86fd947, - 0x7fb563b3, 0x8a2009a, 0x7fb1f5fc, 0x8d42699, 0x7fae7495, 0x9064b3a, - 0x7faadf7c, 0x9386e78, - 0x7fa736b4, 0x96a9049, 0x7fa37a3c, 0x99cb0a7, 0x7f9faa15, 0x9cecf89, - 0x7f9bc640, 0xa00ece8, - 0x7f97cebd, 0xa3308bd, 0x7f93c38c, 0xa6522fe, 0x7f8fa4b0, 0xa973ba5, - 0x7f8b7227, 0xac952aa, - 0x7f872bf3, 0xafb6805, 0x7f82d214, 0xb2d7baf, 0x7f7e648c, 0xb5f8d9f, - 0x7f79e35a, 0xb919dcf, - 0x7f754e80, 0xbc3ac35, 0x7f70a5fe, 0xbf5b8cb, 0x7f6be9d4, 0xc27c389, - 0x7f671a05, 0xc59cc68, - 0x7f62368f, 0xc8bd35e, 0x7f5d3f75, 0xcbdd865, 0x7f5834b7, 0xcefdb76, - 0x7f531655, 0xd21dc87, - 0x7f4de451, 0xd53db92, 0x7f489eaa, 0xd85d88f, 0x7f434563, 0xdb7d376, - 0x7f3dd87c, 0xde9cc40, - 0x7f3857f6, 0xe1bc2e4, 0x7f32c3d1, 0xe4db75b, 0x7f2d1c0e, 0xe7fa99e, - 0x7f2760af, 0xeb199a4, - 0x7f2191b4, 0xee38766, 0x7f1baf1e, 0xf1572dc, 0x7f15b8ee, 0xf475bff, - 0x7f0faf25, 0xf7942c7, - 0x7f0991c4, 0xfab272b, 0x7f0360cb, 0xfdd0926, 0x7efd1c3c, 0x100ee8ad, - 0x7ef6c418, 0x1040c5bb, - 0x7ef05860, 0x1072a048, 0x7ee9d914, 0x10a4784b, 0x7ee34636, 0x10d64dbd, - 0x7edc9fc6, 0x11082096, - 0x7ed5e5c6, 0x1139f0cf, 0x7ecf1837, 0x116bbe60, 0x7ec8371a, 0x119d8941, - 0x7ec14270, 0x11cf516a, - 0x7eba3a39, 0x120116d5, 0x7eb31e78, 0x1232d979, 0x7eabef2c, 0x1264994e, - 0x7ea4ac58, 0x1296564d, - 0x7e9d55fc, 0x12c8106f, 0x7e95ec1a, 0x12f9c7aa, 0x7e8e6eb2, 0x132b7bf9, - 0x7e86ddc6, 0x135d2d53, - 0x7e7f3957, 0x138edbb1, 0x7e778166, 0x13c0870a, 0x7e6fb5f4, 0x13f22f58, - 0x7e67d703, 0x1423d492, - 0x7e5fe493, 0x145576b1, 0x7e57dea7, 0x148715ae, 0x7e4fc53e, 0x14b8b17f, - 0x7e47985b, 0x14ea4a1f, - 0x7e3f57ff, 0x151bdf86, 0x7e37042a, 0x154d71aa, 0x7e2e9cdf, 0x157f0086, - 0x7e26221f, 0x15b08c12, - 0x7e1d93ea, 0x15e21445, 0x7e14f242, 0x16139918, 0x7e0c3d29, 0x16451a83, - 0x7e0374a0, 0x1676987f, - 0x7dfa98a8, 0x16a81305, 0x7df1a942, 0x16d98a0c, 0x7de8a670, 0x170afd8d, - 0x7ddf9034, 0x173c6d80, - 0x7dd6668f, 0x176dd9de, 0x7dcd2981, 0x179f429f, 0x7dc3d90d, 0x17d0a7bc, - 0x7dba7534, 0x1802092c, - 0x7db0fdf8, 0x183366e9, 0x7da77359, 0x1864c0ea, 0x7d9dd55a, 0x18961728, - 0x7d9423fc, 0x18c7699b, - 0x7d8a5f40, 0x18f8b83c, 0x7d808728, 0x192a0304, 0x7d769bb5, 0x195b49ea, - 0x7d6c9ce9, 0x198c8ce7, - 0x7d628ac6, 0x19bdcbf3, 0x7d58654d, 0x19ef0707, 0x7d4e2c7f, 0x1a203e1b, - 0x7d43e05e, 0x1a517128, - 0x7d3980ec, 0x1a82a026, 0x7d2f0e2b, 0x1ab3cb0d, 0x7d24881b, 0x1ae4f1d6, - 0x7d19eebf, 0x1b161479, - 0x7d0f4218, 0x1b4732ef, 0x7d048228, 0x1b784d30, 0x7cf9aef0, 0x1ba96335, - 0x7ceec873, 0x1bda74f6, - 0x7ce3ceb2, 0x1c0b826a, 0x7cd8c1ae, 0x1c3c8b8c, 0x7ccda169, 0x1c6d9053, - 0x7cc26de5, 0x1c9e90b8, - 0x7cb72724, 0x1ccf8cb3, 0x7cabcd28, 0x1d00843d, 0x7ca05ff1, 0x1d31774d, - 0x7c94df83, 0x1d6265dd, - 0x7c894bde, 0x1d934fe5, 0x7c7da505, 0x1dc4355e, 0x7c71eaf9, 0x1df5163f, - 0x7c661dbc, 0x1e25f282, - 0x7c5a3d50, 0x1e56ca1e, 0x7c4e49b7, 0x1e879d0d, 0x7c4242f2, 0x1eb86b46, - 0x7c362904, 0x1ee934c3, - 0x7c29fbee, 0x1f19f97b, 0x7c1dbbb3, 0x1f4ab968, 0x7c116853, 0x1f7b7481, - 0x7c0501d2, 0x1fac2abf, - 0x7bf88830, 0x1fdcdc1b, 0x7bebfb70, 0x200d888d, 0x7bdf5b94, 0x203e300d, - 0x7bd2a89e, 0x206ed295, - 0x7bc5e290, 0x209f701c, 0x7bb9096b, 0x20d0089c, 0x7bac1d31, 0x21009c0c, - 0x7b9f1de6, 0x21312a65, - 0x7b920b89, 0x2161b3a0, 0x7b84e61f, 0x219237b5, 0x7b77ada8, 0x21c2b69c, - 0x7b6a6227, 0x21f3304f, - 0x7b5d039e, 0x2223a4c5, 0x7b4f920e, 0x225413f8, 0x7b420d7a, 0x22847de0, - 0x7b3475e5, 0x22b4e274, - 0x7b26cb4f, 0x22e541af, 0x7b190dbc, 0x23159b88, 0x7b0b3d2c, 0x2345eff8, - 0x7afd59a4, 0x23763ef7, - 0x7aef6323, 0x23a6887f, 0x7ae159ae, 0x23d6cc87, 0x7ad33d45, 0x24070b08, - 0x7ac50dec, 0x243743fa, - 0x7ab6cba4, 0x24677758, 0x7aa8766f, 0x2497a517, 0x7a9a0e50, 0x24c7cd33, - 0x7a8b9348, 0x24f7efa2, - 0x7a7d055b, 0x25280c5e, 0x7a6e648a, 0x2558235f, 0x7a5fb0d8, 0x2588349d, - 0x7a50ea47, 0x25b84012, - 0x7a4210d8, 0x25e845b6, 0x7a332490, 0x26184581, 0x7a24256f, 0x26483f6c, - 0x7a151378, 0x26783370, - 0x7a05eead, 0x26a82186, 0x79f6b711, 0x26d809a5, 0x79e76ca7, 0x2707ebc7, - 0x79d80f6f, 0x2737c7e3, - 0x79c89f6e, 0x27679df4, 0x79b91ca4, 0x27976df1, 0x79a98715, 0x27c737d3, - 0x7999dec4, 0x27f6fb92, - 0x798a23b1, 0x2826b928, 0x797a55e0, 0x2856708d, 0x796a7554, 0x288621b9, - 0x795a820e, 0x28b5cca5, - 0x794a7c12, 0x28e5714b, 0x793a6361, 0x29150fa1, 0x792a37fe, 0x2944a7a2, - 0x7919f9ec, 0x29743946, - 0x7909a92d, 0x29a3c485, 0x78f945c3, 0x29d34958, 0x78e8cfb2, 0x2a02c7b8, - 0x78d846fb, 0x2a323f9e, - 0x78c7aba2, 0x2a61b101, 0x78b6fda8, 0x2a911bdc, 0x78a63d11, 0x2ac08026, - 0x789569df, 0x2aefddd8, - 0x78848414, 0x2b1f34eb, 0x78738bb3, 0x2b4e8558, 0x786280bf, 0x2b7dcf17, - 0x7851633b, 0x2bad1221, - 0x78403329, 0x2bdc4e6f, 0x782ef08b, 0x2c0b83fa, 0x781d9b65, 0x2c3ab2b9, - 0x780c33b8, 0x2c69daa6, - 0x77fab989, 0x2c98fbba, 0x77e92cd9, 0x2cc815ee, 0x77d78daa, 0x2cf72939, - 0x77c5dc01, 0x2d263596, - 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0xb397c649, 0x994e783d, - 0xb3c0200c, 0x99307ee0, 0xb3e88592, 0x9912955f, 0xb410f6d3, 0x98f4bbbc, - 0xb43973ca, 0x98d6f1fe, - 0xb461fc70, 0x98b93828, 0xb48a90c0, 0x989b8e40, 0xb4b330b3, 0x987df449, - 0xb4dbdc42, 0x98606a49, - 0xb5049368, 0x9842f043, 0xb52d561e, 0x9825863d, 0xb556245e, 0x98082c3b, - 0xb57efe22, 0x97eae242, - 0xb5a7e362, 0x97cda855, 0xb5d0d41a, 0x97b07e7a, 0xb5f9d043, 0x979364b5, - 0xb622d7d6, 0x97765b0a, - 0xb64beacd, 0x9759617f, 0xb6750921, 0x973c7817, 0xb69e32cd, 0x971f9ed7, - 0xb6c767ca, 0x9702d5c3, - 0xb6f0a812, 0x96e61ce0, 0xb719f39e, 0x96c97432, 0xb7434a67, 0x96acdbbe, - 0xb76cac69, 0x96905388, - 0xb796199b, 0x9673db94, 0xb7bf91f8, 0x965773e7, 0xb7e9157a, 0x963b1c86, - 0xb812a41a, 0x961ed574, - 0xb83c3dd1, 0x96029eb6, 0xb865e299, 0x95e67850, 0xb88f926d, 0x95ca6247, - 0xb8b94d44, 0x95ae5c9f, - 0xb8e31319, 0x9592675c, 0xb90ce3e6, 0x95768283, 0xb936bfa4, 0x955aae17, - 0xb960a64c, 0x953eea1e, - 0xb98a97d8, 0x9523369c, 0xb9b49442, 0x95079394, 0xb9de9b83, 0x94ec010b, - 0xba08ad95, 0x94d07f05, - 0xba32ca71, 0x94b50d87, 0xba5cf210, 0x9499ac95, 0xba87246d, 0x947e5c33, - 0xbab16180, 0x94631c65, - 0xbadba943, 0x9447ed2f, 0xbb05fbb0, 0x942cce96, 0xbb3058c0, 0x9411c09e, - 0xbb5ac06d, 0x93f6c34a, - 0xbb8532b0, 0x93dbd6a0, 0xbbafaf82, 0x93c0faa3, 0xbbda36dd, 0x93a62f57, - 0xbc04c8ba, 0x938b74c1, - 0xbc2f6513, 0x9370cae4, 0xbc5a0be2, 0x935631c5, 0xbc84bd1f, 0x933ba968, - 0xbcaf78c4, 0x932131d1, - 0xbcda3ecb, 0x9306cb04, 0xbd050f2c, 0x92ec7505, 0xbd2fe9e2, 0x92d22fd9, - 0xbd5acee5, 0x92b7fb82, - 0xbd85be30, 0x929dd806, 0xbdb0b7bb, 0x9283c568, 0xbddbbb7f, 0x9269c3ac, - 0xbe06c977, 0x924fd2d7, - 0xbe31e19b, 0x9235f2ec, 0xbe5d03e6, 0x921c23ef, 0xbe88304f, 0x920265e4, - 0xbeb366d1, 0x91e8b8d0, - 0xbedea765, 0x91cf1cb6, 0xbf09f205, 0x91b5919a, 0xbf3546a8, 0x919c1781, - 0xbf60a54a, 0x9182ae6d, - 0xbf8c0de3, 0x91695663, 0xbfb7806c, 0x91500f67, 0xbfe2fcdf, 0x9136d97d, - 0xc00e8336, 0x911db4a9, - 0xc03a1368, 0x9104a0ee, 0xc065ad70, 0x90eb9e50, 0xc0915148, 0x90d2acd4, - 0xc0bcfee7, 0x90b9cc7d, - 0xc0e8b648, 0x90a0fd4e, 0xc1147764, 0x90883f4d, 0xc1404233, 0x906f927c, - 0xc16c16b0, 0x9056f6df, - 0xc197f4d4, 0x903e6c7b, 0xc1c3dc97, 0x9025f352, 0xc1efcdf3, 0x900d8b69, - 0xc21bc8e1, 0x8ff534c4, - 0xc247cd5a, 0x8fdcef66, 0xc273db58, 0x8fc4bb53, 0xc29ff2d4, 0x8fac988f, - 0xc2cc13c7, 0x8f94871d, - 0xc2f83e2a, 0x8f7c8701, 0xc32471f7, 0x8f649840, 0xc350af26, 0x8f4cbadb, - 0xc37cf5b0, 0x8f34eed8, - 0xc3a94590, 0x8f1d343a, 0xc3d59ebe, 0x8f058b04, 0xc4020133, 0x8eedf33b, - 0xc42e6ce8, 0x8ed66ce1, - 0xc45ae1d7, 0x8ebef7fb, 0xc4875ff9, 0x8ea7948c, 0xc4b3e746, 0x8e904298, - 0xc4e077b8, 0x8e790222, - 0xc50d1149, 0x8e61d32e, 0xc539b3f1, 0x8e4ab5bf, 0xc5665fa9, 0x8e33a9da, - 0xc593146a, 0x8e1caf80, - 0xc5bfd22e, 0x8e05c6b7, 0xc5ec98ee, 0x8deeef82, 0xc61968a2, 0x8dd829e4, - 0xc6464144, 0x8dc175e0, - 0xc67322ce, 0x8daad37b, 0xc6a00d37, 0x8d9442b8, 0xc6cd0079, 0x8d7dc399, - 0xc6f9fc8d, 0x8d675623, - 0xc727016d, 0x8d50fa59, 0xc7540f11, 0x8d3ab03f, 0xc7812572, 0x8d2477d8, - 0xc7ae4489, 0x8d0e5127, - 0xc7db6c50, 0x8cf83c30, 0xc8089cbf, 0x8ce238f6, 0xc835d5d0, 0x8ccc477d, - 0xc863177b, 0x8cb667c8, - 0xc89061ba, 0x8ca099da, 0xc8bdb485, 0x8c8addb7, 0xc8eb0fd6, 0x8c753362, - 0xc91873a5, 0x8c5f9ade, - 0xc945dfec, 0x8c4a142f, 0xc97354a4, 0x8c349f58, 0xc9a0d1c5, 0x8c1f3c5d, - 0xc9ce5748, 0x8c09eb40, - 0xc9fbe527, 0x8bf4ac05, 0xca297b5a, 0x8bdf7eb0, 0xca5719db, 0x8bca6343, - 0xca84c0a3, 0x8bb559c1, - 0xcab26fa9, 0x8ba0622f, 0xcae026e8, 0x8b8b7c8f, 0xcb0de658, 0x8b76a8e4, - 0xcb3badf3, 0x8b61e733, - 0xcb697db0, 0x8b4d377c, 0xcb97558a, 0x8b3899c6, 0xcbc53579, 0x8b240e11, - 0xcbf31d75, 0x8b0f9462, - 0xcc210d79, 0x8afb2cbb, 0xcc4f057c, 0x8ae6d720, 0xcc7d0578, 0x8ad29394, - 0xccab0d65, 0x8abe6219, - 0xccd91d3d, 0x8aaa42b4, 0xcd0734f9, 0x8a963567, 0xcd355491, 0x8a823a36, - 0xcd637bfe, 0x8a6e5123, - 0xcd91ab39, 0x8a5a7a31, 0xcdbfe23a, 0x8a46b564, 0xcdee20fc, 0x8a3302be, - 0xce1c6777, 0x8a1f6243, - 0xce4ab5a2, 0x8a0bd3f5, 0xce790b79, 0x89f857d8, 0xcea768f2, 0x89e4edef, - 0xced5ce08, 0x89d1963c, - 0xcf043ab3, 0x89be50c3, 0xcf32aeeb, 0x89ab1d87, 0xcf612aaa, 0x8997fc8a, - 0xcf8fade9, 0x8984edcf, - 0xcfbe389f, 0x8971f15a, 0xcfeccac7, 0x895f072e, 0xd01b6459, 0x894c2f4c, - 0xd04a054e, 0x893969b9, - 0xd078ad9e, 0x8926b677, 0xd0a75d42, 0x89141589, 0xd0d61434, 0x890186f2, - 0xd104d26b, 0x88ef0ab4, - 0xd13397e2, 0x88dca0d3, 0xd1626490, 0x88ca4951, 0xd191386e, 0x88b80432, - 0xd1c01375, 0x88a5d177, - 0xd1eef59e, 0x8893b125, 0xd21ddee2, 0x8881a33d, 0xd24ccf39, 0x886fa7c2, - 0xd27bc69c, 0x885dbeb8, - 0xd2aac504, 0x884be821, 0xd2d9ca6a, 0x883a23ff, 0xd308d6c7, 0x88287256, - 0xd337ea12, 0x8816d327, - 0xd3670446, 0x88054677, 0xd396255a, 0x87f3cc48, 0xd3c54d47, 0x87e2649b, - 0xd3f47c06, 0x87d10f75, - 0xd423b191, 0x87bfccd7, 0xd452eddf, 0x87ae9cc5, 0xd48230e9, 0x879d7f41, - 0xd4b17aa8, 0x878c744d, - 0xd4e0cb15, 0x877b7bec, 0xd5102228, 0x876a9621, 0xd53f7fda, 0x8759c2ef, - 0xd56ee424, 0x87490258, - 0xd59e4eff, 0x8738545e, 0xd5cdc062, 0x8727b905, 0xd5fd3848, 0x8717304e, - 0xd62cb6a8, 0x8706ba3d, - 0xd65c3b7b, 0x86f656d3, 0xd68bc6ba, 0x86e60614, 0xd6bb585e, 0x86d5c802, - 0xd6eaf05f, 0x86c59c9f, - 0xd71a8eb5, 0x86b583ee, 0xd74a335b, 0x86a57df2, 0xd779de47, 0x86958aac, - 0xd7a98f73, 0x8685aa20, - 0xd7d946d8, 0x8675dc4f, 0xd809046e, 0x8666213c, 0xd838c82d, 0x865678eb, - 0xd868920f, 0x8646e35c, - 0xd898620c, 0x86376092, 0xd8c8381d, 0x8627f091, 0xd8f81439, 0x86189359, - 0xd927f65b, 0x860948ef, - 0xd957de7a, 0x85fa1153, 0xd987cc90, 0x85eaec88, 0xd9b7c094, 0x85dbda91, - 0xd9e7ba7f, 0x85ccdb70, - 0xda17ba4a, 0x85bdef28, 0xda47bfee, 0x85af15b9, 0xda77cb63, 0x85a04f28, - 0xdaa7dca1, 0x85919b76, - 0xdad7f3a2, 0x8582faa5, 0xdb08105e, 0x85746cb8, 0xdb3832cd, 0x8565f1b0, - 0xdb685ae9, 0x85578991, - 0xdb9888a8, 0x8549345c, 0xdbc8bc06, 0x853af214, 0xdbf8f4f8, 0x852cc2bb, - 0xdc293379, 0x851ea652, - 0xdc597781, 0x85109cdd, 0xdc89c109, 0x8502a65c, 0xdcba1008, 0x84f4c2d4, - 0xdcea6478, 0x84e6f244, - 0xdd1abe51, 0x84d934b1, 0xdd4b1d8c, 0x84cb8a1b, 0xdd7b8220, 0x84bdf286, - 0xddabec08, 0x84b06df2, - 0xdddc5b3b, 0x84a2fc62, 0xde0ccfb1, 0x84959dd9, 0xde3d4964, 0x84885258, - 0xde6dc84b, 0x847b19e1, - 0xde9e4c60, 0x846df477, 0xdeced59b, 0x8460e21a, 0xdeff63f4, 0x8453e2cf, - 0xdf2ff764, 0x8446f695, - 0xdf608fe4, 0x843a1d70, 0xdf912d6b, 0x842d5762, 0xdfc1cff3, 0x8420a46c, - 0xdff27773, 0x84140490, - 0xe02323e5, 0x840777d0, 0xe053d541, 0x83fafe2e, 0xe0848b7f, 0x83ee97ad, - 0xe0b54698, 0x83e2444d, - 0xe0e60685, 0x83d60412, 0xe116cb3d, 0x83c9d6fc, 0xe14794ba, 0x83bdbd0e, - 0xe17862f3, 0x83b1b649, - 0xe1a935e2, 0x83a5c2b0, 0xe1da0d7e, 0x8399e244, 0xe20ae9c1, 0x838e1507, - 0xe23bcaa2, 0x83825afb, - 0xe26cb01b, 0x8376b422, 0xe29d9a23, 0x836b207d, 0xe2ce88b3, 0x835fa00f, - 0xe2ff7bc3, 0x835432d8, - 0xe330734d, 0x8348d8dc, 0xe3616f48, 0x833d921b, 0xe3926fad, 0x83325e97, - 0xe3c37474, 0x83273e52, - 0xe3f47d96, 0x831c314e, 0xe4258b0a, 0x8311378d, 0xe4569ccb, 0x83065110, - 0xe487b2d0, 0x82fb7dd8, - 0xe4b8cd11, 0x82f0bde8, 0xe4e9eb87, 0x82e61141, 0xe51b0e2a, 0x82db77e5, - 0xe54c34f3, 0x82d0f1d5, - 0xe57d5fda, 0x82c67f14, 0xe5ae8ed8, 0x82bc1fa2, 0xe5dfc1e5, 0x82b1d381, - 0xe610f8f9, 0x82a79ab3, - 0xe642340d, 0x829d753a, 0xe6737319, 0x82936317, 0xe6a4b616, 0x8289644b, - 0xe6d5fcfc, 0x827f78d8, - 0xe70747c4, 0x8275a0c0, 0xe7389665, 0x826bdc04, 0xe769e8d8, 0x82622aa6, - 0xe79b3f16, 0x82588ca7, - 0xe7cc9917, 0x824f0208, 0xe7fdf6d4, 0x82458acc, 0xe82f5844, 0x823c26f3, - 0xe860bd61, 0x8232d67f, - 0xe8922622, 0x82299971, 0xe8c39280, 0x82206fcc, 0xe8f50273, 0x82175990, - 0xe92675f4, 0x820e56be, - 0xe957ecfb, 0x82056758, 0xe9896781, 0x81fc8b60, 0xe9bae57d, 0x81f3c2d7, - 0xe9ec66e8, 0x81eb0dbe, - 0xea1debbb, 0x81e26c16, 0xea4f73ee, 0x81d9dde1, 0xea80ff7a, 0x81d16321, - 0xeab28e56, 0x81c8fbd6, - 0xeae4207a, 0x81c0a801, 0xeb15b5e1, 0x81b867a5, 0xeb474e81, 0x81b03ac2, - 0xeb78ea52, 0x81a82159, - 0xebaa894f, 0x81a01b6d, 0xebdc2b6e, 0x819828fd, 0xec0dd0a8, 0x81904a0c, - 0xec3f78f6, 0x81887e9a, - 0xec71244f, 0x8180c6a9, 0xeca2d2ad, 0x8179223a, 0xecd48407, 0x8171914e, - 0xed063856, 0x816a13e6, - 0xed37ef91, 0x8162aa04, 0xed69a9b3, 0x815b53a8, 0xed9b66b2, 0x815410d4, - 0xedcd2687, 0x814ce188, - 0xedfee92b, 0x8145c5c7, 0xee30ae96, 0x813ebd90, 0xee6276bf, 0x8137c8e6, - 0xee9441a0, 0x8130e7c9, - 0xeec60f31, 0x812a1a3a, 0xeef7df6a, 0x8123603a, 0xef29b243, 0x811cb9ca, - 0xef5b87b5, 0x811626ec, - 0xef8d5fb8, 0x810fa7a0, 0xefbf3a45, 0x81093be8, 0xeff11753, 0x8102e3c4, - 0xf022f6da, 0x80fc9f35, - 0xf054d8d5, 0x80f66e3c, 0xf086bd39, 0x80f050db, 0xf0b8a401, 0x80ea4712, - 0xf0ea8d24, 0x80e450e2, - 0xf11c789a, 0x80de6e4c, 0xf14e665c, 0x80d89f51, 0xf1805662, 0x80d2e3f2, - 0xf1b248a5, 0x80cd3c2f, - 0xf1e43d1c, 0x80c7a80a, 0xf21633c0, 0x80c22784, 0xf2482c8a, 0x80bcba9d, - 0xf27a2771, 0x80b76156, - 0xf2ac246e, 0x80b21baf, 0xf2de2379, 0x80ace9ab, 0xf310248a, 0x80a7cb49, - 0xf342279b, 0x80a2c08b, - 0xf3742ca2, 0x809dc971, 0xf3a63398, 0x8098e5fb, 0xf3d83c77, 0x8094162c, - 0xf40a4735, 0x808f5a02, - 0xf43c53cb, 0x808ab180, 0xf46e6231, 0x80861ca6, 0xf4a07261, 0x80819b74, - 0xf4d28451, 0x807d2dec, - 0xf50497fb, 0x8078d40d, 0xf536ad56, 0x80748dd9, 0xf568c45b, 0x80705b50, - 0xf59add02, 0x806c3c74, - 0xf5ccf743, 0x80683143, 0xf5ff1318, 0x806439c0, 0xf6313077, 0x806055eb, - 0xf6634f59, 0x805c85c4, - 0xf6956fb7, 0x8058c94c, 0xf6c79188, 0x80552084, 0xf6f9b4c6, 0x80518b6b, - 0xf72bd967, 0x804e0a04, - 0xf75dff66, 0x804a9c4d, 0xf79026b9, 0x80474248, 0xf7c24f59, 0x8043fbf6, - 0xf7f4793e, 0x8040c956, - 0xf826a462, 0x803daa6a, 0xf858d0bb, 0x803a9f31, 0xf88afe42, 0x8037a7ac, - 0xf8bd2cef, 0x8034c3dd, - 0xf8ef5cbb, 0x8031f3c2, 0xf9218d9e, 0x802f375d, 0xf953bf91, 0x802c8ead, - 0xf985f28a, 0x8029f9b4, - 0xf9b82684, 0x80277872, 0xf9ea5b75, 0x80250ae7, 0xfa1c9157, 0x8022b114, - 0xfa4ec821, 0x80206af8, - 0xfa80ffcb, 0x801e3895, 0xfab3384f, 0x801c19ea, 0xfae571a4, 0x801a0ef8, - 0xfb17abc2, 0x801817bf, - 0xfb49e6a3, 0x80163440, 0xfb7c223d, 0x8014647b, 0xfbae5e89, 0x8012a86f, - 0xfbe09b80, 0x8011001f, - 0xfc12d91a, 0x800f6b88, 0xfc45174e, 0x800deaad, 0xfc775616, 0x800c7d8c, - 0xfca9956a, 0x800b2427, - 0xfcdbd541, 0x8009de7e, 0xfd0e1594, 0x8008ac90, 0xfd40565c, 0x80078e5e, - 0xfd729790, 0x800683e8, - 0xfda4d929, 0x80058d2f, 0xfdd71b1e, 0x8004aa32, 0xfe095d69, 0x8003daf1, - 0xfe3ba002, 0x80031f6d, - 0xfe6de2e0, 0x800277a6, 0xfea025fd, 0x8001e39b, 0xfed2694f, 0x8001634e, - 0xff04acd0, 0x8000f6bd, - 0xff36f078, 0x80009dea, 0xff69343f, 0x800058d4, 0xff9b781d, 0x8000277a, - 0xffcdbc0b, 0x800009df, - -}; - - -/* -* @brief Q15 Twiddle factors Table -*/ - -/** -* \par -* Example code for Q15 Twiddle factors Generation:: -* \par -*
for(i = 0; i< 3N/4; i++)    
-* {    
-*	twiddleCoefQ15[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoefQ15[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
-* \par -* where N = 4096 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q15(Fixed point 1.15): -* round(twiddleCoefQ15(i) * pow(2, 15)) -* -*/ - -const q15_t ALIGN4 twiddleCoefQ15[6144] = { - - 0x7fff, 0x0, 0x7fff, 0x32, 0x7fff, 0x65, 0x7fff, 0x97, - 0x7fff, 0xc9, 0x7fff, 0xfb, 0x7fff, 0x12e, 0x7ffe, 0x160, - 0x7ffe, 0x192, 0x7ffd, 0x1c4, 0x7ffc, 0x1f7, 0x7ffb, 0x229, - 0x7ffa, 0x25b, 0x7ff9, 0x28d, 0x7ff8, 0x2c0, 0x7ff7, 0x2f2, - 0x7ff6, 0x324, 0x7ff5, 0x356, 0x7ff4, 0x389, 0x7ff2, 0x3bb, - 0x7ff1, 0x3ed, 0x7fef, 0x41f, 0x7fed, 0x452, 0x7fec, 0x484, - 0x7fea, 0x4b6, 0x7fe8, 0x4e8, 0x7fe6, 0x51b, 0x7fe4, 0x54d, - 0x7fe2, 0x57f, 0x7fe0, 0x5b1, 0x7fdd, 0x5e3, 0x7fdb, 0x616, - 0x7fd9, 0x648, 0x7fd6, 0x67a, 0x7fd3, 0x6ac, 0x7fd1, 0x6de, - 0x7fce, 0x711, 0x7fcb, 0x743, 0x7fc8, 0x775, 0x7fc5, 0x7a7, - 0x7fc2, 0x7d9, 0x7fbf, 0x80c, 0x7fbc, 0x83e, 0x7fb9, 0x870, - 0x7fb5, 0x8a2, 0x7fb2, 0x8d4, 0x7fae, 0x906, 0x7fab, 0x938, - 0x7fa7, 0x96b, 0x7fa3, 0x99d, 0x7fa0, 0x9cf, 0x7f9c, 0xa01, - 0x7f98, 0xa33, 0x7f94, 0xa65, 0x7f90, 0xa97, 0x7f8b, 0xac9, - 0x7f87, 0xafb, 0x7f83, 0xb2d, 0x7f7e, 0xb60, 0x7f7a, 0xb92, - 0x7f75, 0xbc4, 0x7f71, 0xbf6, 0x7f6c, 0xc28, 0x7f67, 0xc5a, - 0x7f62, 0xc8c, 0x7f5d, 0xcbe, 0x7f58, 0xcf0, 0x7f53, 0xd22, - 0x7f4e, 0xd54, 0x7f49, 0xd86, 0x7f43, 0xdb8, 0x7f3e, 0xdea, - 0x7f38, 0xe1c, 0x7f33, 0xe4e, 0x7f2d, 0xe80, 0x7f27, 0xeb2, - 0x7f22, 0xee4, 0x7f1c, 0xf15, 0x7f16, 0xf47, 0x7f10, 0xf79, - 0x7f0a, 0xfab, 0x7f03, 0xfdd, 0x7efd, 0x100f, 0x7ef7, 0x1041, - 0x7ef0, 0x1073, 0x7eea, 0x10a4, 0x7ee3, 0x10d6, 0x7edd, 0x1108, - 0x7ed6, 0x113a, 0x7ecf, 0x116c, 0x7ec8, 0x119e, 0x7ec1, 0x11cf, - 0x7eba, 0x1201, 0x7eb3, 0x1233, 0x7eac, 0x1265, 0x7ea5, 0x1296, - 0x7e9d, 0x12c8, 0x7e96, 0x12fa, 0x7e8e, 0x132b, 0x7e87, 0x135d, - 0x7e7f, 0x138f, 0x7e78, 0x13c1, 0x7e70, 0x13f2, 0x7e68, 0x1424, - 0x7e60, 0x1455, 0x7e58, 0x1487, 0x7e50, 0x14b9, 0x7e48, 0x14ea, - 0x7e3f, 0x151c, 0x7e37, 0x154d, 0x7e2f, 0x157f, 0x7e26, 0x15b1, - 0x7e1e, 0x15e2, 0x7e15, 0x1614, 0x7e0c, 0x1645, 0x7e03, 0x1677, - 0x7dfb, 0x16a8, 0x7df2, 0x16da, 0x7de9, 0x170b, 0x7de0, 0x173c, - 0x7dd6, 0x176e, 0x7dcd, 0x179f, 0x7dc4, 0x17d1, 0x7dba, 0x1802, - 0x7db1, 0x1833, 0x7da7, 0x1865, 0x7d9e, 0x1896, 0x7d94, 0x18c7, - 0x7d8a, 0x18f9, 0x7d81, 0x192a, 0x7d77, 0x195b, 0x7d6d, 0x198d, - 0x7d63, 0x19be, 0x7d58, 0x19ef, 0x7d4e, 0x1a20, 0x7d44, 0x1a51, - 0x7d3a, 0x1a83, 0x7d2f, 0x1ab4, 0x7d25, 0x1ae5, 0x7d1a, 0x1b16, - 0x7d0f, 0x1b47, 0x7d05, 0x1b78, 0x7cfa, 0x1ba9, 0x7cef, 0x1bda, - 0x7ce4, 0x1c0c, 0x7cd9, 0x1c3d, 0x7cce, 0x1c6e, 0x7cc2, 0x1c9f, - 0x7cb7, 0x1cd0, 0x7cac, 0x1d01, 0x7ca0, 0x1d31, 0x7c95, 0x1d62, - 0x7c89, 0x1d93, 0x7c7e, 0x1dc4, 0x7c72, 0x1df5, 0x7c66, 0x1e26, - 0x7c5a, 0x1e57, 0x7c4e, 0x1e88, 0x7c42, 0x1eb8, 0x7c36, 0x1ee9, - 0x7c2a, 0x1f1a, 0x7c1e, 0x1f4b, 0x7c11, 0x1f7b, 0x7c05, 0x1fac, - 0x7bf9, 0x1fdd, 0x7bec, 0x200e, 0x7bdf, 0x203e, 0x7bd3, 0x206f, - 0x7bc6, 0x209f, 0x7bb9, 0x20d0, 0x7bac, 0x2101, 0x7b9f, 0x2131, - 0x7b92, 0x2162, 0x7b85, 0x2192, 0x7b78, 0x21c3, 0x7b6a, 0x21f3, - 0x7b5d, 0x2224, 0x7b50, 0x2254, 0x7b42, 0x2284, 0x7b34, 0x22b5, - 0x7b27, 0x22e5, 0x7b19, 0x2316, 0x7b0b, 0x2346, 0x7afd, 0x2376, - 0x7aef, 0x23a7, 0x7ae1, 0x23d7, 0x7ad3, 0x2407, 0x7ac5, 0x2437, - 0x7ab7, 0x2467, 0x7aa8, 0x2498, 0x7a9a, 0x24c8, 0x7a8c, 0x24f8, - 0x7a7d, 0x2528, 0x7a6e, 0x2558, 0x7a60, 0x2588, 0x7a51, 0x25b8, - 0x7a42, 0x25e8, 0x7a33, 0x2618, 0x7a24, 0x2648, 0x7a15, 0x2678, - 0x7a06, 0x26a8, 0x79f7, 0x26d8, 0x79e7, 0x2708, 0x79d8, 0x2738, - 0x79c9, 0x2768, 0x79b9, 0x2797, 0x79aa, 0x27c7, 0x799a, 0x27f7, - 0x798a, 0x2827, 0x797a, 0x2856, 0x796a, 0x2886, 0x795b, 0x28b6, - 0x794a, 0x28e5, 0x793a, 0x2915, 0x792a, 0x2945, 0x791a, 0x2974, - 0x790a, 0x29a4, 0x78f9, 0x29d3, 0x78e9, 0x2a03, 0x78d8, 0x2a32, - 0x78c8, 0x2a62, 0x78b7, 0x2a91, 0x78a6, 0x2ac1, 0x7895, 0x2af0, - 0x7885, 0x2b1f, 0x7874, 0x2b4f, 0x7863, 0x2b7e, 0x7851, 0x2bad, - 0x7840, 0x2bdc, 0x782f, 0x2c0c, 0x781e, 0x2c3b, 0x780c, 0x2c6a, - 0x77fb, 0x2c99, 0x77e9, 0x2cc8, 0x77d8, 0x2cf7, 0x77c6, 0x2d26, - 0x77b4, 0x2d55, 0x77a2, 0x2d84, 0x7790, 0x2db3, 0x777e, 0x2de2, - 0x776c, 0x2e11, 0x775a, 0x2e40, 0x7748, 0x2e6f, 0x7736, 0x2e9e, - 0x7723, 0x2ecc, 0x7711, 0x2efb, 0x76fe, 0x2f2a, 0x76ec, 0x2f59, - 0x76d9, 0x2f87, 0x76c7, 0x2fb6, 0x76b4, 0x2fe5, 0x76a1, 0x3013, - 0x768e, 0x3042, 0x767b, 0x3070, 0x7668, 0x309f, 0x7655, 0x30cd, - 0x7642, 0x30fc, 0x762e, 0x312a, 0x761b, 0x3159, 0x7608, 0x3187, - 0x75f4, 0x31b5, 0x75e1, 0x31e4, 0x75cd, 0x3212, 0x75b9, 0x3240, - 0x75a6, 0x326e, 0x7592, 0x329d, 0x757e, 0x32cb, 0x756a, 0x32f9, - 0x7556, 0x3327, 0x7542, 0x3355, 0x752d, 0x3383, 0x7519, 0x33b1, - 0x7505, 0x33df, 0x74f0, 0x340d, 0x74dc, 0x343b, 0x74c7, 0x3469, - 0x74b3, 0x3497, 0x749e, 0x34c4, 0x7489, 0x34f2, 0x7475, 0x3520, - 0x7460, 0x354e, 0x744b, 0x357b, 0x7436, 0x35a9, 0x7421, 0x35d7, - 0x740b, 0x3604, 0x73f6, 0x3632, 0x73e1, 0x365f, 0x73cb, 0x368d, - 0x73b6, 0x36ba, 0x73a0, 0x36e8, 0x738b, 0x3715, 0x7375, 0x3742, - 0x735f, 0x3770, 0x734a, 0x379d, 0x7334, 0x37ca, 0x731e, 0x37f7, - 0x7308, 0x3825, 0x72f2, 0x3852, 0x72dc, 0x387f, 0x72c5, 0x38ac, - 0x72af, 0x38d9, 0x7299, 0x3906, 0x7282, 0x3933, 0x726c, 0x3960, - 0x7255, 0x398d, 0x723f, 0x39ba, 0x7228, 0x39e7, 0x7211, 0x3a13, - 0x71fa, 0x3a40, 0x71e3, 0x3a6d, 0x71cc, 0x3a9a, 0x71b5, 0x3ac6, - 0x719e, 0x3af3, 0x7187, 0x3b20, 0x7170, 0x3b4c, 0x7158, 0x3b79, - 0x7141, 0x3ba5, 0x712a, 0x3bd2, 0x7112, 0x3bfe, 0x70fa, 0x3c2a, - 0x70e3, 0x3c57, 0x70cb, 0x3c83, 0x70b3, 0x3caf, 0x709b, 0x3cdc, - 0x7083, 0x3d08, 0x706b, 0x3d34, 0x7053, 0x3d60, 0x703b, 0x3d8c, - 0x7023, 0x3db8, 0x700b, 0x3de4, 0x6ff2, 0x3e10, 0x6fda, 0x3e3c, - 0x6fc2, 0x3e68, 0x6fa9, 0x3e94, 0x6f90, 0x3ec0, 0x6f78, 0x3eec, - 0x6f5f, 0x3f17, 0x6f46, 0x3f43, 0x6f2d, 0x3f6f, 0x6f14, 0x3f9a, - 0x6efb, 0x3fc6, 0x6ee2, 0x3ff1, 0x6ec9, 0x401d, 0x6eb0, 0x4048, - 0x6e97, 0x4074, 0x6e7d, 0x409f, 0x6e64, 0x40cb, 0x6e4a, 0x40f6, - 0x6e31, 0x4121, 0x6e17, 0x414d, 0x6dfe, 0x4178, 0x6de4, 0x41a3, - 0x6dca, 0x41ce, 0x6db0, 0x41f9, 0x6d96, 0x4224, 0x6d7c, 0x424f, - 0x6d62, 0x427a, 0x6d48, 0x42a5, 0x6d2e, 0x42d0, 0x6d14, 0x42fb, - 0x6cf9, 0x4326, 0x6cdf, 0x4351, 0x6cc4, 0x437b, 0x6caa, 0x43a6, - 0x6c8f, 0x43d1, 0x6c75, 0x43fb, 0x6c5a, 0x4426, 0x6c3f, 0x4450, - 0x6c24, 0x447b, 0x6c09, 0x44a5, 0x6bee, 0x44d0, 0x6bd3, 0x44fa, - 0x6bb8, 0x4524, 0x6b9d, 0x454f, 0x6b82, 0x4579, 0x6b66, 0x45a3, - 0x6b4b, 0x45cd, 0x6b30, 0x45f7, 0x6b14, 0x4621, 0x6af8, 0x464b, - 0x6add, 0x4675, 0x6ac1, 0x469f, 0x6aa5, 0x46c9, 0x6a89, 0x46f3, - 0x6a6e, 0x471d, 0x6a52, 0x4747, 0x6a36, 0x4770, 0x6a1a, 0x479a, - 0x69fd, 0x47c4, 0x69e1, 0x47ed, 0x69c5, 0x4817, 0x69a9, 0x4840, - 0x698c, 0x486a, 0x6970, 0x4893, 0x6953, 0x48bd, 0x6937, 0x48e6, - 0x691a, 0x490f, 0x68fd, 0x4939, 0x68e0, 0x4962, 0x68c4, 0x498b, - 0x68a7, 0x49b4, 0x688a, 0x49dd, 0x686d, 0x4a06, 0x6850, 0x4a2f, - 0x6832, 0x4a58, 0x6815, 0x4a81, 0x67f8, 0x4aaa, 0x67da, 0x4ad3, - 0x67bd, 0x4afb, 0x67a0, 0x4b24, 0x6782, 0x4b4d, 0x6764, 0x4b75, - 0x6747, 0x4b9e, 0x6729, 0x4bc7, 0x670b, 0x4bef, 0x66ed, 0x4c17, - 0x66d0, 0x4c40, 0x66b2, 0x4c68, 0x6693, 0x4c91, 0x6675, 0x4cb9, - 0x6657, 0x4ce1, 0x6639, 0x4d09, 0x661b, 0x4d31, 0x65fc, 0x4d59, - 0x65de, 0x4d81, 0x65c0, 0x4da9, 0x65a1, 0x4dd1, 0x6582, 0x4df9, - 0x6564, 0x4e21, 0x6545, 0x4e49, 0x6526, 0x4e71, 0x6507, 0x4e98, - 0x64e9, 0x4ec0, 0x64ca, 0x4ee8, 0x64ab, 0x4f0f, 0x648b, 0x4f37, - 0x646c, 0x4f5e, 0x644d, 0x4f85, 0x642e, 0x4fad, 0x640f, 0x4fd4, - 0x63ef, 0x4ffb, 0x63d0, 0x5023, 0x63b0, 0x504a, 0x6391, 0x5071, - 0x6371, 0x5098, 0x6351, 0x50bf, 0x6332, 0x50e6, 0x6312, 0x510d, - 0x62f2, 0x5134, 0x62d2, 0x515b, 0x62b2, 0x5181, 0x6292, 0x51a8, - 0x6272, 0x51cf, 0x6252, 0x51f5, 0x6232, 0x521c, 0x6211, 0x5243, - 0x61f1, 0x5269, 0x61d1, 0x5290, 0x61b0, 0x52b6, 0x6190, 0x52dc, - 0x616f, 0x5303, 0x614e, 0x5329, 0x612e, 0x534f, 0x610d, 0x5375, - 0x60ec, 0x539b, 0x60cb, 0x53c1, 0x60aa, 0x53e7, 0x6089, 0x540d, - 0x6068, 0x5433, 0x6047, 0x5459, 0x6026, 0x547f, 0x6005, 0x54a4, - 0x5fe4, 0x54ca, 0x5fc2, 0x54f0, 0x5fa1, 0x5515, 0x5f80, 0x553b, - 0x5f5e, 0x5560, 0x5f3c, 0x5586, 0x5f1b, 0x55ab, 0x5ef9, 0x55d0, - 0x5ed7, 0x55f6, 0x5eb6, 0x561b, 0x5e94, 0x5640, 0x5e72, 0x5665, - 0x5e50, 0x568a, 0x5e2e, 0x56af, 0x5e0c, 0x56d4, 0x5dea, 0x56f9, - 0x5dc8, 0x571e, 0x5da5, 0x5743, 0x5d83, 0x5767, 0x5d61, 0x578c, - 0x5d3e, 0x57b1, 0x5d1c, 0x57d5, 0x5cf9, 0x57fa, 0x5cd7, 0x581e, - 0x5cb4, 0x5843, 0x5c91, 0x5867, 0x5c6f, 0x588c, 0x5c4c, 0x58b0, - 0x5c29, 0x58d4, 0x5c06, 0x58f8, 0x5be3, 0x591c, 0x5bc0, 0x5940, - 0x5b9d, 0x5964, 0x5b7a, 0x5988, 0x5b57, 0x59ac, 0x5b34, 0x59d0, - 0x5b10, 0x59f4, 0x5aed, 0x5a18, 0x5ac9, 0x5a3b, 0x5aa6, 0x5a5f, - 0x5a82, 0x5a82, 0x5a5f, 0x5aa6, 0x5a3b, 0x5ac9, 0x5a18, 0x5aed, - 0x59f4, 0x5b10, 0x59d0, 0x5b34, 0x59ac, 0x5b57, 0x5988, 0x5b7a, - 0x5964, 0x5b9d, 0x5940, 0x5bc0, 0x591c, 0x5be3, 0x58f8, 0x5c06, - 0x58d4, 0x5c29, 0x58b0, 0x5c4c, 0x588c, 0x5c6f, 0x5867, 0x5c91, - 0x5843, 0x5cb4, 0x581e, 0x5cd7, 0x57fa, 0x5cf9, 0x57d5, 0x5d1c, - 0x57b1, 0x5d3e, 0x578c, 0x5d61, 0x5767, 0x5d83, 0x5743, 0x5da5, - 0x571e, 0x5dc8, 0x56f9, 0x5dea, 0x56d4, 0x5e0c, 0x56af, 0x5e2e, - 0x568a, 0x5e50, 0x5665, 0x5e72, 0x5640, 0x5e94, 0x561b, 0x5eb6, - 0x55f6, 0x5ed7, 0x55d0, 0x5ef9, 0x55ab, 0x5f1b, 0x5586, 0x5f3c, - 0x5560, 0x5f5e, 0x553b, 0x5f80, 0x5515, 0x5fa1, 0x54f0, 0x5fc2, - 0x54ca, 0x5fe4, 0x54a4, 0x6005, 0x547f, 0x6026, 0x5459, 0x6047, - 0x5433, 0x6068, 0x540d, 0x6089, 0x53e7, 0x60aa, 0x53c1, 0x60cb, - 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0xd958, 0x85fa, 0xd988, 0x85eb, 0xd9b8, 0x85dc, 0xd9e8, 0x85cd, - 0xda18, 0x85be, 0xda48, 0x85af, 0xda78, 0x85a0, 0xdaa8, 0x8592, - 0xdad8, 0x8583, 0xdb08, 0x8574, 0xdb38, 0x8566, 0xdb68, 0x8558, - 0xdb99, 0x8549, 0xdbc9, 0x853b, 0xdbf9, 0x852d, 0xdc29, 0x851f, - 0xdc59, 0x8511, 0xdc8a, 0x8503, 0xdcba, 0x84f5, 0xdcea, 0x84e7, - 0xdd1b, 0x84d9, 0xdd4b, 0x84cc, 0xdd7c, 0x84be, 0xddac, 0x84b0, - 0xdddc, 0x84a3, 0xde0d, 0x8496, 0xde3d, 0x8488, 0xde6e, 0x847b, - 0xde9e, 0x846e, 0xdecf, 0x8461, 0xdeff, 0x8454, 0xdf30, 0x8447, - 0xdf61, 0x843a, 0xdf91, 0x842d, 0xdfc2, 0x8421, 0xdff2, 0x8414, - 0xe023, 0x8407, 0xe054, 0x83fb, 0xe085, 0x83ef, 0xe0b5, 0x83e2, - 0xe0e6, 0x83d6, 0xe117, 0x83ca, 0xe148, 0x83be, 0xe178, 0x83b2, - 0xe1a9, 0x83a6, 0xe1da, 0x839a, 0xe20b, 0x838e, 0xe23c, 0x8382, - 0xe26d, 0x8377, 0xe29e, 0x836b, 0xe2cf, 0x8360, 0xe2ff, 0x8354, - 0xe330, 0x8349, 0xe361, 0x833e, 0xe392, 0x8332, 0xe3c3, 0x8327, - 0xe3f4, 0x831c, 0xe426, 0x8311, 0xe457, 0x8306, 0xe488, 0x82fb, - 0xe4b9, 0x82f1, 0xe4ea, 0x82e6, 0xe51b, 0x82db, 0xe54c, 0x82d1, - 0xe57d, 0x82c6, 0xe5af, 0x82bc, 0xe5e0, 0x82b2, 0xe611, 0x82a8, - 0xe642, 0x829d, 0xe673, 0x8293, 0xe6a5, 0x8289, 0xe6d6, 0x827f, - 0xe707, 0x8276, 0xe739, 0x826c, 0xe76a, 0x8262, 0xe79b, 0x8259, - 0xe7cd, 0x824f, 0xe7fe, 0x8246, 0xe82f, 0x823c, 0xe861, 0x8233, - 0xe892, 0x822a, 0xe8c4, 0x8220, 0xe8f5, 0x8217, 0xe926, 0x820e, - 0xe958, 0x8205, 0xe989, 0x81fd, 0xe9bb, 0x81f4, 0xe9ec, 0x81eb, - 0xea1e, 0x81e2, 0xea4f, 0x81da, 0xea81, 0x81d1, 0xeab3, 0x81c9, - 0xeae4, 0x81c1, 0xeb16, 0x81b8, 0xeb47, 0x81b0, 0xeb79, 0x81a8, - 0xebab, 0x81a0, 0xebdc, 0x8198, 0xec0e, 0x8190, 0xec3f, 0x8188, - 0xec71, 0x8181, 0xeca3, 0x8179, 0xecd5, 0x8172, 0xed06, 0x816a, - 0xed38, 0x8163, 0xed6a, 0x815b, 0xed9b, 0x8154, 0xedcd, 0x814d, - 0xedff, 0x8146, 0xee31, 0x813f, 0xee62, 0x8138, 0xee94, 0x8131, - 0xeec6, 0x812a, 0xeef8, 0x8123, 0xef2a, 0x811d, 0xef5c, 0x8116, - 0xef8d, 0x8110, 0xefbf, 0x8109, 0xeff1, 0x8103, 0xf023, 0x80fd, - 0xf055, 0x80f6, 0xf087, 0x80f0, 0xf0b9, 0x80ea, 0xf0eb, 0x80e4, - 0xf11c, 0x80de, 0xf14e, 0x80d9, 0xf180, 0x80d3, 0xf1b2, 0x80cd, - 0xf1e4, 0x80c8, 0xf216, 0x80c2, 0xf248, 0x80bd, 0xf27a, 0x80b7, - 0xf2ac, 0x80b2, 0xf2de, 0x80ad, 0xf310, 0x80a8, 0xf342, 0x80a3, - 0xf374, 0x809e, 0xf3a6, 0x8099, 0xf3d8, 0x8094, 0xf40a, 0x808f, - 0xf43c, 0x808b, 0xf46e, 0x8086, 0xf4a0, 0x8082, 0xf4d3, 0x807d, - 0xf505, 0x8079, 0xf537, 0x8075, 0xf569, 0x8070, 0xf59b, 0x806c, - 0xf5cd, 0x8068, 0xf5ff, 0x8064, 0xf631, 0x8060, 0xf663, 0x805d, - 0xf695, 0x8059, 0xf6c8, 0x8055, 0xf6fa, 0x8052, 0xf72c, 0x804e, - 0xf75e, 0x804b, 0xf790, 0x8047, 0xf7c2, 0x8044, 0xf7f4, 0x8041, - 0xf827, 0x803e, 0xf859, 0x803b, 0xf88b, 0x8038, 0xf8bd, 0x8035, - 0xf8ef, 0x8032, 0xf922, 0x802f, 0xf954, 0x802d, 0xf986, 0x802a, - 0xf9b8, 0x8027, 0xf9ea, 0x8025, 0xfa1d, 0x8023, 0xfa4f, 0x8020, - 0xfa81, 0x801e, 0xfab3, 0x801c, 0xfae5, 0x801a, 0xfb18, 0x8018, - 0xfb4a, 0x8016, 0xfb7c, 0x8014, 0xfbae, 0x8013, 0xfbe1, 0x8011, - 0xfc13, 0x800f, 0xfc45, 0x800e, 0xfc77, 0x800c, 0xfcaa, 0x800b, - 0xfcdc, 0x800a, 0xfd0e, 0x8009, 0xfd40, 0x8008, 0xfd73, 0x8007, - 0xfda5, 0x8006, 0xfdd7, 0x8005, 0xfe09, 0x8004, 0xfe3c, 0x8003, - 0xfe6e, 0x8002, 0xfea0, 0x8002, 0xfed2, 0x8001, 0xff05, 0x8001, - 0xff37, 0x8001, 0xff69, 0x8000, 0xff9b, 0x8000, 0xffce, 0x8000, -}; - -/** - * @} end of CFFT_CIFFT group - */ - -/* -* @brief Q15 table for reciprocal -*/ -const q15_t ALIGN4 armRecipTableQ15[64] = { - 0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0, - 0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82, - 0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484, - 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0, - 0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E, - 0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255, - 0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6, - 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978, - 0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8, - 0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255, - 0x41CC, 0x4146, 0x40C2, 0x4040 -}; - -/* -* @brief Q31 table for reciprocal -*/ -const q31_t armRecipTableQ31[64] = { - 0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928, - 0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3, - 0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519, - 0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB, - 0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318, - 0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0, - 0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D, - 0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96, - 0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2, - 0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426, - 0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102 -}; diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c deleted file mode 100644 index cdaf4c84e1..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c +++ /dev/null @@ -1,174 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cmplx_conj_f32.c -* -* Description: Floating-point complex conjugate. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ -#include "arm_math.h" - -/** - * @ingroup groupCmplxMath - */ - -/** - * @defgroup cmplx_conj Complex Conjugate - * - * Conjugates the elements of a complex data vector. - * - * The pSrc points to the source data and - * pDst points to the where the result should be written. - * numSamples specifies the number of complex samples - * and the data in each array is stored in an interleaved fashion - * (real, imag, real, imag, ...). - * Each array has a total of 2*numSamples values. - * The underlying algorithm is used: - * - *
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup cmplx_conj        
- * @{        
- */
-
-/**        
- * @brief  Floating-point complex conjugate.        
- * @param  *pSrc points to the input vector        
- * @param  *pDst points to the output vector        
- * @param  numSamples number of complex samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_conj_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inR1, inR2, inR3, inR4;
-  float32_t inI1, inI2, inI3, inI4;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* read real input samples */
-    inR1 = pSrc[0];
-    /* store real samples to destination */
-    pDst[0] = inR1;
-    inR2 = pSrc[2];
-    pDst[2] = inR2;
-    inR3 = pSrc[4];
-    pDst[4] = inR3;
-    inR4 = pSrc[6];
-    pDst[6] = inR4;
-
-    /* read imaginary input samples */
-    inI1 = pSrc[1];
-    inI2 = pSrc[3];
-
-    /* conjugate input */
-    inI1 = -inI1;
-
-    /* read imaginary input samples */
-    inI3 = pSrc[5];
-
-    /* conjugate input */
-    inI2 = -inI2;
-
-    /* read imaginary input samples */
-    inI4 = pSrc[7];
-
-    /* conjugate input */
-    inI3 = -inI3;
-
-    /* store imaginary samples to destination */
-    pDst[1] = inI1;
-    pDst[3] = inI2;
-
-    /* conjugate input */
-    inI4 = -inI4;
-
-    /* store imaginary samples to destination */
-    pDst[5] = inI3;
-
-    /* increment source pointer by 8 to process next sampels */
-    pSrc += 8u;
-
-    /* store imaginary sample to destination */
-    pDst[7] = inI4;
-
-    /* increment destination pointer by 8 to store next samples */
-    pDst += 8u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* realOut + j (imagOut) = realIn + j (-1) imagIn */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    *pDst++ = -*pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_conj group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
deleted file mode 100644
index 92905fdf49..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_conj_q15.c    
-*    
-* Description:	Q15 complex conjugate.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_conj    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex conjugate.    
- * @param  *pSrc points to the input vector    
- * @param  *pDst points to the output vector    
- * @param  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.    
- */
-
-void arm_cmplx_conj_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t zero = 0;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    in1 = __QASX(zero, in1);
-    in2 = __QASX(zero, in2);
-    in3 = __QASX(zero, in3);
-    in4 = __QASX(zero, in4);
-
-#else
-
-    in1 = __QSAX(zero, in1);
-    in2 = __QSAX(zero, in2);
-    in3 = __QSAX(zero, in3);
-    in4 = __QSAX(zero, in4);
-
-#endif //       #ifndef ARM_MATH_BIG_ENDIAN
-
-    in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16);
-    in2 = ((uint32_t) in2 >> 16) | ((uint32_t) in2 << 16);
-    in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16);
-    in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16);
-
-    *__SIMD32(pDst)++ = in1;
-    *__SIMD32(pDst)++ = in2;
-    *__SIMD32(pDst)++ = in3;
-    *__SIMD32(pDst)++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    *pDst++ = __SSAT(-*pSrc++, 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  q15_t in;
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut + j (imagOut) = realIn+ j (-1) imagIn */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of cmplx_conj group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
deleted file mode 100644
index 5f874aa690..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_conj_q31.c    
-*    
-* Description:	Q31 complex conjugate.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @addtogroup cmplx_conj        
- * @{        
- */
-
-/**        
- * @brief  Q31 complex conjugate.        
- * @param  *pSrc points to the input vector        
- * @param  *pDst points to the output vector        
- * @param  numSamples number of complex samples in each vector        
- * @return none.        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function uses saturating arithmetic.        
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.        
- */
-
-void arm_cmplx_conj_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in;                                      /* Input value */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inR1, inR2, inR3, inR4;                  /* Temporary real variables */
-  q31_t inI1, inI2, inI3, inI4;                  /* Temporary imaginary variables */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
-    /* read real input sample */
-    inR1 = pSrc[0];
-    /* store real input sample */
-    pDst[0] = inR1;
-
-    /* read imaginary input sample */
-    inI1 = pSrc[1];
-
-    /* read real input sample */
-    inR2 = pSrc[2];
-    /* store real input sample */
-    pDst[2] = inR2;
-
-    /* read imaginary input sample */
-    inI2 = pSrc[3];
-
-    /* negate imaginary input sample */
-    inI1 = __QSUB(0, inI1);
-
-    /* read real input sample */
-    inR3 = pSrc[4];
-    /* store real input sample */
-    pDst[4] = inR3;
-
-    /* read imaginary input sample */
-    inI3 = pSrc[5];
-
-    /* negate imaginary input sample */
-    inI2 = __QSUB(0, inI2);
-
-    /* read real input sample */
-    inR4 = pSrc[6];
-    /* store real input sample */
-    pDst[6] = inR4;
-
-    /* negate imaginary input sample */
-    inI3 = __QSUB(0, inI3);
-
-    /* store imaginary input sample */
-    inI4 = pSrc[7];
-
-    /* store imaginary input samples */
-    pDst[1] = inI1;
-
-    /* negate imaginary input sample */
-    inI4 = __QSUB(0, inI4);
-
-    /* store imaginary input samples */
-    pDst[3] = inI2;
-
-    /* increment source pointer by 8 to proecess next samples */
-    pSrc += 8u;
-
-    /* store imaginary input samples */
-    pDst[5] = inI3;
-    pDst[7] = inI4;
-
-    /* increment destination pointer by 8 to process next samples */
-    pDst += 8u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
-    *pDst++ = *pSrc++;
-    in = *pSrc++;
-    *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_conj group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
deleted file mode 100644
index 200b309aae..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_f32.c    
-*    
-* Description:	Floating-point complex dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @defgroup cmplx_dot_prod Complex Dot Product    
- *    
- * Computes the dot product of two complex vectors.    
- * The vectors are multiplied element-by-element and then summed.    
- *   
- * The pSrcA points to the first complex input vector and    
- * pSrcB points to the second complex input vector.    
- * numSamples specifies the number of complex samples    
- * and the data in each array is stored in an interleaved fashion    
- * (real, imag, real, imag, ...).    
- * Each array has a total of 2*numSamples values.    
- *    
- * The underlying algorithm is used:    
- * 
    
- * realResult=0;    
- * imagResult=0;    
- * for(n=0; n    
- *    
- * There are separate functions for floating-point, Q15, and Q31 data types.    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Floating-point complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- */
-
-void arm_cmplx_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t numSamples,
-  float32_t * realResult,
-  float32_t * imagResult)
-{
-  float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result storage */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Store the real and imaginary results in the destination buffers */
-  *realResult = real_sum;
-  *imagResult = imag_sum;
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
deleted file mode 100644
index db7fbae527..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
+++ /dev/null
@@ -1,144 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_q15.c    
-*    
-* Description:	Processing function for the Q15 Complex Dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.    
- * These are accumulated in a 64-bit accumulator with 34.30 precision.    
- * As a final step, the accumulators are converted to 8.24 format.    
- * The return results realResult and imagResult are in 8.24 format.    
- */
-
-void arm_cmplx_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t numSamples,
-  q31_t * realResult,
-  q31_t * imagResult)
-{
-  q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Store the real and imaginary results in 8.24 format  */
-  /* Convert real data in 34.30 to 8.24 by 6 right shifts */
-  *realResult = (q31_t) (real_sum) >> 6;
-  /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
-  *imagResult = (q31_t) (imag_sum) >> 6;
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
deleted file mode 100644
index 1acc49dc2c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_q31.c    
-*    
-* Description:	Q31 complex dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Q31 complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.    
- * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.    
- * Additions are nonsaturating and no overflow will occur as long as numSamples is less than 32768.    
- * The return results realResult and imagResult are in 16.48 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t numSamples,
-  q63_t * realResult,
-  q63_t * imagResult)
-{
-  q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    /* Convert real data in 2.62 to 16.48 by 14 right shifts */
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    /* Convert imag data in 2.62 to 16.48 by 14 right shifts */
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples  is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* outReal = realA[0]* realB[0] + realA[2]* realB[2] + realA[4]* realB[4] + .....+ realA[numSamples-2]* realB[numSamples-2] */
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    /* outImag = imagA[1]* imagB[1] + imagA[3]* imagB[3] + imagA[5]* imagB[5] + .....+ imagA[numSamples-1]* imagB[numSamples-1] */
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Store the real and imaginary results in 16.48 format  */
-  *realResult = real_sum;
-  *imagResult = imag_sum;
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
deleted file mode 100644
index 043e002a84..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_f32.c    
-*    
-* Description:	Floating-point complex magnitude.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @defgroup cmplx_mag Complex Magnitude    
- *    
- * Computes the magnitude of the elements of a complex data vector.    
- *   
- * The pSrc points to the source data and    
- * pDst points to the where the result should be written.    
- * numSamples specifies the number of complex samples    
- * in the input array and the data is stored in an interleaved fashion    
- * (real, imag, real, imag, ...).    
- * The input array has a total of 2*numSamples values;    
- * the output array has a total of numSamples values.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * for(n=0; n    
- *    
- * There are separate functions for floating-point, Q15, and Q31 data types.    
- */
-
-/**    
- * @addtogroup cmplx_mag    
- * @{    
- */
-/**    
- * @brief Floating-point complex magnitude.    
- * @param[in]       *pSrc points to complex input buffer    
- * @param[out]      *pDst points to real output buffer    
- * @param[in]       numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- */
-
-
-void arm_cmplx_mag_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t realIn, imagIn;                      /* Temporary variables to hold input values */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* out = sqrt((real * real) + (imag * imag)) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of cmplx_mag group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
deleted file mode 100644
index 13b862b5a2..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_q15.c    
-*    
-* Description:	Q15 complex magnitude.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag    
- * @{    
- */
-
-
-/**    
- * @brief  Q15 complex magnitude    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.    
- */
-
-void arm_cmplx_mag_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t acc2, acc3;
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-    acc0 = __SMUAD(in1, in1);
-    acc1 = __SMUAD(in2, in2);
-    acc2 = __SMUAD(in3, in3);
-    acc3 = __SMUAD(in4, in4);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) ((acc0) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc1) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc2) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc3) >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    acc0 = __SMUAD(in1, in1);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t real, imag;                              /* Temporary variables to hold input values */
-
-  while(numSamples > 0u)
-  {
-    /* out = sqrt(real * real + imag * imag) */
-    real = *pSrc++;
-    imag = *pSrc++;
-
-    acc0 = (real * real);
-    acc1 = (imag * imag);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of cmplx_mag group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
deleted file mode 100644
index bf1af75e6b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_q31.c    
-*    
-* Description:	Q31 complex magnitude    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @addtogroup cmplx_mag        
- * @{        
- */
-
-/**        
- * @brief  Q31 complex magnitude        
- * @param  *pSrc points to the complex input vector        
- * @param  *pDst points to the real output vector        
- * @param  numSamples number of complex samples in the input vector        
- * @return none.        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.        
- * Input down scaling is not required.        
- */
-
-void arm_cmplx_mag_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t real, imag;                              /* Temporary variables to hold input values */
-  q31_t acc0, acc1;                              /* Accumulators */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t real1, real2, imag1, imag2;              /* Temporary variables to hold input values */
-  q31_t out1, out2, out3, out4;                  /* Accumulators */
-  q63_t mul1, mul2, mul3, mul4;                  /* Temporary variables */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* read complex input from source buffer */
-    real1 = pSrc[0];
-    imag1 = pSrc[1];
-    real2 = pSrc[2];
-    imag2 = pSrc[3];
-
-    /* calculate power of input values */
-    mul1 = (q63_t) real1 *real1;
-    mul2 = (q63_t) imag1 *imag1;
-    mul3 = (q63_t) real2 *real2;
-    mul4 = (q63_t) imag2 *imag2;
-
-    /* get the result to 3.29 format */
-    out1 = (q31_t) (mul1 >> 33);
-    out2 = (q31_t) (mul2 >> 33);
-    out3 = (q31_t) (mul3 >> 33);
-    out4 = (q31_t) (mul4 >> 33);
-
-    /* add real and imaginary accumulators */
-    out1 = out1 + out2;
-    out3 = out3 + out4;
-
-    /* read complex input from source buffer */
-    real1 = pSrc[4];
-    imag1 = pSrc[5];
-    real2 = pSrc[6];
-    imag2 = pSrc[7];
-
-    /* calculate square root */
-    arm_sqrt_q31(out1, &pDst[0]);
-
-    /* calculate power of input values */
-    mul1 = (q63_t) real1 *real1;
-
-    /* calculate square root */
-    arm_sqrt_q31(out3, &pDst[1]);
-
-    /* calculate power of input values */
-    mul2 = (q63_t) imag1 *imag1;
-    mul3 = (q63_t) real2 *real2;
-    mul4 = (q63_t) imag2 *imag2;
-
-    /* get the result to 3.29 format */
-    out1 = (q31_t) (mul1 >> 33);
-    out2 = (q31_t) (mul2 >> 33);
-    out3 = (q31_t) (mul3 >> 33);
-    out4 = (q31_t) (mul4 >> 33);
-
-    /* add real and imaginary accumulators */
-    out1 = out1 + out2;
-    out3 = out3 + out4;
-
-    /* calculate square root */
-    arm_sqrt_q31(out1, &pDst[2]);
-
-    /* increment destination by 8 to process next samples */
-    pSrc += 8u;
-
-    /* calculate square root */
-    arm_sqrt_q31(out3, &pDst[3]);
-
-    /* increment destination by 4 to process next samples */
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 2.30 format in the destination buffer. */
-    arm_sqrt_q31(acc0 + acc1, pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_mag group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
deleted file mode 100644
index c49d006a19..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_f32.c    
-*    
-* Description:	Floating-point complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup cmplx_mag_squared Complex Magnitude Squared        
- *        
- * Computes the magnitude squared of the elements of a complex data vector.        
- *       
- * The pSrc points to the source data and        
- * pDst points to the where the result should be written.        
- * numSamples specifies the number of complex samples        
- * in the input array and the data is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The input array has a total of 2*numSamples values;        
- * the output array has a total of numSamples values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup cmplx_mag_squared        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex magnitude squared        
- * @param[in]  *pSrc points to the complex input vector        
- * @param[out]  *pDst points to the real output vector        
- * @param[in]  numSamples number of complex samples in the input vector        
- * @return none.        
- */
-
-void arm_cmplx_mag_squared_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t real, imag;                          /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-  float32_t real1, real2, real3, real4;          /* Temporary variables to hold real values */
-  float32_t imag1, imag2, imag3, imag4;          /* Temporary variables to hold imaginary values */
-  float32_t mul1, mul2, mul3, mul4;              /* Temporary variables */
-  float32_t mul5, mul6, mul7, mul8;              /* Temporary variables */
-  float32_t out1, out2, out3, out4;              /* Temporary variables to hold output values */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    /* read real input sample from source buffer */
-    real1 = pSrc[0];
-    /* read imaginary input sample from source buffer */
-    imag1 = pSrc[1];
-
-    /* calculate power of real value */
-    mul1 = real1 * real1;
-
-    /* read real input sample from source buffer */
-    real2 = pSrc[2];
-
-    /* calculate power of imaginary value */
-    mul2 = imag1 * imag1;
-
-    /* read imaginary input sample from source buffer */
-    imag2 = pSrc[3];
-
-    /* calculate power of real value */
-    mul3 = real2 * real2;
-
-    /* read real input sample from source buffer */
-    real3 = pSrc[4];
-
-    /* calculate power of imaginary value */
-    mul4 = imag2 * imag2;
-
-    /* read imaginary input sample from source buffer */
-    imag3 = pSrc[5];
-
-    /* calculate power of real value */
-    mul5 = real3 * real3;
-    /* calculate power of imaginary value */
-    mul6 = imag3 * imag3;
-
-    /* read real input sample from source buffer */
-    real4 = pSrc[6];
-
-    /* accumulate real and imaginary powers */
-    out1 = mul1 + mul2;
-
-    /* read imaginary input sample from source buffer */
-    imag4 = pSrc[7];
-
-    /* accumulate real and imaginary powers */
-    out2 = mul3 + mul4;
-
-    /* calculate power of real value */
-    mul7 = real4 * real4;
-    /* calculate power of imaginary value */
-    mul8 = imag4 * imag4;
-
-    /* store output to destination */
-    pDst[0] = out1;
-
-    /* accumulate real and imaginary powers */
-    out3 = mul5 + mul6;
-
-    /* store output to destination */
-    pDst[1] = out2;
-
-    /* accumulate real and imaginary powers */
-    out4 = mul7 + mul8;
-
-    /* store output to destination */
-    pDst[2] = out3;
-
-    /* increment destination pointer by 8 to process next samples */
-    pSrc += 8u;
-
-    /* store output to destination */
-    pDst[3] = out4;
-
-    /* increment destination pointer by 4 to process next samples */
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-
-    /* out = (real * real) + (imag * imag) */
-    /* store the result in the destination buffer. */
-    *pDst++ = (real * real) + (imag * imag);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_mag_squared group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
deleted file mode 100644
index 42694058ae..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_q15.c    
-*    
-* Description:	Q15 complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag_squared    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex magnitude squared    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.    
- */
-
-void arm_cmplx_mag_squared_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t acc2, acc3;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-    acc0 = __SMUAD(in1, in1);
-    acc1 = __SMUAD(in2, in2);
-    acc2 = __SMUAD(in3, in3);
-    acc3 = __SMUAD(in4, in4);
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (acc0 >> 17);
-    *pDst++ = (q15_t) (acc1 >> 17);
-    *pDst++ = (q15_t) (acc2 >> 17);
-    *pDst++ = (q15_t) (acc3 >> 17);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    acc0 = __SMUAD(in1, in1);
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (acc0 >> 17);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t real, imag;                              /* Temporary variables to store real and imaginary values */
-
-  while(numSamples > 0u)
-  {
-    /* out = ((real * real) + (imag * imag)) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (real * real);
-    acc1 = (imag * imag);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of cmplx_mag_squared group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
deleted file mode 100644
index 7670c88497..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_q31.c    
-*    
-* Description:	Q31 complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag_squared    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex magnitude squared    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_mag_squared_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t real, imag;                              /* Temporary variables to store real and imaginary values */
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* out = ((real * real) + (imag * imag)) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of cmplx_mag_squared group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
deleted file mode 100644
index 15109f231c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_f32.c    
-*    
-* Description:	Floating-point complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication        
- *        
- * Multiplies a complex vector by another complex vector and generates a complex result.        
- * The data in the complex arrays is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The parameter numSamples represents the number of complex        
- * samples processed.  The complex arrays have a total of 2*numSamples        
- * real values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup CmplxByCmplxMult        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex-by-complex multiplication        
- * @param[in]  *pSrcA points to the first input vector        
- * @param[in]  *pSrcB points to the second input vector        
- * @param[out]  *pDst  points to the output vector        
- * @param[in]  numSamples number of complex samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_mult_cmplx_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t a1, b1, c1, d1;                      /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t a2, b2, c2, d2;                      /* Temporary variables to store real and imaginary values */
-  float32_t acc1, acc2, acc3, acc4;
-
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a1 = *pSrcA;                /* A[2 * i] */
-    c1 = *pSrcB;                /* B[2 * i] */
-
-    b1 = *(pSrcA + 1);          /* A[2 * i + 1] */
-    acc1 = a1 * c1;             /* acc1 = A[2 * i] * B[2 * i] */
-
-    a2 = *(pSrcA + 2);          /* A[2 * i + 2] */
-    acc2 = (b1 * c1);           /* acc2 = A[2 * i + 1] * B[2 * i] */
-
-    d1 = *(pSrcB + 1);          /* B[2 * i + 1] */
-    c2 = *(pSrcB + 2);          /* B[2 * i + 2] */
-    acc1 -= b1 * d1;            /* acc1 =      A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
-
-    d2 = *(pSrcB + 3);          /* B[2 * i + 3] */
-    acc3 = a2 * c2;             /* acc3 =       A[2 * i + 2] * B[2 * i + 2] */
-
-    b2 = *(pSrcA + 3);          /* A[2 * i + 3] */
-    acc2 += (a1 * d1);          /* acc2 =      A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
-
-    a1 = *(pSrcA + 4);          /* A[2 * i + 4] */
-    acc4 = (a2 * d2);           /* acc4 =   A[2 * i + 2] * B[2 * i + 3] */
-
-    c1 = *(pSrcB + 4);          /* B[2 * i + 4] */
-    acc3 -= (b2 * d2);          /* acc3 =       A[2 * i + 2] * B[2 * i + 2] - A[2 * i + 3] * B[2 * i + 3] */
-    *pDst = acc1;               /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
-
-    b1 = *(pSrcA + 5);          /* A[2 * i + 5] */
-    acc4 += b2 * c2;            /* acc4 =   A[2 * i + 2] * B[2 * i + 3] + A[2 * i + 3] * B[2 * i + 2] */
-
-    *(pDst + 1) = acc2;         /* C[2 * i + 1] = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1]  */
-    acc1 = (a1 * c1);
-
-    d1 = *(pSrcB + 5);
-    acc2 = (b1 * c1);
-
-    *(pDst + 2) = acc3;
-    *(pDst + 3) = acc4;
-
-    a2 = *(pSrcA + 6);
-    acc1 -= (b1 * d1);
-
-    c2 = *(pSrcB + 6);
-    acc2 += (a1 * d1);
-
-    b2 = *(pSrcA + 7);
-    acc3 = (a2 * c2);
-
-    d2 = *(pSrcB + 7);
-    acc4 = (b2 * c2);
-
-    *(pDst + 4) = acc1;
-    pSrcA += 8u;
-
-    acc3 -= (b2 * d2);
-    acc4 += (a2 * d2);
-
-    *(pDst + 5) = acc2;
-    pSrcB += 8u;
-
-    *(pDst + 6) = acc3;
-    *(pDst + 7) = acc4;
-
-    pDst += 8u;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a1 = *pSrcA++;
-    b1 = *pSrcA++;
-    c1 = *pSrcB++;
-    d1 = *pSrcB++;
-
-    /* store the result in the destination buffer. */
-    *pDst++ = (a1 * c1) - (b1 * d1);
-    *pDst++ = (a1 * d1) + (b1 * c1);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of CmplxByCmplxMult group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
deleted file mode 100644
index 89412f5ba1..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
+++ /dev/null
@@ -1,185 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_q15.c    
-*    
-* Description:	Q15 complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByCmplxMult    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex-by-complex multiplication    
- * @param[in]  *pSrcA points to the first input vector    
- * @param[in]  *pSrcB points to the second input vector    
- * @param[out]  *pDst  points to the output vector    
- * @param[in]  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.    
- */
-
-void arm_cmplx_mult_cmplx_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q15_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of CmplxByCmplxMult group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
deleted file mode 100644
index 668cbfa610..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
+++ /dev/null
@@ -1,318 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_q31.c    
-*    
-* Description:	Q31 complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByCmplxMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex-by-complex multiplication    
- * @param[in]  *pSrcA points to the first input vector    
- * @param[in]  *pSrcB points to the second input vector    
- * @param[out]  *pDst  points to the output vector    
- * @param[in]  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_mult_cmplx_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t mul1, mul2, mul3, mul4;
-  q31_t out1, out2;
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 1u;
-
-  /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.     
-   ** a second loop below computes the remaining 1 sample. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.     
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x2u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of CmplxByCmplxMult group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
deleted file mode 100644
index bbd7cf6746..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_f32.c    
-*    
-* Description:	Floating-point complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup CmplxByRealMult Complex-by-Real Multiplication        
- *        
- * Multiplies a complex vector by a real vector and generates a complex result.        
- * The data in the complex arrays is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The parameter numSamples represents the number of complex        
- * samples processed.  The complex arrays have a total of 2*numSamples        
- * real values while the real array has a total of numSamples        
- * real values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup CmplxByRealMult        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex-by-real multiplication        
- * @param[in]  *pSrcCmplx points to the complex input vector        
- * @param[in]  *pSrcReal points to the real input vector        
- * @param[out]  *pCmplxDst points to the complex output vector        
- * @param[in]  numSamples number of samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_mult_real_f32(
-  float32_t * pSrcCmplx,
-  float32_t * pSrcReal,
-  float32_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  float32_t in;                                  /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* Temporary variables to hold input data */
-  float32_t inA5, inA6, inA7, inA8;              /* Temporary variables to hold input data */
-  float32_t inB1, inB2, inB3, inB4;              /* Temporary variables to hold input data */
-  float32_t out1, out2, out3, out4;              /* Temporary variables to hold output data */
-  float32_t out5, out6, out7, out8;              /* Temporary variables to hold output data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read input from complex input buffer */
-    inA1 = pSrcCmplx[0];
-    inA2 = pSrcCmplx[1];
-    /* read input from real input buffer */
-    inB1 = pSrcReal[0];
-
-    /* read input from complex input buffer */
-    inA3 = pSrcCmplx[2];
-
-    /* multiply complex buffer real input with real buffer input */
-    out1 = inA1 * inB1;
-
-    /* read input from complex input buffer */
-    inA4 = pSrcCmplx[3];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out2 = inA2 * inB1;
-
-    /* read input from real input buffer */
-    inB2 = pSrcReal[1];
-    /* read input from complex input buffer */
-    inA5 = pSrcCmplx[4];
-
-    /* multiply complex buffer real input with real buffer input */
-    out3 = inA3 * inB2;
-
-    /* read input from complex input buffer */
-    inA6 = pSrcCmplx[5];
-    /* read input from real input buffer */
-    inB3 = pSrcReal[2];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out4 = inA4 * inB2;
-
-    /* read input from complex input buffer */
-    inA7 = pSrcCmplx[6];
-
-    /* multiply complex buffer real input with real buffer input */
-    out5 = inA5 * inB3;
-
-    /* read input from complex input buffer */
-    inA8 = pSrcCmplx[7];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out6 = inA6 * inB3;
-
-    /* read input from real input buffer */
-    inB4 = pSrcReal[3];
-
-    /* store result to destination bufer */
-    pCmplxDst[0] = out1;
-
-    /* multiply complex buffer real input with real buffer input */
-    out7 = inA7 * inB4;
-
-    /* store result to destination bufer */
-    pCmplxDst[1] = out2;
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out8 = inA8 * inB4;
-
-    /* store result to destination bufer */
-    pCmplxDst[2] = out3;
-    pCmplxDst[3] = out4;
-    pCmplxDst[4] = out5;
-
-    /* incremnet complex input buffer by 8 to process next samples */
-    pSrcCmplx += 8u;
-
-    /* store result to destination bufer */
-    pCmplxDst[5] = out6;
-
-    /* increment real input buffer by 4 to process next samples */
-    pSrcReal += 4u;
-
-    /* store result to destination bufer */
-    pCmplxDst[6] = out7;
-    pCmplxDst[7] = out8;
-
-    /* increment destination buffer by 8 to process next sampels */
-    pCmplxDst += 8u;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ = (*pSrcCmplx++) * (in);
-    *pCmplxDst++ = (*pSrcCmplx++) * (in);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of CmplxByRealMult group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
deleted file mode 100644
index 2e56b0f3f6..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_q15.c    
-*    
-* Description:	Q15 complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByRealMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q15 complex-by-real multiplication    
- * @param[in]  *pSrcCmplx points to the complex input vector    
- * @param[in]  *pSrcReal points to the real input vector    
- * @param[out]  *pCmplxDst points to the complex output vector    
- * @param[in]  numSamples number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-void arm_cmplx_mult_real_q15(
-  q15_t * pSrcCmplx,
-  q15_t * pSrcReal,
-  q15_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  q15_t in;                                      /* Temporary variable to store input value */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t inA1, inA2;                              /* Temporary variables to hold input data */
-  q31_t inB1;                                    /* Temporary variables to hold input data */
-  q15_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
-  q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables to hold intermediate data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read complex number both real and imaginary from complex input buffer */
-    inA1 = *__SIMD32(pSrcCmplx)++;
-    /* read two real values at a time from real input buffer */
-    inB1 = *__SIMD32(pSrcReal)++;
-    /* read complex number both real and imaginary from complex input buffer */
-    inA2 = *__SIMD32(pSrcCmplx)++;
-
-    /* multiply complex number with real numbers */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
-#else
-
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    /* saturate the result */
-    out1 = (q15_t) __SSAT(mul1 >> 15u, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15u, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15u, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15u, 16);
-
-    /* pack real and imaginary outputs and store them to destination */
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
-
-    inA1 = *__SIMD32(pSrcCmplx)++;
-    inB1 = *__SIMD32(pSrcReal)++;
-    inA2 = *__SIMD32(pSrcCmplx)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
-#else
-
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = (q15_t) __SSAT(mul1 >> 15u, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15u, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15u, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15u, 16);
-
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut = realA * realB.            */
-    /* imagOut = imagA * realB.                */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-
-    /* Decrement the numSamples loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of CmplxByRealMult group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
deleted file mode 100644
index 94483f62b0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_q31.c    
-*    
-* Description:	Q31 complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByRealMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex-by-real multiplication    
- * @param[in]  *pSrcCmplx points to the complex input vector    
- * @param[in]  *pSrcReal points to the real input vector    
- * @param[out]  *pCmplxDst points to the complex output vector    
- * @param[in]  numSamples number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
- */
-
-void arm_cmplx_mult_real_q31(
-  q31_t * pSrcCmplx,
-  q31_t * pSrcReal,
-  q31_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  q31_t inA1;                                    /* Temporary variable to store input value */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t inA2, inA3, inA4;                        /* Temporary variables to hold input data */
-  q31_t inB1, inB2;                              /* Temporary variabels to hold input data */
-  q31_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-    inB2 = *pSrcReal++;
-    /* read imaginary input from complex input buffer */
-    inA3 = *pSrcCmplx++;
-    inA4 = *pSrcCmplx++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-    out3 = ((q63_t) inA3 * inB2) >> 32;
-    out4 = ((q63_t) inA4 * inB2) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-    out3 = out3 << 1;
-    out4 = out4 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-    *pCmplxDst++ = out3;
-    *pCmplxDst++ = out4;
-
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-    inB2 = *pSrcReal++;
-    /* read imaginary input from complex input buffer */
-    inA3 = *pSrcCmplx++;
-    inA4 = *pSrcCmplx++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-    out3 = ((q63_t) inA3 * inB2) >> 32;
-    out4 = ((q63_t) inA4 * inB2) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-    out3 = out3 << 1;
-    out4 = out4 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-    *pCmplxDst++ = out3;
-    *pCmplxDst++ = out4;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut = realA * realB.            */
-    /* imagReal = imagA * realB.               */
-    inA1 = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
-    *pCmplxDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
-
-    /* Decrement the numSamples loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of CmplxByRealMult group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c
deleted file mode 100644
index 9ae46d9ae8..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_f32.c    
-*    
-* Description:	Floating-point PID Control initialization function    
-*				   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the floating-point PID Control.   
- * @param[in,out] *S points to an instance of the PID structure.   
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state & 1 = reset the state.   
- * @return none.   
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_f32(
-  arm_pid_instance_f32 * S,
-  int32_t resetStateFlag)
-{
-
-  /* Derived coefficient A0 */
-  S->A0 = S->Kp + S->Ki + S->Kd;
-
-  /* Derived coefficient A1 */
-  S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
-
-  /* Derived coefficient A2 */
-  S->A2 = S->Kd;
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(float32_t));
-  }
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c
deleted file mode 100644
index a10b1e1cfe..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_q15.c    
-*    
-* Description:	Q15 PID Control initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @details    
- * @param[in,out] *S points to an instance of the Q15 PID structure.    
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.    
- * @return none.    
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_q15(
-  arm_pid_instance_q15 * S,
-  int32_t resetStateFlag)
-{
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Derived coefficient A0 */
-  S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
-
-  /* Derived coefficients and pack into A1 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-  S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
-
-#else
-
-  S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q15_t));
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t temp;                                    /*to store the sum */
-
-  /* Derived coefficient A0 */
-  temp = S->Kp + S->Ki + S->Kd;
-  S->A0 = (q15_t) __SSAT(temp, 16);
-
-  /* Derived coefficients and pack into A1 */
-  temp = -(S->Kd + S->Kd + S->Kp);
-  S->A1 = (q15_t) __SSAT(temp, 16);
-  S->A2 = S->Kd;
-
-
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q15_t));
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c
deleted file mode 100644
index 0afd13bb78..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_q31.c    
-*    
-* Description:	Q31 PID Control initialization function     
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q31 PID Control.   
- * @param[in,out] *S points to an instance of the Q31 PID structure.   
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.   
- * @return none.    
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_q31(
-  arm_pid_instance_q31 * S,
-  int32_t resetStateFlag)
-{
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Derived coefficient A0 */
-  S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
-
-  /* Derived coefficient A1 */
-  S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t temp;
-
-  /* Derived coefficient A0 */
-  temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
-  S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
-
-  /* Derived coefficient A1 */
-  temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
-  S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Derived coefficient A2 */
-  S->A2 = S->Kd;
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q31_t));
-  }
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c
deleted file mode 100644
index 739812e97f..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_f32.c    
-*    
-* Description:	Floating-point PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the floating-point PID Control.   
-* @param[in] *S	Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_f32(
-  arm_pid_instance_f32 * S)
-{
-
-  /* Clear the state buffer.  The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(float32_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c
deleted file mode 100644
index 588e2b8694..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_q15.c    
-*    
-* Description:	Q15 PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the Q15 PID Control.   
-* @param[in] *S		Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_q15(
-  arm_pid_instance_q15 * S)
-{
-  /* Reset state to zero, The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(q15_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c
deleted file mode 100644
index 4b63f410d0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_q31.c    
-*    
-* Description:	Q31 PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the Q31 PID Control.   
-* @param[in] *S	Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_q31(
-  arm_pid_instance_q31 * S)
-{
-
-  /* Clear the state buffer.  The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(q31_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c
deleted file mode 100644
index 8ee5f359dd..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c
+++ /dev/null
@@ -1,428 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_cos_f32.c    
-*    
-* Description:	Sine and Cosine calculation for floating-point values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupController    
- */
-
-/**    
- * @defgroup SinCos Sine Cosine   
- *    
- * Computes the trigonometric sine and cosine values using a combination of table lookup   
- * and linear interpolation.     
- * There are separate functions for Q31 and floating-point data types.   
- * The input to the floating-point version is in degrees while the   
- * fixed-point Q31 have a scaled input with the range   
- * [-1 0.9999] mapping to [-180 179] degrees.   
- *   
- * The implementation is based on table lookup using 360 values together with linear interpolation.   
- * The steps used are:   
- *  -# Calculation of the nearest integer table index.   
- *  -# Compute the fractional portion (fract) of the input.   
- *  -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.      
- *  -# Sine value is computed as  *psinVal = y0 + (fract * (y1 - y0)).    
- *  -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.      
- *  -# Cosine value is computed as  *pcosVal = y0 + (fract * (y1 - y0)).    
- */
-
- /**    
- * @addtogroup SinCos    
- * @{    
- */
-
-
-/**    
-* \par    
-* Cosine Table is generated from following loop    
-* 
for(i = 0; i < 360; i++)    
-* {    
-*    cosTable[i]= cos((i-180) * PI/180.0);    
-* } 
-*/ - -static const float32_t cosTable[360] = { - -0.999847695156391270f, -0.999390827019095760f, -0.998629534754573830f, - -0.997564050259824200f, -0.996194698091745550f, -0.994521895368273290f, - -0.992546151641321980f, -0.990268068741570250f, - -0.987688340595137660f, -0.984807753012208020f, -0.981627183447663980f, - -0.978147600733805690f, -0.974370064785235250f, -0.970295726275996470f, - -0.965925826289068200f, -0.961261695938318670f, - -0.956304755963035440f, -0.951056516295153530f, -0.945518575599316740f, - -0.939692620785908320f, -0.933580426497201740f, -0.927183854566787310f, - -0.920504853452440150f, -0.913545457642600760f, - -0.906307787036649940f, -0.898794046299167040f, -0.891006524188367790f, - -0.882947592858926770f, -0.874619707139395740f, -0.866025403784438710f, - -0.857167300702112220f, -0.848048096156425960f, - -0.838670567945424160f, -0.829037572555041620f, -0.819152044288991580f, - -0.809016994374947340f, -0.798635510047292940f, -0.788010753606721900f, - -0.777145961456970680f, -0.766044443118977900f, - -0.754709580222772010f, -0.743144825477394130f, -0.731353701619170460f, - -0.719339800338651300f, -0.707106781186547460f, -0.694658370458997030f, - -0.681998360062498370f, -0.669130606358858240f, - -0.656059028990507500f, -0.642787609686539360f, -0.629320391049837280f, - -0.615661475325658290f, -0.601815023152048380f, -0.587785252292473030f, - -0.573576436351045830f, -0.559192903470746680f, - -0.544639035015027080f, -0.529919264233204790f, -0.515038074910054270f, - -0.499999999999999780f, -0.484809620246337000f, -0.469471562785890530f, - -0.453990499739546750f, -0.438371146789077510f, - -0.422618261740699330f, -0.406736643075800100f, -0.390731128489273600f, - -0.374606593415912070f, -0.358367949545300270f, -0.342020143325668710f, - -0.325568154457156420f, -0.309016994374947340f, - -0.292371704722736660f, -0.275637355816999050f, -0.258819045102520850f, - -0.241921895599667790f, -0.224951054343864810f, -0.207911690817759120f, - -0.190808995376544800f, -0.173648177666930300f, - -0.156434465040231040f, -0.139173100960065350f, -0.121869343405147370f, - -0.104528463267653330f, -0.087155742747658235f, -0.069756473744125330f, - -0.052335956242943620f, -0.034899496702500733f, - -0.017452406437283477f, 0.000000000000000061f, 0.017452406437283376f, - 0.034899496702501080f, 0.052335956242943966f, 0.069756473744125455f, - 0.087155742747658138f, 0.104528463267653460f, - 0.121869343405147490f, 0.139173100960065690f, 0.156434465040230920f, - 0.173648177666930410f, 0.190808995376544920f, 0.207911690817759450f, - 0.224951054343864920f, 0.241921895599667900f, - 0.258819045102520740f, 0.275637355816999160f, 0.292371704722736770f, - 0.309016994374947450f, 0.325568154457156760f, 0.342020143325668820f, - 0.358367949545300380f, 0.374606593415911960f, - 0.390731128489273940f, 0.406736643075800210f, 0.422618261740699440f, - 0.438371146789077460f, 0.453990499739546860f, 0.469471562785890860f, - 0.484809620246337110f, 0.500000000000000110f, - 0.515038074910054380f, 0.529919264233204900f, 0.544639035015027200f, - 0.559192903470746790f, 0.573576436351046050f, 0.587785252292473140f, - 0.601815023152048270f, 0.615661475325658290f, - 0.629320391049837500f, 0.642787609686539360f, 0.656059028990507280f, - 0.669130606358858240f, 0.681998360062498480f, 0.694658370458997370f, - 0.707106781186547570f, 0.719339800338651190f, - 0.731353701619170570f, 0.743144825477394240f, 0.754709580222772010f, - 0.766044443118978010f, 0.777145961456970900f, 0.788010753606722010f, - 0.798635510047292830f, 0.809016994374947450f, - 0.819152044288991800f, 0.829037572555041620f, 0.838670567945424050f, - 0.848048096156425960f, 0.857167300702112330f, 0.866025403784438710f, - 0.874619707139395740f, 0.882947592858926990f, - 0.891006524188367900f, 0.898794046299167040f, 0.906307787036649940f, - 0.913545457642600870f, 0.920504853452440370f, 0.927183854566787420f, - 0.933580426497201740f, 0.939692620785908430f, - 0.945518575599316850f, 0.951056516295153530f, 0.956304755963035440f, - 0.961261695938318890f, 0.965925826289068310f, 0.970295726275996470f, - 0.974370064785235250f, 0.978147600733805690f, - 0.981627183447663980f, 0.984807753012208020f, 0.987688340595137770f, - 0.990268068741570360f, 0.992546151641321980f, 0.994521895368273290f, - 0.996194698091745550f, 0.997564050259824200f, - 0.998629534754573830f, 0.999390827019095760f, 0.999847695156391270f, - 1.000000000000000000f, 0.999847695156391270f, 0.999390827019095760f, - 0.998629534754573830f, 0.997564050259824200f, - 0.996194698091745550f, 0.994521895368273290f, 0.992546151641321980f, - 0.990268068741570360f, 0.987688340595137770f, 0.984807753012208020f, - 0.981627183447663980f, 0.978147600733805690f, - 0.974370064785235250f, 0.970295726275996470f, 0.965925826289068310f, - 0.961261695938318890f, 0.956304755963035440f, 0.951056516295153530f, - 0.945518575599316850f, 0.939692620785908430f, - 0.933580426497201740f, 0.927183854566787420f, 0.920504853452440370f, - 0.913545457642600870f, 0.906307787036649940f, 0.898794046299167040f, - 0.891006524188367900f, 0.882947592858926990f, - 0.874619707139395740f, 0.866025403784438710f, 0.857167300702112330f, - 0.848048096156425960f, 0.838670567945424050f, 0.829037572555041620f, - 0.819152044288991800f, 0.809016994374947450f, - 0.798635510047292830f, 0.788010753606722010f, 0.777145961456970900f, - 0.766044443118978010f, 0.754709580222772010f, 0.743144825477394240f, - 0.731353701619170570f, 0.719339800338651190f, - 0.707106781186547570f, 0.694658370458997370f, 0.681998360062498480f, - 0.669130606358858240f, 0.656059028990507280f, 0.642787609686539360f, - 0.629320391049837500f, 0.615661475325658290f, - 0.601815023152048270f, 0.587785252292473140f, 0.573576436351046050f, - 0.559192903470746790f, 0.544639035015027200f, 0.529919264233204900f, - 0.515038074910054380f, 0.500000000000000110f, - 0.484809620246337110f, 0.469471562785890860f, 0.453990499739546860f, - 0.438371146789077460f, 0.422618261740699440f, 0.406736643075800210f, - 0.390731128489273940f, 0.374606593415911960f, - 0.358367949545300380f, 0.342020143325668820f, 0.325568154457156760f, - 0.309016994374947450f, 0.292371704722736770f, 0.275637355816999160f, - 0.258819045102520740f, 0.241921895599667900f, - 0.224951054343864920f, 0.207911690817759450f, 0.190808995376544920f, - 0.173648177666930410f, 0.156434465040230920f, 0.139173100960065690f, - 0.121869343405147490f, 0.104528463267653460f, - 0.087155742747658138f, 0.069756473744125455f, 0.052335956242943966f, - 0.034899496702501080f, 0.017452406437283376f, 0.000000000000000061f, - -0.017452406437283477f, -0.034899496702500733f, - -0.052335956242943620f, -0.069756473744125330f, -0.087155742747658235f, - -0.104528463267653330f, -0.121869343405147370f, -0.139173100960065350f, - -0.156434465040231040f, -0.173648177666930300f, - -0.190808995376544800f, -0.207911690817759120f, -0.224951054343864810f, - -0.241921895599667790f, -0.258819045102520850f, -0.275637355816999050f, - -0.292371704722736660f, -0.309016994374947340f, - -0.325568154457156420f, -0.342020143325668710f, -0.358367949545300270f, - -0.374606593415912070f, -0.390731128489273600f, -0.406736643075800100f, - -0.422618261740699330f, -0.438371146789077510f, - -0.453990499739546750f, -0.469471562785890530f, -0.484809620246337000f, - -0.499999999999999780f, -0.515038074910054270f, -0.529919264233204790f, - -0.544639035015027080f, -0.559192903470746680f, - -0.573576436351045830f, -0.587785252292473030f, -0.601815023152048380f, - -0.615661475325658290f, -0.629320391049837280f, -0.642787609686539360f, - -0.656059028990507500f, -0.669130606358858240f, - -0.681998360062498370f, -0.694658370458997030f, -0.707106781186547460f, - -0.719339800338651300f, -0.731353701619170460f, -0.743144825477394130f, - -0.754709580222772010f, -0.766044443118977900f, - -0.777145961456970680f, -0.788010753606721900f, -0.798635510047292940f, - -0.809016994374947340f, -0.819152044288991580f, -0.829037572555041620f, - -0.838670567945424160f, -0.848048096156425960f, - -0.857167300702112220f, -0.866025403784438710f, -0.874619707139395740f, - -0.882947592858926770f, -0.891006524188367790f, -0.898794046299167040f, - -0.906307787036649940f, -0.913545457642600760f, - -0.920504853452440150f, -0.927183854566787310f, -0.933580426497201740f, - -0.939692620785908320f, -0.945518575599316740f, -0.951056516295153530f, - -0.956304755963035440f, -0.961261695938318670f, - -0.965925826289068200f, -0.970295726275996470f, -0.974370064785235250f, - -0.978147600733805690f, -0.981627183447663980f, -0.984807753012208020f, - -0.987688340595137660f, -0.990268068741570250f, - -0.992546151641321980f, -0.994521895368273290f, -0.996194698091745550f, - -0.997564050259824200f, -0.998629534754573830f, -0.999390827019095760f, - -0.999847695156391270f, -1.000000000000000000f -}; - -/** -* \par -* Sine Table is generated from following loop -*
for(i = 0; i < 360; i++)    
-* {    
-*    sinTable[i]= sin((i-180) * PI/180.0);    
-* } 
-*/ - - -static const float32_t sinTable[360] = { - -0.017452406437283439f, -0.034899496702500699f, -0.052335956242943807f, - -0.069756473744125524f, -0.087155742747658638f, -0.104528463267653730f, - -0.121869343405147550f, -0.139173100960065740f, - -0.156434465040230980f, -0.173648177666930280f, -0.190808995376544970f, - -0.207911690817759310f, -0.224951054343864780f, -0.241921895599667730f, - -0.258819045102521020f, -0.275637355816999660f, - -0.292371704722737050f, -0.309016994374947510f, -0.325568154457156980f, - -0.342020143325668880f, -0.358367949545300210f, -0.374606593415912240f, - -0.390731128489274160f, -0.406736643075800430f, - -0.422618261740699500f, -0.438371146789077290f, -0.453990499739546860f, - -0.469471562785891080f, -0.484809620246337170f, -0.499999999999999940f, - -0.515038074910054380f, -0.529919264233204900f, - -0.544639035015026860f, -0.559192903470746900f, -0.573576436351046380f, - -0.587785252292473250f, -0.601815023152048160f, -0.615661475325658400f, - -0.629320391049837720f, -0.642787609686539470f, - -0.656059028990507280f, -0.669130606358858350f, -0.681998360062498590f, - -0.694658370458997140f, -0.707106781186547570f, -0.719339800338651410f, - -0.731353701619170570f, -0.743144825477394240f, - -0.754709580222771790f, -0.766044443118978010f, -0.777145961456971010f, - -0.788010753606722010f, -0.798635510047292720f, -0.809016994374947450f, - -0.819152044288992020f, -0.829037572555041740f, - -0.838670567945424050f, -0.848048096156426070f, -0.857167300702112330f, - -0.866025403784438710f, -0.874619707139395850f, -0.882947592858927100f, - -0.891006524188367900f, -0.898794046299166930f, - -0.906307787036650050f, -0.913545457642600980f, -0.920504853452440370f, - -0.927183854566787420f, -0.933580426497201740f, -0.939692620785908430f, - -0.945518575599316850f, -0.951056516295153640f, - -0.956304755963035550f, -0.961261695938318890f, -0.965925826289068310f, - -0.970295726275996470f, -0.974370064785235250f, -0.978147600733805690f, - -0.981627183447663980f, -0.984807753012208020f, - -0.987688340595137660f, -0.990268068741570360f, -0.992546151641322090f, - -0.994521895368273400f, -0.996194698091745550f, -0.997564050259824200f, - -0.998629534754573830f, -0.999390827019095760f, - -0.999847695156391270f, -1.000000000000000000f, -0.999847695156391270f, - -0.999390827019095760f, -0.998629534754573830f, -0.997564050259824200f, - -0.996194698091745550f, -0.994521895368273290f, - -0.992546151641321980f, -0.990268068741570250f, -0.987688340595137770f, - -0.984807753012208020f, -0.981627183447663980f, -0.978147600733805580f, - -0.974370064785235250f, -0.970295726275996470f, - -0.965925826289068310f, -0.961261695938318890f, -0.956304755963035440f, - -0.951056516295153530f, -0.945518575599316740f, -0.939692620785908320f, - -0.933580426497201740f, -0.927183854566787420f, - -0.920504853452440260f, -0.913545457642600870f, -0.906307787036649940f, - -0.898794046299167040f, -0.891006524188367790f, -0.882947592858926880f, - -0.874619707139395740f, -0.866025403784438600f, - -0.857167300702112220f, -0.848048096156426070f, -0.838670567945423940f, - -0.829037572555041740f, -0.819152044288991800f, -0.809016994374947450f, - -0.798635510047292830f, -0.788010753606722010f, - -0.777145961456970790f, -0.766044443118978010f, -0.754709580222772010f, - -0.743144825477394240f, -0.731353701619170460f, -0.719339800338651080f, - -0.707106781186547460f, -0.694658370458997250f, - -0.681998360062498480f, -0.669130606358858240f, -0.656059028990507160f, - -0.642787609686539250f, -0.629320391049837390f, -0.615661475325658180f, - -0.601815023152048270f, -0.587785252292473140f, - -0.573576436351046050f, -0.559192903470746900f, -0.544639035015027080f, - -0.529919264233204900f, -0.515038074910054160f, -0.499999999999999940f, - -0.484809620246337060f, -0.469471562785890810f, - -0.453990499739546750f, -0.438371146789077400f, -0.422618261740699440f, - -0.406736643075800150f, -0.390731128489273720f, -0.374606593415912010f, - -0.358367949545300270f, -0.342020143325668710f, - -0.325568154457156640f, -0.309016994374947400f, -0.292371704722736770f, - -0.275637355816999160f, -0.258819045102520740f, -0.241921895599667730f, - -0.224951054343865000f, -0.207911690817759310f, - -0.190808995376544800f, -0.173648177666930330f, -0.156434465040230870f, - -0.139173100960065440f, -0.121869343405147480f, -0.104528463267653460f, - -0.087155742747658166f, -0.069756473744125302f, - -0.052335956242943828f, -0.034899496702500969f, -0.017452406437283512f, - 0.000000000000000000f, 0.017452406437283512f, 0.034899496702500969f, - 0.052335956242943828f, 0.069756473744125302f, - 0.087155742747658166f, 0.104528463267653460f, 0.121869343405147480f, - 0.139173100960065440f, 0.156434465040230870f, 0.173648177666930330f, - 0.190808995376544800f, 0.207911690817759310f, - 0.224951054343865000f, 0.241921895599667730f, 0.258819045102520740f, - 0.275637355816999160f, 0.292371704722736770f, 0.309016994374947400f, - 0.325568154457156640f, 0.342020143325668710f, - 0.358367949545300270f, 0.374606593415912010f, 0.390731128489273720f, - 0.406736643075800150f, 0.422618261740699440f, 0.438371146789077400f, - 0.453990499739546750f, 0.469471562785890810f, - 0.484809620246337060f, 0.499999999999999940f, 0.515038074910054160f, - 0.529919264233204900f, 0.544639035015027080f, 0.559192903470746900f, - 0.573576436351046050f, 0.587785252292473140f, - 0.601815023152048270f, 0.615661475325658180f, 0.629320391049837390f, - 0.642787609686539250f, 0.656059028990507160f, 0.669130606358858240f, - 0.681998360062498480f, 0.694658370458997250f, - 0.707106781186547460f, 0.719339800338651080f, 0.731353701619170460f, - 0.743144825477394240f, 0.754709580222772010f, 0.766044443118978010f, - 0.777145961456970790f, 0.788010753606722010f, - 0.798635510047292830f, 0.809016994374947450f, 0.819152044288991800f, - 0.829037572555041740f, 0.838670567945423940f, 0.848048096156426070f, - 0.857167300702112220f, 0.866025403784438600f, - 0.874619707139395740f, 0.882947592858926880f, 0.891006524188367790f, - 0.898794046299167040f, 0.906307787036649940f, 0.913545457642600870f, - 0.920504853452440260f, 0.927183854566787420f, - 0.933580426497201740f, 0.939692620785908320f, 0.945518575599316740f, - 0.951056516295153530f, 0.956304755963035440f, 0.961261695938318890f, - 0.965925826289068310f, 0.970295726275996470f, - 0.974370064785235250f, 0.978147600733805580f, 0.981627183447663980f, - 0.984807753012208020f, 0.987688340595137770f, 0.990268068741570250f, - 0.992546151641321980f, 0.994521895368273290f, - 0.996194698091745550f, 0.997564050259824200f, 0.998629534754573830f, - 0.999390827019095760f, 0.999847695156391270f, 1.000000000000000000f, - 0.999847695156391270f, 0.999390827019095760f, - 0.998629534754573830f, 0.997564050259824200f, 0.996194698091745550f, - 0.994521895368273400f, 0.992546151641322090f, 0.990268068741570360f, - 0.987688340595137660f, 0.984807753012208020f, - 0.981627183447663980f, 0.978147600733805690f, 0.974370064785235250f, - 0.970295726275996470f, 0.965925826289068310f, 0.961261695938318890f, - 0.956304755963035550f, 0.951056516295153640f, - 0.945518575599316850f, 0.939692620785908430f, 0.933580426497201740f, - 0.927183854566787420f, 0.920504853452440370f, 0.913545457642600980f, - 0.906307787036650050f, 0.898794046299166930f, - 0.891006524188367900f, 0.882947592858927100f, 0.874619707139395850f, - 0.866025403784438710f, 0.857167300702112330f, 0.848048096156426070f, - 0.838670567945424050f, 0.829037572555041740f, - 0.819152044288992020f, 0.809016994374947450f, 0.798635510047292720f, - 0.788010753606722010f, 0.777145961456971010f, 0.766044443118978010f, - 0.754709580222771790f, 0.743144825477394240f, - 0.731353701619170570f, 0.719339800338651410f, 0.707106781186547570f, - 0.694658370458997140f, 0.681998360062498590f, 0.669130606358858350f, - 0.656059028990507280f, 0.642787609686539470f, - 0.629320391049837720f, 0.615661475325658400f, 0.601815023152048160f, - 0.587785252292473250f, 0.573576436351046380f, 0.559192903470746900f, - 0.544639035015026860f, 0.529919264233204900f, - 0.515038074910054380f, 0.499999999999999940f, 0.484809620246337170f, - 0.469471562785891080f, 0.453990499739546860f, 0.438371146789077290f, - 0.422618261740699500f, 0.406736643075800430f, - 0.390731128489274160f, 0.374606593415912240f, 0.358367949545300210f, - 0.342020143325668880f, 0.325568154457156980f, 0.309016994374947510f, - 0.292371704722737050f, 0.275637355816999660f, - 0.258819045102521020f, 0.241921895599667730f, 0.224951054343864780f, - 0.207911690817759310f, 0.190808995376544970f, 0.173648177666930280f, - 0.156434465040230980f, 0.139173100960065740f, - 0.121869343405147550f, 0.104528463267653730f, 0.087155742747658638f, - 0.069756473744125524f, 0.052335956242943807f, 0.034899496702500699f, - 0.017452406437283439f, 0.000000000000000122f -}; - - -/** - * @brief Floating-point sin_cos function. - * @param[in] theta input value in degrees - * @param[out] *pSinVal points to the processed sine output. - * @param[out] *pCosVal points to the processed cos output. - * @return none. - */ - - -void arm_sin_cos_f32( - float32_t theta, - float32_t * pSinVal, - float32_t * pCosVal) -{ - int32_t i; /* Index for reading nearwst output values */ - float32_t x1 = -179.0f; /* Initial input value */ - float32_t y0, y1; /* nearest output values */ - float32_t y2, y3; - float32_t fract; /* fractional part of input */ - - /* Calculation of fractional part */ - if(theta > 0.0f) - { - fract = theta - (float32_t) ((int32_t) theta); - } - else - { - fract = (theta - (float32_t) ((int32_t) theta)) + 1.0f; - } - - /* index calculation for reading nearest output values */ - i = (uint32_t) (theta - x1); - - /* Checking min and max index of table */ - if(i < 0) - { - i = 0; - } - else if(i >= 359) - { - i = 358; - } - - /* reading nearest sine output values */ - y0 = sinTable[i]; - y1 = sinTable[i + 1u]; - - /* reading nearest cosine output values */ - y2 = cosTable[i]; - y3 = cosTable[i + 1u]; - - y1 = y1 - y0; - y3 = y3 - y2; - - y1 = fract * y1; - y3 = fract * y3; - - /* Calculation of sine value */ - *pSinVal = y0 + y1; - - /* Calculation of cosine value */ - *pCosVal = y2 + y3; - -} - -/** - * @} end of SinCos group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c deleted file mode 100644 index e4c8373672..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c +++ /dev/null @@ -1,324 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sin_cos_q31.c -* -* Description: Cosine & Sine calculation for Q31 values. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupController - */ - - /** - * @addtogroup SinCos - * @{ - */ - -/** -* \par -* Sine Table is generated from following loop -*
for(i = 0; i < 360; i++)    
-* {    
-*    sinTable[i]= sin((i-180) * PI/180.0);    
-* } 
-* Convert above coefficients to fixed point 1.31 format. -*/ - -static const int32_t sinTableQ31[360] = { - - 0x0, 0xfdc41e9b, 0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2, - 0xf06695da, - 0xee2f9369, 0xebf9f498, 0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9, - 0xe108b40d, 0xdedf047d, - 0xdcb7ea46, 0xda939061, 0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0, - 0xd00ce422, 0xcdfc85bb, - 0xcbf00dbe, 0xc9e7a512, 0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224, - 0xc0000000, 0xbe133b7c, - 0xbc2b9b05, 0xba4944a2, 0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af, - 0xb1320139, 0xaf726def, - 0xadb922b7, 0xac0641fb, 0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666, - 0xa3ecac65, 0xa263007d, - 0xa0e0a15f, 0x9f65ad2d, 0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5, - 0x98722192, 0x9726069c, - 0x95e218c9, 0x94a6715d, 0x937328f5, 0x92485786, 0x9126145f, 0x900c7621, - 0x8efb92c2, 0x8df37f8b, - 0x8cf45113, 0x8bfe1b3f, 0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4, - 0x87b826f7, 0x86f93f50, - 0x8643c7b3, 0x8597ce46, 0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b, - 0x82cc0f36, 0x825a0a5b, - 0x81f1d1ce, 0x81936daf, 0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130, - 0x804fd23a, 0x802ce84c, - 0x8013f61d, 0x8004fda0, 0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c, - 0x804fd23a, 0x807cb130, - 0x80b381ac, 0x80f43f69, 0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b, - 0x82cc0f36, 0x8347d77b, - 0x83cd5982, 0x845c8ae3, 0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50, - 0x87b826f7, 0x88806fc4, - 0x89520a1a, 0x8a2ce59f, 0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b, - 0x8efb92c2, 0x900c7621, - 0x9126145f, 0x92485786, 0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c, - 0x98722192, 0x99c64fc5, - 0x9b2276b0, 0x9c867b2c, 0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d, - 0xa3ecac65, 0xa57d8666, - 0xa7156f3c, 0xa8b4471a, 0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def, - 0xb1320139, 0xb2f7b9af, - 0xb4c373ee, 0xb6950c1e, 0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c, - 0xc0000000, 0xc1f1c224, - 0xc3e85b18, 0xc5e3a3a9, 0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb, - 0xd00ce422, 0xd220ffc0, - 0xd438af17, 0xd653c860, 0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d, - 0xe108b40d, 0xe334cdc9, - 0xe5632654, 0xe7939223, 0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da, - 0xf29ecfb2, 0xf4d814a4, - 0xf7123849, 0xf94d0e2e, 0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632, - 0x6b2f1d2, - 0x8edc7b7, 0xb27eb5c, 0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68, - 0x163a1a7e, 0x186c6ddd, - 0x1a9cd9ac, 0x1ccb3237, 0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f, - 0x278dde6e, 0x29ac37a0, - 0x2bc750e9, 0x2ddf0040, 0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee, - 0x381c8bb5, 0x3a1c5c57, - 0x3c17a4e8, 0x3e0e3ddc, 0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e, - 0x4793a210, 0x496af3e2, - 0x4b3c8c12, 0x4d084651, 0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05, - 0x55a6125c, 0x574bb8e6, - 0x58ea90c4, 0x5a82799a, 0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3, - 0x620dbe8b, 0x637984d4, - 0x64dd8950, 0x6639b03b, 0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3, - 0x6c8cd70b, 0x6db7a87a, - 0x6ed9eba1, 0x6ff389df, 0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1, - 0x74ef0ebc, 0x75d31a61, - 0x76adf5e6, 0x777f903c, 0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba, - 0x7b0a9f8d, 0x7ba3751d, - 0x7c32a67e, 0x7cb82885, 0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251, - 0x7ec11aa5, 0x7f0bc097, - 0x7f4c7e54, 0x7f834ed0, 0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260, - 0x7fffffff, 0x7ffb0260, - 0x7fec09e3, 0x7fd317b4, 0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097, - 0x7ec11aa5, 0x7e6c9251, - 0x7e0e2e32, 0x7da5f5a5, 0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d, - 0x7b0a9f8d, 0x7a6831ba, - 0x79bc384d, 0x7906c0b0, 0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61, - 0x74ef0ebc, 0x7401e4c1, - 0x730baeed, 0x720c8075, 0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a, - 0x6c8cd70b, 0x6b598ea3, - 0x6a1de737, 0x68d9f964, 0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4, - 0x620dbe8b, 0x609a52d3, - 0x5f1f5ea1, 0x5d9cff83, 0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6, - 0x55a6125c, 0x53f9be05, - 0x5246dd49, 0x508d9211, 0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2, - 0x4793a210, 0x45b6bb5e, - 0x43d464fb, 0x41ecc484, 0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57, - 0x381c8bb5, 0x36185aee, - 0x340ff242, 0x32037a45, 0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0, - 0x278dde6e, 0x256c6f9f, - 0x234815ba, 0x2120fb83, 0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd, - 0x163a1a7e, 0x14060b68, - 0x11d06c97, 0xf996a26, 0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2, - 0x4779632, 0x23be165, - - -}; - -/** -* \par -* Cosine Table is generated from following loop -*
for(i = 0; i < 360; i++)    
-* {    
-*    cosTable[i]= cos((i-180) * PI/180.0);    
-* } 
-* \par -* Convert above coefficients to fixed point 1.31 format. -*/ -static const int32_t cosTableQ31[360] = { - 0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c, 0x804fd23a, 0x807cb130, - 0x80b381ac, 0x80f43f69, - 0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b, 0x82cc0f36, 0x8347d77b, - 0x83cd5982, 0x845c8ae3, - 0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50, 0x87b826f7, 0x88806fc4, - 0x89520a1a, 0x8a2ce59f, - 0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b, 0x8efb92c2, 0x900c7621, - 0x9126145f, 0x92485786, - 0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c, 0x98722192, 0x99c64fc5, - 0x9b2276b0, 0x9c867b2c, - 0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d, 0xa3ecac65, 0xa57d8666, - 0xa7156f3c, 0xa8b4471a, - 0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def, 0xb1320139, 0xb2f7b9af, - 0xb4c373ee, 0xb6950c1e, - 0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c, 0xc0000000, 0xc1f1c224, - 0xc3e85b18, 0xc5e3a3a9, - 0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb, 0xd00ce422, 0xd220ffc0, - 0xd438af17, 0xd653c860, - 0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d, 0xe108b40d, 0xe334cdc9, - 0xe5632654, 0xe7939223, - 0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da, 0xf29ecfb2, 0xf4d814a4, - 0xf7123849, 0xf94d0e2e, - 0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632, 0x6b2f1d2, 0x8edc7b7, - 0xb27eb5c, - 0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68, 0x163a1a7e, 0x186c6ddd, - 0x1a9cd9ac, 0x1ccb3237, - 0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f, 0x278dde6e, 0x29ac37a0, - 0x2bc750e9, 0x2ddf0040, - 0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee, 0x381c8bb5, 0x3a1c5c57, - 0x3c17a4e8, 0x3e0e3ddc, - 0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e, 0x4793a210, 0x496af3e2, - 0x4b3c8c12, 0x4d084651, - 0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05, 0x55a6125c, 0x574bb8e6, - 0x58ea90c4, 0x5a82799a, - 0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3, 0x620dbe8b, 0x637984d4, - 0x64dd8950, 0x6639b03b, - 0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3, 0x6c8cd70b, 0x6db7a87a, - 0x6ed9eba1, 0x6ff389df, - 0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1, 0x74ef0ebc, 0x75d31a61, - 0x76adf5e6, 0x777f903c, - 0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba, 0x7b0a9f8d, 0x7ba3751d, - 0x7c32a67e, 0x7cb82885, - 0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251, 0x7ec11aa5, 0x7f0bc097, - 0x7f4c7e54, 0x7f834ed0, - 0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260, 0x7fffffff, 0x7ffb0260, - 0x7fec09e3, 0x7fd317b4, - 0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097, 0x7ec11aa5, 0x7e6c9251, - 0x7e0e2e32, 0x7da5f5a5, - 0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d, 0x7b0a9f8d, 0x7a6831ba, - 0x79bc384d, 0x7906c0b0, - 0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61, 0x74ef0ebc, 0x7401e4c1, - 0x730baeed, 0x720c8075, - 0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a, 0x6c8cd70b, 0x6b598ea3, - 0x6a1de737, 0x68d9f964, - 0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4, 0x620dbe8b, 0x609a52d3, - 0x5f1f5ea1, 0x5d9cff83, - 0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6, 0x55a6125c, 0x53f9be05, - 0x5246dd49, 0x508d9211, - 0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2, 0x4793a210, 0x45b6bb5e, - 0x43d464fb, 0x41ecc484, - 0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57, 0x381c8bb5, 0x36185aee, - 0x340ff242, 0x32037a45, - 0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0, 0x278dde6e, 0x256c6f9f, - 0x234815ba, 0x2120fb83, - 0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd, 0x163a1a7e, 0x14060b68, - 0x11d06c97, 0xf996a26, - 0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2, 0x4779632, 0x23be165, 0x0, - 0xfdc41e9b, - 0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2, 0xf06695da, - 0xee2f9369, 0xebf9f498, - 0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9, 0xe108b40d, 0xdedf047d, - 0xdcb7ea46, 0xda939061, - 0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0, 0xd00ce422, 0xcdfc85bb, - 0xcbf00dbe, 0xc9e7a512, - 0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224, 0xc0000000, 0xbe133b7c, - 0xbc2b9b05, 0xba4944a2, - 0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af, 0xb1320139, 0xaf726def, - 0xadb922b7, 0xac0641fb, - 0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666, 0xa3ecac65, 0xa263007d, - 0xa0e0a15f, 0x9f65ad2d, - 0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5, 0x98722192, 0x9726069c, - 0x95e218c9, 0x94a6715d, - 0x937328f5, 0x92485786, 0x9126145f, 0x900c7621, 0x8efb92c2, 0x8df37f8b, - 0x8cf45113, 0x8bfe1b3f, - 0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4, 0x87b826f7, 0x86f93f50, - 0x8643c7b3, 0x8597ce46, - 0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b, 0x82cc0f36, 0x825a0a5b, - 0x81f1d1ce, 0x81936daf, - 0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130, 0x804fd23a, 0x802ce84c, - 0x8013f61d, 0x8004fda0, - -}; - - -/** - * @brief Q31 sin_cos function. - * @param[in] theta scaled input value in degrees - * @param[out] *pSinVal points to the processed sine output. - * @param[out] *pCosVal points to the processed cosine output. - * @return none. - * - * The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179]. - * - */ - - -void arm_sin_cos_q31( - q31_t theta, - q31_t * pSinVal, - q31_t * pCosVal) -{ - q31_t x0; /* Nearest input value */ - q31_t y0, y1; /* Nearest output values */ - q31_t xSpacing = INPUT_SPACING; /* Spaing between inputs */ - int32_t i; /* Index */ - q31_t oneByXSpacing; /* 1/ xSpacing value */ - q31_t out; /* temporary variable */ - uint32_t sign_bits; /* No.of sign bits */ - uint32_t firstX = 0x80000000; /* First X value */ - - /* Calculation of index */ - i = ((uint32_t) theta - firstX) / (uint32_t) xSpacing; - - /* Checking min and max index of table */ - if(i < 0) - { - i = 0; - } - else if(i >= 359) - { - i = 358; - } - - /* Calculation of first nearest input value */ - x0 = (q31_t) firstX + ((q31_t) i * xSpacing); - - /* Reading nearest sine output values from table */ - y0 = sinTableQ31[i]; - y1 = sinTableQ31[i + 1u]; - - /* Calculation of 1/(x1-x0) */ - /* (x1-x0) is xSpacing which is fixed value */ - sign_bits = 8u; - oneByXSpacing = 0x5A000000; - - /* Calculation of (theta - x0)/(x1-x0) */ - out = - (((q31_t) (((q63_t) (theta - x0) * oneByXSpacing) >> 32)) << sign_bits); - - /* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */ - *pSinVal = __QADD(y0, ((q31_t) (((q63_t) (y1 - y0) * out) >> 30))); - - /* Reading nearest cosine output values from table */ - y0 = cosTableQ31[i]; - y1 = cosTableQ31[i + 1u]; - - /* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */ - *pCosVal = __QADD(y0, ((q31_t) (((q63_t) (y1 - y0) * out) >> 30))); - -} - -/** - * @} end of SinCos group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c deleted file mode 100644 index b04aa02f54..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c +++ /dev/null @@ -1,280 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cos_f32.c -* -* Description: Fast cosine calculation for floating-point values. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" -/** - * @ingroup groupFastMath - */ - -/** - * @defgroup cos Cosine - * - * Computes the trigonometric cosine function using a combination of table lookup - * and cubic interpolation. There are separate functions for - * Q15, Q31, and floating-point data types. - * The input to the floating-point version is in radians while the - * fixed-point Q15 and Q31 have a scaled input with the range - * [0 +0.9999] mapping to [0 2*pi), Where range excludes 2*pi. - * - * The implementation is based on table lookup using 256 values together with cubic interpolation. - * The steps used are: - * -# Calculation of the nearest integer table index - * -# Fetch the four table values a, b, c, and d - * -# Compute the fractional portion (fract) of the table index. - * -# Calculation of wa, wb, wc, wd - * -# The final result equals a*wa + b*wb + c*wc + d*wd - * - * where - *
    
- *    a=Table[index-1];    
- *    b=Table[index+0];    
- *    c=Table[index+1];    
- *    d=Table[index+2];    
- * 
- * and - *
    
- *    wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;    
- *    wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;    
- *    wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;    
- *    wd=(1/6)*fract.^3 - (1/6)*fract;    
- * 
- */ - - /** - * @addtogroup cos - * @{ - */ - - -/** -* \par -* Example code for Generation of Cos Table: -* tableSize = 256; -*
for(n = -1; n < (tableSize + 2); n++)    
-* {    
-*	cosTable[n+1]= cos(2*pi*n/tableSize);    
-* } 
-* where pi value is 3.14159265358979 -*/ - -static const float32_t cosTable[260] = { - 0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f, - 0.998795449733734130f, 0.997290432453155520f, 0.995184719562530520f, - 0.992479562759399410f, 0.989176511764526370f, - 0.985277652740478520f, 0.980785250663757320f, 0.975702106952667240f, - 0.970031261444091800f, 0.963776051998138430f, 0.956940352916717530f, - 0.949528157711029050f, 0.941544055938720700f, - 0.932992815971374510f, 0.923879504203796390f, 0.914209783077239990f, - 0.903989315032958980f, 0.893224298954010010f, 0.881921291351318360f, - 0.870086967945098880f, 0.857728600502014160f, - 0.844853579998016360f, 0.831469595432281490f, 0.817584812641143800f, - 0.803207516670227050f, 0.788346409797668460f, 0.773010432720184330f, - 0.757208824157714840f, 0.740951120853424070f, - 0.724247097969055180f, 0.707106769084930420f, 0.689540565013885500f, - 0.671558976173400880f, 0.653172850608825680f, 0.634393274784088130f, - 0.615231573581695560f, 0.595699310302734380f, - 0.575808167457580570f, 0.555570244789123540f, 0.534997642040252690f, - 0.514102756977081300f, 0.492898195981979370f, 0.471396744251251220f, - 0.449611335992813110f, 0.427555084228515630f, - 0.405241310596466060f, 0.382683426141738890f, 0.359895050525665280f, - 0.336889863014221190f, 0.313681751489639280f, 0.290284663438797000f, - 0.266712754964828490f, 0.242980182170867920f, - 0.219101235270500180f, 0.195090323686599730f, 0.170961886644363400f, - 0.146730467677116390f, 0.122410677373409270f, 0.098017141222953796f, - 0.073564566671848297f, 0.049067676067352295f, - 0.024541229009628296f, 0.000000000000000061f, -0.024541229009628296f, - -0.049067676067352295f, -0.073564566671848297f, -0.098017141222953796f, - -0.122410677373409270f, -0.146730467677116390f, - -0.170961886644363400f, -0.195090323686599730f, -0.219101235270500180f, - -0.242980182170867920f, -0.266712754964828490f, -0.290284663438797000f, - -0.313681751489639280f, -0.336889863014221190f, - -0.359895050525665280f, -0.382683426141738890f, -0.405241310596466060f, - -0.427555084228515630f, -0.449611335992813110f, -0.471396744251251220f, - -0.492898195981979370f, -0.514102756977081300f, - -0.534997642040252690f, -0.555570244789123540f, -0.575808167457580570f, - -0.595699310302734380f, -0.615231573581695560f, -0.634393274784088130f, - -0.653172850608825680f, -0.671558976173400880f, - -0.689540565013885500f, -0.707106769084930420f, -0.724247097969055180f, - -0.740951120853424070f, -0.757208824157714840f, -0.773010432720184330f, - -0.788346409797668460f, -0.803207516670227050f, - -0.817584812641143800f, -0.831469595432281490f, -0.844853579998016360f, - -0.857728600502014160f, -0.870086967945098880f, -0.881921291351318360f, - -0.893224298954010010f, -0.903989315032958980f, - -0.914209783077239990f, -0.923879504203796390f, -0.932992815971374510f, - -0.941544055938720700f, -0.949528157711029050f, -0.956940352916717530f, - -0.963776051998138430f, -0.970031261444091800f, - -0.975702106952667240f, -0.980785250663757320f, -0.985277652740478520f, - -0.989176511764526370f, -0.992479562759399410f, -0.995184719562530520f, - -0.997290432453155520f, -0.998795449733734130f, - -0.999698817729949950f, -1.000000000000000000f, -0.999698817729949950f, - -0.998795449733734130f, -0.997290432453155520f, -0.995184719562530520f, - -0.992479562759399410f, -0.989176511764526370f, - -0.985277652740478520f, -0.980785250663757320f, -0.975702106952667240f, - -0.970031261444091800f, -0.963776051998138430f, -0.956940352916717530f, - -0.949528157711029050f, -0.941544055938720700f, - -0.932992815971374510f, -0.923879504203796390f, -0.914209783077239990f, - -0.903989315032958980f, -0.893224298954010010f, -0.881921291351318360f, - -0.870086967945098880f, -0.857728600502014160f, - -0.844853579998016360f, -0.831469595432281490f, -0.817584812641143800f, - -0.803207516670227050f, -0.788346409797668460f, -0.773010432720184330f, - -0.757208824157714840f, -0.740951120853424070f, - -0.724247097969055180f, -0.707106769084930420f, -0.689540565013885500f, - -0.671558976173400880f, -0.653172850608825680f, -0.634393274784088130f, - -0.615231573581695560f, -0.595699310302734380f, - -0.575808167457580570f, -0.555570244789123540f, -0.534997642040252690f, - -0.514102756977081300f, -0.492898195981979370f, -0.471396744251251220f, - -0.449611335992813110f, -0.427555084228515630f, - -0.405241310596466060f, -0.382683426141738890f, -0.359895050525665280f, - -0.336889863014221190f, -0.313681751489639280f, -0.290284663438797000f, - -0.266712754964828490f, -0.242980182170867920f, - -0.219101235270500180f, -0.195090323686599730f, -0.170961886644363400f, - -0.146730467677116390f, -0.122410677373409270f, -0.098017141222953796f, - -0.073564566671848297f, -0.049067676067352295f, - -0.024541229009628296f, -0.000000000000000184f, 0.024541229009628296f, - 0.049067676067352295f, 0.073564566671848297f, 0.098017141222953796f, - 0.122410677373409270f, 0.146730467677116390f, - 0.170961886644363400f, 0.195090323686599730f, 0.219101235270500180f, - 0.242980182170867920f, 0.266712754964828490f, 0.290284663438797000f, - 0.313681751489639280f, 0.336889863014221190f, - 0.359895050525665280f, 0.382683426141738890f, 0.405241310596466060f, - 0.427555084228515630f, 0.449611335992813110f, 0.471396744251251220f, - 0.492898195981979370f, 0.514102756977081300f, - 0.534997642040252690f, 0.555570244789123540f, 0.575808167457580570f, - 0.595699310302734380f, 0.615231573581695560f, 0.634393274784088130f, - 0.653172850608825680f, 0.671558976173400880f, - 0.689540565013885500f, 0.707106769084930420f, 0.724247097969055180f, - 0.740951120853424070f, 0.757208824157714840f, 0.773010432720184330f, - 0.788346409797668460f, 0.803207516670227050f, - 0.817584812641143800f, 0.831469595432281490f, 0.844853579998016360f, - 0.857728600502014160f, 0.870086967945098880f, 0.881921291351318360f, - 0.893224298954010010f, 0.903989315032958980f, - 0.914209783077239990f, 0.923879504203796390f, 0.932992815971374510f, - 0.941544055938720700f, 0.949528157711029050f, 0.956940352916717530f, - 0.963776051998138430f, 0.970031261444091800f, - 0.975702106952667240f, 0.980785250663757320f, 0.985277652740478520f, - 0.989176511764526370f, 0.992479562759399410f, 0.995184719562530520f, - 0.997290432453155520f, 0.998795449733734130f, - 0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f, - 0.998795449733734130f -}; - -/** - * @brief Fast approximation to the trigonometric cosine function for floating-point data. - * @param[in] x input value in radians. - * @return cos(x). - */ - - -float32_t arm_cos_f32( - float32_t x) -{ - float32_t cosVal, fract, in; - int32_t index; - uint32_t tableSize = (uint32_t) TABLE_SIZE; - float32_t wa, wb, wc, wd; - float32_t a, b, c, d; - float32_t *tablePtr; - int32_t n; - float32_t fractsq, fractby2, fractby6, fractby3, fractsqby2; - float32_t oneminusfractby2; - float32_t frby2xfrsq, frby6xfrsq; - - /* input x is in radians */ - /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */ - in = x * 0.159154943092f; - - /* Calculation of floor value of input */ - n = (int32_t) in; - - /* Make negative values towards -infinity */ - if(x < 0.0f) - { - n = n - 1; - } - - /* Map input value to [0 1] */ - in = in - (float32_t) n; - - /* Calculation of index of the table */ - index = (uint32_t) (tableSize * in); - - /* fractional value calculation */ - fract = ((float32_t) tableSize * in) - (float32_t) index; - - /* Checking min and max index of table */ - if(index < 0) - { - index = 0; - } - else if(index > 256) - { - index = 256; - } - - /* Initialise table pointer */ - tablePtr = (float32_t *) & cosTable[index]; - - /* Read four nearest values of input value from the cos table */ - a = tablePtr[0]; - b = tablePtr[1]; - c = tablePtr[2]; - d = tablePtr[3]; - - /* Cubic interpolation process */ - fractsq = fract * fract; - fractby2 = fract * 0.5f; - fractby6 = fract * 0.166666667f; - fractby3 = fract * 0.3333333333333f; - fractsqby2 = fractsq * 0.5f; - frby2xfrsq = (fractby2) * fractsq; - frby6xfrsq = (fractby6) * fractsq; - oneminusfractby2 = 1.0f - fractby2; - wb = fractsqby2 - fractby3; - wc = (fractsqby2 + fract); - wa = wb - frby6xfrsq; - wb = frby2xfrsq - fractsq; - cosVal = wa * a; - wc = wc - frby2xfrsq; - wd = (frby6xfrsq) - fractby6; - wb = wb + oneminusfractby2; - - /* Calculate cos value */ - cosVal = (cosVal + (b * wb)) + ((c * wc) + (d * wd)); - - /* Return the output value */ - return (cosVal); - -} - -/** - * @} end of cos group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c deleted file mode 100644 index 12339fd75e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c +++ /dev/null @@ -1,205 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cos_q15.c -* -* Description: Fast cosine calculation for Q15 values. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFastMath - */ - - /** - * @addtogroup cos - * @{ - */ - -/** -* \par -* Table Values are in Q15(1.15 Fixed point format) and generation is done in three steps -* \par -* First Generate cos values in floating point: -* tableSize = 256; -*
for(n = -1; n < (tableSize + 1); n++)    
-* {    
-*	cosTable[n+1]= cos(2*pi*n/tableSize);    
-* }
-* where pi value is 3.14159265358979 -* \par -* Secondly Convert Floating point to Q15(Fixed point): -* (cosTable[i] * pow(2, 15)) -* \par -* Finally Rounding to nearest integer is done -* cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5); -*/ - -static const q15_t cosTableQ15[259] = { - 0x7ff6, 0x7fff, 0x7ff6, 0x7fd9, 0x7fa7, 0x7f62, 0x7f0a, 0x7e9d, - 0x7e1e, 0x7d8a, 0x7ce4, 0x7c2a, 0x7b5d, 0x7a7d, 0x798a, 0x7885, - 0x776c, 0x7642, 0x7505, 0x73b6, 0x7255, 0x70e3, 0x6f5f, 0x6dca, - 0x6c24, 0x6a6e, 0x68a7, 0x66d0, 0x64e9, 0x62f2, 0x60ec, 0x5ed7, - 0x5cb4, 0x5a82, 0x5843, 0x55f6, 0x539b, 0x5134, 0x4ec0, 0x4c40, - 0x49b4, 0x471d, 0x447b, 0x41ce, 0x3f17, 0x3c57, 0x398d, 0x36ba, - 0x33df, 0x30fc, 0x2e11, 0x2b1f, 0x2827, 0x2528, 0x2224, 0x1f1a, - 0x1c0c, 0x18f9, 0x15e2, 0x12c8, 0xfab, 0xc8c, 0x96b, 0x648, - 0x324, 0x0, 0xfcdc, 0xf9b8, 0xf695, 0xf374, 0xf055, 0xed38, - 0xea1e, 0xe707, 0xe3f4, 0xe0e6, 0xdddc, 0xdad8, 0xd7d9, 0xd4e1, - 0xd1ef, 0xcf04, 0xcc21, 0xc946, 0xc673, 0xc3a9, 0xc0e9, 0xbe32, - 0xbb85, 0xb8e3, 0xb64c, 0xb3c0, 0xb140, 0xaecc, 0xac65, 0xaa0a, - 0xa7bd, 0xa57e, 0xa34c, 0xa129, 0x9f14, 0x9d0e, 0x9b17, 0x9930, - 0x9759, 0x9592, 0x93dc, 0x9236, 0x90a1, 0x8f1d, 0x8dab, 0x8c4a, - 0x8afb, 0x89be, 0x8894, 0x877b, 0x8676, 0x8583, 0x84a3, 0x83d6, - 0x831c, 0x8276, 0x81e2, 0x8163, 0x80f6, 0x809e, 0x8059, 0x8027, - 0x800a, 0x8000, 0x800a, 0x8027, 0x8059, 0x809e, 0x80f6, 0x8163, - 0x81e2, 0x8276, 0x831c, 0x83d6, 0x84a3, 0x8583, 0x8676, 0x877b, - 0x8894, 0x89be, 0x8afb, 0x8c4a, 0x8dab, 0x8f1d, 0x90a1, 0x9236, - 0x93dc, 0x9592, 0x9759, 0x9930, 0x9b17, 0x9d0e, 0x9f14, 0xa129, - 0xa34c, 0xa57e, 0xa7bd, 0xaa0a, 0xac65, 0xaecc, 0xb140, 0xb3c0, - 0xb64c, 0xb8e3, 0xbb85, 0xbe32, 0xc0e9, 0xc3a9, 0xc673, 0xc946, - 0xcc21, 0xcf04, 0xd1ef, 0xd4e1, 0xd7d9, 0xdad8, 0xdddc, 0xe0e6, - 0xe3f4, 0xe707, 0xea1e, 0xed38, 0xf055, 0xf374, 0xf695, 0xf9b8, - 0xfcdc, 0x0, 0x324, 0x648, 0x96b, 0xc8c, 0xfab, 0x12c8, - 0x15e2, 0x18f9, 0x1c0c, 0x1f1a, 0x2224, 0x2528, 0x2827, 0x2b1f, - 0x2e11, 0x30fc, 0x33df, 0x36ba, 0x398d, 0x3c57, 0x3f17, 0x41ce, - 0x447b, 0x471d, 0x49b4, 0x4c40, 0x4ec0, 0x5134, 0x539b, 0x55f6, - 0x5843, 0x5a82, 0x5cb4, 0x5ed7, 0x60ec, 0x62f2, 0x64e9, 0x66d0, - 0x68a7, 0x6a6e, 0x6c24, 0x6dca, 0x6f5f, 0x70e3, 0x7255, 0x73b6, - 0x7505, 0x7642, 0x776c, 0x7885, 0x798a, 0x7a7d, 0x7b5d, 0x7c2a, - 0x7ce4, 0x7d8a, 0x7e1e, 0x7e9d, 0x7f0a, 0x7f62, 0x7fa7, 0x7fd9, - 0x7ff6, 0x7fff, 0x7ff6 -}; - - -/** - * @brief Fast approximation to the trigonometric cosine function for Q15 data. - * @param[in] x Scaled input value in radians. - * @return cos(x). - * - * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi. - */ - -q15_t arm_cos_q15( - q15_t x) -{ - q31_t cosVal; /* Temporary variable for output */ - q15_t *tablePtr; /* Pointer to table */ - q15_t in, in2; /* Temporary variables for input */ - q31_t wa, wb, wc, wd; /* Cubic interpolation coefficients */ - q15_t a, b, c, d; /* Four nearest output values */ - q15_t fract, fractCube, fractSquare; /* Variables for fractional value */ - q15_t oneBy6 = 0x1555; /* Fixed point value of 1/6 */ - q15_t tableSpacing = TABLE_SPACING_Q15; /* Table spacing */ - int32_t index; /* Index variable */ - - in = x; - - /* Calculate the nearest index */ - index = (int32_t) in / tableSpacing; - - /* Calculate the nearest value of input */ - in2 = (q15_t) index *tableSpacing; - - /* Calculation of fractional value */ - fract = (in - in2) << 8; - - /* fractSquare = fract * fract */ - fractSquare = (q15_t) ((fract * fract) >> 15); - - /* fractCube = fract * fract * fract */ - fractCube = (q15_t) ((fractSquare * fract) >> 15); - - /* Checking min and max index of table */ - if(index < 0) - { - index = 0; - } - else if(index > 256) - { - index = 256; - } - - /* Initialise table pointer */ - tablePtr = (q15_t *) & cosTableQ15[index]; - - /* Cubic interpolation process */ - /* Calculation of wa */ - /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAA)*fract; */ - wa = (q31_t) oneBy6 *fractCube; - wa += (q31_t) 0x2AAA *fract; - wa = -(wa >> 15); - wa += (fractSquare >> 1u); - - /* Read first nearest value of output from the cos table */ - a = *tablePtr++; - - /* cosVal = a * wa */ - cosVal = a * wa; - - /* Calculation of wb */ - wb = (((fractCube >> 1u) - fractSquare) - (fract >> 1u)) + 0x7FFF; - - /* Read second nearest value of output from the cos table */ - b = *tablePtr++; - - /* cosVal += b*wb */ - cosVal += b * wb; - - /* Calculation of wc */ - wc = -(q31_t) fractCube + fractSquare; - wc = (wc >> 1u) + fract; - - /* Read third nearest value of output from the cos table */ - c = *tablePtr++; - - /* cosVal += c*wc */ - cosVal += c * wc; - - /* Calculation of wd */ - /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */ - fractCube = fractCube - fract; - wd = ((q15_t) (((q31_t) oneBy6 * fractCube) >> 15)); - - /* Read fourth nearest value of output from the cos table */ - d = *tablePtr++; - - /* cosVal += d*wd; */ - cosVal += d * wd; - - /* Convert output value in 1.15(q15) format and saturate */ - cosVal = __SSAT((cosVal >> 15), 16); - - /* Return the output value in 1.15(q15) format */ - return ((q15_t) cosVal); - -} - -/** - * @} end of cos group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c deleted file mode 100644 index 10ecedb41a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c +++ /dev/null @@ -1,239 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cos_q31.c -* -* Description: Fast cosine calculation for Q31 values. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFastMath - */ - - /** - * @addtogroup cos - * @{ - */ - -/** - * \par - * Table Values are in Q31(1.31 Fixed point format) and generation is done in three steps - * First Generate cos values in floating point: - * tableSize = 256; - *
for(n = -1; n < (tableSize + 1); n++)    
- * {    
- *	cosTable[n+1]= cos(2*pi*n/tableSize);    
- * } 
- * where pi value is 3.14159265358979 - * \par - * Secondly Convert Floating point to Q31(Fixed point): - * (cosTable[i] * pow(2, 31)) - * \par - * Finally Rounding to nearest integer is done - * cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5); - */ - - -static const q31_t cosTableQ31[259] = { - 0x7ff62182, 0x7fffffff, 0x7ff62182, 0x7fd8878e, 0x7fa736b4, 0x7f62368f, - 0x7f0991c4, 0x7e9d55fc, - 0x7e1d93ea, 0x7d8a5f40, 0x7ce3ceb2, 0x7c29fbee, 0x7b5d039e, 0x7a7d055b, - 0x798a23b1, 0x78848414, - 0x776c4edb, 0x7641af3d, 0x7504d345, 0x73b5ebd1, 0x72552c85, 0x70e2cbc6, - 0x6f5f02b2, 0x6dca0d14, - 0x6c242960, 0x6a6d98a4, 0x68a69e81, 0x66cf8120, 0x64e88926, 0x62f201ac, - 0x60ec3830, 0x5ed77c8a, - 0x5cb420e0, 0x5a82799a, 0x5842dd54, 0x55f5a4d2, 0x539b2af0, 0x5133cc94, - 0x4ebfe8a5, 0x4c3fdff4, - 0x49b41533, 0x471cece7, 0x447acd50, 0x41ce1e65, 0x3f1749b8, 0x3c56ba70, - 0x398cdd32, 0x36ba2014, - 0x33def287, 0x30fbc54d, 0x2e110a62, 0x2b1f34eb, 0x2826b928, 0x25280c5e, - 0x2223a4c5, 0x1f19f97b, - 0x1c0b826a, 0x18f8b83c, 0x15e21445, 0x12c8106f, 0xfab272b, 0xc8bd35e, - 0x96a9049, 0x647d97c, - 0x3242abf, 0x0, 0xfcdbd541, 0xf9b82684, 0xf6956fb7, 0xf3742ca2, 0xf054d8d5, - 0xed37ef91, - 0xea1debbb, 0xe70747c4, 0xe3f47d96, 0xe0e60685, 0xdddc5b3b, 0xdad7f3a2, - 0xd7d946d8, 0xd4e0cb15, - 0xd1eef59e, 0xcf043ab3, 0xcc210d79, 0xc945dfec, 0xc67322ce, 0xc3a94590, - 0xc0e8b648, 0xbe31e19b, - 0xbb8532b0, 0xb8e31319, 0xb64beacd, 0xb3c0200c, 0xb140175b, 0xaecc336c, - 0xac64d510, 0xaa0a5b2e, - 0xa7bd22ac, 0xa57d8666, 0xa34bdf20, 0xa1288376, 0x9f13c7d0, 0x9d0dfe54, - 0x9b1776da, 0x99307ee0, - 0x9759617f, 0x9592675c, 0x93dbd6a0, 0x9235f2ec, 0x90a0fd4e, 0x8f1d343a, - 0x8daad37b, 0x8c4a142f, - 0x8afb2cbb, 0x89be50c3, 0x8893b125, 0x877b7bec, 0x8675dc4f, 0x8582faa5, - 0x84a2fc62, 0x83d60412, - 0x831c314e, 0x8275a0c0, 0x81e26c16, 0x8162aa04, 0x80f66e3c, 0x809dc971, - 0x8058c94c, 0x80277872, - 0x8009de7e, 0x80000000, 0x8009de7e, 0x80277872, 0x8058c94c, 0x809dc971, - 0x80f66e3c, 0x8162aa04, - 0x81e26c16, 0x8275a0c0, 0x831c314e, 0x83d60412, 0x84a2fc62, 0x8582faa5, - 0x8675dc4f, 0x877b7bec, - 0x8893b125, 0x89be50c3, 0x8afb2cbb, 0x8c4a142f, 0x8daad37b, 0x8f1d343a, - 0x90a0fd4e, 0x9235f2ec, - 0x93dbd6a0, 0x9592675c, 0x9759617f, 0x99307ee0, 0x9b1776da, 0x9d0dfe54, - 0x9f13c7d0, 0xa1288376, - 0xa34bdf20, 0xa57d8666, 0xa7bd22ac, 0xaa0a5b2e, 0xac64d510, 0xaecc336c, - 0xb140175b, 0xb3c0200c, - 0xb64beacd, 0xb8e31319, 0xbb8532b0, 0xbe31e19b, 0xc0e8b648, 0xc3a94590, - 0xc67322ce, 0xc945dfec, - 0xcc210d79, 0xcf043ab3, 0xd1eef59e, 0xd4e0cb15, 0xd7d946d8, 0xdad7f3a2, - 0xdddc5b3b, 0xe0e60685, - 0xe3f47d96, 0xe70747c4, 0xea1debbb, 0xed37ef91, 0xf054d8d5, 0xf3742ca2, - 0xf6956fb7, 0xf9b82684, - 0xfcdbd541, 0x0, 0x3242abf, 0x647d97c, 0x96a9049, 0xc8bd35e, 0xfab272b, - 0x12c8106f, - 0x15e21445, 0x18f8b83c, 0x1c0b826a, 0x1f19f97b, 0x2223a4c5, 0x25280c5e, - 0x2826b928, 0x2b1f34eb, - 0x2e110a62, 0x30fbc54d, 0x33def287, 0x36ba2014, 0x398cdd32, 0x3c56ba70, - 0x3f1749b8, 0x41ce1e65, - 0x447acd50, 0x471cece7, 0x49b41533, 0x4c3fdff4, 0x4ebfe8a5, 0x5133cc94, - 0x539b2af0, 0x55f5a4d2, - 0x5842dd54, 0x5a82799a, 0x5cb420e0, 0x5ed77c8a, 0x60ec3830, 0x62f201ac, - 0x64e88926, 0x66cf8120, - 0x68a69e81, 0x6a6d98a4, 0x6c242960, 0x6dca0d14, 0x6f5f02b2, 0x70e2cbc6, - 0x72552c85, 0x73b5ebd1, - 0x7504d345, 0x7641af3d, 0x776c4edb, 0x78848414, 0x798a23b1, 0x7a7d055b, - 0x7b5d039e, 0x7c29fbee, - 0x7ce3ceb2, 0x7d8a5f40, 0x7e1d93ea, 0x7e9d55fc, 0x7f0991c4, 0x7f62368f, - 0x7fa736b4, 0x7fd8878e, - 0x7ff62182, 0x7fffffff, 0x7ff62182 -}; - -/** - * @brief Fast approximation to the trigonometric cosine function for Q31 data. - * @param[in] x Scaled input value in radians. - * @return cos(x). - * - * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi. - */ - -q31_t arm_cos_q31( - q31_t x) -{ - q31_t cosVal, in, in2; /* Temporary variables for input, output */ - q31_t wa, wb, wc, wd; /* Cubic interpolation coefficients */ - q31_t a, b, c, d; /* Four nearest output values */ - q31_t *tablePtr; /* Pointer to table */ - q31_t fract, fractCube, fractSquare; /* Temporary values for fractional values */ - q31_t oneBy6 = 0x15555555; /* Fixed point value of 1/6 */ - q31_t tableSpacing = TABLE_SPACING_Q31; /* Table spacing */ - q31_t temp; /* Temporary variable for intermediate process */ - int32_t index; /* Index variable */ - - in = x; - - /* Calculate the nearest index */ - index = in / tableSpacing; - - /* Calculate the nearest value of input */ - in2 = ((q31_t) index) * tableSpacing; - - /* Calculation of fractional value */ - fract = (in - in2) << 8; - - /* fractSquare = fract * fract */ - fractSquare = ((q31_t) (((q63_t) fract * fract) >> 32)); - fractSquare = fractSquare << 1; - - /* fractCube = fract * fract * fract */ - fractCube = ((q31_t) (((q63_t) fractSquare * fract) >> 32)); - fractCube = fractCube << 1; - - /* Checking min and max index of table */ - if(index < 0) - { - index = 0; - } - else if(index > 256) - { - index = 256; - } - - /* Initialise table pointer */ - tablePtr = (q31_t *) & cosTableQ31[index]; - - /* Cubic interpolation process */ - /* Calculation of wa */ - /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAAAAAA)*fract; */ - wa = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32)); - temp = 0x2AAAAAAA; - wa = (q31_t) ((((q63_t) wa << 32) + ((q63_t) temp * fract)) >> 32); - wa = -(wa << 1u); - wa += (fractSquare >> 1u); - - /* Read first nearest value of output from the cos table */ - a = *tablePtr++; - - /* cosVal = a*wa */ - cosVal = ((q31_t) (((q63_t) a * wa) >> 32)); - - /* q31(1.31) Fixed point value of 1 */ - temp = 0x7FFFFFFF; - - /* Calculation of wb */ - wb = ((fractCube >> 1u) - (fractSquare + (fract >> 1u))) + temp; - /* Read second nearest value of output from the cos table */ - b = *tablePtr++; - - /* cosVal += b*wb */ - cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) b * (wb))) >> 32); - - /* Calculation of wc */ - wc = -fractCube + fractSquare; - wc = (wc >> 1u) + fract; - /* Read third nearest values of output value from the cos table */ - c = *tablePtr++; - - /* cosVal += c*wc */ - cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) c * (wc))) >> 32); - - /* Calculation of wd */ - /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */ - fractCube = fractCube - fract; - wd = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32)); - wd = (wd << 1u); - - /* Read fourth nearest value of output from the cos table */ - d = *tablePtr++; - - /* cosVal += d*wd; */ - cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) d * (wd))) >> 32); - - - /* convert cosVal in 2.30 format to 1.31 format */ - return (__QADD(cosVal, cosVal)); - -} - -/** - * @} end of cos group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c deleted file mode 100644 index bbbdd6c6c9..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c +++ /dev/null @@ -1,281 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sin_f32.c -* -* Description: Fast sine calculation for floating-point values. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFastMath - */ - -/** - * @defgroup sin Sine - * - * Computes the trigonometric sine function using a combination of table lookup - * and cubic interpolation. There are separate functions for - * Q15, Q31, and floating-point data types. - * The input to the floating-point version is in radians while the - * fixed-point Q15 and Q31 have a scaled input with the range - * [0 +0.9999] mapping to [0 2*pi), Where range excludes 2*pi. - * - * The implementation is based on table lookup using 256 values together with cubic interpolation. - * The steps used are: - * -# Calculation of the nearest integer table index - * -# Fetch the four table values a, b, c, and d - * -# Compute the fractional portion (fract) of the table index. - * -# Calculation of wa, wb, wc, wd - * -# The final result equals a*wa + b*wb + c*wc + d*wd - * - * where - *
    
- *    a=Table[index-1];    
- *    b=Table[index+0];    
- *    c=Table[index+1];    
- *    d=Table[index+2];    
- * 
- * and - *
    
- *    wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;    
- *    wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;    
- *    wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;    
- *    wd=(1/6)*fract.^3 - (1/6)*fract;    
- * 
- */ - -/** - * @addtogroup sin - * @{ - */ - - -/** - * \par - * Example code for Generation of Floating-point Sin Table: - * tableSize = 256; - *
for(n = -1; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n+1]=sin(2*pi*n/tableSize);    
- * }
- * \par - * where pi value is 3.14159265358979 - */ - -static const float32_t sinTable[259] = { - -0.024541229009628296f, 0.000000000000000000f, 0.024541229009628296f, - 0.049067676067352295f, 0.073564566671848297f, 0.098017141222953796f, - 0.122410677373409270f, 0.146730467677116390f, - 0.170961886644363400f, 0.195090323686599730f, 0.219101235270500180f, - 0.242980182170867920f, 0.266712754964828490f, 0.290284663438797000f, - 0.313681751489639280f, 0.336889863014221190f, - 0.359895050525665280f, 0.382683426141738890f, 0.405241310596466060f, - 0.427555084228515630f, 0.449611335992813110f, 0.471396744251251220f, - 0.492898195981979370f, 0.514102756977081300f, - 0.534997642040252690f, 0.555570244789123540f, 0.575808167457580570f, - 0.595699310302734380f, 0.615231573581695560f, 0.634393274784088130f, - 0.653172850608825680f, 0.671558976173400880f, - 0.689540565013885500f, 0.707106769084930420f, 0.724247097969055180f, - 0.740951120853424070f, 0.757208824157714840f, 0.773010432720184330f, - 0.788346409797668460f, 0.803207516670227050f, - 0.817584812641143800f, 0.831469595432281490f, 0.844853579998016360f, - 0.857728600502014160f, 0.870086967945098880f, 0.881921291351318360f, - 0.893224298954010010f, 0.903989315032958980f, - 0.914209783077239990f, 0.923879504203796390f, 0.932992815971374510f, - 0.941544055938720700f, 0.949528157711029050f, 0.956940352916717530f, - 0.963776051998138430f, 0.970031261444091800f, - 0.975702106952667240f, 0.980785250663757320f, 0.985277652740478520f, - 0.989176511764526370f, 0.992479562759399410f, 0.995184719562530520f, - 0.997290432453155520f, 0.998795449733734130f, - 0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f, - 0.998795449733734130f, 0.997290432453155520f, 0.995184719562530520f, - 0.992479562759399410f, 0.989176511764526370f, - 0.985277652740478520f, 0.980785250663757320f, 0.975702106952667240f, - 0.970031261444091800f, 0.963776051998138430f, 0.956940352916717530f, - 0.949528157711029050f, 0.941544055938720700f, - 0.932992815971374510f, 0.923879504203796390f, 0.914209783077239990f, - 0.903989315032958980f, 0.893224298954010010f, 0.881921291351318360f, - 0.870086967945098880f, 0.857728600502014160f, - 0.844853579998016360f, 0.831469595432281490f, 0.817584812641143800f, - 0.803207516670227050f, 0.788346409797668460f, 0.773010432720184330f, - 0.757208824157714840f, 0.740951120853424070f, - 0.724247097969055180f, 0.707106769084930420f, 0.689540565013885500f, - 0.671558976173400880f, 0.653172850608825680f, 0.634393274784088130f, - 0.615231573581695560f, 0.595699310302734380f, - 0.575808167457580570f, 0.555570244789123540f, 0.534997642040252690f, - 0.514102756977081300f, 0.492898195981979370f, 0.471396744251251220f, - 0.449611335992813110f, 0.427555084228515630f, - 0.405241310596466060f, 0.382683426141738890f, 0.359895050525665280f, - 0.336889863014221190f, 0.313681751489639280f, 0.290284663438797000f, - 0.266712754964828490f, 0.242980182170867920f, - 0.219101235270500180f, 0.195090323686599730f, 0.170961886644363400f, - 0.146730467677116390f, 0.122410677373409270f, 0.098017141222953796f, - 0.073564566671848297f, 0.049067676067352295f, - 0.024541229009628296f, 0.000000000000000122f, -0.024541229009628296f, - -0.049067676067352295f, -0.073564566671848297f, -0.098017141222953796f, - -0.122410677373409270f, -0.146730467677116390f, - -0.170961886644363400f, -0.195090323686599730f, -0.219101235270500180f, - -0.242980182170867920f, -0.266712754964828490f, -0.290284663438797000f, - -0.313681751489639280f, -0.336889863014221190f, - -0.359895050525665280f, -0.382683426141738890f, -0.405241310596466060f, - -0.427555084228515630f, -0.449611335992813110f, -0.471396744251251220f, - -0.492898195981979370f, -0.514102756977081300f, - -0.534997642040252690f, -0.555570244789123540f, -0.575808167457580570f, - -0.595699310302734380f, -0.615231573581695560f, -0.634393274784088130f, - -0.653172850608825680f, -0.671558976173400880f, - -0.689540565013885500f, -0.707106769084930420f, -0.724247097969055180f, - -0.740951120853424070f, -0.757208824157714840f, -0.773010432720184330f, - -0.788346409797668460f, -0.803207516670227050f, - -0.817584812641143800f, -0.831469595432281490f, -0.844853579998016360f, - -0.857728600502014160f, -0.870086967945098880f, -0.881921291351318360f, - -0.893224298954010010f, -0.903989315032958980f, - -0.914209783077239990f, -0.923879504203796390f, -0.932992815971374510f, - -0.941544055938720700f, -0.949528157711029050f, -0.956940352916717530f, - -0.963776051998138430f, -0.970031261444091800f, - -0.975702106952667240f, -0.980785250663757320f, -0.985277652740478520f, - -0.989176511764526370f, -0.992479562759399410f, -0.995184719562530520f, - -0.997290432453155520f, -0.998795449733734130f, - -0.999698817729949950f, -1.000000000000000000f, -0.999698817729949950f, - -0.998795449733734130f, -0.997290432453155520f, -0.995184719562530520f, - -0.992479562759399410f, -0.989176511764526370f, - -0.985277652740478520f, -0.980785250663757320f, -0.975702106952667240f, - -0.970031261444091800f, -0.963776051998138430f, -0.956940352916717530f, - -0.949528157711029050f, -0.941544055938720700f, - -0.932992815971374510f, -0.923879504203796390f, -0.914209783077239990f, - -0.903989315032958980f, -0.893224298954010010f, -0.881921291351318360f, - -0.870086967945098880f, -0.857728600502014160f, - -0.844853579998016360f, -0.831469595432281490f, -0.817584812641143800f, - -0.803207516670227050f, -0.788346409797668460f, -0.773010432720184330f, - -0.757208824157714840f, -0.740951120853424070f, - -0.724247097969055180f, -0.707106769084930420f, -0.689540565013885500f, - -0.671558976173400880f, -0.653172850608825680f, -0.634393274784088130f, - -0.615231573581695560f, -0.595699310302734380f, - -0.575808167457580570f, -0.555570244789123540f, -0.534997642040252690f, - -0.514102756977081300f, -0.492898195981979370f, -0.471396744251251220f, - -0.449611335992813110f, -0.427555084228515630f, - -0.405241310596466060f, -0.382683426141738890f, -0.359895050525665280f, - -0.336889863014221190f, -0.313681751489639280f, -0.290284663438797000f, - -0.266712754964828490f, -0.242980182170867920f, - -0.219101235270500180f, -0.195090323686599730f, -0.170961886644363400f, - -0.146730467677116390f, -0.122410677373409270f, -0.098017141222953796f, - -0.073564566671848297f, -0.049067676067352295f, - -0.024541229009628296f, -0.000000000000000245f, 0.024541229009628296f -}; - - -/** - * @brief Fast approximation to the trigonometric sine function for floating-point data. - * @param[in] x input value in radians. - * @return sin(x). - */ - -float32_t arm_sin_f32( - float32_t x) -{ - float32_t sinVal, fract, in; /* Temporary variables for input, output */ - int32_t index; /* Index variable */ - uint32_t tableSize = (uint32_t) TABLE_SIZE; /* Initialise tablesize */ - float32_t wa, wb, wc, wd; /* Cubic interpolation coefficients */ - float32_t a, b, c, d; /* Four nearest output values */ - float32_t *tablePtr; /* Pointer to table */ - int32_t n; - float32_t fractsq, fractby2, fractby6, fractby3, fractsqby2; - float32_t oneminusfractby2; - float32_t frby2xfrsq, frby6xfrsq; - - /* input x is in radians */ - /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */ - in = x * 0.159154943092f; - - /* Calculation of floor value of input */ - n = (int32_t) in; - - /* Make negative values towards -infinity */ - if(x < 0.0f) - { - n = n - 1; - } - - /* Map input value to [0 1] */ - in = in - (float32_t) n; - - /* Calculation of index of the table */ - index = (uint32_t) (tableSize * in); - - /* fractional value calculation */ - fract = ((float32_t) tableSize * in) - (float32_t) index; - - /* Checking min and max index of table */ - if(index < 0) - { - index = 0; - } - else if(index > 256) - { - index = 256; - } - - /* Initialise table pointer */ - tablePtr = (float32_t *) & sinTable[index]; - - /* Read four nearest values of input value from the sin table */ - a = tablePtr[0]; - b = tablePtr[1]; - c = tablePtr[2]; - d = tablePtr[3]; - - /* Cubic interpolation process */ - fractsq = fract * fract; - fractby2 = fract * 0.5f; - fractby6 = fract * 0.166666667f; - fractby3 = fract * 0.3333333333333f; - fractsqby2 = fractsq * 0.5f; - frby2xfrsq = (fractby2) * fractsq; - frby6xfrsq = (fractby6) * fractsq; - oneminusfractby2 = 1.0f - fractby2; - wb = fractsqby2 - fractby3; - wc = (fractsqby2 + fract); - wa = wb - frby6xfrsq; - wb = frby2xfrsq - fractsq; - sinVal = wa * a; - wc = wc - frby2xfrsq; - wd = (frby6xfrsq) - fractby6; - wb = wb + oneminusfractby2; - - /* Calculate sin value */ - sinVal = (sinVal + (b * wb)) + ((c * wc) + (d * wd)); - - /* Return the output value */ - return (sinVal); - -} - -/** - * @} end of sin group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c deleted file mode 100644 index 5eb35652ca..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c +++ /dev/null @@ -1,208 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sin_q15.c -* -* Description: Fast sine calculation for Q15 values. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFastMath - */ - - /** - * @addtogroup sin - * @{ - */ - - -/** - * \par - * Example code for Generation of Q15 Sin Table: - * \par - *
tableSize = 256;    
- * for(n = -1; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n+1]=sin(2*pi*n/tableSize);    
- * } 
- * where pi value is 3.14159265358979 - * \par - * Convert Floating point to Q15(Fixed point): - * (sinTable[i] * pow(2, 15)) - * \par - * rounding to nearest integer is done - * sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5); - */ - - -static const q15_t sinTableQ15[259] = { - 0xfcdc, 0x0, 0x324, 0x648, 0x96b, 0xc8c, 0xfab, 0x12c8, - 0x15e2, 0x18f9, 0x1c0c, 0x1f1a, 0x2224, 0x2528, 0x2827, 0x2b1f, - 0x2e11, 0x30fc, 0x33df, 0x36ba, 0x398d, 0x3c57, 0x3f17, 0x41ce, - 0x447b, 0x471d, 0x49b4, 0x4c40, 0x4ec0, 0x5134, 0x539b, 0x55f6, - 0x5843, 0x5a82, 0x5cb4, 0x5ed7, 0x60ec, 0x62f2, 0x64e9, 0x66d0, - 0x68a7, 0x6a6e, 0x6c24, 0x6dca, 0x6f5f, 0x70e3, 0x7255, 0x73b6, - 0x7505, 0x7642, 0x776c, 0x7885, 0x798a, 0x7a7d, 0x7b5d, 0x7c2a, - 0x7ce4, 0x7d8a, 0x7e1e, 0x7e9d, 0x7f0a, 0x7f62, 0x7fa7, 0x7fd9, - 0x7ff6, 0x7fff, 0x7ff6, 0x7fd9, 0x7fa7, 0x7f62, 0x7f0a, 0x7e9d, - 0x7e1e, 0x7d8a, 0x7ce4, 0x7c2a, 0x7b5d, 0x7a7d, 0x798a, 0x7885, - 0x776c, 0x7642, 0x7505, 0x73b6, 0x7255, 0x70e3, 0x6f5f, 0x6dca, - 0x6c24, 0x6a6e, 0x68a7, 0x66d0, 0x64e9, 0x62f2, 0x60ec, 0x5ed7, - 0x5cb4, 0x5a82, 0x5843, 0x55f6, 0x539b, 0x5134, 0x4ec0, 0x4c40, - 0x49b4, 0x471d, 0x447b, 0x41ce, 0x3f17, 0x3c57, 0x398d, 0x36ba, - 0x33df, 0x30fc, 0x2e11, 0x2b1f, 0x2827, 0x2528, 0x2224, 0x1f1a, - 0x1c0c, 0x18f9, 0x15e2, 0x12c8, 0xfab, 0xc8c, 0x96b, 0x648, - 0x324, 0x0, 0xfcdc, 0xf9b8, 0xf695, 0xf374, 0xf055, 0xed38, - 0xea1e, 0xe707, 0xe3f4, 0xe0e6, 0xdddc, 0xdad8, 0xd7d9, 0xd4e1, - 0xd1ef, 0xcf04, 0xcc21, 0xc946, 0xc673, 0xc3a9, 0xc0e9, 0xbe32, - 0xbb85, 0xb8e3, 0xb64c, 0xb3c0, 0xb140, 0xaecc, 0xac65, 0xaa0a, - 0xa7bd, 0xa57e, 0xa34c, 0xa129, 0x9f14, 0x9d0e, 0x9b17, 0x9930, - 0x9759, 0x9592, 0x93dc, 0x9236, 0x90a1, 0x8f1d, 0x8dab, 0x8c4a, - 0x8afb, 0x89be, 0x8894, 0x877b, 0x8676, 0x8583, 0x84a3, 0x83d6, - 0x831c, 0x8276, 0x81e2, 0x8163, 0x80f6, 0x809e, 0x8059, 0x8027, - 0x800a, 0x8000, 0x800a, 0x8027, 0x8059, 0x809e, 0x80f6, 0x8163, - 0x81e2, 0x8276, 0x831c, 0x83d6, 0x84a3, 0x8583, 0x8676, 0x877b, - 0x8894, 0x89be, 0x8afb, 0x8c4a, 0x8dab, 0x8f1d, 0x90a1, 0x9236, - 0x93dc, 0x9592, 0x9759, 0x9930, 0x9b17, 0x9d0e, 0x9f14, 0xa129, - 0xa34c, 0xa57e, 0xa7bd, 0xaa0a, 0xac65, 0xaecc, 0xb140, 0xb3c0, - 0xb64c, 0xb8e3, 0xbb85, 0xbe32, 0xc0e9, 0xc3a9, 0xc673, 0xc946, - 0xcc21, 0xcf04, 0xd1ef, 0xd4e1, 0xd7d9, 0xdad8, 0xdddc, 0xe0e6, - 0xe3f4, 0xe707, 0xea1e, 0xed38, 0xf055, 0xf374, 0xf695, 0xf9b8, - 0xfcdc, 0x0, 0x324 -}; - - -/** - * @brief Fast approximation to the trigonometric sine function for Q15 data. - * @param[in] x Scaled input value in radians. - * @return sin(x). - * - * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi. - */ - -q15_t arm_sin_q15( - q15_t x) -{ - q31_t sinVal; /* Temporary variables output */ - q15_t *tablePtr; /* Pointer to table */ - q15_t fract, in, in2; /* Temporary variables for input, output */ - q31_t wa, wb, wc, wd; /* Cubic interpolation coefficients */ - q15_t a, b, c, d; /* Four nearest output values */ - q15_t fractCube, fractSquare; /* Temporary values for fractional value */ - q15_t oneBy6 = 0x1555; /* Fixed point value of 1/6 */ - q15_t tableSpacing = TABLE_SPACING_Q15; /* Table spacing */ - int32_t index; /* Index variable */ - - in = x; - - /* Calculate the nearest index */ - index = (int32_t) in / tableSpacing; - - /* Calculate the nearest value of input */ - in2 = (q15_t) ((index) * tableSpacing); - - /* Calculation of fractional value */ - fract = (in - in2) << 8; - - /* fractSquare = fract * fract */ - fractSquare = (q15_t) ((fract * fract) >> 15); - - /* fractCube = fract * fract * fract */ - fractCube = (q15_t) ((fractSquare * fract) >> 15); - - /* Checking min and max index of table */ - if(index < 0) - { - index = 0; - } - else if(index > 256) - { - index = 256; - } - - /* Initialise table pointer */ - tablePtr = (q15_t *) & sinTableQ15[index]; - - /* Cubic interpolation process */ - /* Calculation of wa */ - /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAA)*fract; */ - wa = (q31_t) oneBy6 *fractCube; - wa += (q31_t) 0x2AAA *fract; - wa = -(wa >> 15); - wa += ((q31_t) fractSquare >> 1u); - - /* Read first nearest value of output from the sin table */ - a = *tablePtr++; - - /* sinVal = a * wa */ - sinVal = a * wa; - - /* Calculation of wb */ - wb = (((q31_t) fractCube >> 1u) - (q31_t) fractSquare) - - (((q31_t) fract >> 1u) - 0x7FFF); - - /* Read second nearest value of output from the sin table */ - b = *tablePtr++; - - /* sinVal += b*wb */ - sinVal += b * wb; - - - /* Calculation of wc */ - wc = -(q31_t) fractCube + fractSquare; - wc = (wc >> 1u) + fract; - - /* Read third nearest value of output from the sin table */ - c = *tablePtr++; - - /* sinVal += c*wc */ - sinVal += c * wc; - - /* Calculation of wd */ - /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */ - fractCube = fractCube - fract; - wd = ((q15_t) (((q31_t) oneBy6 * fractCube) >> 15)); - - /* Read fourth nearest value of output from the sin table */ - d = *tablePtr++; - - /* sinVal += d*wd; */ - sinVal += d * wd; - - /* Convert output value in 1.15(q15) format and saturate */ - sinVal = __SSAT((sinVal >> 15), 16); - - /* Return the output value in 1.15(q15) format */ - return ((q15_t) sinVal); - -} - -/** - * @} end of sin group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c deleted file mode 100644 index cf540e24f0..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c +++ /dev/null @@ -1,240 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sin_q31.c -* -* Description: Fast sine calculation for Q31 values. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFastMath - */ - - /** - * @addtogroup sin - * @{ - */ - -/** - * \par - * Tables generated are in Q31(1.31 Fixed point format) - * Generation of sin values in floating point: - *
tableSize = 256;      
- * for(n = -1; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n+1]= sin(2*pi*n/tableSize);    
- * } 
- * where pi value is 3.14159265358979 - * \par - * Convert Floating point to Q31(Fixed point): - * (sinTable[i] * pow(2, 31)) - * \par - * rounding to nearest integer is done - * sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5); - */ - -static const q31_t sinTableQ31[259] = { - 0xfcdbd541, 0x0, 0x3242abf, 0x647d97c, 0x96a9049, 0xc8bd35e, 0xfab272b, - 0x12c8106f, - 0x15e21445, 0x18f8b83c, 0x1c0b826a, 0x1f19f97b, 0x2223a4c5, 0x25280c5e, - 0x2826b928, 0x2b1f34eb, - 0x2e110a62, 0x30fbc54d, 0x33def287, 0x36ba2014, 0x398cdd32, 0x3c56ba70, - 0x3f1749b8, 0x41ce1e65, - 0x447acd50, 0x471cece7, 0x49b41533, 0x4c3fdff4, 0x4ebfe8a5, 0x5133cc94, - 0x539b2af0, 0x55f5a4d2, - 0x5842dd54, 0x5a82799a, 0x5cb420e0, 0x5ed77c8a, 0x60ec3830, 0x62f201ac, - 0x64e88926, 0x66cf8120, - 0x68a69e81, 0x6a6d98a4, 0x6c242960, 0x6dca0d14, 0x6f5f02b2, 0x70e2cbc6, - 0x72552c85, 0x73b5ebd1, - 0x7504d345, 0x7641af3d, 0x776c4edb, 0x78848414, 0x798a23b1, 0x7a7d055b, - 0x7b5d039e, 0x7c29fbee, - 0x7ce3ceb2, 0x7d8a5f40, 0x7e1d93ea, 0x7e9d55fc, 0x7f0991c4, 0x7f62368f, - 0x7fa736b4, 0x7fd8878e, - 0x7ff62182, 0x7fffffff, 0x7ff62182, 0x7fd8878e, 0x7fa736b4, 0x7f62368f, - 0x7f0991c4, 0x7e9d55fc, - 0x7e1d93ea, 0x7d8a5f40, 0x7ce3ceb2, 0x7c29fbee, 0x7b5d039e, 0x7a7d055b, - 0x798a23b1, 0x78848414, - 0x776c4edb, 0x7641af3d, 0x7504d345, 0x73b5ebd1, 0x72552c85, 0x70e2cbc6, - 0x6f5f02b2, 0x6dca0d14, - 0x6c242960, 0x6a6d98a4, 0x68a69e81, 0x66cf8120, 0x64e88926, 0x62f201ac, - 0x60ec3830, 0x5ed77c8a, - 0x5cb420e0, 0x5a82799a, 0x5842dd54, 0x55f5a4d2, 0x539b2af0, 0x5133cc94, - 0x4ebfe8a5, 0x4c3fdff4, - 0x49b41533, 0x471cece7, 0x447acd50, 0x41ce1e65, 0x3f1749b8, 0x3c56ba70, - 0x398cdd32, 0x36ba2014, - 0x33def287, 0x30fbc54d, 0x2e110a62, 0x2b1f34eb, 0x2826b928, 0x25280c5e, - 0x2223a4c5, 0x1f19f97b, - 0x1c0b826a, 0x18f8b83c, 0x15e21445, 0x12c8106f, 0xfab272b, 0xc8bd35e, - 0x96a9049, 0x647d97c, - 0x3242abf, 0x0, 0xfcdbd541, 0xf9b82684, 0xf6956fb7, 0xf3742ca2, 0xf054d8d5, - 0xed37ef91, - 0xea1debbb, 0xe70747c4, 0xe3f47d96, 0xe0e60685, 0xdddc5b3b, 0xdad7f3a2, - 0xd7d946d8, 0xd4e0cb15, - 0xd1eef59e, 0xcf043ab3, 0xcc210d79, 0xc945dfec, 0xc67322ce, 0xc3a94590, - 0xc0e8b648, 0xbe31e19b, - 0xbb8532b0, 0xb8e31319, 0xb64beacd, 0xb3c0200c, 0xb140175b, 0xaecc336c, - 0xac64d510, 0xaa0a5b2e, - 0xa7bd22ac, 0xa57d8666, 0xa34bdf20, 0xa1288376, 0x9f13c7d0, 0x9d0dfe54, - 0x9b1776da, 0x99307ee0, - 0x9759617f, 0x9592675c, 0x93dbd6a0, 0x9235f2ec, 0x90a0fd4e, 0x8f1d343a, - 0x8daad37b, 0x8c4a142f, - 0x8afb2cbb, 0x89be50c3, 0x8893b125, 0x877b7bec, 0x8675dc4f, 0x8582faa5, - 0x84a2fc62, 0x83d60412, - 0x831c314e, 0x8275a0c0, 0x81e26c16, 0x8162aa04, 0x80f66e3c, 0x809dc971, - 0x8058c94c, 0x80277872, - 0x8009de7e, 0x80000000, 0x8009de7e, 0x80277872, 0x8058c94c, 0x809dc971, - 0x80f66e3c, 0x8162aa04, - 0x81e26c16, 0x8275a0c0, 0x831c314e, 0x83d60412, 0x84a2fc62, 0x8582faa5, - 0x8675dc4f, 0x877b7bec, - 0x8893b125, 0x89be50c3, 0x8afb2cbb, 0x8c4a142f, 0x8daad37b, 0x8f1d343a, - 0x90a0fd4e, 0x9235f2ec, - 0x93dbd6a0, 0x9592675c, 0x9759617f, 0x99307ee0, 0x9b1776da, 0x9d0dfe54, - 0x9f13c7d0, 0xa1288376, - 0xa34bdf20, 0xa57d8666, 0xa7bd22ac, 0xaa0a5b2e, 0xac64d510, 0xaecc336c, - 0xb140175b, 0xb3c0200c, - 0xb64beacd, 0xb8e31319, 0xbb8532b0, 0xbe31e19b, 0xc0e8b648, 0xc3a94590, - 0xc67322ce, 0xc945dfec, - 0xcc210d79, 0xcf043ab3, 0xd1eef59e, 0xd4e0cb15, 0xd7d946d8, 0xdad7f3a2, - 0xdddc5b3b, 0xe0e60685, - 0xe3f47d96, 0xe70747c4, 0xea1debbb, 0xed37ef91, 0xf054d8d5, 0xf3742ca2, - 0xf6956fb7, 0xf9b82684, - 0xfcdbd541, 0x0, 0x3242abf -}; - - -/** - * @brief Fast approximation to the trigonometric sine function for Q31 data. - * @param[in] x Scaled input value in radians. - * @return sin(x). - * - * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi. - */ - -q31_t arm_sin_q31( - q31_t x) -{ - q31_t sinVal, in, in2; /* Temporary variables for input, output */ - int32_t index; /* Index variables */ - q31_t wa, wb, wc, wd; /* Cubic interpolation coefficients */ - q31_t a, b, c, d; /* Four nearest output values */ - q31_t *tablePtr; /* Pointer to table */ - q31_t fract, fractCube, fractSquare; /* Temporary values for fractional values */ - q31_t oneBy6 = 0x15555555; /* Fixed point value of 1/6 */ - q31_t tableSpacing = TABLE_SPACING_Q31; /* Table spacing */ - q31_t temp; /* Temporary variable for intermediate process */ - - in = x; - - /* Calculate the nearest index */ - index = (uint32_t) in / (uint32_t) tableSpacing; - - /* Calculate the nearest value of input */ - in2 = (q31_t) index *tableSpacing; - - /* Calculation of fractional value */ - fract = (in - in2) << 8; - - /* fractSquare = fract * fract */ - fractSquare = ((q31_t) (((q63_t) fract * fract) >> 32)); - fractSquare = fractSquare << 1; - - /* fractCube = fract * fract * fract */ - fractCube = ((q31_t) (((q63_t) fractSquare * fract) >> 32)); - fractCube = fractCube << 1; - - /* Checking min and max index of table */ - if(index < 0) - { - index = 0; - } - else if(index > 256) - { - index = 256; - } - - /* Initialise table pointer */ - tablePtr = (q31_t *) & sinTableQ31[index]; - - /* Cubic interpolation process */ - /* Calculation of wa */ - /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAAAAAA)*fract; */ - wa = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32)); - temp = 0x2AAAAAAA; - wa = (q31_t) ((((q63_t) wa << 32) + ((q63_t) temp * fract)) >> 32); - wa = -(wa << 1u); - wa += (fractSquare >> 1u); - - /* Read first nearest value of output from the sin table */ - a = *tablePtr++; - - /* sinVal = a*wa */ - sinVal = ((q31_t) (((q63_t) a * wa) >> 32)); - - /* q31(1.31) Fixed point value of 1 */ - temp = 0x7FFFFFFF; - - /* Calculation of wb */ - wb = ((fractCube >> 1u) - (fractSquare + (fract >> 1u))) + temp; - - /* Read second nearest value of output from the sin table */ - b = *tablePtr++; - - /* sinVal += b*wb */ - sinVal = (q31_t) ((((q63_t) sinVal << 32) + (q63_t) b * (wb)) >> 32); - - /* Calculation of wc */ - wc = -fractCube + fractSquare; - wc = (wc >> 1u) + fract; - - /* Read third nearest value of output from the sin table */ - c = *tablePtr++; - - /* sinVal += c*wc */ - sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) c * wc)) >> 32); - - /* Calculation of wd */ - /* wd = (oneBy6) * fractCube - (oneBy6) * fract; */ - fractCube = fractCube - fract; - wd = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32)); - wd = (wd << 1u); - - /* Read fourth nearest value of output from the sin table */ - d = *tablePtr++; - - /* sinVal += d*wd; */ - sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) d * wd)) >> 32); - - /* convert sinVal in 2.30 format to 1.31 format */ - return (__QADD(sinVal, sinVal)); - -} - -/** - * @} end of sin group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c deleted file mode 100644 index 32eee32522..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c +++ /dev/null @@ -1,131 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2011 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sqrt_q15.c -* -* Description: Q15 square root function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.0 2011/03/08 -* Alpha release. -* -* Version 1.0.1 2011/09/30 -* Beta release. -* -* -------------------------------------------------------------------- */ -#include "arm_math.h" -#include "arm_common_tables.h" - - -/** - * @ingroup groupFastMath - */ - -/** - * @addtogroup SQRT - * @{ - */ - - /** - * @brief Q15 square root function. - * @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF. - * @param[out] *pOut square root of input value. - * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if - * in is negative value and returns zero output for negative values. - */ - -arm_status arm_sqrt_q15( - q15_t in, - q15_t * pOut) -{ - q15_t number, temp1, var1, signBits1, half; - q31_t bits_val1; - float32_t temp_float1; - - number = in; - - /* If the input is a positive number then compute the signBits. */ - if(number > 0) - { - signBits1 = __CLZ(number) - 17; - - /* Shift by the number of signBits1 */ - if((signBits1 % 2) == 0) - { - number = number << signBits1; - } - else - { - number = number << (signBits1 - 1); - } - - /* Calculate half value of the number */ - half = number >> 1; - /* Store the number for later use */ - temp1 = number; - - /*Convert to float */ - temp_float1 = number * 3.051757812500000e-005f; - /*Store as integer */ - bits_val1 = *(int *) &temp_float1; - /* Subtract the shifted value from the magic number to give intial guess */ - bits_val1 = 0x5f3759df - (bits_val1 >> 1); // gives initial guess - /* Store as float */ - temp_float1 = *(float *) &bits_val1; - /* Convert to integer format */ - var1 = (q31_t) (temp_float1 * 16384); - - /* 1st iteration */ - var1 = ((q15_t) ((q31_t) var1 * (0x3000 - - ((q15_t) - ((((q15_t) - (((q31_t) var1 * var1) >> 15)) * - (q31_t) half) >> 15))) >> 15)) << 2; - /* 2nd iteration */ - var1 = ((q15_t) ((q31_t) var1 * (0x3000 - - ((q15_t) - ((((q15_t) - (((q31_t) var1 * var1) >> 15)) * - (q31_t) half) >> 15))) >> 15)) << 2; - /* 3rd iteration */ - var1 = ((q15_t) ((q31_t) var1 * (0x3000 - - ((q15_t) - ((((q15_t) - (((q31_t) var1 * var1) >> 15)) * - (q31_t) half) >> 15))) >> 15)) << 2; - - /* Multiply the inverse square root with the original value */ - var1 = ((q15_t) (((q31_t) temp1 * var1) >> 15)) << 1; - - /* Shift the output down accordingly */ - if((signBits1 % 2) == 0) - { - var1 = var1 >> (signBits1 / 2); - } - else - { - var1 = var1 >> ((signBits1 - 1) / 2); - } - *pOut = var1; - - return (ARM_MATH_SUCCESS); - } - /* If the number is a negative number then store zero as its square root value */ - else - { - *pOut = 0; - return (ARM_MATH_ARGUMENT_ERROR); - } -} - -/** - * @} end of SQRT group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c deleted file mode 100644 index 65de4b3d16..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2011 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sqrt_q31.c -* -* Description: Q31 square root function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.0 2011/03/08 -* Alpha release. -* -* Version 1.0.1 2011/09/30 -* Beta release. -* -* -------------------------------------------------------------------- */ -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @ingroup groupFastMath - */ - -/** - * @addtogroup SQRT - * @{ - */ - -/** - * @brief Q31 square root function. - * @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF. - * @param[out] *pOut square root of input value. - * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if - * in is negative value and returns zero output for negative values. - */ - -arm_status arm_sqrt_q31( - q31_t in, - q31_t * pOut) -{ - q31_t number, temp1, bits_val1, var1, signBits1, half; - float32_t temp_float1; - - number = in; - - /* If the input is a positive number then compute the signBits. */ - if(number > 0) - { - signBits1 = __CLZ(number) - 1; - - /* Shift by the number of signBits1 */ - if((signBits1 % 2) == 0) - { - number = number << signBits1; - } - else - { - number = number << (signBits1 - 1); - } - - /* Calculate half value of the number */ - half = number >> 1; - /* Store the number for later use */ - temp1 = number; - - /*Convert to float */ - temp_float1 = number * 4.6566128731e-010f; - /*Store as integer */ - bits_val1 = *(int *) &temp_float1; - /* Subtract the shifted value from the magic number to give intial guess */ - bits_val1 = 0x5f3759df - (bits_val1 >> 1); // gives initial guess - /* Store as float */ - temp_float1 = *(float *) &bits_val1; - /* Convert to integer format */ - var1 = (q31_t) (temp_float1 * 1073741824); - - /* 1st iteration */ - var1 = ((q31_t) ((q63_t) var1 * (0x30000000 - - ((q31_t) - ((((q31_t) - (((q63_t) var1 * var1) >> 31)) * - (q63_t) half) >> 31))) >> 31)) << 2; - /* 2nd iteration */ - var1 = ((q31_t) ((q63_t) var1 * (0x30000000 - - ((q31_t) - ((((q31_t) - (((q63_t) var1 * var1) >> 31)) * - (q63_t) half) >> 31))) >> 31)) << 2; - /* 3rd iteration */ - var1 = ((q31_t) ((q63_t) var1 * (0x30000000 - - ((q31_t) - ((((q31_t) - (((q63_t) var1 * var1) >> 31)) * - (q63_t) half) >> 31))) >> 31)) << 2; - - /* Multiply the inverse square root with the original value */ - var1 = ((q31_t) (((q63_t) temp1 * var1) >> 31)) << 1; - - /* Shift the output down accordingly */ - if((signBits1 % 2) == 0) - { - var1 = var1 >> (signBits1 / 2); - } - else - { - var1 = var1 >> ((signBits1 - 1) / 2); - } - *pOut = var1; - - return (ARM_MATH_SUCCESS); - } - /* If the number is a negative number then store zero as its square root value */ - else - { - *pOut = 0; - return (ARM_MATH_ARGUMENT_ERROR); - } -} - -/** - * @} end of SQRT group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c deleted file mode 100644 index 4ca7111b39..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c +++ /dev/null @@ -1,105 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df1_32x64_init_q31.c -* -* Description: High precision Q31 Biquad cascade filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup BiquadCascadeDF1_32x64 - * @{ - */ - -/** - * @details - * - * @param[in,out] *S points to an instance of the high precision Q31 Biquad cascade filter structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] *pCoeffs points to the filter coefficients. - * @param[in] *pState points to the state buffer. - * @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format. - * @return none - * - * Coefficient and State Ordering: - * - * \par - * The coefficients are stored in the array pCoeffs in the following order: - *
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
- * where b1x and a1x are the coefficients for the first stage, - * b2x and a2x are the coefficients for the second stage, - * and so on. The pCoeffs array contains a total of 5*numStages values. - * - * \par - * The pState points to state variables array and size of each state variable is 1.63 format. - * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. - * The state variables are arranged in the state array as: - *
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - * The state array has a total length of 4*numStages values. - * The state variables are updated after each block of data is processed; the coefficients are untouched. - */ - -void arm_biquad_cas_df1_32x64_init_q31( - arm_biquad_cas_df1_32x64_ins_q31 * S, - uint8_t numStages, - q31_t * pCoeffs, - q63_t * pState, - uint8_t postShift) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign postShift to be applied to the output */ - S->postShift = postShift; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 4 * numStages */ - memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q63_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - * @} end of BiquadCascadeDF1_32x64 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c deleted file mode 100644 index 607f7f5074..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c +++ /dev/null @@ -1,553 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df1_32x64_q31.c -* -* Description: High precision Q31 Biquad cascade filter processing function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter - * - * This function implements a high precision Biquad cascade filter which operates on - * Q31 data values. The filter coefficients are in 1.31 format and the state variables - * are in 1.63 format. The double precision state variables reduce quantization noise - * in the filter and provide a cleaner output. - * These filters are particularly useful when implementing filters in which the - * singularities are close to the unit circle. This is common for low pass or high - * pass filters with very low cutoff frequencies. - * - * The function operates on blocks of input and output data - * and each call to the function processes blockSize samples through - * the filter. pSrc and pDst points to input and output arrays - * containing blockSize Q31 values. - * - * \par Algorithm - * Each Biquad stage implements a second order filter using the difference equation: - *
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
- * 
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage. - * \image html Biquad.gif "Single Biquad filter stage" - * Coefficients b0, b1, and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. - * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. - * Pay careful attention to the sign of the feedback coefficients. - * Some design tools use the difference equation - *
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]    
- * 
- * In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library. - * - * \par - * Higher order filters are realized as a cascade of second order sections. - * numStages refers to the number of second order stages used. - * For example, an 8th order filter would be realized with numStages=4 second order stages. - * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages" - * A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0). - * - * \par - * The pState points to state variables array . - * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2] and each state variable in 1.63 format to improve precision. - * The state variables are arranged in the array as: - *
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
- * - * \par - * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - * The state array has a total length of 4*numStages values of data in 1.63 format. - * The state variables are updated after each block of data is processed; the coefficients are untouched. - * - * \par Instance Structure - * The coefficients and state variables for a filter are stored together in an instance data structure. - * A separate instance structure must be defined for each filter. - * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - * - * \par Init Function - * There is also an associated initialization function which performs the following operations: - * - Sets the values of the internal structure fields. - * - Zeros out the values in the state buffer. - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Set the values in the state buffer to zeros before static initialization. - * For example, to statically initialize the filter instance structure use - *
    
- *     arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};    
- * 
- * where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer; - * pCoeffs is the address of the coefficient buffer; postShift shift to be applied which is described in detail below. - * \par Fixed-Point Behavior - * Care must be taken while using Biquad Cascade 32x64 filter function. - * Following issues must be considered: - * - Scaling of coefficients - * - Filter gain - * - Overflow and saturation - * - * \par - * Filter coefficients are represented as fractional values and - * restricted to lie in the range [-1 +1). - * The processing function has an additional scaling parameter postShift - * which allows the filter coefficients to exceed the range [+1 -1). - * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. - * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator" - * This essentially scales the filter coefficients by 2^postShift. - * For example, to realize the coefficients - *
    
- *    {1.5, -0.8, 1.2, 1.6, -0.9}    
- * 
- * set the Coefficient array to: - *
    
- *    {0.75, -0.4, 0.6, 0.8, -0.45}    
- * 
- * and set postShift=1 - * - * \par - * The second thing to keep in mind is the gain through the filter. - * The frequency response of a Biquad filter is a function of its coefficients. - * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. - * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter. - * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed. - * - * \par - * The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version. - * This is described in the function specific documentation below. - */ - -/** - * @addtogroup BiquadCascadeDF1_32x64 - * @{ - */ - -/** - * @details - - * @param[in] *S points to an instance of the high precision Q31 Biquad cascade filter. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - * @return none. - * - * \par - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around rather than clip. - * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). - * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to - * 1.31 format by discarding the low 32 bits. - * - * \par - * Two related functions are provided in the CMSIS DSP library. - * arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator. - * arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator. - */ - -void arm_biquad_cas_df1_32x64_q31( - const arm_biquad_cas_df1_32x64_ins_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pIn = pSrc; /* input pointer initialization */ - q31_t *pOut = pDst; /* output pointer initialization */ - q63_t *pState = S->pState; /* state pointer initialization */ - q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ - q63_t acc; /* accumulator */ - q31_t Xn1, Xn2; /* Input Filter state variables */ - q63_t Yn1, Yn2; /* Output Filter state variables */ - q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q31_t Xn; /* temporary input */ - int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ - uint32_t sample, stage = S->numStages; /* loop counters */ - q31_t acc_l, acc_h; /* temporary output */ - uint32_t uShift = ((uint32_t) S->postShift + 1u); - uint32_t lShift = 32u - uShift; /* Shift to be applied to the output */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the state values */ - Xn1 = (q31_t) (pState[0]); - Xn2 = (q31_t) (pState[1]); - Yn1 = pState[2]; - Yn2 = pState[3]; - - /* Apply loop unrolling and compute 4 output values simultaneously. */ - /* The variable acc hold output value that is being computed and - * stored in the destination buffer - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - sample = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) Xn *b0; - - /* acc += b1 * x[n-1] */ - acc += (q63_t) Xn1 *b1; - - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn2 *b2; - - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn1, a1); - - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn2, a2); - - /* The result is converted to 1.63 , Yn2 variable is reused */ - Yn2 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer in 1.31 format. */ - *pOut = acc_h; - - /* Read the second input into Xn2, to reuse the value */ - Xn2 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc += b1 * x[n-1] */ - acc = (q63_t) Xn *b1; - - /* acc = b0 * x[n] */ - acc += (q63_t) Xn2 *b0; - - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn1 *b2; - - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn2, a1); - - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn1, a2); - - /* The result is converted to 1.63, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Read the third input into Xn1, to reuse the value */ - Xn1 = *pIn++; - - /* The result is converted to 1.31 */ - /* Store the output in the destination buffer. */ - *(pOut + 1u) = acc_h; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) Xn1 *b0; - - /* acc += b1 * x[n-1] */ - acc += (q63_t) Xn2 *b1; - - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn *b2; - - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn1, a1); - - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn2, a2); - - /* The result is converted to 1.63, Yn2 variable is reused */ - Yn2 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer in 1.31 format. */ - *(pOut + 2u) = acc_h; - - /* Read the fourth input into Xn, to reuse the value */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - acc = (q63_t) Xn *b0; - - /* acc += b1 * x[n-1] */ - acc += (q63_t) Xn1 *b1; - - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn2 *b2; - - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn2, a1); - - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn1, a2); - - /* The result is converted to 1.63, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer in 1.31 format. */ - *(pOut + 3u) = acc_h; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - - /* update output pointer */ - pOut += 4u; - - /* decrement the loop counter */ - sample--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - sample = (blockSize & 0x3u); - - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) Xn *b0; - /* acc += b1 * x[n-1] */ - acc += (q63_t) Xn1 *b1; - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn2 *b2; - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn1, a1); - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn2, a2); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - /* The result is converted to 1.63, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer in 1.31 format. */ - *pOut++ = acc_h; - //Yn1 = acc << shift; - - /* Store the output in the destination buffer in 1.31 format. */ -// *pOut++ = (q31_t) (acc >> (32 - shift)); - - /* decrement the loop counter */ - sample--; - } - - /* The first stage output is given as input to the second stage. */ - pIn = pDst; - - /* Reset to destination buffer working pointer */ - pOut = pDst; - - /* Store the updated state variables back into the pState array */ - /* Store the updated state variables back into the pState array */ - *pState++ = (q63_t) Xn1; - *pState++ = (q63_t) Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - } while(--stage); - -#else - - /* Run the below code for Cortex-M0 */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the state values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - - /* The variable acc hold output value that is being computed and - * stored in the destination buffer - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - sample = blockSize; - - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - acc = (q63_t) Xn *b0; - /* acc += b1 * x[n-1] */ - acc += (q63_t) Xn1 *b1; - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn2 *b2; - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn1, a1); - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn2, a2); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - - /* The result is converted to 1.63, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer in 1.31 format. */ - *pOut++ = acc_h; - - //Yn1 = acc << shift; - - /* Store the output in the destination buffer in 1.31 format. */ - //*pOut++ = (q31_t) (acc >> (32 - shift)); - - /* decrement the loop counter */ - sample--; - } - - /* The first stage output is given as input to the second stage. */ - pIn = pDst; - - /* Reset to destination buffer working pointer */ - pOut = pDst; - - /* Store the updated state variables back into the pState array */ - *pState++ = (q63_t) Xn1; - *pState++ = (q63_t) Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - } while(--stage); - -#endif /* #ifndef ARM_MATH_CM0 */ -} - - /** - * @} end of BiquadCascadeDF1_32x64 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c deleted file mode 100644 index 4ea80e1615..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c +++ /dev/null @@ -1,421 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df1_f32.c -* -* Description: Processing function for the -* floating-point Biquad cascade DirectFormI(DF1) filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure - * - * This set of functions implements arbitrary order recursive (IIR) filters. - * The filters are implemented as a cascade of second order Biquad sections. - * The functions support Q15, Q31 and floating-point data types. - * Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3. - * - * The functions operate on blocks of input and output data and each call to the function - * processes blockSize samples through the filter. - * pSrc points to the array of input data and - * pDst points to the array of output data. - * Both arrays contain blockSize values. - * - * \par Algorithm - * Each Biquad stage implements a second order filter using the difference equation: - *
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
- * 
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage. - * \image html Biquad.gif "Single Biquad filter stage" - * Coefficients b0, b1 and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. - * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. - * Pay careful attention to the sign of the feedback coefficients. - * Some design tools use the difference equation - *
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]    
- * 
- * In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library. - * - * \par - * Higher order filters are realized as a cascade of second order sections. - * numStages refers to the number of second order stages used. - * For example, an 8th order filter would be realized with numStages=4 second order stages. - * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages" - * A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0). - * - * \par - * The pState points to state variables array. - * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. - * The state variables are arranged in the pState array as: - *
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
- * - * \par - * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - * The state array has a total length of 4*numStages values. - * The state variables are updated after each block of data is processed, the coefficients are untouched. - * - * \par Instance Structure - * The coefficients and state variables for a filter are stored together in an instance data structure. - * A separate instance structure must be defined for each filter. - * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Init Functions - * There is also an associated initialization function for each data type. - * The initialization function performs following operations: - * - Sets the values of the internal structure fields. - * - Zeros out the values in the state buffer. - * - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Set the values in the state buffer to zeros before static initialization. - * The code below statically initializes each of the 3 different data type filter instance structures - *
    
- *     arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};    
- *     arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};    
- *     arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};    
- * 
- * where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer; - * pCoeffs is the address of the coefficient buffer; postShift shift to be applied. - * - * \par Fixed-Point Behavior - * Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions. - * Following issues must be considered: - * - Scaling of coefficients - * - Filter gain - * - Overflow and saturation - * - * \par - * Scaling of coefficients: - * Filter coefficients are represented as fractional values and - * coefficients are restricted to lie in the range [-1 +1). - * The fixed-point functions have an additional scaling parameter postShift - * which allow the filter coefficients to exceed the range [+1 -1). - * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. - * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator" - * This essentially scales the filter coefficients by 2^postShift. - * For example, to realize the coefficients - *
    
- *    {1.5, -0.8, 1.2, 1.6, -0.9}    
- * 
- * set the pCoeffs array to: - *
    
- *    {0.75, -0.4, 0.6, 0.8, -0.45}    
- * 
- * and set postShift=1 - * - * \par - * Filter gain: - * The frequency response of a Biquad filter is a function of its coefficients. - * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. - * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter. - * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed. - * - * \par - * Overflow and saturation: - * For Q15 and Q31 versions, it is described separately as part of the function specific documentation below. - */ - -/** - * @addtogroup BiquadCascadeDF1 - * @{ - */ - -/** - * @param[in] *S points to an instance of the floating-point Biquad cascade structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process per call. - * @return none. - * - */ - -void arm_biquad_cascade_df1_f32( - const arm_biquad_casd_df1_inst_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pIn = pSrc; /* source pointer */ - float32_t *pOut = pDst; /* destination pointer */ - float32_t *pState = S->pState; /* pState pointer */ - float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ - float32_t acc; /* Simulates the accumulator */ - float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ - float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ - float32_t Xn; /* temporary input */ - uint32_t sample, stage = S->numStages; /* loop counters */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the pState values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - - /* Apply loop unrolling and compute 4 output values simultaneously. */ - /* The variable acc hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - sample = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(sample > 0u) - { - /* Read the first input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = Yn2; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - - /* Read the second input */ - Xn2 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1); - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = Yn1; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - - /* Read the third input */ - Xn1 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2); - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = Yn2; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - - /* Read the forth input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1); - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = Yn1; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - - /* decrement the loop counter */ - sample--; - - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - sample = blockSize & 0x3u; - - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - Yn1 = acc; - - /* decrement the loop counter */ - sample--; - - } - - /* Store the updated state variables back into the pState array */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent numStages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset the output pointer */ - pOut = pDst; - - /* decrement the loop counter */ - stage--; - - } while(stage > 0u); - -#else - - /* Run the below code for Cortex-M0 */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the pState values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - - /* The variables acc holds the output value that is computed: - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - sample = blockSize; - - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - Yn1 = acc; - - /* decrement the loop counter */ - sample--; - } - - /* Store the updated state variables back into the pState array */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent numStages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset the output pointer */ - pOut = pDst; - - /* decrement the loop counter */ - stage--; - - } while(stage > 0u); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - - - /** - * @} end of BiquadCascadeDF1 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c deleted file mode 100644 index 3d9b5f64aa..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c +++ /dev/null @@ -1,283 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df1_fast_q15.c -* -* Description: Fast processing function for the -* Q15 Biquad cascade filter. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.9 2010/08/16 -* Initial version -* -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup BiquadCascadeDF1 - * @{ - */ - -/** - * @details - * @param[in] *S points to an instance of the Q15 Biquad cascade structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * This fast version uses a 32-bit accumulator with 2.30 format. - * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around and distorts the result. - * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). - * The 2.30 accumulator is then shifted by postShift bits and the result truncated to 1.15 format by discarding the low 16 bits. - * - * \par - * Refer to the function arm_biquad_cascade_df1_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. - * Use the function arm_biquad_cascade_df1_init_q15() to initialize the filter structure. - * - */ - -void arm_biquad_cascade_df1_fast_q15( - const arm_biquad_casd_df1_inst_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pIn = pSrc; /* Source pointer */ - q15_t *pOut = pDst; /* Destination pointer */ - q31_t in; /* Temporary variable to hold input value */ - q31_t out; /* Temporary variable to hold output value */ - q31_t b0; /* Temporary variable to hold bo value */ - q31_t b1, a1; /* Filter coefficients */ - q31_t state_in, state_out; /* Filter state variables */ - q31_t acc; /* Accumulator */ - int32_t shift = (int32_t) (15 - S->postShift); /* Post shift */ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - uint32_t sample, stage = S->numStages; /* Stage loop counter */ - - - - do - { - - /* Read the b0 and 0 coefficients using SIMD */ - b0 = *__SIMD32(pCoeffs)++; - - /* Read the b1 and b2 coefficients using SIMD */ - b1 = *__SIMD32(pCoeffs)++; - - /* Read the a1 and a2 coefficients using SIMD */ - a1 = *__SIMD32(pCoeffs)++; - - /* Read the input state values from the state buffer: x[n-1], x[n-2] */ - state_in = *__SIMD32(pState)++; - - /* Read the output state values from the state buffer: y[n-1], y[n-2] */ - state_out = *__SIMD32(pState)--; - - /* Apply loop unrolling and compute 2 output values simultaneously. */ - /* The variable acc hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - sample = blockSize >> 1u; - - /* First part of the processing with loop unrolling. Compute 2 outputs at a time. - ** a second loop below computes the remaining 1 sample. */ - while(sample > 0u) - { - - /* Read the input */ - in = *__SIMD32(pIn)++; - - /* out = b0 * x[n] + 0 * 0 */ - out = __SMUAD(b0, in); - /* acc = b1 * x[n-1] + acc += b2 * x[n-2] + out */ - acc = __SMLAD(b1, state_in, out); - /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */ - acc = __SMLAD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 and then saturation is applied */ - out = __SSAT((acc >> shift), 16); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ - -#ifndef ARM_MATH_BIG_ENDIAN - - state_in = __PKHBT(in, state_in, 16); - state_out = __PKHBT(out, state_out, 16); - -#else - - state_in = __PKHBT(state_in >> 16, (in >> 16), 16); - state_out = __PKHBT(state_out >> 16, (out), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* out = b0 * x[n] + 0 * 0 */ - out = __SMUADX(b0, in); - /* acc0 = b1 * x[n-1] , acc0 += b2 * x[n-2] + out */ - acc = __SMLAD(b1, state_in, out); - /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */ - acc = __SMLAD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 and then saturation is applied */ - out = __SSAT((acc >> shift), 16); - - - /* Store the output in the destination buffer. */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16); - -#else - - *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ - -#ifndef ARM_MATH_BIG_ENDIAN - - state_in = __PKHBT(in >> 16, state_in, 16); - state_out = __PKHBT(out, state_out, 16); - -#else - - state_in = __PKHBT(state_in >> 16, in, 16); - state_out = __PKHBT(state_out >> 16, out, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - - /* Decrement the loop counter */ - sample--; - - } - - /* If the blockSize is not a multiple of 2, compute any remaining output samples here. - ** No loop unrolling is used. */ - - if((blockSize & 0x1u) != 0u) - { - /* Read the input */ - in = *pIn++; - - /* out = b0 * x[n] + 0 * 0 */ - -#ifndef ARM_MATH_BIG_ENDIAN - - out = __SMUAD(b0, in); - -#else - - out = __SMUADX(b0, in); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc = b1 * x[n-1], acc += b2 * x[n-2] + out */ - acc = __SMLAD(b1, state_in, out); - /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */ - acc = __SMLAD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 and then saturation is applied */ - out = __SSAT((acc >> shift), 16); - - /* Store the output in the destination buffer. */ - *pOut++ = (q15_t) out; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ - -#ifndef ARM_MATH_BIG_ENDIAN - - state_in = __PKHBT(in, state_in, 16); - state_out = __PKHBT(out, state_out, 16); - -#else - - state_in = __PKHBT(state_in >> 16, in, 16); - state_out = __PKHBT(state_out >> 16, out, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - } - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent (numStages - 1) occur in-place in the output buffer */ - pIn = pDst; - - /* Reset the output pointer */ - pOut = pDst; - - /* Store the updated state variables back into the state array */ - *__SIMD32(pState)++ = state_in; - *__SIMD32(pState)++ = state_out; - - - /* Decrement the loop counter */ - stage--; - - } while(stage > 0u); -} - - -/** - * @} end of BiquadCascadeDF1 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c deleted file mode 100644 index 62f02502c1..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c +++ /dev/null @@ -1,275 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df1_fast_q31.c -* -* Description: Processing function for the -* Q31 Fast Biquad cascade DirectFormI(DF1) filter. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.9 2010/08/27 -* Initial version -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup BiquadCascadeDF1 - * @{ - */ - -/** - * @details - * - * @param[in] *S points to an instance of the Q31 Biquad cascade structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * This function is optimized for speed at the expense of fixed-point precision and overflow protection. - * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. - * These intermediate results are added to a 2.30 accumulator. - * Finally, the accumulator is saturated and converted to a 1.31 result. - * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. - * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function - * arm_biquad_cascade_df1_init_q31() to initialize filter structure. - * - * \par - * Refer to the function arm_biquad_cascade_df1_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure. - * Use the function arm_biquad_cascade_df1_init_q31() to initialize the filter structure. - */ - -void arm_biquad_cascade_df1_fast_q31( - const arm_biquad_casd_df1_inst_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t acc; /* accumulator */ - q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ - q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q31_t *pIn = pSrc; /* input pointer initialization */ - q31_t *pOut = pDst; /* output pointer initialization */ - q31_t *pState = S->pState; /* pState pointer initialization */ - q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ - q31_t Xn; /* temporary input */ - int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ - uint32_t sample, stage = S->numStages; /* loop counters */ - - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the state values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - - /* Apply loop unrolling and compute 4 output values simultaneously. */ - /* The variables acc ... acc3 hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - sample = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - acc = (q31_t) (((q63_t) b1 * Xn1) >> 32); - /* acc += b1 * x[n-1] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32); - /* acc += b[2] * x[n-2] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32); - /* acc += a1 * y[n-1] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32); - /* acc += a2 * y[n-2] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32); - - /* The result is converted to 1.31 , Yn2 variable is reused */ - Yn2 = acc << shift; - - /* Read the second input */ - Xn2 = *(pIn + 1u); - - /* Store the output in the destination buffer. */ - *pOut = Yn2; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32); - /* acc += b1 * x[n-1] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32); - /* acc += b[2] * x[n-2] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32); - /* acc += a1 * y[n-1] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32); - /* acc += a2 * y[n-2] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32); - - /* The result is converted to 1.31, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Read the third input */ - Xn1 = *(pIn + 2u); - - /* Store the output in the destination buffer. */ - *(pOut + 1u) = Yn1; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32); - /* acc += b1 * x[n-1] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32); - /* acc += b[2] * x[n-2] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32); - /* acc += a1 * y[n-1] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32); - /* acc += a2 * y[n-2] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32); - - /* The result is converted to 1.31, Yn2 variable is reused */ - Yn2 = acc << shift; - - /* Read the forth input */ - Xn = *(pIn + 3u); - - /* Store the output in the destination buffer. */ - *(pOut + 2u) = Yn2; - pIn += 4u; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32); - /* acc += b1 * x[n-1] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32); - /* acc += b[2] * x[n-2] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32); - /* acc += a1 * y[n-1] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32); - /* acc += a2 * y[n-2] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - Xn2 = Xn1; - - /* The result is converted to 1.31, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Xn1 = Xn */ - Xn1 = Xn; - - /* Store the output in the destination buffer. */ - *(pOut + 3u) = Yn1; - pOut += 4u; - - /* decrement the loop counter */ - sample--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - sample = (blockSize & 0x3u); - - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32); - /* acc += b1 * x[n-1] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32); - /* acc += b[2] * x[n-2] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32); - /* acc += a1 * y[n-1] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32); - /* acc += a2 * y[n-2] */ - acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32); - /* The result is converted to 1.31 */ - acc = acc << shift; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - Yn1 = acc; - - /* Store the output in the destination buffer. */ - *pOut++ = acc; - - /* decrement the loop counter */ - sample--; - } - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent stages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset to destination pointer */ - pOut = pDst; - - /* Store the updated state variables back into the pState array */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - } while(--stage); -} - -/** - * @} end of BiquadCascadeDF1 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c deleted file mode 100644 index b5032a55f1..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c +++ /dev/null @@ -1,107 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df1_init_f32.c -* -* Description: floating-point Biquad cascade DirectFormI(DF1) filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup BiquadCascadeDF1 - * @{ - */ - -/** - * @details - * @brief Initialization function for the floating-point Biquad cascade filter. - * @param[in,out] *S points to an instance of the floating-point Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] *pCoeffs points to the filter coefficients array. - * @param[in] *pState points to the state array. - * @return none - * - * - * Coefficient and State Ordering: - * - * \par - * The coefficients are stored in the array pCoeffs in the following order: - *
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
- * - * \par - * where b1x and a1x are the coefficients for the first stage, - * b2x and a2x are the coefficients for the second stage, - * and so on. The pCoeffs array contains a total of 5*numStages values. - * - * \par - * The pState is a pointer to state array. - * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. - * The state variables are arranged in the pState array as: - *
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - * The state array has a total length of 4*numStages values. - * The state variables are updated after each block of data is processed; the coefficients are untouched. - * - */ - -void arm_biquad_cascade_df1_init_f32( - arm_biquad_casd_df1_inst_f32 * S, - uint8_t numStages, - float32_t * pCoeffs, - float32_t * pState) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 4 * numStages */ - memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - * @} end of BiquadCascadeDF1 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c deleted file mode 100644 index fa102f681b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c +++ /dev/null @@ -1,109 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df1_init_q15.c -* -* Description: Q15 Biquad cascade DirectFormI(DF1) filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup BiquadCascadeDF1 - * @{ - */ - -/** - * @details - * - * @param[in,out] *S points to an instance of the Q15 Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] *pCoeffs points to the filter coefficients. - * @param[in] *pState points to the state buffer. - * @param[in] postShift Shift to be applied to the accumulator result. Varies according to the coefficients format - * @return none - * - * Coefficient and State Ordering: - * - * \par - * The coefficients are stored in the array pCoeffs in the following order: - *
    
- *     {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}    
- * 
- * where b1x and a1x are the coefficients for the first stage, - * b2x and a2x are the coefficients for the second stage, - * and so on. The pCoeffs array contains a total of 6*numStages values. - * The zero coefficient between b1 and b2 facilities use of 16-bit SIMD instructions on the Cortex-M4. - * - * \par - * The state variables are stored in the array pState. - * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. - * The state variables are arranged in the pState array as: - *
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - * The state array has a total length of 4*numStages values. - * The state variables are updated after each block of data is processed; the coefficients are untouched. - */ - -void arm_biquad_cascade_df1_init_q15( - arm_biquad_casd_df1_inst_q15 * S, - uint8_t numStages, - q15_t * pCoeffs, - q15_t * pState, - int8_t postShift) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign postShift to be applied to the output */ - S->postShift = postShift; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 4 * numStages */ - memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - * @} end of BiquadCascadeDF1 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c deleted file mode 100644 index 74eea26474..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c +++ /dev/null @@ -1,109 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df1_init_q31.c -* -* Description: Q31 Biquad cascade DirectFormI(DF1) filter initialization function. -* -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup BiquadCascadeDF1 - * @{ - */ - -/** - * @details - * - * @param[in,out] *S points to an instance of the Q31 Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] *pCoeffs points to the filter coefficients buffer. - * @param[in] *pState points to the state buffer. - * @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format - * @return none - * - * Coefficient and State Ordering: - * - * \par - * The coefficients are stored in the array pCoeffs in the following order: - *
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
- * where b1x and a1x are the coefficients for the first stage, - * b2x and a2x are the coefficients for the second stage, - * and so on. The pCoeffs array contains a total of 5*numStages values. - * - * \par - * The pState points to state variables array. - * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. - * The state variables are arranged in the pState array as: - *
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - * The state array has a total length of 4*numStages values. - * The state variables are updated after each block of data is processed; the coefficients are untouched. - */ - -void arm_biquad_cascade_df1_init_q31( - arm_biquad_casd_df1_inst_q31 * S, - uint8_t numStages, - q31_t * pCoeffs, - q31_t * pState, - int8_t postShift) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign postShift to be applied to the output */ - S->postShift = postShift; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 4 * numStages */ - memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - * @} end of BiquadCascadeDF1 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c deleted file mode 100644 index 3109c08602..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c +++ /dev/null @@ -1,408 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df1_q15.c -* -* Description: Processing function for the -* Q15 Biquad cascade DirectFormI(DF1) filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup BiquadCascadeDF1 - * @{ - */ - -/** - * @brief Processing function for the Q15 Biquad cascade filter. - * @param[in] *S points to an instance of the Q15 Biquad cascade structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] blockSize number of samples to process per call. - * @return none. - * - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using a 64-bit internal accumulator. - * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - * The accumulator is then shifted by postShift bits to truncate the result to 1.15 format by discarding the low 16 bits. - * Finally, the result is saturated to 1.15 format. - * - * \par - * Refer to the function arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4. - */ - -void arm_biquad_cascade_df1_q15( - const arm_biquad_casd_df1_inst_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q15_t *pIn = pSrc; /* Source pointer */ - q15_t *pOut = pDst; /* Destination pointer */ - q31_t in; /* Temporary variable to hold input value */ - q31_t out; /* Temporary variable to hold output value */ - q31_t b0; /* Temporary variable to hold bo value */ - q31_t b1, a1; /* Filter coefficients */ - q31_t state_in, state_out; /* Filter state variables */ - q31_t acc_l, acc_h; - q63_t acc; /* Accumulator */ - int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ - int32_t uShift = (32 - lShift); - - do - { - /* Read the b0 and 0 coefficients using SIMD */ - b0 = *__SIMD32(pCoeffs)++; - - /* Read the b1 and b2 coefficients using SIMD */ - b1 = *__SIMD32(pCoeffs)++; - - /* Read the a1 and a2 coefficients using SIMD */ - a1 = *__SIMD32(pCoeffs)++; - - /* Read the input state values from the state buffer: x[n-1], x[n-2] */ - state_in = *__SIMD32(pState)++; - - /* Read the output state values from the state buffer: y[n-1], y[n-2] */ - state_out = *__SIMD32(pState)--; - - /* Apply loop unrolling and compute 2 output values simultaneously. */ - /* The variable acc hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - sample = blockSize >> 1u; - - /* First part of the processing with loop unrolling. Compute 2 outputs at a time. - ** a second loop below computes the remaining 1 sample. */ - while(sample > 0u) - { - - /* Read the input */ - in = *__SIMD32(pIn)++; - - /* out = b0 * x[n] + 0 * 0 */ - out = __SMUAD(b0, in); - - /* acc += b1 * x[n-1] + b2 * x[n-2] + out */ - acc = __SMLALD(b1, state_in, out); - /* acc += a1 * y[n-1] + a2 * y[n-2] */ - acc = __SMLALD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - out = (uint32_t) acc_l >> lShift | acc_h << uShift; - - out = __SSAT(out, 16); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ - -#ifndef ARM_MATH_BIG_ENDIAN - - state_in = __PKHBT(in, state_in, 16); - state_out = __PKHBT(out, state_out, 16); - -#else - - state_in = __PKHBT(state_in >> 16, (in >> 16), 16); - state_out = __PKHBT(state_out >> 16, (out), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* out = b0 * x[n] + 0 * 0 */ - out = __SMUADX(b0, in); - /* acc += b1 * x[n-1] + b2 * x[n-2] + out */ - acc = __SMLALD(b1, state_in, out); - /* acc += a1 * y[n-1] + a2 * y[n-2] */ - acc = __SMLALD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - out = (uint32_t) acc_l >> lShift | acc_h << uShift; - - out = __SSAT(out, 16); - - /* Store the output in the destination buffer. */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16); - -#else - - *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ -#ifndef ARM_MATH_BIG_ENDIAN - - state_in = __PKHBT(in >> 16, state_in, 16); - state_out = __PKHBT(out, state_out, 16); - -#else - - state_in = __PKHBT(state_in >> 16, in, 16); - state_out = __PKHBT(state_out >> 16, out, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - - /* Decrement the loop counter */ - sample--; - - } - - /* If the blockSize is not a multiple of 2, compute any remaining output samples here. - ** No loop unrolling is used. */ - - if((blockSize & 0x1u) != 0u) - { - /* Read the input */ - in = *pIn++; - - /* out = b0 * x[n] + 0 * 0 */ - -#ifndef ARM_MATH_BIG_ENDIAN - - out = __SMUAD(b0, in); - -#else - - out = __SMUADX(b0, in); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc = b1 * x[n-1] + b2 * x[n-2] + out */ - acc = __SMLALD(b1, state_in, out); - /* acc += a1 * y[n-1] + a2 * y[n-2] */ - acc = __SMLALD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - out = (uint32_t) acc_l >> lShift | acc_h << uShift; - - out = __SSAT(out, 16); - - /* Store the output in the destination buffer. */ - *pOut++ = (q15_t) out; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ - -#ifndef ARM_MATH_BIG_ENDIAN - - state_in = __PKHBT(in, state_in, 16); - state_out = __PKHBT(out, state_out, 16); - -#else - - state_in = __PKHBT(state_in >> 16, in, 16); - state_out = __PKHBT(state_out >> 16, out, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - } - - /* The first stage goes from the input wire to the output wire. */ - /* Subsequent numStages occur in-place in the output wire */ - pIn = pDst; - - /* Reset the output pointer */ - pOut = pDst; - - /* Store the updated state variables back into the state array */ - *__SIMD32(pState)++ = state_in; - *__SIMD32(pState)++ = state_out; - - - /* Decrement the loop counter */ - stage--; - - } while(stage > 0u); - -#else - - /* Run the below code for Cortex-M0 */ - - q15_t *pIn = pSrc; /* Source pointer */ - q15_t *pOut = pDst; /* Destination pointer */ - q15_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ - q15_t Xn; /* temporary input */ - q63_t acc; /* Accumulator */ - int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the state values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - - /* The variables acc holds the output value that is computed: - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - sample = blockSize; - - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - acc = (q31_t) b0 *Xn; - - /* acc += b1 * x[n-1] */ - acc += (q31_t) b1 *Xn1; - /* acc += b[2] * x[n-2] */ - acc += (q31_t) b2 *Xn2; - /* acc += a1 * y[n-1] */ - acc += (q31_t) a1 *Yn1; - /* acc += a2 * y[n-2] */ - acc += (q31_t) a2 *Yn2; - - /* The result is converted to 1.31 */ - acc = __SSAT((acc >> shift), 16); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - Yn1 = (q15_t) acc; - - /* Store the output in the destination buffer. */ - *pOut++ = (q15_t) acc; - - /* decrement the loop counter */ - sample--; - } - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent stages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset to destination pointer */ - pOut = pDst; - - /* Store the updated state variables back into the pState array */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - } while(--stage); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - - -/** - * @} end of BiquadCascadeDF1 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c deleted file mode 100644 index 53a7a1047a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c +++ /dev/null @@ -1,400 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df1_q31.c -* -* Description: Processing function for the -* Q31 Biquad cascade filter -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup BiquadCascadeDF1 - * @{ - */ - -/** - * @brief Processing function for the Q31 Biquad cascade filter. - * @param[in] *S points to an instance of the Q31 Biquad cascade structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around rather than clip. - * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). - * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to - * 1.31 format by discarding the low 32 bits. - * - * \par - * Refer to the function arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4. - */ - -void arm_biquad_cascade_df1_q31( - const arm_biquad_casd_df1_inst_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q63_t acc; /* accumulator */ - uint32_t uShift = ((uint32_t) S->postShift + 1u); - uint32_t lShift = 32u - uShift; /* Shift to be applied to the output */ - q31_t *pIn = pSrc; /* input pointer initialization */ - q31_t *pOut = pDst; /* output pointer initialization */ - q31_t *pState = S->pState; /* pState pointer initialization */ - q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ - q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ - q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q31_t Xn; /* temporary input */ - uint32_t sample, stage = S->numStages; /* loop counters */ - - -#ifndef ARM_MATH_CM0 - - q31_t acc_l, acc_h; /* temporary output variables */ - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the state values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - - /* Apply loop unrolling and compute 4 output values simultaneously. */ - /* The variable acc hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - sample = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) b0 *Xn; - /* acc += b1 * x[n-1] */ - acc += (q63_t) b1 *Xn1; - /* acc += b[2] * x[n-2] */ - acc += (q63_t) b2 *Xn2; - /* acc += a1 * y[n-1] */ - acc += (q63_t) a1 *Yn1; - /* acc += a2 * y[n-2] */ - acc += (q63_t) a2 *Yn2; - - /* The result is converted to 1.31 , Yn2 variable is reused */ - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer. */ - *pOut++ = Yn2; - - /* Read the second input */ - Xn2 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) b0 *Xn2; - /* acc += b1 * x[n-1] */ - acc += (q63_t) b1 *Xn; - /* acc += b[2] * x[n-2] */ - acc += (q63_t) b2 *Xn1; - /* acc += a1 * y[n-1] */ - acc += (q63_t) a1 *Yn2; - /* acc += a2 * y[n-2] */ - acc += (q63_t) a2 *Yn1; - - - /* The result is converted to 1.31, Yn1 variable is reused */ - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - - /* Apply shift for lower part of acc and upper part of acc */ - Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer. */ - *pOut++ = Yn1; - - /* Read the third input */ - Xn1 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) b0 *Xn1; - /* acc += b1 * x[n-1] */ - acc += (q63_t) b1 *Xn2; - /* acc += b[2] * x[n-2] */ - acc += (q63_t) b2 *Xn; - /* acc += a1 * y[n-1] */ - acc += (q63_t) a1 *Yn1; - /* acc += a2 * y[n-2] */ - acc += (q63_t) a2 *Yn2; - - /* The result is converted to 1.31, Yn2 variable is reused */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - - /* Apply shift for lower part of acc and upper part of acc */ - Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer. */ - *pOut++ = Yn2; - - /* Read the forth input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) b0 *Xn; - /* acc += b1 * x[n-1] */ - acc += (q63_t) b1 *Xn1; - /* acc += b[2] * x[n-2] */ - acc += (q63_t) b2 *Xn2; - /* acc += a1 * y[n-1] */ - acc += (q63_t) a1 *Yn2; - /* acc += a2 * y[n-2] */ - acc += (q63_t) a2 *Yn1; - - /* The result is converted to 1.31, Yn1 variable is reused */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - - /* Store the output in the destination buffer. */ - *pOut++ = Yn1; - - /* decrement the loop counter */ - sample--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - sample = (blockSize & 0x3u); - - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) b0 *Xn; - /* acc += b1 * x[n-1] */ - acc += (q63_t) b1 *Xn1; - /* acc += b[2] * x[n-2] */ - acc += (q63_t) b2 *Xn2; - /* acc += a1 * y[n-1] */ - acc += (q63_t) a1 *Yn1; - /* acc += a2 * y[n-2] */ - acc += (q63_t) a2 *Yn2; - - /* The result is converted to 1.31 */ - acc = acc >> lShift; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - Yn1 = (q31_t) acc; - - /* Store the output in the destination buffer. */ - *pOut++ = (q31_t) acc; - - /* decrement the loop counter */ - sample--; - } - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent stages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset to destination pointer */ - pOut = pDst; - - /* Store the updated state variables back into the pState array */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - } while(--stage); - -#else - - /* Run the below code for Cortex-M0 */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the state values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - - /* The variables acc holds the output value that is computed: - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - sample = blockSize; - - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - acc = (q63_t) b0 *Xn; - - /* acc += b1 * x[n-1] */ - acc += (q63_t) b1 *Xn1; - /* acc += b[2] * x[n-2] */ - acc += (q63_t) b2 *Xn2; - /* acc += a1 * y[n-1] */ - acc += (q63_t) a1 *Yn1; - /* acc += a2 * y[n-2] */ - acc += (q63_t) a2 *Yn2; - - /* The result is converted to 1.31 */ - acc = acc >> lShift; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - Yn1 = (q31_t) acc; - - /* Store the output in the destination buffer. */ - *pOut++ = (q31_t) acc; - - /* decrement the loop counter */ - sample--; - } - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent stages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset to destination pointer */ - pOut = pDst; - - /* Store the updated state variables back into the pState array */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - } while(--stage); - -#endif /* #ifndef ARM_MATH_CM0 */ -} - -/** - * @} end of BiquadCascadeDF1 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c deleted file mode 100644 index 0b81422fff..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c +++ /dev/null @@ -1,377 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df2T_f32.c -* -* Description: Processing function for the floating-point transposed -* direct form II Biquad cascade filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure - * - * This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure. - * The filters are implemented as a cascade of second order Biquad sections. - * These functions provide a slight memory savings as compared to the direct form I Biquad filter functions. - * Only floating-point data is supported. - * - * This function operate on blocks of input and output data and each call to the function - * processes blockSize samples through the filter. - * pSrc points to the array of input data and - * pDst points to the array of output data. - * Both arrays contain blockSize values. - * - * \par Algorithm - * Each Biquad stage implements a second order filter using the difference equation: - *
       
- *    y[n] = b0 * x[n] + d1       
- *    d1 = b1 * x[n] + a1 * y[n] + d2       
- *    d2 = b2 * x[n] + a2 * y[n]       
- * 
- * where d1 and d2 represent the two state values. - * - * \par - * A Biquad filter using a transposed Direct Form II structure is shown below. - * \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad" - * Coefficients b0, b1, and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. - * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. - * Pay careful attention to the sign of the feedback coefficients. - * Some design tools flip the sign of the feedback coefficients: - *
       
- *    y[n] = b0 * x[n] + d1;       
- *    d1 = b1 * x[n] - a1 * y[n] + d2;       
- *    d2 = b2 * x[n] - a2 * y[n];       
- * 
- * In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library. - * - * \par - * Higher order filters are realized as a cascade of second order sections. - * numStages refers to the number of second order stages used. - * For example, an 8th order filter would be realized with numStages=4 second order stages. - * A 9th order filter would be realized with numStages=5 second order stages with the - * coefficients for one of the stages configured as a first order filter (b2=0 and a2=0). - * - * \par - * pState points to the state variable array. - * Each Biquad stage has 2 state variables d1 and d2. - * The state variables are arranged in the pState array as: - *
       
- *     {d11, d12, d21, d22, ...}       
- * 
- * where d1x refers to the state variables for the first Biquad and - * d2x refers to the state variables for the second Biquad. - * The state array has a total length of 2*numStages values. - * The state variables are updated after each block of data is processed; the coefficients are untouched. - * - * \par - * The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II. - * The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types. - * That is why the Direct Form I structure supports Q15 and Q31 data types. - * The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2. - * Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad. - * The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage. - * - * \par Instance Structure - * The coefficients and state variables for a filter are stored together in an instance data structure. - * A separate instance structure must be defined for each filter. - * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - * - * \par Init Functions - * There is also an associated initialization function. - * The initialization function performs following operations: - * - Sets the values of the internal structure fields. - * - Zeros out the values in the state buffer. - * - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Set the values in the state buffer to zeros before static initialization. - * For example, to statically initialize the instance structure use - *
       
- *     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};       
- * 
- * where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer. - * pCoeffs is the address of the coefficient buffer; - * - */ - -/** - * @addtogroup BiquadCascadeDF2T - * @{ - */ - -/** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in] *S points to an instance of the filter data structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of samples to process. - * @return none. - */ - -void arm_biquad_cascade_df2T_f32( - const arm_biquad_cascade_df2T_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - - float32_t *pIn = pSrc; /* source pointer */ - float32_t *pOut = pDst; /* destination pointer */ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ - float32_t acc0; /* accumulator */ - float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ - float32_t Xn; /* temporary input */ - float32_t d1, d2; /* state variables */ - uint32_t sample, stage = S->numStages; /* loop counters */ - -#ifndef ARM_MATH_CM0 - - float32_t Xn1, Xn2; /* Input State variables */ - float32_t acc1; /* accumulator */ - - - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /*Reading the state values */ - d1 = pState[0]; - d2 = pState[1]; - - /* Apply loop unrolling and compute 4 output values simultaneously. */ - sample = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(sample > 0u) - { - - /* y[n] = b0 * x[n] + d1 */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - /* d2 = b2 * x[n] + a2 * y[n] */ - - /* Read the first input */ - Xn1 = *pIn++; - - /* y[n] = b0 * x[n] + d1 */ - acc0 = (b0 * Xn1) + d1; - - /* d1 = b1 * x[n] + d2 */ - d1 = (b1 * Xn1) + d2; - - /* d2 = b2 * x[n] */ - d2 = (b2 * Xn1); - - /* Read the second input */ - Xn2 = *pIn++; - - /* d1 = b1 * x[n] + a1 * y[n] */ - d1 = (a1 * acc0) + d1; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc0; - - d2 = (a2 * acc0) + d2; - - /* y[n] = b0 * x[n] + d1 */ - acc1 = (b0 * Xn2) + d1; - - /* Read the third input */ - Xn1 = *pIn++; - - d1 = (b1 * Xn2) + d2; - - d2 = (b2 * Xn2); - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc1; - - d1 = (a1 * acc1) + d1; - - d2 = (a2 * acc1) + d2; - - /* y[n] = b0 * x[n] + d1 */ - acc0 = (b0 * Xn1) + d1; - - d1 = (b1 * Xn1) + d2; - - d2 = (b2 * Xn1); - - /* Read the fourth input */ - Xn2 = *pIn++; - - d1 = (a1 * acc0) + d1; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc0; - - d2 = (a2 * acc0) + d2; - - /* y[n] = b0 * x[n] + d1 */ - acc1 = (b0 * Xn2) + d1; - - d1 = (b1 * Xn2) + d2; - - d2 = (b2 * Xn2); - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc1; - - d1 = (a1 * acc1) + d1; - - d2 = (a2 * acc1) + d2; - - /* decrement the loop counter */ - sample--; - - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - sample = blockSize & 0x3u; - - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* y[n] = b0 * x[n] + d1 */ - acc0 = (b0 * Xn) + d1; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc0; - - /* Every time after the output is computed state should be updated. */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - d1 = ((b1 * Xn) + (a1 * acc0)) + d2; - - /* d2 = b2 * x[n] + a2 * y[n] */ - d2 = (b2 * Xn) + (a2 * acc0); - - /* decrement the loop counter */ - sample--; - } - - /* Store the updated state variables back into the state array */ - *pState++ = d1; - *pState++ = d2; - - /* The current stage input is given as the output to the next stage */ - pIn = pDst; - - /*Reset the output working pointer */ - pOut = pDst; - - /* decrement the loop counter */ - stage--; - - } while(stage > 0u); - -#else - - /* Run the below code for Cortex-M0 */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /*Reading the state values */ - d1 = pState[0]; - d2 = pState[1]; - - - sample = blockSize; - - while(sample > 0u) - { - /* Read the input */ - Xn = *pIn++; - - /* y[n] = b0 * x[n] + d1 */ - acc0 = (b0 * Xn) + d1; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc0; - - /* Every time after the output is computed state should be updated. */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - d1 = ((b1 * Xn) + (a1 * acc0)) + d2; - - /* d2 = b2 * x[n] + a2 * y[n] */ - d2 = (b2 * Xn) + (a2 * acc0); - - /* decrement the loop counter */ - sample--; - } - - /* Store the updated state variables back into the state array */ - *pState++ = d1; - *pState++ = d2; - - /* The current stage input is given as the output to the next stage */ - pIn = pDst; - - /*Reset the output working pointer */ - pOut = pDst; - - /* decrement the loop counter */ - stage--; - - } while(stage > 0u); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - - - /** - * @} end of BiquadCascadeDF2T group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c deleted file mode 100644 index 3f0afd706b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c +++ /dev/null @@ -1,97 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_biquad_cascade_df2T_init_f32.c -* -* Description: Initialization function for the floating-point transposed -* direct form II Biquad cascade filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup BiquadCascadeDF2T - * @{ - */ - -/** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] *S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] *pCoeffs points to the filter coefficients. - * @param[in] *pState points to the state buffer. - * @return none - * - * Coefficient and State Ordering: - * \par - * The coefficients are stored in the array pCoeffs in the following order: - *
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
- * - * \par - * where b1x and a1x are the coefficients for the first stage, - * b2x and a2x are the coefficients for the second stage, - * and so on. The pCoeffs array contains a total of 5*numStages values. - * - * \par - * The pState is a pointer to state array. - * Each Biquad stage has 2 state variables d1, and d2. - * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. - * The state array has a total length of 2*numStages values. - * The state variables are updated after each block of data is processed; the coefficients are untouched. - */ - -void arm_biquad_cascade_df2T_init_f32( - arm_biquad_cascade_df2T_instance_f32 * S, - uint8_t numStages, - float32_t * pCoeffs, - float32_t * pState) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 2 * numStages */ - memset(pState, 0, (2u * (uint32_t) numStages) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - * @} end of BiquadCascadeDF2T group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c deleted file mode 100644 index 9b036c85c9..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c +++ /dev/null @@ -1,646 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_f32.c -* -* Description: Convolution of floating-point sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup Conv Convolution - * - * Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector. - * Convolution is similar to correlation and is frequently used in filtering and data analysis. - * The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types. - * The library also provides fast versions of the Q15 and Q31 functions on Cortex-M4 and Cortex-M3. - * - * \par Algorithm - * Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively. - * Then the convolution - * - *
    
- *                   c[n] = a[n] * b[n]    
- * 
- * - * \par - * is defined as - * \image html ConvolutionEquation.gif - * \par - * Note that c[n] is of length srcALen + srcBLen - 1 and is defined over the interval n=0, 1, 2, ..., srcALen + srcBLen - 2. - * pSrcA points to the first input vector of length srcALen and - * pSrcB points to the second input vector of length srcBLen. - * The output result is written to pDst and the calling function must allocate srcALen+srcBLen-1 words for the result. - * - * \par - * Conceptually, when two signals a[n] and b[n] are convolved, - * the signal b[n] slides over a[n]. - * For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together. - * - * \par - * Note that convolution is a commutative operation: - * - *
    
- *                   a[n] * b[n] = b[n] * a[n].    
- * 
- * - * \par - * This means that switching the A and B arguments to the convolution functions has no effect. - * - * Fixed-Point Behavior - * - * \par - * Convolution requires summing up a large number of intermediate products. - * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. - * Refer to the function specific documentation below for further details of the particular algorithm used. - * - * - * Fast Versions - * - * \par - * Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires - * the input signals should be scaled down to avoid intermediate overflows. - * - * - * Opt Versions - * - * \par - * Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. - * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions - */ - -/** - * @addtogroup Conv - * @{ - */ - -/** - * @brief Convolution of floating-point sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - * @return none. - */ - -void arm_conv_f32( - float32_t * pSrcA, - uint32_t srcALen, - float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst) -{ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - float32_t *pIn1; /* inputA pointer */ - float32_t *pIn2; /* inputB pointer */ - float32_t *pOut = pDst; /* output pointer */ - float32_t *px; /* Intermediate inputA pointer */ - float32_t *py; /* Intermediate inputB pointer */ - float32_t *pSrc1, *pSrc2; /* Intermediate pointers */ - float32_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - float32_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3; /* loop counters */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 1] */ - sum += *px++ * *py--; - - /* x[1] * y[srcBLen - 2] */ - sum += *px++ * *py--; - - /* x[2] * y[srcBLen - 3] */ - sum += *px++ * *py--; - - /* x[3] * y[srcBLen - 4] */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - - /* read x[0], x[1], x[2] samples */ - x0 = *(px++); - x1 = *(px++); - x2 = *(px++); - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *(py--); - - /* Read x[3] sample */ - x3 = *(px); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 += x0 * c0; - - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 += x1 * c0; - - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 += x2 * c0; - - /* acc3 += x[3] * y[srcBLen - 1] */ - acc3 += x3 * c0; - - /* Read y[srcBLen - 2] sample */ - c0 = *(py--); - - /* Read x[4] sample */ - x0 = *(px + 1u); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 += x1 * c0; - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 += x2 * c0; - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 += x3 * c0; - /* acc3 += x[4] * y[srcBLen - 2] */ - acc3 += x0 * c0; - - /* Read y[srcBLen - 3] sample */ - c0 = *(py--); - - /* Read x[5] sample */ - x1 = *(px + 2u); - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 += x2 * c0; - /* acc1 += x[3] * y[srcBLen - 2] */ - acc1 += x3 * c0; - /* acc2 += x[4] * y[srcBLen - 2] */ - acc2 += x0 * c0; - /* acc3 += x[5] * y[srcBLen - 2] */ - acc3 += x1 * c0; - - /* Read y[srcBLen - 4] sample */ - c0 = *(py--); - - /* Read x[6] sample */ - x2 = *(px + 3u); - px += 4u; - - /* Perform the multiply-accumulates */ - /* acc0 += x[3] * y[srcBLen - 4] */ - acc0 += x3 * c0; - /* acc1 += x[4] * y[srcBLen - 4] */ - acc1 += x0 * c0; - /* acc2 += x[5] * y[srcBLen - 4] */ - acc2 += x1 * c0; - /* acc3 += x[6] * y[srcBLen - 4] */ - acc3 += x2 * c0; - - - } while(--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Read y[srcBLen - 5] sample */ - c0 = *(py--); - - /* Read x[7] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += x0 * c0; - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += x1 * c0; - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += x2 * c0; - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 += x3 * c0; - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc0; - *pOut++ = acc1; - *pOut++ = acc2; - *pOut++ = acc3; - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - - /* Decrement the loop counter */ - blkCnt--; - } - - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += *px++ * *py--; - sum += *px++ * *py--; - sum += *px++ * *py--; - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3 >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = blockSize3 % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - float32_t *pIn1 = pSrcA; /* inputA pointer */ - float32_t *pIn2 = pSrcB; /* inputB pointer */ - float32_t sum; /* Accumulator */ - uint32_t i, j; /* loop counters */ - - /* Loop to calculate convolution for output length number of times */ - for (i = 0u; i < ((srcALen + srcBLen) - 1u); i++) - { - /* Initialize sum with zero to carry out MAC operations */ - sum = 0.0f; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0u; j <= i; j++) - { - /* Check the array limitations */ - if((((i - j) < srcBLen) && (j < srcALen))) - { - /* z[i] += x[i-j] * y[j] */ - sum += pIn1[j] * pIn2[i - j]; - } - } - /* Store the output in the destination buffer */ - pDst[i] = sum; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of Conv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c deleted file mode 100644 index a8097419d3..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c +++ /dev/null @@ -1,538 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_fast_opt_q15.c -* -* Description: Fast Q15 Convolution. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Conv - * @{ - */ - -/** - * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - * @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - * @return none. - * - * \par Restrictions - * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE - * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit - * - * Scaling and Overflow Behavior: - * - * \par - * This fast version uses a 32-bit accumulator with 2.30 format. - * The accumulator maintains full precision of the intermediate multiplication results - * but provides only a single guard bit. There is no saturation on intermediate additions. - * Thus, if the accumulator overflows it wraps around and distorts the result. - * The input signals should be scaled down to avoid intermediate overflows. - * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, - * as maximum of min(srcALen, srcBLen) number of additions are carried internally. - * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result. - * - * \par - * See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. - */ - -void arm_conv_fast_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2) -{ - q31_t acc0, acc1, acc2, acc3; /* Accumulators */ - q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */ - q31_t y1, y2; /* State variables */ - q15_t *pOut = pDst; /* output pointer */ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, k, blkCnt; /* loop counter */ - uint32_t tapCnt; /* loop count */ -#ifdef UNALIGNED_SUPPORT_DISABLE - - q15_t a, b; - -#endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Pointer to take end of scratch2 buffer */ - pScr2 = pScratch2 + srcBLen - 1; - - /* points to smaller length sequence */ - px = pIn2; - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - - /* Copy smaller length input sequence in reverse order into second scratch buffer */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Assuming scratch1 buffer is aligned by 32-bit */ - /* Fill (srcBLen - 1u) zeros in scratch1 buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1u); - - /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr1, srcALen); - - /* Update pointers */ - pScr1 += srcALen; - -#else - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcALen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcALen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr1++ = *pIn1++; - - /* Decrement the loop counter */ - k--; - } - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Fill (srcBLen - 1u) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update pointer */ - pScr1 += (srcBLen - 1u); - -#else - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = (srcBLen - 1u) >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = (srcBLen - 1u) % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - - /* Initialization of pIn2 pointer */ - pIn2 = py; - - /* First part of the processing with loop unrolling process 4 data points at a time. - ** a second loop below process for the remaining 1 to 3 samples. */ - - /* Actual convolution process starts here */ - blkCnt = (srcALen + srcBLen - 1u) >> 2; - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* Read next two samples from scratch1 buffer */ - x2 = *__SIMD32(pScr1)++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pIn2); - y2 = _SIMD32_OFFSET(pIn2 + 2u); - - /* multiply and accumlate */ - acc0 = __SMLAD(x1, y1, acc0); - acc2 = __SMLAD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumlate */ - acc1 = __SMLADX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = _SIMD32_OFFSET(pScr1); - - /* multiply and accumlate */ - acc0 = __SMLAD(x2, y2, acc0); - acc2 = __SMLAD(x1, y2, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - acc1 = __SMLADX(x3, y2, acc1); - - x2 = _SIMD32_OFFSET(pScr1 + 2u); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y2, acc3); - -#else - - /* Read four samples from smaller buffer */ - a = *pIn2; - b = *(pIn2 + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - y1 = __PKHBT(a, b, 16); -#else - y1 = __PKHBT(b, a, 16); -#endif - - a = *(pIn2 + 2); - b = *(pIn2 + 3); -#ifndef ARM_MATH_BIG_ENDIAN - y2 = __PKHBT(a, b, 16); -#else - y2 = __PKHBT(b, a, 16); -#endif - - acc0 = __SMLAD(x1, y1, acc0); - - acc2 = __SMLAD(x2, y1, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc1 = __SMLADX(x3, y1, acc1); - - a = *pScr1; - b = *(pScr1 + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(a, b, 16); -#else - x1 = __PKHBT(b, a, 16); -#endif - - acc0 = __SMLAD(x2, y2, acc0); - - acc2 = __SMLAD(x1, y2, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - acc1 = __SMLADX(x3, y2, acc1); - - a = *(pScr1 + 2); - b = *(pScr1 + 3); - -#ifndef ARM_MATH_BIG_ENDIAN - x2 = __PKHBT(a, b, 16); -#else - x2 = __PKHBT(b, a, 16); -#endif - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y2, acc3); - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* update scratch pointers */ - pIn2 += 4u; - pScr1 += 4u; - - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4u; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - - /* Store the results in the accumulators in the destination buffer. */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16); - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16); - - -#else - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16); - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16); - - - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 4u; - - } - - - blkCnt = (srcALen + srcBLen - 1u) & 0x3; - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - - acc0 += (*pScr1++ * *pIn2++); - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - ** Then store the output in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 1u; - - } - -} - -/** - * @} end of Conv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c deleted file mode 100644 index 499e6cfb25..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c +++ /dev/null @@ -1,1405 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_fast_q15.c -* -* Description: Fast Q15 Convolution. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Conv - * @{ - */ - -/** - * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - * @return none. - * - * Scaling and Overflow Behavior: - * - * \par - * This fast version uses a 32-bit accumulator with 2.30 format. - * The accumulator maintains full precision of the intermediate multiplication results - * but provides only a single guard bit. There is no saturation on intermediate additions. - * Thus, if the accumulator overflows it wraps around and distorts the result. - * The input signals should be scaled down to avoid intermediate overflows. - * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, - * as maximum of min(srcALen, srcBLen) number of additions are carried internally. - * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result. - * - * \par - * See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. - */ - -void arm_conv_fast_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst) -{ -#ifndef UNALIGNED_SUPPORT_DISABLE - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *pOut = pDst; /* output pointer */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt; /* loop counter */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations less than 4 */ - /* Second part of this stage computes the MAC operations greater than or equal to 4 */ - - /* The first part of the stage starts here */ - while((count < 4u) && (blockSize1 > 0u)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over number of MAC operations between - * inputA samples and inputB samples */ - k = count; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* The second part of the stage starts here */ - /* The internal loop, over count, is unrolled by 4 */ - /* To, read the last two inputB samples using SIMD: - * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ - py = py - 1; - - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1u; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + (count - 1u); - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0u; - - - /* -------------------- - * Stage2 process - * -------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - py = py - 1u; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - - /* read x[0], x[1] samples */ - x0 = *__SIMD32(px); - /* read x[1], x[2] samples */ - x1 = _SIMD32_OFFSET(px+1); - px+= 2u; - - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the last two inputB samples using SIMD: - * y[srcBLen - 1] and y[srcBLen - 2] */ - c0 = *__SIMD32(py)--; - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLADX(x0, c0, acc0); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLADX(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = *__SIMD32(px); - - /* Read x[3], x[4] */ - x3 = _SIMD32_OFFSET(px+1); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLADX(x2, c0, acc2); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLADX(x3, c0, acc3); - - /* Read y[srcBLen - 3] and y[srcBLen - 4] */ - c0 = *__SIMD32(py)--; - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLADX(x2, c0, acc0); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLADX(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = _SIMD32_OFFSET(px+2); - - /* Read x[5], x[6] */ - x1 = _SIMD32_OFFSET(px+3); - px += 4u; - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLADX(x0, c0, acc2); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLADX(x1, c0, acc3); - - } while(--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - if(k == 1u) - { - /* Read y[srcBLen - 5] */ - c0 = *(py+1); - -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; - -#else - - c0 = c0 & 0x0000FFFF; - -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - x3 = *__SIMD32(px); - px++; - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLADX(x1, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - if(k == 2u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = _SIMD32_OFFSET(py); - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px+1); - px += 2u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - } - - if(k == 3u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = _SIMD32_OFFSET(py); - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px+1); - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - - /* Read y[srcBLen - 7] */ - c0 = *(py-1); -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; -#else - - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - x3 = _SIMD32_OFFSET(px+2); - px += 3u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x1, c0, acc0); - acc1 = __SMLAD(x2, c0, acc1); - acc2 = __SMLADX(x2, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - /* Store the results in the accumulators in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = __PKHBT((acc0 >> 15), (acc1 >> 15), 16); - *__SIMD32(pOut)++ = __PKHBT((acc2 >> 15), (acc3 >> 15), 16); - -#else - - *__SIMD32(pOut)++ = __PKHBT((acc1 >> 15), (acc0 >> 15), 16); - *__SIMD32(pOut)++ = __PKHBT((acc3 >> 15), (acc2 >> 15), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - pIn2 = pSrc2 - 1u; - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations greater than 4 */ - /* Second part of this stage computes the MAC operations less than or equal to 4 */ - - /* The first part of the stage starts here */ - j = blockSize3 >> 2u; - - while((j > 0u) && (blockSize3 > 0u)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3 >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied - * with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied - * with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1u; - - /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = blockSize3 % 0x4u; - - while(k > 0u) - { - /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the loop counter */ - blockSize3--; - - j--; - } - - /* The second part of the stage starts here */ - /* SIMD is not used for the next MAC operations, - * so pointer py is updated to read only one sample at a time */ - py = py + 1u; - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *pOut = pDst; /* output pointer */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt; /* loop counter */ - q15_t a, b; - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations less than 4 */ - /* Second part of this stage computes the MAC operations greater than or equal to 4 */ - - /* The first part of the stage starts here */ - while((count < 4u) && (blockSize1 > 0u)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over number of MAC operations between - * inputA samples and inputB samples */ - k = count; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* The second part of the stage starts here */ - /* The internal loop, over count, is unrolled by 4 */ - /* To, read the last two inputB samples using SIMD: - * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ - py = py - 1; - - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - py++; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + (count - 1u); - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0u; - - - /* -------------------- - * Stage2 process - * -------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - py = py - 1u; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1] samples */ - a = *px++; - b = *px++; - -#ifndef ARM_MATH_BIG_ENDIAN - - x0 = __PKHBT(a, b, 16); - a = *px; - x1 = __PKHBT(b, a, 16); - -#else - - x0 = __PKHBT(b, a, 16); - a = *px; - x1 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the last two inputB samples using SIMD: - * y[srcBLen - 1] and y[srcBLen - 2] */ - a = *py; - b = *(py+1); - py -= 2; - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLADX(x0, c0, acc0); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLADX(x1, c0, acc1); - - a = *px; - b = *(px + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - x2 = __PKHBT(a, b, 16); - a = *(px + 2); - x3 = __PKHBT(b, a, 16); - -#else - - x2 = __PKHBT(b, a, 16); - a = *(px + 2); - x3 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLADX(x2, c0, acc2); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLADX(x3, c0, acc3); - - /* Read y[srcBLen - 3] and y[srcBLen - 4] */ - a = *py; - b = *(py+1); - py -= 2; - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLADX(x2, c0, acc0); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLADX(x3, c0, acc1); - - /* Read x[4], x[5], x[6] */ - a = *(px + 2); - b = *(px + 3); - -#ifndef ARM_MATH_BIG_ENDIAN - - x0 = __PKHBT(a, b, 16); - a = *(px + 4); - x1 = __PKHBT(b, a, 16); - -#else - - x0 = __PKHBT(b, a, 16); - a = *(px + 4); - x1 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - px += 4u; - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLADX(x0, c0, acc2); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLADX(x1, c0, acc3); - - } while(--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - if(k == 1u) - { - /* Read y[srcBLen - 5] */ - c0 = *(py+1); - -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; - -#else - - c0 = c0 & 0x0000FFFF; - -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - a = *px; - b = *(px+1); - px++; - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - -#else - - x3 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLADX(x1, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - if(k == 2u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - a = *py; - b = *(py+1); - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7], x[8], x[9] */ - a = *px; - b = *(px + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - a = *(px + 2); - x2 = __PKHBT(b, a, 16); - -#else - - x3 = __PKHBT(b, a, 16); - a = *(px + 2); - x2 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - px += 2u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - } - - if(k == 3u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - a = *py; - b = *(py+1); - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7], x[8], x[9] */ - a = *px; - b = *(px + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - a = *(px + 2); - x2 = __PKHBT(b, a, 16); - -#else - - x3 = __PKHBT(b, a, 16); - a = *(px + 2); - x2 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - - /* Read y[srcBLen - 7] */ - c0 = *(py-1); -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; -#else - - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - a = *(px+2); - b = *(px+3); - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - -#else - - x3 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - px += 3u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x1, c0, acc0); - acc1 = __SMLAD(x2, c0, acc1); - acc2 = __SMLADX(x2, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - /* Store the results in the accumulators in the destination buffer. */ - *pOut++ = (q15_t)(acc0 >> 15); - *pOut++ = (q15_t)(acc1 >> 15); - *pOut++ = (q15_t)(acc2 >> 15); - *pOut++ = (q15_t)(acc3 >> 15); - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - pIn2 = pSrc2 - 1u; - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations greater than 4 */ - /* Second part of this stage computes the MAC operations less than or equal to 4 */ - - /* The first part of the stage starts here */ - j = blockSize3 >> 2u; - - while((j > 0u) && (blockSize3 > 0u)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3 >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - py++; - - while(k > 0u) - { - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - /* Decrement the loop counter */ - k--; - } - - /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = blockSize3 % 0x4u; - - while(k > 0u) - { - /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the loop counter */ - blockSize3--; - - j--; - } - - /* The second part of the stage starts here */ - /* SIMD is not used for the next MAC operations, - * so pointer py is updated to read only one sample at a time */ - py = py + 1u; - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the loop counter */ - blockSize3--; - } - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ -} - -/** - * @} end of Conv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c deleted file mode 100644 index 46c694b707..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c +++ /dev/null @@ -1,572 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_fast_q31.c -* -* Description: Q31 Convolution (fast version). -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Conv - * @{ - */ - -/** - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * This function is optimized for speed at the expense of fixed-point precision and overflow protection. - * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. - * These intermediate results are accumulated in a 32-bit register in 2.30 format. - * Finally, the accumulator is saturated and converted to a 1.31 result. - * - * \par - * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. - * In order to avoid overflows completely the input signals must be scaled down. - * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, - * as maximum of min(srcALen, srcBLen) number of additions are carried internally. - * - * \par - * See arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. - */ - -void arm_conv_fast_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst) -{ - q31_t *pIn1; /* inputA pointer */ - q31_t *pIn2; /* inputB pointer */ - q31_t *pOut = pDst; /* output pointer */ - q31_t *px; /* Intermediate inputA pointer */ - q31_t *py; /* Intermediate inputB pointer */ - q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3; /* loop counter */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* x[1] * y[srcBLen - 2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* x[2] * y[srcBLen - 3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* x[3] * y[srcBLen - 4] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *(px++); - x1 = *(px++); - x2 = *(px++); - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *(py--); - - /* Read x[3] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - - /* acc3 += x[3] * y[srcBLen - 1] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Read y[srcBLen - 2] sample */ - c0 = *(py--); - - /* Read x[4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc3 += x[4] * y[srcBLen - 2] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Read y[srcBLen - 3] sample */ - c0 = *(py--); - - /* Read x[5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc1 += x[3] * y[srcBLen - 3] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc2 += x[4] * y[srcBLen - 3] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc3 += x[5] * y[srcBLen - 3] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* Read y[srcBLen - 4] sample */ - c0 = *(py--); - - /* Read x[6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[3] * y[srcBLen - 4] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc1 += x[4] * y[srcBLen - 4] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc2 += x[5] * y[srcBLen - 4] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc3 += x[6] * y[srcBLen - 4] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32); - - - } while(--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Read y[srcBLen - 5] sample */ - c0 = *(py--); - - /* Read x[7] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the results in the accumulators in the destination buffer. */ - *pOut++ = (q31_t) (acc0 << 1); - *pOut++ = (q31_t) (acc1 << 1); - *pOut++ = (q31_t) (acc2 << 1); - *pOut++ = (q31_t) (acc3 << 1); - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3 >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = blockSize3 % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the loop counter */ - blockSize3--; - } - -} - -/** - * @} end of Conv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c deleted file mode 100644 index 2d9ada7be2..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c +++ /dev/null @@ -1,544 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_opt_q15.c -* -* Description: Convolution of Q15 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Conv - * @{ - */ - -/** - * @brief Convolution of Q15 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - * @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - * @return none. - * - * \par Restrictions - * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE - * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit - * - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 64-bit internal accumulator. - * Both inputs are in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * This approach provides 33 guard bits and there is no risk of overflow. - * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. - * - * - * \par - * Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. - * - * - */ - -void arm_conv_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2) -{ - q63_t acc0, acc1, acc2, acc3; /* Accumulator */ - q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */ - q31_t y1, y2; /* State variables */ - q15_t *pOut = pDst; /* output pointer */ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, k, blkCnt; /* loop counter */ - uint32_t tapCnt; /* loop count */ -#ifdef UNALIGNED_SUPPORT_DISABLE - - q15_t a, b; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* pointer to take end of scratch2 buffer */ - pScr2 = pScratch2 + srcBLen - 1; - - /* points to smaller length sequence */ - px = pIn2; - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - /* Copy smaller length input sequence in reverse order into second scratch buffer */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Assuming scratch1 buffer is aligned by 32-bit */ - /* Fill (srcBLen - 1u) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1u); - - /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr1, srcALen); - - /* Update pointers */ - pScr1 += srcALen; - -#else - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcALen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcALen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr1++ = *pIn1++; - - /* Decrement the loop counter */ - k--; - } - -#endif - - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Fill (srcBLen - 1u) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update pointer */ - pScr1 += (srcBLen - 1u); - -#else - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = (srcBLen - 1u) >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = (srcBLen - 1u) % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - -#endif - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - - /* Initialization of pIn2 pointer */ - pIn2 = py; - - /* First part of the processing with loop unrolling process 4 data points at a time. - ** a second loop below process for the remaining 1 to 3 samples. */ - - /* Actual convolution process starts here */ - blkCnt = (srcALen + srcBLen - 1u) >> 2; - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* Read next two samples from scratch1 buffer */ - x2 = *__SIMD32(pScr1)++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pIn2); - y2 = _SIMD32_OFFSET(pIn2 + 2u); - - /* multiply and accumlate */ - acc0 = __SMLALD(x1, y1, acc0); - acc2 = __SMLALD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumlate */ - acc1 = __SMLALDX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = _SIMD32_OFFSET(pScr1); - - /* multiply and accumlate */ - acc0 = __SMLALD(x2, y2, acc0); - acc2 = __SMLALD(x1, y2, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLALDX(x3, y1, acc3); - acc1 = __SMLALDX(x3, y2, acc1); - - x2 = _SIMD32_OFFSET(pScr1 + 2u); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLALDX(x3, y2, acc3); - -#else - - /* Read four samples from smaller buffer */ - a = *pIn2; - b = *(pIn2 + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - y1 = __PKHBT(a, b, 16); -#else - y1 = __PKHBT(b, a, 16); -#endif - - a = *(pIn2 + 2); - b = *(pIn2 + 3); -#ifndef ARM_MATH_BIG_ENDIAN - y2 = __PKHBT(a, b, 16); -#else - y2 = __PKHBT(b, a, 16); -#endif - - acc0 = __SMLALD(x1, y1, acc0); - - acc2 = __SMLALD(x2, y1, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc1 = __SMLALDX(x3, y1, acc1); - - a = *pScr1; - b = *(pScr1 + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(a, b, 16); -#else - x1 = __PKHBT(b, a, 16); -#endif - - acc0 = __SMLALD(x2, y2, acc0); - - acc2 = __SMLALD(x1, y2, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLALDX(x3, y1, acc3); - - acc1 = __SMLALDX(x3, y2, acc1); - - a = *(pScr1 + 2); - b = *(pScr1 + 3); - -#ifndef ARM_MATH_BIG_ENDIAN - x2 = __PKHBT(a, b, 16); -#else - x2 = __PKHBT(b, a, 16); -#endif - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLALDX(x3, y2, acc3); - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - pIn2 += 4u; - pScr1 += 4u; - - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4u; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - - /* Store the results in the accumulators in the destination buffer. */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16); - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16); - -#else - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16); - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16); - - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 4u; - - } - - - blkCnt = (srcALen + srcBLen - 1u) & 0x3; - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - - /* Read next two samples from scratch1 buffer */ - acc0 += (*pScr1++ * *pIn2++); - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - ** Then store the output in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 1u; - - } - -} - - -/** - * @} end of Conv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c deleted file mode 100644 index b57e4a24b0..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c +++ /dev/null @@ -1,434 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_opt_q7.c -* -* Description: Convolution of Q7 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Conv - * @{ - */ - -/** - * @brief Convolution of Q7 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - * @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - * @return none. - * - * \par Restrictions - * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE - * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 32-bit internal accumulator. - * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. - * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. - * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format. - * - */ - -void arm_conv_opt_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2) -{ - - q15_t *pScr2, *pScr1; /* Intermediate pointers for scratch pointers */ - q15_t x4; /* Temporary input variable */ - q7_t *pIn1, *pIn2; /* inputA and inputB pointer */ - uint32_t j, k, blkCnt, tapCnt; /* loop counter */ - q7_t *px; /* Temporary input1 pointer */ - q15_t *py; /* Temporary input2 pointer */ - q31_t acc0, acc1, acc2, acc3; /* Accumulator */ - q31_t x1, x2, x3, y1; /* Temporary input variables */ - q7_t *pOut = pDst; /* output pointer */ - q7_t out0, out1, out2, out3; /* temporary variables */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* pointer to take end of scratch2 buffer */ - pScr2 = pScratch2; - - /* points to smaller length sequence */ - px = pIn2 + srcBLen - 1; - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) * px--; - *pScr2++ = x4; - x4 = (q15_t) * px--; - *pScr2++ = x4; - x4 = (q15_t) * px--; - *pScr2++ = x4; - x4 = (q15_t) * px--; - *pScr2++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) * px--; - *pScr2++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Fill (srcBLen - 1u) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1u); - - /* Copy (srcALen) samples in scratch buffer */ - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcALen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcALen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - - /* Decrement the loop counter */ - k--; - } - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Fill (srcBLen - 1u) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update pointer */ - pScr1 += (srcBLen - 1u); - -#else - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = (srcBLen - 1u) >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = (srcBLen - 1u) % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - -#endif - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* Initialization of pIn2 pointer */ - pIn2 = (q7_t *) py; - - pScr2 = py; - - /* Actual convolution process starts here */ - blkCnt = (srcALen + srcBLen - 1u) >> 2; - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* Read next two samples from scratch1 buffer */ - x2 = *__SIMD32(pScr1)++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pScr2); - - /* multiply and accumlate */ - acc0 = __SMLAD(x1, y1, acc0); - acc2 = __SMLAD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumlate */ - acc1 = __SMLADX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pScr2 + 2u); - - acc0 = __SMLAD(x2, y1, acc0); - - acc2 = __SMLAD(x1, y1, acc2); - - acc1 = __SMLADX(x3, y1, acc1); - - x2 = *__SIMD32(pScr1)++; - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - pScr2 += 4u; - - - /* Decrement the loop counter */ - tapCnt--; - } - - - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4u; - - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pScr2); - acc1 += (*pScr1++ * *pScr2); - acc2 += (*pScr1++ * *pScr2); - acc3 += (*pScr1++ * *pScr2++); - - pScr1 -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - out0 = (q7_t) (__SSAT(acc0 >> 7u, 8)); - out1 = (q7_t) (__SSAT(acc1 >> 7u, 8)); - out2 = (q7_t) (__SSAT(acc2 >> 7u, 8)); - out3 = (q7_t) (__SSAT(acc3 >> 7u, 8)); - - *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3); - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 4u; - - } - - - blkCnt = (srcALen + srcBLen - 1u) & 0x3; - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - acc0 += (*pScr1++ * *pScr2++); - acc0 += (*pScr1++ * *pScr2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pScr2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8)); - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 1u; - - } - -} - - -/** - * @} end of Conv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c deleted file mode 100644 index b3200f7e8b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c +++ /dev/null @@ -1,661 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_partial_f32.c -* -* Description: Partial convolution of floating-point sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup PartialConv Partial Convolution - * - * Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated. - * Each function has two additional arguments. - * firstIndex specifies the starting index of the subset of output samples. - * numPoints is the number of output samples to compute. - * The function computes the output in the range - * [firstIndex, ..., firstIndex+numPoints-1]. - * The output array pDst contains numPoints values. - * - * The allowable range of output indices is [0 srcALen+srcBLen-2]. - * If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR. - * Otherwise the functions return ARM_MATH_SUCCESS. - * \note Refer arm_conv_f32() for details on fixed point behavior. - * - * - * Fast Versions - * - * \par - * Fast versions are supported for Q31 and Q15 of partial convolution. Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires - * the input signals should be scaled down to avoid intermediate overflows. - * - * - * Opt Versions - * - * \par - * Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. - * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of partial convolution - */ - -/** - * @addtogroup PartialConv - * @{ - */ - -/** - * @brief Partial convolution of floating-point sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - -arm_status arm_conv_partial_f32( - float32_t * pSrcA, - uint32_t srcALen, - float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - float32_t *pIn1 = pSrcA; /* inputA pointer */ - float32_t *pIn2 = pSrcB; /* inputB pointer */ - float32_t *pOut = pDst; /* output pointer */ - float32_t *px; /* Intermediate inputA pointer */ - float32_t *py; /* Intermediate inputB pointer */ - float32_t *pSrc1, *pSrc2; /* Intermediate pointers */ - float32_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - float32_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t j, k, count = 0u, blkCnt, check; - int32_t blockSize1, blockSize2, blockSize3; /* loop counters */ - arm_status status; /* status of Partial convolution */ - - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = (int32_t) check - (int32_t) srcALen; - blockSize3 = (blockSize3 > 0) ? blockSize3 : 0; - blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 : - (int32_t) numPoints) : 0; - blockSize2 = ((int32_t) check - blockSize3) - - (blockSize1 + (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1u + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + firstIndex; - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while(blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 1] */ - sum += *px++ * *py--; - - /* x[1] * y[srcBLen - 2] */ - sum += *px++ * *py--; - - /* x[2] * y[srcBLen - 3] */ - sum += *px++ * *py--; - - /* x[3] * y[srcBLen - 4] */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc1; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = ((uint32_t) blockSize2 >> 2u); - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - - /* read x[0], x[1], x[2] samples */ - x0 = *(px++); - x1 = *(px++); - x2 = *(px++); - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *(py--); - - /* Read x[3] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 += x0 * c0; - - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 += x1 * c0; - - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 += x2 * c0; - - /* acc3 += x[3] * y[srcBLen - 1] */ - acc3 += x3 * c0; - - /* Read y[srcBLen - 2] sample */ - c0 = *(py--); - - /* Read x[4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 += x1 * c0; - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 += x2 * c0; - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 += x3 * c0; - /* acc3 += x[4] * y[srcBLen - 2] */ - acc3 += x0 * c0; - - /* Read y[srcBLen - 3] sample */ - c0 = *(py--); - - /* Read x[5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 += x2 * c0; - /* acc1 += x[3] * y[srcBLen - 2] */ - acc1 += x3 * c0; - /* acc2 += x[4] * y[srcBLen - 2] */ - acc2 += x0 * c0; - /* acc3 += x[5] * y[srcBLen - 2] */ - acc3 += x1 * c0; - - /* Read y[srcBLen - 4] sample */ - c0 = *(py--); - - /* Read x[6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[3] * y[srcBLen - 4] */ - acc0 += x3 * c0; - /* acc1 += x[4] * y[srcBLen - 4] */ - acc1 += x0 * c0; - /* acc2 += x[5] * y[srcBLen - 4] */ - acc2 += x1 * c0; - /* acc3 += x[6] * y[srcBLen - 4] */ - acc3 += x2 * c0; - - - } while(--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Read y[srcBLen - 5] sample */ - c0 = *(py--); - - /* Read x[7] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += x0 * c0; - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += x1 * c0; - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += x2 * c0; - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 += x3 * c0; - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc0; - *pOut++ = acc1; - *pOut++ = acc2; - *pOut++ = acc3; - - /* Increment the pointer pIn1 index, count by 1 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = (uint32_t) blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += *px++ * *py--; - sum += *px++ * *py--; - sum += *px++ * *py--; - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - while(blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#else - - /* Run the below code for Cortex-M0 */ - - float32_t *pIn1 = pSrcA; /* inputA pointer */ - float32_t *pIn2 = pSrcB; /* inputB pointer */ - float32_t sum; /* Accumulator */ - uint32_t i, j; /* loop counters */ - arm_status status; /* status of Partial convolution */ - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* Loop to calculate convolution for output length number of values */ - for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0.0f; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0u; j <= i; j++) - { - /* Check the array limitations for inputs */ - if((((i - j) < srcBLen) && (j < srcALen))) - { - /* z[i] += x[i-j] * y[j] */ - sum += pIn1[j] * pIn2[i - j]; - } - } - /* Store the output in the destination buffer */ - pDst[i] = sum; - } - /* set status as ARM_SUCCESS as there are no argument errors */ - status = ARM_MATH_SUCCESS; - } - return (status); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of PartialConv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c deleted file mode 100644 index 1c04d2217a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c +++ /dev/null @@ -1,763 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_partial_fast_opt_q15.c -* -* Description: Fast Q15 Partial convolution. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup PartialConv - * @{ - */ - -/** - * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - * - * See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. - * - * \par Restrictions - * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE - * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit - * - */ - -#ifndef UNALIGNED_SUPPORT_DISABLE - -arm_status arm_conv_partial_fast_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2) -{ - - q15_t *pOut = pDst; /* output pointer */ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ - q31_t acc0, acc1, acc2, acc3; /* Accumulator */ - q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */ - q31_t y1, y2; /* State variables */ - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, k, blkCnt; /* loop counter */ - arm_status status; - - uint32_t tapCnt; /* loop count */ - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* pointer to take end of scratch2 buffer */ - pScr2 = pScratch2 + srcBLen - 1; - - /* points to smaller length sequence */ - px = pIn2; - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - - /* Copy smaller length input sequence in reverse order into second scratch buffer */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Assuming scratch1 buffer is aligned by 32-bit */ - /* Fill (srcBLen - 1u) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1u); - - /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr1, srcALen); - - /* Update pointers */ - pScr1 += srcALen; - - /* Fill (srcBLen - 1u) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update pointer */ - pScr1 += (srcBLen - 1u); - - /* Initialization of pIn2 pointer */ - pIn2 = py; - - pScratch1 += firstIndex; - - pOut = pDst + firstIndex; - - /* First part of the processing with loop unrolling process 4 data points at a time. - ** a second loop below process for the remaining 1 to 3 samples. */ - - /* Actual convolution process starts here */ - blkCnt = (numPoints) >> 2; - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* Read next two samples from scratch1 buffer */ - x2 = *__SIMD32(pScr1)++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pIn2); - y2 = _SIMD32_OFFSET(pIn2 + 2u); - - /* multiply and accumlate */ - acc0 = __SMLAD(x1, y1, acc0); - acc2 = __SMLAD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumlate */ - acc1 = __SMLADX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = _SIMD32_OFFSET(pScr1); - - /* multiply and accumlate */ - acc0 = __SMLAD(x2, y2, acc0); - - acc2 = __SMLAD(x1, y2, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - acc1 = __SMLADX(x3, y2, acc1); - - x2 = _SIMD32_OFFSET(pScr1 + 2u); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y2, acc3); - - /* update scratch pointers */ - pIn2 += 4u; - pScr1 += 4u; - - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4u; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - - /* Store the results in the accumulators in the destination buffer. */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16); - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16); - -#else - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16); - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 4u; - - } - - - blkCnt = numPoints & 0x3; - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - - /* Read next two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* Read two samples from smaller buffer */ - y1 = *__SIMD32(pIn2)++; - - acc0 = __SMLAD(x1, y1, acc0); - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - ** Then store the output in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 1u; - - } - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - /* Return to application */ - return (status); -} - -#else - -arm_status arm_conv_partial_fast_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2) -{ - - q15_t *pOut = pDst; /* output pointer */ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ - q31_t acc0, acc1, acc2, acc3; /* Accumulator */ - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, k, blkCnt; /* loop counter */ - arm_status status; /* Status variable */ - uint32_t tapCnt; /* loop count */ - q15_t x10, x11, x20, x21; /* Temporary variables to hold srcA buffer */ - q15_t y10, y11; /* Temporary variables to hold srcB buffer */ - - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* pointer to take end of scratch2 buffer */ - pScr2 = pScratch2 + srcBLen - 1; - - /* points to smaller length sequence */ - px = pIn2; - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Fill (srcBLen - 1u) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1u); - - /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ - - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcALen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcALen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr1++ = *pIn1++; - - /* Decrement the loop counter */ - k--; - } - - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = (srcBLen - 1u) >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = (srcBLen - 1u) % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - - - /* Initialization of pIn2 pointer */ - pIn2 = py; - - pScratch1 += firstIndex; - - pOut = pDst + firstIndex; - - /* Actual convolution process starts here */ - blkCnt = (numPoints) >> 2; - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x10 = *pScr1++; - x11 = *pScr1++; - - /* Read next two samples from scratch1 buffer */ - x20 = *pScr1++; - x21 = *pScr1++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - - /* Read two samples from smaller buffer */ - y10 = *pIn2; - y11 = *(pIn2 + 1u); - - /* multiply and accumlate */ - acc0 += (q31_t) x10 *y10; - acc0 += (q31_t) x11 *y11; - acc2 += (q31_t) x20 *y10; - acc2 += (q31_t) x21 *y11; - - /* multiply and accumlate */ - acc1 += (q31_t) x11 *y10; - acc1 += (q31_t) x20 *y11; - - /* Read next two samples from scratch1 buffer */ - x10 = *pScr1; - x11 = *(pScr1 + 1u); - - /* multiply and accumlate */ - acc3 += (q31_t) x21 *y10; - acc3 += (q31_t) x10 *y11; - - /* Read next two samples from scratch2 buffer */ - y10 = *(pIn2 + 2u); - y11 = *(pIn2 + 3u); - - /* multiply and accumlate */ - acc0 += (q31_t) x20 *y10; - acc0 += (q31_t) x21 *y11; - acc2 += (q31_t) x10 *y10; - acc2 += (q31_t) x11 *y11; - acc1 += (q31_t) x21 *y10; - acc1 += (q31_t) x10 *y11; - - /* Read next two samples from scratch1 buffer */ - x20 = *(pScr1 + 2); - x21 = *(pScr1 + 3); - - /* multiply and accumlate */ - acc3 += (q31_t) x11 *y10; - acc3 += (q31_t) x20 *y11; - - /* update scratch pointers */ - pIn2 += 4u; - pScr1 += 4u; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4u; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - - /* Store the results in the accumulators in the destination buffer. */ - *pOut++ = __SSAT((acc0 >> 15), 16); - *pOut++ = __SSAT((acc1 >> 15), 16); - *pOut++ = __SSAT((acc2 >> 15), 16); - *pOut++ = __SSAT((acc3 >> 15), 16); - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 4u; - - } - - - blkCnt = numPoints & 0x3; - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - - /* Read next two samples from scratch1 buffer */ - x10 = *pScr1++; - x11 = *pScr1++; - - /* Read two samples from smaller buffer */ - y10 = *pIn2++; - y11 = *pIn2++; - - /* multiply and accumlate */ - acc0 += (q31_t) x10 *y10; - acc0 += (q31_t) x11 *y11; - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 1u; - - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - } - - /* Return to application */ - return (status); -} - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - -/** - * @} end of PartialConv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c deleted file mode 100644 index 5d6eb6f49f..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c +++ /dev/null @@ -1,1473 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_partial_fast_q15.c -* -* Description: Fast Q15 Partial convolution. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup PartialConv - * @{ - */ - -/** - * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - * - * See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. - */ - - -arm_status arm_conv_partial_fast_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ -#ifndef UNALIGNED_SUPPORT_DISABLE - - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *pOut = pDst; /* output pointer */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; - uint32_t j, k, count, check, blkCnt; - int32_t blockSize1, blockSize2, blockSize3; /* loop counters */ - arm_status status; /* status of Partial convolution */ - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >=srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t) check - (int32_t) srcALen); - blockSize3 = (blockSize3 > 0) ? blockSize3 : 0; - blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex); - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 : - (int32_t) numPoints) : 0; - blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + - (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1u + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + firstIndex; - py = pSrc2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations less than 4 */ - /* Second part of this stage computes the MAC operations greater than or equal to 4 */ - - /* The first part of the stage starts here */ - while((count < 4u) && (blockSize1 > 0)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over number of MAC operations between - * inputA samples and inputB samples */ - k = count; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* The second part of the stage starts here */ - /* The internal loop, over count, is unrolled by 4 */ - /* To, read the last two inputB samples using SIMD: - * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ - py = py - 1; - - while(blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1u; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2 - 1u; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0u; - - - /* -------------------- - * Stage2 process - * -------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = ((uint32_t) blockSize2 >> 2u); - - while(blkCnt > 0u) - { - py = py - 1u; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - - /* read x[0], x[1] samples */ - x0 = *__SIMD32(px); - /* read x[1], x[2] samples */ - x1 = _SIMD32_OFFSET(px+1); - px+= 2u; - - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the last two inputB samples using SIMD: - * y[srcBLen - 1] and y[srcBLen - 2] */ - c0 = *__SIMD32(py)--; - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLADX(x0, c0, acc0); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLADX(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = *__SIMD32(px); - - /* Read x[3], x[4] */ - x3 = _SIMD32_OFFSET(px+1); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLADX(x2, c0, acc2); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLADX(x3, c0, acc3); - - /* Read y[srcBLen - 3] and y[srcBLen - 4] */ - c0 = *__SIMD32(py)--; - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLADX(x2, c0, acc0); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLADX(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = _SIMD32_OFFSET(px+2); - - /* Read x[5], x[6] */ - x1 = _SIMD32_OFFSET(px+3); - px += 4u; - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLADX(x0, c0, acc2); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLADX(x1, c0, acc3); - - } while(--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - if(k == 1u) - { - /* Read y[srcBLen - 5] */ - c0 = *(py+1); -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; - -#else - - c0 = c0 & 0x0000FFFF; - -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - x3 = *__SIMD32(px); - px++; - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLADX(x1, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - if(k == 2u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = _SIMD32_OFFSET(py); - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px+1); - px += 2u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - } - - if(k == 3u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = _SIMD32_OFFSET(py); - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px+1); - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - - c0 = *(py-1); -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; -#else - - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - x3 = _SIMD32_OFFSET(px+2); - px += 3u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x1, c0, acc0); - acc1 = __SMLAD(x2, c0, acc1); - acc2 = __SMLADX(x2, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - /* Store the results in the accumulators in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = __PKHBT(acc0 >> 15, acc1 >> 15, 16); - *__SIMD32(pOut)++ = __PKHBT(acc2 >> 15, acc3 >> 15, 16); - -#else - - *__SIMD32(pOut)++ = __PKHBT(acc1 >> 15, acc0 >> 15, 16); - *__SIMD32(pOut)++ = __PKHBT(acc3 >> 15, acc2 >> 15, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = (uint32_t) blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - pIn2 = pSrc2 - 1u; - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations greater than 4 */ - /* Second part of this stage computes the MAC operations less than or equal to 4 */ - - /* The first part of the stage starts here */ - j = count >> 2u; - - while((j > 0u) && (blockSize3 > 0)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied - * with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied - * with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1u; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - - j--; - } - - /* The second part of the stage starts here */ - /* SIMD is not used for the next MAC operations, - * so pointer py is updated to read only one sample at a time */ - py = py + 1u; - - while(blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#else - - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *pOut = pDst; /* output pointer */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; - uint32_t j, k, count, check, blkCnt; - int32_t blockSize1, blockSize2, blockSize3; /* loop counters */ - arm_status status; /* status of Partial convolution */ - q15_t a, b; - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >=srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t) check - (int32_t) srcALen); - blockSize3 = (blockSize3 > 0) ? blockSize3 : 0; - blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex); - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 : - (int32_t) numPoints) : 0; - blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + - (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1u + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + firstIndex; - py = pSrc2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations less than 4 */ - /* Second part of this stage computes the MAC operations greater than or equal to 4 */ - - /* The first part of the stage starts here */ - while((count < 4u) && (blockSize1 > 0u)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over number of MAC operations between - * inputA samples and inputB samples */ - k = count; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* The second part of the stage starts here */ - /* The internal loop, over count, is unrolled by 4 */ - /* To, read the last two inputB samples using SIMD: - * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ - py = py - 1; - - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - py++; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2 - 1u; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0u; - - - /* -------------------- - * Stage2 process - * -------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = ((uint32_t) blockSize2 >> 2u); - - while(blkCnt > 0u) - { - py = py - 1u; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1] samples */ - a = *px++; - b = *px++; - -#ifndef ARM_MATH_BIG_ENDIAN - - x0 = __PKHBT(a, b, 16); - a = *px; - x1 = __PKHBT(b, a, 16); - -#else - - x0 = __PKHBT(b, a, 16); - a = *px; - x1 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the last two inputB samples using SIMD: - * y[srcBLen - 1] and y[srcBLen - 2] */ - a = *py; - b = *(py+1); - py -= 2; - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLADX(x0, c0, acc0); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLADX(x1, c0, acc1); - - a = *px; - b = *(px + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - x2 = __PKHBT(a, b, 16); - a = *(px + 2); - x3 = __PKHBT(b, a, 16); - -#else - - x2 = __PKHBT(b, a, 16); - a = *(px + 2); - x3 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLADX(x2, c0, acc2); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLADX(x3, c0, acc3); - - /* Read y[srcBLen - 3] and y[srcBLen - 4] */ - a = *py; - b = *(py+1); - py -= 2; - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLADX(x2, c0, acc0); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLADX(x3, c0, acc1); - - /* Read x[4], x[5], x[6] */ - a = *(px + 2); - b = *(px + 3); - -#ifndef ARM_MATH_BIG_ENDIAN - - x0 = __PKHBT(a, b, 16); - a = *(px + 4); - x1 = __PKHBT(b, a, 16); - -#else - - x0 = __PKHBT(b, a, 16); - a = *(px + 4); - x1 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - px += 4u; - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLADX(x0, c0, acc2); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLADX(x1, c0, acc3); - - } while(--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - if(k == 1u) - { - /* Read y[srcBLen - 5] */ - c0 = *(py+1); - -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; - -#else - - c0 = c0 & 0x0000FFFF; - -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - a = *px; - b = *(px+1); - px++; - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - -#else - - x3 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLADX(x1, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - if(k == 2u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - a = *py; - b = *(py+1); - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7], x[8], x[9] */ - a = *px; - b = *(px + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - a = *(px + 2); - x2 = __PKHBT(b, a, 16); - -#else - - x3 = __PKHBT(b, a, 16); - a = *(px + 2); - x2 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - px += 2u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - } - - if(k == 3u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - a = *py; - b = *(py+1); - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7], x[8], x[9] */ - a = *px; - b = *(px + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - a = *(px + 2); - x2 = __PKHBT(b, a, 16); - -#else - - x3 = __PKHBT(b, a, 16); - a = *(px + 2); - x2 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - - /* Read y[srcBLen - 7] */ - c0 = *(py-1); -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; -#else - - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - a = *(px+2); - b = *(px+3); - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - -#else - - x3 = __PKHBT(b, a, 16);; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - px += 3u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x1, c0, acc0); - acc1 = __SMLAD(x2, c0, acc1); - acc2 = __SMLADX(x2, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - /* Store the results in the accumulators in the destination buffer. */ - *pOut++ = (q15_t)(acc0 >> 15); - *pOut++ = (q15_t)(acc1 >> 15); - *pOut++ = (q15_t)(acc2 >> 15); - *pOut++ = (q15_t)(acc3 >> 15); - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = (uint32_t) blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - pIn2 = pSrc2 - 1u; - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations greater than 4 */ - /* Second part of this stage computes the MAC operations less than or equal to 4 */ - - /* The first part of the stage starts here */ - j = count >> 2u; - - while((j > 0u) && (blockSize3 > 0)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - py++; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - sum += ((q31_t) * px++ * *py--); - /* Decrement the loop counter */ - k--; - } - - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - - j--; - } - - /* The second part of the stage starts here */ - /* SIMD is not used for the next MAC operations, - * so pointer py is updated to read only one sample at a time */ - py = py + 1u; - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ -} - -/** - * @} end of PartialConv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c deleted file mode 100644 index 0e4795f478..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c +++ /dev/null @@ -1,599 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_partial_fast_q31.c -* -* Description: Fast Q31 Partial convolution. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup PartialConv - * @{ - */ - -/** - * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - * - * \par - * See arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. - */ - -arm_status arm_conv_partial_fast_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ - q31_t *pIn1; /* inputA pointer */ - q31_t *pIn2; /* inputB pointer */ - q31_t *pOut = pDst; /* output pointer */ - q31_t *px; /* Intermediate inputA pointer */ - q31_t *py; /* Intermediate inputB pointer */ - q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - q31_t x0, x1, x2, x3, c0; - uint32_t j, k, count, check, blkCnt; - int32_t blockSize1, blockSize2, blockSize3; /* loop counters */ - arm_status status; /* status of Partial convolution */ - - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t) check - (int32_t) srcALen); - blockSize3 = (blockSize3 > 0) ? blockSize3 : 0; - blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex); - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 : - (int32_t) numPoints) : 0; - blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + - (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1u + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + firstIndex; - py = pSrc2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first loop starts here */ - while(blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* x[1] * y[srcBLen - 2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* x[2] * y[srcBLen - 3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* x[3] * y[srcBLen - 4] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2 */ - blkCnt = ((uint32_t) blockSize2 >> 2u); - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *(px++); - x1 = *(px++); - x2 = *(px++); - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *(py--); - - /* Read x[3] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - - /* acc3 += x[3] * y[srcBLen - 1] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Read y[srcBLen - 2] sample */ - c0 = *(py--); - - /* Read x[4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc3 += x[4] * y[srcBLen - 2] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Read y[srcBLen - 3] sample */ - c0 = *(py--); - - /* Read x[5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc1 += x[3] * y[srcBLen - 2] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc2 += x[4] * y[srcBLen - 2] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc3 += x[5] * y[srcBLen - 2] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* Read y[srcBLen - 4] sample */ - c0 = *(py--); - - /* Read x[6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[3] * y[srcBLen - 4] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc1 += x[4] * y[srcBLen - 4] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc2 += x[5] * y[srcBLen - 4] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc3 += x[6] * y[srcBLen - 4] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32); - - - } while(--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Read y[srcBLen - 5] sample */ - c0 = *(py--); - - /* Read x[7] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (acc0 << 1); - *pOut++ = (q31_t) (acc1 << 1); - *pOut++ = (q31_t) (acc2 << 1); - *pOut++ = (q31_t) (acc3 << 1); - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = (uint32_t) blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -} - -/** - * @} end of PartialConv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c deleted file mode 100644 index 0dd3347a82..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c +++ /dev/null @@ -1,764 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_partial_opt_q15.c -* -* Description: Partial convolution of Q15 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup PartialConv - * @{ - */ - -/** - * @brief Partial convolution of Q15 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - * - * \par Restrictions - * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE - * In this case input, output, state buffers should be aligned by 32-bit - * - * Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. - * - * - */ - -#ifndef UNALIGNED_SUPPORT_DISABLE - -arm_status arm_conv_partial_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2) -{ - - q15_t *pOut = pDst; /* output pointer */ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ - q63_t acc0, acc1, acc2, acc3; /* Accumulator */ - q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */ - q31_t y1, y2; /* State variables */ - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, k, blkCnt; /* loop counter */ - arm_status status; /* Status variable */ - uint32_t tapCnt; /* loop count */ - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* pointer to take end of scratch2 buffer */ - pScr2 = pScratch2 + srcBLen - 1; - - /* points to smaller length sequence */ - px = pIn2; - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Fill (srcBLen - 1u) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1u); - - /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr1, srcALen); - - /* Update pointers */ - pScr1 += srcALen; - - /* Fill (srcBLen - 1u) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update pointer */ - pScr1 += (srcBLen - 1u); - - /* Initialization of pIn2 pointer */ - pIn2 = py; - - pScratch1 += firstIndex; - - pOut = pDst + firstIndex; - - /* Actual convolution process starts here */ - blkCnt = (numPoints) >> 2; - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* Read next two samples from scratch1 buffer */ - x2 = *__SIMD32(pScr1)++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pIn2); - y2 = _SIMD32_OFFSET(pIn2 + 2u); - - /* multiply and accumlate */ - acc0 = __SMLALD(x1, y1, acc0); - acc2 = __SMLALD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumlate */ - acc1 = __SMLALDX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = _SIMD32_OFFSET(pScr1); - - /* multiply and accumlate */ - acc0 = __SMLALD(x2, y2, acc0); - acc2 = __SMLALD(x1, y2, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLALDX(x3, y1, acc3); - acc1 = __SMLALDX(x3, y2, acc1); - - x2 = _SIMD32_OFFSET(pScr1 + 2u); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLALDX(x3, y2, acc3); - - /* update scratch pointers */ - pIn2 += 4u; - pScr1 += 4u; - - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4u; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - - /* Store the results in the accumulators in the destination buffer. */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16); - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16); - -#else - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16); - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 4u; - - } - - - blkCnt = numPoints & 0x3; - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - - /* Read next two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* Read two samples from smaller buffer */ - y1 = *__SIMD32(pIn2)++; - - acc0 = __SMLALD(x1, y1, acc0); - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 1u; - - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - } - - /* Return to application */ - return (status); -} - -#else - -arm_status arm_conv_partial_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2) -{ - - q15_t *pOut = pDst; /* output pointer */ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ - q63_t acc0, acc1, acc2, acc3; /* Accumulator */ - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, k, blkCnt; /* loop counter */ - arm_status status; /* Status variable */ - uint32_t tapCnt; /* loop count */ - q15_t x10, x11, x20, x21; /* Temporary variables to hold srcA buffer */ - q15_t y10, y11; /* Temporary variables to hold srcB buffer */ - - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* pointer to take end of scratch2 buffer */ - pScr2 = pScratch2 + srcBLen - 1; - - /* points to smaller length sequence */ - px = pIn2; - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr2-- = *px++; - - /* Decrement the loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Fill (srcBLen - 1u) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1u); - - /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ - - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcALen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - *pScr1++ = *pIn1++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcALen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr1++ = *pIn1++; - - /* Decrement the loop counter */ - k--; - } - - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = (srcBLen - 1u) >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = (srcBLen - 1u) % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - - - /* Initialization of pIn2 pointer */ - pIn2 = py; - - pScratch1 += firstIndex; - - pOut = pDst + firstIndex; - - /* Actual convolution process starts here */ - blkCnt = (numPoints) >> 2; - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x10 = *pScr1++; - x11 = *pScr1++; - - /* Read next two samples from scratch1 buffer */ - x20 = *pScr1++; - x21 = *pScr1++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - - /* Read two samples from smaller buffer */ - y10 = *pIn2; - y11 = *(pIn2 + 1u); - - /* multiply and accumlate */ - acc0 += (q63_t) x10 *y10; - acc0 += (q63_t) x11 *y11; - acc2 += (q63_t) x20 *y10; - acc2 += (q63_t) x21 *y11; - - /* multiply and accumlate */ - acc1 += (q63_t) x11 *y10; - acc1 += (q63_t) x20 *y11; - - /* Read next two samples from scratch1 buffer */ - x10 = *pScr1; - x11 = *(pScr1 + 1u); - - /* multiply and accumlate */ - acc3 += (q63_t) x21 *y10; - acc3 += (q63_t) x10 *y11; - - /* Read next two samples from scratch2 buffer */ - y10 = *(pIn2 + 2u); - y11 = *(pIn2 + 3u); - - /* multiply and accumlate */ - acc0 += (q63_t) x20 *y10; - acc0 += (q63_t) x21 *y11; - acc2 += (q63_t) x10 *y10; - acc2 += (q63_t) x11 *y11; - acc1 += (q63_t) x21 *y10; - acc1 += (q63_t) x10 *y11; - - /* Read next two samples from scratch1 buffer */ - x20 = *(pScr1 + 2); - x21 = *(pScr1 + 3); - - /* multiply and accumlate */ - acc3 += (q63_t) x11 *y10; - acc3 += (q63_t) x20 *y11; - - /* update scratch pointers */ - pIn2 += 4u; - pScr1 += 4u; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4u; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - - /* Store the results in the accumulators in the destination buffer. */ - *pOut++ = __SSAT((acc0 >> 15), 16); - *pOut++ = __SSAT((acc1 >> 15), 16); - *pOut++ = __SSAT((acc2 >> 15), 16); - *pOut++ = __SSAT((acc3 >> 15), 16); - - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 4u; - - } - - - blkCnt = numPoints & 0x3; - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - - /* Read next two samples from scratch1 buffer */ - x10 = *pScr1++; - x11 = *pScr1++; - - /* Read two samples from smaller buffer */ - y10 = *pIn2++; - y11 = *pIn2++; - - /* multiply and accumlate */ - acc0 += (q63_t) x10 *y10; - acc0 += (q63_t) x11 *y11; - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 1u; - - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - } - - /* Return to application */ - return (status); -} - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - -/** - * @} end of PartialConv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c deleted file mode 100644 index 6a82603165..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c +++ /dev/null @@ -1,806 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_partial_opt_q7.c -* -* Description: Partial convolution of Q7 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup PartialConv - * @{ - */ - -/** - * @brief Partial convolution of Q7 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - * - * \par Restrictions - * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE - * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit - * - * - * - */ - - -#ifndef UNALIGNED_SUPPORT_DISABLE - -arm_status arm_conv_partial_opt_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2) -{ - - q15_t *pScr2, *pScr1; /* Intermediate pointers for scratch pointers */ - q15_t x4; /* Temporary input variable */ - q7_t *pIn1, *pIn2; /* inputA and inputB pointer */ - uint32_t j, k, blkCnt, tapCnt; /* loop counter */ - q7_t *px; /* Temporary input1 pointer */ - q15_t *py; /* Temporary input2 pointer */ - q31_t acc0, acc1, acc2, acc3; /* Accumulator */ - q31_t x1, x2, x3, y1; /* Temporary input variables */ - arm_status status; - q7_t *pOut = pDst; /* output pointer */ - q7_t out0, out1, out2, out3; /* temporary variables */ - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* pointer to take end of scratch2 buffer */ - pScr2 = pScratch2; - - /* points to smaller length sequence */ - px = pIn2 + srcBLen - 1; - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) * px--; - *pScr2++ = x4; - x4 = (q15_t) * px--; - *pScr2++ = x4; - x4 = (q15_t) * px--; - *pScr2++ = x4; - x4 = (q15_t) * px--; - *pScr2++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) * px--; - *pScr2++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Fill (srcBLen - 1u) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1u); - - /* Copy (srcALen) samples in scratch buffer */ - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcALen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcALen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* Fill (srcBLen - 1u) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update pointer */ - pScr1 += (srcBLen - 1u); - - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* Initialization of pIn2 pointer */ - pIn2 = (q7_t *) py; - - pScr2 = py; - - pOut = pDst + firstIndex; - - pScratch1 += firstIndex; - - /* Actual convolution process starts here */ - blkCnt = (numPoints) >> 2; - - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* Read next two samples from scratch1 buffer */ - x2 = *__SIMD32(pScr1)++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pScr2); - - /* multiply and accumlate */ - acc0 = __SMLAD(x1, y1, acc0); - acc2 = __SMLAD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumlate */ - acc1 = __SMLADX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pScr2 + 2u); - - acc0 = __SMLAD(x2, y1, acc0); - - acc2 = __SMLAD(x1, y1, acc2); - - acc1 = __SMLADX(x3, y1, acc1); - - x2 = *__SIMD32(pScr1)++; - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - pScr2 += 4u; - - - /* Decrement the loop counter */ - tapCnt--; - } - - - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4u; - - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pScr2); - acc1 += (*pScr1++ * *pScr2); - acc2 += (*pScr1++ * *pScr2); - acc3 += (*pScr1++ * *pScr2++); - - pScr1 -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - out0 = (q7_t) (__SSAT(acc0 >> 7u, 8)); - out1 = (q7_t) (__SSAT(acc1 >> 7u, 8)); - out2 = (q7_t) (__SSAT(acc2 >> 7u, 8)); - out3 = (q7_t) (__SSAT(acc3 >> 7u, 8)); - - *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3); - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 4u; - - } - - blkCnt = (numPoints) & 0x3; - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - - /* Read next two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* Read two samples from smaller buffer */ - y1 = *__SIMD32(pScr2)++; - - acc0 = __SMLAD(x1, y1, acc0); - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pScr2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8)); - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 1u; - - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - - } - - return (status); - -} - -#else - -arm_status arm_conv_partial_opt_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2) -{ - - q15_t *pScr2, *pScr1; /* Intermediate pointers for scratch pointers */ - q15_t x4; /* Temporary input variable */ - q7_t *pIn1, *pIn2; /* inputA and inputB pointer */ - uint32_t j, k, blkCnt, tapCnt; /* loop counter */ - q7_t *px; /* Temporary input1 pointer */ - q15_t *py; /* Temporary input2 pointer */ - q31_t acc0, acc1, acc2, acc3; /* Accumulator */ - arm_status status; - q7_t *pOut = pDst; /* output pointer */ - q15_t x10, x11, x20, x21; /* Temporary input variables */ - q15_t y10, y11; /* Temporary input variables */ - q7_t out0, out1, out2, out3; /* temporary variables */ - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* pointer to take end of scratch2 buffer */ - pScr2 = pScratch2; - - /* points to smaller length sequence */ - px = pIn2 + srcBLen - 1; - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) * px--; - *pScr2++ = x4; - x4 = (q15_t) * px--; - *pScr2++ = x4; - x4 = (q15_t) * px--; - *pScr2++ = x4; - x4 = (q15_t) * px--; - *pScr2++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) * px--; - *pScr2++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Fill (srcBLen - 1u) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1u); - - /* Copy (srcALen) samples in scratch buffer */ - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcALen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcALen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = (srcBLen - 1u) >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = (srcBLen - 1u) % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* Initialization of pIn2 pointer */ - pIn2 = (q7_t *) py; - - pScr2 = py; - - pOut = pDst + firstIndex; - - pScratch1 += firstIndex; - - /* Actual convolution process starts here */ - blkCnt = (numPoints) >> 2; - - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x10 = *pScr1++; - x11 = *pScr1++; - - /* Read next two samples from scratch1 buffer */ - x20 = *pScr1++; - x21 = *pScr1++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - - /* Read four samples from smaller buffer */ - y10 = *pScr2; - y11 = *(pScr2 + 1u); - - /* multiply and accumlate */ - acc0 += (q31_t) x10 *y10; - acc0 += (q31_t) x11 *y11; - acc2 += (q31_t) x20 *y10; - acc2 += (q31_t) x21 *y11; - - - acc1 += (q31_t) x11 *y10; - acc1 += (q31_t) x20 *y11; - - /* Read next two samples from scratch1 buffer */ - x10 = *pScr1; - x11 = *(pScr1 + 1u); - - /* multiply and accumlate */ - acc3 += (q31_t) x21 *y10; - acc3 += (q31_t) x10 *y11; - - /* Read next two samples from scratch2 buffer */ - y10 = *(pScr2 + 2u); - y11 = *(pScr2 + 3u); - - /* multiply and accumlate */ - acc0 += (q31_t) x20 *y10; - acc0 += (q31_t) x21 *y11; - acc2 += (q31_t) x10 *y10; - acc2 += (q31_t) x11 *y11; - acc1 += (q31_t) x21 *y10; - acc1 += (q31_t) x10 *y11; - - /* Read next two samples from scratch1 buffer */ - x20 = *(pScr1 + 2); - x21 = *(pScr1 + 3); - - /* multiply and accumlate */ - acc3 += (q31_t) x11 *y10; - acc3 += (q31_t) x20 *y11; - - /* update scratch pointers */ - - pScr1 += 4u; - pScr2 += 4u; - - /* Decrement the loop counter */ - tapCnt--; - } - - - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4u; - - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pScr2); - acc1 += (*pScr1++ * *pScr2); - acc2 += (*pScr1++ * *pScr2); - acc3 += (*pScr1++ * *pScr2++); - - pScr1 -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - out0 = (q7_t) (__SSAT(acc0 >> 7u, 8)); - out1 = (q7_t) (__SSAT(acc1 >> 7u, 8)); - out2 = (q7_t) (__SSAT(acc2 >> 7u, 8)); - out3 = (q7_t) (__SSAT(acc3 >> 7u, 8)); - - - *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3); - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 4u; - - } - - blkCnt = (numPoints) & 0x3; - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - - /* Read next two samples from scratch1 buffer */ - x10 = *pScr1++; - x11 = *pScr1++; - - /* Read two samples from smaller buffer */ - y10 = *pScr2++; - y11 = *pScr2++; - - /* multiply and accumlate */ - acc0 += (q31_t) x10 *y10; - acc0 += (q31_t) x11 *y11; - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pScr2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8)); - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 1u; - - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - } - - return (status); - -} - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - - -/** - * @} end of PartialConv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c deleted file mode 100644 index 83d7cc6219..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c +++ /dev/null @@ -1,778 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_partial_q15.c -* -* Description: Partial convolution of Q15 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup PartialConv - * @{ - */ - -/** - * @brief Partial convolution of Q15 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - * - * Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. - * - * \par - * Refer the function arm_conv_partial_opt_q15() for a faster implementation of this function using scratch buffers. - * - */ - - -arm_status arm_conv_partial_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ - -#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE) - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *pOut = pDst; /* output pointer */ - q63_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* Temporary input variables */ - uint32_t j, k, count, check, blkCnt; - int32_t blockSize1, blockSize2, blockSize3; /* loop counter */ - arm_status status; /* status of Partial convolution */ - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t) check - (int32_t) srcALen); - blockSize3 = (blockSize3 > 0) ? blockSize3 : 0; - blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex); - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 : - (int32_t) numPoints) : 0; - blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + - (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1u + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + firstIndex; - py = pSrc2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations less than 4 */ - /* Second part of this stage computes the MAC operations greater than or equal to 4 */ - - /* The first part of the stage starts here */ - while((count < 4u) && (blockSize1 > 0)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over number of MAC operations between - * inputA samples and inputB samples */ - k = count; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* The second part of the stage starts here */ - /* The internal loop, over count, is unrolled by 4 */ - /* To, read the last two inputB samples using SIMD: - * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ - py = py - 1; - - while(blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1u; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2 - 1u; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0u; - - - /* -------------------- - * Stage2 process - * -------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - py = py - 1u; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - - /* read x[0], x[1] samples */ - x0 = *__SIMD32(px); - /* read x[1], x[2] samples */ - x1 = _SIMD32_OFFSET(px+1); - px+= 2u; - - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the last two inputB samples using SIMD: - * y[srcBLen - 1] and y[srcBLen - 2] */ - c0 = *__SIMD32(py)--; - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLALDX(x0, c0, acc0); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLALDX(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = *__SIMD32(px); - - /* Read x[3], x[4] */ - x3 = _SIMD32_OFFSET(px+1); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLALDX(x2, c0, acc2); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLALDX(x3, c0, acc3); - - /* Read y[srcBLen - 3] and y[srcBLen - 4] */ - c0 = *__SIMD32(py)--; - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLALDX(x2, c0, acc0); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLALDX(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = _SIMD32_OFFSET(px+2); - - /* Read x[5], x[6] */ - x1 = _SIMD32_OFFSET(px+3); - px += 4u; - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLALDX(x0, c0, acc2); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLALDX(x1, c0, acc3); - - } while(--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - if(k == 1u) - { - /* Read y[srcBLen - 5] */ - c0 = *(py+1); - -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; - -#else - - c0 = c0 & 0x0000FFFF; - -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - x3 = *__SIMD32(px); - px++; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - acc2 = __SMLALDX(x1, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - if(k == 2u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = _SIMD32_OFFSET(py); - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px+1); - px += 2u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALDX(x0, c0, acc0); - acc1 = __SMLALDX(x1, c0, acc1); - acc2 = __SMLALDX(x3, c0, acc2); - acc3 = __SMLALDX(x2, c0, acc3); - } - - if(k == 3u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = _SIMD32_OFFSET(py); - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px+1); - - /* Perform the multiply-accumulates */ - acc0 = __SMLALDX(x0, c0, acc0); - acc1 = __SMLALDX(x1, c0, acc1); - acc2 = __SMLALDX(x3, c0, acc2); - acc3 = __SMLALDX(x2, c0, acc3); - - c0 = *(py-1); - -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; -#else - - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - x3 = _SIMD32_OFFSET(px+2); - px += 3u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALDX(x1, c0, acc0); - acc1 = __SMLALD(x2, c0, acc1); - acc2 = __SMLALDX(x2, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - - /* Store the results in the accumulators in the destination buffer. */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16); - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16); - -#else - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16); - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = (uint32_t) blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) ((q31_t) * px++ * *py--); - sum += (q63_t) ((q31_t) * px++ * *py--); - sum += (q63_t) ((q31_t) * px++ * *py--); - sum += (q63_t) ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - pIn2 = pSrc2 - 1u; - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations greater than 4 */ - /* Second part of this stage computes the MAC operations less than or equal to 4 */ - - /* The first part of the stage starts here */ - j = count >> 2u; - - while((j > 0u) && (blockSize3 > 0)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied - * with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied - * with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1u; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - - j--; - } - - /* The second part of the stage starts here */ - /* SIMD is not used for the next MAC operations, - * so pointer py is updated to read only one sample at a time */ - py = py + 1u; - - while(blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#else - - /* Run the below code for Cortex-M0 */ - - q15_t *pIn1 = pSrcA; /* inputA pointer */ - q15_t *pIn2 = pSrcB; /* inputB pointer */ - q63_t sum; /* Accumulator */ - uint32_t i, j; /* loop counters */ - arm_status status; /* status of Partial convolution */ - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* Loop to calculate convolution for output length number of values */ - for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0; j <= i; j++) - { - /* Check the array limitations */ - if(((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q31_t) pIn1[j] * (pIn2[i - j])); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u); - } - /* set status as ARM_SUCCESS as there are no argument errors */ - status = ARM_MATH_SUCCESS; - } - return (status); - -#endif /* #if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE) */ - -} - -/** - * @} end of PartialConv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c deleted file mode 100644 index 89c98be966..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c +++ /dev/null @@ -1,599 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_partial_q31.c -* -* Description: Partial convolution of Q31 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup PartialConv - * @{ - */ - -/** - * @brief Partial convolution of Q31 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - * - * See arm_conv_partial_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. - */ - -arm_status arm_conv_partial_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t *pIn1; /* inputA pointer */ - q31_t *pIn2; /* inputB pointer */ - q31_t *pOut = pDst; /* output pointer */ - q31_t *px; /* Intermediate inputA pointer */ - q31_t *py; /* Intermediate inputB pointer */ - q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q63_t sum, acc0, acc1, acc2; /* Accumulator */ - q31_t x0, x1, x2, c0; - uint32_t j, k, count, check, blkCnt; - int32_t blockSize1, blockSize2, blockSize3; /* loop counter */ - arm_status status; /* status of Partial convolution */ - - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t) check - (int32_t) srcALen); - blockSize3 = (blockSize3 > 0) ? blockSize3 : 0; - blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex); - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 : - (int32_t) numPoints) : 0; - blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + - (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1u + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + firstIndex; - py = pSrc2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first loop starts here */ - while(blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 1] */ - sum += (q63_t) * px++ * (*py--); - /* x[1] * y[srcBLen - 2] */ - sum += (q63_t) * px++ * (*py--); - /* x[2] * y[srcBLen - 3] */ - sum += (q63_t) * px++ * (*py--); - /* x[3] * y[srcBLen - 4] */ - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blkCnt */ - - blkCnt = blockSize2 / 3; - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - - /* read x[0], x[1] samples */ - x0 = *(px++); - x1 = *(px++); - - /* Apply loop unrolling and compute 3 MACs simultaneously. */ - k = srcBLen / 3; - - /* First part of the processing with loop unrolling. Compute 3 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 2 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *(py); - - /* Read x[2] sample */ - x2 = *(px); - - /* Perform the multiply-accumulates */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 += (q63_t) x0 *c0; - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 += (q63_t) x1 *c0; - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 += (q63_t) x2 *c0; - - /* Read y[srcBLen - 2] sample */ - c0 = *(py - 1u); - - /* Read x[3] sample */ - x0 = *(px + 1u); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 += (q63_t) x1 *c0; - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 += (q63_t) x2 *c0; - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 += (q63_t) x0 *c0; - - /* Read y[srcBLen - 3] sample */ - c0 = *(py - 2u); - - /* Read x[4] sample */ - x1 = *(px + 2u); - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 += (q63_t) x2 *c0; - /* acc1 += x[3] * y[srcBLen - 2] */ - acc1 += (q63_t) x0 *c0; - /* acc2 += x[4] * y[srcBLen - 2] */ - acc2 += (q63_t) x1 *c0; - - - px += 3u; - - py -= 3u; - - } while(--k); - - /* If the srcBLen is not a multiple of 3, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen - (3 * (srcBLen / 3)); - - while(k > 0u) - { - /* Read y[srcBLen - 5] sample */ - c0 = *(py--); - - /* Read x[7] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += (q63_t) x0 *c0; - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += (q63_t) x1 *c0; - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += (q63_t) x2 *c0; - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (acc0 >> 31); - *pOut++ = (q31_t) (acc1 >> 31); - *pOut++ = (q31_t) (acc2 >> 31); - - /* Increment the pointer pIn1 index, count by 3 */ - count += 3u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 - 3 * (blockSize2 / 3); - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) * px++ * (*py--); - sum += (q63_t) * px++ * (*py--); - sum += (q63_t) * px++ * (*py--); - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - sum += (q63_t) * px++ * (*py--); - sum += (q63_t) * px++ * (*py--); - sum += (q63_t) * px++ * (*py--); - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#else - - /* Run the below code for Cortex-M0 */ - - q31_t *pIn1 = pSrcA; /* inputA pointer */ - q31_t *pIn2 = pSrcB; /* inputB pointer */ - q63_t sum; /* Accumulator */ - uint32_t i, j; /* loop counters */ - arm_status status; /* status of Partial convolution */ - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* Loop to calculate convolution for output length number of values */ - for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0; j <= i; j++) - { - /* Check the array limitations */ - if(((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q63_t) pIn1[j] * (pIn2[i - j])); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q31_t) (sum >> 31u); - } - /* set status as ARM_SUCCESS as there are no argument errors */ - status = ARM_MATH_SUCCESS; - } - return (status); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of PartialConv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c deleted file mode 100644 index b532669947..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c +++ /dev/null @@ -1,733 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_partial_q7.c -* -* Description: Partial convolution of Q7 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup PartialConv - * @{ - */ - -/** - * @brief Partial convolution of Q7 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - * - * \par - * Refer the function arm_conv_partial_opt_q7() for a faster implementation of this function. - * - */ - -arm_status arm_conv_partial_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q7_t *pIn1; /* inputA pointer */ - q7_t *pIn2; /* inputB pointer */ - q7_t *pOut = pDst; /* output pointer */ - q7_t *px; /* Intermediate inputA pointer */ - q7_t *py; /* Intermediate inputB pointer */ - q7_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - q31_t input1, input2; - q15_t in1, in2; - q7_t x0, x1, x2, x3, c0, c1; - uint32_t j, k, count, check, blkCnt; - int32_t blockSize1, blockSize2, blockSize3; /* loop counter */ - arm_status status; - - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t) check - (int32_t) srcALen); - blockSize3 = (blockSize3 > 0) ? blockSize3 : 0; - blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex); - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 : - (int32_t) numPoints) : 0; - blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + - (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1u + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + firstIndex; - py = pSrc2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while(blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] , x[1] */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 1] , y[srcBLen - 2] */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* x[0] * y[srcBLen - 1] */ - /* x[1] * y[srcBLen - 2] */ - sum = __SMLAD(input1, input2, sum); - - /* x[2] , x[3] */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 3] , y[srcBLen - 4] */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* x[2] * y[srcBLen - 3] */ - /* x[3] * y[srcBLen - 4] */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = ((uint32_t) blockSize2 >> 2u); - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *(px++); - x1 = *(px++); - x2 = *(px++); - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *(py--); - /* Read y[srcBLen - 2] sample */ - c1 = *(py--); - - /* Read x[3] sample */ - x3 = *(px++); - - /* x[0] and x[1] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 1] and y[srcBLen - 2] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[1] and x[2] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[4] sample */ - x0 = *(px++); - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLAD(input1, input2, acc3); - - /* Read y[srcBLen - 3] sample */ - c0 = *(py--); - /* Read y[srcBLen - 4] sample */ - c1 = *(py--); - - /* Read x[5] sample */ - x1 = *(px++); - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 3] and y[srcBLen - 4] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[4] and x[5] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[6] sample */ - x2 = *(px++); - - /* x[5] and x[6] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLAD(input1, input2, acc3); - - } while(--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Read y[srcBLen - 5] sample */ - c0 = *(py--); - - /* Read x[7] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += ((q31_t) x0 * c0); - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += ((q31_t) x1 * c0); - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += ((q31_t) x2 * c0); - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 += ((q31_t) x3 * c0); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(acc0 >> 7, 8)); - *pOut++ = (q7_t) (__SSAT(acc1 >> 7, 8)); - *pOut++ = (q7_t) (__SSAT(acc2 >> 7, 8)); - *pOut++ = (q7_t) (__SSAT(acc3 >> 7, 8)); - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = (uint32_t) blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Perform the multiply-accumulates */ - sum = __SMLAD(input1, input2, sum); - - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Perform the multiply-accumulates */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum = __SMLAD(input1, input2, sum); - - /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#else - - /* Run the below code for Cortex-M0 */ - - q7_t *pIn1 = pSrcA; /* inputA pointer */ - q7_t *pIn2 = pSrcB; /* inputB pointer */ - q31_t sum; /* Accumulator */ - uint32_t i, j; /* loop counters */ - arm_status status; /* status of Partial convolution */ - - /* Check for range of output samples to be calculated */ - if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u)))) - { - /* Set status as ARM_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* Loop to calculate convolution for output length number of values */ - for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0; j <= i; j++) - { - /* Check the array limitations */ - if(((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q15_t) pIn1[j] * (pIn2[i - j])); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u); - } - /* set status as ARM_SUCCESS as there are no argument errors */ - status = ARM_MATH_SUCCESS; - } - return (status); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of PartialConv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c deleted file mode 100644 index ac6425dfe1..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c +++ /dev/null @@ -1,733 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_q15.c -* -* Description: Convolution of Q15 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Conv - * @{ - */ - -/** - * @brief Convolution of Q15 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 64-bit internal accumulator. - * Both inputs are in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * This approach provides 33 guard bits and there is no risk of overflow. - * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. - * - * \par - * Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. - * - * \par - * Refer the function arm_conv_opt_q15() for a faster implementation of this function using scratch buffers. - * - */ - -void arm_conv_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst) -{ - -#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE) - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *pOut = pDst; /* output pointer */ - q63_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt; /* loop counter */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations less than 4 */ - /* Second part of this stage computes the MAC operations greater than or equal to 4 */ - - /* The first part of the stage starts here */ - while((count < 4u) && (blockSize1 > 0u)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over number of MAC operations between - * inputA samples and inputB samples */ - k = count; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* The second part of the stage starts here */ - /* The internal loop, over count, is unrolled by 4 */ - /* To, read the last two inputB samples using SIMD: - * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ - py = py - 1; - - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1u; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + (count - 1u); - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0u; - - - /* -------------------- - * Stage2 process - * -------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - py = py - 1u; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - - /* read x[0], x[1] samples */ - x0 = *__SIMD32(px); - /* read x[1], x[2] samples */ - x1 = _SIMD32_OFFSET(px+1); - px+= 2u; - - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the last two inputB samples using SIMD: - * y[srcBLen - 1] and y[srcBLen - 2] */ - c0 = *__SIMD32(py)--; - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLALDX(x0, c0, acc0); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLALDX(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = *__SIMD32(px); - - /* Read x[3], x[4] */ - x3 = _SIMD32_OFFSET(px+1); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLALDX(x2, c0, acc2); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLALDX(x3, c0, acc3); - - /* Read y[srcBLen - 3] and y[srcBLen - 4] */ - c0 = *__SIMD32(py)--; - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLALDX(x2, c0, acc0); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLALDX(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = _SIMD32_OFFSET(px+2); - - /* Read x[5], x[6] */ - x1 = _SIMD32_OFFSET(px+3); - px += 4u; - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLALDX(x0, c0, acc2); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLALDX(x1, c0, acc3); - - } while(--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - if(k == 1u) - { - /* Read y[srcBLen - 5] */ - c0 = *(py+1); - -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; - -#else - - c0 = c0 & 0x0000FFFF; - -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - /* Read x[7] */ - x3 = *__SIMD32(px); - px++; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - acc2 = __SMLALDX(x1, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - if(k == 2u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = _SIMD32_OFFSET(py); - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px+1); - px += 2u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALDX(x0, c0, acc0); - acc1 = __SMLALDX(x1, c0, acc1); - acc2 = __SMLALDX(x3, c0, acc2); - acc3 = __SMLALDX(x2, c0, acc3); - } - - if(k == 3u) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = _SIMD32_OFFSET(py); - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px+1); - - /* Perform the multiply-accumulates */ - acc0 = __SMLALDX(x0, c0, acc0); - acc1 = __SMLALDX(x1, c0, acc1); - acc2 = __SMLALDX(x3, c0, acc2); - acc3 = __SMLALDX(x2, c0, acc3); - - c0 = *(py-1); - -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; -#else - - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - /* Read x[10] */ - x3 = _SIMD32_OFFSET(px+2); - px += 3u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALDX(x1, c0, acc0); - acc1 = __SMLALD(x2, c0, acc1); - acc2 = __SMLALDX(x2, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - - /* Store the results in the accumulators in the destination buffer. */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16); - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16); - -#else - - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16); - *__SIMD32(pOut)++ = - __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) ((q31_t) * px++ * *py--); - sum += (q63_t) ((q31_t) * px++ * *py--); - sum += (q63_t) ((q31_t) * px++ * *py--); - sum += (q63_t) ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) ((q31_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - blockSize3 = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - pIn2 = pSrc2 - 1u; - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations greater than 4 */ - /* Second part of this stage computes the MAC operations less than or equal to 4 */ - - /* The first part of the stage starts here */ - j = blockSize3 >> 2u; - - while((j > 0u) && (blockSize3 > 0u)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3 >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied - * with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied - * with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1u; - - /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = blockSize3 % 0x4u; - - while(k > 0u) - { - /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the loop counter */ - blockSize3--; - - j--; - } - - /* The second part of the stage starts here */ - /* SIMD is not used for the next MAC operations, - * so pointer py is updated to read only one sample at a time */ - py = py + 1u; - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else - -/* Run the below code for Cortex-M0 */ - - q15_t *pIn1 = pSrcA; /* input pointer */ - q15_t *pIn2 = pSrcB; /* coefficient pointer */ - q63_t sum; /* Accumulator */ - uint32_t i, j; /* loop counter */ - - /* Loop to calculate output of convolution for output length number of times */ - for (i = 0; i < (srcALen + srcBLen - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0; j <= i; j++) - { - /* Check the array limitations */ - if(((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += (q31_t) pIn1[j] * (pIn2[i - j]); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u); - } - -#endif /* #if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)*/ - -} - -/** - * @} end of Conv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c deleted file mode 100644 index 713ea1bd47..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c +++ /dev/null @@ -1,564 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_q31.c -* -* Description: Convolution of Q31 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Conv - * @{ - */ - -/** - * @brief Convolution of Q31 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * There is no saturation on intermediate additions. - * Thus, if the accumulator overflows it wraps around and distorts the result. - * The input signals should be scaled down to avoid intermediate overflows. - * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, - * as maximum of min(srcALen, srcBLen) number of additions are carried internally. - * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. - * - * \par - * See arm_conv_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. - */ - -void arm_conv_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst) -{ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t *pIn1; /* inputA pointer */ - q31_t *pIn2; /* inputB pointer */ - q31_t *pOut = pDst; /* output pointer */ - q31_t *px; /* Intermediate inputA pointer */ - q31_t *py; /* Intermediate inputB pointer */ - q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q63_t sum; /* Accumulator */ - q63_t acc0, acc1, acc2; /* Accumulator */ - q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3; /* loop counter */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = (q31_t *) pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = (q31_t *) pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 1] */ - sum += (q63_t) * px++ * (*py--); - /* x[1] * y[srcBLen - 2] */ - sum += (q63_t) * px++ * (*py--); - /* x[2] * y[srcBLen - 3] */ - sum += (q63_t) * px++ * (*py--); - /* x[3] * y[srcBLen - 4] */ - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll by 3 */ - blkCnt = blockSize2 / 3; - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *(px++); - x1 = *(px++); - - /* Apply loop unrolling and compute 3 MACs simultaneously. */ - k = srcBLen / 3; - - /* First part of the processing with loop unrolling. Compute 3 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 2 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *(py); - - /* Read x[3] sample */ - x2 = *(px); - - /* Perform the multiply-accumulates */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 += ((q63_t) x0 * c0); - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 += ((q63_t) x1 * c0); - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 += ((q63_t) x2 * c0); - - /* Read y[srcBLen - 2] sample */ - c0 = *(py - 1u); - - /* Read x[4] sample */ - x0 = *(px + 1u); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 += ((q63_t) x1 * c0); - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 += ((q63_t) x2 * c0); - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 += ((q63_t) x0 * c0); - - /* Read y[srcBLen - 3] sample */ - c0 = *(py - 2u); - - /* Read x[5] sample */ - x1 = *(px + 2u); - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 += ((q63_t) x2 * c0); - /* acc1 += x[3] * y[srcBLen - 2] */ - acc1 += ((q63_t) x0 * c0); - /* acc2 += x[4] * y[srcBLen - 2] */ - acc2 += ((q63_t) x1 * c0); - - /* update scratch pointers */ - px += 3u; - py -= 3u; - - } while(--k); - - /* If the srcBLen is not a multiple of 3, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen - (3 * (srcBLen / 3)); - - while(k > 0u) - { - /* Read y[srcBLen - 5] sample */ - c0 = *(py--); - - /* Read x[7] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += ((q63_t) x0 * c0); - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += ((q63_t) x1 * c0); - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += ((q63_t) x2 * c0); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - - /* Decrement the loop counter */ - k--; - } - - /* Store the results in the accumulators in the destination buffer. */ - *pOut++ = (q31_t) (acc0 >> 31); - *pOut++ = (q31_t) (acc1 >> 31); - *pOut++ = (q31_t) (acc2 >> 31); - - /* Increment the pointer pIn1 index, count by 3 */ - count += 3u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 - 3 * (blockSize2 / 3); - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) * px++ * (*py--); - sum += (q63_t) * px++ * (*py--); - sum += (q63_t) * px++ * (*py--); - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3 >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - sum += (q63_t) * px++ * (*py--); - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum += (q63_t) * px++ * (*py--); - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - sum += (q63_t) * px++ * (*py--); - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = blockSize3 % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) * px++ * (*py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - q31_t *pIn1 = pSrcA; /* input pointer */ - q31_t *pIn2 = pSrcB; /* coefficient pointer */ - q63_t sum; /* Accumulator */ - uint32_t i, j; /* loop counter */ - - /* Loop to calculate output of convolution for output length number of times */ - for (i = 0; i < (srcALen + srcBLen - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0; j <= i; j++) - { - /* Check the array limitations */ - if(((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q63_t) pIn1[j] * (pIn2[i - j])); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q31_t) (sum >> 31u); - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of Conv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c deleted file mode 100644 index 9fc7e4044f..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c +++ /dev/null @@ -1,689 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_conv_q7.c -* -* Description: Convolution of Q7 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Conv - * @{ - */ - -/** - * @brief Convolution of Q7 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 32-bit internal accumulator. - * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. - * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. - * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format. - * - * \par - * Refer the function arm_conv_opt_q7() for a faster implementation of this function. - * - */ - -void arm_conv_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst) -{ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q7_t *pIn1; /* inputA pointer */ - q7_t *pIn2; /* inputB pointer */ - q7_t *pOut = pDst; /* output pointer */ - q7_t *px; /* Intermediate inputA pointer */ - q7_t *py; /* Intermediate inputB pointer */ - q7_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q7_t x0, x1, x2, x3, c0, c1; /* Temporary variables to hold state and coefficient values */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - q31_t input1, input2; /* Temporary input variables */ - q15_t in1, in2; /* Temporary input variables */ - uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3; /* loop counter */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = (srcALen - srcBLen) + 1u; - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] , x[1] */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* y[srcBLen - 1] , y[srcBLen - 2] */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* x[0] * y[srcBLen - 1] */ - /* x[1] * y[srcBLen - 2] */ - sum = __SMLAD(input1, input2, sum); - - /* x[2] , x[3] */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* y[srcBLen - 3] , y[srcBLen - 4] */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* x[2] * y[srcBLen - 3] */ - /* x[3] * y[srcBLen - 4] */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q15_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *(px++); - x1 = *(px++); - x2 = *(px++); - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *(py--); - /* Read y[srcBLen - 2] sample */ - c1 = *(py--); - - /* Read x[3] sample */ - x3 = *(px++); - - /* x[0] and x[1] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* y[srcBLen - 1] and y[srcBLen - 2] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[1] and x[2] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[4] sample */ - x0 = *(px++); - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLAD(input1, input2, acc3); - - /* Read y[srcBLen - 3] sample */ - c0 = *(py--); - /* Read y[srcBLen - 4] sample */ - c1 = *(py--); - - /* Read x[5] sample */ - x1 = *(px++); - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* y[srcBLen - 3] and y[srcBLen - 4] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[4] and x[5] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[6] sample */ - x2 = *(px++); - - /* x[5] and x[6] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLAD(input1, input2, acc3); - - } while(--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Read y[srcBLen - 5] sample */ - c0 = *(py--); - - /* Read x[7] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += ((q15_t) x0 * c0); - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += ((q15_t) x1 * c0); - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += ((q15_t) x2 * c0); - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 += ((q15_t) x3 * c0); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8)); - *pOut++ = (q7_t) (__SSAT(acc1 >> 7u, 8)); - *pOut++ = (q7_t) (__SSAT(acc2 >> 7u, 8)); - *pOut++ = (q7_t) (__SSAT(acc3 >> 7u, 8)); - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* Perform the multiply-accumulates */ - sum = __SMLAD(input1, input2, sum); - - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* Perform the multiply-accumulates */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q15_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8)); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += ((q15_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8)); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - /* Working pointer of inputA */ - pSrc1 = pIn1 + (srcALen - (srcBLen - 1u)); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1u); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3 >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum = __SMLAD(input1, input2, sum); - - /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */ - in1 = (q15_t) * py--; - in2 = (q15_t) * py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u); - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = blockSize3 % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q15_t) * px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - q7_t *pIn1 = pSrcA; /* input pointer */ - q7_t *pIn2 = pSrcB; /* coefficient pointer */ - q31_t sum; /* Accumulator */ - uint32_t i, j; /* loop counter */ - - /* Loop to calculate output of convolution for output length number of times */ - for (i = 0; i < (srcALen + srcBLen - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0; j <= i; j++) - { - /* Check the array limitations */ - if(((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += (q15_t) pIn1[j] * (pIn2[i - j]); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u); - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of Conv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c deleted file mode 100644 index 317950ec49..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c +++ /dev/null @@ -1,738 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_correlate_f32.c -* -* Description: Correlation of floating-point sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup Corr Correlation - * - * Correlation is a mathematical operation that is similar to convolution. - * As with convolution, correlation uses two signals to produce a third signal. - * The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution. - * Correlation is commonly used to measure the similarity between two signals. - * It has applications in pattern recognition, cryptanalysis, and searching. - * The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types. - * Fast versions of the Q15 and Q31 functions are also provided. - * - * \par Algorithm - * Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively. - * The convolution of the two signals is denoted by - *
    
- *                   c[n] = a[n] * b[n]    
- * 
- * In correlation, one of the signals is flipped in time - *
    
- *                   c[n] = a[n] * b[-n]    
- * 
- * - * \par - * and this is mathematically defined as - * \image html CorrelateEquation.gif - * \par - * The pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen. - * The result c[n] is of length 2 * max(srcALen, srcBLen) - 1 and is defined over the interval n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2). - * The output result is written to pDst and the calling function must allocate 2 * max(srcALen, srcBLen) - 1 words for the result. - * - * Note - * \par - * The pDst should be initialized to all zeros before being used. - * - * Fixed-Point Behavior - * \par - * Correlation requires summing up a large number of intermediate products. - * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. - * Refer to the function specific documentation below for further details of the particular algorithm used. - * - * - * Fast Versions - * - * \par - * Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires - * the input signals should be scaled down to avoid intermediate overflows. - * - * - * Opt Versions - * - * \par - * Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. - * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of correlate - */ - -/** - * @addtogroup Corr - * @{ - */ -/** - * @brief Correlation of floating-point sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @return none. - */ - -void arm_correlate_f32( - float32_t * pSrcA, - uint32_t srcALen, - float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst) -{ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - float32_t *pIn1; /* inputA pointer */ - float32_t *pIn2; /* inputB pointer */ - float32_t *pOut = pDst; /* output pointer */ - float32_t *px; /* Intermediate inputA pointer */ - float32_t *py; /* Intermediate inputB pointer */ - float32_t *pSrc1; /* Intermediate pointers */ - float32_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - float32_t x0, x1, x2, x3, c0; /* temporary variables for holding input and coefficient values */ - uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counters */ - int32_t inc = 1; /* Destination address modifier */ - - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (2u * srcALen) - 1u; - - /* When srcALen > srcBLen, zero padding has to be done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1u)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - //while(j > 0u) - //{ - // /* Zero is stored in the destination buffer */ - // *pOut++ = 0.0f; - - // /* Decrement the loop counter */ - // j--; - //} - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2u); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - /* The function is internally - * divided into three parts according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first part of the - * algorithm, the multiplications increase by one for every iteration. - * In the second part of the algorithm, srcBLen number of multiplications are done. - * In the third part of the algorithm, the multiplications decrease by one - * for every iteration.*/ - /* The algorithm is implemented in three stages. - * The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1u); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 4] */ - sum += *px++ * *py++; - /* x[1] * y[srcBLen - 3] */ - sum += *px++ * *py++; - /* x[2] * y[srcBLen - 2] */ - sum += *px++ * *py++; - /* x[3] * y[srcBLen - 1] */ - sum += *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - /* x[0] * y[srcBLen - 1] */ - sum += *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - - /* read x[0], x[1], x[2] samples */ - x0 = *(px++); - x1 = *(px++); - x2 = *(px++); - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[0] sample */ - c0 = *(py++); - - /* Read x[3] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[0] */ - acc0 += x0 * c0; - /* acc1 += x[1] * y[0] */ - acc1 += x1 * c0; - /* acc2 += x[2] * y[0] */ - acc2 += x2 * c0; - /* acc3 += x[3] * y[0] */ - acc3 += x3 * c0; - - /* Read y[1] sample */ - c0 = *(py++); - - /* Read x[4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[1] */ - acc0 += x1 * c0; - /* acc1 += x[2] * y[1] */ - acc1 += x2 * c0; - /* acc2 += x[3] * y[1] */ - acc2 += x3 * c0; - /* acc3 += x[4] * y[1] */ - acc3 += x0 * c0; - - /* Read y[2] sample */ - c0 = *(py++); - - /* Read x[5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[2] */ - acc0 += x2 * c0; - /* acc1 += x[3] * y[2] */ - acc1 += x3 * c0; - /* acc2 += x[4] * y[2] */ - acc2 += x0 * c0; - /* acc3 += x[5] * y[2] */ - acc3 += x1 * c0; - - /* Read y[3] sample */ - c0 = *(py++); - - /* Read x[6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[3] * y[3] */ - acc0 += x3 * c0; - /* acc1 += x[4] * y[3] */ - acc1 += x0 * c0; - /* acc2 += x[5] * y[3] */ - acc2 += x1 * c0; - /* acc3 += x[6] * y[3] */ - acc3 += x2 * c0; - - - } while(--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Read y[4] sample */ - c0 = *(py++); - - /* Read x[7] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[4] */ - acc0 += x0 * c0; - /* acc1 += x[5] * y[4] */ - acc1 += x1 * c0; - /* acc2 += x[6] * y[4] */ - acc2 += x2 * c0; - /* acc3 += x[7] * y[4] */ - acc3 += x3 * c0; - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = acc0; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = acc1; - pOut += inc; - - *pOut = acc2; - pOut += inc; - - *pOut = acc3; - pOut += inc; - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += *px++ * *py++; - sum += *px++ * *py++; - sum += *px++ * *py++; - sum += *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* Loop over srcBLen */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = pIn1 + (srcALen - (srcBLen - 1u)); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen - srcBLen + 4] * y[3] */ - sum += *px++ * *py++; - /* sum += x[srcALen - srcBLen + 3] * y[2] */ - sum += *px++ * *py++; - /* sum += x[srcALen - srcBLen + 2] * y[1] */ - sum += *px++ * *py++; - /* sum += x[srcALen - srcBLen + 1] * y[0] */ - sum += *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - float32_t *pIn1 = pSrcA; /* inputA pointer */ - float32_t *pIn2 = pSrcB + (srcBLen - 1u); /* inputB pointer */ - float32_t sum; /* Accumulator */ - uint32_t i = 0u, j; /* loop counters */ - uint32_t inv = 0u; /* Reverse order flag */ - uint32_t tot = 0u; /* Length */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and a varaible, inv is set to 1 */ - /* If lengths are not equal then zero pad has to be done to make the two - * inputs of same length. But to improve the performance, we include zeroes - * in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the - * starting of the output buffer */ - /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the - * ending of the output buffer */ - /* Once the zero padding is done the remaining of the output is calcualted - * using convolution but with the shorter signal time shifted. */ - - /* Calculate the length of the remaining sequence */ - tot = ((srcALen + srcBLen) - 2u); - - if(srcALen > srcBLen) - { - /* Calculating the number of zeros to be padded to the output */ - j = srcALen - srcBLen; - - /* Initialise the pointer after zero padding */ - pDst += j; - } - - else if(srcALen < srcBLen) - { - /* Initialization to inputB pointer */ - pIn1 = pSrcB; - - /* Initialization to the end of inputA pointer */ - pIn2 = pSrcA + (srcALen - 1u); - - /* Initialisation of the pointer after zero padding */ - pDst = pDst + tot; - - /* Swapping the lengths */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - - /* Setting the reverse flag */ - inv = 1; - - } - - /* Loop to calculate convolution for output length number of times */ - for (i = 0u; i <= tot; i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0.0f; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0u; j <= i; j++) - { - /* Check the array limitations */ - if((((i - j) < srcBLen) && (j < srcALen))) - { - /* z[i] += x[i-j] * y[j] */ - sum += pIn1[j] * pIn2[-((int32_t) i - j)]; - } - } - /* Store the output in the destination buffer */ - if(inv == 1) - *pDst-- = sum; - else - *pDst++ = sum; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of Corr group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c deleted file mode 100644 index 59970e11d4..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c +++ /dev/null @@ -1,507 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_correlate_fast_opt_q15.c -* -* Description: Fast Q15 Correlation. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Corr - * @{ - */ - -/** - * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @param[in] *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @return none. - * - * - * \par Restrictions - * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE - * In this case input, output, scratch buffers should be aligned by 32-bit - * - * - * Scaling and Overflow Behavior: - * - * \par - * This fast version uses a 32-bit accumulator with 2.30 format. - * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * There is no saturation on intermediate additions. - * Thus, if the accumulator overflows it wraps around and distorts the result. - * The input signals should be scaled down to avoid intermediate overflows. - * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a - * maximum of min(srcALen, srcBLen) number of additions is carried internally. - * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result. - * - * \par - * See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. - */ - -void arm_correlate_fast_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch) -{ - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q31_t acc0, acc1, acc2, acc3; /* Accumulators */ - q15_t *py; /* Intermediate inputB pointer */ - q31_t x1, x2, x3; /* temporary variables for holding input and coefficient values */ - uint32_t j, blkCnt, outBlockSize; /* loop counter */ - int32_t inc = 1; /* Destination address modifier */ - uint32_t tapCnt; - q31_t y1, y2; - q15_t *pScr; /* Intermediate pointers */ - q15_t *pOut = pDst; /* output pointer */ -#ifdef UNALIGNED_SUPPORT_DISABLE - - q15_t a, b; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcA); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcB); - - /* Number of output samples is calculated */ - outBlockSize = (2u * srcALen) - 1u; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1u)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcB); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcA); - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2u); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - pScr = pScratch; - - /* Fill (srcBLen - 1u) zeros in scratch buffer */ - arm_fill_q15(0, pScr, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr += (srcBLen - 1u); - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr, srcALen); - - /* Update pointers */ - pScr += srcALen; - -#else - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - j = srcALen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(j > 0u) - { - /* copy second buffer in reversal manner */ - *pScr++ = *pIn1++; - *pScr++ = *pIn1++; - *pScr++ = *pIn1++; - *pScr++ = *pIn1++; - - /* Decrement the loop counter */ - j--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - j = srcALen % 0x4u; - - while(j > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr++ = *pIn1++; - - /* Decrement the loop counter */ - j--; - } - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Fill (srcBLen - 1u) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr, (srcBLen - 1u)); - - /* Update pointer */ - pScr += (srcBLen - 1u); - -#else - -/* Apply loop unrolling and do 4 Copies simultaneously. */ - j = (srcBLen - 1u) >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(j > 0u) - { - /* copy second buffer in reversal manner */ - *pScr++ = 0; - *pScr++ = 0; - *pScr++ = 0; - *pScr++ = 0; - - /* Decrement the loop counter */ - j--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - j = (srcBLen - 1u) % 0x4u; - - while(j > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr++ = 0; - - /* Decrement the loop counter */ - j--; - } - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Temporary pointer for scratch2 */ - py = pIn2; - - - /* Actual correlation process starts here */ - blkCnt = (srcALen + srcBLen - 1u) >> 2; - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr = pScratch; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read four samples from scratch1 buffer */ - x1 = *__SIMD32(pScr)++; - - /* Read next four samples from scratch1 buffer */ - x2 = *__SIMD32(pScr)++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pIn2); - y2 = _SIMD32_OFFSET(pIn2 + 2u); - - acc0 = __SMLAD(x1, y1, acc0); - - acc2 = __SMLAD(x2, y1, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc1 = __SMLADX(x3, y1, acc1); - - x1 = _SIMD32_OFFSET(pScr); - - acc0 = __SMLAD(x2, y2, acc0); - - acc2 = __SMLAD(x1, y2, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - acc1 = __SMLADX(x3, y2, acc1); - - x2 = _SIMD32_OFFSET(pScr + 2u); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y2, acc3); -#else - - /* Read four samples from smaller buffer */ - a = *pIn2; - b = *(pIn2 + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - y1 = __PKHBT(a, b, 16); -#else - y1 = __PKHBT(b, a, 16); -#endif - - a = *(pIn2 + 2); - b = *(pIn2 + 3); -#ifndef ARM_MATH_BIG_ENDIAN - y2 = __PKHBT(a, b, 16); -#else - y2 = __PKHBT(b, a, 16); -#endif - - acc0 = __SMLAD(x1, y1, acc0); - - acc2 = __SMLAD(x2, y1, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc1 = __SMLADX(x3, y1, acc1); - - a = *pScr; - b = *(pScr + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(a, b, 16); -#else - x1 = __PKHBT(b, a, 16); -#endif - - acc0 = __SMLAD(x2, y2, acc0); - - acc2 = __SMLAD(x1, y2, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - acc1 = __SMLADX(x3, y2, acc1); - - a = *(pScr + 2); - b = *(pScr + 3); - -#ifndef ARM_MATH_BIG_ENDIAN - x2 = __PKHBT(a, b, 16); -#else - x2 = __PKHBT(b, a, 16); -#endif - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y2, acc3); - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - pIn2 += 4u; - - pScr += 4u; - - - /* Decrement the loop counter */ - tapCnt--; - } - - - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr -= 4u; - - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr++ * *pIn2); - acc1 += (*pScr++ * *pIn2); - acc2 += (*pScr++ * *pIn2); - acc3 += (*pScr++ * *pIn2++); - - pScr -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - - /* Store the results in the accumulators in the destination buffer. */ - *pOut = (__SSAT(acc0 >> 15u, 16)); - pOut += inc; - *pOut = (__SSAT(acc1 >> 15u, 16)); - pOut += inc; - *pOut = (__SSAT(acc2 >> 15u, 16)); - pOut += inc; - *pOut = (__SSAT(acc3 >> 15u, 16)); - pOut += inc; - - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch += 4u; - - } - - - blkCnt = (srcALen + srcBLen - 1u) & 0x3; - - /* Calculate correlation for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr = pScratch; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - - acc0 += (*pScr++ * *pIn2++); - acc0 += (*pScr++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - - *pOut = (q15_t) (__SSAT((acc0 >> 15), 16)); - - pOut += inc; - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch += 1u; - - } -} - -/** - * @} end of Corr group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c deleted file mode 100644 index ca7fe1f2ab..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c +++ /dev/null @@ -1,1314 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_correlate_fast_q15.c -* -* Description: Fast Q15 Correlation. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Corr - * @{ - */ - -/** - * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @return none. - * - * Scaling and Overflow Behavior: - * - * \par - * This fast version uses a 32-bit accumulator with 2.30 format. - * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * There is no saturation on intermediate additions. - * Thus, if the accumulator overflows it wraps around and distorts the result. - * The input signals should be scaled down to avoid intermediate overflows. - * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a - * maximum of min(srcALen, srcBLen) number of additions is carried internally. - * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result. - * - * \par - * See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. - */ - -void arm_correlate_fast_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst) -{ -#ifndef UNALIGNED_SUPPORT_DISABLE - - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *pOut = pDst; /* output pointer */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - q15_t *pSrc1; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* temporary variables for holding input and coefficient values */ - uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */ - int32_t inc = 1; /* Destination address modifier */ - - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcA); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcB); - - /* Number of output samples is calculated */ - outBlockSize = (2u * srcALen) - 1u; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1u)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcB); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcA); - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2u); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - /* The function is internally - * divided into three parts according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first part of the - * algorithm, the multiplications increase by one for every iteration. - * In the second part of the algorithm, srcBLen number of multiplications are done. - * In the third part of the algorithm, the multiplications decrease by one - * for every iteration.*/ - /* The algorithm is implemented in three stages. - * The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1u); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first loop starts here */ - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */ - sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum); - /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */ - sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* x[0] * y[srcBLen - 1] */ - sum = __SMLAD(*px++, *py++, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1] samples */ - x0 = *__SIMD32(px); - /* read x[1], x[2] samples */ - x1 = _SIMD32_OFFSET(px + 1); - px += 2u; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the first two inputB samples using SIMD: - * y[0] and y[1] */ - c0 = *__SIMD32(py)++; - - /* acc0 += x[0] * y[0] + x[1] * y[1] */ - acc0 = __SMLAD(x0, c0, acc0); - - /* acc1 += x[1] * y[0] + x[2] * y[1] */ - acc1 = __SMLAD(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = *__SIMD32(px); - - /* Read x[3], x[4] */ - x3 = _SIMD32_OFFSET(px + 1); - - /* acc2 += x[2] * y[0] + x[3] * y[1] */ - acc2 = __SMLAD(x2, c0, acc2); - - /* acc3 += x[3] * y[0] + x[4] * y[1] */ - acc3 = __SMLAD(x3, c0, acc3); - - /* Read y[2] and y[3] */ - c0 = *__SIMD32(py)++; - - /* acc0 += x[2] * y[2] + x[3] * y[3] */ - acc0 = __SMLAD(x2, c0, acc0); - - /* acc1 += x[3] * y[2] + x[4] * y[3] */ - acc1 = __SMLAD(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = _SIMD32_OFFSET(px + 2); - - /* Read x[5], x[6] */ - x1 = _SIMD32_OFFSET(px + 3); - px += 4u; - - /* acc2 += x[4] * y[2] + x[5] * y[3] */ - acc2 = __SMLAD(x0, c0, acc2); - - /* acc3 += x[5] * y[2] + x[6] * y[3] */ - acc3 = __SMLAD(x1, c0, acc3); - - } while(--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - if(k == 1u) - { - /* Read y[4] */ - c0 = *py; -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; - -#else - - c0 = c0 & 0x0000FFFF; - -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - x3 = *__SIMD32(px); - px++; - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLADX(x1, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - if(k == 2u) - { - /* Read y[4], y[5] */ - c0 = *__SIMD32(py); - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px + 1); - px += 2u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLAD(x3, c0, acc2); - acc3 = __SMLAD(x2, c0, acc3); - } - - if(k == 3u) - { - /* Read y[4], y[5] */ - c0 = *__SIMD32(py)++; - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px + 1); - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLAD(x3, c0, acc2); - acc3 = __SMLAD(x2, c0, acc3); - - c0 = (*py); - /* Read y[6] */ -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; -#else - - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - x3 = _SIMD32_OFFSET(px + 2); - px += 3u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x1, c0, acc0); - acc1 = __SMLAD(x2, c0, acc1); - acc2 = __SMLADX(x2, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (acc0 >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = (q15_t) (acc1 >> 15); - pOut += inc; - - *pOut = (q15_t) (acc2 >> 15); - pOut += inc; - - *pOut = (q15_t) (acc3 >> 15); - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over srcBLen */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */ - sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum); - /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */ - sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = __SMLAD(*px++, *py++, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else - - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *pOut = pDst; /* output pointer */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - q15_t *pSrc1; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* temporary variables for holding input and coefficient values */ - uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */ - int32_t inc = 1; /* Destination address modifier */ - q15_t a, b; - - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcA); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcB); - - /* Number of output samples is calculated */ - outBlockSize = (2u * srcALen) - 1u; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1u)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcB); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcA); - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2u); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - /* The function is internally - * divided into three parts according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first part of the - * algorithm, the multiplications increase by one for every iteration. - * In the second part of the algorithm, srcBLen number of multiplications are done. - * In the third part of the algorithm, the multiplications decrease by one - * for every iteration.*/ - /* The algorithm is implemented in three stages. - * The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1u); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first loop starts here */ - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */ - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* x[0] * y[srcBLen - 1] */ - sum += ((q31_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - a = *px; - b = *(px + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - x0 = __PKHBT(a, b, 16); - a = *(px + 2); - x1 = __PKHBT(b, a, 16); - -#else - - x0 = __PKHBT(b, a, 16); - a = *(px + 2); - x1 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - px += 2u; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the first two inputB samples using SIMD: - * y[0] and y[1] */ - a = *py; - b = *(py + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc0 += x[0] * y[0] + x[1] * y[1] */ - acc0 = __SMLAD(x0, c0, acc0); - - /* acc1 += x[1] * y[0] + x[2] * y[1] */ - acc1 = __SMLAD(x1, c0, acc1); - - /* Read x[2], x[3], x[4] */ - a = *px; - b = *(px + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - x2 = __PKHBT(a, b, 16); - a = *(px + 2); - x3 = __PKHBT(b, a, 16); - -#else - - x2 = __PKHBT(b, a, 16); - a = *(px + 2); - x3 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc2 += x[2] * y[0] + x[3] * y[1] */ - acc2 = __SMLAD(x2, c0, acc2); - - /* acc3 += x[3] * y[0] + x[4] * y[1] */ - acc3 = __SMLAD(x3, c0, acc3); - - /* Read y[2] and y[3] */ - a = *(py + 2); - b = *(py + 3); - - py += 4u; - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc0 += x[2] * y[2] + x[3] * y[3] */ - acc0 = __SMLAD(x2, c0, acc0); - - /* acc1 += x[3] * y[2] + x[4] * y[3] */ - acc1 = __SMLAD(x3, c0, acc1); - - /* Read x[4], x[5], x[6] */ - a = *(px + 2); - b = *(px + 3); - -#ifndef ARM_MATH_BIG_ENDIAN - - x0 = __PKHBT(a, b, 16); - a = *(px + 4); - x1 = __PKHBT(b, a, 16); - -#else - - x0 = __PKHBT(b, a, 16); - a = *(px + 4); - x1 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - px += 4u; - - /* acc2 += x[4] * y[2] + x[5] * y[3] */ - acc2 = __SMLAD(x0, c0, acc2); - - /* acc3 += x[5] * y[2] + x[6] * y[3] */ - acc3 = __SMLAD(x1, c0, acc3); - - } while(--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - if(k == 1u) - { - /* Read y[4] */ - c0 = *py; -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; - -#else - - c0 = c0 & 0x0000FFFF; - -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - a = *px; - b = *(px + 1); - - px++;; - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - -#else - - x3 = __PKHBT(b, a, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - px++; - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLADX(x1, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - if(k == 2u) - { - /* Read y[4], y[5] */ - a = *py; - b = *(py + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7], x[8], x[9] */ - a = *px; - b = *(px + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - a = *(px + 2); - x2 = __PKHBT(b, a, 16); - -#else - - x3 = __PKHBT(b, a, 16); - a = *(px + 2); - x2 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - px += 2u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLAD(x3, c0, acc2); - acc3 = __SMLAD(x2, c0, acc3); - } - - if(k == 3u) - { - /* Read y[4], y[5] */ - a = *py; - b = *(py + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - c0 = __PKHBT(a, b, 16); - -#else - - c0 = __PKHBT(b, a, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - py += 2u; - - /* Read x[7], x[8], x[9] */ - a = *px; - b = *(px + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - a = *(px + 2); - x2 = __PKHBT(b, a, 16); - -#else - - x3 = __PKHBT(b, a, 16); - a = *(px + 2); - x2 = __PKHBT(a, b, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLAD(x3, c0, acc2); - acc3 = __SMLAD(x2, c0, acc3); - - c0 = (*py); - /* Read y[6] */ -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; -#else - - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - b = *(px + 3); - -#ifndef ARM_MATH_BIG_ENDIAN - - x3 = __PKHBT(a, b, 16); - -#else - - x3 = __PKHBT(b, a, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - px += 3u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x1, c0, acc0); - acc1 = __SMLAD(x2, c0, acc1); - acc2 = __SMLADX(x2, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (acc0 >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = (q15_t) (acc1 >> 15); - pOut += inc; - - *pOut = (q15_t) (acc2 >> 15); - pOut += inc; - - *pOut = (q15_t) (acc3 >> 15); - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over srcBLen */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - sum += ((q31_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - -} - -/** - * @} end of Corr group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c deleted file mode 100644 index 5b337ca544..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c +++ /dev/null @@ -1,607 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_correlate_fast_q31.c -* -* Description: Fast Q31 Correlation. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Corr - * @{ - */ - -/** - * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * This function is optimized for speed at the expense of fixed-point precision and overflow protection. - * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. - * These intermediate results are accumulated in a 32-bit register in 2.30 format. - * Finally, the accumulator is saturated and converted to a 1.31 result. - * - * \par - * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. - * In order to avoid overflows completely the input signals must be scaled down. - * The input signals should be scaled down to avoid intermediate overflows. - * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a - * maximum of min(srcALen, srcBLen) number of additions is carried internally. - * - * \par - * See arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. - */ - -void arm_correlate_fast_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst) -{ - q31_t *pIn1; /* inputA pointer */ - q31_t *pIn2; /* inputB pointer */ - q31_t *pOut = pDst; /* output pointer */ - q31_t *px; /* Intermediate inputA pointer */ - q31_t *py; /* Intermediate inputB pointer */ - q31_t *pSrc1; /* Intermediate pointers */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - q31_t x0, x1, x2, x3, c0; /* temporary variables for holding input and coefficient values */ - uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */ - int32_t inc = 1; /* Destination address modifier */ - - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcA); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcB); - - /* Number of output samples is calculated */ - outBlockSize = (2u * srcALen) - 1u; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1u)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcB); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcA); - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2u); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - /* The function is internally - * divided into three parts according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first part of the - * algorithm, the multiplications increase by one for every iteration. - * In the second part of the algorithm, srcBLen number of multiplications are done. - * In the third part of the algorithm, the multiplications decrease by one - * for every iteration.*/ - /* The algorithm is implemented in three stages. - * The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1u); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 4] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - /* x[1] * y[srcBLen - 3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - /* x[2] * y[srcBLen - 2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - /* x[3] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* x[0] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum << 1; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *(px++); - x1 = *(px++); - x2 = *(px++); - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[0] sample */ - c0 = *(py++); - - /* Read x[3] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[0] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc1 += x[1] * y[0] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc2 += x[2] * y[0] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc3 += x[3] * y[0] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Read y[1] sample */ - c0 = *(py++); - - /* Read x[4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[1] * y[1] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc1 += x[2] * y[1] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc2 += x[3] * y[1] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc3 += x[4] * y[1] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Read y[2] sample */ - c0 = *(py++); - - /* Read x[5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[2] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc1 += x[3] * y[2] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc2 += x[4] * y[2] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc3 += x[5] * y[2] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* Read y[3] sample */ - c0 = *(py++); - - /* Read x[6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[3] * y[3] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc1 += x[4] * y[3] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc2 += x[5] * y[3] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc3 += x[6] * y[3] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32); - - - } while(--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Read y[4] sample */ - c0 = *(py++); - - /* Read x[7] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[4] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc1 += x[5] * y[4] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc2 += x[6] * y[4] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc3 += x[7] * y[4] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (acc0 << 1); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = (q31_t) (acc1 << 1); - pOut += inc; - - *pOut = (q31_t) (acc2 << 1); - pOut += inc; - - *pOut = (q31_t) (acc3 << 1); - pOut += inc; - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum << 1; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over srcBLen */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum << 1; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1u; - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen - srcBLen + 4] * y[3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - /* sum += x[srcALen - srcBLen + 3] * y[2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - /* sum += x[srcALen - srcBLen + 2] * y[1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - /* sum += x[srcALen - srcBLen + 1] * y[0] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py++))) >> 32); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum << 1; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - -} - -/** - * @} end of Corr group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c deleted file mode 100644 index 3a1c8cd4a6..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c +++ /dev/null @@ -1,512 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_correlate_opt_q15.c -* -* Description: Correlation of Q15 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Corr - * @{ - */ - -/** - * @brief Correlation of Q15 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @param[in] *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @return none. - * - * \par Restrictions - * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE - * In this case input, output, scratch buffers should be aligned by 32-bit - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 64-bit internal accumulator. - * Both inputs are in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * This approach provides 33 guard bits and there is no risk of overflow. - * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. - * - * \par - * Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. - * - * - */ - - -void arm_correlate_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch) -{ - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q63_t acc0, acc1, acc2, acc3; /* Accumulators */ - q15_t *py; /* Intermediate inputB pointer */ - q31_t x1, x2, x3; /* temporary variables for holding input1 and input2 values */ - uint32_t j, blkCnt, outBlockSize; /* loop counter */ - int32_t inc = 1; /* output pointer increment */ - uint32_t tapCnt; - q31_t y1, y2; - q15_t *pScr; /* Intermediate pointers */ - q15_t *pOut = pDst; /* output pointer */ -#ifdef UNALIGNED_SUPPORT_DISABLE - - q15_t a, b; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcA); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcB); - - /* Number of output samples is calculated */ - outBlockSize = (2u * srcALen) - 1u; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1u)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcB); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcA); - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2u); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - pScr = pScratch; - - /* Fill (srcBLen - 1u) zeros in scratch buffer */ - arm_fill_q15(0, pScr, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr += (srcBLen - 1u); - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr, srcALen); - - /* Update pointers */ - //pIn1 += srcALen; - pScr += srcALen; - -#else - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - j = srcALen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(j > 0u) - { - /* copy second buffer in reversal manner */ - *pScr++ = *pIn1++; - *pScr++ = *pIn1++; - *pScr++ = *pIn1++; - *pScr++ = *pIn1++; - - /* Decrement the loop counter */ - j--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - j = srcALen % 0x4u; - - while(j > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr++ = *pIn1++; - - /* Decrement the loop counter */ - j--; - } - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Fill (srcBLen - 1u) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr, (srcBLen - 1u)); - - /* Update pointer */ - pScr += (srcBLen - 1u); - -#else - -/* Apply loop unrolling and do 4 Copies simultaneously. */ - j = (srcBLen - 1u) >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(j > 0u) - { - /* copy second buffer in reversal manner */ - *pScr++ = 0; - *pScr++ = 0; - *pScr++ = 0; - *pScr++ = 0; - - /* Decrement the loop counter */ - j--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - j = (srcBLen - 1u) % 0x4u; - - while(j > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr++ = 0; - - /* Decrement the loop counter */ - j--; - } - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Temporary pointer for scratch2 */ - py = pIn2; - - - /* Actual correlation process starts here */ - blkCnt = (srcALen + srcBLen - 1u) >> 2; - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr = pScratch; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read four samples from scratch1 buffer */ - x1 = *__SIMD32(pScr)++; - - /* Read next four samples from scratch1 buffer */ - x2 = *__SIMD32(pScr)++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pIn2); - y2 = _SIMD32_OFFSET(pIn2 + 2u); - - acc0 = __SMLALD(x1, y1, acc0); - - acc2 = __SMLALD(x2, y1, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc1 = __SMLALDX(x3, y1, acc1); - - x1 = _SIMD32_OFFSET(pScr); - - acc0 = __SMLALD(x2, y2, acc0); - - acc2 = __SMLALD(x1, y2, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLALDX(x3, y1, acc3); - - acc1 = __SMLALDX(x3, y2, acc1); - - x2 = _SIMD32_OFFSET(pScr + 2u); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLALDX(x3, y2, acc3); - -#else - - /* Read four samples from smaller buffer */ - a = *pIn2; - b = *(pIn2 + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - y1 = __PKHBT(a, b, 16); -#else - y1 = __PKHBT(b, a, 16); -#endif - - a = *(pIn2 + 2); - b = *(pIn2 + 3); -#ifndef ARM_MATH_BIG_ENDIAN - y2 = __PKHBT(a, b, 16); -#else - y2 = __PKHBT(b, a, 16); -#endif - - acc0 = __SMLALD(x1, y1, acc0); - - acc2 = __SMLALD(x2, y1, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc1 = __SMLALDX(x3, y1, acc1); - - a = *pScr; - b = *(pScr + 1); - -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(a, b, 16); -#else - x1 = __PKHBT(b, a, 16); -#endif - - acc0 = __SMLALD(x2, y2, acc0); - - acc2 = __SMLALD(x1, y2, acc2); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLALDX(x3, y1, acc3); - - acc1 = __SMLALDX(x3, y2, acc1); - - a = *(pScr + 2); - b = *(pScr + 3); - -#ifndef ARM_MATH_BIG_ENDIAN - x2 = __PKHBT(a, b, 16); -#else - x2 = __PKHBT(b, a, 16); -#endif - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLALDX(x3, y2, acc3); - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - pIn2 += 4u; - - pScr += 4u; - - - /* Decrement the loop counter */ - tapCnt--; - } - - - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr -= 4u; - - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr++ * *pIn2); - acc1 += (*pScr++ * *pIn2); - acc2 += (*pScr++ * *pIn2); - acc3 += (*pScr++ * *pIn2++); - - pScr -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - - /* Store the results in the accumulators in the destination buffer. */ - *pOut = (__SSAT(acc0 >> 15u, 16)); - pOut += inc; - *pOut = (__SSAT(acc1 >> 15u, 16)); - pOut += inc; - *pOut = (__SSAT(acc2 >> 15u, 16)); - pOut += inc; - *pOut = (__SSAT(acc3 >> 15u, 16)); - pOut += inc; - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch += 4u; - - } - - - blkCnt = (srcALen + srcBLen - 1u) & 0x3; - - /* Calculate correlation for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr = pScratch; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - - acc0 += (*pScr++ * *pIn2++); - acc0 += (*pScr++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr++ * *pIn2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (__SSAT((acc0 >> 15), 16)); - - pOut += inc; - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch += 1u; - - } - - -} - -/** - * @} end of Corr group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c deleted file mode 100644 index 48a6d091c3..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c +++ /dev/null @@ -1,463 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_correlate_opt_q7.c -* -* Description: Correlation of Q7 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Corr - * @{ - */ - -/** - * @brief Correlation of Q7 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - * @return none. - * - * - * \par Restrictions - * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE - * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 32-bit internal accumulator. - * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. - * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. - * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format. - * - * - */ - - - -void arm_correlate_opt_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2) -{ - q7_t *pOut = pDst; /* output pointer */ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch */ - q7_t *pIn1; /* inputA pointer */ - q7_t *pIn2; /* inputB pointer */ - q15_t *py; /* Intermediate inputB pointer */ - q31_t acc0, acc1, acc2, acc3; /* Accumulators */ - uint32_t j, k = 0u, blkCnt; /* loop counter */ - int32_t inc = 1; /* output pointer increment */ - uint32_t outBlockSize; /* loop counter */ - q15_t x4; /* Temporary input variable */ - uint32_t tapCnt; /* loop counter */ - q31_t x1, x2, x3, y1; /* Temporary input variables */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcA); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcB); - - /* Number of output samples is calculated */ - outBlockSize = (2u * srcALen) - 1u; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1u)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcB); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcA); - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2u); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - - /* Copy (srcBLen) samples in scratch buffer */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) * pIn2++; - *pScr2++ = x4; - x4 = (q15_t) * pIn2++; - *pScr2++ = x4; - x4 = (q15_t) * pIn2++; - *pScr2++ = x4; - x4 = (q15_t) * pIn2++; - *pScr2++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) * pIn2++; - *pScr2++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* Fill (srcBLen - 1u) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1u); - - /* Copy (srcALen) samples in scratch buffer */ - k = srcALen >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcALen % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - - /* Decrement the loop counter */ - k--; - } - -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Fill (srcBLen - 1u) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1u)); - - /* Update pointer */ - pScr1 += (srcBLen - 1u); - -#else - -/* Apply loop unrolling and do 4 Copies simultaneously. */ - k = (srcBLen - 1u) >> 2u; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* copy second buffer in reversal manner */ - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = (srcBLen - 1u) % 0x4u; - - while(k > 0u) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr1++ = 0; - - /* Decrement the loop counter */ - k--; - } - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Temporary pointer for second sequence */ - py = pScratch2; - - /* Initialization of pScr2 pointer */ - pScr2 = pScratch2; - - /* Actual correlation process starts here */ - blkCnt = (srcALen + srcBLen - 1u) >> 2; - - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* Read next two samples from scratch1 buffer */ - x2 = *__SIMD32(pScr1)++; - - tapCnt = (srcBLen) >> 2u; - - while(tapCnt > 0u) - { - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pScr2); - - /* multiply and accumlate */ - acc0 = __SMLAD(x1, y1, acc0); - acc2 = __SMLAD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumlate */ - acc1 = __SMLADX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = *__SIMD32(pScr1)++; - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - /* Read four samples from smaller buffer */ - y1 = _SIMD32_OFFSET(pScr2 + 2u); - - acc0 = __SMLAD(x2, y1, acc0); - - acc2 = __SMLAD(x1, y1, acc2); - - acc1 = __SMLADX(x3, y1, acc1); - - x2 = *__SIMD32(pScr1)++; - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - pScr2 += 4u; - - - /* Decrement the loop counter */ - tapCnt--; - } - - - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4u; - - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3u; - - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pScr2); - acc1 += (*pScr1++ * *pScr2); - acc2 += (*pScr1++ * *pScr2); - acc3 += (*pScr1++ * *pScr2++); - - pScr1 -= 3u; - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(acc0 >> 7u, 8)); - pOut += inc; - *pOut = (q7_t) (__SSAT(acc1 >> 7u, 8)); - pOut += inc; - *pOut = (q7_t) (__SSAT(acc2 >> 7u, 8)); - pOut += inc; - *pOut = (q7_t) (__SSAT(acc3 >> 7u, 8)); - pOut += inc; - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 4u; - - } - - - blkCnt = (srcALen + srcBLen - 1u) & 0x3; - - /* Calculate correlation for remaining samples of Bigger length sequence */ - while(blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1u; - - while(tapCnt > 0u) - { - acc0 += (*pScr1++ * *pScr2++); - acc0 += (*pScr1++ * *pScr2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1u; - - /* apply same above for remaining samples of smaller length sequence */ - while(tapCnt > 0u) - { - - /* accumlate the results */ - acc0 += (*pScr1++ * *pScr2++); - - /* Decrement the loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(acc0 >> 7u, 8)); - - pOut += inc; - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 1u; - - } - -} - -/** - * @} end of Corr group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c deleted file mode 100644 index 1832424890..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c +++ /dev/null @@ -1,718 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_correlate_q15.c -* -* Description: Correlation of Q15 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Corr - * @{ - */ - -/** - * @brief Correlation of Q15 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 64-bit internal accumulator. - * Both inputs are in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * This approach provides 33 guard bits and there is no risk of overflow. - * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. - * - * \par - * Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. - * - * \par - * Refer the function arm_correlate_opt_q15() for a faster implementation of this function using scratch buffers. - * - */ - -void arm_correlate_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst) -{ - -#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE) - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q15_t *pIn1; /* inputA pointer */ - q15_t *pIn2; /* inputB pointer */ - q15_t *pOut = pDst; /* output pointer */ - q63_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - q15_t *pSrc1; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* temporary variables for holding input and coefficient values */ - uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */ - int32_t inc = 1; /* Destination address modifier */ - - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcA); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcB); - - /* Number of output samples is calculated */ - outBlockSize = (2u * srcALen) - 1u; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1u)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcB); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcA); - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2u); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - /* The function is internally - * divided into three parts according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first part of the - * algorithm, the multiplications increase by one for every iteration. - * In the second part of the algorithm, srcBLen number of multiplications are done. - * In the third part of the algorithm, the multiplications decrease by one - * for every iteration.*/ - /* The algorithm is implemented in three stages. - * The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1u); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first loop starts here */ - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */ - sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum); - /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */ - sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* x[0] * y[srcBLen - 1] */ - sum = __SMLALD(*px++, *py++, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (__SSAT((sum >> 15), 16)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1] samples */ - x0 = *__SIMD32(px); - /* read x[1], x[2] samples */ - x1 = _SIMD32_OFFSET(px + 1); - px += 2u; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the first two inputB samples using SIMD: - * y[0] and y[1] */ - c0 = *__SIMD32(py)++; - - /* acc0 += x[0] * y[0] + x[1] * y[1] */ - acc0 = __SMLALD(x0, c0, acc0); - - /* acc1 += x[1] * y[0] + x[2] * y[1] */ - acc1 = __SMLALD(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = *__SIMD32(px); - - /* Read x[3], x[4] */ - x3 = _SIMD32_OFFSET(px + 1); - - /* acc2 += x[2] * y[0] + x[3] * y[1] */ - acc2 = __SMLALD(x2, c0, acc2); - - /* acc3 += x[3] * y[0] + x[4] * y[1] */ - acc3 = __SMLALD(x3, c0, acc3); - - /* Read y[2] and y[3] */ - c0 = *__SIMD32(py)++; - - /* acc0 += x[2] * y[2] + x[3] * y[3] */ - acc0 = __SMLALD(x2, c0, acc0); - - /* acc1 += x[3] * y[2] + x[4] * y[3] */ - acc1 = __SMLALD(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = _SIMD32_OFFSET(px + 2); - - /* Read x[5], x[6] */ - x1 = _SIMD32_OFFSET(px + 3); - - px += 4u; - - /* acc2 += x[4] * y[2] + x[5] * y[3] */ - acc2 = __SMLALD(x0, c0, acc2); - - /* acc3 += x[5] * y[2] + x[6] * y[3] */ - acc3 = __SMLALD(x1, c0, acc3); - - } while(--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - if(k == 1u) - { - /* Read y[4] */ - c0 = *py; -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; - -#else - - c0 = c0 & 0x0000FFFF; - -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - /* Read x[7] */ - x3 = *__SIMD32(px); - px++; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - acc2 = __SMLALDX(x1, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - if(k == 2u) - { - /* Read y[4], y[5] */ - c0 = *__SIMD32(py); - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px + 1); - px += 2u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - acc2 = __SMLALD(x3, c0, acc2); - acc3 = __SMLALD(x2, c0, acc3); - } - - if(k == 3u) - { - /* Read y[4], y[5] */ - c0 = *__SIMD32(py)++; - - /* Read x[7], x[8] */ - x3 = *__SIMD32(px); - - /* Read x[9] */ - x2 = _SIMD32_OFFSET(px + 1); - - /* Perform the multiply-accumulates */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - acc2 = __SMLALD(x3, c0, acc2); - acc3 = __SMLALD(x2, c0, acc3); - - c0 = (*py); - - /* Read y[6] */ -#ifdef ARM_MATH_BIG_ENDIAN - - c0 = c0 << 16u; -#else - - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - /* Read x[10] */ - x3 = _SIMD32_OFFSET(px + 2); - px += 3u; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALDX(x1, c0, acc0); - acc1 = __SMLALD(x2, c0, acc1); - acc2 = __SMLALDX(x2, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (__SSAT(acc0 >> 15, 16)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = (q15_t) (__SSAT(acc1 >> 15, 16)); - pOut += inc; - - *pOut = (q15_t) (__SSAT(acc2 >> 15, 16)); - pOut += inc; - - *pOut = (q15_t) (__SSAT(acc3 >> 15, 16)); - pOut += inc; - - /* Increment the count by 4 as 4 output values are computed */ - count += 4u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q63_t) * px++ * *py++); - sum += ((q63_t) * px++ * *py++); - sum += ((q63_t) * px++ * *py++); - sum += ((q63_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q63_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (__SSAT(sum >> 15, 16)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment count by 1, as one output value is computed */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over srcBLen */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += ((q63_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (__SSAT(sum >> 15, 16)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */ - sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum); - /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */ - sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum = __SMLALD(*px++, *py++, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (__SSAT((sum >> 15), 16)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else - -/* Run the below code for Cortex-M0 */ - - q15_t *pIn1 = pSrcA; /* inputA pointer */ - q15_t *pIn2 = pSrcB + (srcBLen - 1u); /* inputB pointer */ - q63_t sum; /* Accumulators */ - uint32_t i = 0u, j; /* loop counters */ - uint32_t inv = 0u; /* Reverse order flag */ - uint32_t tot = 0u; /* Length */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and a varaible, inv is set to 1 */ - /* If lengths are not equal then zero pad has to be done to make the two - * inputs of same length. But to improve the performance, we include zeroes - * in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the - * starting of the output buffer */ - /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the - * ending of the output buffer */ - /* Once the zero padding is done the remaining of the output is calcualted - * using convolution but with the shorter signal time shifted. */ - - /* Calculate the length of the remaining sequence */ - tot = ((srcALen + srcBLen) - 2u); - - if(srcALen > srcBLen) - { - /* Calculating the number of zeros to be padded to the output */ - j = srcALen - srcBLen; - - /* Initialise the pointer after zero padding */ - pDst += j; - } - - else if(srcALen < srcBLen) - { - /* Initialization to inputB pointer */ - pIn1 = pSrcB; - - /* Initialization to the end of inputA pointer */ - pIn2 = pSrcA + (srcALen - 1u); - - /* Initialisation of the pointer after zero padding */ - pDst = pDst + tot; - - /* Swapping the lengths */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - - /* Setting the reverse flag */ - inv = 1; - - } - - /* Loop to calculate convolution for output length number of times */ - for (i = 0u; i <= tot; i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0u; j <= i; j++) - { - /* Check the array limitations */ - if((((i - j) < srcBLen) && (j < srcALen))) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]); - } - } - /* Store the output in the destination buffer */ - if(inv == 1) - *pDst-- = (q15_t) __SSAT((sum >> 15u), 16u); - else - *pDst++ = (q15_t) __SSAT((sum >> 15u), 16u); - } - -#endif /*#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE) */ - -} - -/** - * @} end of Corr group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c deleted file mode 100644 index 8d0a0c3b12..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c +++ /dev/null @@ -1,664 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_correlate_q31.c -* -* Description: Correlation of Q31 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Corr - * @{ - */ - -/** - * @brief Correlation of Q31 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * There is no saturation on intermediate additions. - * Thus, if the accumulator overflows it wraps around and distorts the result. - * The input signals should be scaled down to avoid intermediate overflows. - * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a - * maximum of min(srcALen, srcBLen) number of additions is carried internally. - * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. - * - * \par - * See arm_correlate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. - */ - -void arm_correlate_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst) -{ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t *pIn1; /* inputA pointer */ - q31_t *pIn2; /* inputB pointer */ - q31_t *pOut = pDst; /* output pointer */ - q31_t *px; /* Intermediate inputA pointer */ - q31_t *py; /* Intermediate inputB pointer */ - q31_t *pSrc1; /* Intermediate pointers */ - q63_t sum, acc0, acc1, acc2; /* Accumulators */ - q31_t x0, x1, x2, c0; /* temporary variables for holding input and coefficient values */ - uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */ - int32_t inc = 1; /* Destination address modifier */ - - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcA); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcB); - - /* Number of output samples is calculated */ - outBlockSize = (2u * srcALen) - 1u; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1u)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcB); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcA); - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2u); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - /* The function is internally - * divided into three parts according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first part of the - * algorithm, the multiplications increase by one for every iteration. - * In the second part of the algorithm, srcBLen number of multiplications are done. - * In the third part of the algorithm, the multiplications decrease by one - * for every iteration.*/ - /* The algorithm is implemented in three stages. - * The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1u); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] * y[srcBLen - 4] */ - sum += (q63_t) * px++ * (*py++); - /* x[1] * y[srcBLen - 3] */ - sum += (q63_t) * px++ * (*py++); - /* x[2] * y[srcBLen - 2] */ - sum += (q63_t) * px++ * (*py++); - /* x[3] * y[srcBLen - 1] */ - sum += (q63_t) * px++ * (*py++); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* x[0] * y[srcBLen - 1] */ - sum += (q63_t) * px++ * (*py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (sum >> 31); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll by 3 */ - blkCnt = blockSize2 / 3; - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - - /* read x[0], x[1] samples */ - x0 = *(px++); - x1 = *(px++); - - /* Apply loop unrolling and compute 3 MACs simultaneously. */ - k = srcBLen / 3; - - /* First part of the processing with loop unrolling. Compute 3 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 2 samples. */ - do - { - /* Read y[0] sample */ - c0 = *(py); - - /* Read x[2] sample */ - x2 = *(px); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[0] */ - acc0 += ((q63_t) x0 * c0); - /* acc1 += x[1] * y[0] */ - acc1 += ((q63_t) x1 * c0); - /* acc2 += x[2] * y[0] */ - acc2 += ((q63_t) x2 * c0); - - /* Read y[1] sample */ - c0 = *(py + 1u); - - /* Read x[3] sample */ - x0 = *(px + 1u); - - /* Perform the multiply-accumulates */ - /* acc0 += x[1] * y[1] */ - acc0 += ((q63_t) x1 * c0); - /* acc1 += x[2] * y[1] */ - acc1 += ((q63_t) x2 * c0); - /* acc2 += x[3] * y[1] */ - acc2 += ((q63_t) x0 * c0); - - /* Read y[2] sample */ - c0 = *(py + 2u); - - /* Read x[4] sample */ - x1 = *(px + 2u); - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[2] */ - acc0 += ((q63_t) x2 * c0); - /* acc1 += x[3] * y[2] */ - acc1 += ((q63_t) x0 * c0); - /* acc2 += x[4] * y[2] */ - acc2 += ((q63_t) x1 * c0); - - /* update scratch pointers */ - px += 3u; - py += 3u; - - } while(--k); - - /* If the srcBLen is not a multiple of 3, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen - (3 * (srcBLen / 3)); - - while(k > 0u) - { - /* Read y[4] sample */ - c0 = *(py++); - - /* Read x[7] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[4] */ - acc0 += ((q63_t) x0 * c0); - /* acc1 += x[5] * y[4] */ - acc1 += ((q63_t) x1 * c0); - /* acc2 += x[6] * y[4] */ - acc2 += ((q63_t) x2 * c0); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (acc0 >> 31); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = (q31_t) (acc1 >> 31); - pOut += inc; - - *pOut = (q31_t) (acc2 >> 31); - pOut += inc; - - /* Increment the pointer pIn1 index, count by 3 */ - count += 3u; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 - 3 * (blockSize2 / 3); - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) * px++ * (*py++); - sum += (q63_t) * px++ * (*py++); - sum += (q63_t) * px++ * (*py++); - sum += (q63_t) * px++ * (*py++); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) * px++ * (*py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (sum >> 31); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over srcBLen */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) * px++ * (*py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (sum >> 31); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = pIn1 + (srcALen - (srcBLen - 1u)); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen - srcBLen + 4] * y[3] */ - sum += (q63_t) * px++ * (*py++); - /* sum += x[srcALen - srcBLen + 3] * y[2] */ - sum += (q63_t) * px++ * (*py++); - /* sum += x[srcALen - srcBLen + 2] * y[1] */ - sum += (q63_t) * px++ * (*py++); - /* sum += x[srcALen - srcBLen + 1] * y[0] */ - sum += (q63_t) * px++ * (*py++); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) * px++ * (*py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (sum >> 31); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - q31_t *pIn1 = pSrcA; /* inputA pointer */ - q31_t *pIn2 = pSrcB + (srcBLen - 1u); /* inputB pointer */ - q63_t sum; /* Accumulators */ - uint32_t i = 0u, j; /* loop counters */ - uint32_t inv = 0u; /* Reverse order flag */ - uint32_t tot = 0u; /* Length */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and a varaible, inv is set to 1 */ - /* If lengths are not equal then zero pad has to be done to make the two - * inputs of same length. But to improve the performance, we include zeroes - * in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the - * starting of the output buffer */ - /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the - * ending of the output buffer */ - /* Once the zero padding is done the remaining of the output is calcualted - * using correlation but with the shorter signal time shifted. */ - - /* Calculate the length of the remaining sequence */ - tot = ((srcALen + srcBLen) - 2u); - - if(srcALen > srcBLen) - { - /* Calculating the number of zeros to be padded to the output */ - j = srcALen - srcBLen; - - /* Initialise the pointer after zero padding */ - pDst += j; - } - - else if(srcALen < srcBLen) - { - /* Initialization to inputB pointer */ - pIn1 = pSrcB; - - /* Initialization to the end of inputA pointer */ - pIn2 = pSrcA + (srcALen - 1u); - - /* Initialisation of the pointer after zero padding */ - pDst = pDst + tot; - - /* Swapping the lengths */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - - /* Setting the reverse flag */ - inv = 1; - - } - - /* Loop to calculate correlation for output length number of times */ - for (i = 0u; i <= tot; i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to correlation equation */ - for (j = 0u; j <= i; j++) - { - /* Check the array limitations */ - if((((i - j) < srcBLen) && (j < srcALen))) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]); - } - } - /* Store the output in the destination buffer */ - if(inv == 1) - *pDst-- = (q31_t) (sum >> 31u); - else - *pDst++ = (q31_t) (sum >> 31u); - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of Corr group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c deleted file mode 100644 index eb2ddff999..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c +++ /dev/null @@ -1,789 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_correlate_q7.c -* -* Description: Correlation of Q7 sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.11 2011/10/18 -* Bug Fix in conv, correlation, partial convolution. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup Corr - * @{ - */ - -/** - * @brief Correlation of Q7 sequences. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 32-bit internal accumulator. - * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. - * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. - * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format. - * - * \par - * Refer the function arm_correlate_opt_q7() for a faster implementation of this function. - * - */ - -void arm_correlate_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst) -{ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q7_t *pIn1; /* inputA pointer */ - q7_t *pIn2; /* inputB pointer */ - q7_t *pOut = pDst; /* output pointer */ - q7_t *px; /* Intermediate inputA pointer */ - q7_t *py; /* Intermediate inputB pointer */ - q7_t *pSrc1; /* Intermediate pointers */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - q31_t input1, input2; /* temporary variables */ - q15_t in1, in2; /* temporary variables */ - q7_t x0, x1, x2, x3, c0, c1; /* temporary variables for holding input and coefficient values */ - uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */ - int32_t inc = 1; - - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if(srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcA); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcB); - - /* Number of output samples is calculated */ - outBlockSize = (2u * srcALen) - 1u; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1u)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = (pSrcB); - - /* Initialization of inputB pointer */ - pIn2 = (pSrcA); - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2u); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - /* The function is internally - * divided into three parts according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first part of the - * algorithm, the multiplications increase by one for every iteration. - * In the second part of the algorithm, srcBLen number of multiplications are done. - * In the third part of the algorithm, the multiplications decrease by one - * for every iteration.*/ - /* The algorithm is implemented in three stages. - * The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1u; - blockSize2 = srcALen - (srcBLen - 1u); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1u; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1u); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while(blockSize1 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[0] , x[1] */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 4] , y[srcBLen - 3] */ - in1 = (q15_t) * py++; - in2 = (q15_t) * py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* x[0] * y[srcBLen - 4] */ - /* x[1] * y[srcBLen - 3] */ - sum = __SMLAD(input1, input2, sum); - - /* x[2] , x[3] */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 2] , y[srcBLen - 1] */ - in1 = (q15_t) * py++; - in2 = (q15_t) * py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* x[2] * y[srcBLen - 2] */ - /* x[3] * y[srcBLen - 1] */ - sum = __SMLAD(input1, input2, sum); - - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - /* x[0] * y[srcBLen - 1] */ - sum += (q31_t) ((q15_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(sum >> 7, 8)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment the MAC count */ - count++; - - /* Decrement the loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0u; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if(srcBLen >= 4u) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2u; - - while(blkCnt > 0u) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[0] sample */ - c0 = *py++; - /* Read y[1] sample */ - c1 = *py++; - - /* Read x[3] sample */ - x3 = *px++; - - /* x[0] and x[1] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[0] and y[1] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc0 += x[0] * y[0] + x[1] * y[1] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[1] and x[2] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc1 += x[1] * y[0] + x[2] * y[1] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc2 += x[2] * y[0] + x[3] * y[1] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[4] sample */ - x0 = *(px++); - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc3 += x[3] * y[0] + x[4] * y[1] */ - acc3 = __SMLAD(input1, input2, acc3); - - /* Read y[2] sample */ - c0 = *py++; - /* Read y[3] sample */ - c1 = *py++; - - /* Read x[5] sample */ - x1 = *px++; - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[2] and y[3] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc0 += x[2] * y[2] + x[3] * y[3] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc1 += x[3] * y[2] + x[4] * y[3] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[4] and x[5] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc2 += x[4] * y[2] + x[5] * y[3] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[6] sample */ - x2 = *px++; - - /* x[5] and x[6] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc3 += x[5] * y[2] + x[6] * y[3] */ - acc3 = __SMLAD(input1, input2, acc3); - - } while(--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Read y[4] sample */ - c0 = *py++; - - /* Read x[7] sample */ - x3 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[4] */ - acc0 += ((q15_t) x0 * c0); - /* acc1 += x[5] * y[4] */ - acc1 += ((q15_t) x1 * c0); - /* acc2 += x[6] * y[4] */ - acc2 += ((q15_t) x2 * c0); - /* acc3 += x[7] * y[4] */ - acc3 += ((q15_t) x3 * c0); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(acc0 >> 7, 8)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = (q7_t) (__SSAT(acc1 >> 7, 8)); - pOut += inc; - - *pOut = (q7_t) (__SSAT(acc2 >> 7, 8)); - pOut += inc; - - *pOut = (q7_t) (__SSAT(acc3 >> 7, 8)); - pOut += inc; - - count += 4u; - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4u; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) * py++; - in2 = (q15_t) * py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Perform the multiply-accumulates */ - sum = __SMLAD(input1, input2, sum); - - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) * py++; - in2 = (q15_t) * py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Perform the multiply-accumulates */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q15_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(sum >> 7, 8)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while(blkCnt > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over srcBLen */ - k = srcBLen; - - while(k > 0u) - { - /* Perform the multiply-accumulate */ - sum += ((q15_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(sum >> 7, 8)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - - /* Decrement the loop counter */ - blkCnt--; - } - } - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1u; - - /* Working pointer of inputA */ - pSrc1 = pIn1 + (srcALen - (srcBLen - 1u)); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while(blockSize3 > 0u) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while(k > 0u) - { - /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2] */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[0] , y[1] */ - in1 = (q15_t) * py++; - in2 = (q15_t) * py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* sum += x[srcALen - srcBLen + 1] * y[0] */ - /* sum += x[srcALen - srcBLen + 2] * y[1] */ - sum = __SMLAD(input1, input2, sum); - - /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */ - in1 = (q15_t) * px++; - in2 = (q15_t) * px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[2] , y[3] */ - in1 = (q15_t) * py++; - in2 = (q15_t) * py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* sum += x[srcALen - srcBLen + 3] * y[2] */ - /* sum += x[srcALen - srcBLen + 4] * y[3] */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement the loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4u; - - while(k > 0u) - { - /* Perform the multiply-accumulates */ - sum += ((q15_t) * px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(sum >> 7, 8)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else - -/* Run the below code for Cortex-M0 */ - - q7_t *pIn1 = pSrcA; /* inputA pointer */ - q7_t *pIn2 = pSrcB + (srcBLen - 1u); /* inputB pointer */ - q31_t sum; /* Accumulator */ - uint32_t i = 0u, j; /* loop counters */ - uint32_t inv = 0u; /* Reverse order flag */ - uint32_t tot = 0u; /* Length */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and a varaible, inv is set to 1 */ - /* If lengths are not equal then zero pad has to be done to make the two - * inputs of same length. But to improve the performance, we include zeroes - * in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the - * starting of the output buffer */ - /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the - * ending of the output buffer */ - /* Once the zero padding is done the remaining of the output is calcualted - * using convolution but with the shorter signal time shifted. */ - - /* Calculate the length of the remaining sequence */ - tot = ((srcALen + srcBLen) - 2u); - - if(srcALen > srcBLen) - { - /* Calculating the number of zeros to be padded to the output */ - j = srcALen - srcBLen; - - /* Initialise the pointer after zero padding */ - pDst += j; - } - - else if(srcALen < srcBLen) - { - /* Initialization to inputB pointer */ - pIn1 = pSrcB; - - /* Initialization to the end of inputA pointer */ - pIn2 = pSrcA + (srcALen - 1u); - - /* Initialisation of the pointer after zero padding */ - pDst = pDst + tot; - - /* Swapping the lengths */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - - /* Setting the reverse flag */ - inv = 1; - - } - - /* Loop to calculate convolution for output length number of times */ - for (i = 0u; i <= tot; i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0u; j <= i; j++) - { - /* Check the array limitations */ - if((((i - j) < srcBLen) && (j < srcALen))) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - j)]); - } - } - /* Store the output in the destination buffer */ - if(inv == 1) - *pDst-- = (q7_t) __SSAT((sum >> 7u), 8u); - else - *pDst++ = (q7_t) __SSAT((sum >> 7u), 8u); - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of Corr group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c deleted file mode 100644 index 60cd2ad3b3..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c +++ /dev/null @@ -1,518 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_decimate_f32.c -* -* Description: FIR decimation for floating-point sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator - * - * These functions combine an FIR filter together with a decimator. - * They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion. - * Conceptually, the functions are equivalent to the block diagram below: - * \image html FIRDecimator.gif "Components included in the FIR Decimator functions" - * When decimating by a factor of M, the signal should be prefiltered by a lowpass filter with a normalized - * cutoff frequency of 1/M in order to prevent aliasing distortion. - * The user of the function is responsible for providing the filter coefficients. - * - * The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner. - * Instead of calculating all of the FIR filter outputs and discarding M-1 out of every M, only the - * samples output by the decimator are computed. - * The functions operate on blocks of input and output data. - * pSrc points to an array of blockSize input values and - * pDst points to an array of blockSize/M output values. - * In order to have an integer number of output samples blockSize - * must always be a multiple of the decimation factor M. - * - * The library provides separate functions for Q15, Q31 and floating-point data types. - * - * \par Algorithm: - * The FIR portion of the algorithm uses the standard form filter: - *
    
- *    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
- * where, b[n] are the filter coefficients. - * \par - * The pCoeffs points to a coefficient array of size numTaps. - * Coefficients are stored in time reversed order. - * \par - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * \par - * pState points to a state array of size numTaps + blockSize - 1. - * Samples in the state buffer are stored in the order: - * \par - *
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
- * The state variables are updated after each block of data is processed, the coefficients are untouched. - * - * \par Instance Structure - * The coefficients and state variables for a filter are stored together in an instance data structure. - * A separate instance structure must be defined for each filter. - * Coefficient arrays may be shared among several instances while state variable array should be allocated separately. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Zeros out the values in the state buffer. - * - Checks to make sure that the size of the input is a multiple of the decimation factor. - * - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * The code below statically initializes each of the 3 different data type filter instance structures - *
    
- *arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};    
- *arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};    
- *arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};    
- * 
- * where M is the decimation factor; numTaps is the number of filter coefficients in the filter; - * pCoeffs is the address of the coefficient buffer; - * pState is the address of the state buffer. - * Be sure to set the values in the state buffer to zeros when doing static initialization. - * - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the FIR decimate filter functions. - * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - -/** - * @addtogroup FIR_decimate - * @{ - */ - - /** - * @brief Processing function for the floating-point FIR decimator. - * @param[in] *S points to an instance of the floating-point FIR decimator structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - * @return none. - */ - -void arm_fir_decimate_f32( - const arm_fir_decimate_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - float32_t sum0; /* Accumulator */ - float32_t x0, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - -#ifndef ARM_MATH_CM0 - - uint32_t blkCntN4; - float32_t *px0, *px1, *px2, *px3; - float32_t acc0, acc1, acc2, acc3; - float32_t x1, x2, x3; - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1u); - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize / 4; - blkCntN4 = outBlockSize - (4 * blkCnt); - - while(blkCnt > 0u) - { - /* Copy 4 * decimation factor number of new input samples into the state buffer */ - i = 4 * S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /* Set accumulators to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - - /* Initialize state pointer for all the samples */ - px0 = pState; - px1 = pState + S->M; - px2 = pState + 2 * S->M; - px3 = pState + 3 * S->M; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - - while(tapCnt > 0u) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-1] sample for acc0 */ - x0 = *(px0++); - /* Read x[n-numTaps-1] sample for acc1 */ - x1 = *(px1++); - /* Read x[n-numTaps-1] sample for acc2 */ - x2 = *(px2++); - /* Read x[n-numTaps-1] sample for acc3 */ - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch state variables for acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + 4 * S->M; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = acc0; - *pDst++ = acc1; - *pDst++ = acc2; - *pDst++ = acc3; - - /* Decrement the loop counter */ - blkCnt--; - } - - while(blkCntN4 > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /* Set accumulator to zero */ - sum0 = 0.0f; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-1] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-2] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = sum0; - - /* Decrement the loop counter */ - blkCntN4--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = (numTaps - 1u) >> 2; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } - - i = (numTaps - 1u) % 0x04u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } - -#else - -/* Run the below code for Cortex-M0 */ - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1u); - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize; - - while(blkCnt > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /* Set accumulator to zero */ - sum0 = 0.0f; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = sum0; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the start of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - /* Copy numTaps number of values */ - i = (numTaps - 1u); - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of FIR_decimate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c deleted file mode 100644 index b3d55464b7..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c +++ /dev/null @@ -1,590 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_decimate_fast_q15.c -* -* Description: Fast Q15 FIR Decimator. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_decimate - * @{ - */ - -/** - * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. - * @param[in] *S points to an instance of the Q15 FIR decimator structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - * @return none - * - * \par Restrictions - * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE - * In this case input, output, state buffers should be aligned by 32-bit - * - * Scaling and Overflow Behavior: - * \par - * This fast version uses a 32-bit accumulator with 2.30 format. - * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around and distorts the result. - * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2). - * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result. - * - * \par - * Refer to the function arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. - * Both the slow and the fast versions use the same instance structure. - * Use the function arm_fir_decimate_init_q15() to initialize the filter structure. - */ - -#ifndef UNALIGNED_SUPPORT_DISABLE - -void arm_fir_decimate_fast_q15( - const arm_fir_decimate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *px; /* Temporary pointer for state buffer */ - q15_t *pb; /* Temporary pointer coefficient buffer */ - q31_t x0, x1, c0, c1; /* Temporary variables to hold state and coefficient values */ - q31_t sum0; /* Accumulators */ - q31_t acc0, acc1; - q15_t *px0, *px1; - uint32_t blkCntN3; - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1u); - - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize / 2; - blkCntN3 = outBlockSize - (2 * blkCnt); - - - while(blkCnt > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = 2 * S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - - /* Initialize state pointer */ - px0 = pState; - - px1 = pState + S->M; - - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the Read b[numTaps-1] and b[numTaps-2] coefficients */ - c0 = *__SIMD32(pb)++; - - /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */ - x0 = *__SIMD32(px0)++; - - x1 = *__SIMD32(px1)++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLAD(x0, c0, acc0); - - acc1 = __SMLAD(x1, c0, acc1); - - /* Read the b[numTaps-3] and b[numTaps-4] coefficient */ - c0 = *__SIMD32(pb)++; - - /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ - x0 = *__SIMD32(px0)++; - - x1 = *__SIMD32(px1)++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLAD(x0, c0, acc0); - - acc1 = __SMLAD(x1, c0, acc1); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px0++; - - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 2; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); - - /* Decrement the loop counter */ - blkCnt--; - } - - - - while(blkCntN3 > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /*Set sum to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the Read b[numTaps-1] and b[numTaps-2] coefficients */ - c0 = *__SIMD32(pb)++; - - /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */ - x0 = *__SIMD32(px)++; - - /* Read the b[numTaps-3] and b[numTaps-4] coefficient */ - c1 = *__SIMD32(pb)++; - - /* Perform the multiply-accumulate */ - sum0 = __SMLAD(x0, c0, sum0); - - /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ - x0 = *__SIMD32(px)++; - - /* Perform the multiply-accumulate */ - sum0 = __SMLAD(x0, c1, sum0); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 = __SMLAD(x0, c0, sum0); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - /* Decrement the loop counter */ - blkCntN3--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = (numTaps - 1u) >> 2u; - - /* copy data */ - while(i > 0u) - { - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - - /* Decrement the loop counter */ - i--; - } - - i = (numTaps - 1u) % 0x04u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } -} - -#else - - -void arm_fir_decimate_fast_q15( - const arm_fir_decimate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *px; /* Temporary pointer for state buffer */ - q15_t *pb; /* Temporary pointer coefficient buffer */ - q15_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */ - q31_t sum0; /* Accumulators */ - q31_t acc0, acc1; - q15_t *px0, *px1; - uint32_t blkCntN3; - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1u); - - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize / 2; - blkCntN3 = outBlockSize - (2 * blkCnt); - - while(blkCnt > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = 2 * S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - - /* Initialize state pointer */ - px0 = pState; - - px1 = pState + S->M; - - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the Read b[numTaps-1] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-1] for sample 0 and for sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-2] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-3] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-3] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-4] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 2; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); - - - /* Decrement the loop counter */ - blkCnt--; - } - - while(blkCntN3 > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /*Set sum to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the Read b[numTaps-1] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-1] and sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-2] and sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-3] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-3] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-4] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - /* Decrement the loop counter */ - blkCntN3--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = (numTaps - 1u) >> 2u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } - - i = (numTaps - 1u) % 0x04u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } -} - - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - -/** - * @} end of FIR_decimate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c deleted file mode 100644 index d2f0e5fd07..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c +++ /dev/null @@ -1,343 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_decimate_fast_q31.c -* -* Description: Fast Q31 FIR Decimator. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_decimate - * @{ - */ - -/** - * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. - * @param[in] *S points to an instance of the Q31 FIR decimator structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - * @return none - * - * Scaling and Overflow Behavior: - * - * \par - * This function is optimized for speed at the expense of fixed-point precision and overflow protection. - * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. - * These intermediate results are added to a 2.30 accumulator. - * Finally, the accumulator is saturated and converted to a 1.31 result. - * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. - * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2). - * - * \par - * Refer to the function arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. - * Both the slow and the fast versions use the same instance structure. - * Use the function arm_fir_decimate_init_q31() to initialize the filter structure. - */ - -void arm_fir_decimate_fast_q31( - arm_fir_decimate_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ - q31_t *px; /* Temporary pointers for state buffer */ - q31_t *pb; /* Temporary pointers for coefficient buffer */ - q31_t sum0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - uint32_t blkCntN2; - q31_t x1; - q31_t acc0, acc1; - q31_t *px0, *px1; - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1u); - - /* Total number of output samples to be computed */ - - blkCnt = outBlockSize / 2; - blkCntN2 = outBlockSize - (2 * blkCnt); - - while(blkCnt > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = 2 * S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - - /* Initialize state pointer */ - px0 = pState; - px1 = pState + S->M; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb); - - /* Read x[n-numTaps-1] for sample 0 sample 1 */ - x0 = *(px0); - x1 = *(px1); - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb + 1u); - - /* Read x[n-numTaps-2] for sample 0 sample 1 */ - x0 = *(px0 + 1u); - x1 = *(px1 + 1u); - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* Read the b[numTaps-3] coefficient */ - c0 = *(pb + 2u); - - /* Read x[n-numTaps-3] for sample 0 sample 1 */ - x0 = *(px0 + 2u); - x1 = *(px1 + 2u); - pb += 4u; - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb - 1u); - - /* Read x[n-numTaps-4] for sample 0 sample 1 */ - x0 = *(px0 + 3u); - x1 = *(px1 + 3u); - - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* update state pointers */ - px0 += 4u; - px1 += 4u; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x0 = *(px0++); - x1 = *(px1++); - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 2; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (acc0 << 1); - *pDst++ = (q31_t) (acc1 << 1); - - /* Decrement the loop counter */ - blkCnt--; - } - - while(blkCntN2 > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-1] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-2] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Read the b[numTaps-3] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (sum0 << 1); - - /* Decrement the loop counter */ - blkCntN2--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = (numTaps - 1u) >> 2u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } - - i = (numTaps - 1u) % 0x04u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } -} - -/** - * @} end of FIR_decimate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c deleted file mode 100644 index 55c1e991a8..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c +++ /dev/null @@ -1,112 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_decimate_init_f32.c -* -* Description: Floating-point FIR Decimator initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_decimate - * @{ - */ - -/** - * @brief Initialization function for the floating-point FIR decimator. - * @param[in,out] *S points to an instance of the floating-point FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] *pCoeffs points to the filter coefficients. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * \par - * pState points to the array of state variables. - * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_f32(). - * M is the decimation factor. - */ - -arm_status arm_fir_decimate_init_f32( - arm_fir_decimate_instance_f32 * S, - uint16_t numTaps, - uint8_t M, - float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize) -{ - arm_status status; - - /* The size of the input block must be a multiple of the decimation factor */ - if((blockSize % M) != 0u) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Decimation Factor */ - S->M = M; - - status = ARM_MATH_SUCCESS; - } - - return (status); - -} - -/** - * @} end of FIR_decimate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c deleted file mode 100644 index a6ccab926d..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c +++ /dev/null @@ -1,114 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_decimate_init_q15.c -* -* Description: Initialization function for the Q15 FIR Decimator. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_decimate - * @{ - */ - -/** - * @brief Initialization function for the Q15 FIR decimator. - * @param[in,out] *S points to an instance of the Q15 FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] *pCoeffs points to the filter coefficients. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * \par - * pState points to the array of state variables. - * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples - * to the call arm_fir_decimate_q15(). - * M is the decimation factor. - */ - -arm_status arm_fir_decimate_init_q15( - arm_fir_decimate_instance_q15 * S, - uint16_t numTaps, - uint8_t M, - q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize) -{ - - arm_status status; - - /* The size of the input block must be a multiple of the decimation factor */ - if((blockSize % M) != 0u) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear the state buffer. The size of buffer is always (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Decimation factor */ - S->M = M; - - status = ARM_MATH_SUCCESS; - } - - return (status); - -} - -/** - * @} end of FIR_decimate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c deleted file mode 100644 index 046ac1aa31..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c +++ /dev/null @@ -1,112 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_decimate_init_q31.c -* -* Description: Initialization function for Q31 FIR Decimation filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_decimate - * @{ - */ - -/** - * @brief Initialization function for the Q31 FIR decimator. - * @param[in,out] *S points to an instance of the Q31 FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] *pCoeffs points to the filter coefficients. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * \par - * pState points to the array of state variables. - * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_q31(). - * M is the decimation factor. - */ - -arm_status arm_fir_decimate_init_q31( - arm_fir_decimate_instance_q31 * S, - uint16_t numTaps, - uint8_t M, - q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize) -{ - arm_status status; - - /* The size of the input block must be a multiple of the decimation factor */ - if((blockSize % M) != 0u) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Decimation factor */ - S->M = M; - - status = ARM_MATH_SUCCESS; - } - - return (status); - -} - -/** - * @} end of FIR_decimate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c deleted file mode 100644 index 3fead69284..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c +++ /dev/null @@ -1,691 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_decimate_q15.c -* -* Description: Q15 FIR Decimator. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_decimate - * @{ - */ - -/** - * @brief Processing function for the Q15 FIR decimator. - * @param[in] *S points to an instance of the Q15 FIR decimator structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] blockSize number of input samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using a 64-bit internal accumulator. - * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - * Lastly, the accumulator is saturated to yield a result in 1.15 format. - * - * \par - * Refer to the function arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. - */ - -#ifndef ARM_MATH_CM0 - -#ifndef UNALIGNED_SUPPORT_DISABLE - -void arm_fir_decimate_q15( - const arm_fir_decimate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *px; /* Temporary pointer for state buffer */ - q15_t *pb; /* Temporary pointer coefficient buffer */ - q31_t x0, x1, c0, c1; /* Temporary variables to hold state and coefficient values */ - q63_t sum0; /* Accumulators */ - q63_t acc0, acc1; - q15_t *px0, *px1; - uint32_t blkCntN3; - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1u); - - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize / 2; - blkCntN3 = outBlockSize - (2 * blkCnt); - - - while(blkCnt > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = 2 * S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - - /* Initialize state pointer */ - px0 = pState; - - px1 = pState + S->M; - - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the Read b[numTaps-1] and b[numTaps-2] coefficients */ - c0 = *__SIMD32(pb)++; - - /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */ - x0 = *__SIMD32(px0)++; - - x1 = *__SIMD32(px1)++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLALD(x0, c0, acc0); - - acc1 = __SMLALD(x1, c0, acc1); - - /* Read the b[numTaps-3] and b[numTaps-4] coefficient */ - c0 = *__SIMD32(pb)++; - - /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ - x0 = *__SIMD32(px0)++; - - x1 = *__SIMD32(px1)++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLALD(x0, c0, acc0); - - acc1 = __SMLALD(x1, c0, acc1); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px0++; - - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 2; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); - - /* Decrement the loop counter */ - blkCnt--; - } - - - - while(blkCntN3 > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /*Set sum to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the Read b[numTaps-1] and b[numTaps-2] coefficients */ - c0 = *__SIMD32(pb)++; - - /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */ - x0 = *__SIMD32(px)++; - - /* Read the b[numTaps-3] and b[numTaps-4] coefficient */ - c1 = *__SIMD32(pb)++; - - /* Perform the multiply-accumulate */ - sum0 = __SMLALD(x0, c0, sum0); - - /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ - x0 = *__SIMD32(px)++; - - /* Perform the multiply-accumulate */ - sum0 = __SMLALD(x0, c1, sum0); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 = __SMLALD(x0, c0, sum0); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - /* Decrement the loop counter */ - blkCntN3--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = (numTaps - 1u) >> 2u; - - /* copy data */ - while(i > 0u) - { - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - - /* Decrement the loop counter */ - i--; - } - - i = (numTaps - 1u) % 0x04u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } -} - -#else - - -void arm_fir_decimate_q15( - const arm_fir_decimate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *px; /* Temporary pointer for state buffer */ - q15_t *pb; /* Temporary pointer coefficient buffer */ - q15_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */ - q63_t sum0; /* Accumulators */ - q63_t acc0, acc1; - q15_t *px0, *px1; - uint32_t blkCntN3; - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1u); - - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize / 2; - blkCntN3 = outBlockSize - (2 * blkCnt); - - while(blkCnt > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = 2 * S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - - /* Initialize state pointer */ - px0 = pState; - - px1 = pState + S->M; - - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the Read b[numTaps-1] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-1] for sample 0 and for sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-2] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-3] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-3] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-4] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 2; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); - - /* Decrement the loop counter */ - blkCnt--; - } - - while(blkCntN3 > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /*Set sum to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the Read b[numTaps-1] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-1] and sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-2] and sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-3] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-3] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-4] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - /* Decrement the loop counter */ - blkCntN3--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = (numTaps - 1u) >> 2u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } - - i = (numTaps - 1u) % 0x04u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } -} - - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - -#else - - -void arm_fir_decimate_q15( - const arm_fir_decimate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *px; /* Temporary pointer for state buffer */ - q15_t *pb; /* Temporary pointer coefficient buffer */ - q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ - q63_t sum0; /* Accumulators */ - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - - - -/* Run the below code for Cortex-M0 */ - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1u); - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize; - - while(blkCnt > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /*Set sum to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += (q31_t) x0 *c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /*Store filter output , smlad will return the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the start of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = numTaps - 1u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } - - -} -#endif /* #ifndef ARM_MATH_CM0 */ - - -/** - * @} end of FIR_decimate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c deleted file mode 100644 index 72bf76c3a2..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c +++ /dev/null @@ -1,306 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_decimate_q31.c -* -* Description: Q31 FIR Decimator. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_decimate - * @{ - */ - -/** - * @brief Processing function for the Q31 FIR decimator. - * @param[in] *S points to an instance of the Q31 FIR decimator structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - * @return none - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around rather than clip. - * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2). - * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. - * - * \par - * Refer to the function arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. - */ - -void arm_fir_decimate_q31( - const arm_fir_decimate_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ - q31_t *px; /* Temporary pointers for state buffer */ - q31_t *pb; /* Temporary pointers for coefficient buffer */ - q63_t sum0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1u); - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize; - - while(blkCnt > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-1] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-2] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (sum0 >> 31); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = (numTaps - 1u) >> 2u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } - - i = (numTaps - 1u) % 0x04u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } - -#else - -/* Run the below code for Cortex-M0 */ - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1u); - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize; - - while(blkCnt > 0u) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while(--i); - - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (sum0 >> 31); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the start of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = numTaps - 1u; - - /* copy data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of FIR_decimate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c deleted file mode 100644 index a407131e8a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c +++ /dev/null @@ -1,554 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_f32.c -* -* Description: Floating-point FIR filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup FIR Finite Impulse Response (FIR) Filters - * - * This set of functions implements Finite Impulse Response (FIR) filters - * for Q7, Q15, Q31, and floating-point data types. Fast versions of Q15 and Q31 are also provided. - * The functions operate on blocks of input and output data and each call to the function processes - * blockSize samples through the filter. pSrc and - * pDst points to input and output arrays containing blockSize values. - * - * \par Algorithm: - * The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations. - * Each filter coefficient b[n] is multiplied by a state variable which equals a previous input sample x[n]. - *
  
- *    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]  
- * 
- * \par - * \image html FIR.gif "Finite Impulse Response filter" - * \par - * pCoeffs points to a coefficient array of size numTaps. - * Coefficients are stored in time reversed order. - * \par - *
  
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}  
- * 
- * \par - * pState points to a state array of size numTaps + blockSize - 1. - * Samples in the state buffer are stored in the following order. - * \par - *
  
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}  
- * 
- * \par - * Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1. - * The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters, - * to be avoided and yields a significant speed improvement. - * The state variables are updated after each block of data is processed; the coefficients are untouched. - * \par Instance Structure - * The coefficients and state variables for a filter are stored together in an instance data structure. - * A separate instance structure must be defined for each filter. - * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - * There are separate instance structure declarations for each of the 4 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Zeros out the values in the state buffer. - * - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Set the values in the state buffer to zeros before static initialization. - * The code below statically initializes each of the 4 different data type filter instance structures - *
  
- *arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};  
- *arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};  
- *arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};  
- *arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};  
- * 
- * - * where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer; - * pCoeffs is the address of the coefficient buffer. - * - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the FIR filter functions. - * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - -/** - * @addtogroup FIR - * @{ - */ - -/** - * - * @param[in] *S points to an instance of the floating-point FIR filter structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process per call. - * @return none. - * - */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - -void arm_fir_f32( - const arm_fir_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - float32_t acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7; /* Accumulators */ - float32_t x0, x1, x2, x3, x4, x5, x6, x7, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Apply loop unrolling and compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - blkCnt = blockSize >> 3; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Copy four new input samples into the state buffer */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Set all accumulators to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - acc4 = 0.0f; - acc5 = 0.0f; - acc6 = 0.0f; - acc7 = 0.0f; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Read the first three samples from the state buffer: x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - x3 = *px++; - x4 = *px++; - x5 = *px++; - x6 = *px++; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 3u; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - while(tapCnt > 0u) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample */ - x7 = *(px++); - - /* acc0 += b[numTaps-1] * x[n-numTaps] */ - acc0 += x0 * c0; - - /* acc1 += b[numTaps-1] * x[n-numTaps-1] */ - acc1 += x1 * c0; - - /* acc2 += b[numTaps-1] * x[n-numTaps-2] */ - acc2 += x2 * c0; - - /* acc3 += b[numTaps-1] * x[n-numTaps-3] */ - acc3 += x3 * c0; - - /* acc4 += b[numTaps-1] * x[n-numTaps-4] */ - acc4 += x4 * c0; - - /* acc1 += b[numTaps-1] * x[n-numTaps-5] */ - acc5 += x5 * c0; - - /* acc2 += b[numTaps-1] * x[n-numTaps-6] */ - acc6 += x6 * c0; - - /* acc3 += b[numTaps-1] * x[n-numTaps-7] */ - acc7 += x7 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - acc0 += x1 * c0; - acc1 += x2 * c0; - acc2 += x3 * c0; - acc3 += x4 * c0; - acc4 += x5 * c0; - acc5 += x6 * c0; - acc6 += x7 * c0; - acc7 += x0 * c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x2 * c0; - acc1 += x3 * c0; - acc2 += x4 * c0; - acc3 += x5 * c0; - acc4 += x6 * c0; - acc5 += x7 * c0; - acc6 += x0 * c0; - acc7 += x1 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x3 * c0; - acc1 += x4 * c0; - acc2 += x5 * c0; - acc3 += x6 * c0; - acc4 += x7 * c0; - acc5 += x0 * c0; - acc6 += x1 * c0; - acc7 += x2 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x4 * c0; - acc1 += x5 * c0; - acc2 += x6 * c0; - acc3 += x7 * c0; - acc4 += x0 * c0; - acc5 += x1 * c0; - acc6 += x2 * c0; - acc7 += x3 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x4 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x5 * c0; - acc1 += x6 * c0; - acc2 += x7 * c0; - acc3 += x0 * c0; - acc4 += x1 * c0; - acc5 += x2 * c0; - acc6 += x3 * c0; - acc7 += x4 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x5 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x6 * c0; - acc1 += x7 * c0; - acc2 += x0 * c0; - acc3 += x1 * c0; - acc4 += x2 * c0; - acc5 += x3 * c0; - acc6 += x4 * c0; - acc7 += x5 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x6 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x7 * c0; - acc1 += x0 * c0; - acc2 += x1 * c0; - acc3 += x2 * c0; - acc4 += x3 * c0; - acc5 += x4 * c0; - acc6 += x5 * c0; - acc7 += x6 * c0; - - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x8u; - - while(tapCnt > 0u) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x7 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - acc4 += x4 * c0; - acc5 += x5 * c0; - acc6 += x6 * c0; - acc7 += x7 * c0; - - /* Reuse the present sample states for next sample */ - x0 = x1; - x1 = x2; - x2 = x3; - x3 = x4; - x4 = x5; - x5 = x6; - x6 = x7; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 8; - - /* The results in the 4 accumulators, store in the destination buffer. */ - *pDst++ = acc0; - *pDst++ = acc1; - *pDst++ = acc2; - *pDst++ = acc3; - *pDst++ = acc4; - *pDst++ = acc5; - *pDst++ = acc6; - *pDst++ = acc7; - - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x8u; - - while(blkCnt > 0u) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0.0f; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = (pCoeffs); - - i = numTaps; - - /* Perform the multiply-accumulates */ - do - { - acc0 += *px++ * *pb++; - i--; - - } while(i > 0u); - - /* The result is store in the destination buffer. */ - *pDst++ = acc0; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - tapCnt = (numTaps - 1u) >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } -} - -#else - -void arm_fir_f32( - const arm_fir_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - - /* Run the below code for Cortex-M0 */ - - float32_t acc; - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Initialize blkCnt with blockSize */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc = 0.0f; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = pCoeffs; - - i = numTaps; - - /* Perform the multiply-accumulates */ - do - { - /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */ - acc += *px++ * *pb++; - i--; - - } while(i > 0u); - - /* The result is store in the destination buffer. */ - *pDst++ = acc; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the starting of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - /* Copy numTaps number of values */ - tapCnt = numTaps - 1u; - - /* Copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} - -#endif /* #ifndef ARM_MATH_CM0 */ - -/** - * @} end of FIR group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c deleted file mode 100644 index 02634327bc..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c +++ /dev/null @@ -1,341 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_fast_q15.c -* -* Description: Q15 Fast FIR filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.9 2010/08/16 -* Initial version -* -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR - * @{ - */ - -/** - * @param[in] *S points to an instance of the Q15 FIR filter structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * This fast version uses a 32-bit accumulator with 2.30 format. - * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around and distorts the result. - * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. - * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result. - * - * \par - * Refer to the function arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. - * Use the function arm_fir_init_q15() to initialize the filter structure. - */ - -void arm_fir_fast_q15( - const arm_fir_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t acc0, acc1, acc2, acc3; /* Accumulators */ - q15_t *pb; /* Temporary pointer for coefficient buffer */ - q15_t *px; /* Temporary q31 pointer for SIMD state buffer accesses */ - q31_t x0, x1, x2, c0; /* Temporary variables to hold SIMD state and coefficient values */ - uint32_t numTaps = S->numTaps; /* Number of taps in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Apply loop unrolling and compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - - blkCnt = blockSize >> 2; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Copy four new input samples into the state buffer. - ** Use 32-bit SIMD to move the 16-bit data. Only requires two copies. */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */ - px = pState; - - /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */ - pb = pCoeffs; - - /* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */ - x0 = *__SIMD32(px)++; - - /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */ - x2 = *__SIMD32(px)++; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */ - tapCnt = numTaps >> 2; - - while(tapCnt > 0) - { - /* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */ - c0 = *__SIMD32(pb)++; - - /* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ - acc0 = __SMLAD(x0, c0, acc0); - - /* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */ - acc2 = __SMLAD(x2, c0, acc2); - - /* pack x[n-N-1] and x[n-N-2] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* Read state x[n-N-4], x[n-N-5] */ - x0 = _SIMD32_OFFSET(px); - - /* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */ - acc1 = __SMLADX(x1, c0, acc1); - - /* pack x[n-N-3] and x[n-N-4] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x0, x2, 0); -#else - x1 = __PKHBT(x2, x0, 0); -#endif - - /* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */ - acc3 = __SMLADX(x1, c0, acc3); - - /* Read coefficients b[N-2], b[N-3] */ - c0 = *__SIMD32(pb)++; - - /* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */ - acc0 = __SMLAD(x2, c0, acc0); - - /* Read state x[n-N-6], x[n-N-7] with offset */ - x2 = _SIMD32_OFFSET(px + 2u); - - /* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */ - acc2 = __SMLAD(x0, c0, acc2); - - /* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */ - acc1 = __SMLADX(x1, c0, acc1); - - /* pack x[n-N-5] and x[n-N-6] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */ - acc3 = __SMLADX(x1, c0, acc3); - - /* Update state pointer for next state reading */ - px += 4u; - - /* Decrement tap count */ - tapCnt--; - - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps. - ** This is always be 2 taps since the filter length is even. */ - if((numTaps & 0x3u) != 0u) - { - - /* Read last two coefficients */ - c0 = *__SIMD32(pb)++; - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc2 = __SMLAD(x2, c0, acc2); - - /* pack state variables */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* Read last state variables */ - x0 = *__SIMD32(px); - - /* Perform the multiply-accumulates */ - acc1 = __SMLADX(x1, c0, acc1); - - /* pack state variables */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x0, x2, 0); -#else - x1 = __PKHBT(x2, x0, 0); -#endif - - /* Perform the multiply-accumulates */ - acc3 = __SMLADX(x1, c0, acc3); - } - - /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation. - ** Then store the 4 outputs in the destination buffer. */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16); - - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16); - -#else - - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16); - - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16); - - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - while(blkCnt > 0u) - { - /* Copy two samples into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0; - - /* Use SIMD to hold states and coefficients */ - px = pState; - pb = pCoeffs; - - tapCnt = numTaps >> 1u; - - do - { - - acc0 += (q31_t) * px++ * *pb++; - acc0 += (q31_t) * px++ * *pb++; - - tapCnt--; - } - while(tapCnt > 0u); - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - ** Then store the output in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - /* Calculation of count for copying integer writes */ - tapCnt = (numTaps - 1u) >> 2; - - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - tapCnt--; - - } - - /* Calculation of count for remaining q15_t data */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* copy remaining data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} - -/** - * @} end of FIR group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c deleted file mode 100644 index eeccb6c8a0..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c +++ /dev/null @@ -1,309 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_fast_q31.c -* -* Description: Processing function for the Q31 Fast FIR filter. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.9 2010/08/27 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR - * @{ - */ - -/** - * @param[in] *S points to an instance of the Q31 structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block output data. - * @param[in] blockSize number of samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * - * \par - * This function is optimized for speed at the expense of fixed-point precision and overflow protection. - * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. - * These intermediate results are added to a 2.30 accumulator. - * Finally, the accumulator is saturated and converted to a 1.31 result. - * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. - * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. - * - * \par - * Refer to the function arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. - * Use the function arm_fir_init_q31() to initialize the filter structure. - */ - -void arm_fir_fast_q31( - const arm_fir_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t x0, x1, x2, x3; /* Temporary variables to hold state */ - q31_t c0; /* Temporary variable to hold coefficient value */ - q31_t *px; /* Temporary pointer for state */ - q31_t *pb; /* Temporary pointer for coefficient buffer */ - q31_t acc0, acc1, acc2, acc3; /* Accumulators */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Apply loop unrolling and compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - blkCnt = blockSize >> 2; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Copy four new input samples into the state buffer */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Read the first three samples from the state buffer: - * x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */ - x0 = *(px++); - x1 = *(px++); - x2 = *(px++); - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - i = tapCnt; - - while(i > 0u) - { - /* Read the b[numTaps] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample */ - x3 = *(px++); - - /* acc0 += b[numTaps] * x[n-numTaps] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* acc1 += b[numTaps] * x[n-numTaps-1] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* acc2 += b[numTaps] * x[n-numTaps-2] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - - /* acc3 += b[numTaps] * x[n-numTaps-3] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32); - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32); - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32); - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32); - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* Read the b[numTaps-3] coefficients */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32); - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32); - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32); - i--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - - i = numTaps - (tapCnt * 4u); - while(i > 0u) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Reuse the present sample states for next sample */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 4; - - /* The results in the 4 accumulators are in 2.30 format. Convert to 1.31 - ** Then store the 4 outputs in the destination buffer. */ - *pDst++ = (q31_t) (acc0 << 1); - *pDst++ = (q31_t) (acc1 << 1); - *pDst++ = (q31_t) (acc2 << 1); - *pDst++ = (q31_t) (acc3 << 1); - - /* Decrement the samples loop counter */ - blkCnt--; - } - - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 4u; - - while(blkCnt > 0u) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = (pCoeffs); - - i = numTaps; - - /* Perform the multiply-accumulates */ - do - { - acc0 = - (q31_t) ((((q63_t) acc0 << 32) + - ((q63_t) (*px++) * (*(pb++)))) >> 32); - i--; - } while(i > 0u); - - /* The result is in 2.30 format. Convert to 1.31 - ** Then store the output in the destination buffer. */ - *pDst++ = (q31_t) (acc0 << 1); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the samples loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - tapCnt = (numTaps - 1u) >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - -} - -/** - * @} end of FIR group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c deleted file mode 100644 index 4665ad135d..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c +++ /dev/null @@ -1,94 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_init_f32.c -* -* Description: Floating-point FIR filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR - * @{ - */ - -/** - * @details - * - * @param[in,out] *S points to an instance of the floating-point FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] *pCoeffs points to the filter coefficients buffer. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize number of samples that are processed per call. - * @return none. - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * \par - * pState points to the array of state variables. - * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32(). - */ - -void arm_fir_init_f32( - arm_fir_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - -} - -/** - * @} end of FIR group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c deleted file mode 100644 index cb113916ff..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c +++ /dev/null @@ -1,152 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_init_q15.c -* -* Description: Q15 FIR filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* ------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR - * @{ - */ - -/** - * @param[in,out] *S points to an instance of the Q15 FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4. - * @param[in] *pCoeffs points to the filter coefficients buffer. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize is number of samples processed per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if - * numTaps is not greater than or equal to 4 and even. - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * Note that numTaps must be even and greater than or equal to 4. - * To implement an odd length filter simply increase numTaps by 1 and set the last coefficient to zero. - * For example, to implement a filter with numTaps=3 and coefficients - *
    
- *     {0.3, -0.8, 0.3}    
- * 
- * set numTaps=4 and use the coefficients: - *
    
- *     {0.3, -0.8, 0.3, 0}.    
- * 
- * Similarly, to implement a two point filter - *
    
- *     {0.3, -0.3}    
- * 
- * set numTaps=4 and use the coefficients: - *
    
- *     {0.3, -0.3, 0, 0}.    
- * 
- * \par - * pState points to the array of state variables. - * pState is of length numTaps+blockSize, when running on Cortex-M4 and Cortex-M3 and is of length numTaps+blockSize-1, when running on Cortex-M0 where blockSize is the number of input samples processed by each call to arm_fir_q15(). - */ - -arm_status arm_fir_init_q15( - arm_fir_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize) -{ - arm_status status; - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* The Number of filter coefficients in the filter must be even and at least 4 */ - if(numTaps & 0x1u) - { - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear the state buffer. The size is always (blockSize + numTaps ) */ - memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - - status = ARM_MATH_SUCCESS; - } - - return (status); - -#else - - /* Run the below code for Cortex-M0 */ - - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - - status = ARM_MATH_SUCCESS; - - return (status); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of FIR group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c deleted file mode 100644 index 121db2a886..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c +++ /dev/null @@ -1,94 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_init_q31.c -* -* Description: Q31 FIR filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR - * @{ - */ - -/** - * @details - * - * @param[in,out] *S points to an instance of the Q31 FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] *pCoeffs points to the filter coefficients buffer. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize number of samples that are processed per call. - * @return none. - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * \par - * pState points to the array of state variables. - * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31(). - */ - -void arm_fir_init_q31( - arm_fir_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and state array size is (blockSize + numTaps - 1) */ - memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; - -} - -/** - * @} end of FIR group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c deleted file mode 100644 index 1ea905cb6a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_init_q7.c -* -* Description: Q7 FIR filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* ------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR - * @{ - */ -/** - * @param[in,out] *S points to an instance of the Q7 FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] *pCoeffs points to the filter coefficients buffer. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize number of samples that are processed per call. - * @return none - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * \par - * pState points to the array of state variables. - * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7(). - */ - -void arm_fir_init_q7( - arm_fir_instance_q7 * S, - uint16_t numTaps, - q7_t * pCoeffs, - q7_t * pState, - uint32_t blockSize) -{ - - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t)); - - /* Assign state pointer */ - S->pState = pState; - -} - -/** - * @} end of FIR group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c deleted file mode 100644 index 24e072cdec..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c +++ /dev/null @@ -1,574 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_interpolate_f32.c -* -* Description: FIR interpolation for floating-point sequences. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator - * - * These functions combine an upsampler (zero stuffer) and an FIR filter. - * They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images. - * Conceptually, the functions are equivalent to the block diagram below: - * \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions" - * After upsampling by a factor of L, the signal should be filtered by a lowpass filter with a normalized - * cutoff frequency of 1/L in order to eliminate high frequency copies of the spectrum. - * The user of the function is responsible for providing the filter coefficients. - * - * The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner. - * The upsampler inserts L-1 zeros between each sample. - * Instead of multiplying by these zero values, the FIR filter is designed to skip them. - * This leads to an efficient implementation without any wasted effort. - * The functions operate on blocks of input and output data. - * pSrc points to an array of blockSize input values and - * pDst points to an array of blockSize*L output values. - * - * The library provides separate functions for Q15, Q31, and floating-point data types. - * - * \par Algorithm: - * The functions use a polyphase filter structure: - *
    
- *    y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]    
- *    y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]    
- *    ...    
- *    y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]    
- * 
- * This approach is more efficient than straightforward upsample-then-filter algorithms. - * With this method the computation is reduced by a factor of 1/L when compared to using a standard FIR filter. - * \par - * pCoeffs points to a coefficient array of size numTaps. - * numTaps must be a multiple of the interpolation factor L and this is checked by the - * initialization functions. - * Internally, the function divides the FIR filter's impulse response into shorter filters of length - * phaseLength=numTaps/L. - * Coefficients are stored in time reversed order. - * \par - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * \par - * pState points to a state array of size blockSize + phaseLength - 1. - * Samples in the state buffer are stored in the order: - * \par - *
    
- *    {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
- * The state variables are updated after each block of data is processed, the coefficients are untouched. - * - * \par Instance Structure - * The coefficients and state variables for a filter are stored together in an instance data structure. - * A separate instance structure must be defined for each filter. - * Coefficient arrays may be shared among several instances while state variable array should be allocated separately. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Zeros out the values in the state buffer. - * - Checks to make sure that the length of the filter is a multiple of the interpolation factor. - * - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * The code below statically initializes each of the 3 different data type filter instance structures - *
    
- * arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};    
- * arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};    
- * arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};    
- * 
- * where L is the interpolation factor; phaseLength=numTaps/L is the - * length of each of the shorter FIR filters used internally, - * pCoeffs is the address of the coefficient buffer; - * pState is the address of the state buffer. - * Be sure to set the values in the state buffer to zeros when doing static initialization. - * - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the FIR interpolate filter functions. - * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - -/** - * @addtogroup FIR_Interpolate - * @{ - */ - -/** - * @brief Processing function for the floating-point FIR interpolator. - * @param[in] *S points to an instance of the floating-point FIR interpolator structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - * @return none. - */ -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - -void arm_fir_interpolate_f32( - const arm_fir_interpolate_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - float32_t sum0; /* Accumulators */ - float32_t x0, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t i, blkCnt, j; /* Loop counters */ - uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */ - float32_t acc0, acc1, acc2, acc3; - float32_t x1, x2, x3; - uint32_t blkCntN4; - float32_t c1, c2, c3; - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (phaseLen - 1u); - - /* Initialise blkCnt */ - blkCnt = blockSize / 4; - blkCntN4 = blockSize - (4 * blkCnt); - - /* Samples loop unrolled by 4 */ - while(blkCnt > 0u) - { - /* Copy new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1u; - - /* Loop over the Interpolation factor. */ - i = (S->L); - - while(i > 0u) - { - /* Set accumulator to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-(4*S->L) coefficients. */ - tapCnt = phaseLen >> 2u; - - x0 = *(ptr1++); - x1 = *(ptr1++); - x2 = *(ptr1++); - - while(tapCnt > 0u) - { - - /* Read the input sample */ - x3 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Read the coefficient */ - c1 = *(ptr2 + S->L); - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += x1 * c1; - acc1 += x2 * c1; - acc2 += x3 * c1; - acc3 += x0 * c1; - - /* Read the coefficient */ - c2 = *(ptr2 + S->L * 2); - - /* Read the input sample */ - x1 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += x2 * c2; - acc1 += x3 * c2; - acc2 += x0 * c2; - acc3 += x1 * c2; - - /* Read the coefficient */ - c3 = *(ptr2 + S->L * 3); - - /* Read the input sample */ - x2 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += x3 * c3; - acc1 += x0 * c3; - acc2 += x1 * c3; - acc3 += x2 * c3; - - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += 4 * S->L; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = phaseLen % 0x4u; - - while(tapCnt > 0u) - { - - /* Read the input sample */ - x3 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* update states for next sample processing */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst = acc0; - *(pDst + S->L) = acc1; - *(pDst + 2 * S->L) = acc2; - *(pDst + 3 * S->L) = acc3; - - pDst++; - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 4; - - pDst += S->L * 3; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - - while(blkCntN4 > 0u) - { - /* Copy new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1u; - - /* Loop over the Interpolation factor. */ - i = S->L; - while(i > 0u) - { - /* Set accumulator to zero */ - sum0 = 0.0f; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-(4*S->L) coefficients. */ - tapCnt = phaseLen >> 2u; - while(tapCnt > 0u) - { - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = phaseLen % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - sum0 += *(ptr1++) * (*ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = sum0; - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCntN4--; - } - - /* Processing is complete. - ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - tapCnt = (phaseLen - 1u) >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (phaseLen - 1u) % 0x04u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } -} - -#else - - /* Run the below code for Cortex-M0 */ - -void arm_fir_interpolate_f32( - const arm_fir_interpolate_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - - - float32_t sum; /* Accumulator */ - uint32_t i, blkCnt; /* Loop counters */ - uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */ - - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (phaseLen - 1u); - - /* Total number of intput samples */ - blkCnt = blockSize; - - /* Loop over the blockSize. */ - while(blkCnt > 0u) - { - /* Copy new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Loop over the Interpolation factor. */ - i = S->L; - - while(i > 0u) - { - /* Set accumulator to zero */ - sum = 0.0f; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (i - 1u); - - /* Loop over the polyPhase length */ - tapCnt = phaseLen; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - sum += *ptr1++ * *ptr2; - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = sum; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last phaseLen - 1 samples to the start of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - tapCnt = phaseLen - 1u; - - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} - -#endif /* #ifndef ARM_MATH_CM0 */ - - - - /** - * @} end of FIR_Interpolate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c deleted file mode 100644 index 097c883b6c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c +++ /dev/null @@ -1,116 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_interpolate_init_f32.c -* -* Description: Floating-point FIR interpolator initialization function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Interpolate - * @{ - */ - -/** - * @brief Initialization function for the floating-point FIR interpolator. - * @param[in,out] *S points to an instance of the floating-point FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] *pCoeffs points to the filter coefficient buffer. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
- * The length of the filter numTaps must be a multiple of the interpolation factor L. - * \par - * pState points to the array of state variables. - * pState is of length (numTaps/L)+blockSize-1 words - * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_f32(). - */ - -arm_status arm_fir_interpolate_init_f32( - arm_fir_interpolate_instance_f32 * S, - uint8_t L, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize) -{ - arm_status status; - - /* The filter length must be a multiple of the interpolation factor */ - if((numTaps % L) != 0u) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign Interpolation factor */ - S->L = L; - - /* Assign polyPhaseLength */ - S->phaseLength = numTaps / L; - - /* Clear state buffer and size of state array is always phaseLength + blockSize - 1 */ - memset(pState, 0, - (blockSize + - ((uint32_t) S->phaseLength - 1u)) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - - status = ARM_MATH_SUCCESS; - } - - return (status); - -} - - /** - * @} end of FIR_Interpolate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c deleted file mode 100644 index d147d10b3a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c +++ /dev/null @@ -1,115 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_interpolate_init_q15.c -* -* Description: Q15 FIR interpolator initialization function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Interpolate - * @{ - */ - -/** - * @brief Initialization function for the Q15 FIR interpolator. - * @param[in,out] *S points to an instance of the Q15 FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] *pCoeffs points to the filter coefficient buffer. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
- * The length of the filter numTaps must be a multiple of the interpolation factor L. - * \par - * pState points to the array of state variables. - * pState is of length (numTaps/L)+blockSize-1 words - * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q15(). - */ - -arm_status arm_fir_interpolate_init_q15( - arm_fir_interpolate_instance_q15 * S, - uint8_t L, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize) -{ - arm_status status; - - /* The filter length must be a multiple of the interpolation factor */ - if((numTaps % L) != 0u) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign Interpolation factor */ - S->L = L; - - /* Assign polyPhaseLength */ - S->phaseLength = numTaps / L; - - /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */ - memset(pState, 0, - (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - - status = ARM_MATH_SUCCESS; - } - - return (status); - -} - - /** - * @} end of FIR_Interpolate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c deleted file mode 100644 index 21e25dd542..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c +++ /dev/null @@ -1,116 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_interpolate_init_q31.c -* -* Description: Q31 FIR interpolator initialization function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Interpolate - * @{ - */ - - -/** - * @brief Initialization function for the Q31 FIR interpolator. - * @param[in,out] *S points to an instance of the Q31 FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] *pCoeffs points to the filter coefficient buffer. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
- * The length of the filter numTaps must be a multiple of the interpolation factor L. - * \par - * pState points to the array of state variables. - * pState is of length (numTaps/L)+blockSize-1 words - * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q31(). - */ - -arm_status arm_fir_interpolate_init_q31( - arm_fir_interpolate_instance_q31 * S, - uint8_t L, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize) -{ - arm_status status; - - /* The filter length must be a multiple of the interpolation factor */ - if((numTaps % L) != 0u) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign Interpolation factor */ - S->L = L; - - /* Assign polyPhaseLength */ - S->phaseLength = numTaps / L; - - /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */ - memset(pState, 0, - (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; - - status = ARM_MATH_SUCCESS; - } - - return (status); - -} - - /** - * @} end of FIR_Interpolate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c deleted file mode 100644 index 3f11c47ae4..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c +++ /dev/null @@ -1,503 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_interpolate_q15.c -* -* Description: Q15 FIR interpolation. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Interpolate - * @{ - */ - -/** - * @brief Processing function for the Q15 FIR interpolator. - * @param[in] *S points to an instance of the Q15 FIR interpolator structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using a 64-bit internal accumulator. - * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - * Lastly, the accumulator is saturated to yield a result in 1.15 format. - */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - -void arm_fir_interpolate_q15( - const arm_fir_interpolate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - q63_t sum0; /* Accumulators */ - q15_t x0, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t i, blkCnt, j, tapCnt; /* Loop counters */ - uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - uint32_t blkCntN2; - q63_t acc0, acc1; - q15_t x1; - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + ((q31_t) phaseLen - 1); - - /* Initialise blkCnt */ - blkCnt = blockSize / 2; - blkCntN2 = blockSize - (2 * blkCnt); - - /* Samples loop unrolled by 2 */ - while(blkCnt > 0u) - { - /* Copy new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1u; - - /* Loop over the Interpolation factor. */ - i = (S->L); - - while(i > 0u) - { - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-(4*S->L) coefficients. */ - tapCnt = phaseLen >> 2u; - - x0 = *(ptr1++); - - while(tapCnt > 0u) - { - - /* Read the input sample */ - x1 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 *c0; - acc1 += (q63_t) x1 *c0; - - - /* Read the coefficient */ - c0 = *(ptr2 + S->L); - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x1 *c0; - acc1 += (q63_t) x0 *c0; - - - /* Read the coefficient */ - c0 = *(ptr2 + S->L * 2); - - /* Read the input sample */ - x1 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 *c0; - acc1 += (q63_t) x1 *c0; - - /* Read the coefficient */ - c0 = *(ptr2 + S->L * 3); - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x1 *c0; - acc1 += (q63_t) x0 *c0; - - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += 4 * S->L; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = phaseLen % 0x4u; - - while(tapCnt > 0u) - { - - /* Read the input sample */ - x1 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 *c0; - acc1 += (q63_t) x1 *c0; - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* update states for next sample processing */ - x0 = x1; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst = (q15_t) (__SSAT((acc0 >> 15), 16)); - *(pDst + S->L) = (q15_t) (__SSAT((acc1 >> 15), 16)); - - pDst++; - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 2; - - pDst += S->L; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 2, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blkCntN2; - - /* Loop over the blockSize. */ - while(blkCnt > 0u) - { - /* Copy new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1u; - - /* Loop over the Interpolation factor. */ - i = S->L; - while(i > 0u) - { - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-(4*S->L) coefficients. */ - tapCnt = phaseLen >> 2; - while(tapCnt > 0u) - { - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = phaseLen & 0x3u; - - while(tapCnt > 0u) - { - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - j++; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - - /* Processing is complete. - ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = ((uint32_t) phaseLen - 1u) >> 2u; - - /* copy data */ - while(i > 0u) - { -#ifndef UNALIGNED_SUPPORT_DISABLE - - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - -#else - - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Decrement the loop counter */ - i--; - } - - i = ((uint32_t) phaseLen - 1u) % 0x04u; - - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } -} - -#else - - /* Run the below code for Cortex-M0 */ - -void arm_fir_interpolate_q15( - const arm_fir_interpolate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - q63_t sum; /* Accumulator */ - q15_t x0, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t i, blkCnt, tapCnt; /* Loop counters */ - uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (phaseLen - 1u); - - /* Total number of intput samples */ - blkCnt = blockSize; - - /* Loop over the blockSize. */ - while(blkCnt > 0u) - { - /* Copy new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Loop over the Interpolation factor. */ - i = S->L; - - while(i > 0u) - { - /* Set accumulator to zero */ - sum = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (i - 1u); - - /* Loop over the polyPhase length */ - tapCnt = (uint32_t) phaseLen; - - while(tapCnt > 0u) - { - /* Read the coefficient */ - c0 = *ptr2; - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *ptr1++; - - /* Perform the multiply-accumulate */ - sum += ((q31_t) x0 * c0); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Store the result after converting to 1.15 format in the destination buffer */ - *pDst++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last phaseLen - 1 samples to the start of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = (uint32_t) phaseLen - 1u; - - while(i > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } - -} - -#endif /* #ifndef ARM_MATH_CM0 */ - - - /** - * @} end of FIR_Interpolate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c deleted file mode 100644 index 05e64e1465..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c +++ /dev/null @@ -1,499 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_interpolate_q31.c -* -* Description: Q31 FIR interpolation. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Interpolate - * @{ - */ - -/** - * @brief Processing function for the Q31 FIR interpolator. - * @param[in] *S points to an instance of the Q31 FIR interpolator structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around rather than clip. - * In order to avoid overflows completely the input signal must be scaled down by 1/(numTaps/L). - * since numTaps/L additions occur per output sample. - * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. - */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - -void arm_fir_interpolate_q31( - const arm_fir_interpolate_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - q63_t sum0; /* Accumulators */ - q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t i, blkCnt, j; /* Loop counters */ - uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */ - - uint32_t blkCntN2; - q63_t acc0, acc1; - q31_t x1; - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + ((q31_t) phaseLen - 1); - - /* Initialise blkCnt */ - blkCnt = blockSize / 2; - blkCntN2 = blockSize - (2 * blkCnt); - - /* Samples loop unrolled by 2 */ - while(blkCnt > 0u) - { - /* Copy new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1u; - - /* Loop over the Interpolation factor. */ - i = (S->L); - - while(i > 0u) - { - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-(4*S->L) coefficients. */ - tapCnt = phaseLen >> 2u; - - x0 = *(ptr1++); - - while(tapCnt > 0u) - { - - /* Read the input sample */ - x1 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 *c0; - acc1 += (q63_t) x1 *c0; - - - /* Read the coefficient */ - c0 = *(ptr2 + S->L); - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x1 *c0; - acc1 += (q63_t) x0 *c0; - - - /* Read the coefficient */ - c0 = *(ptr2 + S->L * 2); - - /* Read the input sample */ - x1 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 *c0; - acc1 += (q63_t) x1 *c0; - - /* Read the coefficient */ - c0 = *(ptr2 + S->L * 3); - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x1 *c0; - acc1 += (q63_t) x0 *c0; - - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += 4 * S->L; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = phaseLen % 0x4u; - - while(tapCnt > 0u) - { - - /* Read the input sample */ - x1 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 *c0; - acc1 += (q63_t) x1 *c0; - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* update states for next sample processing */ - x0 = x1; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst = (q31_t) (acc0 >> 31); - *(pDst + S->L) = (q31_t) (acc1 >> 31); - - - pDst++; - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 2; - - pDst += S->L; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 2, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blkCntN2; - - /* Loop over the blockSize. */ - while(blkCnt > 0u) - { - /* Copy new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1u; - - /* Loop over the Interpolation factor. */ - i = S->L; - while(i > 0u) - { - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-(4*S->L) coefficients. */ - tapCnt = phaseLen >> 2; - while(tapCnt > 0u) - { - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = phaseLen & 0x3u; - - while(tapCnt > 0u) - { - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - sum0 += (q63_t) x0 *c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (sum0 >> 31); - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - tapCnt = (phaseLen - 1u) >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (phaseLen - 1u) % 0x04u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} - - -#else - -void arm_fir_interpolate_q31( - const arm_fir_interpolate_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - - /* Run the below code for Cortex-M0 */ - - q63_t sum; /* Accumulator */ - q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t i, blkCnt; /* Loop counters */ - uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */ - - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + ((q31_t) phaseLen - 1); - - /* Total number of intput samples */ - blkCnt = blockSize; - - /* Loop over the blockSize. */ - while(blkCnt > 0u) - { - /* Copy new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Loop over the Interpolation factor. */ - i = S->L; - - while(i > 0u) - { - /* Set accumulator to zero */ - sum = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (i - 1u); - - tapCnt = phaseLen; - - while(tapCnt > 0u) - { - /* Read the coefficient */ - c0 = *(ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0 = *ptr1++; - - /* Perform the multiply-accumulate */ - sum += (q63_t) x0 *c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (sum >> 31); - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - tapCnt = phaseLen - 1u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} - -#endif /* #ifndef ARM_MATH_CM0 */ - - /** - * @} end of FIR_Interpolate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c deleted file mode 100644 index 3b5fc9408f..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c +++ /dev/null @@ -1,499 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_lattice_f32.c -* -* Description: Processing function for the floating-point FIR Lattice filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters - * - * This set of functions implements Finite Impulse Response (FIR) lattice filters - * for Q15, Q31 and floating-point data types. Lattice filters are used in a - * variety of adaptive filter applications. The filter structure is feedforward and - * the net impulse response is finite length. - * The functions operate on blocks - * of input and output data and each call to the function processes - * blockSize samples through the filter. pSrc and - * pDst point to input and output arrays containing blockSize values. - * - * \par Algorithm: - * \image html FIRLattice.gif "Finite Impulse Response Lattice filter" - * The following difference equation is implemented: - *
    
- *    f0[n] = g0[n] = x[n]    
- *    fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M    
- *    gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M    
- *    y[n] = fM[n]    
- * 
- * \par - * pCoeffs points to tha array of reflection coefficients of size numStages. - * Reflection Coefficients are stored in the following order. - * \par - *
    
- *    {k1, k2, ..., kM}    
- * 
- * where M is number of stages - * \par - * pState points to a state array of size numStages. - * The state variables (g values) hold previous inputs and are stored in the following order. - *
    
- *    {g0[n], g1[n], g2[n] ...gM-1[n]}    
- * 
- * The state variables are updated after each block of data is processed; the coefficients are untouched. - * \par Instance Structure - * The coefficients and state variables for a filter are stored together in an instance data structure. - * A separate instance structure must be defined for each filter. - * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Zeros out the values in the state buffer. - * - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows: - *
    
- *arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};    
- *arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};    
- *arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};    
- * 
- * \par - * where numStages is the number of stages in the filter; pState is the address of the state buffer; - * pCoeffs is the address of the coefficient buffer. - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the FIR Lattice filter functions. - * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - -/** - * @addtogroup FIR_Lattice - * @{ - */ - - - /** - * @brief Processing function for the floating-point FIR lattice filter. - * @param[in] *S points to an instance of the floating-point FIR lattice structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of samples to process. - * @return none. - */ - -void arm_fir_lattice_f32( - const arm_fir_lattice_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *px; /* temporary state pointer */ - float32_t *pk; /* temporary coefficient pointer */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - float32_t fcurr1, fnext1, gcurr1, gnext1; /* temporary variables for first sample in loop unrolling */ - float32_t fcurr2, fnext2, gnext2; /* temporary variables for second sample in loop unrolling */ - float32_t fcurr3, fnext3, gnext3; /* temporary variables for third sample in loop unrolling */ - float32_t fcurr4, fnext4, gnext4; /* temporary variables for fourth sample in loop unrolling */ - uint32_t numStages = S->numStages; /* Number of stages in the filter */ - uint32_t blkCnt, stageCnt; /* temporary variables for counts */ - - gcurr1 = 0.0f; - pState = &S->pState[0]; - - blkCnt = blockSize >> 2; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - - /* Read two samples from input buffer */ - /* f0(n) = x(n) */ - fcurr1 = *pSrc++; - fcurr2 = *pSrc++; - - /* Initialize coeff pointer */ - pk = (pCoeffs); - - /* Initialize state pointer */ - px = pState; - - /* Read g0(n-1) from state */ - gcurr1 = *px; - - /* Process first sample for first tap */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext1 = fcurr1 + ((*pk) * gcurr1); - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext1 = (fcurr1 * (*pk)) + gcurr1; - - /* Process second sample for first tap */ - /* for sample 2 processing */ - fnext2 = fcurr2 + ((*pk) * fcurr1); - gnext2 = (fcurr2 * (*pk)) + fcurr1; - - /* Read next two samples from input buffer */ - /* f0(n+2) = x(n+2) */ - fcurr3 = *pSrc++; - fcurr4 = *pSrc++; - - /* Copy only last input samples into the state buffer - which will be used for next four samples processing */ - *px++ = fcurr4; - - /* Process third sample for first tap */ - fnext3 = fcurr3 + ((*pk) * fcurr2); - gnext3 = (fcurr3 * (*pk)) + fcurr2; - - /* Process fourth sample for first tap */ - fnext4 = fcurr4 + ((*pk) * fcurr3); - gnext4 = (fcurr4 * (*pk++)) + fcurr3; - - /* Update of f values for next coefficient set processing */ - fcurr1 = fnext1; - fcurr2 = fnext2; - fcurr3 = fnext3; - fcurr4 = fnext4; - - /* Loop unrolling. Process 4 taps at a time . */ - stageCnt = (numStages - 1u) >> 2u; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numStages-3 coefficients. */ - - /* Process 2nd, 3rd, 4th and 5th taps ... here */ - while(stageCnt > 0u) - { - /* Read g1(n-1), g3(n-1) .... from state */ - gcurr1 = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext4; - - /* Process first sample for 2nd, 6th .. tap */ - /* Sample processing for K2, K6.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext1 = fcurr1 + ((*pk) * gcurr1); - /* Process second sample for 2nd, 6th .. tap */ - /* for sample 2 processing */ - fnext2 = fcurr2 + ((*pk) * gnext1); - /* Process third sample for 2nd, 6th .. tap */ - fnext3 = fcurr3 + ((*pk) * gnext2); - /* Process fourth sample for 2nd, 6th .. tap */ - fnext4 = fcurr4 + ((*pk) * gnext3); - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - /* Calculation of state values for next stage */ - gnext4 = (fcurr4 * (*pk)) + gnext3; - gnext3 = (fcurr3 * (*pk)) + gnext2; - gnext2 = (fcurr2 * (*pk)) + gnext1; - gnext1 = (fcurr1 * (*pk++)) + gcurr1; - - - /* Read g2(n-1), g4(n-1) .... from state */ - gcurr1 = *px; - - /* save g2(n) in state buffer */ - *px++ = gnext4; - - /* Sample processing for K3, K7.... */ - /* Process first sample for 3rd, 7th .. tap */ - /* f3(n) = f2(n) + K3 * g2(n-1) */ - fcurr1 = fnext1 + ((*pk) * gcurr1); - /* Process second sample for 3rd, 7th .. tap */ - fcurr2 = fnext2 + ((*pk) * gnext1); - /* Process third sample for 3rd, 7th .. tap */ - fcurr3 = fnext3 + ((*pk) * gnext2); - /* Process fourth sample for 3rd, 7th .. tap */ - fcurr4 = fnext4 + ((*pk) * gnext3); - - /* Calculation of state values for next stage */ - /* g3(n) = f2(n) * K3 + g2(n-1) */ - gnext4 = (fnext4 * (*pk)) + gnext3; - gnext3 = (fnext3 * (*pk)) + gnext2; - gnext2 = (fnext2 * (*pk)) + gnext1; - gnext1 = (fnext1 * (*pk++)) + gcurr1; - - - /* Read g1(n-1), g3(n-1) .... from state */ - gcurr1 = *px; - - /* save g3(n) in state buffer */ - *px++ = gnext4; - - /* Sample processing for K4, K8.... */ - /* Process first sample for 4th, 8th .. tap */ - /* f4(n) = f3(n) + K4 * g3(n-1) */ - fnext1 = fcurr1 + ((*pk) * gcurr1); - /* Process second sample for 4th, 8th .. tap */ - /* for sample 2 processing */ - fnext2 = fcurr2 + ((*pk) * gnext1); - /* Process third sample for 4th, 8th .. tap */ - fnext3 = fcurr3 + ((*pk) * gnext2); - /* Process fourth sample for 4th, 8th .. tap */ - fnext4 = fcurr4 + ((*pk) * gnext3); - - /* g4(n) = f3(n) * K4 + g3(n-1) */ - /* Calculation of state values for next stage */ - gnext4 = (fcurr4 * (*pk)) + gnext3; - gnext3 = (fcurr3 * (*pk)) + gnext2; - gnext2 = (fcurr2 * (*pk)) + gnext1; - gnext1 = (fcurr1 * (*pk++)) + gcurr1; - - /* Read g2(n-1), g4(n-1) .... from state */ - gcurr1 = *px; - - /* save g4(n) in state buffer */ - *px++ = gnext4; - - /* Sample processing for K5, K9.... */ - /* Process first sample for 5th, 9th .. tap */ - /* f5(n) = f4(n) + K5 * g4(n-1) */ - fcurr1 = fnext1 + ((*pk) * gcurr1); - /* Process second sample for 5th, 9th .. tap */ - fcurr2 = fnext2 + ((*pk) * gnext1); - /* Process third sample for 5th, 9th .. tap */ - fcurr3 = fnext3 + ((*pk) * gnext2); - /* Process fourth sample for 5th, 9th .. tap */ - fcurr4 = fnext4 + ((*pk) * gnext3); - - /* Calculation of state values for next stage */ - /* g5(n) = f4(n) * K5 + g4(n-1) */ - gnext4 = (fnext4 * (*pk)) + gnext3; - gnext3 = (fnext3 * (*pk)) + gnext2; - gnext2 = (fnext2 * (*pk)) + gnext1; - gnext1 = (fnext1 * (*pk++)) + gcurr1; - - stageCnt--; - } - - /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */ - stageCnt = (numStages - 1u) % 0x4u; - - while(stageCnt > 0u) - { - gcurr1 = *px; - - /* save g value in state buffer */ - *px++ = gnext4; - - /* Process four samples for last three taps here */ - fnext1 = fcurr1 + ((*pk) * gcurr1); - fnext2 = fcurr2 + ((*pk) * gnext1); - fnext3 = fcurr3 + ((*pk) * gnext2); - fnext4 = fcurr4 + ((*pk) * gnext3); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext4 = (fcurr4 * (*pk)) + gnext3; - gnext3 = (fcurr3 * (*pk)) + gnext2; - gnext2 = (fcurr2 * (*pk)) + gnext1; - gnext1 = (fcurr1 * (*pk++)) + gcurr1; - - /* Update of f values for next coefficient set processing */ - fcurr1 = fnext1; - fcurr2 = fnext2; - fcurr3 = fnext3; - fcurr4 = fnext4; - - stageCnt--; - - } - - /* The results in the 4 accumulators, store in the destination buffer. */ - /* y(n) = fN(n) */ - *pDst++ = fcurr1; - *pDst++ = fcurr2; - *pDst++ = fcurr3; - *pDst++ = fcurr4; - - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* f0(n) = x(n) */ - fcurr1 = *pSrc++; - - /* Initialize coeff pointer */ - pk = (pCoeffs); - - /* Initialize state pointer */ - px = pState; - - /* read g2(n) from state buffer */ - gcurr1 = *px; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext1 = fcurr1 + ((*pk) * gcurr1); - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext1 = (fcurr1 * (*pk++)) + gcurr1; - - /* save g1(n) in state buffer */ - *px++ = fcurr1; - - /* f1(n) is saved in fcurr1 - for next stage processing */ - fcurr1 = fnext1; - - stageCnt = (numStages - 1u); - - /* stage loop */ - while(stageCnt > 0u) - { - /* read g2(n) from state buffer */ - gcurr1 = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext1; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext1 = fcurr1 + ((*pk) * gcurr1); - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext1 = (fcurr1 * (*pk++)) + gcurr1; - - /* f1(n) is saved in fcurr1 - for next stage processing */ - fcurr1 = fnext1; - - stageCnt--; - - } - - /* y(n) = fN(n) */ - *pDst++ = fcurr1; - - blkCnt--; - - } - -#else - - /* Run the below code for Cortex-M0 */ - - float32_t fcurr, fnext, gcurr, gnext; /* temporary variables */ - uint32_t numStages = S->numStages; /* Length of the filter */ - uint32_t blkCnt, stageCnt; /* temporary variables for counts */ - - pState = &S->pState[0]; - - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* f0(n) = x(n) */ - fcurr = *pSrc++; - - /* Initialize coeff pointer */ - pk = pCoeffs; - - /* Initialize state pointer */ - px = pState; - - /* read g0(n-1) from state buffer */ - gcurr = *px; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext = fcurr + ((*pk) * gcurr); - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext = (fcurr * (*pk++)) + gcurr; - - /* save f0(n) in state buffer */ - *px++ = fcurr; - - /* f1(n) is saved in fcurr - for next stage processing */ - fcurr = fnext; - - stageCnt = (numStages - 1u); - - /* stage loop */ - while(stageCnt > 0u) - { - /* read g2(n) from state buffer */ - gcurr = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext = fcurr + ((*pk) * gcurr); - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext = (fcurr * (*pk++)) + gcurr; - - /* f1(n) is saved in fcurr1 - for next stage processing */ - fcurr = fnext; - - stageCnt--; - - } - - /* y(n) = fN(n) */ - *pDst++ = fcurr; - - blkCnt--; - - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of FIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c deleted file mode 100644 index 13f3bab16b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c +++ /dev/null @@ -1,78 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_lattice_init_f32.c -* -* Description: Floating-point FIR Lattice filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Lattice - * @{ - */ - -/** - * @brief Initialization function for the floating-point FIR lattice filter. - * @param[in] *S points to an instance of the floating-point FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] *pState points to the state buffer. The array is of length numStages. - * @return none. - */ - -void arm_fir_lattice_init_f32( - arm_fir_lattice_instance_f32 * S, - uint16_t numStages, - float32_t * pCoeffs, - float32_t * pState) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always numStages */ - memset(pState, 0, (numStages) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - -} - -/** - * @} end of FIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c deleted file mode 100644 index 8bdc71a7c8..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c +++ /dev/null @@ -1,78 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_lattice_init_q15.c -* -* Description: Q15 FIR Lattice filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Lattice - * @{ - */ - - /** - * @brief Initialization function for the Q15 FIR lattice filter. - * @param[in] *S points to an instance of the Q15 FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] *pState points to the state buffer. The array is of length numStages. - * @return none. - */ - -void arm_fir_lattice_init_q15( - arm_fir_lattice_instance_q15 * S, - uint16_t numStages, - q15_t * pCoeffs, - q15_t * pState) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always numStages */ - memset(pState, 0, (numStages) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - -} - -/** - * @} end of FIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c deleted file mode 100644 index b79d3844f2..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c +++ /dev/null @@ -1,78 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_lattice_init_q31.c -* -* Description: Q31 FIR lattice filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Lattice - * @{ - */ - - /** - * @brief Initialization function for the Q31 FIR lattice filter. - * @param[in] *S points to an instance of the Q31 FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] *pState points to the state buffer. The array is of length numStages. - * @return none. - */ - -void arm_fir_lattice_init_q31( - arm_fir_lattice_instance_q31 * S, - uint16_t numStages, - q31_t * pCoeffs, - q31_t * pState) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always numStages */ - memset(pState, 0, (numStages) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; - -} - -/** - * @} end of FIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c deleted file mode 100644 index 655b9b5fb8..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c +++ /dev/null @@ -1,531 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_lattice_q15.c -* -* Description: Q15 FIR lattice filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Lattice - * @{ - */ - - -/** - * @brief Processing function for the Q15 FIR lattice filter. - * @param[in] *S points to an instance of the Q15 FIR lattice structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of samples to process. - * @return none. - */ - -void arm_fir_lattice_q15( - const arm_fir_lattice_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *px; /* temporary state pointer */ - q15_t *pk; /* temporary coefficient pointer */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t fcurnt1, fnext1, gcurnt1 = 0, gnext1; /* temporary variables for first sample in loop unrolling */ - q31_t fcurnt2, fnext2, gnext2; /* temporary variables for second sample in loop unrolling */ - q31_t fcurnt3, fnext3, gnext3; /* temporary variables for third sample in loop unrolling */ - q31_t fcurnt4, fnext4, gnext4; /* temporary variables for fourth sample in loop unrolling */ - uint32_t numStages = S->numStages; /* Number of stages in the filter */ - uint32_t blkCnt, stageCnt; /* temporary variables for counts */ - - pState = &S->pState[0]; - - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - - /* Read two samples from input buffer */ - /* f0(n) = x(n) */ - fcurnt1 = *pSrc++; - fcurnt2 = *pSrc++; - - /* Initialize coeff pointer */ - pk = (pCoeffs); - - /* Initialize state pointer */ - px = pState; - - /* Read g0(n-1) from state */ - gcurnt1 = *px; - - /* Process first sample for first tap */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1; - fnext1 = __SSAT(fnext1, 16); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext1 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + gcurnt1; - gnext1 = __SSAT(gnext1, 16); - - /* Process second sample for first tap */ - /* for sample 2 processing */ - fnext2 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + fcurnt2; - fnext2 = __SSAT(fnext2, 16); - - gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt1; - gnext2 = __SSAT(gnext2, 16); - - - /* Read next two samples from input buffer */ - /* f0(n+2) = x(n+2) */ - fcurnt3 = *pSrc++; - fcurnt4 = *pSrc++; - - /* Copy only last input samples into the state buffer - which is used for next four samples processing */ - *px++ = (q15_t) fcurnt4; - - /* Process third sample for first tap */ - fnext3 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt3; - fnext3 = __SSAT(fnext3, 16); - gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt2; - gnext3 = __SSAT(gnext3, 16); - - /* Process fourth sample for first tap */ - fnext4 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt4; - fnext4 = __SSAT(fnext4, 16); - gnext4 = (q31_t) ((fcurnt4 * (*pk++)) >> 15u) + fcurnt3; - gnext4 = __SSAT(gnext4, 16); - - /* Update of f values for next coefficient set processing */ - fcurnt1 = fnext1; - fcurnt2 = fnext2; - fcurnt3 = fnext3; - fcurnt4 = fnext4; - - - /* Loop unrolling. Process 4 taps at a time . */ - stageCnt = (numStages - 1u) >> 2; - - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numStages-3 coefficients. */ - - /* Process 2nd, 3rd, 4th and 5th taps ... here */ - while(stageCnt > 0u) - { - /* Read g1(n-1), g3(n-1) .... from state */ - gcurnt1 = *px; - - /* save g1(n) in state buffer */ - *px++ = (q15_t) gnext4; - - /* Process first sample for 2nd, 6th .. tap */ - /* Sample processing for K2, K6.... */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1; - fnext1 = __SSAT(fnext1, 16); - - - /* Process second sample for 2nd, 6th .. tap */ - /* for sample 2 processing */ - fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2; - fnext2 = __SSAT(fnext2, 16); - /* Process third sample for 2nd, 6th .. tap */ - fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3; - fnext3 = __SSAT(fnext3, 16); - /* Process fourth sample for 2nd, 6th .. tap */ - /* fnext4 = fcurnt4 + (*pk) * gnext3; */ - fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4; - fnext4 = __SSAT(fnext4, 16); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - /* Calculation of state values for next stage */ - gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3; - gnext4 = __SSAT(gnext4, 16); - gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2; - gnext3 = __SSAT(gnext3, 16); - - gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1; - gnext2 = __SSAT(gnext2, 16); - - gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1; - gnext1 = __SSAT(gnext1, 16); - - - /* Read g2(n-1), g4(n-1) .... from state */ - gcurnt1 = *px; - - /* save g1(n) in state buffer */ - *px++ = (q15_t) gnext4; - - /* Sample processing for K3, K7.... */ - /* Process first sample for 3rd, 7th .. tap */ - /* f3(n) = f2(n) + K3 * g2(n-1) */ - fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1; - fcurnt1 = __SSAT(fcurnt1, 16); - - /* Process second sample for 3rd, 7th .. tap */ - fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2; - fcurnt2 = __SSAT(fcurnt2, 16); - - /* Process third sample for 3rd, 7th .. tap */ - fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3; - fcurnt3 = __SSAT(fcurnt3, 16); - - /* Process fourth sample for 3rd, 7th .. tap */ - fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4; - fcurnt4 = __SSAT(fcurnt4, 16); - - /* Calculation of state values for next stage */ - /* g3(n) = f2(n) * K3 + g2(n-1) */ - gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3; - gnext4 = __SSAT(gnext4, 16); - - gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2; - gnext3 = __SSAT(gnext3, 16); - - gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1; - gnext2 = __SSAT(gnext2, 16); - - gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1; - gnext1 = __SSAT(gnext1, 16); - - /* Read g1(n-1), g3(n-1) .... from state */ - gcurnt1 = *px; - - /* save g1(n) in state buffer */ - *px++ = (q15_t) gnext4; - - /* Sample processing for K4, K8.... */ - /* Process first sample for 4th, 8th .. tap */ - /* f4(n) = f3(n) + K4 * g3(n-1) */ - fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1; - fnext1 = __SSAT(fnext1, 16); - - /* Process second sample for 4th, 8th .. tap */ - /* for sample 2 processing */ - fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2; - fnext2 = __SSAT(fnext2, 16); - - /* Process third sample for 4th, 8th .. tap */ - fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3; - fnext3 = __SSAT(fnext3, 16); - - /* Process fourth sample for 4th, 8th .. tap */ - fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4; - fnext4 = __SSAT(fnext4, 16); - - /* g4(n) = f3(n) * K4 + g3(n-1) */ - /* Calculation of state values for next stage */ - gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3; - gnext4 = __SSAT(gnext4, 16); - - gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2; - gnext3 = __SSAT(gnext3, 16); - - gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1; - gnext2 = __SSAT(gnext2, 16); - gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1; - gnext1 = __SSAT(gnext1, 16); - - - /* Read g2(n-1), g4(n-1) .... from state */ - gcurnt1 = *px; - - /* save g4(n) in state buffer */ - *px++ = (q15_t) gnext4; - - /* Sample processing for K5, K9.... */ - /* Process first sample for 5th, 9th .. tap */ - /* f5(n) = f4(n) + K5 * g4(n-1) */ - fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1; - fcurnt1 = __SSAT(fcurnt1, 16); - - /* Process second sample for 5th, 9th .. tap */ - fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2; - fcurnt2 = __SSAT(fcurnt2, 16); - - /* Process third sample for 5th, 9th .. tap */ - fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3; - fcurnt3 = __SSAT(fcurnt3, 16); - - /* Process fourth sample for 5th, 9th .. tap */ - fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4; - fcurnt4 = __SSAT(fcurnt4, 16); - - /* Calculation of state values for next stage */ - /* g5(n) = f4(n) * K5 + g4(n-1) */ - gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3; - gnext4 = __SSAT(gnext4, 16); - gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2; - gnext3 = __SSAT(gnext3, 16); - gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1; - gnext2 = __SSAT(gnext2, 16); - gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1; - gnext1 = __SSAT(gnext1, 16); - - stageCnt--; - } - - /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */ - stageCnt = (numStages - 1u) % 0x4u; - - while(stageCnt > 0u) - { - gcurnt1 = *px; - - /* save g value in state buffer */ - *px++ = (q15_t) gnext4; - - /* Process four samples for last three taps here */ - fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1; - fnext1 = __SSAT(fnext1, 16); - fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2; - fnext2 = __SSAT(fnext2, 16); - - fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3; - fnext3 = __SSAT(fnext3, 16); - - fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4; - fnext4 = __SSAT(fnext4, 16); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3; - gnext4 = __SSAT(gnext4, 16); - gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2; - gnext3 = __SSAT(gnext3, 16); - gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1; - gnext2 = __SSAT(gnext2, 16); - gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1; - gnext1 = __SSAT(gnext1, 16); - - /* Update of f values for next coefficient set processing */ - fcurnt1 = fnext1; - fcurnt2 = fnext2; - fcurnt3 = fnext3; - fcurnt4 = fnext4; - - stageCnt--; - - } - - /* The results in the 4 accumulators, store in the destination buffer. */ - /* y(n) = fN(n) */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT(fcurnt1, fcurnt2, 16); - *__SIMD32(pDst)++ = __PKHBT(fcurnt3, fcurnt4, 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT(fcurnt2, fcurnt1, 16); - *__SIMD32(pDst)++ = __PKHBT(fcurnt4, fcurnt3, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* f0(n) = x(n) */ - fcurnt1 = *pSrc++; - - /* Initialize coeff pointer */ - pk = (pCoeffs); - - /* Initialize state pointer */ - px = pState; - - /* read g2(n) from state buffer */ - gcurnt1 = *px; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1; - fnext1 = __SSAT(fnext1, 16); - - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1; - gnext1 = __SSAT(gnext1, 16); - - /* save g1(n) in state buffer */ - *px++ = (q15_t) fcurnt1; - - /* f1(n) is saved in fcurnt1 - for next stage processing */ - fcurnt1 = fnext1; - - stageCnt = (numStages - 1u); - - /* stage loop */ - while(stageCnt > 0u) - { - /* read g2(n) from state buffer */ - gcurnt1 = *px; - - /* save g1(n) in state buffer */ - *px++ = (q15_t) gnext1; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1; - fnext1 = __SSAT(fnext1, 16); - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1; - gnext1 = __SSAT(gnext1, 16); - - - /* f1(n) is saved in fcurnt1 - for next stage processing */ - fcurnt1 = fnext1; - - stageCnt--; - - } - - /* y(n) = fN(n) */ - *pDst++ = __SSAT(fcurnt1, 16); - - - blkCnt--; - - } - -#else - - /* Run the below code for Cortex-M0 */ - - q31_t fcurnt, fnext, gcurnt, gnext; /* temporary variables */ - uint32_t numStages = S->numStages; /* Length of the filter */ - uint32_t blkCnt, stageCnt; /* temporary variables for counts */ - - pState = &S->pState[0]; - - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* f0(n) = x(n) */ - fcurnt = *pSrc++; - - /* Initialize coeff pointer */ - pk = (pCoeffs); - - /* Initialize state pointer */ - px = pState; - - /* read g0(n-1) from state buffer */ - gcurnt = *px; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt; - fnext = __SSAT(fnext, 16); - - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt; - gnext = __SSAT(gnext, 16); - - /* save f0(n) in state buffer */ - *px++ = (q15_t) fcurnt; - - /* f1(n) is saved in fcurnt - for next stage processing */ - fcurnt = fnext; - - stageCnt = (numStages - 1u); - - /* stage loop */ - while(stageCnt > 0u) - { - /* read g1(n-1) from state buffer */ - gcurnt = *px; - - /* save g0(n-1) in state buffer */ - *px++ = (q15_t) gnext; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt; - fnext = __SSAT(fnext, 16); - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt; - gnext = __SSAT(gnext, 16); - - - /* f1(n) is saved in fcurnt - for next stage processing */ - fcurnt = fnext; - - stageCnt--; - - } - - /* y(n) = fN(n) */ - *pDst++ = __SSAT(fcurnt, 16); - - - blkCnt--; - - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of FIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c deleted file mode 100644 index c923721333..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c +++ /dev/null @@ -1,348 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_lattice_q31.c -* -* Description: Q31 FIR lattice filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Lattice - * @{ - */ - - -/** - * @brief Processing function for the Q31 FIR lattice filter. - * @param[in] *S points to an instance of the Q31 FIR lattice structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of samples to process. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits. - */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - -void arm_fir_lattice_q31( - const arm_fir_lattice_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *px; /* temporary state pointer */ - q31_t *pk; /* temporary coefficient pointer */ - q31_t fcurr1, fnext1, gcurr1 = 0, gnext1; /* temporary variables for first sample in loop unrolling */ - q31_t fcurr2, fnext2, gnext2; /* temporary variables for second sample in loop unrolling */ - uint32_t numStages = S->numStages; /* Length of the filter */ - uint32_t blkCnt, stageCnt; /* temporary variables for counts */ - q31_t k; - - pState = &S->pState[0]; - - blkCnt = blockSize >> 1u; - - /* First part of the processing with loop unrolling. Compute 2 outputs at a time. - a second loop below computes the remaining 1 sample. */ - while(blkCnt > 0u) - { - /* f0(n) = x(n) */ - fcurr1 = *pSrc++; - - /* f0(n) = x(n) */ - fcurr2 = *pSrc++; - - /* Initialize coeff pointer */ - pk = (pCoeffs); - - /* Initialize state pointer */ - px = pState; - - /* read g0(n - 1) from state buffer */ - gcurr1 = *px; - - /* Read the reflection coefficient */ - k = *pk++; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32); - fnext1 = fcurr1 + (fnext1 << 1u); - gnext1 = gcurr1 + (gnext1 << 1u); - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext2 = (q31_t) (((q63_t) fcurr1 * k) >> 32); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32); - fnext2 = fcurr2 + (fnext2 << 1u); - gnext2 = fcurr1 + (gnext2 << 1u); - - /* save g1(n) in state buffer */ - *px++ = fcurr2; - - /* f1(n) is saved in fcurr1 - for next stage processing */ - fcurr1 = fnext1; - fcurr2 = fnext2; - - stageCnt = (numStages - 1u); - - /* stage loop */ - while(stageCnt > 0u) - { - - /* Read the reflection coefficient */ - k = *pk++; - - /* read g2(n) from state buffer */ - gcurr1 = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext2; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32); - fnext2 = (q31_t) (((q63_t) gnext1 * k) >> 32); - - fnext1 = fcurr1 + (fnext1 << 1u); - fnext2 = fcurr2 + (fnext2 << 1u); - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32); - gnext2 = gnext1 + (gnext2 << 1u); - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32); - gnext1 = gcurr1 + (gnext1 << 1u); - - /* f1(n) is saved in fcurr1 - for next stage processing */ - fcurr1 = fnext1; - fcurr2 = fnext2; - - stageCnt--; - - } - - /* y(n) = fN(n) */ - *pDst++ = fcurr1; - *pDst++ = fcurr2; - - blkCnt--; - - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x2u; - - while(blkCnt > 0u) - { - /* f0(n) = x(n) */ - fcurr1 = *pSrc++; - - /* Initialize coeff pointer */ - pk = (pCoeffs); - - /* Initialize state pointer */ - px = pState; - - /* read g0(n - 1) from state buffer */ - gcurr1 = *px; - - /* Read the reflection coefficient */ - k = *pk++; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32); - fnext1 = fcurr1 + (fnext1 << 1u); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32); - gnext1 = gcurr1 + (gnext1 << 1u); - - /* save g1(n) in state buffer */ - *px++ = fcurr1; - - /* f1(n) is saved in fcurr1 - for next stage processing */ - fcurr1 = fnext1; - - stageCnt = (numStages - 1u); - - /* stage loop */ - while(stageCnt > 0u) - { - /* Read the reflection coefficient */ - k = *pk++; - - /* read g2(n) from state buffer */ - gcurr1 = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext1; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32); - fnext1 = fcurr1 + (fnext1 << 1u); - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32); - gnext1 = gcurr1 + (gnext1 << 1u); - - /* f1(n) is saved in fcurr1 - for next stage processing */ - fcurr1 = fnext1; - - stageCnt--; - - } - - - /* y(n) = fN(n) */ - *pDst++ = fcurr1; - - blkCnt--; - - } - - -} - - -#else - -/* Run the below code for Cortex-M0 */ - -void arm_fir_lattice_q31( - const arm_fir_lattice_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *px; /* temporary state pointer */ - q31_t *pk; /* temporary coefficient pointer */ - q31_t fcurr, fnext, gcurr, gnext; /* temporary variables */ - uint32_t numStages = S->numStages; /* Length of the filter */ - uint32_t blkCnt, stageCnt; /* temporary variables for counts */ - - pState = &S->pState[0]; - - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* f0(n) = x(n) */ - fcurr = *pSrc++; - - /* Initialize coeff pointer */ - pk = (pCoeffs); - - /* Initialize state pointer */ - px = pState; - - /* read g0(n-1) from state buffer */ - gcurr = *px; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr; - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr; - /* save g1(n) in state buffer */ - *px++ = fcurr; - - /* f1(n) is saved in fcurr1 - for next stage processing */ - fcurr = fnext; - - stageCnt = (numStages - 1u); - - /* stage loop */ - while(stageCnt > 0u) - { - /* read g2(n) from state buffer */ - gcurr = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr; - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr; - - /* f1(n) is saved in fcurr1 - for next stage processing */ - fcurr = fnext; - - stageCnt--; - - } - - /* y(n) = fN(n) */ - *pDst++ = fcurr; - - blkCnt--; - - } - -} - -#endif /* #ifndef ARM_MATH_CM0 */ - - -/** - * @} end of FIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c deleted file mode 100644 index ac3e2210c3..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c +++ /dev/null @@ -1,689 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_q15.c -* -* Description: Q15 FIR filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR - * @{ - */ - -/** - * @brief Processing function for the Q15 FIR filter. - * @param[in] *S points to an instance of the Q15 FIR structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process per call. - * @return none. - * - * - * \par Restrictions - * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE - * In this case input, output, state buffers should be aligned by 32-bit - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using a 64-bit internal accumulator. - * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - * Lastly, the accumulator is saturated to yield a result in 1.15 format. - * - * \par - * Refer to the function arm_fir_fast_q15() for a faster but less precise implementation of this function. - */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - -#ifndef UNALIGNED_SUPPORT_DISABLE - - -void arm_fir_q15( - const arm_fir_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *px1; /* Temporary q15 pointer for state buffer */ - q15_t *pb; /* Temporary pointer for coefficient buffer */ - q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold SIMD state and coefficient values */ - q63_t acc0, acc1, acc2, acc3; /* Accumulators */ - uint32_t numTaps = S->numTaps; /* Number of taps in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Apply loop unrolling and compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - - blkCnt = blockSize >> 2; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Copy four new input samples into the state buffer. - ** Use 32-bit SIMD to move the 16-bit data. Only requires two copies. */ - *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++; - *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Initialize state pointer of type q15 */ - px1 = pState; - - /* Initialize coeff pointer of type q31 */ - pb = pCoeffs; - - /* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */ - x0 = _SIMD32_OFFSET(px1); - - /* Read the third and forth samples from the state buffer: x[n-N-1], x[n-N-2] */ - x1 = _SIMD32_OFFSET(px1 + 1u); - - px1 += 2u; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-4 coefficients. */ - tapCnt = numTaps >> 2; - - while(tapCnt > 0u) - { - /* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */ - c0 = *__SIMD32(pb)++; - - /* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ - acc0 = __SMLALD(x0, c0, acc0); - - /* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */ - acc1 = __SMLALD(x1, c0, acc1); - - /* Read state x[n-N-2], x[n-N-3] */ - x2 = _SIMD32_OFFSET(px1); - - /* Read state x[n-N-3], x[n-N-4] */ - x3 = _SIMD32_OFFSET(px1 + 1u); - - /* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */ - acc2 = __SMLALD(x2, c0, acc2); - - /* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */ - acc3 = __SMLALD(x3, c0, acc3); - - /* Read coefficients b[N-2], b[N-3] */ - c0 = *__SIMD32(pb)++; - - /* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */ - acc0 = __SMLALD(x2, c0, acc0); - - /* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */ - acc1 = __SMLALD(x3, c0, acc1); - - /* Read state x[n-N-4], x[n-N-5] */ - x0 = _SIMD32_OFFSET(px1 + 2u); - - /* Read state x[n-N-5], x[n-N-6] */ - x1 = _SIMD32_OFFSET(px1 + 3u); - - /* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */ - acc2 = __SMLALD(x0, c0, acc2); - - /* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */ - acc3 = __SMLALD(x1, c0, acc3); - - px1 += 4u; - - tapCnt--; - - } - - - /* If the filter length is not a multiple of 4, compute the remaining filter taps. - ** This is always be 2 taps since the filter length is even. */ - if((numTaps & 0x3u) != 0u) - { - /* Read 2 coefficients */ - c0 = *__SIMD32(pb)++; - - /* Fetch 4 state variables */ - x2 = _SIMD32_OFFSET(px1); - - x3 = _SIMD32_OFFSET(px1 + 1u); - - /* Perform the multiply-accumulates */ - acc0 = __SMLALD(x0, c0, acc0); - - px1 += 2u; - - acc1 = __SMLALD(x1, c0, acc1); - acc2 = __SMLALD(x2, c0, acc2); - acc3 = __SMLALD(x3, c0, acc3); - } - - /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation. - ** Then store the 4 outputs in the destination buffer. */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16); - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16); - -#else - - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16); - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - while(blkCnt > 0u) - { - /* Copy two samples into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0; - - /* Initialize state pointer of type q15 */ - px1 = pState; - - /* Initialize coeff pointer of type q31 */ - pb = pCoeffs; - - tapCnt = numTaps >> 1; - - do - { - - c0 = *__SIMD32(pb)++; - x0 = *__SIMD32(px1)++; - - acc0 = __SMLALD(x0, c0, acc0); - tapCnt--; - } - while(tapCnt > 0u); - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - ** Then store the output in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - /* Calculation of count for copying integer writes */ - tapCnt = (numTaps - 1u) >> 2; - - while(tapCnt > 0u) - { - - /* Copy state values to start of state buffer */ - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - - tapCnt--; - - } - - /* Calculation of count for remaining q15_t data */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* copy remaining data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } -} - -#else /* UNALIGNED_SUPPORT_DISABLE */ - -void arm_fir_q15( - const arm_fir_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q63_t acc0, acc1, acc2, acc3; /* Accumulators */ - q15_t *pb; /* Temporary pointer for coefficient buffer */ - q15_t *px; /* Temporary q31 pointer for SIMD state buffer accesses */ - q31_t x0, x1, x2, c0; /* Temporary variables to hold SIMD state and coefficient values */ - uint32_t numTaps = S->numTaps; /* Number of taps in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Apply loop unrolling and compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - - blkCnt = blockSize >> 2; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Copy four new input samples into the state buffer. - ** Use 32-bit SIMD to move the 16-bit data. Only requires two copies. */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */ - px = pState; - - /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */ - pb = pCoeffs; - - /* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */ - x0 = *__SIMD32(px)++; - - /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */ - x2 = *__SIMD32(px)++; - - /* Loop over the number of taps. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */ - tapCnt = numTaps >> 2; - - while(tapCnt > 0) - { - /* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */ - c0 = *__SIMD32(pb)++; - - /* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ - acc0 = __SMLALD(x0, c0, acc0); - - /* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */ - acc2 = __SMLALD(x2, c0, acc2); - - /* pack x[n-N-1] and x[n-N-2] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* Read state x[n-N-4], x[n-N-5] */ - x0 = _SIMD32_OFFSET(px); - - /* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */ - acc1 = __SMLALDX(x1, c0, acc1); - - /* pack x[n-N-3] and x[n-N-4] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x0, x2, 0); -#else - x1 = __PKHBT(x2, x0, 0); -#endif - - /* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */ - acc3 = __SMLALDX(x1, c0, acc3); - - /* Read coefficients b[N-2], b[N-3] */ - c0 = *__SIMD32(pb)++; - - /* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */ - acc0 = __SMLALD(x2, c0, acc0); - - /* Read state x[n-N-6], x[n-N-7] with offset */ - x2 = _SIMD32_OFFSET(px + 2u); - - /* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */ - acc2 = __SMLALD(x0, c0, acc2); - - /* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */ - acc1 = __SMLALDX(x1, c0, acc1); - - /* pack x[n-N-5] and x[n-N-6] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */ - acc3 = __SMLALDX(x1, c0, acc3); - - /* Update state pointer for next state reading */ - px += 4u; - - /* Decrement tap count */ - tapCnt--; - - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps. - ** This is always be 2 taps since the filter length is even. */ - if((numTaps & 0x3u) != 0u) - { - - /* Read last two coefficients */ - c0 = *__SIMD32(pb)++; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALD(x0, c0, acc0); - acc2 = __SMLALD(x2, c0, acc2); - - /* pack state variables */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* Read last state variables */ - x0 = *__SIMD32(px); - - /* Perform the multiply-accumulates */ - acc1 = __SMLALDX(x1, c0, acc1); - - /* pack state variables */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x0, x2, 0); -#else - x1 = __PKHBT(x2, x0, 0); -#endif - - /* Perform the multiply-accumulates */ - acc3 = __SMLALDX(x1, c0, acc3); - } - - /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation. - ** Then store the 4 outputs in the destination buffer. */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16); - - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16); - -#else - - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16); - - *__SIMD32(pDst)++ = - __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - while(blkCnt > 0u) - { - /* Copy two samples into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0; - - /* Use SIMD to hold states and coefficients */ - px = pState; - pb = pCoeffs; - - tapCnt = numTaps >> 1u; - - do - { - acc0 += (q31_t) * px++ * *pb++; - acc0 += (q31_t) * px++ * *pb++; - tapCnt--; - } - while(tapCnt > 0u); - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - ** Then store the output in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - /* Calculation of count for copying integer writes */ - tapCnt = (numTaps - 1u) >> 2; - - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - tapCnt--; - - } - - /* Calculation of count for remaining q15_t data */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* copy remaining data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } -} - - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - -#else /* ARM_MATH_CM0 */ - - -/* Run the below code for Cortex-M0 */ - -void arm_fir_q15( - const arm_fir_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - - - - q15_t *px; /* Temporary pointer for state buffer */ - q15_t *pb; /* Temporary pointer for coefficient buffer */ - q63_t acc; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of nTaps in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Initialize blkCnt with blockSize */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = pCoeffs; - - tapCnt = numTaps; - - /* Perform the multiply-accumulates */ - do - { - /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */ - acc += (q31_t) * px++ * *pb++; - tapCnt--; - } while(tapCnt > 0u); - - /* The result is in 2.30 format. Convert to 1.15 - ** Then store the output in the destination buffer. */ - *pDst++ = (q15_t) __SSAT((acc >> 15u), 16); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the samples loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - /* Copy numTaps number of values */ - tapCnt = (numTaps - 1u); - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} - -#endif /* #ifndef ARM_MATH_CM0 */ - - - - -/** - * @} end of FIR group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c deleted file mode 100644 index 8113d7e274..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c +++ /dev/null @@ -1,363 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_q31.c -* -* Description: Q31 FIR filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR - * @{ - */ - -/** - * @param[in] *S points to an instance of the Q31 FIR filter structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process per call. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around rather than clip. - * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. - * After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. - * - * \par - * Refer to the function arm_fir_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4. - */ - -void arm_fir_q31( - const arm_fir_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t x0, x1, x2; /* Temporary variables to hold state */ - q31_t c0; /* Temporary variable to hold coefficient value */ - q31_t *px; /* Temporary pointer for state */ - q31_t *pb; /* Temporary pointer for coefficient buffer */ - q63_t acc0, acc1, acc2; /* Accumulators */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt, tapCntN3; /* Loop counters */ - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Apply loop unrolling and compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - blkCnt = blockSize / 3; - blockSize = blockSize - (3 * blkCnt); - - tapCnt = numTaps / 3; - tapCntN3 = numTaps - (3 * tapCnt); - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Copy three new input samples into the state buffer */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Read the first two samples from the state buffer: - * x[n-numTaps], x[n-numTaps-1] */ - x0 = *(px++); - x1 = *(px++); - - /* Loop unrolling. Process 3 taps at a time. */ - i = tapCnt; - - while(i > 0u) - { - /* Read the b[numTaps] coefficient */ - c0 = *pb; - - /* Read x[n-numTaps-2] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += ((q63_t) x0 * c0); - acc1 += ((q63_t) x1 * c0); - acc2 += ((q63_t) x2 * c0); - - /* Read the coefficient and state */ - c0 = *(pb + 1u); - x0 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += ((q63_t) x1 * c0); - acc1 += ((q63_t) x2 * c0); - acc2 += ((q63_t) x0 * c0); - - /* Read the coefficient and state */ - c0 = *(pb + 2u); - x1 = *(px++); - - /* update coefficient pointer */ - pb += 3u; - - /* Perform the multiply-accumulates */ - acc0 += ((q63_t) x2 * c0); - acc1 += ((q63_t) x0 * c0); - acc2 += ((q63_t) x1 * c0); - - /* Decrement the loop counter */ - i--; - } - - /* If the filter length is not a multiple of 3, compute the remaining filter taps */ - - i = tapCntN3; - - while(i > 0u) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += ((q63_t) x0 * c0); - acc1 += ((q63_t) x1 * c0); - acc2 += ((q63_t) x2 * c0); - - /* Reuse the present sample states for next sample */ - x0 = x1; - x1 = x2; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 3 to process the next group of 3 samples */ - pState = pState + 3; - - /* The results in the 3 accumulators are in 2.30 format. Convert to 1.31 - ** Then store the 3 outputs in the destination buffer. */ - *pDst++ = (q31_t) (acc0 >> 31u); - *pDst++ = (q31_t) (acc1 >> 31u); - *pDst++ = (q31_t) (acc2 >> 31u); - - /* Decrement the samples loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 3, compute any remaining output samples here. - ** No loop unrolling is used. */ - - while(blockSize > 0u) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = (pCoeffs); - - i = numTaps; - - /* Perform the multiply-accumulates */ - do - { - acc0 += (q63_t) * (px++) * (*(pb++)); - i--; - } while(i > 0u); - - /* The result is in 2.62 format. Convert to 1.31 - ** Then store the output in the destination buffer. */ - *pDst++ = (q31_t) (acc0 >> 31u); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the samples loop counter */ - blockSize--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - tapCnt = (numTaps - 1u) >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#else - -/* Run the below code for Cortex-M0 */ - - q31_t *px; /* Temporary pointer for state */ - q31_t *pb; /* Temporary pointer for coefficient buffer */ - q63_t acc; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Length of the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Initialize blkCnt with blockSize */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = pCoeffs; - - i = numTaps; - - /* Perform the multiply-accumulates */ - do - { - /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */ - acc += (q63_t) * px++ * *pb++; - i--; - } while(i > 0u); - - /* The result is in 2.62 format. Convert to 1.31 - ** Then store the output in the destination buffer. */ - *pDst++ = (q31_t) (acc >> 31u); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the samples loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the starting of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - /* Copy numTaps number of values */ - tapCnt = numTaps - 1u; - - /* Copy the data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of FIR group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c deleted file mode 100644 index 97974992a0..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c +++ /dev/null @@ -1,388 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_q7.c -* -* Description: Q7 FIR filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR - * @{ - */ - -/** - * @param[in] *S points to an instance of the Q7 FIR filter structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using a 32-bit internal accumulator. - * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. - * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - * The accumulator is converted to 18.7 format by discarding the low 7 bits. - * Finally, the result is truncated to 1.7 format. - */ - -void arm_fir_q7( - const arm_fir_instance_q7 * S, - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q7_t *pState = S->pState; /* State pointer */ - q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q7_t *pStateCurnt; /* Points to the current sample of the state */ - q7_t x0, x1, x2, x3; /* Temporary variables to hold state */ - q7_t c0; /* Temporary variable to hold coefficient value */ - q7_t *px; /* Temporary pointer for state */ - q7_t *pb; /* Temporary pointer for coefficient buffer */ - q31_t acc0, acc1, acc2, acc3; /* Accumulators */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Apply loop unrolling and compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - blkCnt = blockSize >> 2; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Copy four new input samples into the state buffer */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Read the first three samples from the state buffer: - * x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */ - x0 = *(px++); - x1 = *(px++); - x2 = *(px++); - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - i = tapCnt; - - while(i > 0u) - { - /* Read the b[numTaps] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample */ - x3 = *(px++); - - /* acc0 += b[numTaps] * x[n-numTaps] */ - acc0 += ((q15_t) x0 * c0); - - /* acc1 += b[numTaps] * x[n-numTaps-1] */ - acc1 += ((q15_t) x1 * c0); - - /* acc2 += b[numTaps] * x[n-numTaps-2] */ - acc2 += ((q15_t) x2 * c0); - - /* acc3 += b[numTaps] * x[n-numTaps-3] */ - acc3 += ((q15_t) x3 * c0); - - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += ((q15_t) x1 * c0); - acc1 += ((q15_t) x2 * c0); - acc2 += ((q15_t) x3 * c0); - acc3 += ((q15_t) x0 * c0); - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += ((q15_t) x2 * c0); - acc1 += ((q15_t) x3 * c0); - acc2 += ((q15_t) x0 * c0); - acc3 += ((q15_t) x1 * c0); - /* Read the b[numTaps-3] coefficients */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += ((q15_t) x3 * c0); - acc1 += ((q15_t) x0 * c0); - acc2 += ((q15_t) x1 * c0); - acc3 += ((q15_t) x2 * c0); - i--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - - i = numTaps - (tapCnt * 4u); - while(i > 0u) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += ((q15_t) x0 * c0); - acc1 += ((q15_t) x1 * c0); - acc2 += ((q15_t) x2 * c0); - acc3 += ((q15_t) x3 * c0); - - /* Reuse the present sample states for next sample */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 4; - - /* The results in the 4 accumulators are in 2.62 format. Convert to 1.31 - ** Then store the 4 outputs in the destination buffer. */ - acc0 = __SSAT((acc0 >> 7u), 8); - *pDst++ = acc0; - acc1 = __SSAT((acc1 >> 7u), 8); - *pDst++ = acc1; - acc2 = __SSAT((acc2 >> 7u), 8); - *pDst++ = acc2; - acc3 = __SSAT((acc3 >> 7u), 8); - *pDst++ = acc3; - - /* Decrement the samples loop counter */ - blkCnt--; - } - - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 4u; - - while(blkCnt > 0u) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = (pCoeffs); - - i = numTaps; - - /* Perform the multiply-accumulates */ - do - { - acc0 += (q15_t) * (px++) * (*(pb++)); - i--; - } while(i > 0u); - - /* The result is in 2.14 format. Convert to 1.7 - ** Then store the output in the destination buffer. */ - *pDst++ = __SSAT((acc0 >> 7u), 8); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the samples loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - tapCnt = (numTaps - 1u) >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#else - -/* Run the below code for Cortex-M0 */ - - uint32_t numTaps = S->numTaps; /* Number of taps in the filter */ - uint32_t i, blkCnt; /* Loop counters */ - q7_t *pState = S->pState; /* State pointer */ - q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q7_t *px, *pb; /* Temporary pointers to state and coeff */ - q31_t acc = 0; /* Accumlator */ - q7_t *pStateCurnt; /* Points to the current sample of the state */ - - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1u); - - /* Initialize blkCnt with blockSize */ - blkCnt = blockSize; - - /* Perform filtering upto BlockSize - BlockSize%4 */ - while(blkCnt > 0u) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set accumulator to zero */ - acc = 0; - - /* Initialize state pointer of type q7 */ - px = pState; - - /* Initialize coeff pointer of type q7 */ - pb = pCoeffs; - - - i = numTaps; - - while(i > 0u) - { - /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */ - acc += (q15_t) * px++ * *pb++; - i--; - } - - /* Store the 1.7 format filter output in destination buffer */ - *pDst++ = (q7_t) __SSAT((acc >> 7), 8); - - /* Advance the state pointer by 1 to process the next sample */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - - /* Copy numTaps number of values */ - i = (numTaps - 1u); - - /* Copy q7_t data */ - while(i > 0u) - { - *pStateCurnt++ = *pState++; - i--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of FIR group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c deleted file mode 100644 index 3b2dff4531..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c +++ /dev/null @@ -1,365 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_sparse_f32.c -* -* Description: Floating-point sparse FIR filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ------------------------------------------------------------------- */ -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters - * - * This group of functions implements sparse FIR filters. - * Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero. - * Sparse filters are used for simulating reflections in communications and audio applications. - * - * There are separate functions for Q7, Q15, Q31, and floating-point data types. - * The functions operate on blocks of input and output data and each call to the function processes - * blockSize samples through the filter. pSrc and - * pDst points to input and output arrays respectively containing blockSize values. - * - * \par Algorithm: - * The sparse filter instant structure contains an array of tap indices pTapDelay which specifies the locations of the non-zero coefficients. - * This is in addition to the coefficient array b. - * The implementation essentially skips the multiplications by zero and leads to an efficient realization. - *
   
- *     y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]    
- * 
- * \par - * \image html FIRSparse.gif "Sparse FIR filter. b[n] represents the filter coefficients" - * \par - * pCoeffs points to a coefficient array of size numTaps; - * pTapDelay points to an array of nonzero indices and is also of size numTaps; - * pState points to a state array of size maxDelay + blockSize, where - * maxDelay is the largest offset value that is ever used in the pTapDelay array. - * Some of the processing functions also require temporary working buffers. - * - * \par Instance Structure - * The coefficients and state variables for a filter are stored together in an instance data structure. - * A separate instance structure must be defined for each filter. - * Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared. - * There are separate instance structure declarations for each of the 4 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Zeros out the values in the state buffer. - * - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Set the values in the state buffer to zeros before static initialization. - * The code below statically initializes each of the 4 different data type filter instance structures - *
    
- *arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- * 
- * \par - * - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the sparse FIR filter functions. - * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - -/** - * @addtogroup FIR_Sparse - * @{ - */ - -/** - * @brief Processing function for the floating-point sparse FIR filter. - * @param[in] *S points to an instance of the floating-point sparse FIR structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] *pScratchIn points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - * @return none. - */ - -void arm_fir_sparse_f32( - arm_fir_sparse_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - float32_t * pScratchIn, - uint32_t blockSize) -{ - - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *px; /* Scratch buffer pointer */ - float32_t *py = pState; /* Temporary pointers for state buffer */ - float32_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - float32_t *pOut; /* Destination pointer */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - float32_t coeff = *pCoeffs++; /* Read the first coefficient value */ - - - - /* BlockSize of Input samples are copied into the state buffer */ - /* StateIndex points to the starting position to write in the state buffer */ - arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1, - (int32_t *) pSrc, 1, blockSize); - - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, - blockSize); - - /* Working pointer for the scratch buffer */ - px = pb; - - /* Working pointer for destination buffer */ - pOut = pDst; - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Loop over the blockSize. Unroll by a factor of 4. - * Compute 4 Multiplications at a time. */ - blkCnt = blockSize >> 2u; - - while(blkCnt > 0u) - { - /* Perform Multiplications and store in destination buffer */ - *pOut++ = *px++ * coeff; - *pOut++ = *px++ * coeff; - *pOut++ = *px++ * coeff; - *pOut++ = *px++ * coeff; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, - * compute the remaining samples */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* Perform Multiplications and store in destination buffer */ - *pOut++ = *px++ * coeff; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 1u; - - while(tapCnt > 0u) - { - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, - blockSize); - - /* Working pointer for the scratch buffer */ - px = pb; - - /* Working pointer for destination buffer */ - pOut = pDst; - - /* Loop over the blockSize. Unroll by a factor of 4. - * Compute 4 MACS at a time. */ - blkCnt = blockSize >> 2u; - - while(blkCnt > 0u) - { - /* Perform Multiply-Accumulate */ - *pOut++ += *px++ * coeff; - *pOut++ += *px++ * coeff; - *pOut++ += *px++ * coeff; - *pOut++ += *px++ * coeff; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, - * compute the remaining samples */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* Perform Multiply-Accumulate */ - *pOut++ += *px++ * coeff; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = ((int32_t) S->stateIndex - - (int32_t) blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement the tap loop counter */ - tapCnt--; - } - -#else - -/* Run the below code for Cortex-M0 */ - - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Perform Multiplications and store in destination buffer */ - *pOut++ = *px++ * coeff; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 1u; - - while(tapCnt > 0u) - { - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, - blockSize); - - /* Working pointer for the scratch buffer */ - px = pb; - - /* Working pointer for destination buffer */ - pOut = pDst; - - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Perform Multiply-Accumulate */ - *pOut++ += *px++ * coeff; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = - ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement the tap loop counter */ - tapCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of FIR_Sparse group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c deleted file mode 100644 index cc9cb53f76..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c +++ /dev/null @@ -1,102 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_sparse_init_f32.c -* -* Description: Floating-point sparse FIR filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Sparse - * @{ - */ - -/** - * @brief Initialization function for the floating-point sparse FIR filter. - * @param[in,out] *S points to an instance of the floating-point sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] *pCoeffs points to the array of filter coefficients. - * @param[in] *pState points to the state buffer. - * @param[in] *pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - * @return none - * - * Description: - * \par - * pCoeffs holds the filter coefficients and has length numTaps. - * pState holds the filter's state variables and must be of length - * maxDelay + blockSize, where maxDelay - * is the maximum number of delay line values. - * blockSize is the - * number of samples processed by the arm_fir_sparse_f32() function. - */ - -void arm_fir_sparse_init_f32( - arm_fir_sparse_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign TapDelay pointer */ - S->pTapDelay = pTapDelay; - - /* Assign MaxDelay */ - S->maxDelay = maxDelay; - - /* reset the stateIndex to 0 */ - S->stateIndex = 0u; - - /* Clear state buffer and size is always maxDelay + blockSize */ - memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - -} - -/** - * @} end of FIR_Sparse group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c deleted file mode 100644 index ef25875281..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c +++ /dev/null @@ -1,102 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_sparse_init_q15.c -* -* Description: Q15 sparse FIR filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Sparse - * @{ - */ - -/** - * @brief Initialization function for the Q15 sparse FIR filter. - * @param[in,out] *S points to an instance of the Q15 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] *pCoeffs points to the array of filter coefficients. - * @param[in] *pState points to the state buffer. - * @param[in] *pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - * @return none - * - * Description: - * \par - * pCoeffs holds the filter coefficients and has length numTaps. - * pState holds the filter's state variables and must be of length - * maxDelay + blockSize, where maxDelay - * is the maximum number of delay line values. - * blockSize is the - * number of words processed by arm_fir_sparse_q15() function. - */ - -void arm_fir_sparse_init_q15( - arm_fir_sparse_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign TapDelay pointer */ - S->pTapDelay = pTapDelay; - - /* Assign MaxDelay */ - S->maxDelay = maxDelay; - - /* reset the stateIndex to 0 */ - S->stateIndex = 0u; - - /* Clear state buffer and size is always maxDelay + blockSize */ - memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - -} - -/** - * @} end of FIR_Sparse group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c deleted file mode 100644 index abad5b85d5..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c +++ /dev/null @@ -1,101 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_sparse_init_q31.c -* -* Description: Q31 sparse FIR filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Sparse - * @{ - */ - -/** - * @brief Initialization function for the Q31 sparse FIR filter. - * @param[in,out] *S points to an instance of the Q31 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] *pCoeffs points to the array of filter coefficients. - * @param[in] *pState points to the state buffer. - * @param[in] *pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - * @return none - * - * Description: - * \par - * pCoeffs holds the filter coefficients and has length numTaps. - * pState holds the filter's state variables and must be of length - * maxDelay + blockSize, where maxDelay - * is the maximum number of delay line values. - * blockSize is the number of words processed by arm_fir_sparse_q31() function. - */ - -void arm_fir_sparse_init_q31( - arm_fir_sparse_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign TapDelay pointer */ - S->pTapDelay = pTapDelay; - - /* Assign MaxDelay */ - S->maxDelay = maxDelay; - - /* reset the stateIndex to 0 */ - S->stateIndex = 0u; - - /* Clear state buffer and size is always maxDelay + blockSize */ - memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; - -} - -/** - * @} end of FIR_Sparse group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c deleted file mode 100644 index 9fb5c564d5..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c +++ /dev/null @@ -1,102 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_sparse_init_q7.c -* -* Description: Q7 sparse FIR filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Sparse - * @{ - */ - -/** - * @brief Initialization function for the Q7 sparse FIR filter. - * @param[in,out] *S points to an instance of the Q7 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] *pCoeffs points to the array of filter coefficients. - * @param[in] *pState points to the state buffer. - * @param[in] *pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - * @return none - * - * Description: - * \par - * pCoeffs holds the filter coefficients and has length numTaps. - * pState holds the filter's state variables and must be of length - * maxDelay + blockSize, where maxDelay - * is the maximum number of delay line values. - * blockSize is the - * number of samples processed by the arm_fir_sparse_q7() function. - */ - -void arm_fir_sparse_init_q7( - arm_fir_sparse_instance_q7 * S, - uint16_t numTaps, - q7_t * pCoeffs, - q7_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign TapDelay pointer */ - S->pTapDelay = pTapDelay; - - /* Assign MaxDelay */ - S->maxDelay = maxDelay; - - /* reset the stateIndex to 0 */ - S->stateIndex = 0u; - - /* Clear state buffer and size is always maxDelay + blockSize */ - memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t)); - - /* Assign state pointer */ - S->pState = pState; - -} - -/** - * @} end of FIR_Sparse group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c deleted file mode 100644 index 62e7afecbb..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c +++ /dev/null @@ -1,406 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_sparse_q15.c -* -* Description: Q15 sparse FIR filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ------------------------------------------------------------------- */ -#include "arm_math.h" - -/** - * @addtogroup FIR_Sparse - * @{ - */ - -/** - * @brief Processing function for the Q15 sparse FIR filter. - * @param[in] *S points to an instance of the Q15 sparse FIR structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] *pScratchIn points to a temporary buffer of size blockSize. - * @param[in] *pScratchOut points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 32-bit accumulator. - * The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator. - * Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator. - * If the accumulator result overflows it will wrap around rather than saturate. - * After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format. - * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits. - */ - - -void arm_fir_sparse_q15( - arm_fir_sparse_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - q15_t * pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize) -{ - - q15_t *pState = S->pState; /* State pointer */ - q15_t *pIn = pSrc; /* Working pointer for input */ - q15_t *pOut = pDst; /* Working pointer for output */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *px; /* Temporary pointers for scratch buffer */ - q15_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - q15_t *py = pState; /* Temporary pointers for state buffer */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Filter order */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - q15_t coeff = *pCoeffs++; /* Read the first coefficient value */ - q31_t *pScr2 = pScratchOut; /* Working pointer for pScratchOut */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in1, in2; /* Temporary variables */ - - - /* BlockSize of Input samples are copied into the state buffer */ - /* StateIndex points to the starting position to write in the state buffer */ - arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize); - - /* Loop over the number of taps. */ - tapCnt = numTaps; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q15(py, delaySize, &readIndex, 1, - pb, pb, blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - /* Loop over the blockSize. Unroll by a factor of 4. - * Compute 4 multiplications at a time. */ - blkCnt = blockSize >> 2; - - while(blkCnt > 0u) - { - /* Perform multiplication and store in the scratch buffer */ - *pScratchOut++ = ((q31_t) * px++ * coeff); - *pScratchOut++ = ((q31_t) * px++ * coeff); - *pScratchOut++ = ((q31_t) * px++ * coeff); - *pScratchOut++ = ((q31_t) * px++ * coeff); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, - * compute the remaining samples */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* Perform multiplication and store in the scratch buffer */ - *pScratchOut++ = ((q31_t) * px++ * coeff); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 1u; - - while(tapCnt > 0u) - { - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q15(py, delaySize, &readIndex, 1, - pb, pb, blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - /* Loop over the blockSize. Unroll by a factor of 4. - * Compute 4 MACS at a time. */ - blkCnt = blockSize >> 2; - - while(blkCnt > 0u) - { - /* Perform Multiply-Accumulate */ - *pScratchOut++ += (q31_t) * px++ * coeff; - *pScratchOut++ += (q31_t) * px++ * coeff; - *pScratchOut++ += (q31_t) * px++ * coeff; - *pScratchOut++ += (q31_t) * px++ * coeff; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, - * compute the remaining samples */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* Perform Multiply-Accumulate */ - *pScratchOut++ += (q31_t) * px++ * coeff; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement the tap loop counter */ - tapCnt--; - } - - /* All the output values are in pScratchOut buffer. - Convert them into 1.15 format, saturate and store in the destination buffer. */ - /* Loop over the blockSize. */ - blkCnt = blockSize >> 2; - - while(blkCnt > 0u) - { - in1 = *pScr2++; - in2 = *pScr2++; - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = - __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), - 16); - -#else - *__SIMD32(pOut)++ = - __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), - 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = *pScr2++; - - in2 = *pScr2++; - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pOut)++ = - __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), - 16); - -#else - - *__SIMD32(pOut)++ = - __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), - 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - - blkCnt--; - - } - - /* If the blockSize is not a multiple of 4, - remaining samples are processed in the below loop */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16); - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* BlockSize of Input samples are copied into the state buffer */ - /* StateIndex points to the starting position to write in the state buffer */ - arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize); - - /* Loop over the number of taps. */ - tapCnt = numTaps; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q15(py, delaySize, &readIndex, 1, - pb, pb, blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Perform multiplication and store in the scratch buffer */ - *pScratchOut++ = ((q31_t) * px++ * coeff); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 1u; - - while(tapCnt > 0u) - { - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q15(py, delaySize, &readIndex, 1, - pb, pb, blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Perform Multiply-Accumulate */ - *pScratchOut++ += (q31_t) * px++ * coeff; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement the tap loop counter */ - tapCnt--; - } - - /* All the output values are in pScratchOut buffer. - Convert them into 1.15 format, saturate and store in the destination buffer. */ - /* Loop over the blockSize. */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16); - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of FIR_Sparse group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c deleted file mode 100644 index 9f02312501..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c +++ /dev/null @@ -1,370 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_sparse_q31.c -* -* Description: Q31 sparse FIR filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ------------------------------------------------------------------- */ -#include "arm_math.h" - - -/** - * @addtogroup FIR_Sparse - * @{ - */ - -/** - * @brief Processing function for the Q31 sparse FIR filter. - * @param[in] *S points to an instance of the Q31 sparse FIR structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] *pScratchIn points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 32-bit accumulator. - * The 1.31 x 1.31 multiplications are truncated to 2.30 format. - * This leads to loss of precision on the intermediate multiplications and provides only a single guard bit. - * If the accumulator result overflows, it wraps around rather than saturate. - * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits. - */ - -void arm_fir_sparse_q31( - arm_fir_sparse_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - q31_t * pScratchIn, - uint32_t blockSize) -{ - - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *px; /* Scratch buffer pointer */ - q31_t *py = pState; /* Temporary pointers for state buffer */ - q31_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - q31_t *pOut; /* Destination pointer */ - q63_t out; /* Temporary output variable */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Filter order */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - q31_t coeff = *pCoeffs++; /* Read the first coefficient value */ - q31_t in; - - - /* BlockSize of Input samples are copied into the state buffer */ - /* StateIndex points to the starting position to write in the state buffer */ - arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1, - (int32_t *) pSrc, 1, blockSize); - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, - blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pOut = pDst; - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Loop over the blockSize. Unroll by a factor of 4. - * Compute 4 Multiplications at a time. */ - blkCnt = blockSize >> 2; - - while(blkCnt > 0u) - { - /* Perform Multiplications and store in the destination buffer */ - *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32); - *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32); - *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32); - *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, - * compute the remaining samples */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* Perform Multiplications and store in the destination buffer */ - *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 1u; - - while(tapCnt > 0u) - { - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, - blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pOut = pDst; - - /* Loop over the blockSize. Unroll by a factor of 4. - * Compute 4 MACS at a time. */ - blkCnt = blockSize >> 2; - - while(blkCnt > 0u) - { - out = *pOut; - out += ((q63_t) * px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - out = *pOut; - out += ((q63_t) * px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - out = *pOut; - out += ((q63_t) * px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - out = *pOut; - out += ((q63_t) * px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, - * compute the remaining samples */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* Perform Multiply-Accumulate */ - out = *pOut; - out += ((q63_t) * px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement the tap loop counter */ - tapCnt--; - } - - /* Working output pointer is updated */ - pOut = pDst; - - /* Output is converted into 1.31 format. */ - /* Loop over the blockSize. Unroll by a factor of 4. - * process 4 output samples at a time. */ - blkCnt = blockSize >> 2; - - while(blkCnt > 0u) - { - in = *pOut << 1; - *pOut++ = in; - in = *pOut << 1; - *pOut++ = in; - in = *pOut << 1; - *pOut++ = in; - in = *pOut << 1; - *pOut++ = in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, - * process the remaining output samples */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - in = *pOut << 1; - *pOut++ = in; - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Perform Multiplications and store in the destination buffer */ - *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 1u; - - while(tapCnt > 0u) - { - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, - blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pOut = pDst; - - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Perform Multiply-Accumulate */ - out = *pOut; - out += ((q63_t) * px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement the tap loop counter */ - tapCnt--; - } - - /* Working output pointer is updated */ - pOut = pDst; - - /* Output is converted into 1.31 format. */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - in = *pOut << 1; - *pOut++ = in; - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of FIR_Sparse group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c deleted file mode 100644 index e67339250f..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c +++ /dev/null @@ -1,398 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_sparse_q7.c -* -* Description: Q7 sparse FIR filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ------------------------------------------------------------------- */ -#include "arm_math.h" - - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup FIR_Sparse - * @{ - */ - - -/** - * @brief Processing function for the Q7 sparse FIR filter. - * @param[in] *S points to an instance of the Q7 sparse FIR structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] *pScratchIn points to a temporary buffer of size blockSize. - * @param[in] *pScratchOut points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using a 32-bit internal accumulator. - * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. - * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - * The accumulator is then converted to 18.7 format by discarding the low 7 bits. - * Finally, the result is truncated to 1.7 format. - */ - -void arm_fir_sparse_q7( - arm_fir_sparse_instance_q7 * S, - q7_t * pSrc, - q7_t * pDst, - q7_t * pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize) -{ - - q7_t *pState = S->pState; /* State pointer */ - q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q7_t *px; /* Scratch buffer pointer */ - q7_t *py = pState; /* Temporary pointers for state buffer */ - q7_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - q7_t *pOut = pDst; /* Destination pointer */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Filter order */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - q7_t coeff = *pCoeffs++; /* Read the coefficient value */ - q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of output values */ - q31_t in; - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q7_t in1, in2, in3, in4; - - /* BlockSize of Input samples are copied into the state buffer */ - /* StateIndex points to the starting position to write in the state buffer */ - arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1, - blockSize); - - /* Loop over the number of taps. */ - tapCnt = numTaps; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb, - (int32_t) blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - /* Loop over the blockSize. Unroll by a factor of 4. - * Compute 4 multiplications at a time. */ - blkCnt = blockSize >> 2; - - while(blkCnt > 0u) - { - /* Perform multiplication and store in the scratch buffer */ - *pScratchOut++ = ((q31_t) * px++ * coeff); - *pScratchOut++ = ((q31_t) * px++ * coeff); - *pScratchOut++ = ((q31_t) * px++ * coeff); - *pScratchOut++ = ((q31_t) * px++ * coeff); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, - * compute the remaining samples */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* Perform multiplication and store in the scratch buffer */ - *pScratchOut++ = ((q31_t) * px++ * coeff); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 1u; - - while(tapCnt > 0u) - { - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb, - (int32_t) blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - /* Loop over the blockSize. Unroll by a factor of 4. - * Compute 4 MACS at a time. */ - blkCnt = blockSize >> 2; - - while(blkCnt > 0u) - { - /* Perform Multiply-Accumulate */ - in = *pScratchOut + ((q31_t) * px++ * coeff); - *pScratchOut++ = in; - in = *pScratchOut + ((q31_t) * px++ * coeff); - *pScratchOut++ = in; - in = *pScratchOut + ((q31_t) * px++ * coeff); - *pScratchOut++ = in; - in = *pScratchOut + ((q31_t) * px++ * coeff); - *pScratchOut++ = in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, - * compute the remaining samples */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* Perform Multiply-Accumulate */ - in = *pScratchOut + ((q31_t) * px++ * coeff); - *pScratchOut++ = in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = ((int32_t) S->stateIndex - - (int32_t) blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement the tap loop counter */ - tapCnt--; - } - - /* All the output values are in pScratchOut buffer. - Convert them into 1.15 format, saturate and store in the destination buffer. */ - /* Loop over the blockSize. */ - blkCnt = blockSize >> 2; - - while(blkCnt > 0u) - { - in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8); - in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8); - in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8); - in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8); - - *__SIMD32(pOut)++ = __PACKq7(in1, in2, in3, in4); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, - remaining samples are processed in the below loop */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* BlockSize of Input samples are copied into the state buffer */ - /* StateIndex points to the starting position to write in the state buffer */ - arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1, - blockSize); - - /* Loop over the number of taps. */ - tapCnt = numTaps; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb, - (int32_t) blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - /* Loop over the blockSize */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Perform multiplication and store in the scratch buffer */ - *pScratchOut++ = ((q31_t) * px++ * coeff); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 1u; - - while(tapCnt > 0u) - { - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb, - (int32_t) blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - /* Loop over the blockSize */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Perform Multiply-Accumulate */ - in = *pScratchOut + ((q31_t) * px++ * coeff); - *pScratchOut++ = in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = - ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if(readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement the tap loop counter */ - tapCnt--; - } - - /* All the output values are in pScratchOut buffer. - Convert them into 1.15 format, saturate and store in the destination buffer. */ - /* Loop over the blockSize. */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of FIR_Sparse group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c deleted file mode 100644 index 264e15ed9e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c +++ /dev/null @@ -1,440 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_iir_lattice_f32.c -* -* Description: Floating-point IIR Lattice filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters - * - * This set of functions implements lattice filters - * for Q15, Q31 and floating-point data types. Lattice filters are used in a - * variety of adaptive filter applications. The filter structure has feedforward and - * feedback components and the net impulse response is infinite length. - * The functions operate on blocks - * of input and output data and each call to the function processes - * blockSize samples through the filter. pSrc and - * pDst point to input and output arrays containing blockSize values. - - * \par Algorithm: - * \image html IIRLattice.gif "Infinite Impulse Response Lattice filter" - *
    
- *    fN(n)   =  x(n)    
- *    fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ...1    
- *    gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1    
- *    y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)    
- * 
- * \par - * pkCoeffs points to array of reflection coefficients of size numStages. - * Reflection coefficients are stored in time-reversed order. - * \par - *
    
- *    {kN, kN-1, ....k1}    
- * 
- * pvCoeffs points to the array of ladder coefficients of size (numStages+1). - * Ladder coefficients are stored in time-reversed order. - * \par - *
    
- *    {vN, vN-1, ...v0}    
- * 
- * pState points to a state array of size numStages + blockSize. - * The state variables shown in the figure above (the g values) are stored in the pState array. - * The state variables are updated after each block of data is processed; the coefficients are untouched. - * \par Instance Structure - * The coefficients and state variables for a filter are stored together in an instance data structure. - * A separate instance structure must be defined for each filter. - * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Zeros out the values in the state buffer. - * - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows: - *
    
- *arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- *arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- *arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- * 
- * \par - * where numStages is the number of stages in the filter; pState points to the state buffer array; - * pkCoeffs points to array of the reflection coefficients; pvCoeffs points to the array of ladder coefficients. - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the IIR lattice filter functions. - * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - -/** - * @addtogroup IIR_Lattice - * @{ - */ - -/** - * @brief Processing function for the floating-point IIR lattice filter. - * @param[in] *S points to an instance of the floating-point IIR lattice structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - * @return none. - */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - -void arm_iir_lattice_f32( - const arm_iir_lattice_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t fnext1, gcurr1, gnext; /* Temporary variables for lattice stages */ - float32_t acc; /* Accumlator */ - uint32_t blkCnt, tapCnt; /* temporary variables for counts */ - float32_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */ - uint32_t numStages = S->numStages; /* number of stages */ - float32_t *pState; /* State pointer */ - float32_t *pStateCurnt; /* State current pointer */ - float32_t k1, k2; - float32_t v1, v2, v3, v4; - float32_t gcurr2; - float32_t fnext2; - - /* initialise loop count */ - blkCnt = blockSize; - - /* initialise state pointer */ - pState = &S->pState[0]; - - /* Sample processing */ - while(blkCnt > 0u) - { - /* Read Sample from input buffer */ - /* fN(n) = x(n) */ - fnext2 = *pSrc++; - - /* Initialize Ladder coeff pointer */ - pv = &S->pvCoeffs[0]; - /* Initialize Reflection coeff pointer */ - pk = &S->pkCoeffs[0]; - - /* Initialize state read pointer */ - px1 = pState; - /* Initialize state write pointer */ - px2 = pState; - - /* Set accumulator to zero */ - acc = 0.0; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = (numStages) >> 2; - - while(tapCnt > 0u) - { - /* Read gN-1(n-1) from state buffer */ - gcurr1 = *px1; - - /* read reflection coefficient kN */ - k1 = *pk; - - /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ - fnext1 = fnext2 - (k1 * gcurr1); - - /* read ladder coefficient vN */ - v1 = *pv; - - /* read next reflection coefficient kN-1 */ - k2 = *(pk + 1u); - - /* Read gN-2(n-1) from state buffer */ - gcurr2 = *(px1 + 1u); - - /* read next ladder coefficient vN-1 */ - v2 = *(pv + 1u); - - /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */ - fnext2 = fnext1 - (k2 * gcurr2); - - /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ - gnext = gcurr1 + (k1 * fnext1); - - /* read reflection coefficient kN-2 */ - k1 = *(pk + 2u); - - /* write gN(n) into state for next sample processing */ - *px2++ = gnext; - - /* Read gN-3(n-1) from state buffer */ - gcurr1 = *(px1 + 2u); - - /* y(n) += gN(n) * vN */ - acc += (gnext * v1); - - /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */ - fnext1 = fnext2 - (k1 * gcurr1); - - /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */ - gnext = gcurr2 + (k2 * fnext2); - - /* Read gN-4(n-1) from state buffer */ - gcurr2 = *(px1 + 3u); - - /* y(n) += gN-1(n) * vN-1 */ - acc += (gnext * v2); - - /* read reflection coefficient kN-3 */ - k2 = *(pk + 3u); - - /* write gN-1(n) into state for next sample processing */ - *px2++ = gnext; - - /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */ - fnext2 = fnext1 - (k2 * gcurr2); - - /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */ - gnext = gcurr1 + (k1 * fnext1); - - /* read ladder coefficient vN-2 */ - v3 = *(pv + 2u); - - /* y(n) += gN-2(n) * vN-2 */ - acc += (gnext * v3); - - /* write gN-2(n) into state for next sample processing */ - *px2++ = gnext; - - /* update pointer */ - pk += 4u; - - /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */ - gnext = (fnext2 * k2) + gcurr2; - - /* read next ladder coefficient vN-3 */ - v4 = *(pv + 3u); - - /* y(n) += gN-4(n) * vN-4 */ - acc += (gnext * v4); - - /* write gN-3(n) into state for next sample processing */ - *px2++ = gnext; - - /* update pointers */ - px1 += 4u; - pv += 4u; - - tapCnt--; - - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = (numStages) % 0x4u; - - while(tapCnt > 0u) - { - gcurr1 = *px1++; - /* Process sample for last taps */ - fnext1 = fnext2 - ((*pk) * gcurr1); - gnext = (fnext1 * (*pk++)) + gcurr1; - /* Output samples for last taps */ - acc += (gnext * (*pv++)); - *px2++ = gnext; - fnext2 = fnext1; - - tapCnt--; - - } - - /* y(n) += g0(n) * v0 */ - acc += (fnext2 * (*pv)); - - *px2++ = fnext2; - - /* write out into pDst */ - *pDst++ = acc; - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 1u; - - blkCnt--; - - } - - /* Processing is complete. Now copy last S->numStages samples to start of the buffer - for the preperation of next frame process */ - - /* Points to the start of the state buffer */ - pStateCurnt = &S->pState[0]; - pState = &S->pState[blockSize]; - - tapCnt = numStages >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - - } - - /* Calculate remaining number of copies */ - tapCnt = (numStages) % 0x4u; - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } -} - -#else - -void arm_iir_lattice_f32( - const arm_iir_lattice_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t fcurr, fnext = 0, gcurr, gnext; /* Temporary variables for lattice stages */ - float32_t acc; /* Accumlator */ - uint32_t blkCnt, tapCnt; /* temporary variables for counts */ - float32_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */ - uint32_t numStages = S->numStages; /* number of stages */ - float32_t *pState; /* State pointer */ - float32_t *pStateCurnt; /* State current pointer */ - - - /* Run the below code for Cortex-M0 */ - - blkCnt = blockSize; - - pState = &S->pState[0]; - - /* Sample processing */ - while(blkCnt > 0u) - { - /* Read Sample from input buffer */ - /* fN(n) = x(n) */ - fcurr = *pSrc++; - - /* Initialize state read pointer */ - px1 = pState; - /* Initialize state write pointer */ - px2 = pState; - /* Set accumulator to zero */ - acc = 0.0f; - /* Initialize Ladder coeff pointer */ - pv = &S->pvCoeffs[0]; - /* Initialize Reflection coeff pointer */ - pk = &S->pkCoeffs[0]; - - - /* Process sample for numStages */ - tapCnt = numStages; - - while(tapCnt > 0u) - { - gcurr = *px1++; - /* Process sample for last taps */ - fnext = fcurr - ((*pk) * gcurr); - gnext = (fnext * (*pk++)) + gcurr; - - /* Output samples for last taps */ - acc += (gnext * (*pv++)); - *px2++ = gnext; - fcurr = fnext; - - /* Decrementing loop counter */ - tapCnt--; - - } - - /* y(n) += g0(n) * v0 */ - acc += (fnext * (*pv)); - - *px2++ = fnext; - - /* write out into pDst */ - *pDst++ = acc; - - /* Advance the state pointer by 1 to process the next group of samples */ - pState = pState + 1u; - blkCnt--; - - } - - /* Processing is complete. Now copy last S->numStages samples to start of the buffer - for the preperation of next frame process */ - - /* Points to the start of the state buffer */ - pStateCurnt = &S->pState[0]; - pState = &S->pState[blockSize]; - - tapCnt = numStages; - - /* Copy the data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} - -#endif /* #ifndef ARM_MATH_CM0 */ - - -/** - * @} end of IIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c deleted file mode 100644 index e2227e3e5b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c +++ /dev/null @@ -1,86 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_iir_lattice_init_f32.c -* -* Description: Floating-point IIR lattice filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup IIR_Lattice - * @{ - */ - -/** - * @brief Initialization function for the floating-point IIR lattice filter. - * @param[in] *S points to an instance of the floating-point IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages. - * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1. - * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize. - * @param[in] blockSize number of samples to process. - * @return none. - */ - -void arm_iir_lattice_init_f32( - arm_iir_lattice_instance_f32 * S, - uint16_t numStages, - float32_t * pkCoeffs, - float32_t * pvCoeffs, - float32_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign reflection coefficient pointer */ - S->pkCoeffs = pkCoeffs; - - /* Assign ladder coefficient pointer */ - S->pvCoeffs = pvCoeffs; - - /* Clear state buffer and size is always blockSize + numStages */ - memset(pState, 0, (numStages + blockSize) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - - -} - - /** - * @} end of IIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c deleted file mode 100644 index 618505c2cb..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c +++ /dev/null @@ -1,86 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_iir_lattice_init_q15.c -* -* Description: Q15 IIR lattice filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup IIR_Lattice - * @{ - */ - - /** - * @brief Initialization function for the Q15 IIR lattice filter. - * @param[in] *S points to an instance of the Q15 IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages. - * @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1. - * @param[in] *pState points to state buffer. The array is of length numStages+blockSize. - * @param[in] blockSize number of samples to process per call. - * @return none. - */ - -void arm_iir_lattice_init_q15( - arm_iir_lattice_instance_q15 * S, - uint16_t numStages, - q15_t * pkCoeffs, - q15_t * pvCoeffs, - q15_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign reflection coefficient pointer */ - S->pkCoeffs = pkCoeffs; - - /* Assign ladder coefficient pointer */ - S->pvCoeffs = pvCoeffs; - - /* Clear state buffer and size is always blockSize + numStages */ - memset(pState, 0, (numStages + blockSize) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - - -} - -/** - * @} end of IIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c deleted file mode 100644 index 85d18e6697..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c +++ /dev/null @@ -1,86 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_iir_lattice_init_q31.c -* -* Description: Initialization function for the Q31 IIR lattice filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup IIR_Lattice - * @{ - */ - - /** - * @brief Initialization function for the Q31 IIR lattice filter. - * @param[in] *S points to an instance of the Q31 IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages. - * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1. - * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize. - * @param[in] blockSize number of samples to process. - * @return none. - */ - -void arm_iir_lattice_init_q31( - arm_iir_lattice_instance_q31 * S, - uint16_t numStages, - q31_t * pkCoeffs, - q31_t * pvCoeffs, - q31_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign reflection coefficient pointer */ - S->pkCoeffs = pkCoeffs; - - /* Assign ladder coefficient pointer */ - S->pvCoeffs = pvCoeffs; - - /* Clear state buffer and size is always blockSize + numStages */ - memset(pState, 0, (numStages + blockSize) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; - - -} - -/** - * @} end of IIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c deleted file mode 100644 index a706ae1331..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c +++ /dev/null @@ -1,457 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_iir_lattice_q15.c -* -* Description: Q15 IIR lattice filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup IIR_Lattice - * @{ - */ - -/** - * @brief Processing function for the Q15 IIR lattice filter. - * @param[in] *S points to an instance of the Q15 IIR lattice structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * \par - * The function is implemented using a 64-bit internal accumulator. - * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - * Lastly, the accumulator is saturated to yield a result in 1.15 format. - */ - -void arm_iir_lattice_q15( - const arm_iir_lattice_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t fcurr, fnext, gcurr = 0, gnext; /* Temporary variables for lattice stages */ - q15_t gnext1, gnext2; /* Temporary variables for lattice stages */ - uint32_t stgCnt; /* Temporary variables for counts */ - q63_t acc; /* Accumlator */ - uint32_t blkCnt, tapCnt; /* Temporary variables for counts */ - q15_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */ - uint32_t numStages = S->numStages; /* number of stages */ - q15_t *pState; /* State pointer */ - q15_t *pStateCurnt; /* State current pointer */ - q15_t out; /* Temporary variable for output */ - q15_t v1, v2; - q31_t v; /* Temporary variable for ladder coefficient */ - - - blkCnt = blockSize; - - pState = &S->pState[0]; - - /* Sample processing */ - while(blkCnt > 0u) - { - /* Read Sample from input buffer */ - /* fN(n) = x(n) */ - fcurr = *pSrc++; - - /* Initialize state read pointer */ - px1 = pState; - /* Initialize state write pointer */ - px2 = pState; - /* Set accumulator to zero */ - acc = 0; - /* Initialize Ladder coeff pointer */ - pv = &S->pvCoeffs[0]; - /* Initialize Reflection coeff pointer */ - pk = &S->pkCoeffs[0]; - - - /* Process sample for first tap */ - gcurr = *px1++; - /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ - fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); - fnext = __SSAT(fnext, 16); - /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ - gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; - gnext = __SSAT(gnext, 16); - /* write gN(n) into state for next sample processing */ - *px2++ = (q15_t) gnext; - /* y(n) += gN(n) * vN */ - acc += (q31_t) ((gnext * (*pv++))); - - - /* Update f values for next coefficient processing */ - fcurr = fnext; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = (numStages - 1u) >> 2; - - while(tapCnt > 0u) - { - - /* Process sample for 2nd, 6th ...taps */ - /* Read gN-2(n-1) from state buffer */ - gcurr = *px1++; - /* Process sample for 2nd, 6th .. taps */ - /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */ - fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); - fnext = __SSAT(fnext, 16); - /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */ - gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; - gnext1 = (q15_t) __SSAT(gnext, 16); - /* write gN-1(n) into state */ - *px2++ = (q15_t) gnext1; - - - /* Process sample for 3nd, 7th ...taps */ - /* Read gN-3(n-1) from state */ - gcurr = *px1++; - /* Process sample for 3rd, 7th .. taps */ - /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */ - fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15); - fcurr = __SSAT(fcurr, 16); - /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */ - gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr; - gnext2 = (q15_t) __SSAT(gnext, 16); - /* write gN-2(n) into state */ - *px2++ = (q15_t) gnext2; - - /* Read vN-1 and vN-2 at a time */ -#ifndef UNALIGNED_SUPPORT_DISABLE - - v = *__SIMD32(pv)++; - -#else - - v1 = *pv++; - v2 = *pv++; - -#ifndef ARM_MATH_BIG_ENDIAN - - v = __PKHBT(v1, v2, 16); - -#else - - v = __PKHBT(v2, v1, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - - /* Pack gN-1(n) and gN-2(n) */ - -#ifndef ARM_MATH_BIG_ENDIAN - - gnext = __PKHBT(gnext1, gnext2, 16); - -#else - - gnext = __PKHBT(gnext2, gnext1, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* y(n) += gN-1(n) * vN-1 */ - /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */ - /* y(n) += gN-2(n) * vN-2 */ - /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */ - acc = __SMLALD(gnext, v, acc); - - - /* Process sample for 4th, 8th ...taps */ - /* Read gN-4(n-1) from state */ - gcurr = *px1++; - /* Process sample for 4th, 8th .. taps */ - /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */ - fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); - fnext = __SSAT(fnext, 16); - /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */ - gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; - gnext1 = (q15_t) __SSAT(gnext, 16); - /* write gN-3(n) for the next sample process */ - *px2++ = (q15_t) gnext1; - - - /* Process sample for 5th, 9th ...taps */ - /* Read gN-5(n-1) from state */ - gcurr = *px1++; - /* Process sample for 5th, 9th .. taps */ - /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */ - fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15); - fcurr = __SSAT(fcurr, 16); - /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */ - gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr; - gnext2 = (q15_t) __SSAT(gnext, 16); - /* write gN-4(n) for the next sample process */ - *px2++ = (q15_t) gnext2; - - /* Read vN-3 and vN-4 at a time */ -#ifndef UNALIGNED_SUPPORT_DISABLE - - v = *__SIMD32(pv)++; - -#else - - v1 = *pv++; - v2 = *pv++; - -#ifndef ARM_MATH_BIG_ENDIAN - - v = __PKHBT(v1, v2, 16); - -#else - - v = __PKHBT(v2, v1, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - - /* Pack gN-3(n) and gN-4(n) */ -#ifndef ARM_MATH_BIG_ENDIAN - - gnext = __PKHBT(gnext1, gnext2, 16); - -#else - - gnext = __PKHBT(gnext2, gnext1, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* y(n) += gN-4(n) * vN-4 */ - /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */ - /* y(n) += gN-3(n) * vN-3 */ - /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */ - acc = __SMLALD(gnext, v, acc); - - tapCnt--; - - } - - fnext = fcurr; - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = (numStages - 1u) % 0x4u; - - while(tapCnt > 0u) - { - gcurr = *px1++; - /* Process sample for last taps */ - fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); - fnext = __SSAT(fnext, 16); - gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; - gnext = __SSAT(gnext, 16); - /* Output samples for last taps */ - acc += (q31_t) (((q31_t) gnext * (*pv++))); - *px2++ = (q15_t) gnext; - fcurr = fnext; - - tapCnt--; - } - - /* y(n) += g0(n) * v0 */ - acc += (q31_t) (((q31_t) fnext * (*pv++))); - - out = (q15_t) __SSAT(acc >> 15, 16); - *px2++ = (q15_t) fnext; - - /* write out into pDst */ - *pDst++ = out; - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 1u; - blkCnt--; - - } - - /* Processing is complete. Now copy last S->numStages samples to start of the buffer - for the preperation of next frame process */ - /* Points to the start of the state buffer */ - pStateCurnt = &S->pState[0]; - pState = &S->pState[blockSize]; - - stgCnt = (numStages >> 2u); - - /* copy data */ - while(stgCnt > 0u) - { -#ifndef UNALIGNED_SUPPORT_DISABLE - - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - -#else - - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Decrement the loop counter */ - stgCnt--; - - } - - /* Calculation of count for remaining q15_t data */ - stgCnt = (numStages) % 0x4u; - - /* copy data */ - while(stgCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - stgCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */ - uint32_t stgCnt; /* Temporary variables for counts */ - q63_t acc; /* Accumlator */ - uint32_t blkCnt, tapCnt; /* Temporary variables for counts */ - q15_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */ - uint32_t numStages = S->numStages; /* number of stages */ - q15_t *pState; /* State pointer */ - q15_t *pStateCurnt; /* State current pointer */ - q15_t out; /* Temporary variable for output */ - - - blkCnt = blockSize; - - pState = &S->pState[0]; - - /* Sample processing */ - while(blkCnt > 0u) - { - /* Read Sample from input buffer */ - /* fN(n) = x(n) */ - fcurr = *pSrc++; - - /* Initialize state read pointer */ - px1 = pState; - /* Initialize state write pointer */ - px2 = pState; - /* Set accumulator to zero */ - acc = 0; - /* Initialize Ladder coeff pointer */ - pv = &S->pvCoeffs[0]; - /* Initialize Reflection coeff pointer */ - pk = &S->pkCoeffs[0]; - - tapCnt = numStages; - - while(tapCnt > 0u) - { - gcurr = *px1++; - /* Process sample */ - /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ - fnext = fcurr - ((gcurr * (*pk)) >> 15); - fnext = __SSAT(fnext, 16); - /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ - gnext = ((fnext * (*pk++)) >> 15) + gcurr; - gnext = __SSAT(gnext, 16); - /* Output samples */ - /* y(n) += gN(n) * vN */ - acc += (q31_t) ((gnext * (*pv++))); - /* write gN(n) into state for next sample processing */ - *px2++ = (q15_t) gnext; - /* Update f values for next coefficient processing */ - fcurr = fnext; - - tapCnt--; - } - - /* y(n) += g0(n) * v0 */ - acc += (q31_t) ((fnext * (*pv++))); - - out = (q15_t) __SSAT(acc >> 15, 16); - *px2++ = (q15_t) fnext; - - /* write out into pDst */ - *pDst++ = out; - - /* Advance the state pointer by 1 to process the next group of samples */ - pState = pState + 1u; - blkCnt--; - - } - - /* Processing is complete. Now copy last S->numStages samples to start of the buffer - for the preperation of next frame process */ - /* Points to the start of the state buffer */ - pStateCurnt = &S->pState[0]; - pState = &S->pState[blockSize]; - - stgCnt = numStages; - - /* copy data */ - while(stgCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - stgCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - - - - -/** - * @} end of IIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c deleted file mode 100644 index cff10f872e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c +++ /dev/null @@ -1,345 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_iir_lattice_q31.c -* -* Description: Q31 IIR lattice filter processing function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup IIR_Lattice - * @{ - */ - -/** - * @brief Processing function for the Q31 IIR lattice filter. - * @param[in] *S points to an instance of the Q31 IIR lattice structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around rather than clip. - * In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits. - * After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format. - */ - -void arm_iir_lattice_q31( - const arm_iir_lattice_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */ - q63_t acc; /* Accumlator */ - uint32_t blkCnt, tapCnt; /* Temporary variables for counts */ - q31_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */ - uint32_t numStages = S->numStages; /* number of stages */ - q31_t *pState; /* State pointer */ - q31_t *pStateCurnt; /* State current pointer */ - - blkCnt = blockSize; - - pState = &S->pState[0]; - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Sample processing */ - while(blkCnt > 0u) - { - /* Read Sample from input buffer */ - /* fN(n) = x(n) */ - fcurr = *pSrc++; - - /* Initialize state read pointer */ - px1 = pState; - /* Initialize state write pointer */ - px2 = pState; - /* Set accumulator to zero */ - acc = 0; - /* Initialize Ladder coeff pointer */ - pv = &S->pvCoeffs[0]; - /* Initialize Reflection coeff pointer */ - pk = &S->pkCoeffs[0]; - - - /* Process sample for first tap */ - gcurr = *px1++; - /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ - fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31)); - /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ - gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); - /* write gN-1(n-1) into state for next sample processing */ - *px2++ = gnext; - /* y(n) += gN(n) * vN */ - acc += ((q63_t) gnext * *pv++); - - /* Update f values for next coefficient processing */ - fcurr = fnext; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = (numStages - 1u) >> 2; - - while(tapCnt > 0u) - { - - /* Process sample for 2nd, 6th .. taps */ - /* Read gN-2(n-1) from state buffer */ - gcurr = *px1++; - /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */ - fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31)); - /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */ - gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); - /* y(n) += gN-1(n) * vN-1 */ - /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */ - acc += ((q63_t) gnext * *pv++); - /* write gN-1(n) into state for next sample processing */ - *px2++ = gnext; - - /* Process sample for 3nd, 7th ...taps */ - /* Read gN-3(n-1) from state buffer */ - gcurr = *px1++; - /* Process sample for 3rd, 7th .. taps */ - /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */ - fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31)); - /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */ - gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31)); - /* y(n) += gN-2(n) * vN-2 */ - /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */ - acc += ((q63_t) gnext * *pv++); - /* write gN-2(n) into state for next sample processing */ - *px2++ = gnext; - - - /* Process sample for 4th, 8th ...taps */ - /* Read gN-4(n-1) from state buffer */ - gcurr = *px1++; - /* Process sample for 4th, 8th .. taps */ - /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */ - fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31)); - /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */ - gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); - /* y(n) += gN-3(n) * vN-3 */ - /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */ - acc += ((q63_t) gnext * *pv++); - /* write gN-3(n) into state for next sample processing */ - *px2++ = gnext; - - - /* Process sample for 5th, 9th ...taps */ - /* Read gN-5(n-1) from state buffer */ - gcurr = *px1++; - /* Process sample for 5th, 9th .. taps */ - /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */ - fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31)); - /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */ - gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31)); - /* y(n) += gN-4(n) * vN-4 */ - /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */ - acc += ((q63_t) gnext * *pv++); - /* write gN-4(n) into state for next sample processing */ - *px2++ = gnext; - - tapCnt--; - - } - - fnext = fcurr; - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = (numStages - 1u) % 0x4u; - - while(tapCnt > 0u) - { - gcurr = *px1++; - /* Process sample for last taps */ - fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31)); - gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); - /* Output samples for last taps */ - acc += ((q63_t) gnext * *pv++); - *px2++ = gnext; - fcurr = fnext; - - tapCnt--; - - } - - /* y(n) += g0(n) * v0 */ - acc += (q63_t) fnext *( - *pv++); - - *px2++ = fnext; - - /* write out into pDst */ - *pDst++ = (q31_t) (acc >> 31u); - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 1u; - blkCnt--; - - } - - /* Processing is complete. Now copy last S->numStages samples to start of the buffer - for the preperation of next frame process */ - - /* Points to the start of the state buffer */ - pStateCurnt = &S->pState[0]; - pState = &S->pState[blockSize]; - - tapCnt = numStages >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - - } - - /* Calculate remaining number of copies */ - tapCnt = (numStages) % 0x4u; - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - }; - -#else - - /* Run the below code for Cortex-M0 */ - /* Sample processing */ - while(blkCnt > 0u) - { - /* Read Sample from input buffer */ - /* fN(n) = x(n) */ - fcurr = *pSrc++; - - /* Initialize state read pointer */ - px1 = pState; - /* Initialize state write pointer */ - px2 = pState; - /* Set accumulator to zero */ - acc = 0; - /* Initialize Ladder coeff pointer */ - pv = &S->pvCoeffs[0]; - /* Initialize Reflection coeff pointer */ - pk = &S->pkCoeffs[0]; - - tapCnt = numStages; - - while(tapCnt > 0u) - { - gcurr = *px1++; - /* Process sample */ - /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ - fnext = - clip_q63_to_q31(((q63_t) fcurr - - ((q31_t) (((q63_t) gcurr * (*pk)) >> 31)))); - /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ - gnext = - clip_q63_to_q31(((q63_t) gcurr + - ((q31_t) (((q63_t) fnext * (*pk++)) >> 31)))); - /* Output samples */ - /* y(n) += gN(n) * vN */ - acc += ((q63_t) gnext * *pv++); - /* write gN-1(n-1) into state for next sample processing */ - *px2++ = gnext; - /* Update f values for next coefficient processing */ - fcurr = fnext; - - tapCnt--; - } - - /* y(n) += g0(n) * v0 */ - acc += (q63_t) fnext *( - *pv++); - - *px2++ = fnext; - - /* write out into pDst */ - *pDst++ = (q31_t) (acc >> 31u); - - /* Advance the state pointer by 1 to process the next group of samples */ - pState = pState + 1u; - blkCnt--; - - } - - /* Processing is complete. Now copy last S->numStages samples to start of the buffer - for the preperation of next frame process */ - - /* Points to the start of the state buffer */ - pStateCurnt = &S->pState[0]; - pState = &S->pState[blockSize]; - - tapCnt = numStages; - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - - - - -/** - * @} end of IIR_Lattice group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c deleted file mode 100644 index ca804ed101..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c +++ /dev/null @@ -1,434 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_f32.c -* -* Description: Processing function for the floating-point LMS filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup LMS Least Mean Square (LMS) Filters - * - * LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions. - * LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal. - * Adaptive filters are often used in communication systems, equalizers, and noise removal. - * The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types. - * The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal. - * - * An LMS filter consists of two components as shown below. - * The first component is a standard transversal or FIR filter. - * The second component is a coefficient update mechanism. - * The LMS filter has two input signals. - * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter. - * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input. - * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input. - * This "error signal" tends towards zero as the filter adapts. - * The LMS processing functions accept the input and reference input signals and generate the filter output and error signal. - * \image html LMS.gif "Internal structure of the Least Mean Square filter" - * - * The functions operate on blocks of data and each call to the function processes - * blockSize samples through the filter. - * pSrc points to input signal, pRef points to reference signal, - * pOut points to output signal and pErr points to error signal. - * All arrays contain blockSize values. - * - * The functions operate on a block-by-block basis. - * Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. - * The convergence of the LMS filter is slower compared to the normalized LMS algorithm. - * - * \par Algorithm: - * The output signal y[n] is computed by a standard FIR filter: - *
    
- *     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
- * - * \par - * The error signal equals the difference between the reference signal d[n] and the filter output: - *
    
- *     e[n] = d[n] - y[n].    
- * 
- * - * \par - * After each sample of the error signal is computed, the filter coefficients b[k] are updated on a sample-by-sample basis: - *
    
- *     b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1    
- * 
- * where mu is the step size and controls the rate of coefficient convergence. - *\par - * In the APIs, pCoeffs points to a coefficient array of size numTaps. - * Coefficients are stored in time reversed order. - * \par - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * \par - * pState points to a state array of size numTaps + blockSize - 1. - * Samples in the state buffer are stored in the order: - * \par - *
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
- * \par - * Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples. - * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, - * to be avoided and yields a significant speed improvement. - * The state variables are updated after each block of data is processed. - * \par Instance Structure - * The coefficients and state variables for a filter are stored together in an instance data structure. - * A separate instance structure must be defined for each filter and - * coefficient and state arrays cannot be shared among instances. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Zeros out the values in the state buffer. - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Set the values in the state buffer to zeros before static initialization. - * The code below statically initializes each of the 3 different data type filter instance structures - *
    
- *    arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};    
- *    arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};    
- *    arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};    
- * 
- * where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer; - * pCoeffs is the address of the coefficient buffer; mu is the step size parameter; and postShift is the shift applied to coefficients. - * - * \par Fixed-Point Behavior: - * Care must be taken when using the Q15 and Q31 versions of the LMS filter. - * The following issues must be considered: - * - Scaling of coefficients - * - Overflow and saturation - * - * \par Scaling of Coefficients: - * Filter coefficients are represented as fractional values and - * coefficients are restricted to lie in the range [-1 +1). - * The fixed-point functions have an additional scaling parameter postShift. - * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. - * This essentially scales the filter coefficients by 2^postShift and - * allows the filter coefficients to exceed the range [+1 -1). - * The value of postShift is set by the user based on the expected gain through the system being modeled. - * - * \par Overflow and Saturation: - * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are - * described separately as part of the function specific documentation below. - */ - -/** - * @addtogroup LMS - * @{ - */ - -/** - * @details - * This function operates on floating-point data types. - * - * @brief Processing function for floating-point LMS filter. - * @param[in] *S points to an instance of the floating-point LMS filter structure. - * @param[in] *pSrc points to the block of input data. - * @param[in] *pRef points to the block of reference data. - * @param[out] *pOut points to the block of output data. - * @param[out] *pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - * @return none. - */ - -void arm_lms_f32( - const arm_lms_instance_f32 * S, - float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - float32_t mu = S->mu; /* Adaptive factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - float32_t sum, e, d; /* accumulator, error, reference data sample */ - float32_t w = 0.0f; /* weight factor */ - - e = 0.0f; - d = 0.0f; - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - blkCnt = blockSize; - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - while(blkCnt > 0u) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Set the accumulator to zero */ - sum = 0.0f; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - sum += (*px++) * (*pb++); - sum += (*px++) * (*pb++); - sum += (*px++) * (*pb++); - sum += (*px++) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - sum += (*px++) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result in the accumulator, store in the destination buffer. */ - *pOut++ = sum; - - /* Compute and store error */ - d = (float32_t) (*pRef++); - e = d - sum; - *pErr++ = e; - - /* Calculation of Weighting factor for the updating filter coefficients */ - w = e * mu; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Update filter coefficients */ - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - *pb = *pb + (w * (*px++)); - pb++; - - *pb = *pb + (w * (*px++)); - pb++; - - *pb = *pb + (w * (*px++)); - pb++; - - *pb = *pb + (w * (*px++)); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - *pb = *pb + (w * (*px++)); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - satrt of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Loop unrolling for (numTaps - 1u) samples copy */ - tapCnt = (numTaps - 1u) >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - while(blkCnt > 0u) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize pCoeffs pointer */ - pb = pCoeffs; - - /* Set the accumulator to zero */ - sum = 0.0f; - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - sum += (*px++) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is stored in the destination buffer. */ - *pOut++ = sum; - - /* Compute and store error */ - d = (float32_t) (*pRef++); - e = d - sum; - *pErr++ = e; - - /* Weighting factor for the LMS version */ - w = e * mu; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize pCoeffs pointer */ - pb = pCoeffs; - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - *pb = *pb + (w * (*px++)); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - * start of the state buffer. This prepares the state buffer for the - * next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Copy (numTaps - 1u) samples */ - tapCnt = (numTaps - 1u); - - /* Copy the data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of LMS group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c deleted file mode 100644 index 8030ba334b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c +++ /dev/null @@ -1,90 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_init_f32.c -* -* Description: Floating-point LMS filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @addtogroup LMS - * @{ - */ - - /** - * @brief Initialization function for floating-point LMS filter. - * @param[in] *S points to an instance of the floating-point LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] *pCoeffs points to the coefficient buffer. - * @param[in] *pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @return none. - */ - -/** - * \par Description: - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * The initial filter coefficients serve as a starting point for the adaptive filter. - * pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32(). - */ - -void arm_lms_init_f32( - arm_lms_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - float32_t mu, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps */ - memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; -} - -/** - * @} end of LMS group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c deleted file mode 100644 index e6dbf3467b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c +++ /dev/null @@ -1,100 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_init_q15.c -* -* Description: Q15 LMS filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup LMS - * @{ - */ - -/** -* @brief Initialization function for the Q15 LMS filter. -* @param[in] *S points to an instance of the Q15 LMS filter structure. -* @param[in] numTaps number of filter coefficients. -* @param[in] *pCoeffs points to the coefficient buffer. -* @param[in] *pState points to the state buffer. -* @param[in] mu step size that controls filter coefficient updates. -* @param[in] blockSize number of samples to process. -* @param[in] postShift bit shift applied to coefficients. -* @return none. -* -* \par Description: -* pCoeffs points to the array of filter coefficients stored in time reversed order: -*
    
-*    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
-* 
-* The initial filter coefficients serve as a starting point for the adaptive filter. -* pState points to the array of state variables and size of array is -* numTaps+blockSize-1 samples, where blockSize is the number of -* input samples processed by each call to arm_lms_q15(). -*/ - -void arm_lms_init_q15( - arm_lms_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - q15_t mu, - uint32_t blockSize, - uint32_t postShift) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps - 1 */ - memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; - - /* Assign postShift value to be applied */ - S->postShift = postShift; - -} - -/** - * @} end of LMS group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c deleted file mode 100644 index bb3dfcb2a8..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c +++ /dev/null @@ -1,100 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_init_q31.c -* -* Description: Q31 LMS filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup LMS - * @{ - */ - - /** - * @brief Initialization function for Q31 LMS filter. - * @param[in] *S points to an instance of the Q31 LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] *pCoeffs points to coefficient buffer. - * @param[in] *pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - * @return none. - * - * \par Description: - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * The initial filter coefficients serve as a starting point for the adaptive filter. - * pState points to an array of length numTaps+blockSize-1 samples, - * where blockSize is the number of input samples processed by each call to - * arm_lms_q31(). - */ - -void arm_lms_init_q31( - arm_lms_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - q31_t mu, - uint32_t blockSize, - uint32_t postShift) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps - 1 */ - memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1u)) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; - - /* Assign postShift value to be applied */ - S->postShift = postShift; - -} - -/** - * @} end of LMS group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c deleted file mode 100644 index 3237f0f1b6..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c +++ /dev/null @@ -1,456 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_norm_f32.c -* -* Description: Processing function for the floating-point Normalised LMS. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @defgroup LMS_NORM Normalized LMS Filters - * - * This set of functions implements a commonly used adaptive filter. - * It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization - * factor which increases the adaptation rate of the filter. - * The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types. - * - * A normalized least mean square (NLMS) filter consists of two components as shown below. - * The first component is a standard transversal or FIR filter. - * The second component is a coefficient update mechanism. - * The NLMS filter has two input signals. - * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter. - * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input. - * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input. - * This "error signal" tends towards zero as the filter adapts. - * The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal. - * \image html LMS.gif "Internal structure of the NLMS adaptive filter" - * - * The functions operate on blocks of data and each call to the function processes - * blockSize samples through the filter. - * pSrc points to input signal, pRef points to reference signal, - * pOut points to output signal and pErr points to error signal. - * All arrays contain blockSize values. - * - * The functions operate on a block-by-block basis. - * Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. - * The convergence of the LMS filter is slower compared to the normalized LMS algorithm. - * - * \par Algorithm: - * The output signal y[n] is computed by a standard FIR filter: - *
    
- *     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
- * - * \par - * The error signal equals the difference between the reference signal d[n] and the filter output: - *
    
- *     e[n] = d[n] - y[n].    
- * 
- * - * \par - * After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated: - *
    
- *    E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.    
- * 
- * The filter coefficients b[k] are then updated on a sample-by-sample basis: - *
    
- *     b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1    
- * 
- * where mu is the step size and controls the rate of coefficient convergence. - *\par - * In the APIs, pCoeffs points to a coefficient array of size numTaps. - * Coefficients are stored in time reversed order. - * \par - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * \par - * pState points to a state array of size numTaps + blockSize - 1. - * Samples in the state buffer are stored in the order: - * \par - *
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
- * \par - * Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples. - * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, - * to be avoided and yields a significant speed improvement. - * The state variables are updated after each block of data is processed. - * \par Instance Structure - * The coefficients and state variables for a filter are stored together in an instance data structure. - * A separate instance structure must be defined for each filter and - * coefficient and state arrays cannot be shared among instances. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Zeros out the values in the state buffer. - * \par - * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. - * \par Fixed-Point Behavior: - * Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter. - * The following issues must be considered: - * - Scaling of coefficients - * - Overflow and saturation - * - * \par Scaling of Coefficients: - * Filter coefficients are represented as fractional values and - * coefficients are restricted to lie in the range [-1 +1). - * The fixed-point functions have an additional scaling parameter postShift. - * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. - * This essentially scales the filter coefficients by 2^postShift and - * allows the filter coefficients to exceed the range [+1 -1). - * The value of postShift is set by the user based on the expected gain through the system being modeled. - * - * \par Overflow and Saturation: - * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are - * described separately as part of the function specific documentation below. - */ - - -/** - * @addtogroup LMS_NORM - * @{ - */ - - - /** - * @brief Processing function for floating-point normalized LMS filter. - * @param[in] *S points to an instance of the floating-point normalized LMS filter structure. - * @param[in] *pSrc points to the block of input data. - * @param[in] *pRef points to the block of reference data. - * @param[out] *pOut points to the block of output data. - * @param[out] *pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - * @return none. - */ - -void arm_lms_norm_f32( - arm_lms_norm_instance_f32 * S, - float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - float32_t mu = S->mu; /* Adaptive factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - float32_t energy; /* Energy of the input */ - float32_t sum, e, d; /* accumulator, error, reference data sample */ - float32_t w, x0, in; /* weight factor, temporary variable to hold input sample and state */ - - /* Initializations of error, difference, Coefficient update */ - e = 0.0f; - d = 0.0f; - w = 0.0f; - - energy = S->energy; - x0 = S->x0; - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - while(blkCnt > 0u) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Read the sample from input buffer */ - in = *pSrc++; - - /* Update the energy calculation */ - energy -= x0 * x0; - energy += in * in; - - /* Set the accumulator to zero */ - sum = 0.0f; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - sum += (*px++) * (*pb++); - sum += (*px++) * (*pb++); - sum += (*px++) * (*pb++); - sum += (*px++) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - sum += (*px++) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result in the accumulator, store in the destination buffer. */ - *pOut++ = sum; - - /* Compute and store error */ - d = (float32_t) (*pRef++); - e = d - sum; - *pErr++ = e; - - /* Calculation of Weighting factor for updating filter coefficients */ - /* epsilon value 0.000000119209289f */ - w = (e * mu) / (energy + 0.000000119209289f); - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Update filter coefficients */ - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - *pb += w * (*px++); - pb++; - - *pb += w * (*px++); - pb++; - - *pb += w * (*px++); - pb++; - - *pb += w * (*px++); - pb++; - - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - *pb += w * (*px++); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - x0 = *pState; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - S->energy = energy; - S->x0 = x0; - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - satrt of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Loop unrolling for (numTaps - 1u)/4 samples copy */ - tapCnt = (numTaps - 1u) >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - while(blkCnt > 0u) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize pCoeffs pointer */ - pb = pCoeffs; - - /* Read the sample from input buffer */ - in = *pSrc++; - - /* Update the energy calculation */ - energy -= x0 * x0; - energy += in * in; - - /* Set the accumulator to zero */ - sum = 0.0f; - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - sum += (*px++) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result in the accumulator is stored in the destination buffer. */ - *pOut++ = sum; - - /* Compute and store error */ - d = (float32_t) (*pRef++); - e = d - sum; - *pErr++ = e; - - /* Calculation of Weighting factor for updating filter coefficients */ - /* epsilon value 0.000000119209289f */ - w = (e * mu) / (energy + 0.000000119209289f); - - /* Initialize pState pointer */ - px = pState; - - /* Initialize pCcoeffs pointer */ - pb = pCoeffs; - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - *pb += w * (*px++); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - x0 = *pState; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - S->energy = energy; - S->x0 = x0; - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - satrt of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Copy (numTaps - 1u) samples */ - tapCnt = (numTaps - 1u); - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of LMS_NORM group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c deleted file mode 100644 index 6b7b6289e7..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c +++ /dev/null @@ -1,100 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_norm_init_f32.c -* -* Description: Floating-point NLMS filter initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup LMS_NORM - * @{ - */ - - /** - * @brief Initialization function for floating-point normalized LMS filter. - * @param[in] *S points to an instance of the floating-point LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] *pCoeffs points to coefficient buffer. - * @param[in] *pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @return none. - * - * \par Description: - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * The initial filter coefficients serve as a starting point for the adaptive filter. - * pState points to an array of length numTaps+blockSize-1 samples, - * where blockSize is the number of input samples processed by each call to arm_lms_norm_f32(). - */ - -void arm_lms_norm_init_f32( - arm_lms_norm_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - float32_t mu, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps - 1 */ - memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; - - /* Initialise Energy to zero */ - S->energy = 0.0f; - - /* Initialise x0 to zero */ - S->x0 = 0.0f; - -} - -/** - * @} end of LMS_NORM group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c deleted file mode 100644 index a70e97bffa..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c +++ /dev/null @@ -1,107 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_norm_init_q15.c -* -* Description: Q15 NLMS initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @addtogroup LMS_NORM - * @{ - */ - - /** - * @brief Initialization function for Q15 normalized LMS filter. - * @param[in] *S points to an instance of the Q15 normalized LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] *pCoeffs points to coefficient buffer. - * @param[in] *pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - * @return none. - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * The initial filter coefficients serve as a starting point for the adaptive filter. - * pState points to the array of state variables and size of array is - * numTaps+blockSize-1 samples, where blockSize is the number of input samples processed - * by each call to arm_lms_norm_q15(). - */ - -void arm_lms_norm_init_q15( - arm_lms_norm_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - q15_t mu, - uint32_t blockSize, - uint8_t postShift) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps - 1 */ - memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t)); - - /* Assign post Shift value applied to coefficients */ - S->postShift = postShift; - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; - - /* Initialize reciprocal pointer table */ - S->recipTable = (q15_t *) armRecipTableQ15; - - /* Initialise Energy to zero */ - S->energy = 0; - - /* Initialise x0 to zero */ - S->x0 = 0; - -} - -/** - * @} end of LMS_NORM group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c deleted file mode 100644 index b539ecf92c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c +++ /dev/null @@ -1,106 +0,0 @@ -/*----------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_norm_init_q31.c -* -* Description: Q31 NLMS initialization function. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------*/ - -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @addtogroup LMS_NORM - * @{ - */ - - /** - * @brief Initialization function for Q31 normalized LMS filter. - * @param[in] *S points to an instance of the Q31 normalized LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] *pCoeffs points to coefficient buffer. - * @param[in] *pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - * @return none. - * - * Description: - * \par - * pCoeffs points to the array of filter coefficients stored in time reversed order: - *
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
- * The initial filter coefficients serve as a starting point for the adaptive filter. - * pState points to an array of length numTaps+blockSize-1 samples, - * where blockSize is the number of input samples processed by each call to arm_lms_norm_q31(). - */ - -void arm_lms_norm_init_q31( - arm_lms_norm_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - q31_t mu, - uint32_t blockSize, - uint8_t postShift) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps - 1 */ - memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t)); - - /* Assign post Shift value applied to coefficients */ - S->postShift = postShift; - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; - - /* Initialize reciprocal pointer table */ - S->recipTable = (q31_t *) armRecipTableQ31; - - /* Initialise Energy to zero */ - S->energy = 0; - - /* Initialise x0 to zero */ - S->x0 = 0; - -} - -/** - * @} end of LMS_NORM group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c deleted file mode 100644 index 13f36a066c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c +++ /dev/null @@ -1,435 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_norm_q15.c -* -* Description: Q15 NLMS filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup LMS_NORM - * @{ - */ - -/** -* @brief Processing function for Q15 normalized LMS filter. -* @param[in] *S points to an instance of the Q15 normalized LMS filter structure. -* @param[in] *pSrc points to the block of input data. -* @param[in] *pRef points to the block of reference data. -* @param[out] *pOut points to the block of output data. -* @param[out] *pErr points to the block of error data. -* @param[in] blockSize number of samples to process. -* @return none. -* -* Scaling and Overflow Behavior: -* \par -* The function is implemented using a 64-bit internal accumulator. -* Both coefficients and state variables are represented in 1.15 format and -* multiplications yield a 2.30 result. The 2.30 intermediate results are -* accumulated in a 64-bit accumulator in 34.30 format. -* There is no risk of internal overflow with this approach and the full -* precision of intermediate multiplications is preserved. After all additions -* have been performed, the accumulator is truncated to 34.15 format by -* discarding low 15 bits. Lastly, the accumulator is saturated to yield a -* result in 1.15 format. -* -* \par -* In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted. -* - */ - -void arm_lms_norm_q15( - arm_lms_norm_instance_q15 * S, - q15_t * pSrc, - q15_t * pRef, - q15_t * pOut, - q15_t * pErr, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - q15_t mu = S->mu; /* Adaptive factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - q31_t energy; /* Energy of the input */ - q63_t acc; /* Accumulator */ - q15_t e = 0, d = 0; /* error, reference data sample */ - q15_t w = 0, in; /* weight factor and state */ - q15_t x0; /* temporary variable to hold input sample */ - //uint32_t shift = (uint32_t) S->postShift + 1u; /* Shift to be applied to the output */ - q15_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu product and reciprocal of energy */ - q15_t postShift; /* Post shift to be applied to weight after reciprocal calculation */ - q31_t coef; /* Teporary variable for coefficient */ - q31_t acc_l, acc_h; - int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ - int32_t uShift = (32 - lShift); - - energy = S->energy; - x0 = S->x0; - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - while(blkCnt > 0u) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Read the sample from input buffer */ - in = *pSrc++; - - /* Update the energy calculation */ - energy -= (((q31_t) x0 * (x0)) >> 15); - energy += (((q31_t) in * (in)) >> 15); - - /* Set the accumulator to zero */ - acc = 0; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - while(tapCnt > 0u) - { - - /* Perform the multiply-accumulate */ -#ifndef UNALIGNED_SUPPORT_DISABLE - - acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc); - acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc); - -#else - - acc += (((q31_t) * px++ * (*pb++))); - acc += (((q31_t) * px++ * (*pb++))); - acc += (((q31_t) * px++ * (*pb++))); - acc += (((q31_t) * px++ * (*pb++))); - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - acc += (((q31_t) * px++ * (*pb++))); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Converting the result to 1.15 format and saturate the output */ - acc = __SSAT(acc, 16u); - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = (q15_t) acc; - - /* Compute and store error */ - d = *pRef++; - e = d - (q15_t) acc; - *pErr++ = e; - - /* Calculation of 1/energy */ - postShift = arm_recip_q15((q15_t) energy + DELTA_Q15, - &oneByEnergy, S->recipTable); - - /* Calculation of e * mu value */ - errorXmu = (q15_t) (((q31_t) e * mu) >> 15); - - /* Calculation of (e * mu) * (1/energy) value */ - acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift)); - - /* Weighting factor for the normalized version */ - w = (q15_t) __SSAT((q31_t) acc, 16); - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Update filter coefficients */ - while(tapCnt > 0u) - { - coef = *pb + (((q31_t) w * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - coef = *pb + (((q31_t) w * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - coef = *pb + (((q31_t) w * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - coef = *pb + (((q31_t) w * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - coef = *pb + (((q31_t) w * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Read the sample from state buffer */ - x0 = *pState; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Save energy and x0 values for the next frame */ - S->energy = (q15_t) energy; - S->x0 = x0; - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - satrt of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Calculation of count for copying integer writes */ - tapCnt = (numTaps - 1u) >> 2; - - while(tapCnt > 0u) - { - -#ifndef UNALIGNED_SUPPORT_DISABLE - - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - -#else - - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - -#endif - - tapCnt--; - - } - - /* Calculation of count for remaining q15_t data */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - while(blkCnt > 0u) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize pCoeffs pointer */ - pb = pCoeffs; - - /* Read the sample from input buffer */ - in = *pSrc++; - - /* Update the energy calculation */ - energy -= (((q31_t) x0 * (x0)) >> 15); - energy += (((q31_t) in * (in)) >> 15); - - /* Set the accumulator to zero */ - acc = 0; - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - acc += (((q31_t) * px++ * (*pb++))); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Converting the result to 1.15 format and saturate the output */ - acc = __SSAT(acc, 16u); - - /* Converting the result to 1.15 format */ - //acc = __SSAT((acc >> (16u - shift)), 16u); - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = (q15_t) acc; - - /* Compute and store error */ - d = *pRef++; - e = d - (q15_t) acc; - *pErr++ = e; - - /* Calculation of 1/energy */ - postShift = arm_recip_q15((q15_t) energy + DELTA_Q15, - &oneByEnergy, S->recipTable); - - /* Calculation of e * mu value */ - errorXmu = (q15_t) (((q31_t) e * mu) >> 15); - - /* Calculation of (e * mu) * (1/energy) value */ - acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift)); - - /* Weighting factor for the normalized version */ - w = (q15_t) __SSAT((q31_t) acc, 16); - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - coef = *pb + (((q31_t) w * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Read the sample from state buffer */ - x0 = *pState; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Save energy and x0 values for the next frame */ - S->energy = (q15_t) energy; - S->x0 = x0; - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - satrt of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* copy (numTaps - 1u) data */ - tapCnt = (numTaps - 1u); - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - - -/** - * @} end of LMS_NORM group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c deleted file mode 100644 index fee7015b0b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c +++ /dev/null @@ -1,426 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_norm_q31.c -* -* Description: Processing function for the Q31 NLMS filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup LMS_NORM - * @{ - */ - -/** -* @brief Processing function for Q31 normalized LMS filter. -* @param[in] *S points to an instance of the Q31 normalized LMS filter structure. -* @param[in] *pSrc points to the block of input data. -* @param[in] *pRef points to the block of reference data. -* @param[out] *pOut points to the block of output data. -* @param[out] *pErr points to the block of error data. -* @param[in] blockSize number of samples to process. -* @return none. -* -* Scaling and Overflow Behavior: -* \par -* The function is implemented using an internal 64-bit accumulator. -* The accumulator has a 2.62 format and maintains full precision of the intermediate -* multiplication results but provides only a single guard bit. -* Thus, if the accumulator result overflows it wraps around rather than clip. -* In order to avoid overflows completely the input signal must be scaled down by -* log2(numTaps) bits. The reference signal should not be scaled down. -* After all multiply-accumulates are performed, the 2.62 accumulator is shifted -* and saturated to 1.31 format to yield the final result. -* The output signal and error signal are in 1.31 format. -* -* \par -* In this filter, filter coefficients are updated for each sample and the -* updation of filter cofficients are saturted. -* -*/ - -void arm_lms_norm_q31( - arm_lms_norm_instance_q31 * S, - q31_t * pSrc, - q31_t * pRef, - q31_t * pOut, - q31_t * pErr, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - q31_t mu = S->mu; /* Adaptive factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - q63_t energy; /* Energy of the input */ - q63_t acc; /* Accumulator */ - q31_t e = 0, d = 0; /* error, reference data sample */ - q31_t w = 0, in; /* weight factor and state */ - q31_t x0; /* temporary variable to hold input sample */ -// uint32_t shift = 32u - ((uint32_t) S->postShift + 1u); /* Shift to be applied to the output */ - q31_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu product and reciprocal of energy */ - q31_t postShift; /* Post shift to be applied to weight after reciprocal calculation */ - q31_t coef; /* Temporary variable for coef */ - q31_t acc_l, acc_h; /* temporary input */ - uint32_t uShift = ((uint32_t) S->postShift + 1u); - uint32_t lShift = 32u - uShift; /* Shift to be applied to the output */ - - energy = S->energy; - x0 = S->x0; - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - while(blkCnt > 0u) - { - - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Read the sample from input buffer */ - in = *pSrc++; - - /* Update the energy calculation */ - energy = (q31_t) ((((q63_t) energy << 32) - - (((q63_t) x0 * x0) << 1)) >> 32); - energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32); - - /* Set the accumulator to zero */ - acc = 0; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - acc += ((q63_t) (*px++)) * (*pb++); - acc += ((q63_t) (*px++)) * (*pb++); - acc += ((q63_t) (*px++)) * (*pb++); - acc += ((q63_t) (*px++)) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Converting the result to 1.31 format */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = (q31_t) acc; - - /* Compute and store error */ - d = *pRef++; - e = d - (q31_t) acc; - *pErr++ = e; - - /* Calculates the reciprocal of energy */ - postShift = arm_recip_q31(energy + DELTA_Q31, - &oneByEnergy, &S->recipTable[0]); - - /* Calculation of product of (e * mu) */ - errorXmu = (q31_t) (((q63_t) e * mu) >> 31); - - /* Weighting factor for the normalized version */ - w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift)); - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Update filter coefficients */ - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - - /* coef is in 2.30 format */ - coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); - /* get coef in 1.31 format by left shifting */ - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u)); - /* update coefficient buffer to next coefficient */ - pb++; - - coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u)); - pb++; - - coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u)); - pb++; - - coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u)); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u)); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Read the sample from state buffer */ - x0 = *pState; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Save energy and x0 values for the next frame */ - S->energy = (q31_t) energy; - S->x0 = x0; - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - satrt of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Loop unrolling for (numTaps - 1u) samples copy */ - tapCnt = (numTaps - 1u) >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - while(blkCnt > 0u) - { - - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize pCoeffs pointer */ - pb = pCoeffs; - - /* Read the sample from input buffer */ - in = *pSrc++; - - /* Update the energy calculation */ - energy = - (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32); - energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32); - - /* Set the accumulator to zero */ - acc = 0; - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Converting the result to 1.31 format */ - /* Converting the result to 1.31 format */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - - //acc = (q31_t) (acc >> shift); - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = (q31_t) acc; - - /* Compute and store error */ - d = *pRef++; - e = d - (q31_t) acc; - *pErr++ = e; - - /* Calculates the reciprocal of energy */ - postShift = - arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]); - - /* Calculation of product of (e * mu) */ - errorXmu = (q31_t) (((q63_t) e * mu) >> 31); - - /* Weighting factor for the normalized version */ - w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift)); - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - /* coef is in 2.30 format */ - coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); - /* get coef in 1.31 format by left shifting */ - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u)); - /* update coefficient buffer to next coefficient */ - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Read the sample from state buffer */ - x0 = *pState; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Save energy and x0 values for the next frame */ - S->energy = (q31_t) energy; - S->x0 = x0; - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - start of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Loop for (numTaps - 1u) samples copy */ - tapCnt = (numTaps - 1u); - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of LMS_NORM group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c deleted file mode 100644 index bb225d3c2e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c +++ /dev/null @@ -1,374 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_q15.c -* -* Description: Processing function for the Q15 LMS filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup LMS - * @{ - */ - - /** - * @brief Processing function for Q15 LMS filter. - * @param[in] *S points to an instance of the Q15 LMS filter structure. - * @param[in] *pSrc points to the block of input data. - * @param[in] *pRef points to the block of reference data. - * @param[out] *pOut points to the block of output data. - * @param[out] *pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - * @return none. - * - * \par Scaling and Overflow Behavior: - * The function is implemented using a 64-bit internal accumulator. - * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - * Lastly, the accumulator is saturated to yield a result in 1.15 format. - * - * \par - * In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted. - * - */ - -void arm_lms_q15( - const arm_lms_instance_q15 * S, - q15_t * pSrc, - q15_t * pRef, - q15_t * pOut, - q15_t * pErr, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t mu = S->mu; /* Adaptive factor */ - q15_t *px; /* Temporary pointer for state */ - q15_t *pb; /* Temporary pointer for coefficient buffer */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - q63_t acc; /* Accumulator */ - q15_t e = 0; /* error of data sample */ - q15_t alpha; /* Intermediate constant for taps update */ - q31_t acc_l, acc_h; - int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ - int32_t uShift = (32 - lShift); - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t coef; /* Teporary variable for coefficient */ - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Initializing blkCnt with blockSize */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Set the accumulator to zero */ - acc = 0; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2u; - - while(tapCnt > 0u) - { - /* acc += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ - /* Perform the multiply-accumulate */ -#ifndef UNALIGNED_SUPPORT_DISABLE - - acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc); - acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc); - -#else - - acc += (q63_t) (((q31_t) (*px++) * (*pb++))); - acc += (q63_t) (((q31_t) (*px++) * (*pb++))); - acc += (q63_t) (((q31_t) (*px++) * (*pb++))); - acc += (q63_t) (((q31_t) (*px++) * (*pb++))); - - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - acc += (q63_t) (((q31_t) (*px++) * (*pb++))); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Converting the result to 1.15 format and saturate the output */ - acc = __SSAT(acc, 16); - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = (q15_t) acc; - - /* Compute and store error */ - e = *pRef++ - (q15_t) acc; - - *pErr++ = (q15_t) e; - - /* Compute alpha i.e. intermediate constant for taps update */ - alpha = (q15_t) (((q31_t) e * (mu)) >> 15); - - /* Initialize state pointer */ - /* Advance state pointer by 1 for the next sample */ - px = pState++; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2u; - - /* Update filter coefficients */ - while(tapCnt > 0u) - { - coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Decrement the loop counter */ - blkCnt--; - - } - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - satrt of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Calculation of count for copying integer writes */ - tapCnt = (numTaps - 1u) >> 2; - - while(tapCnt > 0u) - { - -#ifndef UNALIGNED_SUPPORT_DISABLE - - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; - *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++; -#else - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; -#endif - - tapCnt--; - - } - - /* Calculation of count for remaining q15_t data */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize pCoeffs pointer */ - pb = pCoeffs; - - /* Set the accumulator to zero */ - acc = 0; - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - acc += (q63_t) ((q31_t) (*px++) * (*pb++)); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Converting the result to 1.15 format and saturate the output */ - acc = __SSAT(acc, 16); - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = (q15_t) acc; - - /* Compute and store error */ - e = *pRef++ - (q15_t) acc; - - *pErr++ = (q15_t) e; - - /* Compute alpha i.e. intermediate constant for taps update */ - alpha = (q15_t) (((q31_t) e * (mu)) >> 15); - - /* Initialize pState pointer */ - /* Advance state pointer by 1 for the next sample */ - px = pState++; - - /* Initialize pCoeffs pointer */ - pb = pCoeffs; - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - *pb++ += (q15_t) (((q31_t) alpha * (*px++)) >> 15); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Decrement the loop counter */ - blkCnt--; - - } - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - start of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Copy (numTaps - 1u) samples */ - tapCnt = (numTaps - 1u); - - /* Copy the data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of LMS group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c deleted file mode 100644 index 96ae9ecf65..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c +++ /dev/null @@ -1,364 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_lms_q31.c -* -* Description: Processing function for the Q31 LMS filter. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" -/** - * @ingroup groupFilters - */ - -/** - * @addtogroup LMS - * @{ - */ - - /** - * @brief Processing function for Q31 LMS filter. - * @param[in] *S points to an instance of the Q15 LMS filter structure. - * @param[in] *pSrc points to the block of input data. - * @param[in] *pRef points to the block of reference data. - * @param[out] *pOut points to the block of output data. - * @param[out] *pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - * @return none. - * - * \par Scaling and Overflow Behavior: - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate - * multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around rather than clips. - * In order to avoid overflows completely the input signal must be scaled down by - * log2(numTaps) bits. - * The reference signal should not be scaled down. - * After all multiply-accumulates are performed, the 2.62 accumulator is shifted - * and saturated to 1.31 format to yield the final result. - * The output signal and error signal are in 1.31 format. - * - * \par - * In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted. - */ - -void arm_lms_q31( - const arm_lms_instance_q31 * S, - q31_t * pSrc, - q31_t * pRef, - q31_t * pOut, - q31_t * pErr, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t mu = S->mu; /* Adaptive factor */ - q31_t *px; /* Temporary pointer for state */ - q31_t *pb; /* Temporary pointer for coefficient buffer */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - q63_t acc; /* Accumulator */ - q31_t e = 0; /* error of data sample */ - q31_t alpha; /* Intermediate constant for taps update */ - q31_t coef; /* Temporary variable for coef */ - q31_t acc_l, acc_h; /* temporary input */ - uint32_t uShift = ((uint32_t) S->postShift + 1u); - uint32_t lShift = 32u - uShift; /* Shift to be applied to the output */ - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1u)]); - - /* Initializing blkCnt with blockSize */ - blkCnt = blockSize; - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - while(blkCnt > 0u) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Set the accumulator to zero */ - acc = 0; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - /* acc += b[N] * x[n-N] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* acc += b[N-1] * x[n-N-1] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* acc += b[N-2] * x[n-N-2] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* acc += b[N-3] * x[n-N-3] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Converting the result to 1.31 format */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = (q31_t) acc; - - /* Compute and store error */ - e = *pRef++ - (q31_t) acc; - - *pErr++ = (q31_t) e; - - /* Compute alpha i.e. intermediate constant for taps update */ - alpha = (q31_t) (((q63_t) e * mu) >> 31); - - /* Initialize state pointer */ - /* Advance state pointer by 1 for the next sample */ - px = pState++; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Update filter coefficients */ - while(tapCnt > 0u) - { - /* coef is in 2.30 format */ - coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); - /* get coef in 1.31 format by left shifting */ - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u)); - /* update coefficient buffer to next coefficient */ - pb++; - - coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u)); - pb++; - - coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u)); - pb++; - - coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u)); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4u; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u)); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - satrt of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Loop unrolling for (numTaps - 1u) samples copy */ - tapCnt = (numTaps - 1u) >> 2u; - - /* copy data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1u) % 0x4u; - - /* Copy the remaining q31_t data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - while(blkCnt > 0u) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize pCoeffs pointer */ - pb = pCoeffs; - - /* Set the accumulator to zero */ - acc = 0; - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Converting the result to 1.31 format */ - /* Store the result from accumulator into the destination buffer. */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - *pOut++ = (q31_t) acc; - - /* Compute and store error */ - e = *pRef++ - (q31_t) acc; - - *pErr++ = (q31_t) e; - - /* Weighting factor for the LMS version */ - alpha = (q31_t) (((q63_t) e * mu) >> 31); - - /* Initialize pState pointer */ - /* Advance state pointer by 1 for the next sample */ - px = pState++; - - /* Initialize pCoeffs pointer */ - pb = pCoeffs; - - /* Loop over numTaps number of values */ - tapCnt = numTaps; - - while(tapCnt > 0u) - { - /* Perform the multiply-accumulate */ - coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); - *pb += (coef << 1u); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - start of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Copy (numTaps - 1u) samples */ - tapCnt = (numTaps - 1u); - - /* Copy the data */ - while(tapCnt > 0u) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of LMS group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvopt deleted file mode 100644 index 0740c1eb79..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvopt +++ /dev/null @@ -1,3937 +0,0 @@ - - - - 1.0 - -
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvproj deleted file mode 100644 index 6c370a47d6..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvproj +++ /dev/null @@ -1,3253 +0,0 @@ - - - - 1.1 - -
### uVision Project, (C) Keil Software
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- - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - 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1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "Cortex-M0" - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 3 - 2 - 1 - - -fno-strict-aliasing -ffunction-sections - ARM_MATH_CM0, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE - - ..\..\..\Include - - - - 0 - 0 - - - - - - - - - 1 - 0 - 1 - 0 - 1 - - - - - - -Wl,--gc-sections - - - - - - - BasicMathFunctions - - - arm_abs_f32.c - 1 - ../BasicMathFunctions/arm_abs_f32.c - - - arm_abs_q7.c - 1 - ../BasicMathFunctions/arm_abs_q7.c - - - arm_abs_q15.c - 1 - ../BasicMathFunctions/arm_abs_q15.c - - - arm_abs_q31.c - 1 - ../BasicMathFunctions/arm_abs_q31.c - - - arm_add_f32.c - 1 - ../BasicMathFunctions/arm_add_f32.c - - - arm_add_q7.c - 1 - ../BasicMathFunctions/arm_add_q7.c - - - arm_add_q15.c - 1 - ../BasicMathFunctions/arm_add_q15.c - - - arm_add_q31.c - 1 - ../BasicMathFunctions/arm_add_q31.c - - - arm_dot_prod_f32.c - 1 - ../BasicMathFunctions/arm_dot_prod_f32.c - - - arm_dot_prod_q7.c - 1 - ../BasicMathFunctions/arm_dot_prod_q7.c - - - arm_dot_prod_q15.c - 1 - ../BasicMathFunctions/arm_dot_prod_q15.c - - - arm_dot_prod_q31.c - 1 - ../BasicMathFunctions/arm_dot_prod_q31.c - - - arm_mult_f32.c - 1 - ../BasicMathFunctions/arm_mult_f32.c - - - arm_mult_q7.c - 1 - ../BasicMathFunctions/arm_mult_q7.c - - - arm_mult_q15.c - 1 - ../BasicMathFunctions/arm_mult_q15.c - - - arm_mult_q31.c - 1 - ../BasicMathFunctions/arm_mult_q31.c - - - arm_negate_f32.c - 1 - ../BasicMathFunctions/arm_negate_f32.c - - - arm_negate_q7.c - 1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - 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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvopt deleted file mode 100644 index b56521505e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvopt +++ /dev/null @@ -1,3937 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvproj deleted file mode 100644 index 6ace95fc32..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvproj +++ /dev/null @@ -1,3253 +0,0 @@ - - - - 1.1 - -
### uVision Project, (C) Keil Software
- - - - DSP_Lib CM3 LE - 0x3 - ARM-GNU - - - Cortex-M3 - ARM - CLOCK(12000000) CPUTYPE("Cortex-M3") ESEL ELITTLE - - - - 4349 - - - - - - - - - - - - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\intermediateFiles\ - arm_cortexM3l_math - 0 - 1 - 0 - 1 - 0 - .\intermediateFiles\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 1 - 0 - cmd.exe /C copy ".\intermediateFiles\lib@L.a" "..\..\..\Lib\G++\" - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - - DCM.DLL - -pCM3 - SARMCM3.DLL - - TCM.DLL - -pCM3 - - - - 1 - 0 - 0 - 0 - 16 - - - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 0 - - - 0 - 0 - 0 - 1 - 1 - 1 - 0 - 1 - - 0 - -1 - - - - - - - - - - - - - - - - - - - 1 - 0 - 0 - 0 - 0 - -1 - - - - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "Cortex-M3" - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 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1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - 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1 - ../SupportFunctions/arm_copy_q15.c - - - arm_copy_q31.c - 1 - ../SupportFunctions/arm_copy_q31.c - - - arm_fill_f32.c - 1 - ../SupportFunctions/arm_fill_f32.c - - - arm_fill_q7.c - 1 - ../SupportFunctions/arm_fill_q7.c - - - arm_fill_q15.c - 1 - ../SupportFunctions/arm_fill_q15.c - - - arm_fill_q31.c - 1 - ../SupportFunctions/arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ../SupportFunctions/arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ../SupportFunctions/arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ../SupportFunctions/arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ../SupportFunctions/arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ../SupportFunctions/arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ../SupportFunctions/arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ../SupportFunctions/arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ../SupportFunctions/arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ../SupportFunctions/arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ../SupportFunctions/arm_q31_to_float.c - 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1 - 1 - 1 - 0 - 1 - 1 - 0 - "Cortex-M3" - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 3 - 2 - 1 - - -fno-strict-aliasing -ffunction-sections - ARM_MATH_CM3, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE - - ..\..\..\Include - - - - 0 - 0 - - - - - - - - - 1 - 0 - 1 - 0 - 1 - - - - - - -Wl,--gc-sections - - - - - - - BasicMathFunctions - - - arm_abs_f32.c - 1 - ../BasicMathFunctions/arm_abs_f32.c - - - arm_abs_q7.c - 1 - ../BasicMathFunctions/arm_abs_q7.c - - - arm_abs_q15.c - 1 - ../BasicMathFunctions/arm_abs_q15.c - - - arm_abs_q31.c - 1 - ../BasicMathFunctions/arm_abs_q31.c - - - arm_add_f32.c - 1 - ../BasicMathFunctions/arm_add_f32.c - - - arm_add_q7.c - 1 - ../BasicMathFunctions/arm_add_q7.c - - - arm_add_q15.c - 1 - ../BasicMathFunctions/arm_add_q15.c - - - arm_add_q31.c - 1 - ../BasicMathFunctions/arm_add_q31.c - - - arm_dot_prod_f32.c - 1 - ../BasicMathFunctions/arm_dot_prod_f32.c - - - arm_dot_prod_q7.c - 1 - ../BasicMathFunctions/arm_dot_prod_q7.c - - - arm_dot_prod_q15.c - 1 - ../BasicMathFunctions/arm_dot_prod_q15.c - - - arm_dot_prod_q31.c - 1 - ../BasicMathFunctions/arm_dot_prod_q31.c - - - arm_mult_f32.c - 1 - ../BasicMathFunctions/arm_mult_f32.c - - - arm_mult_q7.c - 1 - ../BasicMathFunctions/arm_mult_q7.c - - - arm_mult_q15.c - 1 - ../BasicMathFunctions/arm_mult_q15.c - - - arm_mult_q31.c - 1 - ../BasicMathFunctions/arm_mult_q31.c - - - arm_negate_f32.c - 1 - ../BasicMathFunctions/arm_negate_f32.c - - - arm_negate_q7.c - 1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - 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- - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - 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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvopt deleted file mode 100644 index 84e27482e5..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvopt +++ /dev/null @@ -1,4197 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvproj deleted file mode 100644 index 3c2a5e6adb..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvproj +++ /dev/null @@ -1,6495 +0,0 @@ - - - - 1.1 - -
### uVision Project, (C) Keil Software
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1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - - - arm_power_f32.c - 1 - ../StatisticsFunctions/arm_power_f32.c - - - arm_power_q7.c - 1 - ../StatisticsFunctions/arm_power_q7.c - - - arm_power_q15.c - 1 - ../StatisticsFunctions/arm_power_q15.c - - - arm_power_q31.c - 1 - ../StatisticsFunctions/arm_power_q31.c - - - arm_rms_f32.c - 1 - ../StatisticsFunctions/arm_rms_f32.c - - - arm_rms_q15.c - 1 - ../StatisticsFunctions/arm_rms_q15.c - - - arm_rms_q31.c - 1 - ../StatisticsFunctions/arm_rms_q31.c - - - arm_std_f32.c - 1 - ../StatisticsFunctions/arm_std_f32.c - - - arm_std_q15.c - 1 - ../StatisticsFunctions/arm_std_q15.c - - - arm_std_q31.c - 1 - ../StatisticsFunctions/arm_std_q31.c - - - arm_var_f32.c - 1 - ../StatisticsFunctions/arm_var_f32.c - - - arm_var_q15.c - 1 - ../StatisticsFunctions/arm_var_q15.c - - - arm_var_q31.c - 1 - ../StatisticsFunctions/arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ../SupportFunctions/arm_copy_f32.c - - - arm_copy_q7.c - 1 - ../SupportFunctions/arm_copy_q7.c - - - arm_copy_q15.c - 1 - ../SupportFunctions/arm_copy_q15.c - - - arm_copy_q31.c - 1 - ../SupportFunctions/arm_copy_q31.c - - - arm_fill_f32.c - 1 - ../SupportFunctions/arm_fill_f32.c - - - arm_fill_q7.c - 1 - ../SupportFunctions/arm_fill_q7.c - - - arm_fill_q15.c - 1 - ../SupportFunctions/arm_fill_q15.c - - - arm_fill_q31.c - 1 - ../SupportFunctions/arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ../SupportFunctions/arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ../SupportFunctions/arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ../SupportFunctions/arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ../SupportFunctions/arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ../SupportFunctions/arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ../SupportFunctions/arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ../SupportFunctions/arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ../SupportFunctions/arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ../SupportFunctions/arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ../SupportFunctions/arm_q31_to_float.c - - - arm_q31_to_q7.c - 1 - ../SupportFunctions/arm_q31_to_q7.c - - - arm_q31_to_q15.c - 1 - ../SupportFunctions/arm_q31_to_q15.c - - - - - CommonTables - - - arm_common_tables.c - 1 - ../CommonTables/arm_common_tables.c - - - - - - - DSP_Lib CM4 LE O2 - 0x3 - ARM-GNU - - - Cortex-M4 - ARM - CLOCK(12000000) CPUTYPE("Cortex-M4") ESEL ELITTLE - - - - 5125 - - - - - - - - - - - - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\intermediateFiles\ - arm_cortexM4l_math - 0 - 1 - 0 - 1 - 0 - .\intermediateFiles\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 1 - 0 - cmd.exe /C copy ".\intermediateFiles\lib@L.a" "..\..\..\Lib\G++\" - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - - DCM.DLL - -pCM4 - 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1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - 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1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - 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0 - 0 - - - 0 - 0 - - - 1 - 0 - cmd.exe /C copy ".\intermediateFiles\lib@L.a" "..\..\..\Lib\G++\" - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - - DCM.DLL - -pCM4 - SARMCM3.DLL - - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 0 - - - 0 - 0 - 0 - 1 - 1 - 1 - 0 - 1 - - 0 - -1 - - - - - - - - - - - - - - - - - - - 1 - 0 - 0 - 0 - 0 - -1 - - - "" () - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "Cortex-M4" - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 2 - 0 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 5 - 2 - 1 - - -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -fno-strict-aliasing -ffunction-sections - ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT = 1, UNALIGNED_SUPPORT_DISABLE - - ..\..\..\Include - - - - 0 - 0 - - - - - - - - - 1 - 0 - 1 - 0 - 1 - - - - - - -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -Wl,--gc-sections - - - - - - - BasicMathFunctions - - - arm_abs_f32.c - 1 - ../BasicMathFunctions/arm_abs_f32.c - - - arm_abs_q7.c - 1 - ../BasicMathFunctions/arm_abs_q7.c - - - arm_abs_q15.c - 1 - ../BasicMathFunctions/arm_abs_q15.c - - - arm_abs_q31.c - 1 - ../BasicMathFunctions/arm_abs_q31.c - - - arm_add_f32.c - 1 - ../BasicMathFunctions/arm_add_f32.c - - - arm_add_q7.c - 1 - ../BasicMathFunctions/arm_add_q7.c - - - arm_add_q15.c - 1 - ../BasicMathFunctions/arm_add_q15.c - - - arm_add_q31.c - 1 - ../BasicMathFunctions/arm_add_q31.c - - - arm_dot_prod_f32.c - 1 - ../BasicMathFunctions/arm_dot_prod_f32.c - - - arm_dot_prod_q7.c - 1 - ../BasicMathFunctions/arm_dot_prod_q7.c - - - arm_dot_prod_q15.c - 1 - ../BasicMathFunctions/arm_dot_prod_q15.c - - - arm_dot_prod_q31.c - 1 - ../BasicMathFunctions/arm_dot_prod_q31.c - - - arm_mult_f32.c - 1 - ../BasicMathFunctions/arm_mult_f32.c - - - arm_mult_q7.c - 1 - ../BasicMathFunctions/arm_mult_q7.c - - - arm_mult_q15.c - 1 - ../BasicMathFunctions/arm_mult_q15.c - - - arm_mult_q31.c - 1 - ../BasicMathFunctions/arm_mult_q31.c - - - arm_negate_f32.c - 1 - ../BasicMathFunctions/arm_negate_f32.c - - - arm_negate_q7.c - 1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - - - arm_power_f32.c - 1 - ../StatisticsFunctions/arm_power_f32.c - - - arm_power_q7.c - 1 - ../StatisticsFunctions/arm_power_q7.c - - - arm_power_q15.c - 1 - ../StatisticsFunctions/arm_power_q15.c - - - arm_power_q31.c - 1 - ../StatisticsFunctions/arm_power_q31.c - - - arm_rms_f32.c - 1 - ../StatisticsFunctions/arm_rms_f32.c - - - arm_rms_q15.c - 1 - ../StatisticsFunctions/arm_rms_q15.c - - - arm_rms_q31.c - 1 - ../StatisticsFunctions/arm_rms_q31.c - - - arm_std_f32.c - 1 - ../StatisticsFunctions/arm_std_f32.c - - - arm_std_q15.c - 1 - ../StatisticsFunctions/arm_std_q15.c - - - arm_std_q31.c - 1 - ../StatisticsFunctions/arm_std_q31.c - - - arm_var_f32.c - 1 - ../StatisticsFunctions/arm_var_f32.c - - - arm_var_q15.c - 1 - ../StatisticsFunctions/arm_var_q15.c - - - arm_var_q31.c - 1 - ../StatisticsFunctions/arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ../SupportFunctions/arm_copy_f32.c - - - arm_copy_q7.c - 1 - ../SupportFunctions/arm_copy_q7.c - - - arm_copy_q15.c - 1 - ../SupportFunctions/arm_copy_q15.c - - - arm_copy_q31.c - 1 - ../SupportFunctions/arm_copy_q31.c - - - arm_fill_f32.c - 1 - ../SupportFunctions/arm_fill_f32.c - - - arm_fill_q7.c - 1 - ../SupportFunctions/arm_fill_q7.c - - - arm_fill_q15.c - 1 - ../SupportFunctions/arm_fill_q15.c - - - arm_fill_q31.c - 1 - ../SupportFunctions/arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ../SupportFunctions/arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ../SupportFunctions/arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ../SupportFunctions/arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ../SupportFunctions/arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ../SupportFunctions/arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ../SupportFunctions/arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ../SupportFunctions/arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ../SupportFunctions/arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ../SupportFunctions/arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ../SupportFunctions/arm_q31_to_float.c - - - arm_q31_to_q7.c - 1 - ../SupportFunctions/arm_q31_to_q7.c - - - arm_q31_to_q15.c - 1 - ../SupportFunctions/arm_q31_to_q15.c - - - - - CommonTables - - - arm_common_tables.c - 1 - ../CommonTables/arm_common_tables.c - - - - - - - DSP_Lib CM4 LE FPU O2 - 0x3 - ARM-GNU - - - Cortex-M4 FPU - ARM - CLOCK(12000000) CPUTYPE("Cortex-M4") ESEL ELITTLE FPU2 - - - - 5237 - - - - - - - - - - - - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\intermediateFiles\ - arm_cortexM4lf_math - 0 - 1 - 0 - 1 - 0 - .\intermediateFiles\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 1 - 0 - cmd.exe /C copy ".\intermediateFiles\lib@L.a" "..\..\..\Lib\G++\" - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - - DCM.DLL - -pCM4 - SARMCM3.DLL - - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 0 - - - 0 - 0 - 0 - 1 - 1 - 1 - 0 - 1 - - 0 - -1 - - - - - - - - - - - - - - - - - - - 1 - 0 - 0 - 0 - 0 - -1 - - - "" () - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "Cortex-M4" - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 2 - 0 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 3 - 2 - 1 - - -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -fno-strict-aliasing -ffunction-sections - ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT = 1, UNALIGNED_SUPPORT_DISABLE - - ..\..\..\Include - - - - 0 - 0 - - - - - - - - - 1 - 0 - 1 - 0 - 1 - - - - - - -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -Wl,--gc-sections - - - - - - - BasicMathFunctions - - - arm_abs_f32.c - 1 - ../BasicMathFunctions/arm_abs_f32.c - - - arm_abs_q7.c - 1 - ../BasicMathFunctions/arm_abs_q7.c - - - arm_abs_q15.c - 1 - ../BasicMathFunctions/arm_abs_q15.c - - - arm_abs_q31.c - 1 - ../BasicMathFunctions/arm_abs_q31.c - - - arm_add_f32.c - 1 - ../BasicMathFunctions/arm_add_f32.c - - - arm_add_q7.c - 1 - ../BasicMathFunctions/arm_add_q7.c - - - arm_add_q15.c - 1 - ../BasicMathFunctions/arm_add_q15.c - - - arm_add_q31.c - 1 - ../BasicMathFunctions/arm_add_q31.c - - - arm_dot_prod_f32.c - 1 - ../BasicMathFunctions/arm_dot_prod_f32.c - - - arm_dot_prod_q7.c - 1 - ../BasicMathFunctions/arm_dot_prod_q7.c - - - arm_dot_prod_q15.c - 1 - ../BasicMathFunctions/arm_dot_prod_q15.c - - - arm_dot_prod_q31.c - 1 - ../BasicMathFunctions/arm_dot_prod_q31.c - - - arm_mult_f32.c - 1 - ../BasicMathFunctions/arm_mult_f32.c - - - arm_mult_q7.c - 1 - ../BasicMathFunctions/arm_mult_q7.c - - - arm_mult_q15.c - 1 - ../BasicMathFunctions/arm_mult_q15.c - - - arm_mult_q31.c - 1 - ../BasicMathFunctions/arm_mult_q31.c - - - arm_negate_f32.c - 1 - ../BasicMathFunctions/arm_negate_f32.c - - - arm_negate_q7.c - 1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - - - arm_power_f32.c - 1 - ../StatisticsFunctions/arm_power_f32.c - - - arm_power_q7.c - 1 - ../StatisticsFunctions/arm_power_q7.c - - - arm_power_q15.c - 1 - ../StatisticsFunctions/arm_power_q15.c - - - arm_power_q31.c - 1 - ../StatisticsFunctions/arm_power_q31.c - - - arm_rms_f32.c - 1 - ../StatisticsFunctions/arm_rms_f32.c - - - arm_rms_q15.c - 1 - ../StatisticsFunctions/arm_rms_q15.c - - - arm_rms_q31.c - 1 - ../StatisticsFunctions/arm_rms_q31.c - - - arm_std_f32.c - 1 - ../StatisticsFunctions/arm_std_f32.c - - - arm_std_q15.c - 1 - ../StatisticsFunctions/arm_std_q15.c - - - arm_std_q31.c - 1 - ../StatisticsFunctions/arm_std_q31.c - - - arm_var_f32.c - 1 - ../StatisticsFunctions/arm_var_f32.c - - - arm_var_q15.c - 1 - ../StatisticsFunctions/arm_var_q15.c - - - arm_var_q31.c - 1 - ../StatisticsFunctions/arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ../SupportFunctions/arm_copy_f32.c - - - arm_copy_q7.c - 1 - ../SupportFunctions/arm_copy_q7.c - - - arm_copy_q15.c - 1 - ../SupportFunctions/arm_copy_q15.c - - - arm_copy_q31.c - 1 - ../SupportFunctions/arm_copy_q31.c - - - arm_fill_f32.c - 1 - ../SupportFunctions/arm_fill_f32.c - - - arm_fill_q7.c - 1 - ../SupportFunctions/arm_fill_q7.c - - - arm_fill_q15.c - 1 - ../SupportFunctions/arm_fill_q15.c - - - arm_fill_q31.c - 1 - ../SupportFunctions/arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ../SupportFunctions/arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ../SupportFunctions/arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ../SupportFunctions/arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ../SupportFunctions/arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ../SupportFunctions/arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ../SupportFunctions/arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ../SupportFunctions/arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ../SupportFunctions/arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ../SupportFunctions/arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ../SupportFunctions/arm_q31_to_float.c - - - arm_q31_to_q7.c - 1 - ../SupportFunctions/arm_q31_to_q7.c - - - arm_q31_to_q15.c - 1 - ../SupportFunctions/arm_q31_to_q15.c - - - - - CommonTables - - - arm_common_tables.c - 1 - ../CommonTables/arm_common_tables.c - - - - - - - -
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexMx_math_Build.bat b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexMx_math_Build.bat deleted file mode 100644 index 007812c2d0..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexMx_math_Build.bat +++ /dev/null @@ -1,17 +0,0 @@ - -SET TMP=C:\Temp -SET TEMP=C:\Temp - -SET UVEXE=C:\Keil\UV4\UV4.EXE - -@echo Building DSP Library for Cortex-M0 Little Endian -%UVEXE% -rb arm_cortexM0x_math.uvproj -t"DSP_Lib CM0 LE" -o"DSP_Lib CM0 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M3 Little Endian -%UVEXE% -rb arm_cortexM3x_math.uvproj -t"DSP_Lib CM3 LE" -o"DSP_Lib CM3 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M4 Little Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE" -o"DSP_Lib CM4 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M4 with FPU Little Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE FPU" -o"DSP_Lib CM4 LE FPU.txt" -j0 diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM0x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM0x_math.uvopt deleted file mode 100644 index 6ecf373652..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM0x_math.uvopt +++ /dev/null @@ -1,3937 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
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- - arm_dot_prod_q15.c - 1 - ../BasicMathFunctions/arm_dot_prod_q15.c - - - arm_dot_prod_q31.c - 1 - ../BasicMathFunctions/arm_dot_prod_q31.c - - - arm_mult_f32.c - 1 - ../BasicMathFunctions/arm_mult_f32.c - - - arm_mult_q7.c - 1 - ../BasicMathFunctions/arm_mult_q7.c - - - arm_mult_q15.c - 1 - ../BasicMathFunctions/arm_mult_q15.c - - - arm_mult_q31.c - 1 - ../BasicMathFunctions/arm_mult_q31.c - - - arm_negate_f32.c - 1 - ../BasicMathFunctions/arm_negate_f32.c - - - arm_negate_q7.c - 1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - - - arm_power_f32.c - 1 - ../StatisticsFunctions/arm_power_f32.c - - - arm_power_q7.c - 1 - ../StatisticsFunctions/arm_power_q7.c - - - arm_power_q15.c - 1 - ../StatisticsFunctions/arm_power_q15.c - - - arm_power_q31.c - 1 - ../StatisticsFunctions/arm_power_q31.c - - - arm_rms_f32.c - 1 - ../StatisticsFunctions/arm_rms_f32.c - - - arm_rms_q15.c - 1 - ../StatisticsFunctions/arm_rms_q15.c - - - arm_rms_q31.c - 1 - ../StatisticsFunctions/arm_rms_q31.c - - - arm_std_f32.c - 1 - ../StatisticsFunctions/arm_std_f32.c - - - arm_std_q15.c - 1 - ../StatisticsFunctions/arm_std_q15.c - - - arm_std_q31.c - 1 - ../StatisticsFunctions/arm_std_q31.c - - - arm_var_f32.c - 1 - ../StatisticsFunctions/arm_var_f32.c - - - arm_var_q15.c - 1 - ../StatisticsFunctions/arm_var_q15.c - - - arm_var_q31.c - 1 - ../StatisticsFunctions/arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ../SupportFunctions/arm_copy_f32.c - - - arm_copy_q7.c - 1 - ../SupportFunctions/arm_copy_q7.c - - - arm_copy_q15.c - 1 - ../SupportFunctions/arm_copy_q15.c - - - arm_copy_q31.c - 1 - ../SupportFunctions/arm_copy_q31.c - - - arm_fill_f32.c - 1 - ../SupportFunctions/arm_fill_f32.c - - - arm_fill_q7.c - 1 - ../SupportFunctions/arm_fill_q7.c - - - arm_fill_q15.c - 1 - ../SupportFunctions/arm_fill_q15.c - - - arm_fill_q31.c - 1 - ../SupportFunctions/arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ../SupportFunctions/arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ../SupportFunctions/arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ../SupportFunctions/arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ../SupportFunctions/arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ../SupportFunctions/arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ../SupportFunctions/arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ../SupportFunctions/arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ../SupportFunctions/arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ../SupportFunctions/arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ../SupportFunctions/arm_q31_to_float.c - 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1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "Cortex-M0" - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 3 - 2 - 1 - - -fno-strict-aliasing -ffunction-sections - ARM_MATH_CM0, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE - - ..\..\..\Include - - - - 0 - 0 - - - - - - - - - 1 - 0 - 1 - 0 - 1 - - - - - - -Wl,--gc-sections - - - - - - - BasicMathFunctions - - - arm_abs_f32.c - 1 - ../BasicMathFunctions/arm_abs_f32.c - - - arm_abs_q7.c - 1 - ../BasicMathFunctions/arm_abs_q7.c - - - arm_abs_q15.c - 1 - ../BasicMathFunctions/arm_abs_q15.c - - - arm_abs_q31.c - 1 - ../BasicMathFunctions/arm_abs_q31.c - - - arm_add_f32.c - 1 - ../BasicMathFunctions/arm_add_f32.c - - - arm_add_q7.c - 1 - ../BasicMathFunctions/arm_add_q7.c - - - arm_add_q15.c - 1 - ../BasicMathFunctions/arm_add_q15.c - - - arm_add_q31.c - 1 - ../BasicMathFunctions/arm_add_q31.c - - - arm_dot_prod_f32.c - 1 - ../BasicMathFunctions/arm_dot_prod_f32.c - - - arm_dot_prod_q7.c - 1 - ../BasicMathFunctions/arm_dot_prod_q7.c - - - arm_dot_prod_q15.c - 1 - ../BasicMathFunctions/arm_dot_prod_q15.c - - - arm_dot_prod_q31.c - 1 - ../BasicMathFunctions/arm_dot_prod_q31.c - - - arm_mult_f32.c - 1 - ../BasicMathFunctions/arm_mult_f32.c - - - arm_mult_q7.c - 1 - ../BasicMathFunctions/arm_mult_q7.c - - - arm_mult_q15.c - 1 - ../BasicMathFunctions/arm_mult_q15.c - - - arm_mult_q31.c - 1 - ../BasicMathFunctions/arm_mult_q31.c - - - arm_negate_f32.c - 1 - ../BasicMathFunctions/arm_negate_f32.c - - - arm_negate_q7.c - 1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - 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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM3x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM3x_math.uvopt deleted file mode 100644 index 8e5a82fd8e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM3x_math.uvopt +++ /dev/null @@ -1,3937 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM3x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM3x_math.uvproj deleted file mode 100644 index a32c386769..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM3x_math.uvproj +++ /dev/null @@ -1,3253 +0,0 @@ - - - - 1.1 - -
### uVision Project, (C) Keil Software
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1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - - - arm_power_f32.c - 1 - ../StatisticsFunctions/arm_power_f32.c - - - arm_power_q7.c - 1 - ../StatisticsFunctions/arm_power_q7.c - - - arm_power_q15.c - 1 - ../StatisticsFunctions/arm_power_q15.c - - - arm_power_q31.c - 1 - ../StatisticsFunctions/arm_power_q31.c - - - arm_rms_f32.c - 1 - ../StatisticsFunctions/arm_rms_f32.c - - - arm_rms_q15.c - 1 - ../StatisticsFunctions/arm_rms_q15.c - - - arm_rms_q31.c - 1 - ../StatisticsFunctions/arm_rms_q31.c - - - arm_std_f32.c - 1 - ../StatisticsFunctions/arm_std_f32.c - - - arm_std_q15.c - 1 - ../StatisticsFunctions/arm_std_q15.c - - - arm_std_q31.c - 1 - ../StatisticsFunctions/arm_std_q31.c - - - arm_var_f32.c - 1 - ../StatisticsFunctions/arm_var_f32.c - - - arm_var_q15.c - 1 - ../StatisticsFunctions/arm_var_q15.c - - - arm_var_q31.c - 1 - ../StatisticsFunctions/arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ../SupportFunctions/arm_copy_f32.c - - - arm_copy_q7.c - 1 - ../SupportFunctions/arm_copy_q7.c - - - arm_copy_q15.c - 1 - ../SupportFunctions/arm_copy_q15.c - - - arm_copy_q31.c - 1 - ../SupportFunctions/arm_copy_q31.c - - - arm_fill_f32.c - 1 - ../SupportFunctions/arm_fill_f32.c - - - arm_fill_q7.c - 1 - ../SupportFunctions/arm_fill_q7.c - - - arm_fill_q15.c - 1 - ../SupportFunctions/arm_fill_q15.c - - - arm_fill_q31.c - 1 - ../SupportFunctions/arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ../SupportFunctions/arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ../SupportFunctions/arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ../SupportFunctions/arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ../SupportFunctions/arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ../SupportFunctions/arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ../SupportFunctions/arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ../SupportFunctions/arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ../SupportFunctions/arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ../SupportFunctions/arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ../SupportFunctions/arm_q31_to_float.c - - - arm_q31_to_q7.c - 1 - ../SupportFunctions/arm_q31_to_q7.c - - - arm_q31_to_q15.c - 1 - ../SupportFunctions/arm_q31_to_q15.c - - - - - CommonTables - - - arm_common_tables.c - 1 - ../CommonTables/arm_common_tables.c - - - - - - - DSP_Lib CM3 LE O2 - 0x3 - ARM-GNU - - - Cortex-M3 - ARM - CLOCK(12000000) CPUTYPE("Cortex-M3") ESEL ELITTLE - - - - 4349 - - - - - - - - - - - - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\intermediateFiles\ - arm_cortexM3l_math - 0 - 1 - 0 - 1 - 0 - .\intermediateFiles\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 1 - 0 - cmd.exe /C copy ".\intermediateFiles\lib@L.a" "..\..\..\Lib\GCC\" - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - - DCM.DLL - -pCM3 - SARMCM3.DLL - - TCM.DLL - -pCM3 - - - - 1 - 0 - 0 - 0 - 16 - - - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 0 - - - 0 - 0 - 0 - 1 - 1 - 1 - 0 - 1 - - 0 - -1 - - - - - - - - - - - - - - - - - - - 1 - 0 - 0 - 0 - 0 - -1 - - - - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "Cortex-M3" - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 3 - 2 - 1 - - -fno-strict-aliasing -ffunction-sections - ARM_MATH_CM3, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE - - ..\..\..\Include - - - - 0 - 0 - - - - - - - - - 1 - 0 - 1 - 0 - 1 - - - - - - -Wl,--gc-sections - - - - - - - BasicMathFunctions - - - arm_abs_f32.c - 1 - ../BasicMathFunctions/arm_abs_f32.c - - - arm_abs_q7.c - 1 - ../BasicMathFunctions/arm_abs_q7.c - - - arm_abs_q15.c - 1 - ../BasicMathFunctions/arm_abs_q15.c - - - arm_abs_q31.c - 1 - ../BasicMathFunctions/arm_abs_q31.c - - - arm_add_f32.c - 1 - ../BasicMathFunctions/arm_add_f32.c - - - arm_add_q7.c - 1 - ../BasicMathFunctions/arm_add_q7.c - - - arm_add_q15.c - 1 - ../BasicMathFunctions/arm_add_q15.c - - - arm_add_q31.c - 1 - ../BasicMathFunctions/arm_add_q31.c - - - arm_dot_prod_f32.c - 1 - ../BasicMathFunctions/arm_dot_prod_f32.c - - - arm_dot_prod_q7.c - 1 - ../BasicMathFunctions/arm_dot_prod_q7.c - - - arm_dot_prod_q15.c - 1 - ../BasicMathFunctions/arm_dot_prod_q15.c - - - arm_dot_prod_q31.c - 1 - ../BasicMathFunctions/arm_dot_prod_q31.c - - - arm_mult_f32.c - 1 - ../BasicMathFunctions/arm_mult_f32.c - - - arm_mult_q7.c - 1 - ../BasicMathFunctions/arm_mult_q7.c - - - arm_mult_q15.c - 1 - ../BasicMathFunctions/arm_mult_q15.c - - - arm_mult_q31.c - 1 - ../BasicMathFunctions/arm_mult_q31.c - - - arm_negate_f32.c - 1 - ../BasicMathFunctions/arm_negate_f32.c - - - arm_negate_q7.c - 1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - - - arm_power_f32.c - 1 - ../StatisticsFunctions/arm_power_f32.c - - - arm_power_q7.c - 1 - ../StatisticsFunctions/arm_power_q7.c - - - arm_power_q15.c - 1 - ../StatisticsFunctions/arm_power_q15.c - - - arm_power_q31.c - 1 - ../StatisticsFunctions/arm_power_q31.c - - - arm_rms_f32.c - 1 - ../StatisticsFunctions/arm_rms_f32.c - - - arm_rms_q15.c - 1 - ../StatisticsFunctions/arm_rms_q15.c - - - arm_rms_q31.c - 1 - ../StatisticsFunctions/arm_rms_q31.c - - - arm_std_f32.c - 1 - ../StatisticsFunctions/arm_std_f32.c - - - arm_std_q15.c - 1 - ../StatisticsFunctions/arm_std_q15.c - - - arm_std_q31.c - 1 - ../StatisticsFunctions/arm_std_q31.c - - - arm_var_f32.c - 1 - ../StatisticsFunctions/arm_var_f32.c - - - arm_var_q15.c - 1 - ../StatisticsFunctions/arm_var_q15.c - - - arm_var_q31.c - 1 - ../StatisticsFunctions/arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ../SupportFunctions/arm_copy_f32.c - - - arm_copy_q7.c - 1 - ../SupportFunctions/arm_copy_q7.c - - - arm_copy_q15.c - 1 - ../SupportFunctions/arm_copy_q15.c - - - arm_copy_q31.c - 1 - ../SupportFunctions/arm_copy_q31.c - - - arm_fill_f32.c - 1 - ../SupportFunctions/arm_fill_f32.c - - - arm_fill_q7.c - 1 - ../SupportFunctions/arm_fill_q7.c - - - arm_fill_q15.c - 1 - ../SupportFunctions/arm_fill_q15.c - - - arm_fill_q31.c - 1 - ../SupportFunctions/arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ../SupportFunctions/arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ../SupportFunctions/arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ../SupportFunctions/arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ../SupportFunctions/arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ../SupportFunctions/arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ../SupportFunctions/arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ../SupportFunctions/arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ../SupportFunctions/arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ../SupportFunctions/arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ../SupportFunctions/arm_q31_to_float.c - - - arm_q31_to_q7.c - 1 - ../SupportFunctions/arm_q31_to_q7.c - - - arm_q31_to_q15.c - 1 - ../SupportFunctions/arm_q31_to_q15.c - - - - - CommonTables - - - arm_common_tables.c - 1 - ../CommonTables/arm_common_tables.c - - - - - - - -
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM4x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM4x_math.uvopt deleted file mode 100644 index 9201baab89..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM4x_math.uvopt +++ /dev/null @@ -1,4197 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
- - - - DSP_Lib CM4 LE - 0x3 - ARM-GNU - - - Cortex-M4 - ARM - CLOCK(12000000) CPUTYPE("Cortex-M4") ESEL ELITTLE - - - - 5125 - - - - - - - - - - - - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\intermediateFiles\ - arm_cortexM4l_math - 0 - 1 - 0 - 1 - 0 - .\intermediateFiles\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 1 - 0 - cmd.exe /C copy ".\intermediateFiles\lib@L.a" "..\..\..\Lib\GCC\" - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - - DCM.DLL - -pCM4 - SARMCM3.DLL - - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 0 - - - 0 - 0 - 0 - 1 - 1 - 1 - 0 - 1 - - 0 - -1 - - - - - - - - - - - - - - - - - - - 1 - 0 - 0 - 0 - 0 - -1 - - - - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "Cortex-M4" - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 2 - 0 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 5 - 2 - 1 - - -mcpu=cortex-m4 -fno-strict-aliasing -ffunction-sections - ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE - - ..\..\..\Include - - - - 0 - 0 - - - - - - - - - 1 - 0 - 1 - 0 - 1 - - - - - - -mcpu=cortex-m4 -Wl,--gc-sections - - - - - - - BasicMathFunctions - - - arm_abs_f32.c - 1 - ../BasicMathFunctions/arm_abs_f32.c - - - arm_abs_q7.c - 1 - ../BasicMathFunctions/arm_abs_q7.c - - - arm_abs_q15.c - 1 - ../BasicMathFunctions/arm_abs_q15.c - - - arm_abs_q31.c - 1 - ../BasicMathFunctions/arm_abs_q31.c - - - arm_add_f32.c - 1 - ../BasicMathFunctions/arm_add_f32.c - - - arm_add_q7.c - 1 - ../BasicMathFunctions/arm_add_q7.c - - - arm_add_q15.c - 1 - ../BasicMathFunctions/arm_add_q15.c - - - arm_add_q31.c - 1 - ../BasicMathFunctions/arm_add_q31.c - - - arm_dot_prod_f32.c - 1 - ../BasicMathFunctions/arm_dot_prod_f32.c - - - arm_dot_prod_q7.c - 1 - ../BasicMathFunctions/arm_dot_prod_q7.c - - - arm_dot_prod_q15.c - 1 - ../BasicMathFunctions/arm_dot_prod_q15.c - - - arm_dot_prod_q31.c - 1 - ../BasicMathFunctions/arm_dot_prod_q31.c - - - arm_mult_f32.c - 1 - ../BasicMathFunctions/arm_mult_f32.c - - - arm_mult_q7.c - 1 - ../BasicMathFunctions/arm_mult_q7.c - - - arm_mult_q15.c - 1 - ../BasicMathFunctions/arm_mult_q15.c - - - arm_mult_q31.c - 1 - ../BasicMathFunctions/arm_mult_q31.c - - - arm_negate_f32.c - 1 - ../BasicMathFunctions/arm_negate_f32.c - - - arm_negate_q7.c - 1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - - - arm_power_f32.c - 1 - ../StatisticsFunctions/arm_power_f32.c - - - arm_power_q7.c - 1 - ../StatisticsFunctions/arm_power_q7.c - - - arm_power_q15.c - 1 - ../StatisticsFunctions/arm_power_q15.c - - - arm_power_q31.c - 1 - ../StatisticsFunctions/arm_power_q31.c - - - arm_rms_f32.c - 1 - ../StatisticsFunctions/arm_rms_f32.c - - - arm_rms_q15.c - 1 - ../StatisticsFunctions/arm_rms_q15.c - - - arm_rms_q31.c - 1 - ../StatisticsFunctions/arm_rms_q31.c - - - arm_std_f32.c - 1 - ../StatisticsFunctions/arm_std_f32.c - - - arm_std_q15.c - 1 - ../StatisticsFunctions/arm_std_q15.c - - - arm_std_q31.c - 1 - ../StatisticsFunctions/arm_std_q31.c - - - arm_var_f32.c - 1 - ../StatisticsFunctions/arm_var_f32.c - - - arm_var_q15.c - 1 - ../StatisticsFunctions/arm_var_q15.c - - - arm_var_q31.c - 1 - ../StatisticsFunctions/arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ../SupportFunctions/arm_copy_f32.c - - - arm_copy_q7.c - 1 - ../SupportFunctions/arm_copy_q7.c - - - arm_copy_q15.c - 1 - ../SupportFunctions/arm_copy_q15.c - - - arm_copy_q31.c - 1 - ../SupportFunctions/arm_copy_q31.c - - - arm_fill_f32.c - 1 - ../SupportFunctions/arm_fill_f32.c - - - arm_fill_q7.c - 1 - ../SupportFunctions/arm_fill_q7.c - - - arm_fill_q15.c - 1 - ../SupportFunctions/arm_fill_q15.c - - - arm_fill_q31.c - 1 - ../SupportFunctions/arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ../SupportFunctions/arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ../SupportFunctions/arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ../SupportFunctions/arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ../SupportFunctions/arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ../SupportFunctions/arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ../SupportFunctions/arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ../SupportFunctions/arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ../SupportFunctions/arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ../SupportFunctions/arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ../SupportFunctions/arm_q31_to_float.c - - - arm_q31_to_q7.c - 1 - ../SupportFunctions/arm_q31_to_q7.c - - - arm_q31_to_q15.c - 1 - ../SupportFunctions/arm_q31_to_q15.c - - - - - CommonTables - - - arm_common_tables.c - 1 - ../CommonTables/arm_common_tables.c - - - - - - - DSP_Lib CM4 LE O2 - 0x3 - ARM-GNU - - - Cortex-M4 - ARM - CLOCK(12000000) CPUTYPE("Cortex-M4") ESEL ELITTLE - - - - 5125 - - - - - - - - - - - - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\intermediateFiles\ - arm_cortexM4l_math - 0 - 1 - 0 - 1 - 0 - .\intermediateFiles\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 1 - 0 - cmd.exe /C copy ".\intermediateFiles\lib@L.a" "..\..\..\Lib\GCC\" - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - - DCM.DLL - -pCM4 - SARMCM3.DLL - - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 0 - - - 0 - 0 - 0 - 1 - 1 - 1 - 0 - 1 - - 0 - -1 - - - - - - - - - - - - - - - - - - - 1 - 0 - 0 - 0 - 0 - -1 - - - - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "Cortex-M4" - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 2 - 0 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 3 - 2 - 1 - - -mcpu=cortex-m4 -fno-strict-aliasing -ffunction-sections - ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE - - ..\..\..\Include - - - - 0 - 0 - - - - - - - - - 1 - 0 - 1 - 0 - 1 - - - - - - -mcpu=cortex-m4 -Wl,--gc-sections - - - - - - - BasicMathFunctions - - - arm_abs_f32.c - 1 - ../BasicMathFunctions/arm_abs_f32.c - - - arm_abs_q7.c - 1 - ../BasicMathFunctions/arm_abs_q7.c - - - arm_abs_q15.c - 1 - ../BasicMathFunctions/arm_abs_q15.c - - - arm_abs_q31.c - 1 - ../BasicMathFunctions/arm_abs_q31.c - - - arm_add_f32.c - 1 - ../BasicMathFunctions/arm_add_f32.c - - - arm_add_q7.c - 1 - ../BasicMathFunctions/arm_add_q7.c - - - arm_add_q15.c - 1 - ../BasicMathFunctions/arm_add_q15.c - - - arm_add_q31.c - 1 - ../BasicMathFunctions/arm_add_q31.c - - - arm_dot_prod_f32.c - 1 - ../BasicMathFunctions/arm_dot_prod_f32.c - - - arm_dot_prod_q7.c - 1 - ../BasicMathFunctions/arm_dot_prod_q7.c - - - arm_dot_prod_q15.c - 1 - ../BasicMathFunctions/arm_dot_prod_q15.c - - - arm_dot_prod_q31.c - 1 - ../BasicMathFunctions/arm_dot_prod_q31.c - - - arm_mult_f32.c - 1 - ../BasicMathFunctions/arm_mult_f32.c - - - arm_mult_q7.c - 1 - ../BasicMathFunctions/arm_mult_q7.c - - - arm_mult_q15.c - 1 - ../BasicMathFunctions/arm_mult_q15.c - - - arm_mult_q31.c - 1 - ../BasicMathFunctions/arm_mult_q31.c - - - arm_negate_f32.c - 1 - ../BasicMathFunctions/arm_negate_f32.c - - - arm_negate_q7.c - 1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - - - arm_power_f32.c - 1 - ../StatisticsFunctions/arm_power_f32.c - - - arm_power_q7.c - 1 - ../StatisticsFunctions/arm_power_q7.c - - - arm_power_q15.c - 1 - ../StatisticsFunctions/arm_power_q15.c - - - arm_power_q31.c - 1 - ../StatisticsFunctions/arm_power_q31.c - - - arm_rms_f32.c - 1 - ../StatisticsFunctions/arm_rms_f32.c - - - arm_rms_q15.c - 1 - ../StatisticsFunctions/arm_rms_q15.c - - - arm_rms_q31.c - 1 - ../StatisticsFunctions/arm_rms_q31.c - - - arm_std_f32.c - 1 - ../StatisticsFunctions/arm_std_f32.c - - - arm_std_q15.c - 1 - ../StatisticsFunctions/arm_std_q15.c - - - arm_std_q31.c - 1 - ../StatisticsFunctions/arm_std_q31.c - - - arm_var_f32.c - 1 - ../StatisticsFunctions/arm_var_f32.c - - - arm_var_q15.c - 1 - ../StatisticsFunctions/arm_var_q15.c - - - arm_var_q31.c - 1 - ../StatisticsFunctions/arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ../SupportFunctions/arm_copy_f32.c - - - arm_copy_q7.c - 1 - ../SupportFunctions/arm_copy_q7.c - - - arm_copy_q15.c - 1 - ../SupportFunctions/arm_copy_q15.c - - - arm_copy_q31.c - 1 - ../SupportFunctions/arm_copy_q31.c - - - arm_fill_f32.c - 1 - ../SupportFunctions/arm_fill_f32.c - - - arm_fill_q7.c - 1 - ../SupportFunctions/arm_fill_q7.c - - - arm_fill_q15.c - 1 - ../SupportFunctions/arm_fill_q15.c - - - arm_fill_q31.c - 1 - ../SupportFunctions/arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ../SupportFunctions/arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ../SupportFunctions/arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ../SupportFunctions/arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ../SupportFunctions/arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ../SupportFunctions/arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ../SupportFunctions/arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ../SupportFunctions/arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ../SupportFunctions/arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ../SupportFunctions/arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ../SupportFunctions/arm_q31_to_float.c - - - arm_q31_to_q7.c - 1 - ../SupportFunctions/arm_q31_to_q7.c - - - arm_q31_to_q15.c - 1 - ../SupportFunctions/arm_q31_to_q15.c - - - - - CommonTables - - - arm_common_tables.c - 1 - ../CommonTables/arm_common_tables.c - - - - - - - DSP_Lib CM4 LE FPU - 0x3 - ARM-GNU - - - Cortex-M4 FPU - ARM - CLOCK(12000000) CPUTYPE("Cortex-M4") ESEL ELITTLE FPU2 - - - - 5237 - - - - - - - - - - - - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\intermediateFiles\ - arm_cortexM4lf_math - 0 - 1 - 0 - 1 - 0 - .\intermediateFiles\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 1 - 0 - cmd.exe /C copy ".\intermediateFiles\lib@L.a" "..\..\..\Lib\GCC\" - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - - DCM.DLL - -pCM4 - SARMCM3.DLL - - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 0 - - - 0 - 0 - 0 - 1 - 1 - 1 - 0 - 1 - - 0 - -1 - - - - - - - - - - - - - - - - - - - 1 - 0 - 0 - 0 - 0 - -1 - - - "" () - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "Cortex-M4" - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 2 - 0 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 5 - 2 - 1 - - -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fno-strict-aliasing -ffunction-sections - ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT = 1, UNALIGNED_SUPPORT_DISABLE - - ..\..\..\Include - - - - 0 - 0 - - - - - - - - - 1 - 0 - 1 - 0 - 1 - - - - - - -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wl,--gc-sections - - - - - - - BasicMathFunctions - - - arm_abs_f32.c - 1 - ../BasicMathFunctions/arm_abs_f32.c - - - arm_abs_q7.c - 1 - ../BasicMathFunctions/arm_abs_q7.c - - - arm_abs_q15.c - 1 - ../BasicMathFunctions/arm_abs_q15.c - - - arm_abs_q31.c - 1 - ../BasicMathFunctions/arm_abs_q31.c - - - arm_add_f32.c - 1 - ../BasicMathFunctions/arm_add_f32.c - - - arm_add_q7.c - 1 - ../BasicMathFunctions/arm_add_q7.c - - - arm_add_q15.c - 1 - ../BasicMathFunctions/arm_add_q15.c - - - arm_add_q31.c - 1 - ../BasicMathFunctions/arm_add_q31.c - - - arm_dot_prod_f32.c - 1 - ../BasicMathFunctions/arm_dot_prod_f32.c - - - arm_dot_prod_q7.c - 1 - ../BasicMathFunctions/arm_dot_prod_q7.c - - - arm_dot_prod_q15.c - 1 - ../BasicMathFunctions/arm_dot_prod_q15.c - - - arm_dot_prod_q31.c - 1 - ../BasicMathFunctions/arm_dot_prod_q31.c - - - arm_mult_f32.c - 1 - ../BasicMathFunctions/arm_mult_f32.c - - - arm_mult_q7.c - 1 - ../BasicMathFunctions/arm_mult_q7.c - - - arm_mult_q15.c - 1 - ../BasicMathFunctions/arm_mult_q15.c - - - arm_mult_q31.c - 1 - ../BasicMathFunctions/arm_mult_q31.c - - - arm_negate_f32.c - 1 - ../BasicMathFunctions/arm_negate_f32.c - - - arm_negate_q7.c - 1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - - - arm_power_f32.c - 1 - ../StatisticsFunctions/arm_power_f32.c - - - arm_power_q7.c - 1 - ../StatisticsFunctions/arm_power_q7.c - - - arm_power_q15.c - 1 - ../StatisticsFunctions/arm_power_q15.c - - - arm_power_q31.c - 1 - ../StatisticsFunctions/arm_power_q31.c - - - arm_rms_f32.c - 1 - ../StatisticsFunctions/arm_rms_f32.c - - - arm_rms_q15.c - 1 - ../StatisticsFunctions/arm_rms_q15.c - - - arm_rms_q31.c - 1 - ../StatisticsFunctions/arm_rms_q31.c - - - arm_std_f32.c - 1 - ../StatisticsFunctions/arm_std_f32.c - - - arm_std_q15.c - 1 - ../StatisticsFunctions/arm_std_q15.c - - - arm_std_q31.c - 1 - ../StatisticsFunctions/arm_std_q31.c - - - arm_var_f32.c - 1 - ../StatisticsFunctions/arm_var_f32.c - - - arm_var_q15.c - 1 - ../StatisticsFunctions/arm_var_q15.c - - - arm_var_q31.c - 1 - ../StatisticsFunctions/arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ../SupportFunctions/arm_copy_f32.c - - - arm_copy_q7.c - 1 - ../SupportFunctions/arm_copy_q7.c - - - arm_copy_q15.c - 1 - ../SupportFunctions/arm_copy_q15.c - - - arm_copy_q31.c - 1 - ../SupportFunctions/arm_copy_q31.c - - - arm_fill_f32.c - 1 - ../SupportFunctions/arm_fill_f32.c - - - arm_fill_q7.c - 1 - ../SupportFunctions/arm_fill_q7.c - - - arm_fill_q15.c - 1 - ../SupportFunctions/arm_fill_q15.c - - - arm_fill_q31.c - 1 - ../SupportFunctions/arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ../SupportFunctions/arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ../SupportFunctions/arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ../SupportFunctions/arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ../SupportFunctions/arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ../SupportFunctions/arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ../SupportFunctions/arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ../SupportFunctions/arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ../SupportFunctions/arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ../SupportFunctions/arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ../SupportFunctions/arm_q31_to_float.c - - - arm_q31_to_q7.c - 1 - ../SupportFunctions/arm_q31_to_q7.c - - - arm_q31_to_q15.c - 1 - ../SupportFunctions/arm_q31_to_q15.c - - - - - CommonTables - - - arm_common_tables.c - 1 - ../CommonTables/arm_common_tables.c - - - - - - - DSP_Lib CM4 LE FPU O2 - 0x3 - ARM-GNU - - - Cortex-M4 FPU - ARM - CLOCK(12000000) CPUTYPE("Cortex-M4") ESEL ELITTLE FPU2 - - - - 5237 - - - - - - - - - - - - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\intermediateFiles\ - arm_cortexM4lf_math - 0 - 1 - 0 - 1 - 0 - .\intermediateFiles\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 1 - 0 - cmd.exe /C copy ".\intermediateFiles\lib@L.a" "..\..\..\Lib\GCC\" - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - - DCM.DLL - -pCM4 - SARMCM3.DLL - - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 0 - - - 0 - 0 - 0 - 1 - 1 - 1 - 0 - 1 - - 0 - -1 - - - - - - - - - - - - - - - - - - - 1 - 0 - 0 - 0 - 0 - -1 - - - "" () - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "Cortex-M4" - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 2 - 0 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 3 - 2 - 1 - - -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fno-strict-aliasing -ffunction-sections - ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT = 1, UNALIGNED_SUPPORT_DISABLE - - ..\..\..\Include - - - - 0 - 0 - - - - - - - - - 1 - 0 - 1 - 0 - 1 - - - - - - -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wl,--gc-sections - - - - - - - BasicMathFunctions - - - arm_abs_f32.c - 1 - ../BasicMathFunctions/arm_abs_f32.c - - - arm_abs_q7.c - 1 - ../BasicMathFunctions/arm_abs_q7.c - - - arm_abs_q15.c - 1 - ../BasicMathFunctions/arm_abs_q15.c - - - arm_abs_q31.c - 1 - ../BasicMathFunctions/arm_abs_q31.c - - - arm_add_f32.c - 1 - ../BasicMathFunctions/arm_add_f32.c - - - arm_add_q7.c - 1 - ../BasicMathFunctions/arm_add_q7.c - - - arm_add_q15.c - 1 - ../BasicMathFunctions/arm_add_q15.c - - - arm_add_q31.c - 1 - ../BasicMathFunctions/arm_add_q31.c - - - arm_dot_prod_f32.c - 1 - ../BasicMathFunctions/arm_dot_prod_f32.c - - - arm_dot_prod_q7.c - 1 - ../BasicMathFunctions/arm_dot_prod_q7.c - - - arm_dot_prod_q15.c - 1 - ../BasicMathFunctions/arm_dot_prod_q15.c - - - arm_dot_prod_q31.c - 1 - ../BasicMathFunctions/arm_dot_prod_q31.c - - - arm_mult_f32.c - 1 - ../BasicMathFunctions/arm_mult_f32.c - - - arm_mult_q7.c - 1 - ../BasicMathFunctions/arm_mult_q7.c - - - arm_mult_q15.c - 1 - ../BasicMathFunctions/arm_mult_q15.c - - - arm_mult_q31.c - 1 - ../BasicMathFunctions/arm_mult_q31.c - - - arm_negate_f32.c - 1 - ../BasicMathFunctions/arm_negate_f32.c - - - arm_negate_q7.c - 1 - ../BasicMathFunctions/arm_negate_q7.c - - - arm_negate_q15.c - 1 - ../BasicMathFunctions/arm_negate_q15.c - - - arm_negate_q31.c - 1 - ../BasicMathFunctions/arm_negate_q31.c - - - arm_offset_f32.c - 1 - ../BasicMathFunctions/arm_offset_f32.c - - - arm_offset_q7.c - 1 - ../BasicMathFunctions/arm_offset_q7.c - - - arm_offset_q15.c - 1 - ../BasicMathFunctions/arm_offset_q15.c - - - arm_offset_q31.c - 1 - ../BasicMathFunctions/arm_offset_q31.c - - - arm_scale_f32.c - 1 - ../BasicMathFunctions/arm_scale_f32.c - - - arm_scale_q7.c - 1 - ../BasicMathFunctions/arm_scale_q7.c - - - arm_scale_q15.c - 1 - ../BasicMathFunctions/arm_scale_q15.c - - - arm_scale_q31.c - 1 - ../BasicMathFunctions/arm_scale_q31.c - - - arm_shift_q7.c - 1 - ../BasicMathFunctions/arm_shift_q7.c - - - arm_shift_q15.c - 1 - ../BasicMathFunctions/arm_shift_q15.c - - - arm_shift_q31.c - 1 - ../BasicMathFunctions/arm_shift_q31.c - - - arm_sub_f32.c - 1 - ../BasicMathFunctions/arm_sub_f32.c - - - arm_sub_q7.c - 1 - ../BasicMathFunctions/arm_sub_q7.c - - - arm_sub_q15.c - 1 - ../BasicMathFunctions/arm_sub_q15.c - - - arm_sub_q31.c - 1 - ../BasicMathFunctions/arm_sub_q31.c - - - - - FastMathFunctions - - - arm_cos_f32.c - 1 - ../FastMathFunctions/arm_cos_f32.c - - - arm_cos_q15.c - 1 - ../FastMathFunctions/arm_cos_q15.c - - - arm_cos_q31.c - 1 - ../FastMathFunctions/arm_cos_q31.c - - - arm_sin_f32.c - 1 - ../FastMathFunctions/arm_sin_f32.c - - - arm_sin_q15.c - 1 - ../FastMathFunctions/arm_sin_q15.c - - - arm_sin_q31.c - 1 - ../FastMathFunctions/arm_sin_q31.c - - - arm_sqrt_q15.c - 1 - ../FastMathFunctions/arm_sqrt_q15.c - - - arm_sqrt_q31.c - 1 - ../FastMathFunctions/arm_sqrt_q31.c - - - - - ComplexMathFunctions - - - arm_cmplx_conj_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_f32.c - - - arm_cmplx_conj_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q15.c - - - arm_cmplx_conj_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_conj_q31.c - - - arm_cmplx_dot_prod_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_f32.c - - - arm_cmplx_dot_prod_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q15.c - - - arm_cmplx_dot_prod_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_dot_prod_q31.c - - - arm_cmplx_mag_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_f32.c - - - arm_cmplx_mag_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q15.c - - - arm_cmplx_mag_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_q31.c - - - arm_cmplx_mag_squared_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_f32.c - - - arm_cmplx_mag_squared_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q15.c - - - arm_cmplx_mag_squared_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mag_squared_q31.c - - - arm_cmplx_mult_cmplx_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c - - - arm_cmplx_mult_cmplx_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c - - - arm_cmplx_mult_cmplx_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c - - - arm_cmplx_mult_real_f32.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_f32.c - - - arm_cmplx_mult_real_q15.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q15.c - - - arm_cmplx_mult_real_q31.c - 1 - ../ComplexMathFunctions/arm_cmplx_mult_real_q31.c - - - - - FilteringFunctions - - - arm_biquad_cascade_df1_32x64_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c - - - arm_biquad_cascade_df1_32x64_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c - - - arm_biquad_cascade_df1_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_f32.c - - - arm_biquad_cascade_df1_fast_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c - - - arm_biquad_cascade_df1_fast_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c - - - arm_biquad_cascade_df1_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_f32.c - - - arm_biquad_cascade_df1_init_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q15.c - - - arm_biquad_cascade_df1_init_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_init_q31.c - - - arm_biquad_cascade_df1_q15.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q15.c - - - arm_biquad_cascade_df1_q31.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df1_q31.c - - - arm_biquad_cascade_df2T_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_f32.c - - - arm_biquad_cascade_df2T_init_f32.c - 1 - ../FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c - - - arm_conv_f32.c - 1 - ../FilteringFunctions/arm_conv_f32.c - - - arm_conv_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_q15.c - - - arm_conv_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_fast_opt_q15.c - - - arm_conv_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_fast_q31.c - - - arm_conv_partial_f32.c - 1 - ../FilteringFunctions/arm_conv_partial_f32.c - - - arm_conv_partial_fast_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q15.c - - - arm_conv_partial_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_opt_q15.c - - - arm_conv_partial_fast_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_fast_q31.c - - - arm_conv_partial_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_q7.c - - - arm_conv_partial_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q7.c - - - arm_conv_partial_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_q15.c - - - arm_conv_partial_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_partial_opt_q15.c - - - arm_conv_partial_q31.c - 1 - ../FilteringFunctions/arm_conv_partial_q31.c - - - arm_conv_q7.c - 1 - ../FilteringFunctions/arm_conv_q7.c - - - arm_conv_opt_q7.c - 1 - ../FilteringFunctions/arm_conv_opt_q7.c - - - arm_conv_q15.c - 1 - ../FilteringFunctions/arm_conv_q15.c - - - arm_conv_opt_q15.c - 1 - ../FilteringFunctions/arm_conv_opt_q15.c - - - arm_conv_q31.c - 1 - ../FilteringFunctions/arm_conv_q31.c - - - arm_correlate_f32.c - 1 - ../FilteringFunctions/arm_correlate_f32.c - - - arm_correlate_fast_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_q15.c - - - arm_correlate_fast_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_fast_opt_q15.c - - - arm_correlate_fast_q31.c - 1 - ../FilteringFunctions/arm_correlate_fast_q31.c - - - arm_correlate_q7.c - 1 - ../FilteringFunctions/arm_correlate_q7.c - - - arm_correlate_opt_q7.c - 1 - ../FilteringFunctions/arm_correlate_opt_q7.c - - - arm_correlate_q15.c - 1 - ../FilteringFunctions/arm_correlate_q15.c - - - arm_correlate_opt_q15.c - 1 - ../FilteringFunctions/arm_correlate_opt_q15.c - - - arm_correlate_q31.c - 1 - ../FilteringFunctions/arm_correlate_q31.c - - - arm_fir_decimate_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_f32.c - - - arm_fir_decimate_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q15.c - - - arm_fir_decimate_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_fast_q31.c - - - arm_fir_decimate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_f32.c - - - arm_fir_decimate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q15.c - - - arm_fir_decimate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_init_q31.c - - - arm_fir_decimate_q15.c - 1 - ../FilteringFunctions/arm_fir_decimate_q15.c - - - arm_fir_decimate_q31.c - 1 - ../FilteringFunctions/arm_fir_decimate_q31.c - - - arm_fir_f32.c - 1 - ../FilteringFunctions/arm_fir_f32.c - - - arm_fir_fast_q15.c - 1 - ../FilteringFunctions/arm_fir_fast_q15.c - - - arm_fir_fast_q31.c - 1 - ../FilteringFunctions/arm_fir_fast_q31.c - - - arm_fir_init_f32.c - 1 - ../FilteringFunctions/arm_fir_init_f32.c - - - arm_fir_init_q7.c - 1 - ../FilteringFunctions/arm_fir_init_q7.c - - - arm_fir_init_q15.c - 1 - ../FilteringFunctions/arm_fir_init_q15.c - - - arm_fir_init_q31.c - 1 - ../FilteringFunctions/arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ../FilteringFunctions/arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ../FilteringFunctions/arm_fir_lattice_q15.c - - - arm_fir_lattice_q31.c - 1 - ../FilteringFunctions/arm_fir_lattice_q31.c - - - arm_fir_q7.c - 1 - ../FilteringFunctions/arm_fir_q7.c - - - arm_fir_q15.c - 1 - ../FilteringFunctions/arm_fir_q15.c - - - arm_fir_q31.c - 1 - ../FilteringFunctions/arm_fir_q31.c - - - arm_fir_sparse_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_f32.c - - - arm_fir_sparse_init_f32.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_f32.c - - - arm_fir_sparse_init_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q7.c - - - arm_fir_sparse_init_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q15.c - - - arm_fir_sparse_init_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_init_q31.c - - - arm_fir_sparse_q7.c - 1 - ../FilteringFunctions/arm_fir_sparse_q7.c - - - arm_fir_sparse_q15.c - 1 - ../FilteringFunctions/arm_fir_sparse_q15.c - - - arm_fir_sparse_q31.c - 1 - ../FilteringFunctions/arm_fir_sparse_q31.c - - - arm_iir_lattice_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_f32.c - - - arm_iir_lattice_init_f32.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ../FilteringFunctions/arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ../FilteringFunctions/arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ../FilteringFunctions/arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ../FilteringFunctions/arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ../FilteringFunctions/arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ../FilteringFunctions/arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ../FilteringFunctions/arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ../FilteringFunctions/arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ../FilteringFunctions/arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ../FilteringFunctions/arm_lms_q15.c - - - arm_lms_q31.c - 1 - ../FilteringFunctions/arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ../MatrixFunctions/arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ../MatrixFunctions/arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ../MatrixFunctions/arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ../MatrixFunctions/arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ../MatrixFunctions/arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ../MatrixFunctions/arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ../MatrixFunctions/arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ../MatrixFunctions/arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ../MatrixFunctions/arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ../MatrixFunctions/arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ../MatrixFunctions/arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ../MatrixFunctions/arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ../MatrixFunctions/arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ../MatrixFunctions/arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ../MatrixFunctions/arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ../MatrixFunctions/arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ../MatrixFunctions/arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ../MatrixFunctions/arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ../MatrixFunctions/arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ../TransformFunctions/arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ../TransformFunctions/arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ../TransformFunctions/arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ../TransformFunctions/arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ../TransformFunctions/arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ../TransformFunctions/arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ../TransformFunctions/arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ../TransformFunctions/arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ../TransformFunctions/arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ../TransformFunctions/arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ../TransformFunctions/arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ../TransformFunctions/arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ../TransformFunctions/arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ../TransformFunctions/arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ../TransformFunctions/arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ../TransformFunctions/arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ../TransformFunctions/arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ../ControllerFunctions/arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ../ControllerFunctions/arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ../ControllerFunctions/arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ../ControllerFunctions/arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ../ControllerFunctions/arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ../ControllerFunctions/arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ../ControllerFunctions/arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ../ControllerFunctions/arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ../StatisticsFunctions/arm_max_f32.c - - - arm_max_q7.c - 1 - ../StatisticsFunctions/arm_max_q7.c - - - arm_max_q15.c - 1 - ../StatisticsFunctions/arm_max_q15.c - - - arm_max_q31.c - 1 - ../StatisticsFunctions/arm_max_q31.c - - - arm_mean_f32.c - 1 - ../StatisticsFunctions/arm_mean_f32.c - - - arm_mean_q7.c - 1 - ../StatisticsFunctions/arm_mean_q7.c - - - arm_mean_q15.c - 1 - ../StatisticsFunctions/arm_mean_q15.c - - - arm_mean_q31.c - 1 - ../StatisticsFunctions/arm_mean_q31.c - - - arm_min_f32.c - 1 - ../StatisticsFunctions/arm_min_f32.c - - - arm_min_q7.c - 1 - ../StatisticsFunctions/arm_min_q7.c - - - arm_min_q15.c - 1 - ../StatisticsFunctions/arm_min_q15.c - - - arm_min_q31.c - 1 - ../StatisticsFunctions/arm_min_q31.c - - - arm_power_f32.c - 1 - ../StatisticsFunctions/arm_power_f32.c - - - arm_power_q7.c - 1 - ../StatisticsFunctions/arm_power_q7.c - - - arm_power_q15.c - 1 - ../StatisticsFunctions/arm_power_q15.c - - - arm_power_q31.c - 1 - ../StatisticsFunctions/arm_power_q31.c - - - arm_rms_f32.c - 1 - ../StatisticsFunctions/arm_rms_f32.c - - - arm_rms_q15.c - 1 - ../StatisticsFunctions/arm_rms_q15.c - - - arm_rms_q31.c - 1 - ../StatisticsFunctions/arm_rms_q31.c - - - arm_std_f32.c - 1 - ../StatisticsFunctions/arm_std_f32.c - - - arm_std_q15.c - 1 - ../StatisticsFunctions/arm_std_q15.c - - - arm_std_q31.c - 1 - ../StatisticsFunctions/arm_std_q31.c - - - arm_var_f32.c - 1 - ../StatisticsFunctions/arm_var_f32.c - - - arm_var_q15.c - 1 - ../StatisticsFunctions/arm_var_q15.c - - - arm_var_q31.c - 1 - ../StatisticsFunctions/arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ../SupportFunctions/arm_copy_f32.c - - - arm_copy_q7.c - 1 - ../SupportFunctions/arm_copy_q7.c - - - arm_copy_q15.c - 1 - ../SupportFunctions/arm_copy_q15.c - - - arm_copy_q31.c - 1 - ../SupportFunctions/arm_copy_q31.c - - - arm_fill_f32.c - 1 - ../SupportFunctions/arm_fill_f32.c - - - arm_fill_q7.c - 1 - ../SupportFunctions/arm_fill_q7.c - - - arm_fill_q15.c - 1 - ../SupportFunctions/arm_fill_q15.c - - - arm_fill_q31.c - 1 - ../SupportFunctions/arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ../SupportFunctions/arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ../SupportFunctions/arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ../SupportFunctions/arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ../SupportFunctions/arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ../SupportFunctions/arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ../SupportFunctions/arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ../SupportFunctions/arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ../SupportFunctions/arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ../SupportFunctions/arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ../SupportFunctions/arm_q31_to_float.c - - - arm_q31_to_q7.c - 1 - ../SupportFunctions/arm_q31_to_q7.c - - - arm_q31_to_q15.c - 1 - ../SupportFunctions/arm_q31_to_q15.c - - - - - CommonTables - - - arm_common_tables.c - 1 - ../CommonTables/arm_common_tables.c - - - - - - - -
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexMx_math_Build.bat b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexMx_math_Build.bat deleted file mode 100644 index 007812c2d0..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexMx_math_Build.bat +++ /dev/null @@ -1,17 +0,0 @@ - -SET TMP=C:\Temp -SET TEMP=C:\Temp - -SET UVEXE=C:\Keil\UV4\UV4.EXE - -@echo Building DSP Library for Cortex-M0 Little Endian -%UVEXE% -rb arm_cortexM0x_math.uvproj -t"DSP_Lib CM0 LE" -o"DSP_Lib CM0 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M3 Little Endian -%UVEXE% -rb arm_cortexM3x_math.uvproj -t"DSP_Lib CM3 LE" -o"DSP_Lib CM3 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M4 Little Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE" -o"DSP_Lib CM4 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M4 with FPU Little Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE FPU" -o"DSP_Lib CM4 LE FPU.txt" -j0 diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c deleted file mode 100644 index 9ebd9e21c7..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c +++ /dev/null @@ -1,206 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_add_f32.c -* -* Description: Floating-point matrix addition -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @defgroup MatrixAdd Matrix Addition - * - * Adds two matrices. - * \image html MatrixAddition.gif "Addition of two 3 x 3 matrices" - * - * The functions check to make sure that - * pSrcA, pSrcB, and pDst have the same - * number of rows and columns. - */ - -/** - * @addtogroup MatrixAdd - * @{ - */ - - -/** - * @brief Floating-point matrix addition. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - -arm_status arm_mat_add_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - -#ifndef ARM_MATH_CM0 - - float32_t inA1, inA2, inB1, inB2, out1, out2; /* temporary variables */ - -#endif // #ifndef ARM_MATH_CM0 - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix addition */ - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif - { - - /* Total number of samples in the input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#ifndef ARM_MATH_CM0 - - /* Loop unrolling */ - blkCnt = numSamples >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add and then store the results in the destination buffer. */ - /* Read values from source A */ - inA1 = pIn1[0]; - - /* Read values from source B */ - inB1 = pIn2[0]; - - /* Read values from source A */ - inA2 = pIn1[1]; - - /* out = sourceA + sourceB */ - out1 = inA1 + inB1; - - /* Read values from source B */ - inB2 = pIn2[1]; - - /* Read values from source A */ - inA1 = pIn1[2]; - - /* out = sourceA + sourceB */ - out2 = inA2 + inB2; - - /* Read values from source B */ - inB1 = pIn2[2]; - - /* Store result in destination */ - pOut[0] = out1; - pOut[1] = out2; - - /* Read values from source A */ - inA2 = pIn1[3]; - - /* Read values from source B */ - inB2 = pIn2[3]; - - /* out = sourceA + sourceB */ - out1 = inA1 + inB1; - - /* out = sourceA + sourceB */ - out2 = inA2 + inB2; - - /* Store result in destination */ - pOut[2] = out1; - - /* Store result in destination */ - pOut[3] = out2; - - - /* update pointers to process next sampels */ - pIn1 += 4u; - pIn2 += 4u; - pOut += 4u; - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the numSamples is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = numSamples % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add and then store the results in the destination buffer. */ - *pOut++ = (*pIn1++) + (*pIn2++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixAdd group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c deleted file mode 100644 index 9c86301310..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c +++ /dev/null @@ -1,161 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_add_q15.c -* -* Description: Q15 matrix addition -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixAdd - * @{ - */ - -/** - * @brief Q15 matrix addition. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -arm_status arm_mat_add_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - uint16_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix addition */ - -#ifdef ARM_MATH_MATRIX_CHECK - - - /* Check for matrix mismatch condition */ - if((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in the input matrix */ - numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols); - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Loop unrolling */ - blkCnt = (uint32_t) numSamples >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add, Saturate and then store the results in the destination buffer. */ - *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++); - *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = (uint32_t) numSamples % 0x4u; - - /* q15 pointers of input and output are initialized */ - - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add, Saturate and then store the results in the destination buffer. */ - *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = (uint32_t) numSamples; - - - /* q15 pointers of input and output are initialized */ - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add, Saturate and then store the results in the destination buffer. */ - *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixAdd group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c deleted file mode 100644 index ee1207e570..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c +++ /dev/null @@ -1,205 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_add_q31.c -* -* Description: Q31 matrix addition -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixAdd - * @{ - */ - -/** - * @brief Q31 matrix addition. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. - */ - -arm_status arm_mat_add_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - q31_t inA1, inB1; /* temporary variables */ - -#ifndef ARM_MATH_CM0 - - q31_t inA2, inB2; /* temporary variables */ - q31_t out1, out2; /* temporary variables */ - -#endif // #ifndef ARM_MATH_CM0 - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix addition */ - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif - { - /* Total number of samples in the input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Loop Unrolling */ - blkCnt = numSamples >> 2u; - - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add, saturate and then store the results in the destination buffer. */ - /* Read values from source A */ - inA1 = pIn1[0]; - - /* Read values from source B */ - inB1 = pIn2[0]; - - /* Read values from source A */ - inA2 = pIn1[1]; - - /* Add and saturate */ - out1 = __QADD(inA1, inB1); - - /* Read values from source B */ - inB2 = pIn2[1]; - - /* Read values from source A */ - inA1 = pIn1[2]; - - /* Add and saturate */ - out2 = __QADD(inA2, inB2); - - /* Read values from source B */ - inB1 = pIn2[2]; - - /* Store result in destination */ - pOut[0] = out1; - pOut[1] = out2; - - /* Read values from source A */ - inA2 = pIn1[3]; - - /* Read values from source B */ - inB2 = pIn2[3]; - - /* Add and saturate */ - out1 = __QADD(inA1, inB1); - out2 = __QADD(inA2, inB2); - - /* Store result in destination */ - pOut[2] = out1; - pOut[3] = out2; - - /* update pointers to process next sampels */ - pIn1 += 4u; - pIn2 += 4u; - pOut += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the numSamples is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = numSamples % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add, saturate and then store the results in the destination buffer. */ - inA1 = *pIn1++; - inB1 = *pIn2++; - - inA1 = __QADD(inA1, inB1); - - /* Decrement the loop counter */ - blkCnt--; - - *pOut++ = inA1; - - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixAdd group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c deleted file mode 100644 index 8d2cea559b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c +++ /dev/null @@ -1,86 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_init_f32.c -* -* Description: Floating-point matrix initialization. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @defgroup MatrixInit Matrix Initialization - * - * Initializes the underlying matrix data structure. - * The functions set the numRows, - * numCols, and pData fields - * of the matrix data structure. - */ - -/** - * @addtogroup MatrixInit - * @{ - */ - -/** - * @brief Floating-point matrix initialization. - * @param[in,out] *S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] *pData points to the matrix data array. - * @return none - */ - -void arm_mat_init_f32( - arm_matrix_instance_f32 * S, - uint16_t nRows, - uint16_t nColumns, - float32_t * pData) -{ - /* Assign Number of Rows */ - S->numRows = nRows; - - /* Assign Number of Columns */ - S->numCols = nColumns; - - /* Assign Data pointer */ - S->pData = pData; -} - -/** - * @} end of MatrixInit group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c deleted file mode 100644 index 7255627c2e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c +++ /dev/null @@ -1,78 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_init_q15.c -* -* Description: Q15 matrix initialization. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------------- */ - - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixInit - * @{ - */ - - /** - * @brief Q15 matrix initialization. - * @param[in,out] *S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] *pData points to the matrix data array. - * @return none - */ - -void arm_mat_init_q15( - arm_matrix_instance_q15 * S, - uint16_t nRows, - uint16_t nColumns, - q15_t * pData) -{ - /* Assign Number of Rows */ - S->numRows = nRows; - - /* Assign Number of Columns */ - S->numCols = nColumns; - - /* Assign Data pointer */ - S->pData = pData; -} - -/** - * @} end of MatrixInit group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c deleted file mode 100644 index 86ad404da6..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c +++ /dev/null @@ -1,82 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_init_q31.c -* -* Description: Q31 matrix initialization. -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------------- */ - - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @defgroup MatrixInit Matrix Initialization - * - */ - -/** - * @addtogroup MatrixInit - * @{ - */ - - /** - * @brief Q31 matrix initialization. - * @param[in,out] *S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] *pData points to the matrix data array. - * @return none - */ - -void arm_mat_init_q31( - arm_matrix_instance_q31 * S, - uint16_t nRows, - uint16_t nColumns, - q31_t * pData) -{ - /* Assign Number of Rows */ - S->numRows = nRows; - - /* Assign Number of Columns */ - S->numCols = nColumns; - - /* Assign Data pointer */ - S->pData = pData; -} - -/** - * @} end of MatrixInit group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c deleted file mode 100644 index e8c6daebb2..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c +++ /dev/null @@ -1,668 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_inverse_f32.c -* -* Description: Floating-point matrix inverse. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @defgroup MatrixInv Matrix Inverse - * - * Computes the inverse of a matrix. - * - * The inverse is defined only if the input matrix is square and non-singular (the determinant - * is non-zero). The function checks that the input and output matrices are square and of the - * same size. - * - * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix - * inversion of floating-point matrices. - * - * \par Algorithm - * The Gauss-Jordan method is used to find the inverse. - * The algorithm performs a sequence of elementary row-operations till it - * reduces the input matrix to an identity matrix. Applying the same sequence - * of elementary row-operations to an identity matrix yields the inverse matrix. - * If the input matrix is singular, then the algorithm terminates and returns error status - * ARM_MATH_SINGULAR. - * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method" - */ - -/** - * @addtogroup MatrixInv - * @{ - */ - -/** - * @brief Floating-point matrix inverse. - * @param[in] *pSrc points to input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns - * ARM_MATH_SIZE_MISMATCH if the input matrix is not square or if the size - * of the output matrix does not match the size of the input matrix. - * If the input matrix is found to be singular (non-invertible), then the function returns - * ARM_MATH_SINGULAR. Otherwise, the function returns ARM_MATH_SUCCESS. - */ - -arm_status arm_mat_inverse_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn = pSrc->pData; /* input data matrix pointer */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ - float32_t *pInT3, *pInT4; /* Temporary output data matrix pointer */ - float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data matrix pointer */ - uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ - uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - float32_t Xchg, in = 0.0f, in1; /* Temporary input values */ - uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l; /* loop counters */ - arm_status status; /* status of matrix inverse */ - -#ifdef ARM_MATH_MATRIX_CHECK - - - /* Check for matrix mismatch condition */ - if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) - || (pSrc->numRows != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - /*-------------------------------------------------------------------------------------------------------------- - * Matrix Inverse can be solved using elementary row operations. - * - * Gauss-Jordan Method: - * - * 1. First combine the identity matrix and the input matrix separated by a bar to form an - * augmented matrix as follows: - * _ _ _ _ - * | a11 a12 | 1 0 | | X11 X12 | - * | | | = | | - * |_ a21 a22 | 0 1 _| |_ X21 X21 _| - * - * 2. In our implementation, pDst Matrix is used as identity matrix. - * - * 3. Begin with the first row. Let i = 1. - * - * 4. Check to see if the pivot for row i is zero. - * The pivot is the element of the main diagonal that is on the current row. - * For instance, if working with row i, then the pivot element is aii. - * If the pivot is zero, exchange that row with a row below it that does not - * contain a zero in column i. If this is not possible, then an inverse - * to that matrix does not exist. - * - * 5. Divide every element of row i by the pivot. - * - * 6. For every row below and row i, replace that row with the sum of that row and - * a multiple of row i so that each new element in column i below row i is zero. - * - * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros - * for every element below and above the main diagonal. - * - * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc). - * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst). - *----------------------------------------------------------------------------------------------------------------*/ - - /* Working pointer for destination matrix */ - pInT2 = pOut; - - /* Loop over the number of rows */ - rowCnt = numRows; - - /* Making the destination matrix as identity matrix */ - while(rowCnt > 0u) - { - /* Writing all zeroes in lower triangle of the destination matrix */ - j = numRows - rowCnt; - while(j > 0u) - { - *pInT2++ = 0.0f; - j--; - } - - /* Writing all ones in the diagonal of the destination matrix */ - *pInT2++ = 1.0f; - - /* Writing all zeroes in upper triangle of the destination matrix */ - j = rowCnt - 1u; - while(j > 0u) - { - *pInT2++ = 0.0f; - j--; - } - - /* Decrement the loop counter */ - rowCnt--; - } - - /* Loop over the number of columns of the input matrix. - All the elements in each column are processed by the row operations */ - loopCnt = numCols; - - /* Index modifier to navigate through the columns */ - l = 0u; - - while(loopCnt > 0u) - { - /* Check if the pivot element is zero.. - * If it is zero then interchange the row with non zero row below. - * If there is no non zero element to replace in the rows below, - * then the matrix is Singular. */ - - /* Working pointer for the input matrix that points - * to the pivot element of the particular row */ - pInT1 = pIn + (l * numCols); - - /* Working pointer for the destination matrix that points - * to the pivot element of the particular row */ - pInT3 = pOut + (l * numCols); - - /* Temporary variable to hold the pivot value */ - in = *pInT1; - - /* Destination pointer modifier */ - k = 1u; - - /* Check if the pivot element is zero */ - if(*pInT1 == 0.0f) - { - /* Loop over the number rows present below */ - i = numRows - (l + 1u); - - while(i > 0u) - { - /* Update the input and destination pointers */ - pInT2 = pInT1 + (numCols * l); - pInT4 = pInT3 + (numCols * k); - - /* Check if there is a non zero pivot element to - * replace in the rows below */ - if(*pInT2 != 0.0f) - { - /* Loop over number of columns - * to the right of the pilot element */ - j = numCols - l; - - while(j > 0u) - { - /* Exchange the row elements of the input matrix */ - Xchg = *pInT2; - *pInT2++ = *pInT1; - *pInT1++ = Xchg; - - /* Decrement the loop counter */ - j--; - } - - /* Loop over number of columns of the destination matrix */ - j = numCols; - - while(j > 0u) - { - /* Exchange the row elements of the destination matrix */ - Xchg = *pInT4; - *pInT4++ = *pInT3; - *pInT3++ = Xchg; - - /* Decrement the loop counter */ - j--; - } - - /* Flag to indicate whether exchange is done or not */ - flag = 1u; - - /* Break after exchange is done */ - break; - } - - /* Update the destination pointer modifier */ - k++; - - /* Decrement the loop counter */ - i--; - } - } - - /* Update the status if the matrix is singular */ - if((flag != 1u) && (in == 0.0f)) - { - status = ARM_MATH_SINGULAR; - - break; - } - - /* Points to the pivot row of input and destination matrices */ - pPivotRowIn = pIn + (l * numCols); - pPivotRowDst = pOut + (l * numCols); - - /* Temporary pointers to the pivot row pointers */ - pInT1 = pPivotRowIn; - pInT2 = pPivotRowDst; - - /* Pivot element of the row */ - in = *(pIn + (l * numCols)); - - /* Loop over number of columns - * to the right of the pilot element */ - j = (numCols - l); - - while(j > 0u) - { - /* Divide each element of the row of the input matrix - * by the pivot element */ - in1 = *pInT1; - *pInT1++ = in1 / in; - - /* Decrement the loop counter */ - j--; - } - - /* Loop over number of columns of the destination matrix */ - j = numCols; - - while(j > 0u) - { - /* Divide each element of the row of the destination matrix - * by the pivot element */ - in1 = *pInT2; - *pInT2++ = in1 / in; - - /* Decrement the loop counter */ - j--; - } - - /* Replace the rows with the sum of that row and a multiple of row i - * so that each new element in column i above row i is zero.*/ - - /* Temporary pointers for input and destination matrices */ - pInT1 = pIn; - pInT2 = pOut; - - /* index used to check for pivot element */ - i = 0u; - - /* Loop over number of rows */ - /* to be replaced by the sum of that row and a multiple of row i */ - k = numRows; - - while(k > 0u) - { - /* Check for the pivot element */ - if(i == l) - { - /* If the processing element is the pivot element, - only the columns to the right are to be processed */ - pInT1 += numCols - l; - - pInT2 += numCols; - } - else - { - /* Element of the reference row */ - in = *pInT1; - - /* Working pointers for input and destination pivot rows */ - pPRT_in = pPivotRowIn; - pPRT_pDst = pPivotRowDst; - - /* Loop over the number of columns to the right of the pivot element, - to replace the elements in the input matrix */ - j = (numCols - l); - - while(j > 0u) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - in1 = *pInT1; - *pInT1++ = in1 - (in * *pPRT_in++); - - /* Decrement the loop counter */ - j--; - } - - /* Loop over the number of columns to - replace the elements in the destination matrix */ - j = numCols; - - while(j > 0u) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - in1 = *pInT2; - *pInT2++ = in1 - (in * *pPRT_pDst++); - - /* Decrement the loop counter */ - j--; - } - - } - - /* Increment the temporary input pointer */ - pInT1 = pInT1 + l; - - /* Decrement the loop counter */ - k--; - - /* Increment the pivot index */ - i++; - } - - /* Increment the input pointer */ - pIn++; - - /* Decrement the loop counter */ - loopCnt--; - - /* Increment the index modifier */ - l++; - } - - -#else - - /* Run the below code for Cortex-M0 */ - - float32_t Xchg, in = 0.0f; /* Temporary input values */ - uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l; /* loop counters */ - arm_status status; /* status of matrix inverse */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) - || (pSrc->numRows != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - - /*-------------------------------------------------------------------------------------------------------------- - * Matrix Inverse can be solved using elementary row operations. - * - * Gauss-Jordan Method: - * - * 1. First combine the identity matrix and the input matrix separated by a bar to form an - * augmented matrix as follows: - * _ _ _ _ _ _ _ _ - * | | a11 a12 | | | 1 0 | | | X11 X12 | - * | | | | | | | = | | - * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _| - * - * 2. In our implementation, pDst Matrix is used as identity matrix. - * - * 3. Begin with the first row. Let i = 1. - * - * 4. Check to see if the pivot for row i is zero. - * The pivot is the element of the main diagonal that is on the current row. - * For instance, if working with row i, then the pivot element is aii. - * If the pivot is zero, exchange that row with a row below it that does not - * contain a zero in column i. If this is not possible, then an inverse - * to that matrix does not exist. - * - * 5. Divide every element of row i by the pivot. - * - * 6. For every row below and row i, replace that row with the sum of that row and - * a multiple of row i so that each new element in column i below row i is zero. - * - * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros - * for every element below and above the main diagonal. - * - * 8. Now an identical matrix is formed to the left of the bar(input matrix, src). - * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst). - *----------------------------------------------------------------------------------------------------------------*/ - - /* Working pointer for destination matrix */ - pInT2 = pOut; - - /* Loop over the number of rows */ - rowCnt = numRows; - - /* Making the destination matrix as identity matrix */ - while(rowCnt > 0u) - { - /* Writing all zeroes in lower triangle of the destination matrix */ - j = numRows - rowCnt; - while(j > 0u) - { - *pInT2++ = 0.0f; - j--; - } - - /* Writing all ones in the diagonal of the destination matrix */ - *pInT2++ = 1.0f; - - /* Writing all zeroes in upper triangle of the destination matrix */ - j = rowCnt - 1u; - while(j > 0u) - { - *pInT2++ = 0.0f; - j--; - } - - /* Decrement the loop counter */ - rowCnt--; - } - - /* Loop over the number of columns of the input matrix. - All the elements in each column are processed by the row operations */ - loopCnt = numCols; - - /* Index modifier to navigate through the columns */ - l = 0u; - //for(loopCnt = 0u; loopCnt < numCols; loopCnt++) - while(loopCnt > 0u) - { - /* Check if the pivot element is zero.. - * If it is zero then interchange the row with non zero row below. - * If there is no non zero element to replace in the rows below, - * then the matrix is Singular. */ - - /* Working pointer for the input matrix that points - * to the pivot element of the particular row */ - pInT1 = pIn + (l * numCols); - - /* Working pointer for the destination matrix that points - * to the pivot element of the particular row */ - pInT3 = pOut + (l * numCols); - - /* Temporary variable to hold the pivot value */ - in = *pInT1; - - /* Destination pointer modifier */ - k = 1u; - - /* Check if the pivot element is zero */ - if(*pInT1 == 0.0f) - { - /* Loop over the number rows present below */ - for (i = (l + 1u); i < numRows; i++) - { - /* Update the input and destination pointers */ - pInT2 = pInT1 + (numCols * l); - pInT4 = pInT3 + (numCols * k); - - /* Check if there is a non zero pivot element to - * replace in the rows below */ - if(*pInT2 != 0.0f) - { - /* Loop over number of columns - * to the right of the pilot element */ - for (j = 0u; j < (numCols - l); j++) - { - /* Exchange the row elements of the input matrix */ - Xchg = *pInT2; - *pInT2++ = *pInT1; - *pInT1++ = Xchg; - } - - for (j = 0u; j < numCols; j++) - { - Xchg = *pInT4; - *pInT4++ = *pInT3; - *pInT3++ = Xchg; - } - - /* Flag to indicate whether exchange is done or not */ - flag = 1u; - - /* Break after exchange is done */ - break; - } - - /* Update the destination pointer modifier */ - k++; - } - } - - /* Update the status if the matrix is singular */ - if((flag != 1u) && (in == 0.0f)) - { - status = ARM_MATH_SINGULAR; - - break; - } - - /* Points to the pivot row of input and destination matrices */ - pPivotRowIn = pIn + (l * numCols); - pPivotRowDst = pOut + (l * numCols); - - /* Temporary pointers to the pivot row pointers */ - pInT1 = pPivotRowIn; - pInT2 = pPivotRowDst; - - /* Pivot element of the row */ - in = *(pIn + (l * numCols)); - - /* Loop over number of columns - * to the right of the pilot element */ - for (j = 0u; j < (numCols - l); j++) - { - /* Divide each element of the row of the input matrix - * by the pivot element */ - *pInT1++ = *pInT1 / in; - } - for (j = 0u; j < numCols; j++) - { - /* Divide each element of the row of the destination matrix - * by the pivot element */ - *pInT2++ = *pInT2 / in; - } - - /* Replace the rows with the sum of that row and a multiple of row i - * so that each new element in column i above row i is zero.*/ - - /* Temporary pointers for input and destination matrices */ - pInT1 = pIn; - pInT2 = pOut; - - for (i = 0u; i < numRows; i++) - { - /* Check for the pivot element */ - if(i == l) - { - /* If the processing element is the pivot element, - only the columns to the right are to be processed */ - pInT1 += numCols - l; - pInT2 += numCols; - } - else - { - /* Element of the reference row */ - in = *pInT1; - - /* Working pointers for input and destination pivot rows */ - pPRT_in = pPivotRowIn; - pPRT_pDst = pPivotRowDst; - - /* Loop over the number of columns to the right of the pivot element, - to replace the elements in the input matrix */ - for (j = 0u; j < (numCols - l); j++) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - *pInT1++ = *pInT1 - (in * *pPRT_in++); - } - /* Loop over the number of columns to - replace the elements in the destination matrix */ - for (j = 0u; j < numCols; j++) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - *pInT2++ = *pInT2 - (in * *pPRT_pDst++); - } - - } - /* Increment the temporary input pointer */ - pInT1 = pInT1 + l; - } - /* Increment the input pointer */ - pIn++; - - /* Decrement the loop counter */ - loopCnt--; - /* Increment the index modifier */ - l++; - } - - -#endif /* #ifndef ARM_MATH_CM0 */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - if((flag != 1u) && (in == 0.0f)) - { - status = ARM_MATH_SINGULAR; - } - } - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixInv group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c deleted file mode 100644 index a04f12600a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c +++ /dev/null @@ -1,284 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_mult_f32.c -* -* Description: Floating-point matrix multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @defgroup MatrixMult Matrix Multiplication - * - * Multiplies two matrices. - * - * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices" - - * Matrix multiplication is only defined if the number of columns of the - * first matrix equals the number of rows of the second matrix. - * Multiplying an M x N matrix with an N x P matrix results - * in an M x P matrix. - * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of - * pSrcA and pSrcB are equal; and (2) that the size of the output - * matrix equals the outer dimensions of pSrcA and pSrcB. - */ - - -/** - * @addtogroup MatrixMult - * @{ - */ - -/** - * @brief Floating-point matrix multiplication. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - -arm_status arm_mat_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *px; /* Temporary output data matrix pointer */ - float32_t sum; /* Accumulator */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - float32_t in1, in2, in3, in4; - uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - -#ifdef ARM_MATH_MATRIX_CHECK - - - /* Check for matrix mismatch condition */ - if((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - j = 0u; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0.0f; - - /* Initiate the pointer pIn1 to point to the starting address of the column being processed */ - pIn1 = pInA; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - colCnt = numColsA >> 2u; - - /* matrix multiplication */ - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - in3 = *pIn2; - pIn2 += numColsB; - in1 = pIn1[0]; - in2 = pIn1[1]; - sum += in1 * in3; - in4 = *pIn2; - pIn2 += numColsB; - sum += in2 * in4; - - in3 = *pIn2; - pIn2 += numColsB; - in1 = pIn1[2]; - in2 = pIn1[3]; - sum += in1 * in3; - in4 = *pIn2; - pIn2 += numColsB; - sum += in2 * in4; - pIn1 += 4u; - - /* Decrement the loop count */ - colCnt--; - } - - /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - colCnt = numColsA % 0x4u; - - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - sum += *pIn1++ * (*pIn2); - pIn2 += numColsB; - - /* Decrement the loop counter */ - colCnt--; - } - - /* Store the result in the destination buffer */ - *px++ = sum; - - /* Update the pointer pIn2 to point to the starting address of the next column */ - j++; - pIn2 = pSrcB->pData + j; - - /* Decrement the column loop counter */ - col--; - - } while(col > 0u); - -#else - - /* Run the below code for Cortex-M0 */ - - float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - uint16_t col, i = 0u, row = numRowsA, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pInA with each column in pInB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0.0f; - - /* Initialize the pointer pIn1 to point to the starting address of the row being processed */ - pIn1 = pInA; - - /* Matrix A columns number of MAC operations are to be performed */ - colCnt = numColsA; - - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - sum += *pIn1++ * (*pIn2); - pIn2 += numColsB; - - /* Decrement the loop counter */ - colCnt--; - } - - /* Store the result in the destination buffer */ - *px++ = sum; - - /* Decrement the column loop counter */ - col--; - - /* Update the pointer pIn2 to point to the starting address of the next column */ - pIn2 = pInB + (numColsB - col); - - } while(col > 0u); - -#endif /* #ifndef ARM_MATH_CM0 */ - - /* Update the pointer pInA to point to the starting address of the next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement the row loop counter */ - row--; - - } while(row > 0u); - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c deleted file mode 100644 index 5699511cf8..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c +++ /dev/null @@ -1,361 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_mult_fast_q15.c -* -* Description: Q15 matrix multiplication (fast variant) -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixMult - * @{ - */ - - -/** - * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @param[in] *pState points to the array for storing intermediate results - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The difference between the function arm_mat_mult_q15() and this fast variant is that - * the fast variant use a 32-bit rather than a 64-bit accumulator. - * The result of each 1.15 x 1.15 multiplication is truncated to - * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 - * format. Finally, the accumulator is saturated and converted to a 1.15 result. - * - * \par - * The fast version has the same overflow behavior as the standard version but provides - * less precision since it discards the low 16 bits of each multiplication result. - * In order to avoid overflows completely the input signals must be scaled down. - * Scale down one of the input matrices by log2(numColsA) bits to - * avoid overflows, as a total of numColsA additions are computed internally for each - * output element. - * - * \par - * See arm_mat_mult_q15() for a slower implementation of this function - * which uses 64-bit accumulation to provide higher precision. - */ - -arm_status arm_mat_mult_fast_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pState) -{ - q31_t sum; /* accumulator */ - q15_t *pSrcBT = pState; /* input data matrix pointer for transpose */ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */ - q15_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ - uint16_t col, i = 0u, row = numRowsB, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - -#ifndef UNALIGNED_SUPPORT_DISABLE - - q31_t in; /* Temporary variable to hold the input value */ - q31_t inA1, inA2, inB1, inB2; - -#else - - q15_t in; /* Temporary variable to hold the input value */ - q15_t inA1, inA2, inB1, inB2; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif - { - /* Matrix transpose */ - do - { - /* Apply loop unrolling and exchange the columns with row elements */ - col = numColsB >> 2; - - /* The pointer px is set to starting address of the column being processed */ - px = pSrcBT + i; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(col > 0u) - { -#ifndef UNALIGNED_SUPPORT_DISABLE - /* Read two elements from the row */ - in = *__SIMD32(pInB)++; - - /* Unpack and store one element in the destination */ -#ifndef ARM_MATH_BIG_ENDIAN - - *px = (q15_t) in; - -#else - - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Unpack and store the second element in the destination */ -#ifndef ARM_MATH_BIG_ENDIAN - - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#else - - *px = (q15_t) in; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Read two elements from the row */ - in = *__SIMD32(pInB)++; - - /* Unpack and store one element in the destination */ -#ifndef ARM_MATH_BIG_ENDIAN - - *px = (q15_t) in; - -#else - - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Unpack and store the second element in the destination */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#else - - *px = (q15_t) in; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - -#else - - /* Read one element from the row */ - in = *pInB++; - - /* Store one element in the destination */ - *px = in; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Read one element from the row */ - in = *pInB++; - - /* Store one element in the destination */ - *px = in; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Read one element from the row */ - in = *pInB++; - - /* Store one element in the destination */ - *px = in; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Read one element from the row */ - in = *pInB++; - - /* Store one element in the destination */ - *px = in; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Decrement the column loop counter */ - col--; - } - - /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - col = numColsB % 0x4u; - - while(col > 0u) - { - /* Read and store the input element in the destination */ - *px = *pInB++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Decrement the column loop counter */ - col--; - } - - i++; - - /* Decrement the row loop counter */ - row--; - - } while(row > 0u); - - /* Reset the variables for the usage in the following multiplication process */ - row = numRowsA; - i = 0u; - px = pDst->pData; - - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the transposed pSrcB data */ - pInB = pSrcBT; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Apply loop unrolling and compute 2 MACs simultaneously. */ - colCnt = numColsA >> 2; - - /* Initiate the pointer pIn1 to point to the starting address of the column being processed */ - pInA = pSrcA->pData + i; - - /* matrix multiplication */ - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ -#ifndef UNALIGNED_SUPPORT_DISABLE - - inA1 = *__SIMD32(pInA)++; - inB1 = *__SIMD32(pInB)++; - inA2 = *__SIMD32(pInA)++; - inB2 = *__SIMD32(pInB)++; - - sum = __SMLAD(inA1, inB1, sum); - sum = __SMLAD(inA2, inB2, sum); - -#else - - inA1 = *pInA++; - inB1 = *pInB++; - inA2 = *pInA++; - sum += inA1 * inB1; - inB2 = *pInB++; - - inA1 = *pInA++; - inB1 = *pInB++; - sum += inA2 * inB2; - inA2 = *pInA++; - inB2 = *pInB++; - - sum += inA1 * inB1; - sum += inA2 * inB2; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Decrement the loop counter */ - colCnt--; - } - - /* process odd column samples */ - colCnt = numColsA % 0x4u; - - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - sum += (q31_t) (*pInA++) * (*pInB++); - - colCnt--; - } - - /* Saturate and store the result in the destination buffer */ - *px = (q15_t) (sum >> 15); - px++; - - /* Decrement the column loop counter */ - col--; - - } while(col > 0u); - - i = i + numColsA; - - /* Decrement the row loop counter */ - row--; - - } while(row > 0u); - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c deleted file mode 100644 index a7b08fbabf..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c +++ /dev/null @@ -1,218 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_mult_fast_q31.c -* -* Description: Q31 matrix multiplication (fast variant). -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixMult - * @{ - */ - -/** - * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The difference between the function arm_mat_mult_q31() and this fast variant is that - * the fast variant use a 32-bit rather than a 64-bit accumulator. - * The result of each 1.31 x 1.31 multiplication is truncated to - * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 - * format. Finally, the accumulator is saturated and converted to a 1.31 result. - * - * \par - * The fast version has the same overflow behavior as the standard version but provides - * less precision since it discards the low 32 bits of each multiplication result. - * In order to avoid overflows completely the input signals must be scaled down. - * Scale down one of the input matrices by log2(numColsA) bits to - * avoid overflows, as a total of numColsA additions are computed internally for each - * output element. - * - * \par - * See arm_mat_mult_q31() for a slower implementation of this function - * which uses 64-bit accumulation to provide higher precision. - */ - -arm_status arm_mat_mult_fast_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ -// q31_t *pSrcB = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - q31_t *px; /* Temporary output data matrix pointer */ - q31_t sum; /* Accumulator */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - q31_t inA1, inA2, inA3, inA4, inB1, inB2, inB3, inB4; - -#ifdef ARM_MATH_MATRIX_CHECK - - - /* Check for matrix mismatch condition */ - if((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - j = 0u; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Initiate the pointer pIn1 to point to the starting address of pInA */ - pIn1 = pInA; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - colCnt = numColsA >> 2; - - - /* matrix multiplication */ - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - /* Perform the multiply-accumulates */ - inB1 = *pIn2; - pIn2 += numColsB; - - inA1 = pIn1[0]; - inA2 = pIn1[1]; - - inB2 = *pIn2; - pIn2 += numColsB; - - inB3 = *pIn2; - pIn2 += numColsB; - - sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA1 * inB1)) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA2 * inB2)) >> 32); - - inA3 = pIn1[2]; - inA4 = pIn1[3]; - - inB4 = *pIn2; - pIn2 += numColsB; - - sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA3 * inB3)) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA4 * inB4)) >> 32); - - pIn1 += 4u; - - /* Decrement the loop counter */ - colCnt--; - } - - /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - colCnt = numColsA % 0x4u; - - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - /* Perform the multiply-accumulates */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * pIn1++ * (*pIn2))) >> 32); - pIn2 += numColsB; - - /* Decrement the loop counter */ - colCnt--; - } - - /* Convert the result from 2.30 to 1.31 format and store in destination buffer */ - *px++ = sum << 1; - - /* Update the pointer pIn2 to point to the starting address of the next column */ - j++; - pIn2 = pSrcB->pData + j; - - /* Decrement the column loop counter */ - col--; - - } while(col > 0u); - - /* Update the pointer pInA to point to the starting address of the next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement the row loop counter */ - row--; - - } while(row > 0u); - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c deleted file mode 100644 index 46ceca1f26..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c +++ /dev/null @@ -1,467 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_mult_q15.c -* -* Description: Q15 matrix multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixMult - * @{ - */ - - -/** - * @brief Q15 matrix multiplication - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @param[in] *pState points to the array for storing intermediate results - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 64-bit internal accumulator. The inputs to the - * multiplications are in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate - * results are accumulated in a 64-bit accumulator in 34.30 format. This approach - * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then - * truncated to 34.15 format by discarding the low 15 bits and then saturated to - * 1.15 format. - * - * \par - * Refer to arm_mat_mult_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. - * - */ - -arm_status arm_mat_mult_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pState) -{ - q63_t sum; /* accumulator */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q15_t *pSrcBT = pState; /* input data matrix pointer for transpose */ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */ - q15_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ - uint16_t col, i = 0u, row = numRowsB, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - -#ifndef UNALIGNED_SUPPORT_DISABLE - - q31_t in; /* Temporary variable to hold the input value */ - q31_t pSourceA1, pSourceB1, pSourceA2, pSourceB2; - -#else - - q15_t in; /* Temporary variable to hold the input value */ - q15_t inA1, inB1, inA2, inB2; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - /* Matrix transpose */ - do - { - /* Apply loop unrolling and exchange the columns with row elements */ - col = numColsB >> 2; - - /* The pointer px is set to starting address of the column being processed */ - px = pSrcBT + i; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(col > 0u) - { -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Read two elements from the row */ - in = *__SIMD32(pInB)++; - - /* Unpack and store one element in the destination */ -#ifndef ARM_MATH_BIG_ENDIAN - - *px = (q15_t) in; - -#else - - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Unpack and store the second element in the destination */ -#ifndef ARM_MATH_BIG_ENDIAN - - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#else - - *px = (q15_t) in; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Read two elements from the row */ - in = *__SIMD32(pInB)++; - - /* Unpack and store one element in the destination */ -#ifndef ARM_MATH_BIG_ENDIAN - - *px = (q15_t) in; - -#else - - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Unpack and store the second element in the destination */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#else - - *px = (q15_t) in; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - -#else - - /* Read one element from the row */ - in = *pInB++; - - /* Store one element in the destination */ - *px = in; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Read one element from the row */ - in = *pInB++; - - /* Store one element in the destination */ - *px = in; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Read one element from the row */ - in = *pInB++; - - /* Store one element in the destination */ - *px = in; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Read one element from the row */ - in = *pInB++; - - /* Store one element in the destination */ - *px = in; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Decrement the column loop counter */ - col--; - } - - /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - col = numColsB % 0x4u; - - while(col > 0u) - { - /* Read and store the input element in the destination */ - *px = *pInB++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += numRowsB; - - /* Decrement the column loop counter */ - col--; - } - - i++; - - /* Decrement the row loop counter */ - row--; - - } while(row > 0u); - - /* Reset the variables for the usage in the following multiplication process */ - row = numRowsA; - i = 0u; - px = pDst->pData; - - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the transposed pSrcB data */ - pInB = pSrcBT; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Apply loop unrolling and compute 2 MACs simultaneously. */ - colCnt = numColsA >> 2; - - /* Initiate the pointer pIn1 to point to the starting address of the column being processed */ - pInA = pSrcA->pData + i; - - - /* matrix multiplication */ - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* read real and imag values from pSrcA and pSrcB buffer */ - pSourceA1 = *__SIMD32(pInA)++; - pSourceB1 = *__SIMD32(pInB)++; - - pSourceA2 = *__SIMD32(pInA)++; - pSourceB2 = *__SIMD32(pInB)++; - - /* Multiply and Accumlates */ - sum = __SMLALD(pSourceA1, pSourceB1, sum); - sum = __SMLALD(pSourceA2, pSourceB2, sum); - -#else - /* read real and imag values from pSrcA and pSrcB buffer */ - inA1 = *pInA++; - inB1 = *pInB++; - inA2 = *pInA++; - /* Multiply and Accumlates */ - sum += inA1 * inB1; - inB2 = *pInB++; - - inA1 = *pInA++; - inB1 = *pInB++; - /* Multiply and Accumlates */ - sum += inA2 * inB2; - inA2 = *pInA++; - inB2 = *pInB++; - - /* Multiply and Accumlates */ - sum += inA1 * inB1; - sum += inA2 * inB2; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Decrement the loop counter */ - colCnt--; - } - - /* process remaining column samples */ - colCnt = numColsA & 3u; - - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - sum += *pInA++ * *pInB++; - - /* Decrement the loop counter */ - colCnt--; - } - - /* Saturate and store the result in the destination buffer */ - *px = (q15_t) (__SSAT((sum >> 15), 16)); - px++; - - /* Decrement the column loop counter */ - col--; - - } while(col > 0u); - - i = i + numColsA; - - /* Decrement the row loop counter */ - row--; - - } while(row > 0u); - -#else - - /* Run the below code for Cortex-M0 */ - - q15_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - q15_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - q15_t *px; /* Temporary output data matrix pointer */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t col, i = 0u, row = numRowsA, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Initiate the pointer pIn1 to point to the starting address of pSrcA */ - pIn1 = pInA; - - /* Matrix A columns number of MAC operations are to be performed */ - colCnt = numColsA; - - /* matrix multiplication */ - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - /* Perform the multiply-accumulates */ - sum += (q31_t) * pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement the loop counter */ - colCnt--; - } - - /* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */ - /* Saturate and store the result in the destination buffer */ - *px++ = (q15_t) __SSAT((sum >> 15), 16); - - /* Decrement the column loop counter */ - col--; - - /* Update the pointer pIn2 to point to the starting address of the next column */ - pIn2 = pInB + (numColsB - col); - - } while(col > 0u); - - /* Update the pointer pSrcA to point to the starting address of the next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement the row loop counter */ - row--; - - } while(row > 0u); - -#endif /* #ifndef ARM_MATH_CM0 */ - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c deleted file mode 100644 index 54026e3db4..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c +++ /dev/null @@ -1,292 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_mult_q31.c -* -* Description: Q31 matrix multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixMult - * @{ - */ - -/** - * @brief Q31 matrix multiplication - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate - * multiplication results but provides only a single guard bit. There is no saturation - * on intermediate additions. Thus, if the accumulator overflows it wraps around and - * distorts the result. The input signals should be scaled down to avoid intermediate - * overflows. The input is thus scaled down by log2(numColsA) bits - * to avoid overflows, as a total of numColsA additions are performed internally. - * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. - * - * \par - * See arm_mat_mult_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. - * - */ - -arm_status arm_mat_mult_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - q31_t *px; /* Temporary output data matrix pointer */ - q63_t sum; /* Accumulator */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - q31_t a0, a1, a2, a3, b0, b1, b2, b3; - -#ifdef ARM_MATH_MATRIX_CHECK - - - /* Check for matrix mismatch condition */ - if((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - j = 0u; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Initiate the pointer pIn1 to point to the starting address of pInA */ - pIn1 = pInA; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - colCnt = numColsA >> 2; - - - /* matrix multiplication */ - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - /* Perform the multiply-accumulates */ - b0 = *pIn2; - pIn2 += numColsB; - - a0 = *pIn1++; - a1 = *pIn1++; - - b1 = *pIn2; - pIn2 += numColsB; - b2 = *pIn2; - pIn2 += numColsB; - - sum += (q63_t) a0 *b0; - sum += (q63_t) a1 *b1; - - a2 = *pIn1++; - a3 = *pIn1++; - - b3 = *pIn2; - pIn2 += numColsB; - - sum += (q63_t) a2 *b2; - sum += (q63_t) a3 *b3; - - /* Decrement the loop counter */ - colCnt--; - } - - /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - colCnt = numColsA % 0x4u; - - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - /* Perform the multiply-accumulates */ - sum += (q63_t) * pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement the loop counter */ - colCnt--; - } - - /* Convert the result from 2.62 to 1.31 format and store in destination buffer */ - *px++ = (q31_t) (sum >> 31); - - /* Update the pointer pIn2 to point to the starting address of the next column */ - j++; - pIn2 = (pSrcB->pData) + j; - - /* Decrement the column loop counter */ - col--; - - } while(col > 0u); - -#else - - /* Run the below code for Cortex-M0 */ - - q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - uint16_t col, i = 0u, row = numRowsA, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Initiate the pointer pIn1 to point to the starting address of pInA */ - pIn1 = pInA; - - /* Matrix A columns number of MAC operations are to be performed */ - colCnt = numColsA; - - /* matrix multiplication */ - while(colCnt > 0u) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - /* Perform the multiply-accumulates */ - sum += (q63_t) * pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement the loop counter */ - colCnt--; - } - - /* Convert the result from 2.62 to 1.31 format and store in destination buffer */ - *px++ = (q31_t) (sum >> 31); - - /* Decrement the column loop counter */ - col--; - - /* Update the pointer pIn2 to point to the starting address of the next column */ - pIn2 = pInB + (numColsB - col); - - } while(col > 0u); - -#endif - - /* Update the pointer pInA to point to the starting address of the next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement the row loop counter */ - row--; - - } while(row > 0u); - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c deleted file mode 100644 index 833c282a7c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c +++ /dev/null @@ -1,179 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_scale_f32.c -* -* Description: Multiplies a floating-point matrix by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @defgroup MatrixScale Matrix Scale - * - * Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the - * matrix by the scalar. For example: - * \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix" - * - * The function checks to make sure that the input and output matrices are of the same size. - * - * In the fixed-point Q15 and Q31 functions, scale is represented by - * a fractional multiplication scaleFract and an arithmetic shift shift. - * The shift allows the gain of the scaling operation to exceed 1.0. - * The overall scale factor applied to the fixed-point data is - *
        
- *     scale = scaleFract * 2^shift.        
- * 
- */ - -/** - * @addtogroup MatrixScale - * @{ - */ - -/** - * @brief Floating-point matrix scaling. - * @param[in] *pSrc points to input matrix structure - * @param[in] scale scale factor to be applied - * @param[out] *pDst points to output matrix structure - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - * - */ - -arm_status arm_mat_scale_f32( - const arm_matrix_instance_f32 * pSrc, - float32_t scale, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn = pSrc->pData; /* input data matrix pointer */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix scaling */ - -#ifndef ARM_MATH_CM0 - - float32_t in1, in2, in3, in4; /* temporary variables */ - float32_t out1, out2, out3, out4; /* temporary variables */ - -#endif // #ifndef ARM_MATH_CM0 - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - /* Total number of samples in the input matrix */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Loop Unrolling */ - blkCnt = numSamples >> 2; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) * scale */ - /* Scaling and results are stored in the destination buffer. */ - in1 = pIn[0]; - in2 = pIn[1]; - in3 = pIn[2]; - in4 = pIn[3]; - - out1 = in1 * scale; - out2 = in2 * scale; - out3 = in3 * scale; - out4 = in4 * scale; - - - pOut[0] = out1; - pOut[1] = out2; - pOut[2] = out3; - pOut[3] = out4; - - /* update pointers to process next sampels */ - pIn += 4u; - pOut += 4u; - - /* Decrement the numSamples loop counter */ - blkCnt--; - } - - /* If the numSamples is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = numSamples % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) * scale */ - /* The results are stored in the destination buffer. */ - *pOut++ = (*pIn++) * scale; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixScale group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c deleted file mode 100644 index 684fbcc50c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c +++ /dev/null @@ -1,181 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_scale_q15.c -* -* Description: Multiplies a Q15 matrix by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixScale - * @{ - */ - -/** - * @brief Q15 matrix scaling. - * @param[in] *pSrc points to input matrix - * @param[in] scaleFract fractional portion of the scale factor - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.15 format. - * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. - */ - -arm_status arm_mat_scale_q15( - const arm_matrix_instance_q15 * pSrc, - q15_t scaleFract, - int32_t shift, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pIn = pSrc->pData; /* input data matrix pointer */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32_t numSamples; /* total number of elements in the matrix */ - int32_t totShift = 15 - shift; /* total shift to apply after scaling */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix scaling */ - -#ifndef ARM_MATH_CM0 - - q15_t in1, in2, in3, in4; - q31_t out1, out2, out3, out4; - q31_t inA1, inA2; - -#endif // #ifndef ARM_MATH_CM0 - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch */ - if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif // #ifdef ARM_MATH_MATRIX_CHECK - { - /* Total number of samples in the input matrix */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - /* Loop Unrolling */ - blkCnt = numSamples >> 2; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) * k */ - /* Scale, saturate and then store the results in the destination buffer. */ - /* Reading 2 inputs from memory */ - inA1 = _SIMD32_OFFSET(pIn); - inA2 = _SIMD32_OFFSET(pIn + 2); - - /* C = A * scale */ - /* Scale the inputs and then store the 2 results in the destination buffer - * in single cycle by packing the outputs */ - out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract); - out2 = (q31_t) ((q15_t) inA1 * scaleFract); - out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract); - out4 = (q31_t) ((q15_t) inA2 * scaleFract); - - out1 = out1 >> totShift; - inA1 = _SIMD32_OFFSET(pIn + 4); - out2 = out2 >> totShift; - inA2 = _SIMD32_OFFSET(pIn + 6); - out3 = out3 >> totShift; - out4 = out4 >> totShift; - - in1 = (q15_t) (__SSAT(out1, 16)); - in2 = (q15_t) (__SSAT(out2, 16)); - in3 = (q15_t) (__SSAT(out3, 16)); - in4 = (q15_t) (__SSAT(out4, 16)); - - _SIMD32_OFFSET(pOut) = __PKHBT(in2, in1, 16); - _SIMD32_OFFSET(pOut + 2) = __PKHBT(in4, in3, 16); - - /* update pointers to process next sampels */ - pIn += 4u; - pOut += 4u; - - - /* Decrement the numSamples loop counter */ - blkCnt--; - } - - /* If the numSamples is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = numSamples % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) * k */ - /* Scale, saturate and then store the results in the destination buffer. */ - *pOut++ = - (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16)); - - /* Decrement the numSamples loop counter */ - blkCnt--; - } - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixScale group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c deleted file mode 100644 index 7227ad38ae..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c +++ /dev/null @@ -1,201 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_scale_q31.c -* -* Description: Multiplies a Q31 matrix by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixScale - * @{ - */ - -/** - * @brief Q31 matrix scaling. - * @param[in] *pSrc points to input matrix - * @param[in] scaleFract fractional portion of the scale factor - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.31 format. - * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format. - */ - -arm_status arm_mat_scale_q31( - const arm_matrix_instance_q31 * pSrc, - q31_t scaleFract, - int32_t shift, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn = pSrc->pData; /* input data matrix pointer */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32_t numSamples; /* total number of elements in the matrix */ - int32_t totShift = shift + 1; /* shift to apply after scaling */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix scaling */ - q31_t in1, in2, out1; /* temporary variabels */ - -#ifndef ARM_MATH_CM0 - - q31_t in3, in4, out2, out3, out4; /* temporary variables */ - -#endif // #ifndef ARM_MAT_CM0 - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch */ - if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif // #ifdef ARM_MATH_MATRIX_CHECK - { - /* Total number of samples in the input matrix */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Loop Unrolling */ - blkCnt = numSamples >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) * k */ - /* Read values from input */ - in1 = *pIn; - in2 = *(pIn + 1); - in3 = *(pIn + 2); - in4 = *(pIn + 3); - - /* multiply input with scaler value */ - in1 = ((q63_t) in1 * scaleFract) >> 32; - in2 = ((q63_t) in2 * scaleFract) >> 32; - in3 = ((q63_t) in3 * scaleFract) >> 32; - in4 = ((q63_t) in4 * scaleFract) >> 32; - - /* apply shifting */ - out1 = in1 << totShift; - out2 = in2 << totShift; - - /* saturate the results. */ - if(in1 != (out1 >> totShift)) - out1 = 0x7FFFFFFF ^ (in1 >> 31); - - if(in2 != (out2 >> totShift)) - out2 = 0x7FFFFFFF ^ (in2 >> 31); - - out3 = in3 << totShift; - out4 = in4 << totShift; - - *pOut = out1; - *(pOut + 1) = out2; - - if(in3 != (out3 >> totShift)) - out3 = 0x7FFFFFFF ^ (in3 >> 31); - - if(in4 != (out4 >> totShift)) - out4 = 0x7FFFFFFF ^ (in4 >> 31); - - - *(pOut + 2) = out3; - *(pOut + 3) = out4; - - /* update pointers to process next sampels */ - pIn += 4u; - pOut += 4u; - - - /* Decrement the numSamples loop counter */ - blkCnt--; - } - - /* If the numSamples is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = numSamples % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) * k */ - /* Scale, saturate and then store the results in the destination buffer. */ - in1 = *pIn++; - - in2 = ((q63_t) in1 * scaleFract) >> 32; - - out1 = in2 << totShift; - - if(in2 != (out1 >> totShift)) - out1 = 0x7FFFFFFF ^ (in2 >> 31); - - *pOut++ = out1; - - /* Decrement the numSamples loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixScale group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c deleted file mode 100644 index 6ee7a46c8f..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c +++ /dev/null @@ -1,207 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_sub_f32.c -* -* Description: Floating-point matrix subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @defgroup MatrixSub Matrix Subtraction - * - * Subtract two matrices. - * \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices" - * - * The functions check to make sure that - * pSrcA, pSrcB, and pDst have the same - * number of rows and columns. - */ - -/** - * @addtogroup MatrixSub - * @{ - */ - -/** - * @brief Floating-point matrix subtraction - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - -arm_status arm_mat_sub_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - -#ifndef ARM_MATH_CM0 - - float32_t inA1, inA2, inB1, inB2, out1, out2; /* temporary variables */ - -#endif // #ifndef ARM_MATH_CM0 - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix subtraction */ - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - /* Total number of samples in the input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Loop Unrolling */ - blkCnt = numSamples >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) - B(m,n) */ - /* Subtract and then store the results in the destination buffer. */ - /* Read values from source A */ - inA1 = pIn1[0]; - - /* Read values from source B */ - inB1 = pIn2[0]; - - /* Read values from source A */ - inA2 = pIn1[1]; - - /* out = sourceA - sourceB */ - out1 = inA1 - inB1; - - /* Read values from source B */ - inB2 = pIn2[1]; - - /* Read values from source A */ - inA1 = pIn1[2]; - - /* out = sourceA - sourceB */ - out2 = inA2 - inB2; - - /* Read values from source B */ - inB1 = pIn2[2]; - - /* Store result in destination */ - pOut[0] = out1; - pOut[1] = out2; - - /* Read values from source A */ - inA2 = pIn1[3]; - - /* Read values from source B */ - inB2 = pIn2[3]; - - /* out = sourceA - sourceB */ - out1 = inA1 - inB1; - - - /* out = sourceA - sourceB */ - out2 = inA2 - inB2; - - /* Store result in destination */ - pOut[2] = out1; - - /* Store result in destination */ - pOut[3] = out2; - - - /* update pointers to process next sampels */ - pIn1 += 4u; - pIn2 += 4u; - pOut += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the numSamples is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = numSamples % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) - B(m,n) */ - /* Subtract and then store the results in the destination buffer. */ - *pOut++ = (*pIn1++) - (*pIn2++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixSub group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c deleted file mode 100644 index ea32f04bd1..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c +++ /dev/null @@ -1,158 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_sub_q15.c -* -* Description: Q15 Matrix subtraction -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixSub - * @{ - */ - -/** - * @brief Q15 matrix subtraction. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -arm_status arm_mat_sub_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix subtraction */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - - /* Check for matrix mismatch condition */ - if((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in the input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Apply loop unrolling */ - blkCnt = numSamples >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) - B(m,n) */ - /* Subtract, Saturate and then store the results in the destination buffer. */ - *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++); - *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = numSamples % 0x4u; - - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) - B(m,n) */ - /* Subtract and then store the results in the destination buffer. */ - *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) - B(m,n) */ - /* Subtract and then store the results in the destination buffer. */ - *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixSub group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c deleted file mode 100644 index 157d59b725..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c +++ /dev/null @@ -1,206 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_sub_q31.c -* -* Description: Q31 matrix subtraction -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixSub - * @{ - */ - -/** - * @brief Q31 matrix subtraction. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. - */ - - -arm_status arm_mat_sub_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - q31_t inA1, inB1; /* temporary variables */ - -#ifndef ARM_MATH_CM0 - - q31_t inA2, inB2; /* temporary variables */ - q31_t out1, out2; /* temporary variables */ - -#endif // #ifndef ARM_MATH_CM0 - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix subtraction */ - - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif - { - /* Total number of samples in the input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Loop Unrolling */ - blkCnt = numSamples >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) - B(m,n) */ - /* Subtract, saturate and then store the results in the destination buffer. */ - /* Read values from source A */ - inA1 = pIn1[0]; - - /* Read values from source B */ - inB1 = pIn2[0]; - - /* Read values from source A */ - inA2 = pIn1[1]; - - /* Subtract and saturate */ - out1 = __QSUB(inA1, inB1); - - /* Read values from source B */ - inB2 = pIn2[1]; - - /* Read values from source A */ - inA1 = pIn1[2]; - - /* Subtract and saturate */ - out2 = __QSUB(inA2, inB2); - - /* Read values from source B */ - inB1 = pIn2[2]; - - /* Store result in destination */ - pOut[0] = out1; - pOut[1] = out2; - - /* Read values from source A */ - inA2 = pIn1[3]; - - /* Read values from source B */ - inB2 = pIn2[3]; - - /* Subtract and saturate */ - out1 = __QSUB(inA1, inB1); - - /* Subtract and saturate */ - out2 = __QSUB(inA2, inB2); - - /* Store result in destination */ - pOut[2] = out1; - pOut[3] = out2; - - /* update pointers to process next samples */ - pIn1 += 4u; - pIn2 += 4u; - pOut += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the numSamples is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = numSamples % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C(m,n) = A(m,n) - B(m,n) */ - /* Subtract, saturate and then store the results in the destination buffer. */ - inA1 = *pIn1++; - inB1 = *pIn2++; - - inA1 = __QSUB(inA1, inB1); - - *pOut++ = inA1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixSub group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c deleted file mode 100644 index 721b512b79..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c +++ /dev/null @@ -1,216 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_trans_f32.c -* -* Description: Floating-point matrix transpose. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -/** - * @defgroup MatrixTrans Matrix Transpose - * - * Tranposes a matrix. - * Transposing an M x N matrix flips it around the center diagonal and results in an N x M matrix. - * \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix" - */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixTrans - * @{ - */ - -/** - * @brief Floating-point matrix transpose. - * @param[in] *pSrc points to the input matrix - * @param[out] *pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - - -arm_status arm_mat_trans_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn = pSrc->pData; /* input data matrix pointer */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *px; /* Temporary output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of rows */ - uint16_t nColumns = pSrc->numCols; /* number of columns */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - uint16_t blkCnt, i = 0u, row = nRows; /* loop counters */ - arm_status status; /* status of matrix transpose */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - - /* Check for matrix mismatch condition */ - if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* Loop Unrolling */ - blkCnt = nColumns >> 2; - - /* The pointer px is set to starting address of the column being processed */ - px = pOut + i; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) /* column loop */ - { - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Decrement the column loop counter */ - blkCnt--; - } - - /* Perform matrix transpose for last 3 samples here. */ - blkCnt = nColumns % 0x4u; - - while(blkCnt > 0u) - { - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Decrement the column loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - uint16_t col, i = 0u, row = nRows; /* loop counters */ - arm_status status; /* status of matrix transpose */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* The pointer px is set to starting address of the column being processed */ - px = pOut + i; - - /* Initialize column loop counter */ - col = nColumns; - - while(col > 0u) - { - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Decrement the column loop counter */ - col--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - i++; - - /* Decrement the row loop counter */ - row--; - - } while(row > 0u); /* row loop end */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixTrans group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c deleted file mode 100644 index bb03e72de0..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c +++ /dev/null @@ -1,282 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_trans_q15.c -* -* Description: Q15 matrix transpose. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixTrans - * @{ - */ - -/* - * @brief Q15 matrix transpose. - * @param[in] *pSrc points to the input matrix - * @param[out] *pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - -arm_status arm_mat_trans_q15( - const arm_matrix_instance_q15 * pSrc, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pSrcA = pSrc->pData; /* input data matrix pointer */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of nRows */ - uint16_t nColumns = pSrc->numCols; /* number of nColumns */ - uint16_t col, row = nRows, i = 0u; /* row and column loop counters */ - arm_status status; /* status of matrix transpose */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ -#ifndef UNALIGNED_SUPPORT_DISABLE - - q31_t in; /* variable to hold temporary output */ - -#else - - q15_t in; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - -#ifdef ARM_MATH_MATRIX_CHECK - - - /* Check for matrix mismatch condition */ - if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - - /* Apply loop unrolling and exchange the columns with row elements */ - col = nColumns >> 2u; - - /* The pointer pOut is set to starting address of the column being processed */ - pOut = pDst->pData + i; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(col > 0u) - { -#ifndef UNALIGNED_SUPPORT_DISABLE - - /* Read two elements from the row */ - in = *__SIMD32(pSrcA)++; - - /* Unpack and store one element in the destination */ -#ifndef ARM_MATH_BIG_ENDIAN - - *pOut = (q15_t) in; - -#else - - *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update the pointer pOut to point to the next row of the transposed matrix */ - pOut += nRows; - - /* Unpack and store the second element in the destination */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#else - - *pOut = (q15_t) in; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update the pointer pOut to point to the next row of the transposed matrix */ - pOut += nRows; - - /* Read two elements from the row */ -#ifndef ARM_MATH_BIG_ENDIAN - - in = *__SIMD32(pSrcA)++; - -#else - - in = *__SIMD32(pSrcA)++; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Unpack and store one element in the destination */ -#ifndef ARM_MATH_BIG_ENDIAN - - *pOut = (q15_t) in; - -#else - - *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update the pointer pOut to point to the next row of the transposed matrix */ - pOut += nRows; - - /* Unpack and store the second element in the destination */ -#ifndef ARM_MATH_BIG_ENDIAN - - *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#else - - *pOut = (q15_t) in; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - -#else - /* Read one element from the row */ - in = *pSrcA++; - - /* Store one element in the destination */ - *pOut = in; - - /* Update the pointer px to point to the next row of the transposed matrix */ - pOut += nRows; - - /* Read one element from the row */ - in = *pSrcA++; - - /* Store one element in the destination */ - *pOut = in; - - /* Update the pointer px to point to the next row of the transposed matrix */ - pOut += nRows; - - /* Read one element from the row */ - in = *pSrcA++; - - /* Store one element in the destination */ - *pOut = in; - - /* Update the pointer px to point to the next row of the transposed matrix */ - pOut += nRows; - - /* Read one element from the row */ - in = *pSrcA++; - - /* Store one element in the destination */ - *pOut = in; - -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /* Update the pointer pOut to point to the next row of the transposed matrix */ - pOut += nRows; - - /* Decrement the column loop counter */ - col--; - } - - /* Perform matrix transpose for last 3 samples here. */ - col = nColumns % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* The pointer pOut is set to starting address of the column being processed */ - pOut = pDst->pData + i; - - /* Initialize column loop counter */ - col = nColumns; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(col > 0u) - { - /* Read and store the input element in the destination */ - *pOut = *pSrcA++; - - /* Update the pointer pOut to point to the next row of the transposed matrix */ - pOut += nRows; - - /* Decrement the column loop counter */ - col--; - } - - i++; - - /* Decrement the row loop counter */ - row--; - - } while(row > 0u); - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixTrans group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c deleted file mode 100644 index 70cb018605..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c +++ /dev/null @@ -1,208 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mat_trans_q31.c -* -* Description: Q31 matrix transpose. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @addtogroup MatrixTrans - * @{ - */ - -/* - * @brief Q31 matrix transpose. - * @param[in] *pSrc points to the input matrix - * @param[out] *pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - -arm_status arm_mat_trans_q31( - const arm_matrix_instance_q31 * pSrc, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn = pSrc->pData; /* input data matrix pointer */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - q31_t *px; /* Temporary output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of nRows */ - uint16_t nColumns = pSrc->numCols; /* number of nColumns */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - uint16_t blkCnt, i = 0u, row = nRows; /* loop counters */ - arm_status status; /* status of matrix transpose */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - - /* Check for matrix mismatch condition */ - if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* Apply loop unrolling and exchange the columns with row elements */ - blkCnt = nColumns >> 2u; - - /* The pointer px is set to starting address of the column being processed */ - px = pOut + i; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Decrement the column loop counter */ - blkCnt--; - } - - /* Perform matrix transpose for last 3 samples here. */ - blkCnt = nColumns % 0x4u; - - while(blkCnt > 0u) - { - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Decrement the column loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - uint16_t col, i = 0u, row = nRows; /* loop counters */ - arm_status status; /* status of matrix transpose */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* The pointer px is set to starting address of the column being processed */ - px = pOut + i; - - /* Initialize column loop counter */ - col = nColumns; - - while(col > 0u) - { - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Decrement the column loop counter */ - col--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - i++; - - /* Decrement the row loop counter */ - row--; - - } - while(row > 0u); /* row loop end */ - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixTrans group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c deleted file mode 100644 index 06a348cd42..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c +++ /dev/null @@ -1,178 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_max_f32.c -* -* Description: Maximum value of a floating-point vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @defgroup Max Maximum - * - * Computes the maximum value of an array of data. - * The function returns both the maximum value and its position within the array. - * There are separate functions for floating-point, Q31, Q15, and Q7 data types. - */ - -/** - * @addtogroup Max - * @{ - */ - - -/** - * @brief Maximum value of a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult maximum value returned here - * @param[out] *pIndex index of maximum value returned here - * @return none. - */ - -void arm_max_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex, count; /* loop counter */ - - /* Initialise the count value. */ - count = 0u; - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - /* Loop unrolling */ - blkCnt = (blockSize - 1u) >> 2u; - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - while(blkCnt > 0u) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - maxVal2 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and its index */ - out = maxVal1; - outIndex = count + 1u; - } - - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal2) - { - /* Update the maximum value and its index */ - out = maxVal2; - outIndex = count + 2u; - } - - maxVal2 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and its index */ - out = maxVal1; - outIndex = count + 3u; - } - - /* compare for the maximum value */ - if(out < maxVal2) - { - /* Update the maximum value and its index */ - out = maxVal2; - outIndex = count + 4u; - } - - count += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* if (blockSize - 1u) is not multiple of 4 */ - blkCnt = (blockSize - 1u) % 4u; - -#else - - /* Run the below code for Cortex-M0 */ - float32_t maxVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* loop counter */ - - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - blkCnt = (blockSize - 1u); - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and it's index */ - out = maxVal1; - outIndex = blockSize - blkCnt; - } - - - /* Decrement the loop counter */ - blkCnt--; - - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} - -/** - * @} end of Max group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c deleted file mode 100644 index 5544cde57e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c +++ /dev/null @@ -1,168 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_max_q15.c -* -* Description: Maximum value of a Q15 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup Max - * @{ - */ - - -/** - * @brief Maximum value of a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult maximum value returned here - * @param[out] *pIndex index of maximum value returned here - * @return none. - */ - -void arm_max_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q15_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex, count; /* loop counter */ - - /* Initialise the count value. */ - count = 0u; - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - /* Loop unrolling */ - blkCnt = (blockSize - 1u) >> 2u; - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - while(blkCnt > 0u) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - maxVal2 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and its index */ - out = maxVal1; - outIndex = count + 1u; - } - - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal2) - { - /* Update the maximum value and its index */ - out = maxVal2; - outIndex = count + 2u; - } - - maxVal2 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and its index */ - out = maxVal1; - outIndex = count + 3u; - } - - /* compare for the maximum value */ - if(out < maxVal2) - { - /* Update the maximum value and its index */ - out = maxVal2; - outIndex = count + 4u; - } - - count += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* if (blockSize - 1u) is not multiple of 4 */ - blkCnt = (blockSize - 1u) % 4u; - -#else - - /* Run the below code for Cortex-M0 */ - q15_t maxVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* loop counter */ - - blkCnt = (blockSize - 1u); - - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and it's index */ - out = maxVal1; - outIndex = blockSize - blkCnt; - } - /* Decrement the loop counter */ - blkCnt--; - - } - - /* Store the maximum value and its index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} - -/** - * @} end of Max group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c deleted file mode 100644 index 208f2b67b9..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c +++ /dev/null @@ -1,169 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_max_q31.c -* -* Description: Maximum value of a Q31 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup Max - * @{ - */ - - -/** - * @brief Maximum value of a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult maximum value returned here - * @param[out] *pIndex index of maximum value returned here - * @return none. - */ - -void arm_max_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex, count; /* loop counter */ - - /* Initialise the count value. */ - count = 0u; - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - /* Loop unrolling */ - blkCnt = (blockSize - 1u) >> 2u; - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - while(blkCnt > 0u) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - maxVal2 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and its index */ - out = maxVal1; - outIndex = count + 1u; - } - - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal2) - { - /* Update the maximum value and its index */ - out = maxVal2; - outIndex = count + 2u; - } - - maxVal2 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and its index */ - out = maxVal1; - outIndex = count + 3u; - } - - /* compare for the maximum value */ - if(out < maxVal2) - { - /* Update the maximum value and its index */ - out = maxVal2; - outIndex = count + 4u; - } - - count += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* if (blockSize - 1u) is not multiple of 4 */ - blkCnt = (blockSize - 1u) % 4u; - -#else - - /* Run the below code for Cortex-M0 */ - q31_t maxVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* loop counter */ - - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - blkCnt = (blockSize - 1u); - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and it's index */ - out = maxVal1; - outIndex = blockSize - blkCnt; - } - - /* Decrement the loop counter */ - blkCnt--; - - } - - /* Store the maximum value and its index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} - -/** - * @} end of Max group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c deleted file mode 100644 index 22ee440443..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c +++ /dev/null @@ -1,169 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_max_q7.c -* -* Description: Maximum value of a Q7 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup Max - * @{ - */ - - -/** - * @brief Maximum value of a Q7 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult maximum value returned here - * @param[out] *pIndex index of maximum value returned here - * @return none. - */ - -void arm_max_q7( - q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ -#ifndef ARM_MATH_CM0 - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q7_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex, count; /* loop counter */ - - /* Initialise the count value. */ - count = 0u; - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - /* Loop unrolling */ - blkCnt = (blockSize - 1u) >> 2u; - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - while(blkCnt > 0u) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - maxVal2 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and its index */ - out = maxVal1; - outIndex = count + 1u; - } - - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal2) - { - /* Update the maximum value and its index */ - out = maxVal2; - outIndex = count + 2u; - } - - maxVal2 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and its index */ - out = maxVal1; - outIndex = count + 3u; - } - - /* compare for the maximum value */ - if(out < maxVal2) - { - /* Update the maximum value and its index */ - out = maxVal2; - outIndex = count + 4u; - } - - count += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* if (blockSize - 1u) is not multiple of 4 */ - blkCnt = (blockSize - 1u) % 4u; - -#else - - /* Run the below code for Cortex-M0 */ - q7_t maxVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* loop counter */ - - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - blkCnt = (blockSize - 1u); - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if(out < maxVal1) - { - /* Update the maximum value and it's index */ - out = maxVal1; - outIndex = blockSize - blkCnt; - } - /* Decrement the loop counter */ - blkCnt--; - - } - - /* Store the maximum value and its index into destination pointers */ - *pResult = out; - *pIndex = outIndex; - -} - -/** - * @} end of Max group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c deleted file mode 100644 index ea4ffb0cc5..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c +++ /dev/null @@ -1,131 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mean_f32.c -* -* Description: Mean value of a floating-point vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @defgroup mean Mean - * - * Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector. - * The underlying algorithm is used: - * - *
    
- * 	Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;    
- * 
- * - * There are separate functions for floating-point, Q31, Q15, and Q7 data types. - */ - -/** - * @addtogroup mean - * @{ - */ - - -/** - * @brief Mean value of a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult mean value returned here - * @return none. - */ - - -void arm_mean_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t sum = 0.0f; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - sum += in1; - sum += in2; - sum += in3; - sum += in4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store the result to the destination */ - *pResult = sum / (float32_t) blockSize; -} - -/** - * @} end of mean group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c deleted file mode 100644 index 2e8fdfa091..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c +++ /dev/null @@ -1,125 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mean_q15.c -* -* Description: Mean value of a Q15 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup mean - * @{ - */ - -/** - * @brief Mean value of a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult mean value returned here - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * \par - * The function is implemented using a 32-bit internal accumulator. - * The input is represented in 1.15 format and is accumulated in a 32-bit - * accumulator in 17.15 format. - * There is no risk of internal overflow with this approach, and the - * full precision of intermediate result is preserved. - * Finally, the accumulator is saturated and truncated to yield a result of 1.15 format. - * - */ - - -void arm_mean_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - q31_t sum = 0; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - in = *__SIMD32(pSrc)++; - sum += ((in << 16) >> 16); - sum += (in >> 16); - in = *__SIMD32(pSrc)++; - sum += ((in << 16) >> 16); - sum += (in >> 16); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store the result to the destination */ - *pResult = (q15_t) (sum / blockSize); -} - -/** - * @} end of mean group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c deleted file mode 100644 index 4dd3ce6b36..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c +++ /dev/null @@ -1,128 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mean_q31.c -* -* Description: Mean value of a Q31 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup mean - * @{ - */ - -/** - * @brief Mean value of a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult mean value returned here - * @return none. - * - * @details - * Scaling and Overflow Behavior: - *\par - * The function is implemented using a 64-bit internal accumulator. - * The input is represented in 1.31 format and is accumulated in a 64-bit - * accumulator in 33.31 format. - * There is no risk of internal overflow with this approach, and the - * full precision of intermediate result is preserved. - * Finally, the accumulator is truncated to yield a result of 1.31 format. - * - */ - - -void arm_mean_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q63_t sum = 0; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - sum += in1; - sum += in2; - sum += in3; - sum += in4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store the result to the destination */ - *pResult = (q31_t) (sum / (int32_t) blockSize); -} - -/** - * @} end of mean group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c deleted file mode 100644 index 22c60ccdd9..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c +++ /dev/null @@ -1,125 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mean_q7.c -* -* Description: Mean value of a Q7 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup mean - * @{ - */ - -/** - * @brief Mean value of a Q7 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult mean value returned here - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * \par - * The function is implemented using a 32-bit internal accumulator. - * The input is represented in 1.7 format and is accumulated in a 32-bit - * accumulator in 25.7 format. - * There is no risk of internal overflow with this approach, and the - * full precision of intermediate result is preserved. - * Finally, the accumulator is truncated to yield a result of 1.7 format. - * - */ - - -void arm_mean_q7( - q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - q31_t sum = 0; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - in = *__SIMD32(pSrc)++; - - sum += ((in << 24) >> 24); - sum += ((in << 16) >> 24); - sum += ((in << 8) >> 24); - sum += (in >> 24); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store the result to the destination */ - *pResult = (q7_t) (sum / (int32_t) blockSize); -} - -/** - * @} end of mean group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c deleted file mode 100644 index 723b693ca6..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c +++ /dev/null @@ -1,175 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_min_f32.c -* -* Description: Minimum value of a floating-point vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @defgroup Min Minimum - * - * Computes the minimum value of an array of data. - * The function returns both the minimum value and its position within the array. - * There are separate functions for floating-point, Q31, Q15, and Q7 data types. - */ - -/** - * @addtogroup Min - * @{ - */ - - -/** - * @brief Minimum value of a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult minimum value returned here - * @param[out] *pIndex index of minimum value returned here - * @return none. - * - */ - -void arm_min_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - float32_t minVal1, minVal2, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex, count; /* loop counter */ - - /* Initialise the count value. */ - count = 0u; - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - /* Loop unrolling */ - blkCnt = (blockSize - 1u) >> 2u; - - while(blkCnt > 0) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal1 = *pSrc++; - minVal2 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and its index */ - out = minVal1; - outIndex = count + 1u; - } - - minVal1 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal2) - { - /* Update the minimum value and its index */ - out = minVal2; - outIndex = count + 2u; - } - - minVal2 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and its index */ - out = minVal1; - outIndex = count + 3u; - } - - /* compare for the minimum value */ - if(out > minVal2) - { - /* Update the minimum value and its index */ - out = minVal2; - outIndex = count + 4u; - } - - count += 4u; - - blkCnt--; - } - - /* if (blockSize - 1u ) is not multiple of 4 */ - blkCnt = (blockSize - 1u) % 4u; - -#else - - /* Run the below code for Cortex-M0 */ - float32_t minVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* loop counter */ - - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - blkCnt = (blockSize - 1u); - -#endif // #ifndef ARM_MATH_CM0 - - while(blkCnt > 0) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal1 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and it's index */ - out = minVal1; - outIndex = blockSize - blkCnt; - } - - blkCnt--; - - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} - -/** - * @} end of Min group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c deleted file mode 100644 index 831505bb24..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c +++ /dev/null @@ -1,169 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_min_q15.c -* -* Description: Minimum value of a Q15 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - - -/** - * @addtogroup Min - * @{ - */ - - -/** - * @brief Minimum value of a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult minimum value returned here - * @param[out] *pIndex index of minimum value returned here - * @return none. - * - */ - -void arm_min_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q15_t minVal1, minVal2, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex, count; /* loop counter */ - - /* Initialise the count value. */ - count = 0u; - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - /* Loop unrolling */ - blkCnt = (blockSize - 1u) >> 2u; - - while(blkCnt > 0) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal1 = *pSrc++; - minVal2 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and its index */ - out = minVal1; - outIndex = count + 1u; - } - - minVal1 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal2) - { - /* Update the minimum value and its index */ - out = minVal2; - outIndex = count + 2u; - } - - minVal2 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and its index */ - out = minVal1; - outIndex = count + 3u; - } - - /* compare for the minimum value */ - if(out > minVal2) - { - /* Update the minimum value and its index */ - out = minVal2; - outIndex = count + 4u; - } - - count += 4u; - - blkCnt--; - } - - /* if (blockSize - 1u ) is not multiple of 4 */ - blkCnt = (blockSize - 1u) % 4u; - -#else - - /* Run the below code for Cortex-M0 */ - q15_t minVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* loop counter */ - - blkCnt = (blockSize - 1u); - - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#endif // #ifndef ARM_MATH_CM0 - - while(blkCnt > 0) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal1 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and it's index */ - out = minVal1; - outIndex = blockSize - blkCnt; - } - - blkCnt--; - - } - - - - /* Store the minimum value and its index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} - -/** - * @} end of Min group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c deleted file mode 100644 index 76896902ee..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c +++ /dev/null @@ -1,168 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_min_q31.c -* -* Description: Minimum value of a Q31 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - - -/** - * @addtogroup Min - * @{ - */ - - -/** - * @brief Minimum value of a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult minimum value returned here - * @param[out] *pIndex index of minimum value returned here - * @return none. - * - */ - -void arm_min_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t minVal1, minVal2, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex, count; /* loop counter */ - - /* Initialise the count value. */ - count = 0u; - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - - /* Loop unrolling */ - blkCnt = (blockSize - 1u) >> 2u; - - while(blkCnt > 0) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal1 = *pSrc++; - minVal2 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and its index */ - out = minVal1; - outIndex = count + 1u; - } - - minVal1 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal2) - { - /* Update the minimum value and its index */ - out = minVal2; - outIndex = count + 2u; - } - - minVal2 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and its index */ - out = minVal1; - outIndex = count + 3u; - } - - /* compare for the minimum value */ - if(out > minVal2) - { - /* Update the minimum value and its index */ - out = minVal2; - outIndex = count + 4u; - } - - count += 4u; - - blkCnt--; - } - - /* if (blockSize - 1u ) is not multiple of 4 */ - blkCnt = (blockSize - 1u) % 4u; - -#else - - /* Run the below code for Cortex-M0 */ - q31_t minVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* loop counter */ - - blkCnt = (blockSize - 1u); - - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#endif // #ifndef ARM_MATH_CM0 - - while(blkCnt > 0) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal1 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and it's index */ - out = minVal1; - outIndex = blockSize - blkCnt; - } - - blkCnt--; - - } - - /* Store the minimum value and its index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} - -/** - * @} end of Min group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c deleted file mode 100644 index 88e4dcef5e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c +++ /dev/null @@ -1,170 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_min_q7.c -* -* Description: Minimum value of a Q7 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup Min - * @{ - */ - - -/** - * @brief Minimum value of a Q7 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult minimum value returned here - * @param[out] *pIndex index of minimum value returned here - * @return none. - * - */ - -void arm_min_q7( - q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q7_t minVal1, minVal2, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex, count; /* loop counter */ - - /* Initialise the count value. */ - count = 0u; - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - /* Loop unrolling */ - blkCnt = (blockSize - 1u) >> 2u; - - while(blkCnt > 0) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal1 = *pSrc++; - minVal2 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and its index */ - out = minVal1; - outIndex = count + 1u; - } - - minVal1 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal2) - { - /* Update the minimum value and its index */ - out = minVal2; - outIndex = count + 2u; - } - - minVal2 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and its index */ - out = minVal1; - outIndex = count + 3u; - } - - /* compare for the minimum value */ - if(out > minVal2) - { - /* Update the minimum value and its index */ - out = minVal2; - outIndex = count + 4u; - } - - count += 4u; - - blkCnt--; - } - - /* if (blockSize - 1u ) is not multiple of 4 */ - blkCnt = (blockSize - 1u) % 4u; - -#else - - /* Run the below code for Cortex-M0 */ - - q7_t minVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* loop counter */ - - /* Initialise the index value to zero. */ - outIndex = 0u; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - blkCnt = (blockSize - 1u); - -#endif // #ifndef ARM_MATH_CM0 - - while(blkCnt > 0) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal1 = *pSrc++; - - /* compare for the minimum value */ - if(out > minVal1) - { - /* Update the minimum value and it's index */ - out = minVal1; - outIndex = blockSize - blkCnt; - } - - blkCnt--; - - } - - /* Store the minimum value and its index into destination pointers */ - *pResult = out; - *pIndex = outIndex; - - -} - -/** - * @} end of Min group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c deleted file mode 100644 index 4e3505b997..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c +++ /dev/null @@ -1,138 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_power_f32.c -* -* Description: Sum of the squares of the elements of a floating-point vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @defgroup power Power - * - * Calculates the sum of the squares of the elements in the input vector. - * The underlying algorithm is used: - * - *
    
- * 	Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];    
- * 
- * - * There are separate functions for floating point, Q31, Q15, and Q7 data types. - */ - -/** - * @addtogroup power - * @{ - */ - - -/** - * @brief Sum of the squares of the elements of a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult sum of the squares value returned here - * @return none. - * - */ - - -void arm_power_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t sum = 0.0f; /* accumulator */ - float32_t in; /* Temporary variable to store input value */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute Power and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += in * in; - in = *pSrc++; - sum += in * in; - in = *pSrc++; - sum += in * in; - in = *pSrc++; - sum += in * in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* compute power and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += in * in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the result to the destination */ - *pResult = sum; -} - -/** - * @} end of power group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c deleted file mode 100644 index a8d0db898d..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c +++ /dev/null @@ -1,144 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_power_q15.c -* -* Description: Sum of the squares of the elements of a Q15 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup power - * @{ - */ - -/** - * @brief Sum of the squares of the elements of a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult sum of the squares value returned here - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 64-bit internal accumulator. - * The input is represented in 1.15 format. - * Intermediate multiplication yields a 2.30 format, and this - * result is added without saturation to a 64-bit accumulator in 34.30 format. - * With 33 guard bits in the accumulator, there is no risk of overflow, and the - * full precision of the intermediate multiplication is preserved. - * Finally, the return result is in 34.30 format. - * - */ - -void arm_power_q15( - q15_t * pSrc, - uint32_t blockSize, - q63_t * pResult) -{ - q63_t sum = 0; /* Temporary result storage */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in32; /* Temporary variable to store input value */ - q15_t in16; /* Temporary variable to store input value */ - uint32_t blkCnt; /* loop counter */ - - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute Power and then store the result in a temporary variable, sum. */ - in32 = *__SIMD32(pSrc)++; - sum = __SMLALD(in32, in32, sum); - in32 = *__SIMD32(pSrc)++; - sum = __SMLALD(in32, in32, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute Power and then store the result in a temporary variable, sum. */ - in16 = *pSrc++; - sum = __SMLALD(in16, in16, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - q15_t in; /* Temporary variable to store input value */ - uint32_t blkCnt; /* loop counter */ - - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute Power and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += ((q31_t) in * in); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - /* Store the results in 34.30 format */ - *pResult = sum; -} - -/** - * @} end of power group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c deleted file mode 100644 index 49cdb67fa3..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_power_q31.c -* -* Description: Sum of the squares of the elements of a Q31 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup power - * @{ - */ - -/** - * @brief Sum of the squares of the elements of a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult sum of the squares value returned here - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 64-bit internal accumulator. - * The input is represented in 1.31 format. - * Intermediate multiplication yields a 2.62 format, and this - * result is truncated to 2.48 format by discarding the lower 14 bits. - * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. - * With 15 guard bits in the accumulator, there is no risk of overflow, and the - * full precision of the intermediate multiplication is preserved. - * Finally, the return result is in 16.48 format. - * - */ - -void arm_power_q31( - q31_t * pSrc, - uint32_t blockSize, - q63_t * pResult) -{ - q63_t sum = 0; /* Temporary result storage */ - q31_t in; - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */ - in = *pSrc++; - sum += ((q63_t) in * in) >> 14u; - - in = *pSrc++; - sum += ((q63_t) in * in) >> 14u; - - in = *pSrc++; - sum += ((q63_t) in * in) >> 14u; - - in = *pSrc++; - sum += ((q63_t) in * in) >> 14u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute Power and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += ((q63_t) in * in) >> 14u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the results in 16.48 format */ - *pResult = sum; -} - -/** - * @} end of power group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c deleted file mode 100644 index 39fd2e98d0..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c +++ /dev/null @@ -1,133 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_power_q7.c -* -* Description: Sum of the squares of the elements of a Q7 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup power - * @{ - */ - -/** - * @brief Sum of the squares of the elements of a Q7 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult sum of the squares value returned here - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 32-bit internal accumulator. - * The input is represented in 1.7 format. - * Intermediate multiplication yields a 2.14 format, and this - * result is added without saturation to an accumulator in 18.14 format. - * With 17 guard bits in the accumulator, there is no risk of overflow, and the - * full precision of the intermediate multiplication is preserved. - * Finally, the return result is in 18.14 format. - * - */ - -void arm_power_q7( - q7_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q31_t sum = 0; /* Temporary result storage */ - q7_t in; /* Temporary variable to store input */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t input1; /* Temporary variable to store packed input */ - q31_t in1, in2; /* Temporary variables to store input */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Reading two inputs of pSrc vector and packing */ - input1 = *__SIMD32(pSrc)++; - - in1 = __SXTB16(__ROR(input1, 8)); - in2 = __SXTB16(input1); - - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* calculate power and accumulate to accumulator */ - sum = __SMLAD(in1, in1, sum); - sum = __SMLAD(in2, in2, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute Power and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += ((q15_t) in * in); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the result in 18.14 format */ - *pResult = sum; -} - -/** - * @} end of power group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c deleted file mode 100644 index eacc166ffb..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c +++ /dev/null @@ -1,133 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_rms_f32.c -* -* Description: Root mean square value of an array of F32 type -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @defgroup RMS Root mean square (RMS) - * - * - * Calculates the Root Mean Sqaure of the elements in the input vector. - * The underlying algorithm is used: - * - *
    
- * 	Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));    
- * 
- * - * There are separate functions for floating point, Q31, and Q15 data types. - */ - -/** - * @addtogroup RMS - * @{ - */ - - -/** - * @brief Root Mean Square of the elements of a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult rms value returned here - * @return none. - * - */ - -void arm_rms_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t sum = 0.0f; /* Accumulator */ - float32_t in; /* Tempoprary variable to store input value */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute sum of the squares and then store the result in a temporary variable, sum */ - in = *pSrc++; - sum += in * in; - in = *pSrc++; - sum += in * in; - in = *pSrc++; - sum += in * in; - in = *pSrc++; - sum += in * in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute sum of the squares and then store the results in a temporary variable, sum */ - in = *pSrc++; - sum += in * in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Compute Rms and store the result in the destination */ - arm_sqrt_f32(sum / (float32_t) blockSize, pResult); -} - -/** - * @} end of RMS group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c deleted file mode 100644 index 4621a2c21a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c +++ /dev/null @@ -1,153 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_rms_q15.c -* -* Description: Root Mean Square of the elements of a Q15 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @addtogroup RMS - * @{ - */ - -/** - * @brief Root Mean Square of the elements of a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult rms value returned here - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 64-bit internal accumulator. - * The input is represented in 1.15 format. - * Intermediate multiplication yields a 2.30 format, and this - * result is added without saturation to a 64-bit accumulator in 34.30 format. - * With 33 guard bits in the accumulator, there is no risk of overflow, and the - * full precision of the intermediate multiplication is preserved. - * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower - * 15 bits, and then saturated to yield a result in 1.15 format. - * - */ - -void arm_rms_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - q63_t sum = 0; /* accumulator */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in; /* temporary variable to store the input value */ - q15_t in1; /* temporary variable to store the input value */ - uint32_t blkCnt; /* loop counter */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute sum of the squares and then store the results in a temporary variable, sum */ - in = *__SIMD32(pSrc)++; - sum = __SMLALD(in, in, sum); - in = *__SIMD32(pSrc)++; - sum = __SMLALD(in, in, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute sum of the squares and then store the results in a temporary variable, sum */ - in1 = *pSrc++; - sum = __SMLALD(in1, in1, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Truncating and saturating the accumulator to 1.15 format */ - sum = __SSAT((q31_t) (sum >> 15), 16); - - in1 = (q15_t) (sum / blockSize); - - /* Store the result in the destination */ - arm_sqrt_q15(in1, pResult); - -#else - - /* Run the below code for Cortex-M0 */ - - q15_t in; /* temporary variable to store the input value */ - uint32_t blkCnt; /* loop counter */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute sum of the squares and then store the results in a temporary variable, sum */ - in = *pSrc++; - sum += ((q31_t) in * in); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Truncating and saturating the accumulator to 1.15 format */ - sum = __SSAT((q31_t) (sum >> 15), 16); - - in = (q15_t) (sum / blockSize); - - /* Store the result in the destination */ - arm_sqrt_q15(in, pResult); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of RMS group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c deleted file mode 100644 index 56eff443ad..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c +++ /dev/null @@ -1,146 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_rms_q31.c -* -* Description: Root Mean Square of the elements of a Q31 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @addtogroup RMS - * @{ - */ - - -/** - * @brief Root Mean Square of the elements of a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult rms value returned here - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - *\par - * The function is implemented using an internal 64-bit accumulator. - * The input is represented in 1.31 format, and intermediate multiplication - * yields a 2.62 format. - * The accumulator maintains full precision of the intermediate multiplication results, - * but provides only a single guard bit. - * There is no saturation on intermediate additions. - * If the accumulator overflows, it wraps around and distorts the result. - * In order to avoid overflows completely, the input signal must be scaled down by - * log2(blockSize) bits, as a total of blockSize additions are performed internally. - * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value. - * - */ - -void arm_rms_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q63_t sum = 0; /* accumulator */ - q31_t in; /* Temporary variable to store the input */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in1, in2, in3, in4; /* Temporary input variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 8 outputs at a time. - ** a second loop below computes the remaining 1 to 7 samples. */ - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute sum of the squares and then store the result in a temporary variable, sum */ - /* read two samples from source buffer */ - in1 = pSrc[0]; - in2 = pSrc[1]; - - /* calculate power and accumulate to accumulator */ - sum += (q63_t) in1 *in1; - sum += (q63_t) in2 *in2; - - /* read two samples from source buffer */ - in3 = pSrc[2]; - in4 = pSrc[3]; - - /* calculate power and accumulate to accumulator */ - sum += (q63_t) in3 *in3; - sum += (q63_t) in4 *in4; - - - /* update source buffer to process next samples */ - pSrc += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 8, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute sum of the squares and then store the results in a temporary variable, sum */ - in = *pSrc++; - sum += (q63_t) in *in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */ - - sum = __SSAT(sum >> 31, 31); - - - /* Compute Rms and store the result in the destination vector */ - arm_sqrt_q31((q31_t) ((q31_t) sum / (int32_t) blockSize), pResult); -} - -/** - * @} end of RMS group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c deleted file mode 100644 index 2fcc4e5a73..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c +++ /dev/null @@ -1,188 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_std_f32.c -* -* Description: Standard deviation of the elements of a floating-point vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @defgroup STD Standard deviation - * - * Calculates the standard deviation of the elements in the input vector. - * The underlying algorithm is used: - * - *
    
- * 	Result = sqrt((sumOfSquares - sum2 / blockSize) / (blockSize - 1))   
- *   
- *	   where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
- *   
- *	                   sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
- * 
- * - * There are separate functions for floating point, Q31, and Q15 data types. - */ - -/** - * @addtogroup STD - * @{ - */ - - -/** - * @brief Standard deviation of the elements of a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult standard deviation value returned here - * @return none. - * - */ - - -void arm_std_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t sum = 0.0f; /* Temporary result storage */ - float32_t sumOfSquares = 0.0f; /* Sum of squares */ - float32_t in; /* input value */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - float32_t meanOfSquares, mean, squareOfMean; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += in; - sumOfSquares += in * in; - in = *pSrc++; - sum += in; - sumOfSquares += in * in; - in = *pSrc++; - sum += in; - sumOfSquares += in * in; - in = *pSrc++; - sum += in; - sumOfSquares += in * in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += in; - sumOfSquares += in * in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Compute Mean of squares of the input samples - * and then store the result in a temporary variable, meanOfSquares. */ - meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f); - - /* Compute mean of all input values */ - mean = sum / (float32_t) blockSize; - - /* Compute square of mean */ - squareOfMean = (mean * mean) * (((float32_t) blockSize) / - ((float32_t) blockSize - 1.0f)); - - /* Compute standard deviation and then store the result to the destination */ - arm_sqrt_f32((meanOfSquares - squareOfMean), pResult); - -#else - - /* Run the below code for Cortex-M0 */ - - float32_t squareOfSum; /* Square of Sum */ - float32_t var; /* Temporary varaince storage */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sumOfSquares. */ - in = *pSrc++; - sumOfSquares += in * in; - - /* C = (A[0] + A[1] + ... + A[blockSize-1]) */ - /* Compute Sum of the input samples - * and then store the result in a temporary variable, sum. */ - sum += in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Compute the square of sum */ - squareOfSum = ((sum * sum) / (float32_t) blockSize); - - /* Compute the variance */ - var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f)); - - /* Compute standard deviation and then store the result to the destination */ - arm_sqrt_f32(var, pResult); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of STD group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c deleted file mode 100644 index ac51167a12..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c +++ /dev/null @@ -1,197 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_std_q15.c -* -* Description: Standard deviation of an array of Q15 type. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup STD - * @{ - */ - -/** - * @brief Standard deviation of the elements of a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult standard deviation value returned here - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 64-bit internal accumulator. - * The input is represented in 1.15 format. - * Intermediate multiplication yields a 2.30 format, and this - * result is added without saturation to a 64-bit accumulator in 34.30 format. - * With 33 guard bits in the accumulator, there is no risk of overflow, and the - * full precision of the intermediate multiplication is preserved. - * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower - * 15 bits, and then saturated to yield a result in 1.15 format. - */ - -void arm_std_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - q31_t sum = 0; /* Accumulator */ - q31_t meanOfSquares, squareOfMean; /* square of mean and mean of square */ - q15_t mean; /* mean */ - uint32_t blkCnt; /* loop counter */ - q15_t t; /* Temporary variable */ - q63_t sumOfSquares = 0; /* Accumulator */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in; /* input value */ - q15_t in1; /* input value */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - in = *__SIMD32(pSrc)++; - sum += ((in << 16) >> 16); - sum += (in >> 16); - sumOfSquares = __SMLALD(in, in, sumOfSquares); - in = *__SIMD32(pSrc)++; - sum += ((in << 16) >> 16); - sum += (in >> 16); - sumOfSquares = __SMLALD(in, in, sumOfSquares); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - in1 = *pSrc++; - sumOfSquares = __SMLALD(in1, in1, sumOfSquares); - sum += in1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Compute Mean of squares of the input samples - * and then store the result in a temporary variable, meanOfSquares. */ - t = (q15_t) ((1.0 / (blockSize - 1)) * 16384LL); - sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u); - - meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u); - - /* Compute mean of all input values */ - t = (q15_t) ((1.0 / (blockSize * (blockSize - 1))) * 32768LL); - mean = (q15_t) __SSAT(sum, 16u); - - /* Compute square of mean */ - squareOfMean = ((q31_t) mean * mean) >> 15; - squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15); - - /* mean of the squares minus the square of the mean. */ - in1 = (q15_t) (meanOfSquares - squareOfMean); - - /* Compute standard deviation and store the result to the destination */ - arm_sqrt_q15(in1, pResult); - -#else - - /* Run the below code for Cortex-M0 */ - q15_t in; /* input value */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sumOfSquares. */ - in = *pSrc++; - sumOfSquares += (in * in); - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - /* Compute sum of all input values and then store the result in a temporary variable, sum. */ - sum += in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Compute Mean of squares of the input samples - * and then store the result in a temporary variable, meanOfSquares. */ - t = (q15_t) ((1.0 / (blockSize - 1)) * 16384LL); - sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u); - meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u); - - /* Compute mean of all input values */ - mean = (q15_t) __SSAT(sum, 16u); - - /* Compute square of mean of the input samples - * and then store the result in a temporary variable, squareOfMean.*/ - t = (q15_t) ((1.0 / (blockSize * (blockSize - 1))) * 32768LL); - squareOfMean = ((q31_t) mean * mean) >> 15; - squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15); - - /* mean of the squares minus the square of the mean. */ - in = (q15_t) (meanOfSquares - squareOfMean); - - /* Compute standard deviation and store the result to the destination */ - arm_sqrt_q15(in, pResult); - -#endif /* #ifndef ARM_MATH_CM0 */ - - -} - -/** - * @} end of STD group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c deleted file mode 100644 index de60bc06ea..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c +++ /dev/null @@ -1,184 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_std_q31.c -* -* Description: Standard deviation of an array of Q31 type. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup STD - * @{ - */ - - -/** - * @brief Standard deviation of the elements of a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult standard deviation value returned here - * @return none. - * @details - * Scaling and Overflow Behavior: - * - *\par - * The function is implemented using an internal 64-bit accumulator. - * The input is represented in 1.31 format, and intermediate multiplication - * yields a 2.62 format. - * The accumulator maintains full precision of the intermediate multiplication results, - * but provides only a single guard bit. - * There is no saturation on intermediate additions. - * If the accumulator overflows it wraps around and distorts the result. - * In order to avoid overflows completely the input signal must be scaled down by - * log2(blockSize) bits, as a total of blockSize additions are performed internally. - * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value. - * - */ - - -void arm_std_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q63_t sum = 0; /* Accumulator */ - q31_t meanOfSquares, squareOfMean; /* square of mean and mean of square */ - q31_t mean; /* mean */ - q31_t in; /* input value */ - q31_t t; /* Temporary variable */ - uint32_t blkCnt; /* loop counter */ - q63_t sumOfSquares = 0; /* Accumulator */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += in; - sumOfSquares += ((q63_t) (in) * (in)); - in = *pSrc++; - sum += in; - sumOfSquares += ((q63_t) (in) * (in)); - in = *pSrc++; - sum += in; - sumOfSquares += ((q63_t) (in) * (in)); - in = *pSrc++; - sum += in; - sumOfSquares += ((q63_t) (in) * (in)); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += in; - sumOfSquares += ((q63_t) (in) * (in)); - - /* Decrement the loop counter */ - blkCnt--; - } - - t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f); - - /* Compute Mean of squares of the input samples - * and then store the result in a temporary variable, meanOfSquares. */ - sumOfSquares = (sumOfSquares >> 31); - meanOfSquares = (q31_t) ((sumOfSquares * t) >> 30); - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sumOfSquares. */ - in = *pSrc++; - sumOfSquares += ((q63_t) (in) * (in)); - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - /* Compute sum of all input values and then store the result in a temporary variable, sum. */ - sum += in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Compute Mean of squares of the input samples - * and then store the result in a temporary variable, meanOfSquares. */ - t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f); - sumOfSquares = (sumOfSquares >> 31); - meanOfSquares = (q31_t) ((sumOfSquares * t) >> 30); - -#endif /* #ifndef ARM_MATH_CM0 */ - - /* Compute mean of all input values */ - t = (q31_t) ((1.0f / (blockSize * (blockSize - 1u))) * 2147483648.0f); - mean = (q31_t) (sum); - - /* Compute square of mean */ - squareOfMean = (q31_t) (((q63_t) mean * mean) >> 31); - squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 31); - - - /* Compute standard deviation and then store the result to the destination */ - arm_sqrt_q31(meanOfSquares - squareOfMean, pResult); - -} - -/** - * @} end of STD group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c deleted file mode 100644 index 4dfd846c2b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c +++ /dev/null @@ -1,184 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_var_f32.c -* -* Description: Variance of the elements of a floating-point vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @defgroup variance Variance - * - * Calculates the variance of the elements in the input vector. - * The underlying algorithm is used: - * - *
    
- * 	Result = (sumOfSquares - sum2 / blockSize) / (blockSize - 1)   
- *   
- *	   where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
- *   
- *	                   sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
- * 
- * - * There are separate functions for floating point, Q31, and Q15 data types. - */ - -/** - * @addtogroup variance - * @{ - */ - - -/** - * @brief Variance of the elements of a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult variance value returned here - * @return none. - * - */ - - -void arm_var_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - - float32_t sum = 0.0f; /* Temporary result storage */ - float32_t sumOfSquares = 0.0f; /* Sum of squares */ - float32_t in; /* input value */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - float32_t meanOfSquares, mean, squareOfMean; /* Temporary variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += in; - sumOfSquares += in * in; - in = *pSrc++; - sum += in; - sumOfSquares += in * in; - in = *pSrc++; - sum += in; - sumOfSquares += in * in; - in = *pSrc++; - sum += in; - sumOfSquares += in * in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += in; - sumOfSquares += in * in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Compute Mean of squares of the input samples - * and then store the result in a temporary variable, meanOfSquares. */ - meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f); - - /* Compute mean of all input values */ - mean = sum / (float32_t) blockSize; - - /* Compute square of mean */ - squareOfMean = (mean * mean) * (((float32_t) blockSize) / - ((float32_t) blockSize - 1.0f)); - - /* Compute variance and then store the result to the destination */ - *pResult = meanOfSquares - squareOfMean; - -#else - - /* Run the below code for Cortex-M0 */ - float32_t squareOfSum; /* Square of Sum */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sumOfSquares. */ - in = *pSrc++; - sumOfSquares += in * in; - - /* C = (A[0] + A[1] + ... + A[blockSize-1]) */ - /* Compute Sum of the input samples - * and then store the result in a temporary variable, sum. */ - sum += in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Compute the square of sum */ - squareOfSum = ((sum * sum) / (float32_t) blockSize); - - /* Compute the variance */ - *pResult = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f)); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of variance group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c deleted file mode 100644 index d37e66a57c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c +++ /dev/null @@ -1,180 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_var_q15.c -* -* Description: Variance of an array of Q15 type. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup variance - * @{ - */ - -/** - * @brief Variance of the elements of a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult variance value returned here - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 64-bit internal accumulator. - * The input is represented in 1.15 format. - * Intermediate multiplication yields a 2.30 format, and this - * result is added without saturation to a 64-bit accumulator in 34.30 format. - * With 33 guard bits in the accumulator, there is no risk of overflow, and the - * full precision of the intermediate multiplication is preserved. - * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower - * 15 bits, and then saturated to yield a result in 1.15 format. - * - */ - - -void arm_var_q15( - q15_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q31_t sum = 0; /* Accumulator */ - q31_t meanOfSquares, squareOfMean; /* Mean of square and square of mean */ - q15_t mean; /* mean */ - uint32_t blkCnt; /* loop counter */ - q15_t t; /* Temporary variable */ - q63_t sumOfSquares = 0; /* Accumulator */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in; /* Input variable */ - q15_t in1; /* Temporary variable */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - in = *__SIMD32(pSrc)++; - sum += ((in << 16) >> 16); - sum += (in >> 16); - sumOfSquares = __SMLALD(in, in, sumOfSquares); - in = *__SIMD32(pSrc)++; - sum += ((in << 16) >> 16); - sum += (in >> 16); - sumOfSquares = __SMLALD(in, in, sumOfSquares); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - in1 = *pSrc++; - sum += in1; - sumOfSquares = __SMLALD(in1, in1, sumOfSquares); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Compute Mean of squares of the input samples - * and then store the result in a temporary variable, meanOfSquares. */ - t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384); - sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u); - - meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u); - -#else - - /* Run the below code for Cortex-M0 */ - - q15_t in; /* Temporary variable */ - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sumOfSquares. */ - in = *pSrc++; - sumOfSquares += (in * in); - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - /* Compute sum of all input values and then store the result in a temporary variable, sum. */ - sum += in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Compute Mean of squares of the input samples - * and then store the result in a temporary variable, meanOfSquares. */ - t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384); - sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u); - meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u); - -#endif /* #ifndef ARM_MATH_CM0 */ - - /* Compute mean of all input values */ - t = (q15_t) ((1.0f / (float32_t) (blockSize * (blockSize - 1u))) * 32768); - mean = __SSAT(sum, 16u); - - /* Compute square of mean */ - squareOfMean = ((q31_t) mean * mean) >> 15; - squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15); - - /* Compute variance and then store the result to the destination */ - *pResult = (meanOfSquares - squareOfMean); - -} - -/** - * @} end of variance group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c deleted file mode 100644 index 7acef7ef12..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c +++ /dev/null @@ -1,170 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_var_q31.c -* -* Description: Variance of an array of Q31 type. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupStats - */ - -/** - * @addtogroup variance - * @{ - */ - -/** - * @brief Variance of the elements of a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[in] blockSize length of the input vector - * @param[out] *pResult variance value returned here - * @return none. - * - * @details - * Scaling and Overflow Behavior: - * - *\par - * The function is implemented using an internal 64-bit accumulator. - * The input is represented in 1.31 format, and intermediate multiplication - * yields a 2.62 format. - * The accumulator maintains full precision of the intermediate multiplication results, - * but provides only a single guard bit. - * There is no saturation on intermediate additions. - * If the accumulator overflows it wraps around and distorts the result. - * In order to avoid overflows completely the input signal must be scaled down by - * log2(blockSize) bits, as a total of blockSize additions are performed internally. - * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value. - * - */ - - -void arm_var_q31( - q31_t * pSrc, - uint32_t blockSize, - q63_t * pResult) -{ - q63_t sum = 0, sumSquare = 0; /* Accumulator */ - q31_t meanOfSquares, squareOfMean; /* square of mean and mean of square */ - q31_t mean; /* mean */ - q31_t in; /* input value */ - q31_t t; /* Temporary variable */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q63_t sumSquare1 = 0; /* Accumulator */ - q31_t in1, in2, in3, in4; /* Temporary input variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - /* read input samples from source buffer */ - in1 = pSrc[0]; - in2 = pSrc[1]; - - /* calculate sum of inputs */ - sum += in1; - /* calculate sum of squares */ - sumSquare += ((q63_t) (in1) * (in1)); - in3 = pSrc[2]; - sum += in2; - sumSquare1 += ((q63_t) (in2) * (in2)); - in4 = pSrc[3]; - sum += in3; - sumSquare += ((q63_t) (in3) * (in3)); - sum += in4; - sumSquare1 += ((q63_t) (in4) * (in4)); - - /* update input pointer to process next samples */ - pSrc += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* add two accumulators */ - sumSquare = sumSquare + sumSquare1; - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sumSquare += ((q63_t) (in) * (in)); - sum += in; - - /* Decrement the loop counter */ - blkCnt--; - } - - t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f); - - /* Compute Mean of squares of the input samples - * and then store the result in a temporary variable, meanOfSquares. */ - sumSquare = (sumSquare >> 31); - meanOfSquares = (q31_t) ((sumSquare * t) >> 30); - - /* Compute mean of all input values */ - t = (q31_t) ((1.0f / (blockSize * (blockSize - 1u))) * 2147483648.0f); - mean = (q31_t) (sum); - - /* Compute square of mean */ - squareOfMean = (q31_t) (((q63_t) mean * mean) >> 31); - squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 31); - - /* Compute variance and then store the result to the destination */ - *pResult = (q63_t) meanOfSquares - squareOfMean; - -} - -/** - * @} end of variance group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c deleted file mode 100644 index 5621b87520..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_copy_f32.c -* -* Description: Copies the elements of a floating-point vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @defgroup copy Vector Copy - * - * Copies sample by sample from source vector to destination vector. - * - *
    
- * 	pDst[n] = pSrc[n];   0 <= n < blockSize.    
- * 
- * - * There are separate functions for floating point, Q31, Q15, and Q7 data types. - */ - -/** - * @addtogroup copy - * @{ - */ - -/** - * @brief Copies the elements of a floating-point vector. - * @param[in] *pSrc points to input vector - * @param[out] *pDst points to output vector - * @param[in] blockSize length of the input vector - * @return none. - * - */ - - -void arm_copy_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A */ - /* Copy and then store the results in the destination buffer */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - *pDst++ = in1; - *pDst++ = in2; - *pDst++ = in3; - *pDst++ = in4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A */ - /* Copy and then store the results in the destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicCopy group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c deleted file mode 100644 index e605a72698..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c +++ /dev/null @@ -1,109 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_copy_q15.c -* -* Description: Copies the elements of a Q15 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup copy - * @{ - */ -/** - * @brief Copies the elements of a Q15 vector. - * @param[in] *pSrc points to input vector - * @param[out] *pDst points to output vector - * @param[in] blockSize length of the input vector - * @return none. - * - */ - -void arm_copy_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A */ - /* Read two inputs */ - *__SIMD32(pDst)++ = *__SIMD32(pSrc)++; - *__SIMD32(pDst)++ = *__SIMD32(pSrc)++; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A */ - /* Copy and then store the value in the destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicCopy group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c deleted file mode 100644 index 843083db22..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c +++ /dev/null @@ -1,118 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_copy_q31.c -* -* Description: Copies the elements of a Q31 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup copy - * @{ - */ - -/** - * @brief Copies the elements of a Q31 vector. - * @param[in] *pSrc points to input vector - * @param[out] *pDst points to output vector - * @param[in] blockSize length of the input vector - * @return none. - * - */ - -void arm_copy_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A */ - /* Copy and then store the values in the destination buffer */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - *pDst++ = in1; - *pDst++ = in2; - *pDst++ = in3; - *pDst++ = in4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A */ - /* Copy and then store the value in the destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicCopy group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c deleted file mode 100644 index 06288fc0b0..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c +++ /dev/null @@ -1,110 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_copy_q7.c -* -* Description: Copies the elements of a Q7 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup copy - * @{ - */ - -/** - * @brief Copies the elements of a Q7 vector. - * @param[in] *pSrc points to input vector - * @param[out] *pDst points to output vector - * @param[in] blockSize length of the input vector - * @return none. - * - */ - -void arm_copy_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A */ - /* Copy and then store the results in the destination buffer */ - /* 4 samples are copied and stored at a time using SIMD */ - *__SIMD32(pDst)++ = *__SIMD32(pSrc)++; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A */ - /* Copy and then store the results in the destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicCopy group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c deleted file mode 100644 index 98d6635f58..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fill_f32.c -* -* Description: Fills a constant value into a floating-point vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @defgroup Fill Vector Fill - * - * Fills the destination vector with a constant value. - * - *
    
- * 	pDst[n] = value;   0 <= n < blockSize.    
- * 
- * - * There are separate functions for floating point, Q31, Q15, and Q7 data types. - */ - -/** - * @addtogroup Fill - * @{ - */ - -/** - * @brief Fills a constant value into a floating-point vector. - * @param[in] value input value to be filled - * @param[out] *pDst points to output vector - * @param[in] blockSize length of the output vector - * @return none. - * - */ - - -void arm_fill_f32( - float32_t value, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1 = value; - float32_t in2 = value; - float32_t in3 = value; - float32_t in4 = value; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = value */ - /* Fill the value in the destination buffer */ - *pDst++ = in1; - *pDst++ = in2; - *pDst++ = in3; - *pDst++ = in4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = value */ - /* Fill the value in the destination buffer */ - *pDst++ = value; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of Fill group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c deleted file mode 100644 index 9de552934a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c +++ /dev/null @@ -1,115 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fill_q15.c -* -* Description: Fills a constant value into a Q15 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup Fill - * @{ - */ - -/** - * @brief Fills a constant value into a Q15 vector. - * @param[in] value input value to be filled - * @param[out] *pDst points to output vector - * @param[in] blockSize length of the output vector - * @return none. - * - */ - -void arm_fill_q15( - q15_t value, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t packedValue; /* value packed to 32 bits */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Packing two 16 bit values to 32 bit value in order to use SIMD */ - packedValue = __PKHBT(value, value, 16u); - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = value */ - /* Fill the value in the destination buffer */ - *__SIMD32(pDst)++ = packedValue; - *__SIMD32(pDst)++ = packedValue; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = value */ - /* Fill the value in the destination buffer */ - *pDst++ = value; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of Fill group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c deleted file mode 100644 index 2d4f22e1e7..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c +++ /dev/null @@ -1,116 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fill_q31.c -* -* Description: Fills a constant value into a Q31 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup Fill - * @{ - */ - -/** - * @brief Fills a constant value into a Q31 vector. - * @param[in] value input value to be filled - * @param[out] *pDst points to output vector - * @param[in] blockSize length of the output vector - * @return none. - * - */ - -void arm_fill_q31( - q31_t value, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1 = value; - q31_t in2 = value; - q31_t in3 = value; - q31_t in4 = value; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = value */ - /* Fill the value in the destination buffer */ - *pDst++ = in1; - *pDst++ = in2; - *pDst++ = in3; - *pDst++ = in4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = value */ - /* Fill the value in the destination buffer */ - *pDst++ = value; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of Fill group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c deleted file mode 100644 index 2a26be451b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c +++ /dev/null @@ -1,113 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_fill_q7.c -* -* Description: Fills a constant value into a Q7 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup Fill - * @{ - */ - -/** - * @brief Fills a constant value into a Q7 vector. - * @param[in] value input value to be filled - * @param[out] *pDst points to output vector - * @param[in] blockSize length of the output vector - * @return none. - * - */ - -void arm_fill_q7( - q7_t value, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t packedValue; /* value packed to 32 bits */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Packing four 8 bit values to 32 bit value in order to use SIMD */ - packedValue = __PACKq7(value, value, value, value); - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = value */ - /* Fill the value in the destination buffer */ - *__SIMD32(pDst)++ = packedValue; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = value */ - /* Fill the value in the destination buffer */ - *pDst++ = value; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of Fill group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c deleted file mode 100644 index 8ff2efd197..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c +++ /dev/null @@ -1,196 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_float_to_q15.c -* -* Description: Converts the elements of the floating-point vector to Q15 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup float_to_x - * @{ - */ - -/** - * @brief Converts the elements of the floating-point vector to Q15 vector. - * @param[in] *pSrc points to the floating-point input vector - * @param[out] *pDst points to the Q15 output vector - * @param[in] blockSize length of the input vector - * @return none. - * - * \par Description: - * \par - * The equation used for the conversion process is: - *
    
- * 	pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.    
- * 
- * \par Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - * \note - * In order to apply rounding, the library should be rebuilt with the ROUNDING macro - * defined in the preprocessor section of project options. - * - */ - - -void arm_float_to_q15( - float32_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - float32_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - -#ifdef ARM_MATH_ROUNDING - - float32_t in; - -#endif /* #ifdef ARM_MATH_ROUNDING */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - -#ifdef ARM_MATH_ROUNDING - /* C = A * 32768 */ - /* convert from float to q15 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 32768.0f); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - - in = *pIn++; - in = (in * 32768.0f); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - - in = *pIn++; - in = (in * 32768.0f); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - - in = *pIn++; - in = (in * 32768.0f); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - -#else - - /* C = A * 32768 */ - /* convert from float to q15 and then store the results in the destination buffer */ - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - -#ifdef ARM_MATH_ROUNDING - /* C = A * 32768 */ - /* convert from float to q15 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 32768.0f); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - -#else - - /* C = A * 32768 */ - /* convert from float to q15 and then store the results in the destination buffer */ - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - -#ifdef ARM_MATH_ROUNDING - /* C = A * 32768 */ - /* convert from float to q15 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 32768.0f); - in += in > 0 ? 0.5f : -0.5f; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - -#else - - /* C = A * 32768 */ - /* convert from float to q15 and then store the results in the destination buffer */ - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of float_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c deleted file mode 100644 index 1244c8b753..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c +++ /dev/null @@ -1,203 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_float_to_q31.c -* -* Description: Converts the elements of the floating-point vector to Q31 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @defgroup float_to_x Convert 32-bit floating point value - */ - -/** - * @addtogroup float_to_x - * @{ - */ - -/** - * @brief Converts the elements of the floating-point vector to Q31 vector. - * @param[in] *pSrc points to the floating-point input vector - * @param[out] *pDst points to the Q31 output vector - * @param[in] blockSize length of the input vector - * @return none. - * - *\par Description: - * \par - * The equation used for the conversion process is: - * - *
    
- * 	pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.    
- * 
- * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. - * - * \note In order to apply rounding, the library should be rebuilt with the ROUNDING macro - * defined in the preprocessor section of project options. - */ - - -void arm_float_to_q31( - float32_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - float32_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - -#ifdef ARM_MATH_ROUNDING - - float32_t in; - -#endif /* #ifdef ARM_MATH_ROUNDING */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - -#ifdef ARM_MATH_ROUNDING - - /* C = A * 32768 */ - /* convert from float to Q31 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 2147483648.0f); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - - in = *pIn++; - in = (in * 2147483648.0f); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - - in = *pIn++; - in = (in * 2147483648.0f); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - - in = *pIn++; - in = (in * 2147483648.0f); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - -#else - - /* C = A * 2147483648 */ - /* convert from float to Q31 and then store the results in the destination buffer */ - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - -#ifdef ARM_MATH_ROUNDING - - /* C = A * 2147483648 */ - /* convert from float to Q31 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 2147483648.0f); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - -#else - - /* C = A * 2147483648 */ - /* convert from float to Q31 and then store the results in the destination buffer */ - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - -#ifdef ARM_MATH_ROUNDING - - /* C = A * 2147483648 */ - /* convert from float to Q31 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 2147483648.0f); - in += in > 0 ? 0.5f : -0.5f; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - -#else - - /* C = A * 2147483648 */ - /* convert from float to Q31 and then store the results in the destination buffer */ - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of float_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c deleted file mode 100644 index e43f0531ee..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c +++ /dev/null @@ -1,195 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_float_to_q7.c -* -* Description: Converts the elements of the floating-point vector to Q7 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup float_to_x - * @{ - */ - -/** - * @brief Converts the elements of the floating-point vector to Q7 vector. - * @param[in] *pSrc points to the floating-point input vector - * @param[out] *pDst points to the Q7 output vector - * @param[in] blockSize length of the input vector - * @return none. - * - *\par Description: - * \par - * The equation used for the conversion process is: - *
    
- * 	pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.    
- * 
- * \par Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - * \note - * In order to apply rounding, the library should be rebuilt with the ROUNDING macro - * defined in the preprocessor section of project options. - */ - - -void arm_float_to_q7( - float32_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - float32_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - -#ifdef ARM_MATH_ROUNDING - - float32_t in; - -#endif /* #ifdef ARM_MATH_ROUNDING */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - -#ifdef ARM_MATH_ROUNDING - /* C = A * 128 */ - /* convert from float to q7 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 128); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - - in = *pIn++; - in = (in * 128); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - - in = *pIn++; - in = (in * 128); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - - in = *pIn++; - in = (in * 128); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - -#else - - /* C = A * 128 */ - /* convert from float to q7 and then store the results in the destination buffer */ - *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8); - *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8); - *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8); - *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - -#ifdef ARM_MATH_ROUNDING - /* C = A * 128 */ - /* convert from float to q7 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 128); - in += in > 0 ? 0.5 : -0.5; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - -#else - - /* C = A * 128 */ - /* convert from float to q7 and then store the results in the destination buffer */ - *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - - -#else - - /* Run the below code for Cortex-M0 */ - - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { -#ifdef ARM_MATH_ROUNDING - /* C = A * 128 */ - /* convert from float to q7 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 128.0f); - in += in > 0 ? 0.5f : -0.5f; - *pDst++ = (q7_t) (__SSAT((q31_t) (in), 8)); - -#else - - /* C = A * 128 */ - /* convert from float to q7 and then store the results in the destination buffer */ - *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of float_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c deleted file mode 100644 index c927358515..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c +++ /dev/null @@ -1,126 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_q15_to_float.c -* -* Description: Converts the elements of the Q15 vector to floating-point vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @defgroup q15_to_x Convert 16-bit Integer value - */ - -/** - * @addtogroup q15_to_x - * @{ - */ - - - - -/** - * @brief Converts the elements of the Q15 vector to floating-point vector. - * @param[in] *pSrc points to the Q15 input vector - * @param[out] *pDst points to the floating-point output vector - * @param[in] blockSize length of the input vector - * @return none. - * - * \par Description: - * - * The equation used for the conversion process is: - * - *
    
- * 	pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.    
- * 
- * - */ - - -void arm_q15_to_float( - q15_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - q15_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (float32_t) A / 32768 */ - /* convert from q15 to float and then store the results in the destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 32768.0f); - *pDst++ = ((float32_t) * pIn++ / 32768.0f); - *pDst++ = ((float32_t) * pIn++ / 32768.0f); - *pDst++ = ((float32_t) * pIn++ / 32768.0f); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (float32_t) A / 32768 */ - /* convert from q15 to float and then store the results in the destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 32768.0f); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of q15_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c deleted file mode 100644 index d785e93018..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c +++ /dev/null @@ -1,148 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_q15_to_q31.c -* -* Description: Converts the elements of the Q15 vector to Q31 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup q15_to_x - * @{ - */ - -/** - * @brief Converts the elements of the Q15 vector to Q31 vector. - * @param[in] *pSrc points to the Q15 input vector - * @param[out] *pDst points to the Q31 output vector - * @param[in] blockSize length of the input vector - * @return none. - * - * \par Description: - * - * The equation used for the conversion process is: - * - *
    
- * 	pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.    
- * 
- * - */ - - -void arm_q15_to_q31( - q15_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q15_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2; - q31_t out1, out2, out3, out4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (q31_t)A << 16 */ - /* convert from q15 to q31 and then store the results in the destination buffer */ - in1 = *__SIMD32(pIn)++; - in2 = *__SIMD32(pIn)++; - -#ifndef ARM_MATH_BIG_ENDIAN - - /* extract lower 16 bits to 32 bit result */ - out1 = in1 << 16u; - /* extract upper 16 bits to 32 bit result */ - out2 = in1 & 0xFFFF0000; - /* extract lower 16 bits to 32 bit result */ - out3 = in2 << 16u; - /* extract upper 16 bits to 32 bit result */ - out4 = in2 & 0xFFFF0000; - -#else - - /* extract upper 16 bits to 32 bit result */ - out1 = in1 & 0xFFFF0000; - /* extract lower 16 bits to 32 bit result */ - out2 = in1 << 16u; - /* extract upper 16 bits to 32 bit result */ - out3 = in2 & 0xFFFF0000; - /* extract lower 16 bits to 32 bit result */ - out4 = in2 << 16u; - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - *pDst++ = out1; - *pDst++ = out2; - *pDst++ = out3; - *pDst++ = out4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (q31_t)A << 16 */ - /* convert from q15 to q31 and then store the results in the destination buffer */ - *pDst++ = (q31_t) * pIn++ << 16; - - /* Decrement the loop counter */ - blkCnt--; - } - -} - -/** - * @} end of q15_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c deleted file mode 100644 index 8d9a9be044..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c +++ /dev/null @@ -1,146 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_q15_to_q7.c -* -* Description: Converts the elements of the Q15 vector to Q7 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup q15_to_x - * @{ - */ - - -/** - * @brief Converts the elements of the Q15 vector to Q7 vector. - * @param[in] *pSrc points to the Q15 input vector - * @param[out] *pDst points to the Q7 output vector - * @param[in] blockSize length of the input vector - * @return none. - * - * \par Description: - * - * The equation used for the conversion process is: - * - *
    
- * 	pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.    
- * 
- * - */ - - -void arm_q15_to_q7( - q15_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - q15_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2; - q31_t out1, out2; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (q7_t) A >> 8 */ - /* convert from q15 to q7 and then store the results in the destination buffer */ - in1 = *__SIMD32(pIn)++; - in2 = *__SIMD32(pIn)++; - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __PKHTB(in2, in1, 16); - out2 = __PKHBT(in2, in1, 16); - -#else - - out1 = __PKHTB(in1, in2, 16); - out2 = __PKHBT(in1, in2, 16); - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - /* rotate packed value by 24 */ - out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24); - - /* anding with 0xff00ff00 to get two 8 bit values */ - out1 = out1 & 0xFF00FF00; - /* anding with 0x00ff00ff to get two 8 bit values */ - out2 = out2 & 0x00FF00FF; - - /* oring two values(contains two 8 bit values) to get four packed 8 bit values */ - out1 = out1 | out2; - - /* store 4 samples at a time to destiantion buffer */ - *__SIMD32(pDst)++ = out1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (q7_t) A >> 8 */ - /* convert from q15 to q7 and then store the results in the destination buffer */ - *pDst++ = (q7_t) (*pIn++ >> 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -} - -/** - * @} end of q15_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c deleted file mode 100644 index b2f6de9b26..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c +++ /dev/null @@ -1,123 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_q31_to_float.c -* -* Description: Converts the elements of the Q31 vector to floating-point vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @defgroup q31_to_x Convert 32-bit Integer value - */ - -/** - * @addtogroup q31_to_x - * @{ - */ - -/** - * @brief Converts the elements of the Q31 vector to floating-point vector. - * @param[in] *pSrc points to the Q31 input vector - * @param[out] *pDst points to the floating-point output vector - * @param[in] blockSize length of the input vector - * @return none. - * - * \par Description: - * - * The equation used for the conversion process is: - * - *
    
- * 	pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.    
- * 
- * - */ - - -void arm_q31_to_float( - q31_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - q31_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (float32_t) A / 2147483648 */ - /* convert from q31 to float and then store the results in the destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 2147483648.0f); - *pDst++ = ((float32_t) * pIn++ / 2147483648.0f); - *pDst++ = ((float32_t) * pIn++ / 2147483648.0f); - *pDst++ = ((float32_t) * pIn++ / 2147483648.0f); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (float32_t) A / 2147483648 */ - /* convert from q31 to float and then store the results in the destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 2147483648.0f); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of q31_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c deleted file mode 100644 index 1c99dbb473..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c +++ /dev/null @@ -1,137 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_q31_to_q15.c -* -* Description: Converts the elements of the Q31 vector to Q15 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup q31_to_x - * @{ - */ - -/** - * @brief Converts the elements of the Q31 vector to Q15 vector. - * @param[in] *pSrc points to the Q31 input vector - * @param[out] *pDst points to the Q15 output vector - * @param[in] blockSize length of the input vector - * @return none. - * - * \par Description: - * - * The equation used for the conversion process is: - * - *
    
- * 	pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.    
- * 
- * - */ - - -void arm_q31_to_q15( - q31_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q31_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - q31_t out1, out2; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (q15_t) A >> 16 */ - /* convert from q31 to q15 and then store the results in the destination buffer */ - in1 = *pIn++; - in2 = *pIn++; - in3 = *pIn++; - in4 = *pIn++; - - /* pack two higher 16-bit values from two 32-bit values */ -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __PKHTB(in2, in1, 16); - out2 = __PKHTB(in4, in3, 16); - -#else - - out1 = __PKHTB(in1, in2, 16); - out2 = __PKHTB(in3, in4, 16); - -#endif // #ifdef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = out1; - *__SIMD32(pDst)++ = out2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (q15_t) A >> 16 */ - /* convert from q31 to q15 and then store the results in the destination buffer */ - *pDst++ = (q15_t) (*pIn++ >> 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -} - -/** - * @} end of q31_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c deleted file mode 100644 index 2531c11e81..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c +++ /dev/null @@ -1,128 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_q31_to_q7.c -* -* Description: Converts the elements of the Q31 vector to Q7 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup q31_to_x - * @{ - */ - -/** - * @brief Converts the elements of the Q31 vector to Q7 vector. - * @param[in] *pSrc points to the Q31 input vector - * @param[out] *pDst points to the Q7 output vector - * @param[in] blockSize length of the input vector - * @return none. - * - * \par Description: - * - * The equation used for the conversion process is: - * - *
    
- * 	pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.     
- * 
- * - */ - - -void arm_q31_to_q7( - q31_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - q31_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - q7_t out1, out2, out3, out4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (q7_t) A >> 24 */ - /* convert from q31 to q7 and then store the results in the destination buffer */ - in1 = *pIn++; - in2 = *pIn++; - in3 = *pIn++; - in4 = *pIn++; - - out1 = (q7_t) (in1 >> 24); - out2 = (q7_t) (in2 >> 24); - out3 = (q7_t) (in3 >> 24); - out4 = (q7_t) (in4 >> 24); - - *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (q7_t) A >> 24 */ - /* convert from q31 to q7 and then store the results in the destination buffer */ - *pDst++ = (q7_t) (*pIn++ >> 24); - - /* Decrement the loop counter */ - blkCnt--; - } - -} - -/** - * @} end of q31_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c deleted file mode 100644 index 8e3f6f1b7d..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c +++ /dev/null @@ -1,123 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_q7_to_float.c -* -* Description: Converts the elements of the Q7 vector to floating-point vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @defgroup q7_to_x Convert 8-bit Integer value - */ - -/** - * @addtogroup q7_to_x - * @{ - */ - -/** - * @brief Converts the elements of the Q7 vector to floating-point vector. - * @param[in] *pSrc points to the Q7 input vector - * @param[out] *pDst points to the floating-point output vector - * @param[in] blockSize length of the input vector - * @return none. - * - * \par Description: - * - * The equation used for the conversion process is: - * - *
    
- * 	pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.    
- * 
- * - */ - - -void arm_q7_to_float( - q7_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - q7_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (float32_t) A / 128 */ - /* convert from q7 to float and then store the results in the destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 128.0f); - *pDst++ = ((float32_t) * pIn++ / 128.0f); - *pDst++ = ((float32_t) * pIn++ / 128.0f); - *pDst++ = ((float32_t) * pIn++ / 128.0f); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (float32_t) A / 128 */ - /* convert from q7 to float and then store the results in the destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 128.0f); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of q7_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c deleted file mode 100644 index a48ec29b82..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c +++ /dev/null @@ -1,149 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_q7_to_q15.c -* -* Description: Converts the elements of the Q7 vector to Q15 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup q7_to_x - * @{ - */ - - - - -/** - * @brief Converts the elements of the Q7 vector to Q15 vector. - * @param[in] *pSrc points to the Q7 input vector - * @param[out] *pDst points to the Q15 output vector - * @param[in] blockSize length of the input vector - * @return none. - * - * \par Description: - * - * The equation used for the conversion process is: - * - *
    
- * 	pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.    
- * 
- * - */ - - -void arm_q7_to_q15( - q7_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q7_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - q31_t in; - q31_t in1, in2; - q31_t out1, out2; - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (q15_t) A << 8 */ - /* convert from q7 to q15 and then store the results in the destination buffer */ - in = *__SIMD32(pIn)++; - - /* rotatate in by 8 and extend two q7_t values to q15_t values */ - in1 = __SXTB16(__ROR(in, 8)); - - /* extend remainig two q7_t values to q15_t values */ - in2 = __SXTB16(in); - - in1 = in1 << 8u; - in2 = in2 << 8u; - - in1 = in1 & 0xFF00FF00; - in2 = in2 & 0xFF00FF00; - -#ifndef ARM_MATH_BIG_ENDIAN - - out2 = __PKHTB(in1, in2, 16); - out1 = __PKHBT(in2, in1, 16); - -#else - - out1 = __PKHTB(in1, in2, 16); - out2 = __PKHBT(in2, in1, 16); - -#endif - - *__SIMD32(pDst)++ = out1; - *__SIMD32(pDst)++ = out2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (q15_t) A << 8 */ - /* convert from q7 to q15 and then store the results in the destination buffer */ - *pDst++ = (q15_t) * pIn++ << 8; - - /* Decrement the loop counter */ - blkCnt--; - } - -} - -/** - * @} end of q7_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c deleted file mode 100644 index 0607a9a4c8..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_q7_to_q31.c -* -* Description: Converts the elements of the Q7 vector to Q31 vector. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup q7_to_x - * @{ - */ - -/** - * @brief Converts the elements of the Q7 vector to Q31 vector. - * @param[in] *pSrc points to the Q7 input vector - * @param[out] *pDst points to the Q31 output vector - * @param[in] blockSize length of the input vector - * @return none. - * - * \par Description: - * - * The equation used for the conversion process is: - * - *
    
- * 	pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.   
- * 
- * - */ - - -void arm_q7_to_q31( - q7_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q7_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - q31_t in; - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = (q31_t) A << 24 */ - /* convert from q7 to q31 and then store the results in the destination buffer */ - in = *__SIMD32(pIn)++; - -#ifndef ARM_MATH_BIG_ENDIAN - - *pDst++ = (__ROR(in, 8)) & 0xFF000000; - *pDst++ = (__ROR(in, 16)) & 0xFF000000; - *pDst++ = (__ROR(in, 24)) & 0xFF000000; - *pDst++ = (in & 0xFF000000); - -#else - - *pDst++ = (in & 0xFF000000); - *pDst++ = (__ROR(in, 24)) & 0xFF000000; - *pDst++ = (__ROR(in, 16)) & 0xFF000000; - *pDst++ = (__ROR(in, 8)) & 0xFF000000; - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = (q31_t) A << 24 */ - /* convert from q7 to q31 and then store the results in the destination buffer */ - *pDst++ = (q31_t) * pIn++ << 24; - - /* Decrement the loop counter */ - blkCnt--; - } - -} - -/** - * @} end of q7_to_x group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c deleted file mode 100644 index 5529914755..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c +++ /dev/null @@ -1,222 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_bitreversal.c -* -* Description: This file has common tables like Bitreverse, reciprocal etc which are used across different functions -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Initial Version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" -#include "arm_common_tables.h" - -/* - * @brief In-place bit reversal function. - * @param[in, out] *pSrc points to the in-place buffer of floating-point data type. - * @param[in] fftSize length of the FFT. - * @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table. - * @param[in] *pBitRevTab points to the bit reversal table. - * @return none. - */ - -void arm_bitreversal_f32( - float32_t * pSrc, - uint16_t fftSize, - uint16_t bitRevFactor, - uint16_t * pBitRevTab) -{ - uint16_t fftLenBy2, fftLenBy2p1; - uint16_t i, j; - float32_t in; - - /* Initializations */ - j = 0u; - fftLenBy2 = fftSize >> 1u; - fftLenBy2p1 = (fftSize >> 1u) + 1u; - - /* Bit Reversal Implementation */ - for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u) - { - if(i < j) - { - /* pSrc[i] <-> pSrc[j]; */ - in = pSrc[2u * i]; - pSrc[2u * i] = pSrc[2u * j]; - pSrc[2u * j] = in; - - /* pSrc[i+1u] <-> pSrc[j+1u] */ - in = pSrc[(2u * i) + 1u]; - pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u]; - pSrc[(2u * j) + 1u] = in; - - /* pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */ - in = pSrc[2u * (i + fftLenBy2p1)]; - pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)]; - pSrc[2u * (j + fftLenBy2p1)] = in; - - /* pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */ - in = pSrc[(2u * (i + fftLenBy2p1)) + 1u]; - pSrc[(2u * (i + fftLenBy2p1)) + 1u] = - pSrc[(2u * (j + fftLenBy2p1)) + 1u]; - pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in; - - } - - /* pSrc[i+1u] <-> pSrc[j+1u] */ - in = pSrc[2u * (i + 1u)]; - pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)]; - pSrc[2u * (j + fftLenBy2)] = in; - - /* pSrc[i+2u] <-> pSrc[j+2u] */ - in = pSrc[(2u * (i + 1u)) + 1u]; - pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u]; - pSrc[(2u * (j + fftLenBy2)) + 1u] = in; - - /* Reading the index for the bit reversal */ - j = *pBitRevTab; - - /* Updating the bit reversal index depending on the fft length */ - pBitRevTab += bitRevFactor; - } -} - - - -/* - * @brief In-place bit reversal function. - * @param[in, out] *pSrc points to the in-place buffer of Q31 data type. - * @param[in] fftLen length of the FFT. - * @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table - * @param[in] *pBitRevTab points to bit reversal table. - * @return none. - */ - -void arm_bitreversal_q31( - q31_t * pSrc, - uint32_t fftLen, - uint16_t bitRevFactor, - uint16_t * pBitRevTable) -{ - uint32_t fftLenBy2, fftLenBy2p1, i, j; - q31_t in; - - /* Initializations */ - j = 0u; - fftLenBy2 = fftLen / 2u; - fftLenBy2p1 = (fftLen / 2u) + 1u; - - /* Bit Reversal Implementation */ - for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u) - { - if(i < j) - { - /* pSrc[i] <-> pSrc[j]; */ - in = pSrc[2u * i]; - pSrc[2u * i] = pSrc[2u * j]; - pSrc[2u * j] = in; - - /* pSrc[i+1u] <-> pSrc[j+1u] */ - in = pSrc[(2u * i) + 1u]; - pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u]; - pSrc[(2u * j) + 1u] = in; - - /* pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */ - in = pSrc[2u * (i + fftLenBy2p1)]; - pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)]; - pSrc[2u * (j + fftLenBy2p1)] = in; - - /* pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */ - in = pSrc[(2u * (i + fftLenBy2p1)) + 1u]; - pSrc[(2u * (i + fftLenBy2p1)) + 1u] = - pSrc[(2u * (j + fftLenBy2p1)) + 1u]; - pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in; - - } - - /* pSrc[i+1u] <-> pSrc[j+1u] */ - in = pSrc[2u * (i + 1u)]; - pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)]; - pSrc[2u * (j + fftLenBy2)] = in; - - /* pSrc[i+2u] <-> pSrc[j+2u] */ - in = pSrc[(2u * (i + 1u)) + 1u]; - pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u]; - pSrc[(2u * (j + fftLenBy2)) + 1u] = in; - - /* Reading the index for the bit reversal */ - j = *pBitRevTable; - - /* Updating the bit reversal index depending on the fft length */ - pBitRevTable += bitRevFactor; - } -} - - - -/* - * @brief In-place bit reversal function. - * @param[in, out] *pSrc points to the in-place buffer of Q15 data type. - * @param[in] fftLen length of the FFT. - * @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table - * @param[in] *pBitRevTab points to bit reversal table. - * @return none. - */ - -void arm_bitreversal_q15( - q15_t * pSrc16, - uint32_t fftLen, - uint16_t bitRevFactor, - uint16_t * pBitRevTab) -{ - q31_t *pSrc = (q31_t *) pSrc16; - q31_t in; - uint32_t fftLenBy2, fftLenBy2p1; - uint32_t i, j; - - /* Initializations */ - j = 0u; - fftLenBy2 = fftLen / 2u; - fftLenBy2p1 = (fftLen / 2u) + 1u; - - /* Bit Reversal Implementation */ - for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u) - { - if(i < j) - { - /* pSrc[i] <-> pSrc[j]; */ - /* pSrc[i+1u] <-> pSrc[j+1u] */ - in = pSrc[i]; - pSrc[i] = pSrc[j]; - pSrc[j] = in; - - /* pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1]; */ - /* pSrc[i + fftLenBy2p1+1u] <-> pSrc[j + fftLenBy2p1+1u] */ - in = pSrc[i + fftLenBy2p1]; - pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1]; - pSrc[j + fftLenBy2p1] = in; - } - - /* pSrc[i+1u] <-> pSrc[j+fftLenBy2]; */ - /* pSrc[i+2] <-> pSrc[j+fftLenBy2+1u] */ - in = pSrc[i + 1u]; - pSrc[i + 1u] = pSrc[j + fftLenBy2]; - pSrc[j + fftLenBy2] = in; - - /* Reading the index for the bit reversal */ - j = *pBitRevTab; - - /* Updating the bit reversal index depending on the fft length */ - pBitRevTab += bitRevFactor; - } -} diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c deleted file mode 100644 index 3cfc45fd9a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c +++ /dev/null @@ -1,511 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix2_f32.c -* -* Description: Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function -* -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.3 2010/11/29 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @defgroup Radix2_CFFT_CIFFT Radix-2 Complex FFT Functions - * - * \par - * Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT). - * Computational complexity of CFFT reduces drastically when compared to DFT. - * \par - * This set of functions implements CFFT/CIFFT - * for Q15, Q31, and floating-point data types. The functions operates on in-place buffer which uses same buffer for input and output. - * Complex input is stored in input buffer in an interleaved fashion. - * - * \par - * The functions operate on blocks of input and output data and each call to the function processes - * 2*fftLen samples through the transform. pSrc points to In-place arrays containing 2*fftLen values. - * \par - * The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below. - *
 {real[0], imag[0], real[1], imag[1],..} 
- * - * \par Lengths supported by the transform: - * \par - * Internally, the function utilize a radix-2 decimation in frequency(DIF) algorithm - * and the size of the FFT supported are of the lengths [16, 32, 64, 128, 256, 512, 1024, 2048, 4096]. - * - * - * \par Algorithm: - * - * Complex Fast Fourier Transform: - * \par - * Input real and imaginary data: - *
   
- * x(n) = xa + j * ya   
- * x(n+N/2 ) = xb + j * yb   
- * 
- * where N is length of FFT - * \par - * Output real and imaginary data: - *
   
- * X(2r) = xa'+ j * ya'   
- * X(2r+1) = xb'+ j * yb'   
- * 
- * \par - * Twiddle factors for radix-2 FFT: - *
   
- * Wn = cosVal + j * (- sinVal)   
- * 
- * - * \par - * \image html CFFT_Radix2.gif "Radix-2 Decimation-in Frequency Complex Fast Fourier Transform" - * - * \par - * Output from Radix-2 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output. - * \par - * Butterfly CFFT equations: - *
   
- * xa' = xa + xb  
- * ya' = ya + yb  
- * xb' = (xa-xb)* cosVal + (ya-yb) * sinVal   
- * yb' = (ya-yb)* cosVal - (xa-xb) * sinVal   
- * 
- * - * - * Complex Inverse Fast Fourier Transform: - * \par - * CIFFT uses same twiddle factor table as CFFT with modifications in the design equation as shown below. - * - * \par - * Modified Butterfly CIFFT equations: - *
   
- * xa' = xa + xb  
- * ya' = ya + yb  
- * xb' = (xa-xb)* cosVal - (ya-yb) * sinVal   
- * yb' = (ya-yb)* cosVal + (xa-xb) * sinVal   
- * 
- * - * \par Instance Structure - * A separate instance structure must be defined for each Instance but the twiddle factors and bit reversal tables can be reused. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Initializes twiddle factor table and bit reversal table pointers - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Manually initialize the instance structure as follows: - *
   
- *arm_cfft_radix2_instance_f32 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor, onebyfftLen};   
- *arm_cfft_radix2_instance_q31 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};   
- *arm_cfft_radix2_instance_q15 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};   
- * 
- * \par - * where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT); - * bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order); - * pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table. - * twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table; - * pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table. - * onebyfftLen value of 1/fftLen to calculate CIFFT; - * - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the CFFT/CIFFT function. - * Refer to the function specific documentation below for usage guidelines. - */ - - -/** - * @addtogroup Radix2_CFFT_CIFFT - * @{ - */ - -/** - * @details - * @brief Processing function for the floating-point Radix-2 CFFT/CIFFT. - * @param[in] *S points to an instance of the floating-point Radix-2 CFFT/CIFFT structure. - * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place. - * @return none. - */ - -void arm_cfft_radix2_f32( - const arm_cfft_radix2_instance_f32 * S, - float32_t * pSrc) -{ - - if(S->ifftFlag == 1u) - { - /* Complex IFFT radix-2 */ - arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier, S->onebyfftLen); - } - else - { - /* Complex FFT radix-2 */ - arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier); - } - - if(S->bitReverseFlag == 1u) - { - /* Bit Reversal */ - arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); - } - -} - - -/** - * @} end of Radix2_CFFT_CIFFT group - */ - - - -/* ---------------------------------------------------------------------- -** Internal helper function used by the FFTs -** ------------------------------------------------------------------- */ - -/* - * @brief Core function for the floating-point CFFT butterfly process. - * @param[in, out] *pSrc points to the in-place buffer of floating-point data type. - * @param[in] fftLen length of the FFT. - * @param[in] *pCoef points to the twiddle coefficient buffer. - * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - */ - -void arm_radix2_butterfly_f32( - float32_t * pSrc, - uint32_t fftLen, - float32_t * pCoef, - uint16_t twidCoefModifier) -{ - - int i, j, k, l; - int n1, n2, ia; - float32_t xt, yt, cosVal, sinVal; - -#ifndef ARM_MATH_CM0 - - /* Initializations for the first stage */ - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (i = 0; i < n2; i++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - - /* Twiddle coefficients index modifier */ - ia = ia + twidCoefModifier; - - /* index calculation for the input as, */ - /* pSrc[i + 0], pSrc[i + fftLen/1] */ - l = i + n2; - - /* Butterfly implementation */ - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - pSrc[2u * l] = xt * cosVal + yt * sinVal; - - pSrc[2u * l + 1u] = yt * cosVal - xt * sinVal; - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - pSrc[2u * l] = xt * cosVal + yt * sinVal; - - pSrc[2u * l + 1u] = yt * cosVal - xt * sinVal; - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2u * l] = xt; - - pSrc[2u * l + 1u] = yt; - - } // groups loop end - -#else - - //N = fftLen; - n2 = fftLen; - - // loop for stage - for (k = fftLen; k > 1; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - pSrc[2 * l] = (cosVal * xt + sinVal * yt); // >> 15; - pSrc[2 * l + 1] = (cosVal * yt - sinVal * xt); // >> 15; - - } - } - twidCoefModifier = twidCoefModifier << 1u; - } - -#endif // #ifndef ARM_MATH_CM0 - -} - - -void arm_radix2_butterfly_inverse_f32( - float32_t * pSrc, - uint32_t fftLen, - float32_t * pCoef, - uint16_t twidCoefModifier, - float32_t onebyfftLen) -{ - - int i, j, k, l; - int n1, n2, ia; - float32_t xt, yt, cosVal, sinVal; - -#ifndef ARM_MATH_CM0 - - //N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (i = 0; i < n2; i++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - pSrc[2u * l] = xt * cosVal - yt * sinVal; - - pSrc[2u * l + 1u] = yt * cosVal + xt * sinVal; - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - pSrc[2u * l] = xt * cosVal - yt * sinVal; - - pSrc[2u * l + 1u] = yt * cosVal + xt * sinVal; - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) * onebyfftLen; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) * onebyfftLen; - - pSrc[2u * l] = xt * onebyfftLen; - - pSrc[2u * l + 1u] = yt * onebyfftLen; - - } // butterfly loop end - -#else - - //N = fftLen; - n2 = fftLen; - - // loop for stage - for (k = fftLen; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - pSrc[2u * l] = xt * cosVal - yt * sinVal; - - pSrc[2u * l + 1u] = yt * cosVal + xt * sinVal; - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) * onebyfftLen; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) * onebyfftLen; - - pSrc[2u * l] = xt * onebyfftLen; - - pSrc[2u * l + 1u] = yt * onebyfftLen; - - } // butterfly loop end - -#endif // #ifndef ARM_MATH_CM0 - -} diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c deleted file mode 100644 index 76c781fc32..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c +++ /dev/null @@ -1,198 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix4_init_f32.c -* -* Description: Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup Radix2_CFFT_CIFFT - * @{ - */ - -/** -* @brief Initialization function for the floating-point CFFT/CIFFT. -* @param[in,out] *S points to an instance of the floating-point CFFT/CIFFT structure. -* @param[in] fftLen length of the FFT. -* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. -* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. -* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value. -* -* \par Description: -* \par -* The parameter ifftFlag controls whether a forward or inverse transform is computed. -* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated -* \par -* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. -* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. -* \par -* The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. -* \par -* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. -*/ -arm_status arm_cfft_radix2_init_f32( - arm_cfft_radix2_instance_f32 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (float32_t *) twiddleCoef; - - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLen) - { - - case 4096u: - /* Initializations of structure parameters for 4096 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.000244140625; - break; - - case 2048u: - /* Initializations of structure parameters for 2048 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 2u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 2u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[1]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.00048828125; - break; - - case 1024u: - /* Initializations of structure parameters for 1024 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 4u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 4u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.0009765625f; - break; - - case 512u: - /* Initializations of structure parameters for 512 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 8u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 8u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[7]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.001953125; - break; - - case 256u: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16u; - S->bitRevFactor = 16u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - S->onebyfftLen = 0.00390625f; - break; - - case 128u: - /* Initializations of structure parameters for 128 point FFT */ - S->twidCoefModifier = 32u; - S->bitRevFactor = 32u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[31]; - S->onebyfftLen = 0.0078125; - break; - - case 64u: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64u; - S->bitRevFactor = 64u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - S->onebyfftLen = 0.015625f; - break; - - case 32u: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 128u; - S->bitRevFactor = 128u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[127]; - S->onebyfftLen = 0.03125; - break; - - case 16u: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256u; - S->bitRevFactor = 256u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - S->onebyfftLen = 0.0625f; - break; - - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - return (status); -} - -/** - * @} end of Radix2_CFFT_CIFFT group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c deleted file mode 100644 index b6ba22c186..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c +++ /dev/null @@ -1,186 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix2_init_q15.c -* -* Description: Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @ingroup groupTransforms - */ - - -/** - * @addtogroup Radix2_CFFT_CIFFT - * @{ - */ - -/** -* @brief Initialization function for the Q15 CFFT/CIFFT. -* @param[in,out] *S points to an instance of the Q15 CFFT/CIFFT structure. -* @param[in] fftLen length of the FFT. -* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. -* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. -* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value. -* -* \par Description: -* \par -* The parameter ifftFlag controls whether a forward or inverse transform is computed. -* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated -* \par -* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. -* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. -* \par -* The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. -* \par -* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. -*/ - -arm_status arm_cfft_radix2_init_q15( - arm_cfft_radix2_instance_q15 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (q15_t *) twiddleCoefQ15; - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLen) - { - case 4096u: - /* Initializations of structure parameters for 4096 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - - break; - - case 2048u: - /* Initializations of structure parameters for 2048 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 2u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 2u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[1]; - - break; - - case 1024u: - /* Initializations of structure parameters for 1024 point FFT */ - S->twidCoefModifier = 4u; - S->bitRevFactor = 4u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - - break; - - case 512u: - /* Initializations of structure parameters for 512 point FFT */ - S->twidCoefModifier = 8u; - S->bitRevFactor = 8u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[7]; - - break; - - case 256u: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16u; - S->bitRevFactor = 16u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - - break; - - case 128u: - /* Initializations of structure parameters for 128 point FFT */ - S->twidCoefModifier = 32u; - S->bitRevFactor = 32u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[31]; - - break; - - case 64u: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64u; - S->bitRevFactor = 64u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - - break; - - case 32u: - /* Initializations of structure parameters for 32 point FFT */ - S->twidCoefModifier = 128u; - S->bitRevFactor = 128u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[127]; - - break; - - case 16u: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256u; - S->bitRevFactor = 256u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - - break; - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - return (status); -} - -/** - * @} end of Radix2_CFFT_CIFFT group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c deleted file mode 100644 index 94eeeb00ae..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c +++ /dev/null @@ -1,164 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix2_init_q31.c -* -* Description: Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup Radix2_CFFT_CIFFT - * @{ - */ - - -/** -* -* @brief Initialization function for the Q31 CFFT/CIFFT. -* @param[in,out] *S points to an instance of the Q31 CFFT/CIFFT structure. -* @param[in] fftLen length of the FFT. -* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. -* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. -* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value. -* -* \par Description: -* \par -* The parameter ifftFlag controls whether a forward or inverse transform is computed. -* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated -* \par -* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. -* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. -* \par -* The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. -* \par -* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. -*/ - -arm_status arm_cfft_radix2_init_q31( - arm_cfft_radix2_instance_q31 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (q31_t *) twiddleCoefQ31; - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) - { - /* Initializations of structure parameters for 4096 point FFT */ - case 4096u: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - break; - - /* Initializations of structure parameters for 2048 point FFT */ - case 2048u: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 2u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 2u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[1]; - break; - - /* Initializations of structure parameters for 1024 point FFT */ - case 1024u: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 4u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 4u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - break; - - /* Initializations of structure parameters for 512 point FFT */ - case 512u: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 8u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 8u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[7]; - break; - - case 256u: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16u; - S->bitRevFactor = 16u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - break; - - case 128u: - /* Initializations of structure parameters for 128 point FFT */ - S->twidCoefModifier = 32u; - S->bitRevFactor = 32u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[31]; - break; - - case 64u: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64u; - S->bitRevFactor = 64u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - break; - - case 32u: - /* Initializations of structure parameters for 32 point FFT */ - S->twidCoefModifier = 128u; - S->bitRevFactor = 128u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[127]; - break; - - case 16u: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256u; - S->bitRevFactor = 256u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - break; - - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - return (status); -} - -/** - * @} end of Radix2_CFFT_CIFFT group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c deleted file mode 100644 index c385091c7a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c +++ /dev/null @@ -1,712 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix2_q15.c -* -* Description: Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function -* -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @defgroup Radix2_CFFT_CIFFT Radix-2 Complex FFT Functions - * - * \par - * Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT). - * Computational complexity of CFFT reduces drastically when compared to DFT. - */ - - -/** - * @addtogroup Radix2_CFFT_CIFFT - * @{ - */ - -/** - * @details - * @brief Processing function for the fixed-point CFFT/CIFFT. - * @param[in] *S points to an instance of the fixed-point CFFT/CIFFT structure. - * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place. - * @return none. - */ - -void arm_cfft_radix2_q15( - const arm_cfft_radix2_instance_q15 * S, - q15_t * pSrc) -{ - - if(S->ifftFlag == 1u) - { - arm_radix2_butterfly_inverse_q15(pSrc, S->fftLen, - S->pTwiddle, S->twidCoefModifier); - } - else - { - arm_radix2_butterfly_q15(pSrc, S->fftLen, - S->pTwiddle, S->twidCoefModifier); - } - - arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); -} - -/** - * @} end of Radix2_CFFT_CIFFT group - */ - -void arm_radix2_butterfly_q15( - q15_t * pSrc, - uint32_t fftLen, - q15_t * pCoef, - uint16_t twidCoefModifier) -{ -#ifndef ARM_MATH_CM0 - - int i, j, k, l; - int n1, n2, ia; - q15_t in; - q31_t T, S, R; - q31_t coeff, out1, out2; - - //N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (i = 0; i < n2; i++) - { - coeff = _SIMD32_OFFSET(pCoef + (ia * 2u)); - - ia = ia + twidCoefModifier; - - l = i + n2; - - T = _SIMD32_OFFSET(pSrc + (2 * i)); - in = ((int16_t) (T & 0xFFFF)) >> 2; - T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - S = _SIMD32_OFFSET(pSrc + (2 * l)); - in = ((int16_t) (S & 0xFFFF)) >> 2; - S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - R = __QSUB16(T, S); - - _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S); - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __SMUAD(coeff, R) >> 16; - out2 = __SMUSDX(coeff, R); - -#else - - out1 = __SMUSDX(R, coeff) >> 16u; - out2 = __SMUAD(coeff, R); - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - _SIMD32_OFFSET(pSrc + (2u * l)) = - (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - coeff = _SIMD32_OFFSET(pCoef + (ia * 2u)); - - ia = ia + twidCoefModifier; - - // loop for butterfly - i++; - l++; - - T = _SIMD32_OFFSET(pSrc + (2 * i)); - in = ((int16_t) (T & 0xFFFF)) >> 2; - T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - S = _SIMD32_OFFSET(pSrc + (2 * l)); - in = ((int16_t) (S & 0xFFFF)) >> 2; - S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - R = __QSUB16(T, S); - - _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S); - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __SMUAD(coeff, R) >> 16; - out2 = __SMUSDX(coeff, R); - -#else - - out1 = __SMUSDX(R, coeff) >> 16u; - out2 = __SMUAD(coeff, R); - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - _SIMD32_OFFSET(pSrc + (2u * l)) = - (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - coeff = _SIMD32_OFFSET(pCoef + (ia * 2u)); - - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - - T = _SIMD32_OFFSET(pSrc + (2 * i)); - - S = _SIMD32_OFFSET(pSrc + (2 * l)); - - R = __QSUB16(T, S); - - _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S); - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __SMUAD(coeff, R) >> 16; - out2 = __SMUSDX(coeff, R); - -#else - - out1 = __SMUSDX(R, coeff) >> 16u; - out2 = __SMUAD(coeff, R); - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - _SIMD32_OFFSET(pSrc + (2u * l)) = - (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - i += n1; - - l = i + n2; - - T = _SIMD32_OFFSET(pSrc + (2 * i)); - - S = _SIMD32_OFFSET(pSrc + (2 * l)); - - R = __QSUB16(T, S); - - _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S); - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __SMUAD(coeff, R) >> 16; - out2 = __SMUSDX(coeff, R); - -#else - - out1 = __SMUSDX(R, coeff) >> 16u; - out2 = __SMUAD(coeff, R); - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - _SIMD32_OFFSET(pSrc + (2u * l)) = - (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - coeff = _SIMD32_OFFSET(pCoef + (ia * 2u)); - - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - - T = _SIMD32_OFFSET(pSrc + (2 * i)); - - S = _SIMD32_OFFSET(pSrc + (2 * l)); - - R = __QSUB16(T, S); - - _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S); - - _SIMD32_OFFSET(pSrc + (2u * l)) = R; - - i += n1; - l = i + n2; - - T = _SIMD32_OFFSET(pSrc + (2 * i)); - - S = _SIMD32_OFFSET(pSrc + (2 * l)); - - R = __QSUB16(T, S); - - _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S); - - _SIMD32_OFFSET(pSrc + (2u * l)) = R; - - } // groups loop end - - -#else - - int i, j, k, l; - int n1, n2, ia; - q15_t xt, yt, cosVal, sinVal; - - - //N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u); - pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u; - - yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u); - pSrc[2 * i + 1] = - ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u; - - pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) + - ((int16_t) (((q31_t) yt * sinVal) >> 16))); - - pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) - - ((int16_t) (((q31_t) xt * sinVal) >> 16))); - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u; - - pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) + - ((int16_t) (((q31_t) yt * sinVal) >> 16))); - - pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) - - ((int16_t) (((q31_t) xt * sinVal) >> 16))); - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2u * l] = xt; - - pSrc[2u * l + 1u] = yt; - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - -#endif // #ifndef ARM_MATH_CM0 - -} - - -void arm_radix2_butterfly_inverse_q15( - q15_t * pSrc, - uint32_t fftLen, - q15_t * pCoef, - uint16_t twidCoefModifier) -{ -#ifndef ARM_MATH_CM0 - - int i, j, k, l; - int n1, n2, ia; - q15_t in; - q31_t T, S, R; - q31_t coeff, out1, out2; - - //N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (i = 0; i < n2; i++) - { - coeff = _SIMD32_OFFSET(pCoef + (ia * 2u)); - - ia = ia + twidCoefModifier; - - l = i + n2; - - T = _SIMD32_OFFSET(pSrc + (2 * i)); - in = ((int16_t) (T & 0xFFFF)) >> 2; - T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - S = _SIMD32_OFFSET(pSrc + (2 * l)); - in = ((int16_t) (S & 0xFFFF)) >> 2; - S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - R = __QSUB16(T, S); - - _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S); - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __SMUSD(coeff, R) >> 16; - out2 = __SMUADX(coeff, R); -#else - - out1 = __SMUADX(R, coeff) >> 16u; - out2 = __SMUSD(__QSUB(0, coeff), R); - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - _SIMD32_OFFSET(pSrc + (2u * l)) = - (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - coeff = _SIMD32_OFFSET(pCoef + (ia * 2u)); - - ia = ia + twidCoefModifier; - - // loop for butterfly - i++; - l++; - - T = _SIMD32_OFFSET(pSrc + (2 * i)); - in = ((int16_t) (T & 0xFFFF)) >> 2; - T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - S = _SIMD32_OFFSET(pSrc + (2 * l)); - in = ((int16_t) (S & 0xFFFF)) >> 2; - S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - R = __QSUB16(T, S); - - _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S); - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __SMUSD(coeff, R) >> 16; - out2 = __SMUADX(coeff, R); -#else - - out1 = __SMUADX(R, coeff) >> 16u; - out2 = __SMUSD(__QSUB(0, coeff), R); - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - _SIMD32_OFFSET(pSrc + (2u * l)) = - (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - coeff = _SIMD32_OFFSET(pCoef + (ia * 2u)); - - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - - T = _SIMD32_OFFSET(pSrc + (2 * i)); - - S = _SIMD32_OFFSET(pSrc + (2 * l)); - - R = __QSUB16(T, S); - - _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S); - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __SMUSD(coeff, R) >> 16; - out2 = __SMUADX(coeff, R); - -#else - - out1 = __SMUADX(R, coeff) >> 16u; - out2 = __SMUSD(__QSUB(0, coeff), R); - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - _SIMD32_OFFSET(pSrc + (2u * l)) = - (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - i += n1; - - l = i + n2; - - T = _SIMD32_OFFSET(pSrc + (2 * i)); - - S = _SIMD32_OFFSET(pSrc + (2 * l)); - - R = __QSUB16(T, S); - - _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S); - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __SMUSD(coeff, R) >> 16; - out2 = __SMUADX(coeff, R); -#else - - out1 = __SMUADX(R, coeff) >> 16u; - out2 = __SMUSD(__QSUB(0, coeff), R); - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - _SIMD32_OFFSET(pSrc + (2u * l)) = - (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - coeff = _SIMD32_OFFSET(pCoef + (ia * 2u)); - - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - - T = _SIMD32_OFFSET(pSrc + (2 * i)); - - S = _SIMD32_OFFSET(pSrc + (2 * l)); - - R = __QSUB16(T, S); - - _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S); - - _SIMD32_OFFSET(pSrc + (2u * l)) = R; - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - -#else - - - int i, j, k, l; - int n1, n2, ia; - q15_t xt, yt, cosVal, sinVal; - - //N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u); - pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u; - - yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u); - pSrc[2 * i + 1] = - ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u; - - pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) - - ((int16_t) (((q31_t) yt * sinVal) >> 16))); - - pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) + - ((int16_t) (((q31_t) xt * sinVal) >> 16))); - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u; - - pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) - - ((int16_t) (((q31_t) yt * sinVal) >> 16))); - - pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) + - ((int16_t) (((q31_t) xt * sinVal) >> 16))); - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2u * l] = xt; - - pSrc[2u * l + 1u] = yt; - - } // groups loop end - - -#endif // #ifndef ARM_MATH_CM0 - -} diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c deleted file mode 100644 index 5b950c39c6..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c +++ /dev/null @@ -1,310 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix2_q31.c -* -* Description: Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function -* -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @defgroup Radix2_CFFT_CIFFT Radix-2 Complex FFT Functions - * - * \par - * Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT). - * Computational complexity of CFFT reduces drastically when compared to DFT. - */ - - -/** - * @addtogroup Radix2_CFFT_CIFFT - * @{ - */ - -/** - * @details - * @brief Processing function for the fixed-point CFFT/CIFFT. - * @param[in] *S points to an instance of the fixed-point CFFT/CIFFT structure. - * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place. - * @return none. - */ - -void arm_cfft_radix2_q31( - const arm_cfft_radix2_instance_q31 * S, - q31_t * pSrc) -{ - - if(S->ifftFlag == 1u) - { - arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen, - S->pTwiddle, S->twidCoefModifier); - } - else - { - arm_radix2_butterfly_q31(pSrc, S->fftLen, - S->pTwiddle, S->twidCoefModifier); - } - - arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); -} - -/** - * @} end of Radix2_CFFT_CIFFT group - */ - -void arm_radix2_butterfly_q31( - q31_t * pSrc, - uint32_t fftLen, - q31_t * pCoef, - uint16_t twidCoefModifier) -{ - - int i, j, k, l; - int n1, n2, ia; - q31_t xt, yt, cosVal, sinVal; - - //N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (i = 0; i < n2; i++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - l = i + n2; - xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u); - pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u; - - yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u); - pSrc[2 * i + 1] = - ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u; - - pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) + - ((int32_t) (((q63_t) yt * sinVal) >> 32))); - - pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) - - ((int32_t) (((q63_t) xt * sinVal) >> 32))); - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u; - - pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) + - ((int32_t) (((q63_t) yt * sinVal) >> 32))); - - pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) - - ((int32_t) (((q63_t) xt * sinVal) >> 32))); - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2u * l] = xt; - - pSrc[2u * l + 1u] = yt; - - i += n1; - l = i + n2; - - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2u * l] = xt; - - pSrc[2u * l + 1u] = yt; - - } // butterfly loop end - -} - - -void arm_radix2_butterfly_inverse_q31( - q31_t * pSrc, - uint32_t fftLen, - q31_t * pCoef, - uint16_t twidCoefModifier) -{ - - int i, j, k, l; - int n1, n2, ia; - q31_t xt, yt, cosVal, sinVal; - - //N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (i = 0; i < n2; i++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - l = i + n2; - xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u); - pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u; - - yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u); - pSrc[2 * i + 1] = - ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u; - - pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) - - ((int32_t) (((q63_t) yt * sinVal) >> 32))); - - pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) + - ((int32_t) (((q63_t) xt * sinVal) >> 32))); - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u; - - pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) - - ((int32_t) (((q63_t) yt * sinVal) >> 32))); - - pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) + - ((int32_t) (((q63_t) xt * sinVal) >> 32))); - - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1u; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2u * l] = xt; - - pSrc[2u * l + 1u] = yt; - - i += n1; - l = i + n2; - - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2u * l] = xt; - - pSrc[2u * l + 1u] = yt; - - } // butterfly loop end - -} diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c deleted file mode 100644 index d1fb3196e3..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c +++ /dev/null @@ -1,1236 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix4_f32.c -* -* Description: Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function -* -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @defgroup Radix4_CFFT_CIFFT Radix-4 Complex FFT Functions - * - * \par - * Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT). - * Computational complexity of CFFT reduces drastically when compared to DFT. - * \par - * This set of functions implements CFFT/CIFFT - * for Q15, Q31, and floating-point data types. The functions operates on in-place buffer which uses same buffer for input and output. - * Complex input is stored in input buffer in an interleaved fashion. - * - * \par - * The functions operate on blocks of input and output data and each call to the function processes - * 2*fftLen samples through the transform. pSrc points to In-place arrays containing 2*fftLen values. - * \par - * The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below. - *
 {real[0], imag[0], real[1], imag[1],..} 
- * - * \par Lengths supported by the transform: - * \par - * Internally, the function utilize a radix-4 decimation in frequency(DIF) algorithm - * and the size of the FFT supported are of the lengths [16, 64, 256, 1024]. - * - * - * \par Algorithm: - * - * Complex Fast Fourier Transform: - * \par - * Input real and imaginary data: - *
    
- * x(n) = xa + j * ya    
- * x(n+N/4 ) = xb + j * yb    
- * x(n+N/2 ) = xc + j * yc    
- * x(n+3N 4) = xd + j * yd    
- * 
- * where N is length of FFT - * \par - * Output real and imaginary data: - *
    
- * X(4r) = xa'+ j * ya'    
- * X(4r+1) = xb'+ j * yb'    
- * X(4r+2) = xc'+ j * yc'    
- * X(4r+3) = xd'+ j * yd'    
- * 
- * \par - * Twiddle factors for radix-4 FFT: - *
    
- * Wn = co1 + j * (- si1)    
- * W2n = co2 + j * (- si2)    
- * W3n = co3 + j * (- si3)    
- * 
- * - * \par - * \image html CFFT.gif "Radix-4 Decimation-in Frequency Complex Fast Fourier Transform" - * - * \par - * Output from Radix-4 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output. - * \par - * Butterfly CFFT equations: - *
    
- * xa' = xa + xb + xc + xd    
- * ya' = ya + yb + yc + yd    
- * xc' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
- * yc' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
- * xb' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
- * yb' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
- * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
- * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
- * 
- * - * - * Complex Inverse Fast Fourier Transform: - * \par - * CIFFT uses same twiddle factor table as CFFT with modifications in the design equation as shown below. - * - * \par - * Modified Butterfly CIFFT equations: - *
    
- * xa' = xa + xb + xc + xd    
- * ya' = ya + yb + yc + yd    
- * xc' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)    
- * yc' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)    
- * xb' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)    
- * yb' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)    
- * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)    
- * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)    
- * 
- * - * \par Instance Structure - * A separate instance structure must be defined for each Instance but the twiddle factors and bit reversal tables can be reused. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Initializes twiddle factor table and bit reversal table pointers - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Manually initialize the instance structure as follows: - *
    
- *arm_cfft_radix4_instance_f32 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor, onebyfftLen};    
- *arm_cfft_radix4_instance_q31 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};    
- *arm_cfft_radix4_instance_q15 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};    
- * 
- * \par - * where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT); - * bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order); - * pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table. - * twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table; - * pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table. - * onebyfftLen value of 1/fftLen to calculate CIFFT; - * - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the CFFT/CIFFT function. - * Refer to the function specific documentation below for usage guidelines. - */ - - -/** - * @addtogroup Radix4_CFFT_CIFFT - * @{ - */ - -/** - * @details - * @brief Processing function for the floating-point Radix-4 CFFT/CIFFT. - * @param[in] *S points to an instance of the floating-point Radix-4 CFFT/CIFFT structure. - * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place. - * @return none. - */ - -void arm_cfft_radix4_f32( - const arm_cfft_radix4_instance_f32 * S, - float32_t * pSrc) -{ - - if(S->ifftFlag == 1u) - { - /* Complex IFFT radix-4 */ - arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier, S->onebyfftLen); - } - else - { - /* Complex FFT radix-4 */ - arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier); - } - - if(S->bitReverseFlag == 1u) - { - /* Bit Reversal */ - arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); - } - -} - - -/** - * @} end of Radix4_CFFT_CIFFT group - */ - - -/* ---------------------------------------------------------------------- -** Internal helper function used by the FFTs -** ------------------------------------------------------------------- */ - -/* - * @brief Core function for the floating-point CFFT butterfly process. - * @param[in, out] *pSrc points to the in-place buffer of floating-point data type. - * @param[in] fftLen length of the FFT. - * @param[in] *pCoef points to the twiddle coefficient buffer. - * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - */ - -void arm_radix4_butterfly_f32( - float32_t * pSrc, - uint16_t fftLen, - float32_t * pCoef, - uint16_t twidCoefModifier) -{ - - float32_t co1, co2, co3, si1, si2, si3; - uint32_t ia1, ia2, ia3; - uint32_t i0, i1, i2, i3; - uint32_t n1, n2, j, k; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn; - float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc, - Ybminusd; - float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out; - float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out; - float32_t *ptr1; - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2u; - i0 = 0u; - ia1 = 0u; - - j = n2; - - /* Calculation of first stage */ - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - xaIn = pSrc[(2u * i0)]; - yaIn = pSrc[(2u * i0) + 1u]; - - xcIn = pSrc[(2u * i2)]; - ycIn = pSrc[(2u * i2) + 1u]; - - xbIn = pSrc[(2u * i1)]; - ybIn = pSrc[(2u * i1) + 1u]; - - xdIn = pSrc[(2u * i3)]; - ydIn = pSrc[(2u * i3) + 1u]; - - /* xa + xc */ - Xaplusc = xaIn + xcIn; - /* xb + xd */ - Xbplusd = xbIn + xdIn; - /* ya + yc */ - Yaplusc = yaIn + ycIn; - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - co2 = pCoef[ia2 * 2u]; - si2 = pCoef[(ia2 * 2u) + 1u]; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - /* xb - xd */ - Xbminusd = xbIn - xdIn; - /* ya - yc */ - Yaminusc = yaIn - ycIn; - /* yb + yd */ - Ybminusd = ybIn - ydIn; - - /* xa' = xa + xb + xc + xd */ - pSrc[(2u * i0)] = Xaplusc + Xbplusd; - /* ya' = ya + yb + yc + yd */ - pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd; - - /* (xa - xc) + (yb - yd) */ - Xb12C_out = (Xaminusc + Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yb12C_out = (Yaminusc - Xbminusd); - /* (xa + xc) - (xb + xd) */ - Xc12C_out = (Xaplusc - Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = (Yaplusc - Ybplusd); - /* (xa - xc) - (yb - yd) */ - Xd12C_out = (Xaminusc - Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yd12C_out = (Xbminusd + Yaminusc); - - co1 = pCoef[ia1 * 2u]; - si1 = pCoef[(ia1 * 2u) + 1u]; - - /* index calculation for the coefficients */ - ia3 = ia2 + ia1; - co3 = pCoef[ia3 * 2u]; - si3 = pCoef[(ia3 * 2u) + 1u]; - - Xb12_out = Xb12C_out * co1; - Yb12_out = Yb12C_out * co1; - Xc12_out = Xc12C_out * co2; - Yc12_out = Yc12C_out * co2; - Xd12_out = Xd12C_out * co3; - Yd12_out = Yd12C_out * co3; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - Xb12_out += Yb12C_out * si1; - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - Yb12_out -= Xb12C_out * si1; - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - Xc12_out += Yc12C_out * si2; - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - Yc12_out -= Xc12C_out * si2; - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - Xd12_out += Yd12C_out * si3; - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - Yd12_out -= Xd12C_out * si3; - - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2u * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2u * i1) + 1u] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2u * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2u * i2) + 1u] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2u * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2u * i3) + 1u] = Yd12_out; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1u; - - } - while(--j); - - twidCoefModifier <<= 2u; - - /* Calculation of second stage to excluding last stage */ - for (k = fftLen / 4; k > 4u; k >>= 2u) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2u; - ia1 = 0u; - - /* Calculation of first stage */ - for (j = 0u; j <= (n2 - 1u); j++) - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2u]; - si1 = pCoef[(ia1 * 2u) + 1u]; - co2 = pCoef[ia2 * 2u]; - si2 = pCoef[(ia2 * 2u) + 1u]; - co3 = pCoef[ia3 * 2u]; - si3 = pCoef[(ia3 * 2u) + 1u]; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - xaIn = pSrc[(2u * i0)]; - yaIn = pSrc[(2u * i0) + 1u]; - - xbIn = pSrc[(2u * i1)]; - ybIn = pSrc[(2u * i1) + 1u]; - - xcIn = pSrc[(2u * i2)]; - ycIn = pSrc[(2u * i2) + 1u]; - - xdIn = pSrc[(2u * i3)]; - ydIn = pSrc[(2u * i3) + 1u]; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - /* (xb - xd) */ - Xbminusd = xbIn - xdIn; - /* ya - yc */ - Yaminusc = yaIn - ycIn; - /* (yb - yd) */ - Ybminusd = ybIn - ydIn; - - /* xa + xc */ - Xaplusc = xaIn + xcIn; - /* xb + xd */ - Xbplusd = xbIn + xdIn; - /* ya + yc */ - Yaplusc = yaIn + ycIn; - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* (xa - xc) + (yb - yd) */ - Xb12C_out = (Xaminusc + Ybminusd); - /* (ya - yc) - (xb - xd) */ - Yb12C_out = (Yaminusc - Xbminusd); - /* xa + xc -(xb + xd) */ - Xc12C_out = (Xaplusc - Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = (Yaplusc - Ybplusd); - /* (xa - xc) - (yb - yd) */ - Xd12C_out = (Xaminusc - Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yd12C_out = (Xbminusd + Yaminusc); - - pSrc[(2u * i0)] = Xaplusc + Xbplusd; - pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd; - - Xb12_out = Xb12C_out * co1; - Yb12_out = Yb12C_out * co1; - Xc12_out = Xc12C_out * co2; - Yc12_out = Yc12C_out * co2; - Xd12_out = Xd12C_out * co3; - Yd12_out = Yd12C_out * co3; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - Xb12_out += Yb12C_out * si1; - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - Yb12_out -= Xb12C_out * si1; - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - Xc12_out += Yc12C_out * si2; - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - Yc12_out -= Xc12C_out * si2; - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - Xd12_out += Yd12C_out * si3; - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - Yd12_out -= Xd12C_out * si3; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2u * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2u * i1) + 1u] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2u * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2u * i2) + 1u] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2u * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2u * i3) + 1u] = Yd12_out; - - } - } - twidCoefModifier <<= 2u; - } - - j = fftLen >> 2; - ptr1 = &pSrc[0]; - - /* Calculations of last stage */ - do - { - - xaIn = ptr1[0]; - xcIn = ptr1[4]; - yaIn = ptr1[1]; - ycIn = ptr1[5]; - - /* xa + xc */ - Xaplusc = xaIn + xcIn; - - xbIn = ptr1[2]; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - - xdIn = ptr1[6]; - - /* ya + yc */ - Yaplusc = yaIn + ycIn; - - ybIn = ptr1[3]; - - /* ya - yc */ - Yaminusc = yaIn - ycIn; - - ydIn = ptr1[7]; - - /* xb + xd */ - Xbplusd = xbIn + xdIn; - - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* xa' = xa + xb + xc + xd */ - ptr1[0] = (Xaplusc + Xbplusd); - - /* (xb-xd) */ - Xbminusd = xbIn - xdIn; - - /* ya' = ya + yb + yc + yd */ - ptr1[1] = (Yaplusc + Ybplusd); - - /* (yb-yd) */ - Ybminusd = ybIn - ydIn; - - /* xc' = (xa-xb+xc-xd) */ - ptr1[2] = (Xaplusc - Xbplusd); - /* yc' = (ya-yb+yc-yd) */ - ptr1[3] = (Yaplusc - Ybplusd); - /* xb' = (xa+yb-xc-yd) */ - ptr1[4] = (Xaminusc + Ybminusd); - /* yb' = (ya-xb-yc+xd) */ - ptr1[5] = (Yaminusc - Xbminusd); - /* xd' = (xa-yb-xc+yd)) */ - ptr1[6] = (Xaminusc - Ybminusd); - /* yd' = (ya+xb-yc-xd) */ - ptr1[7] = (Xbminusd + Yaminusc); - - /* increment pointer by 8 */ - ptr1 = ptr1 + 8u; - - } while(--j); - -#else - - float32_t t1, t2, r1, r2, s1, s2; - - /* Run the below code for Cortex-M0 */ - - /* Initializations for the fft calculation */ - n2 = fftLen; - n1 = n2; - for (k = fftLen; k > 1u; k >>= 2u) - { - /* Initializations for the fft calculation */ - n1 = n2; - n2 >>= 2u; - ia1 = 0u; - - /* FFT Calculation */ - for (j = 0u; j <= (n2 - 1u); j++) - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2u]; - si1 = pCoef[(ia1 * 2u) + 1u]; - co2 = pCoef[ia2 * 2u]; - si2 = pCoef[(ia2 * 2u) + 1u]; - co3 = pCoef[ia3 * 2u]; - si3 = pCoef[(ia3 * 2u) + 1u]; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* xa + xc */ - r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)]; - - /* xa - xc */ - r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)]; - - /* ya + yc */ - s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u]; - - /* ya - yc */ - s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u]; - - /* xb + xd */ - t1 = pSrc[2u * i1] + pSrc[2u * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2u * i0] = r1 + t1; - - /* xa + xc -(xb + xd) */ - r1 = r1 - t1; - - /* yb + yd */ - t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u]; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2u * i0) + 1u] = s1 + t2; - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* (yb - yd) */ - t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u]; - - /* (xb - xd) */ - t2 = pSrc[2u * i1] - pSrc[2u * i3]; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2u * i1] = (r1 * co2) + (s1 * si2); - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2); - - /* (xa - xc) + (yb - yd) */ - r1 = r2 + t1; - - /* (xa - xc) - (yb - yd) */ - r2 = r2 - t1; - - /* (ya - yc) - (xb - xd) */ - s1 = s2 - t2; - - /* (ya - yc) + (xb - xd) */ - s2 = s2 + t2; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2u * i2] = (r1 * co1) + (s1 * si1); - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1); - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2u * i3] = (r2 * co3) + (s2 * si3); - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3); - } - } - twidCoefModifier <<= 2u; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/* - * @brief Core function for the floating-point CIFFT butterfly process. - * @param[in, out] *pSrc points to the in-place buffer of floating-point data type. - * @param[in] fftLen length of the FFT. - * @param[in] *pCoef points to twiddle coefficient buffer. - * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @param[in] onebyfftLen value of 1/fftLen. - * @return none. - */ - -void arm_radix4_butterfly_inverse_f32( - float32_t * pSrc, - uint16_t fftLen, - float32_t * pCoef, - uint16_t twidCoefModifier, - float32_t onebyfftLen) -{ - float32_t co1, co2, co3, si1, si2, si3; - uint32_t ia1, ia2, ia3; - uint32_t i0, i1, i2, i3; - uint32_t n1, n2, j, k; - -#ifndef ARM_MATH_CM0 - - float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn; - float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc, - Ybminusd; - float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out; - float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out; - float32_t *ptr1; - - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2u; - i0 = 0u; - ia1 = 0u; - - j = n2; - - /* Calculation of first stage */ - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - xaIn = pSrc[(2u * i0)]; - yaIn = pSrc[(2u * i0) + 1u]; - - xcIn = pSrc[(2u * i2)]; - ycIn = pSrc[(2u * i2) + 1u]; - - xbIn = pSrc[(2u * i1)]; - ybIn = pSrc[(2u * i1) + 1u]; - - xdIn = pSrc[(2u * i3)]; - ydIn = pSrc[(2u * i3) + 1u]; - - /* xa + xc */ - Xaplusc = xaIn + xcIn; - /* xb + xd */ - Xbplusd = xbIn + xdIn; - /* ya + yc */ - Yaplusc = yaIn + ycIn; - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - co2 = pCoef[ia2 * 2u]; - si2 = pCoef[(ia2 * 2u) + 1u]; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - /* xb - xd */ - Xbminusd = xbIn - xdIn; - /* ya - yc */ - Yaminusc = yaIn - ycIn; - /* yb - yd */ - Ybminusd = ybIn - ydIn; - - /* xa' = xa + xb + xc + xd */ - pSrc[(2u * i0)] = Xaplusc + Xbplusd; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd; - - /* (xa - xc) - (yb - yd) */ - Xb12C_out = (Xaminusc - Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yb12C_out = (Yaminusc + Xbminusd); - /* (xa + xc) - (xb + xd) */ - Xc12C_out = (Xaplusc - Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = (Yaplusc - Ybplusd); - /* (xa - xc) + (yb - yd) */ - Xd12C_out = (Xaminusc + Ybminusd); - /* (ya - yc) - (xb - xd) */ - Yd12C_out = (Yaminusc - Xbminusd); - - co1 = pCoef[ia1 * 2u]; - si1 = pCoef[(ia1 * 2u) + 1u]; - - /* index calculation for the coefficients */ - ia3 = ia2 + ia1; - co3 = pCoef[ia3 * 2u]; - si3 = pCoef[(ia3 * 2u) + 1u]; - - Xb12_out = Xb12C_out * co1; - Yb12_out = Yb12C_out * co1; - Xc12_out = Xc12C_out * co2; - Yc12_out = Yc12C_out * co2; - Xd12_out = Xd12C_out * co3; - Yd12_out = Yd12C_out * co3; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - Xb12_out -= Yb12C_out * si1; - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - Yb12_out += Xb12C_out * si1; - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - Xc12_out -= Yc12C_out * si2; - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - Yc12_out += Xc12C_out * si2; - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - Xd12_out -= Yd12C_out * si3; - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - Yd12_out += Xd12C_out * si3; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2u * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2u * i1) + 1u] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2u * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2u * i2) + 1u] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2u * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2u * i3) + 1u] = Yd12_out; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1u; - - } while(--j); - - twidCoefModifier <<= 2u; - - /* Calculation of second stage to excluding last stage */ - for (k = fftLen / 4; k > 4u; k >>= 2u) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2u; - ia1 = 0u; - - /* Calculation of first stage */ - for (j = 0u; j <= (n2 - 1u); j++) - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2u]; - si1 = pCoef[(ia1 * 2u) + 1u]; - co2 = pCoef[ia2 * 2u]; - si2 = pCoef[(ia2 * 2u) + 1u]; - co3 = pCoef[ia3 * 2u]; - si3 = pCoef[(ia3 * 2u) + 1u]; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - xaIn = pSrc[(2u * i0)]; - yaIn = pSrc[(2u * i0) + 1u]; - - xbIn = pSrc[(2u * i1)]; - ybIn = pSrc[(2u * i1) + 1u]; - - xcIn = pSrc[(2u * i2)]; - ycIn = pSrc[(2u * i2) + 1u]; - - xdIn = pSrc[(2u * i3)]; - ydIn = pSrc[(2u * i3) + 1u]; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - /* (xb - xd) */ - Xbminusd = xbIn - xdIn; - /* ya - yc */ - Yaminusc = yaIn - ycIn; - /* (yb - yd) */ - Ybminusd = ybIn - ydIn; - - /* xa + xc */ - Xaplusc = xaIn + xcIn; - /* xb + xd */ - Xbplusd = xbIn + xdIn; - /* ya + yc */ - Yaplusc = yaIn + ycIn; - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* (xa - xc) - (yb - yd) */ - Xb12C_out = (Xaminusc - Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yb12C_out = (Yaminusc + Xbminusd); - /* xa + xc -(xb + xd) */ - Xc12C_out = (Xaplusc - Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = (Yaplusc - Ybplusd); - /* (xa - xc) + (yb - yd) */ - Xd12C_out = (Xaminusc + Ybminusd); - /* (ya - yc) - (xb - xd) */ - Yd12C_out = (Yaminusc - Xbminusd); - - pSrc[(2u * i0)] = Xaplusc + Xbplusd; - pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd; - - Xb12_out = Xb12C_out * co1; - Yb12_out = Yb12C_out * co1; - Xc12_out = Xc12C_out * co2; - Yc12_out = Yc12C_out * co2; - Xd12_out = Xd12C_out * co3; - Yd12_out = Yd12C_out * co3; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - Xb12_out -= Yb12C_out * si1; - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - Yb12_out += Xb12C_out * si1; - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - Xc12_out -= Yc12C_out * si2; - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - Yc12_out += Xc12C_out * si2; - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - Xd12_out -= Yd12C_out * si3; - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - Yd12_out += Xd12C_out * si3; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2u * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2u * i1) + 1u] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2u * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2u * i2) + 1u] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2u * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2u * i3) + 1u] = Yd12_out; - - } - } - twidCoefModifier <<= 2u; - } - /* Initializations of last stage */ - - j = fftLen >> 2; - ptr1 = &pSrc[0]; - - /* Calculations of last stage */ - do - { - - xaIn = ptr1[0]; - xcIn = ptr1[4]; - yaIn = ptr1[1]; - ycIn = ptr1[5]; - - /* Butterfly implementation */ - /* xa + xc */ - Xaplusc = xaIn + xcIn; - - xbIn = ptr1[2]; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - - xdIn = ptr1[6]; - - /* ya + yc */ - Yaplusc = yaIn + ycIn; - - ybIn = ptr1[3]; - - /* ya - yc */ - Yaminusc = yaIn - ycIn; - - ydIn = ptr1[7]; - - /* xc + xd */ - Xbplusd = xbIn + xdIn; - - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* xa' = xa + xb + xc + xd */ - ptr1[0] = (Xaplusc + Xbplusd) * onebyfftLen; - - /* (xb-xd) */ - Xbminusd = xbIn - xdIn; - - /* ya' = ya + yb + yc + yd */ - ptr1[1] = (Yaplusc + Ybplusd) * onebyfftLen; - - /* (yb-yd) */ - Ybminusd = ybIn - ydIn; - - /* xc' = (xa-xb+xc-xd) * onebyfftLen */ - ptr1[2] = (Xaplusc - Xbplusd) * onebyfftLen; - - /* yc' = (ya-yb+yc-yd) * onebyfftLen */ - ptr1[3] = (Yaplusc - Ybplusd) * onebyfftLen; - - /* xb' = (xa-yb-xc+yd) * onebyfftLen */ - ptr1[4] = (Xaminusc - Ybminusd) * onebyfftLen; - - /* yb' = (ya+xb-yc-xd) * onebyfftLen */ - ptr1[5] = (Yaminusc + Xbminusd) * onebyfftLen; - - /* xd' = (xa-yb-xc+yd) * onebyfftLen */ - ptr1[6] = (Xaminusc + Ybminusd) * onebyfftLen; - - /* yd' = (ya-xb-yc+xd) * onebyfftLen */ - ptr1[7] = (Yaminusc - Xbminusd) * onebyfftLen; - - /* increment source pointer by 8 for next calculations */ - ptr1 = ptr1 + 8u; - - } while(--j); - -#else - - float32_t t1, t2, r1, r2, s1, s2; - - /* Run the below code for Cortex-M0 */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* Calculation of first stage */ - for (k = fftLen; k > 4u; k >>= 2u) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2u; - ia1 = 0u; - - /* Calculation of first stage */ - for (j = 0u; j <= (n2 - 1u); j++) - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2u]; - si1 = pCoef[(ia1 * 2u) + 1u]; - co2 = pCoef[ia2 * 2u]; - si2 = pCoef[(ia2 * 2u) + 1u]; - co3 = pCoef[ia3 * 2u]; - si3 = pCoef[(ia3 * 2u) + 1u]; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* xa + xc */ - r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)]; - - /* xa - xc */ - r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)]; - - /* ya + yc */ - s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u]; - - /* ya - yc */ - s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u]; - - /* xb + xd */ - t1 = pSrc[2u * i1] + pSrc[2u * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2u * i0] = r1 + t1; - - /* xa + xc -(xb + xd) */ - r1 = r1 - t1; - - /* yb + yd */ - t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u]; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2u * i0) + 1u] = s1 + t2; - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* (yb - yd) */ - t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u]; - - /* (xb - xd) */ - t2 = pSrc[2u * i1] - pSrc[2u * i3]; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2u * i1] = (r1 * co2) - (s1 * si2); - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2); - - /* (xa - xc) - (yb - yd) */ - r1 = r2 - t1; - - /* (xa - xc) + (yb - yd) */ - r2 = r2 + t1; - - /* (ya - yc) + (xb - xd) */ - s1 = s2 + t2; - - /* (ya - yc) - (xb - xd) */ - s2 = s2 - t2; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2u * i2] = (r1 * co1) - (s1 * si1); - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1); - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2u * i3] = (r2 * co3) - (s2 * si3); - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3); - } - } - twidCoefModifier <<= 2u; - } - /* Initializations of last stage */ - n1 = n2; - n2 >>= 2u; - - /* Calculations of last stage */ - for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - /* xa + xc */ - r1 = pSrc[2u * i0] + pSrc[2u * i2]; - - /* xa - xc */ - r2 = pSrc[2u * i0] - pSrc[2u * i2]; - - /* ya + yc */ - s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u]; - - /* ya - yc */ - s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u]; - - /* xc + xd */ - t1 = pSrc[2u * i1] + pSrc[2u * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2u * i0] = (r1 + t1) * onebyfftLen; - - /* (xa + xb) - (xc + xd) */ - r1 = r1 - t1; - - /* yb + yd */ - t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u]; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2u * i0) + 1u] = (s1 + t2) * onebyfftLen; - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* (yb-yd) */ - t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u]; - - /* (xb-xd) */ - t2 = pSrc[2u * i1] - pSrc[2u * i3]; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2u * i1] = r1 * onebyfftLen; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2u * i1) + 1u] = s1 * onebyfftLen; - - - /* (xa - xc) - (yb-yd) */ - r1 = r2 - t1; - - /* (xa - xc) + (yb-yd) */ - r2 = r2 + t1; - - /* (ya - yc) + (xb-xd) */ - s1 = s2 + t2; - - /* (ya - yc) - (xb-xd) */ - s2 = s2 - t2; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2u * i2] = r1 * onebyfftLen; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2u * i2) + 1u] = s1 * onebyfftLen; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2u * i3] = r2 * onebyfftLen; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2u * i3) + 1u] = s2 * onebyfftLen; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c deleted file mode 100644 index 11cf66ff8b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c +++ /dev/null @@ -1,161 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix4_init_f32.c -* -* Description: Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup Radix4_CFFT_CIFFT - * @{ - */ - -/** -* @brief Initialization function for the floating-point CFFT/CIFFT. -* @param[in,out] *S points to an instance of the floating-point CFFT/CIFFT structure. -* @param[in] fftLen length of the FFT. -* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. -* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. -* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value. -* -* \par Description: -* \par -* The parameter ifftFlag controls whether a forward or inverse transform is computed. -* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated -* \par -* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. -* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. -* \par -* The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. -* \par -* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. -*/ - -arm_status arm_cfft_radix4_init_f32( - arm_cfft_radix4_instance_f32 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (float32_t *) twiddleCoef; - - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLen) - { - - case 4096u: - /* Initializations of structure parameters for 4096 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.000244140625; - break; - - case 1024u: - /* Initializations of structure parameters for 1024 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 4u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 4u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.0009765625f; - break; - - - case 256u: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16u; - S->bitRevFactor = 16u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - S->onebyfftLen = 0.00390625f; - break; - - case 64u: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64u; - S->bitRevFactor = 64u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - S->onebyfftLen = 0.015625f; - break; - - case 16u: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256u; - S->bitRevFactor = 256u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - S->onebyfftLen = 0.0625f; - break; - - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - return (status); -} - -/** - * @} end of Radix4_CFFT_CIFFT group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c deleted file mode 100644 index dd637a3612..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c +++ /dev/null @@ -1,149 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix4_init_q15.c -* -* Description: Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @ingroup groupTransforms - */ - - -/** - * @addtogroup Radix4_CFFT_CIFFT - * @{ - */ - - -/** -* @brief Initialization function for the Q15 CFFT/CIFFT. -* @param[in,out] *S points to an instance of the Q15 CFFT/CIFFT structure. -* @param[in] fftLen length of the FFT. -* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. -* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. -* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value. -* -* \par Description: -* \par -* The parameter ifftFlag controls whether a forward or inverse transform is computed. -* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated -* \par -* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. -* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. -* \par -* The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. -* \par -* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. -*/ - -arm_status arm_cfft_radix4_init_q15( - arm_cfft_radix4_instance_q15 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - /* Initialise the FFT length */ - S->fftLen = fftLen; - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (q15_t *) twiddleCoefQ15; - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLen) - { - case 4096u: - /* Initializations of structure parameters for 4096 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - - break; - - case 1024u: - /* Initializations of structure parameters for 1024 point FFT */ - S->twidCoefModifier = 4u; - S->bitRevFactor = 4u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - - break; - - case 256u: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16u; - S->bitRevFactor = 16u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - - break; - - case 64u: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64u; - S->bitRevFactor = 64u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - - break; - - case 16u: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256u; - S->bitRevFactor = 256u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - - break; - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - return (status); -} - -/** - * @} end of Radix4_CFFT_CIFFT group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c deleted file mode 100644 index 66f06e6342..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c +++ /dev/null @@ -1,145 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix4_init_q31.c -* -* Description: Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup Radix4_CFFT_CIFFT - * @{ - */ - -/** -* -* @brief Initialization function for the Q31 CFFT/CIFFT. -* @param[in,out] *S points to an instance of the Q31 CFFT/CIFFT structure. -* @param[in] fftLen length of the FFT. -* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. -* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. -* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value. -* -* \par Description: -* \par -* The parameter ifftFlag controls whether a forward or inverse transform is computed. -* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated -* \par -* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. -* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. -* \par -* The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. -* \par -* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. -*/ - -arm_status arm_cfft_radix4_init_q31( - arm_cfft_radix4_instance_q31 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - /* Initialise the FFT length */ - S->fftLen = fftLen; - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (q31_t *) twiddleCoefQ31; - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) - { - /* Initializations of structure parameters for 4096 point FFT */ - case 4096u: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - break; - - /* Initializations of structure parameters for 1024 point FFT */ - case 1024u: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 4u; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 4u; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - break; - - case 256u: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16u; - S->bitRevFactor = 16u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - break; - - case 64u: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64u; - S->bitRevFactor = 64u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - break; - - case 16u: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256u; - S->bitRevFactor = 256u; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - break; - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - return (status); -} - -/** - * @} end of Radix4_CFFT_CIFFT group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c deleted file mode 100644 index 023e2f7abc..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c +++ /dev/null @@ -1,1896 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix4_q15.c -* -* Description: This file has function definition of Radix-4 FFT & IFFT function and -* In-place bit reversal using bit reversal table -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup Radix4_CFFT_CIFFT - * @{ - */ - - -/** - * @details - * @brief Processing function for the Q15 CFFT/CIFFT. - * @param[in] *S points to an instance of the Q15 CFFT/CIFFT structure. - * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place. - * @return none. - * - * \par Input and output formats: - * \par - * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. - * Hence the output format is different for different FFT sizes. - * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT: - * \par - * \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT" - * \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT" - */ - -void arm_cfft_radix4_q15( - const arm_cfft_radix4_instance_q15 * S, - q15_t * pSrc) -{ - if(S->ifftFlag == 1u) - { - /* Complex IFFT radix-4 */ - arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier); - } - else - { - /* Complex FFT radix-4 */ - arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier); - } - - if(S->bitReverseFlag == 1u) - { - /* Bit Reversal */ - arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); - } - -} - -/** - * @} end of Radix4_CFFT_CIFFT group - */ - -/* -* Radix-4 FFT algorithm used is : -* -* Input real and imaginary data: -* x(n) = xa + j * ya -* x(n+N/4 ) = xb + j * yb -* x(n+N/2 ) = xc + j * yc -* x(n+3N 4) = xd + j * yd -* -* -* Output real and imaginary data: -* x(4r) = xa'+ j * ya' -* x(4r+1) = xb'+ j * yb' -* x(4r+2) = xc'+ j * yc' -* x(4r+3) = xd'+ j * yd' -* -* -* Twiddle factors for radix-4 FFT: -* Wn = co1 + j * (- si1) -* W2n = co2 + j * (- si2) -* W3n = co3 + j * (- si3) - -* The real and imaginary output values for the radix-4 butterfly are -* xa' = xa + xb + xc + xd -* ya' = ya + yb + yc + yd -* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) -* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) -* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) -* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) -* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) -* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) -* -*/ - -/** - * @brief Core function for the Q15 CFFT butterfly process. - * @param[in, out] *pSrc16 points to the in-place buffer of Q15 data type. - * @param[in] fftLen length of the FFT. - * @param[in] *pCoef16 points to twiddle coefficient buffer. - * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - */ - -void arm_radix4_butterfly_q15( - q15_t * pSrc16, - uint32_t fftLen, - q15_t * pCoef16, - uint32_t twidCoefModifier) -{ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t R, S, T, U; - q31_t C1, C2, C3, out1, out2; - uint32_t n1, n2, ic, i0, i1, i2, i3, j, k; - q15_t in; - - q15_t *ptr1; - - - - q31_t xaya, xbyb, xcyc, xdyd; - - /* Total process is divided into three stages */ - - /* process first stage, middle stages, & last stage */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2u; - - /* Index for twiddle coefficient */ - ic = 0u; - - /* Index for input read and output write */ - i0 = 0u; - j = n2; - - /* Input is in 1.15(q15) format */ - - /* start of first stage process */ - do - { - /* Butterfly implementation */ - - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i0)); - in = ((int16_t) (T & 0xFFFF)) >> 2; - T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* Read yc (real), xc(imag) input */ - S = _SIMD32_OFFSET(pSrc16 + (2u * i2)); - in = ((int16_t) (S & 0xFFFF)) >> 2; - S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* R = packed((ya + yc), (xa + xc) ) */ - R = __QADD16(T, S); - - /* S = packed((ya - yc), (xa - xc) ) */ - S = __QSUB16(T, S); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i1)); - in = ((int16_t) (T & 0xFFFF)) >> 2; - T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* Read yd (real), xd(imag) input */ - U = _SIMD32_OFFSET(pSrc16 + (2u * i3)); - in = ((int16_t) (U & 0xFFFF)) >> 2; - U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* T = packed((yb + yd), (xb + xd) ) */ - T = __QADD16(T, U); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - _SIMD32_OFFSET(pSrc16 + (2u * i0)) = __SHADD16(R, T); - - /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */ - R = __QSUB16(R, T); - - /* co2 & si2 are read from SIMD Coefficient pointer */ - C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic)); - -#ifndef ARM_MATH_BIG_ENDIAN - - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - out1 = __SMUAD(C2, R) >> 16u; - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = __SMUSDX(C2, R); - -#else - - /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out1 = __SMUSDX(R, C2) >> 16u; - /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - out2 = __SMUAD(C2, R); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Reading i0+fftLen/4 */ - /* T = packed(yb, xb) */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i1)); - in = ((int16_t) (T & 0xFFFF)) >> 2; - T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* writing output(xc', yc') in little endian format */ - _SIMD32_OFFSET(pSrc16 + (2u * i1)) = - (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - /* Butterfly calculations */ - /* U = packed(yd, xd) */ - U = _SIMD32_OFFSET(pSrc16 + (2u * i3)); - in = ((int16_t) (U & 0xFFFF)) >> 2; - U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* T = packed(yb-yd, xb-xd) */ - T = __QSUB16(T, U); - -#ifndef ARM_MATH_BIG_ENDIAN - - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __QASX(S, T); - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __QSAX(S, T); - -#else - - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __QSAX(S, T); - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __QASX(S, T); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* co1 & si1 are read from SIMD Coefficient pointer */ - C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic)); - /* Butterfly process for the i0+fftLen/2 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - out1 = __SMUAD(C1, S) >> 16u; - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - out2 = __SMUSDX(C1, S); - -#else - - /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - out1 = __SMUSDX(S, C1) >> 16u; - /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - out2 = __SMUAD(C1, S); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* writing output(xb', yb') in little endian format */ - _SIMD32_OFFSET(pSrc16 + (2u * i2)) = - ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF); - - - /* co3 & si3 are read from SIMD Coefficient pointer */ - C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic)); - /* Butterfly process for the i0+3fftLen/4 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - - /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - out1 = __SMUAD(C3, R) >> 16u; - /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - out2 = __SMUSDX(C3, R); - -#else - - /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - out1 = __SMUSDX(R, C3) >> 16u; - /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - out2 = __SMUAD(C3, R); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* writing output(xd', yd') in little endian format */ - _SIMD32_OFFSET(pSrc16 + (2u * i3)) = - ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1u; - - } while(--j); - /* data is in 4.11(q11) format */ - - /* end of first stage process */ - - - /* start of middle stage process */ - - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2u; - - /* Calculation of Middle stage */ - for (k = fftLen / 4u; k > 4u; k >>= 2u) - { - /* Initializations for the middle stage */ - n1 = n2; - n2 >>= 2u; - ic = 0u; - - for (j = 0u; j <= (n2 - 1u); j++) - { - /* index calculation for the coefficients */ - C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic)); - C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic)); - C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic)); - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Butterfly implementation */ - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i0)); - - /* Read yc (real), xc(imag) input */ - S = _SIMD32_OFFSET(pSrc16 + (2u * i2)); - - /* R = packed( (ya + yc), (xa + xc)) */ - R = __QADD16(T, S); - - /* S = packed((ya - yc), (xa - xc)) */ - S = __QSUB16(T, S); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i1)); - - /* Read yd (real), xd(imag) input */ - U = _SIMD32_OFFSET(pSrc16 + (2u * i3)); - - /* T = packed( (yb + yd), (xb + xd)) */ - T = __QADD16(T, U); - - /* writing the butterfly processed i0 sample */ - - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - out1 = __SHADD16(R, T); - in = ((int16_t) (out1 & 0xFFFF)) >> 1; - out1 = ((out1 >> 1) & 0xFFFF0000) | (in & 0xFFFF); - _SIMD32_OFFSET(pSrc16 + (2u * i0)) = out1; - - /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */ - R = __SHSUB16(R, T); - -#ifndef ARM_MATH_BIG_ENDIAN - - /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ - out1 = __SMUAD(C2, R) >> 16u; - - /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = __SMUSDX(C2, R); - -#else - - /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out1 = __SMUSDX(R, C2) >> 16u; - - /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ - out2 = __SMUAD(C2, R); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Reading i0+3fftLen/4 */ - /* Read yb (real), xb(imag) input */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i1)); - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - _SIMD32_OFFSET(pSrc16 + (2u * i1)) = - ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - /* Butterfly calculations */ - - /* Read yd (real), xd(imag) input */ - U = _SIMD32_OFFSET(pSrc16 + (2u * i3)); - - /* T = packed(yb-yd, xb-xd) */ - T = __QSUB16(T, U); - -#ifndef ARM_MATH_BIG_ENDIAN - - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __SHASX(S, T); - - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __SHSAX(S, T); - - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = __SMUAD(C1, S) >> 16u; - out2 = __SMUSDX(C1, S); - -#else - - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __SHSAX(S, T); - - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __SHASX(S, T); - - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = __SMUSDX(S, C1) >> 16u; - out2 = __SMUAD(C1, S); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - _SIMD32_OFFSET(pSrc16 + (2u * i2)) = - ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - /* Butterfly process for the i0+3fftLen/4 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __SMUAD(C3, R) >> 16u; - out2 = __SMUSDX(C3, R); - -#else - - out1 = __SMUSDX(R, C3) >> 16u; - out2 = __SMUAD(C3, R); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - _SIMD32_OFFSET(pSrc16 + (2u * i3)) = - ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - } - } - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2u; - } - /* end of middle stage process */ - - - /* data is in 10.6(q6) format for the 1024 point */ - /* data is in 8.8(q8) format for the 256 point */ - /* data is in 6.10(q10) format for the 64 point */ - /* data is in 4.12(q12) format for the 16 point */ - - /* Initializations for the last stage */ - j = fftLen >> 2; - - ptr1 = &pSrc16[0]; - - /* start of last stage process */ - - /* Butterfly implementation */ - do - { - /* Read xa (real), ya(imag) input */ - xaya = *__SIMD32(ptr1)++; - - /* Read xb (real), yb(imag) input */ - xbyb = *__SIMD32(ptr1)++; - - /* Read xc (real), yc(imag) input */ - xcyc = *__SIMD32(ptr1)++; - - /* Read xd (real), yd(imag) input */ - xdyd = *__SIMD32(ptr1)++; - - /* R = packed((ya + yc), (xa + xc)) */ - R = __QADD16(xaya, xcyc); - - /* T = packed((yb + yd), (xb + xd)) */ - T = __QADD16(xbyb, xdyd); - - /* pointer updation for writing */ - ptr1 = ptr1 - 8u; - - - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - *__SIMD32(ptr1)++ = __SHADD16(R, T); - - /* T = packed((yb + yd), (xb + xd)) */ - T = __QADD16(xbyb, xdyd); - - /* xc' = (xa-xb+xc-xd) */ - /* yc' = (ya-yb+yc-yd) */ - *__SIMD32(ptr1)++ = __SHSUB16(R, T); - - /* S = packed((ya - yc), (xa - xc)) */ - S = __QSUB16(xaya, xcyc); - - /* Read yd (real), xd(imag) input */ - /* T = packed( (yb - yd), (xb - xd)) */ - U = __QSUB16(xbyb, xdyd); - -#ifndef ARM_MATH_BIG_ENDIAN - - /* xb' = (xa+yb-xc-yd) */ - /* yb' = (ya-xb-yc+xd) */ - *__SIMD32(ptr1)++ = __SHSAX(S, U); - - - /* xd' = (xa-yb-xc+yd) */ - /* yd' = (ya+xb-yc-xd) */ - *__SIMD32(ptr1)++ = __SHASX(S, U); - -#else - - /* xb' = (xa+yb-xc-yd) */ - /* yb' = (ya-xb-yc+xd) */ - *__SIMD32(ptr1)++ = __SHASX(S, U); - - - /* xd' = (xa-yb-xc+yd) */ - /* yd' = (ya+xb-yc-xd) */ - *__SIMD32(ptr1)++ = __SHSAX(S, U); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - } while(--j); - - /* end of last stage process */ - - /* output is in 11.5(q5) format for the 1024 point */ - /* output is in 9.7(q7) format for the 256 point */ - /* output is in 7.9(q9) format for the 64 point */ - /* output is in 5.11(q11) format for the 16 point */ - - -#else - - /* Run the below code for Cortex-M0 */ - - q15_t R0, R1, S0, S1, T0, T1, U0, U1; - q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2; - uint32_t n1, n2, ic, i0, i1, i2, i3, j, k; - - /* Total process is divided into three stages */ - - /* process first stage, middle stages, & last stage */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2u; - - /* Index for twiddle coefficient */ - ic = 0u; - - /* Index for input read and output write */ - i0 = 0u; - j = n2; - - /* Input is in 1.15(q15) format */ - - /* start of first stage process */ - do - { - /* Butterfly implementation */ - - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - - /* input is down scale by 4 to avoid overflow */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2u] >> 2u; - T1 = pSrc16[(i0 * 2u) + 1u] >> 2u; - - /* input is down scale by 4 to avoid overflow */ - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2u] >> 2u; - S1 = pSrc16[(i2 * 2u) + 1u] >> 2u; - - /* R0 = (ya + yc) */ - R0 = __SSAT(T0 + S0, 16u); - /* R1 = (xa + xc) */ - R1 = __SSAT(T1 + S1, 16u); - - /* S0 = (ya - yc) */ - S0 = __SSAT(T0 - S0, 16); - /* S1 = (xa - xc) */ - S1 = __SSAT(T1 - S1, 16); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* input is down scale by 4 to avoid overflow */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2u] >> 2u; - T1 = pSrc16[(i1 * 2u) + 1u] >> 2u; - - /* input is down scale by 4 to avoid overflow */ - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2u] >> 2u; - U1 = pSrc16[(i3 * 2u) + 1] >> 2u; - - /* T0 = (yb + yd) */ - T0 = __SSAT(T0 + U0, 16u); - /* T1 = (xb + xd) */ - T1 = __SSAT(T1 + U1, 16u); - - /* writing the butterfly processed i0 sample */ - /* ya' = ya + yb + yc + yd */ - /* xa' = xa + xb + xc + xd */ - pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u); - pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u); - - /* R0 = (ya + yc) - (yb + yd) */ - /* R1 = (xa + xc) - (xb + xd) */ - R0 = __SSAT(R0 - T0, 16u); - R1 = __SSAT(R1 - T1, 16u); - - /* co2 & si2 are read from Coefficient pointer */ - Co2 = pCoef16[2u * ic * 2u]; - Si2 = pCoef16[(2u * ic * 2u) + 1]; - - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - out1 = (short) ((Co2 * R0 + Si2 * R1) >> 16u); - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = (short) ((-Si2 * R0 + Co2 * R1) >> 16u); - - /* Reading i0+fftLen/4 */ - /* input is down scale by 4 to avoid overflow */ - /* T0 = yb, T1 = xb */ - T0 = pSrc16[i1 * 2u] >> 2; - T1 = pSrc16[(i1 * 2u) + 1] >> 2; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* writing output(xc', yc') in little endian format */ - pSrc16[i1 * 2u] = out1; - pSrc16[(i1 * 2u) + 1] = out2; - - /* Butterfly calculations */ - /* input is down scale by 4 to avoid overflow */ - /* U0 = yd, U1 = xd */ - U0 = pSrc16[i3 * 2u] >> 2; - U1 = pSrc16[(i3 * 2u) + 1] >> 2; - /* T0 = yb-yd */ - T0 = __SSAT(T0 - U0, 16); - /* T1 = xb-xd */ - T1 = __SSAT(T1 - U1, 16); - - /* R1 = (ya-yc) + (xb- xd), R0 = (xa-xc) - (yb-yd)) */ - R0 = (short) __SSAT((q31_t) (S0 - T1), 16); - R1 = (short) __SSAT((q31_t) (S1 + T0), 16); - - /* S1 = (ya-yc) - (xb- xd), S0 = (xa-xc) + (yb-yd)) */ - S0 = (short) __SSAT(((q31_t) S0 + T1), 16u); - S1 = (short) __SSAT(((q31_t) S1 - T0), 16u); - - /* co1 & si1 are read from Coefficient pointer */ - Co1 = pCoef16[ic * 2u]; - Si1 = pCoef16[(ic * 2u) + 1]; - /* Butterfly process for the i0+fftLen/2 sample */ - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - out1 = (short) ((Si1 * S1 + Co1 * S0) >> 16); - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - out2 = (short) ((-Si1 * S0 + Co1 * S1) >> 16); - - /* writing output(xb', yb') in little endian format */ - pSrc16[i2 * 2u] = out1; - pSrc16[(i2 * 2u) + 1] = out2; - - /* Co3 & si3 are read from Coefficient pointer */ - Co3 = pCoef16[3u * (ic * 2u)]; - Si3 = pCoef16[(3u * (ic * 2u)) + 1]; - /* Butterfly process for the i0+3fftLen/4 sample */ - /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */ - out1 = (short) ((Si3 * R1 + Co3 * R0) >> 16u); - /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */ - out2 = (short) ((-Si3 * R0 + Co3 * R1) >> 16u); - /* writing output(xd', yd') in little endian format */ - pSrc16[i3 * 2u] = out1; - pSrc16[(i3 * 2u) + 1] = out2; - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1u; - - } while(--j); - /* data is in 4.11(q11) format */ - - /* end of first stage process */ - - - /* start of middle stage process */ - - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2u; - - /* Calculation of Middle stage */ - for (k = fftLen / 4u; k > 4u; k >>= 2u) - { - /* Initializations for the middle stage */ - n1 = n2; - n2 >>= 2u; - ic = 0u; - - for (j = 0u; j <= (n2 - 1u); j++) - { - /* index calculation for the coefficients */ - Co1 = pCoef16[ic * 2u]; - Si1 = pCoef16[(ic * 2u) + 1u]; - Co2 = pCoef16[2u * (ic * 2u)]; - Si2 = pCoef16[(2u * (ic * 2u)) + 1u]; - Co3 = pCoef16[3u * (ic * 2u)]; - Si3 = pCoef16[(3u * (ic * 2u)) + 1u]; - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Butterfly implementation */ - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2u]; - T1 = pSrc16[(i0 * 2u) + 1u]; - - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2u]; - S1 = pSrc16[(i2 * 2u) + 1u]; - - /* R0 = (ya + yc), R1 = (xa + xc) */ - R0 = __SSAT(T0 + S0, 16); - R1 = __SSAT(T1 + S1, 16); - - /* S0 = (ya - yc), S1 =(xa - xc) */ - S0 = __SSAT(T0 - S0, 16); - S1 = __SSAT(T1 - S1, 16); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2u]; - T1 = pSrc16[(i1 * 2u) + 1u]; - - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2u]; - U1 = pSrc16[(i3 * 2u) + 1u]; - - - /* T0 = (yb + yd), T1 = (xb + xd) */ - T0 = __SSAT(T0 + U0, 16); - T1 = __SSAT(T1 + U1, 16); - - /* writing the butterfly processed i0 sample */ - - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - out1 = ((R0 >> 1u) + (T0 >> 1u)) >> 1u; - out2 = ((R1 >> 1u) + (T1 >> 1u)) >> 1u; - - pSrc16[i0 * 2u] = out1; - pSrc16[(2u * i0) + 1u] = out2; - - /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ - R0 = (R0 >> 1u) - (T0 >> 1u); - R1 = (R1 >> 1u) - (T1 >> 1u); - - /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ - out1 = (short) ((Co2 * R0 + Si2 * R1) >> 16u); - - /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = (short) ((-Si2 * R0 + Co2 * R1) >> 16u); - - /* Reading i0+3fftLen/4 */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2u]; - T1 = pSrc16[(i1 * 2u) + 1u]; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - pSrc16[i1 * 2u] = out1; - pSrc16[(i1 * 2u) + 1u] = out2; - - /* Butterfly calculations */ - - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2u]; - U1 = pSrc16[(i3 * 2u) + 1u]; - - /* T0 = yb-yd, T1 = xb-xd */ - T0 = __SSAT(T0 - U0, 16); - T1 = __SSAT(T1 - U1, 16); - - /* R0 = (ya-yc) + (xb- xd), R1 = (xa-xc) - (yb-yd)) */ - R0 = (S0 >> 1u) - (T1 >> 1u); - R1 = (S1 >> 1u) + (T0 >> 1u); - - /* S0 = (ya-yc) - (xb- xd), S1 = (xa-xc) + (yb-yd)) */ - S0 = (S0 >> 1u) + (T1 >> 1u); - S1 = (S1 >> 1u) - (T0 >> 1u); - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = (short) ((Co1 * S0 + Si1 * S1) >> 16u); - - out2 = (short) ((-Si1 * S0 + Co1 * S1) >> 16u); - - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - pSrc16[i2 * 2u] = out1; - pSrc16[(i2 * 2u) + 1u] = out2; - - /* Butterfly process for the i0+3fftLen/4 sample */ - out1 = (short) ((Si3 * R1 + Co3 * R0) >> 16u); - - out2 = (short) ((-Si3 * R0 + Co3 * R1) >> 16u); - /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */ - /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */ - pSrc16[i3 * 2u] = out1; - pSrc16[(i3 * 2u) + 1u] = out2; - } - } - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2u; - } - /* end of middle stage process */ - - - /* data is in 10.6(q6) format for the 1024 point */ - /* data is in 8.8(q8) format for the 256 point */ - /* data is in 6.10(q10) format for the 64 point */ - /* data is in 4.12(q12) format for the 16 point */ - - /* Initializations for the last stage */ - n1 = n2; - n2 >>= 2u; - - /* start of last stage process */ - - /* Butterfly implementation */ - for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2u]; - T1 = pSrc16[(i0 * 2u) + 1u]; - - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2u]; - S1 = pSrc16[(i2 * 2u) + 1u]; - - /* R0 = (ya + yc), R1 = (xa + xc) */ - R0 = __SSAT(T0 + S0, 16u); - R1 = __SSAT(T1 + S1, 16u); - - /* S0 = (ya - yc), S1 = (xa - xc) */ - S0 = __SSAT(T0 - S0, 16u); - S1 = __SSAT(T1 - S1, 16u); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2u]; - T1 = pSrc16[(i1 * 2u) + 1u]; - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2u]; - U1 = pSrc16[(i3 * 2u) + 1u]; - - /* T0 = (yb + yd), T1 = (xb + xd)) */ - T0 = __SSAT(T0 + U0, 16u); - T1 = __SSAT(T1 + U1, 16u); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u); - pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u); - - /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ - R0 = (R0 >> 1u) - (T0 >> 1u); - R1 = (R1 >> 1u) - (T1 >> 1u); - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2u]; - T1 = pSrc16[(i1 * 2u) + 1u]; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd) */ - /* yc' = (ya-yb+yc-yd) */ - pSrc16[i1 * 2u] = R0; - pSrc16[(i1 * 2u) + 1u] = R1; - - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2u]; - U1 = pSrc16[(i3 * 2u) + 1u]; - /* T0 = (yb - yd), T1 = (xb - xd) */ - T0 = __SSAT(T0 - U0, 16u); - T1 = __SSAT(T1 - U1, 16u); - - /* writing the butterfly processed i0 + fftLen/2 sample */ - /* xb' = (xa+yb-xc-yd) */ - /* yb' = (ya-xb-yc+xd) */ - pSrc16[i2 * 2u] = (S0 >> 1u) + (T1 >> 1u); - pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u); - - /* writing the butterfly processed i0 + 3fftLen/4 sample */ - /* xd' = (xa-yb-xc+yd) */ - /* yd' = (ya+xb-yc-xd) */ - pSrc16[i3 * 2u] = (S0 >> 1u) - (T1 >> 1u); - pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u); - - } - - /* end of last stage process */ - - /* output is in 11.5(q5) format for the 1024 point */ - /* output is in 9.7(q7) format for the 256 point */ - /* output is in 7.9(q9) format for the 64 point */ - /* output is in 5.11(q11) format for the 16 point */ - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - - -/** - * @brief Core function for the Q15 CIFFT butterfly process. - * @param[in, out] *pSrc16 points to the in-place buffer of Q15 data type. - * @param[in] fftLen length of the FFT. - * @param[in] *pCoef16 points to twiddle coefficient buffer. - * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - */ - -/* -* Radix-4 IFFT algorithm used is : -* -* CIFFT uses same twiddle coefficients as CFFT function -* x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4] -* -* -* IFFT is implemented with following changes in equations from FFT -* -* Input real and imaginary data: -* x(n) = xa + j * ya -* x(n+N/4 ) = xb + j * yb -* x(n+N/2 ) = xc + j * yc -* x(n+3N 4) = xd + j * yd -* -* -* Output real and imaginary data: -* x(4r) = xa'+ j * ya' -* x(4r+1) = xb'+ j * yb' -* x(4r+2) = xc'+ j * yc' -* x(4r+3) = xd'+ j * yd' -* -* -* Twiddle factors for radix-4 IFFT: -* Wn = co1 + j * (si1) -* W2n = co2 + j * (si2) -* W3n = co3 + j * (si3) - -* The real and imaginary output values for the radix-4 butterfly are -* xa' = xa + xb + xc + xd -* ya' = ya + yb + yc + yd -* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) -* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) -* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) -* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) -* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) -* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) -* -*/ - -void arm_radix4_butterfly_inverse_q15( - q15_t * pSrc16, - uint32_t fftLen, - q15_t * pCoef16, - uint32_t twidCoefModifier) -{ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t R, S, T, U; - q31_t C1, C2, C3, out1, out2; - uint32_t n1, n2, ic, i0, i1, i2, i3, j, k; - q15_t in; - - q15_t *ptr1; - - - - q31_t xaya, xbyb, xcyc, xdyd; - - /* Total process is divided into three stages */ - - /* process first stage, middle stages, & last stage */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2u; - - /* Index for twiddle coefficient */ - ic = 0u; - - /* Index for input read and output write */ - i0 = 0u; - j = n2; - - /* Input is in 1.15(q15) format */ - - /* start of first stage process */ - do - { - /* Butterfly implementation */ - - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i0)); - in = ((int16_t) (T & 0xFFFF)) >> 2; - T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* Read yc (real), xc(imag) input */ - S = _SIMD32_OFFSET(pSrc16 + (2u * i2)); - in = ((int16_t) (S & 0xFFFF)) >> 2; - S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* R = packed((ya + yc), (xa + xc) ) */ - R = __QADD16(T, S); - - /* S = packed((ya - yc), (xa - xc) ) */ - S = __QSUB16(T, S); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i1)); - in = ((int16_t) (T & 0xFFFF)) >> 2; - T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* Read yd (real), xd(imag) input */ - U = _SIMD32_OFFSET(pSrc16 + (2u * i3)); - in = ((int16_t) (U & 0xFFFF)) >> 2; - U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* T = packed((yb + yd), (xb + xd) ) */ - T = __QADD16(T, U); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - _SIMD32_OFFSET(pSrc16 + (2u * i0)) = __SHADD16(R, T); - - /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */ - R = __QSUB16(R, T); - - /* co2 & si2 are read from SIMD Coefficient pointer */ - C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic)); - -#ifndef ARM_MATH_BIG_ENDIAN - - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - out1 = __SMUSD(C2, R) >> 16u; - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = __SMUADX(C2, R); - -#else - - /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out1 = __SMUADX(C2, R) >> 16u; - /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - out2 = __SMUSD(__QSUB16(0, C2), R); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Reading i0+fftLen/4 */ - /* T = packed(yb, xb) */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i1)); - in = ((int16_t) (T & 0xFFFF)) >> 2; - T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* writing output(xc', yc') in little endian format */ - _SIMD32_OFFSET(pSrc16 + (2u * i1)) = - (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - /* Butterfly calculations */ - /* U = packed(yd, xd) */ - U = _SIMD32_OFFSET(pSrc16 + (2u * i3)); - in = ((int16_t) (U & 0xFFFF)) >> 2; - U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF); - - /* T = packed(yb-yd, xb-xd) */ - T = __QSUB16(T, U); - -#ifndef ARM_MATH_BIG_ENDIAN - - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __QSAX(S, T); - /* S = packed((ya-yc) + (xb- xd), (xa-xc) - (yb-yd)) */ - S = __QASX(S, T); - -#else - - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __QASX(S, T); - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __QSAX(S, T); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* co1 & si1 are read from SIMD Coefficient pointer */ - C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic)); - /* Butterfly process for the i0+fftLen/2 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - out1 = __SMUSD(C1, S) >> 16u; - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - out2 = __SMUADX(C1, S); - -#else - - /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - out1 = __SMUADX(C1, S) >> 16u; - /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - out2 = __SMUSD(__QSUB16(0, C1), S); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* writing output(xb', yb') in little endian format */ - _SIMD32_OFFSET(pSrc16 + (2u * i2)) = - ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF); - - - /* co3 & si3 are read from SIMD Coefficient pointer */ - C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic)); - /* Butterfly process for the i0+3fftLen/4 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - - /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - out1 = __SMUSD(C3, R) >> 16u; - /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - out2 = __SMUADX(C3, R); - -#else - - /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - out1 = __SMUADX(C3, R) >> 16u; - /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - out2 = __SMUSD(__QSUB16(0, C3), R); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* writing output(xd', yd') in little endian format */ - _SIMD32_OFFSET(pSrc16 + (2u * i3)) = - ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1u; - - } while(--j); - /* data is in 4.11(q11) format */ - - /* end of first stage process */ - - - /* start of middle stage process */ - - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2u; - - /* Calculation of Middle stage */ - for (k = fftLen / 4u; k > 4u; k >>= 2u) - { - /* Initializations for the middle stage */ - n1 = n2; - n2 >>= 2u; - ic = 0u; - - for (j = 0u; j <= (n2 - 1u); j++) - { - /* index calculation for the coefficients */ - C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic)); - C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic)); - C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic)); - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Butterfly implementation */ - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i0)); - - /* Read yc (real), xc(imag) input */ - S = _SIMD32_OFFSET(pSrc16 + (2u * i2)); - - /* R = packed( (ya + yc), (xa + xc)) */ - R = __QADD16(T, S); - - /* S = packed((ya - yc), (xa - xc)) */ - S = __QSUB16(T, S); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i1)); - - /* Read yd (real), xd(imag) input */ - U = _SIMD32_OFFSET(pSrc16 + (2u * i3)); - - /* T = packed( (yb + yd), (xb + xd)) */ - T = __QADD16(T, U); - - /* writing the butterfly processed i0 sample */ - - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - out1 = __SHADD16(R, T); - in = ((int16_t) (out1 & 0xFFFF)) >> 1; - out1 = ((out1 >> 1) & 0xFFFF0000) | (in & 0xFFFF); - _SIMD32_OFFSET(pSrc16 + (2u * i0)) = out1; - - /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */ - R = __SHSUB16(R, T); - -#ifndef ARM_MATH_BIG_ENDIAN - - /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ - out1 = __SMUSD(C2, R) >> 16u; - - /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = __SMUADX(C2, R); - -#else - - /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out1 = __SMUADX(R, C2) >> 16u; - - /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ - out2 = __SMUSD(__QSUB16(0, C2), R); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Reading i0+3fftLen/4 */ - /* Read yb (real), xb(imag) input */ - T = _SIMD32_OFFSET(pSrc16 + (2u * i1)); - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - _SIMD32_OFFSET(pSrc16 + (2u * i1)) = - ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - /* Butterfly calculations */ - - /* Read yd (real), xd(imag) input */ - U = _SIMD32_OFFSET(pSrc16 + (2u * i3)); - - /* T = packed(yb-yd, xb-xd) */ - T = __QSUB16(T, U); - -#ifndef ARM_MATH_BIG_ENDIAN - - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __SHSAX(S, T); - - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __SHASX(S, T); - - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = __SMUSD(C1, S) >> 16u; - out2 = __SMUADX(C1, S); - -#else - - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __SHASX(S, T); - - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __SHSAX(S, T); - - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = __SMUADX(S, C1) >> 16u; - out2 = __SMUSD(__QSUB16(0, C1), S); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - _SIMD32_OFFSET(pSrc16 + (2u * i2)) = - ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - - /* Butterfly process for the i0+3fftLen/4 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __SMUSD(C3, R) >> 16u; - out2 = __SMUADX(C3, R); - -#else - - out1 = __SMUADX(C3, R) >> 16u; - out2 = __SMUSD(__QSUB16(0, C3), R); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - _SIMD32_OFFSET(pSrc16 + (2u * i3)) = - ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); - } - } - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2u; - } - /* end of middle stage process */ - - /* data is in 10.6(q6) format for the 1024 point */ - /* data is in 8.8(q8) format for the 256 point */ - /* data is in 6.10(q10) format for the 64 point */ - /* data is in 4.12(q12) format for the 16 point */ - - /* Initializations for the last stage */ - j = fftLen >> 2; - - ptr1 = &pSrc16[0]; - - /* start of last stage process */ - - /* Butterfly implementation */ - do - { - /* Read xa (real), ya(imag) input */ - xaya = *__SIMD32(ptr1)++; - - /* Read xb (real), yb(imag) input */ - xbyb = *__SIMD32(ptr1)++; - - /* Read xc (real), yc(imag) input */ - xcyc = *__SIMD32(ptr1)++; - - /* Read xd (real), yd(imag) input */ - xdyd = *__SIMD32(ptr1)++; - - /* R = packed((ya + yc), (xa + xc)) */ - R = __QADD16(xaya, xcyc); - - /* T = packed((yb + yd), (xb + xd)) */ - T = __QADD16(xbyb, xdyd); - - /* pointer updation for writing */ - ptr1 = ptr1 - 8u; - - - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - *__SIMD32(ptr1)++ = __SHADD16(R, T); - - /* T = packed((yb + yd), (xb + xd)) */ - T = __QADD16(xbyb, xdyd); - - /* xc' = (xa-xb+xc-xd) */ - /* yc' = (ya-yb+yc-yd) */ - *__SIMD32(ptr1)++ = __SHSUB16(R, T); - - /* S = packed((ya - yc), (xa - xc)) */ - S = __QSUB16(xaya, xcyc); - - /* Read yd (real), xd(imag) input */ - /* T = packed( (yb - yd), (xb - xd)) */ - U = __QSUB16(xbyb, xdyd); - -#ifndef ARM_MATH_BIG_ENDIAN - - /* xb' = (xa+yb-xc-yd) */ - /* yb' = (ya-xb-yc+xd) */ - *__SIMD32(ptr1)++ = __SHASX(S, U); - - - /* xd' = (xa-yb-xc+yd) */ - /* yd' = (ya+xb-yc-xd) */ - *__SIMD32(ptr1)++ = __SHSAX(S, U); - -#else - - /* xb' = (xa+yb-xc-yd) */ - /* yb' = (ya-xb-yc+xd) */ - *__SIMD32(ptr1)++ = __SHSAX(S, U); - - - /* xd' = (xa-yb-xc+yd) */ - /* yd' = (ya+xb-yc-xd) */ - *__SIMD32(ptr1)++ = __SHASX(S, U); - - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - } while(--j); - - /* end of last stage process */ - - /* output is in 11.5(q5) format for the 1024 point */ - /* output is in 9.7(q7) format for the 256 point */ - /* output is in 7.9(q9) format for the 64 point */ - /* output is in 5.11(q11) format for the 16 point */ - - -#else - - /* Run the below code for Cortex-M0 */ - - q15_t R0, R1, S0, S1, T0, T1, U0, U1; - q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2; - uint32_t n1, n2, ic, i0, i1, i2, i3, j, k; - - /* Total process is divided into three stages */ - - /* process first stage, middle stages, & last stage */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2u; - - /* Index for twiddle coefficient */ - ic = 0u; - - /* Index for input read and output write */ - i0 = 0u; - - j = n2; - - /* Input is in 1.15(q15) format */ - - /* Start of first stage process */ - do - { - /* Butterfly implementation */ - - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* input is down scale by 4 to avoid overflow */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2u] >> 2u; - T1 = pSrc16[(i0 * 2u) + 1u] >> 2u; - /* input is down scale by 4 to avoid overflow */ - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2u] >> 2u; - S1 = pSrc16[(i2 * 2u) + 1u] >> 2u; - - /* R0 = (ya + yc), R1 = (xa + xc) */ - R0 = __SSAT(T0 + S0, 16u); - R1 = __SSAT(T1 + S1, 16u); - /* S0 = (ya - yc), S1 = (xa - xc) */ - S0 = __SSAT(T0 - S0, 16u); - S1 = __SSAT(T1 - S1, 16u); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* input is down scale by 4 to avoid overflow */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2u] >> 2u; - T1 = pSrc16[(i1 * 2u) + 1u] >> 2u; - /* Read yd (real), xd(imag) input */ - /* input is down scale by 4 to avoid overflow */ - U0 = pSrc16[i3 * 2u] >> 2u; - U1 = pSrc16[(i3 * 2u) + 1u] >> 2u; - - /* T0 = (yb + yd), T1 = (xb + xd) */ - T0 = __SSAT(T0 + U0, 16u); - T1 = __SSAT(T1 + U1, 16u); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u); - pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u); - - /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc)- (xb + xd) */ - R0 = __SSAT(R0 - T0, 16u); - R1 = __SSAT(R1 - T1, 16u); - /* co2 & si2 are read from Coefficient pointer */ - Co2 = pCoef16[2u * ic * 2u]; - Si2 = pCoef16[(2u * ic * 2u) + 1u]; - /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */ - out1 = (short) ((Co2 * R0 - Si2 * R1) >> 16u); - /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */ - out2 = (short) ((Si2 * R0 + Co2 * R1) >> 16u); - - /* Reading i0+fftLen/4 */ - /* input is down scale by 4 to avoid overflow */ - /* T0 = yb, T1 = xb */ - T0 = pSrc16[i1 * 2u] >> 2u; - T1 = pSrc16[(i1 * 2u) + 1u] >> 2u; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* writing output(xc', yc') in little endian format */ - pSrc16[i1 * 2u] = out1; - pSrc16[(i1 * 2u) + 1u] = out2; - - /* Butterfly calculations */ - /* input is down scale by 4 to avoid overflow */ - /* U0 = yd, U1 = xd) */ - U0 = pSrc16[i3 * 2u] >> 2u; - U1 = pSrc16[(i3 * 2u) + 1u] >> 2u; - - /* T0 = yb-yd, T1 = xb-xd) */ - T0 = __SSAT(T0 - U0, 16u); - T1 = __SSAT(T1 - U1, 16u); - /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */ - R0 = (short) __SSAT((q31_t) (S0 + T1), 16); - R1 = (short) __SSAT((q31_t) (S1 - T0), 16); - /* S = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */ - S0 = (short) __SSAT((q31_t) (S0 - T1), 16); - S1 = (short) __SSAT((q31_t) (S1 + T0), 16); - - /* co1 & si1 are read from Coefficient pointer */ - Co1 = pCoef16[ic * 2u]; - Si1 = pCoef16[(ic * 2u) + 1u]; - /* Butterfly process for the i0+fftLen/2 sample */ - /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */ - out1 = (short) ((Co1 * S0 - Si1 * S1) >> 16u); - /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */ - out2 = (short) ((Si1 * S0 + Co1 * S1) >> 16u); - /* writing output(xb', yb') in little endian format */ - pSrc16[i2 * 2u] = out1; - pSrc16[(i2 * 2u) + 1u] = out2; - - /* Co3 & si3 are read from Coefficient pointer */ - Co3 = pCoef16[3u * ic * 2u]; - Si3 = pCoef16[(3u * ic * 2u) + 1u]; - /* Butterfly process for the i0+3fftLen/4 sample */ - /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */ - out1 = (short) ((Co3 * R0 - Si3 * R1) >> 16u); - /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */ - out2 = (short) ((Si3 * R0 + Co3 * R1) >> 16u); - /* writing output(xd', yd') in little endian format */ - pSrc16[i3 * 2u] = out1; - pSrc16[(i3 * 2u) + 1u] = out2; - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1u; - - } while(--j); - - /* End of first stage process */ - - /* data is in 4.11(q11) format */ - - - /* Start of Middle stage process */ - - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2u; - - /* Calculation of Middle stage */ - for (k = fftLen / 4u; k > 4u; k >>= 2u) - { - /* Initializations for the middle stage */ - n1 = n2; - n2 >>= 2u; - ic = 0u; - - for (j = 0u; j <= (n2 - 1u); j++) - { - /* index calculation for the coefficients */ - Co1 = pCoef16[ic * 2u]; - Si1 = pCoef16[(ic * 2u) + 1u]; - Co2 = pCoef16[2u * ic * 2u]; - Si2 = pCoef16[2u * ic * 2u + 1u]; - Co3 = pCoef16[3u * ic * 2u]; - Si3 = pCoef16[(3u * ic * 2u) + 1u]; - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Butterfly implementation */ - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2u]; - T1 = pSrc16[(i0 * 2u) + 1u]; - - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2u]; - S1 = pSrc16[(i2 * 2u) + 1u]; - - - /* R0 = (ya + yc), R1 = (xa + xc) */ - R0 = __SSAT(T0 + S0, 16u); - R1 = __SSAT(T1 + S1, 16u); - /* S0 = (ya - yc), S1 = (xa - xc) */ - S0 = __SSAT(T0 - S0, 16u); - S1 = __SSAT(T1 - S1, 16u); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2u]; - T1 = pSrc16[(i1 * 2u) + 1u]; - - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2u]; - U1 = pSrc16[(i3 * 2u) + 1u]; - - /* T0 = (yb + yd), T1 = (xb + xd) */ - T0 = __SSAT(T0 + U0, 16u); - T1 = __SSAT(T1 + U1, 16u); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - pSrc16[i0 * 2u] = ((R0 >> 1u) + (T0 >> 1u)) >> 1u; - pSrc16[(i0 * 2u) + 1u] = ((R1 >> 1u) + (T1 >> 1u)) >> 1u; - - /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ - R0 = (R0 >> 1u) - (T0 >> 1u); - R1 = (R1 >> 1u) - (T1 >> 1u); - - /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */ - out1 = (short) ((Co2 * R0 - Si2 * R1) >> 16); - /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */ - out2 = (short) ((Si2 * R0 + Co2 * R1) >> 16); - - /* Reading i0+3fftLen/4 */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2u]; - T1 = pSrc16[(i1 * 2u) + 1u]; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */ - /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */ - pSrc16[i1 * 2u] = out1; - pSrc16[(i1 * 2u) + 1u] = out2; - - /* Butterfly calculations */ - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2u]; - U1 = pSrc16[(i3 * 2u) + 1u]; - - /* T0 = yb-yd, T1 = xb-xd) */ - T0 = __SSAT(T0 - U0, 16u); - T1 = __SSAT(T1 - U1, 16u); - - /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */ - R0 = (S0 >> 1u) + (T1 >> 1u); - R1 = (S1 >> 1u) - (T0 >> 1u); - - /* S1 = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */ - S0 = (S0 >> 1u) - (T1 >> 1u); - S1 = (S1 >> 1u) + (T0 >> 1u); - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = (short) ((Co1 * S0 - Si1 * S1) >> 16u); - out2 = (short) ((Si1 * S0 + Co1 * S1) >> 16u); - /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */ - /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */ - pSrc16[i2 * 2u] = out1; - pSrc16[(i2 * 2u) + 1u] = out2; - - /* Butterfly process for the i0+3fftLen/4 sample */ - out1 = (short) ((Co3 * R0 - Si3 * R1) >> 16u); - - out2 = (short) ((Si3 * R0 + Co3 * R1) >> 16u); - /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */ - /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */ - pSrc16[i3 * 2u] = out1; - pSrc16[(i3 * 2u) + 1u] = out2; - - - } - } - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2u; - } - /* End of Middle stages process */ - - - /* data is in 10.6(q6) format for the 1024 point */ - /* data is in 8.8(q8) format for the 256 point */ - /* data is in 6.10(q10) format for the 64 point */ - /* data is in 4.12(q12) format for the 16 point */ - - /* start of last stage process */ - - - /* Initializations for the last stage */ - n1 = n2; - n2 >>= 2u; - - /* Butterfly implementation */ - for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2u]; - T1 = pSrc16[(i0 * 2u) + 1u]; - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2u]; - S1 = pSrc16[(i2 * 2u) + 1u]; - - /* R0 = (ya + yc), R1 = (xa + xc) */ - R0 = __SSAT(T0 + S0, 16u); - R1 = __SSAT(T1 + S1, 16u); - /* S0 = (ya - yc), S1 = (xa - xc) */ - S0 = __SSAT(T0 - S0, 16u); - S1 = __SSAT(T1 - S1, 16u); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2u]; - T1 = pSrc16[(i1 * 2u) + 1u]; - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2u]; - U1 = pSrc16[(i3 * 2u) + 1u]; - - /* T0 = (yb + yd), T1 = (xb + xd) */ - T0 = __SSAT(T0 + U0, 16u); - T1 = __SSAT(T1 + U1, 16u); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u); - pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u); - - /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ - R0 = (R0 >> 1u) - (T0 >> 1u); - R1 = (R1 >> 1u) - (T1 >> 1u); - - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2u]; - T1 = pSrc16[(i1 * 2u) + 1u]; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd) */ - /* yc' = (ya-yb+yc-yd) */ - pSrc16[i1 * 2u] = R0; - pSrc16[(i1 * 2u) + 1u] = R1; - - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2u]; - U1 = pSrc16[(i3 * 2u) + 1u]; - /* T0 = (yb - yd), T1 = (xb - xd) */ - T0 = __SSAT(T0 - U0, 16u); - T1 = __SSAT(T1 - U1, 16u); - - /* writing the butterfly processed i0 + fftLen/2 sample */ - /* xb' = (xa-yb-xc+yd) */ - /* yb' = (ya+xb-yc-xd) */ - pSrc16[i2 * 2u] = (S0 >> 1u) - (T1 >> 1u); - pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u); - - - /* writing the butterfly processed i0 + 3fftLen/4 sample */ - /* xd' = (xa+yb-xc-yd) */ - /* yd' = (ya-xb-yc+xd) */ - pSrc16[i3 * 2u] = (S0 >> 1u) + (T1 >> 1u); - pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u); - } - /* end of last stage process */ - - /* output is in 11.5(q5) format for the 1024 point */ - /* output is in 9.7(q7) format for the 256 point */ - /* output is in 7.9(q9) format for the 64 point */ - /* output is in 5.11(q11) format for the 16 point */ - -#endif /* #ifndef ARM_MATH_CM0 */ - -} diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c deleted file mode 100644 index cfa5d8df0e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c +++ /dev/null @@ -1,891 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cfft_radix4_q31.c -* -* Description: This file has function definition of Radix-4 FFT & IFFT function and -* In-place bit reversal using bit reversal table -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ -#include "arm_math.h" - - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup Radix4_CFFT_CIFFT - * @{ - */ - -/** - * @details - * @brief Processing function for the Q31 CFFT/CIFFT. - * @param[in] *S points to an instance of the Q31 CFFT/CIFFT structure. - * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place. - * @return none. - * - * \par Input and output formats: - * \par - * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. - * Hence the output format is different for different FFT sizes. - * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT: - * \par - * \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT" - * \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT" - * - */ - -void arm_cfft_radix4_q31( - const arm_cfft_radix4_instance_q31 * S, - q31_t * pSrc) -{ - if(S->ifftFlag == 1u) - { - /* Complex IFFT radix-4 */ - arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier); - } - else - { - /* Complex FFT radix-4 */ - arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier); - } - - - if(S->bitReverseFlag == 1u) - { - /* Bit Reversal */ - arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); - } - -} - -/** - * @} end of Radix4_CFFT_CIFFT group - */ - -/* -* Radix-4 FFT algorithm used is : -* -* Input real and imaginary data: -* x(n) = xa + j * ya -* x(n+N/4 ) = xb + j * yb -* x(n+N/2 ) = xc + j * yc -* x(n+3N 4) = xd + j * yd -* -* -* Output real and imaginary data: -* x(4r) = xa'+ j * ya' -* x(4r+1) = xb'+ j * yb' -* x(4r+2) = xc'+ j * yc' -* x(4r+3) = xd'+ j * yd' -* -* -* Twiddle factors for radix-4 FFT: -* Wn = co1 + j * (- si1) -* W2n = co2 + j * (- si2) -* W3n = co3 + j * (- si3) -* -* Butterfly implementation: -* xa' = xa + xb + xc + xd -* ya' = ya + yb + yc + yd -* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) -* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) -* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) -* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) -* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) -* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) -* -*/ - -/** - * @brief Core function for the Q31 CFFT butterfly process. - * @param[in, out] *pSrc points to the in-place buffer of Q31 data type. - * @param[in] fftLen length of the FFT. - * @param[in] *pCoef points to twiddle coefficient buffer. - * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - */ - -void arm_radix4_butterfly_q31( - q31_t * pSrc, - uint32_t fftLen, - q31_t * pCoef, - uint32_t twidCoefModifier) -{ - uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; - q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3; - - q31_t xa, xb, xc, xd; - q31_t ya, yb, yc, yd; - q31_t xa_out, xb_out, xc_out, xd_out; - q31_t ya_out, yb_out, yc_out, yd_out; - - q31_t *ptr1; - q63_t xaya, xbyb, xcyc, xdyd; - /* Total process is divided into three stages */ - - /* process first stage, middle stages, & last stage */ - - - /* start of first stage process */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - /* n2 = fftLen/4 */ - n2 >>= 2u; - i0 = 0u; - ia1 = 0u; - - j = n2; - - /* Calculation of first stage */ - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* input is in 1.31(q31) format and provide 4 guard bits for the input */ - - /* Butterfly implementation */ - /* xa + xc */ - r1 = (pSrc[(2u * i0)] >> 4u) + (pSrc[(2u * i2)] >> 4u); - /* xa - xc */ - r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u); - - /* xb + xd */ - t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u); - - /* ya + yc */ - s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u); - /* ya - yc */ - s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u); - - /* xa' = xa + xb + xc + xd */ - pSrc[2u * i0] = (r1 + t1); - /* (xa + xc) - (xb + xd) */ - r1 = r1 - t1; - /* yb + yd */ - t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u); - - /* ya' = ya + yb + yc + yd */ - pSrc[(2u * i0) + 1u] = (s1 + t2); - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* yb - yd */ - t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u); - /* xb - xd */ - t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u); - - /* index calculation for the coefficients */ - ia2 = 2u * ia1; - co2 = pCoef[ia2 * 2u]; - si2 = pCoef[(ia2 * 2u) + 1u]; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) + - ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u; - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) - - ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u; - - /* (xa - xc) + (yb - yd) */ - r1 = r2 + t1; - /* (xa - xc) - (yb - yd) */ - r2 = r2 - t1; - - /* (ya - yc) - (xb - xd) */ - s1 = s2 - t2; - /* (ya - yc) + (xb - xd) */ - s2 = s2 + t2; - - co1 = pCoef[ia1 * 2u]; - si1 = pCoef[(ia1 * 2u) + 1u]; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) + - ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u; - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) - - ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u; - - /* index calculation for the coefficients */ - ia3 = 3u * ia1; - co3 = pCoef[ia3 * 2u]; - si3 = pCoef[(ia3 * 2u) + 1u]; - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) + - ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u; - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) - - ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1u; - - } while(--j); - - /* end of first stage process */ - - /* data is in 5.27(q27) format */ - - - /* start of Middle stages process */ - - - /* each stage in middle stages provides two down scaling of the input */ - - twidCoefModifier <<= 2u; - - - for (k = fftLen / 4u; k > 4u; k >>= 2u) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2u; - ia1 = 0u; - - /* Calculation of first stage */ - for (j = 0u; j <= (n2 - 1u); j++) - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2u]; - si1 = pCoef[(ia1 * 2u) + 1u]; - co2 = pCoef[ia2 * 2u]; - si2 = pCoef[(ia2 * 2u) + 1u]; - co3 = pCoef[ia3 * 2u]; - si3 = pCoef[(ia3 * 2u) + 1u]; - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - /* xa + xc */ - r1 = pSrc[2u * i0] + pSrc[2u * i2]; - /* xa - xc */ - r2 = pSrc[2u * i0] - pSrc[2u * i2]; - - /* ya + yc */ - s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u]; - /* ya - yc */ - s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u]; - - /* xb + xd */ - t1 = pSrc[2u * i1] + pSrc[2u * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2u * i0] = (r1 + t1) >> 2u; - /* xa + xc -(xb + xd) */ - r1 = r1 - t1; - - /* yb + yd */ - t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u]; - /* ya' = ya + yb + yc + yd */ - pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u; - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* (yb - yd) */ - t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u]; - /* (xb - xd) */ - t2 = pSrc[2u * i1] - pSrc[2u * i3]; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) + - ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1u; - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) - - ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1u; - - /* (xa - xc) + (yb - yd) */ - r1 = r2 + t1; - /* (xa - xc) - (yb - yd) */ - r2 = r2 - t1; - - /* (ya - yc) - (xb - xd) */ - s1 = s2 - t2; - /* (ya - yc) + (xb - xd) */ - s2 = s2 + t2; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) + - ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u; - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) - - ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u; - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) + - ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u; - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) - - ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u; - } - } - twidCoefModifier <<= 2u; - } - - /* End of Middle stages process */ - - /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */ - /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */ - /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */ - /* data is in 5.27(q27) format for the 16 point as there are no middle stages */ - - - /* start of Last stage process */ - /* Initializations for the last stage */ - j = fftLen >> 2; - ptr1 = &pSrc[0]; - - /* Calculations of last stage */ - do - { - -#ifndef ARM_MATH_BIG_ENDIAN - - /* Read xa (real), ya(imag) input */ - xaya = *__SIMD64(ptr1)++; - xa = (q31_t) xaya; - ya = (q31_t) (xaya >> 32); - - /* Read xb (real), yb(imag) input */ - xbyb = *__SIMD64(ptr1)++; - xb = (q31_t) xbyb; - yb = (q31_t) (xbyb >> 32); - - /* Read xc (real), yc(imag) input */ - xcyc = *__SIMD64(ptr1)++; - xc = (q31_t) xcyc; - yc = (q31_t) (xcyc >> 32); - - /* Read xc (real), yc(imag) input */ - xdyd = *__SIMD64(ptr1)++; - xd = (q31_t) xdyd; - yd = (q31_t) (xdyd >> 32); - -#else - - /* Read xa (real), ya(imag) input */ - xaya = *__SIMD64(ptr1)++; - ya = (q31_t) xaya; - xa = (q31_t) (xaya >> 32); - - /* Read xb (real), yb(imag) input */ - xbyb = *__SIMD64(ptr1)++; - yb = (q31_t) xbyb; - xb = (q31_t) (xbyb >> 32); - - /* Read xc (real), yc(imag) input */ - xcyc = *__SIMD64(ptr1)++; - yc = (q31_t) xcyc; - xc = (q31_t) (xcyc >> 32); - - /* Read xc (real), yc(imag) input */ - xdyd = *__SIMD64(ptr1)++; - yd = (q31_t) xdyd; - xd = (q31_t) (xdyd >> 32); - - -#endif - - /* xa' = xa + xb + xc + xd */ - xa_out = xa + xb + xc + xd; - - /* ya' = ya + yb + yc + yd */ - ya_out = ya + yb + yc + yd; - - /* pointer updation for writing */ - ptr1 = ptr1 - 8u; - - /* writing xa' and ya' */ - *ptr1++ = xa_out; - *ptr1++ = ya_out; - - xc_out = (xa - xb + xc - xd); - yc_out = (ya - yb + yc - yd); - - /* writing xc' and yc' */ - *ptr1++ = xc_out; - *ptr1++ = yc_out; - - xb_out = (xa + yb - xc - yd); - yb_out = (ya - xb - yc + xd); - - /* writing xb' and yb' */ - *ptr1++ = xb_out; - *ptr1++ = yb_out; - - xd_out = (xa - yb - xc + yd); - yd_out = (ya + xb - yc - xd); - - /* writing xd' and yd' */ - *ptr1++ = xd_out; - *ptr1++ = yd_out; - - - } while(--j); - - /* output is in 11.21(q21) format for the 1024 point */ - /* output is in 9.23(q23) format for the 256 point */ - /* output is in 7.25(q25) format for the 64 point */ - /* output is in 5.27(q27) format for the 16 point */ - - /* End of last stage process */ - -} - - -/** - * @brief Core function for the Q31 CIFFT butterfly process. - * @param[in, out] *pSrc points to the in-place buffer of Q31 data type. - * @param[in] fftLen length of the FFT. - * @param[in] *pCoef points to twiddle coefficient buffer. - * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - */ - - -/* -* Radix-4 IFFT algorithm used is : -* -* CIFFT uses same twiddle coefficients as CFFT Function -* x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4] -* -* -* IFFT is implemented with following changes in equations from FFT -* -* Input real and imaginary data: -* x(n) = xa + j * ya -* x(n+N/4 ) = xb + j * yb -* x(n+N/2 ) = xc + j * yc -* x(n+3N 4) = xd + j * yd -* -* -* Output real and imaginary data: -* x(4r) = xa'+ j * ya' -* x(4r+1) = xb'+ j * yb' -* x(4r+2) = xc'+ j * yc' -* x(4r+3) = xd'+ j * yd' -* -* -* Twiddle factors for radix-4 IFFT: -* Wn = co1 + j * (si1) -* W2n = co2 + j * (si2) -* W3n = co3 + j * (si3) - -* The real and imaginary output values for the radix-4 butterfly are -* xa' = xa + xb + xc + xd -* ya' = ya + yb + yc + yd -* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) -* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) -* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) -* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) -* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) -* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) -* -*/ - -void arm_radix4_butterfly_inverse_q31( - q31_t * pSrc, - uint32_t fftLen, - q31_t * pCoef, - uint32_t twidCoefModifier) -{ - uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; - q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3; - q31_t xa, xb, xc, xd; - q31_t ya, yb, yc, yd; - q31_t xa_out, xb_out, xc_out, xd_out; - q31_t ya_out, yb_out, yc_out, yd_out; - - q31_t *ptr1; - q63_t xaya, xbyb, xcyc, xdyd; - - /* input is be 1.31(q31) format for all FFT sizes */ - /* Total process is divided into three stages */ - /* process first stage, middle stages, & last stage */ - - /* Start of first stage process */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - /* n2 = fftLen/4 */ - n2 >>= 2u; - i0 = 0u; - ia1 = 0u; - - j = n2; - - do - { - - /* input is in 1.31(q31) format and provide 4 guard bits for the input */ - - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - /* xa + xc */ - r1 = (pSrc[2u * i0] >> 4u) + (pSrc[2u * i2] >> 4u); - /* xa - xc */ - r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u); - - /* xb + xd */ - t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u); - - /* ya + yc */ - s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u); - /* ya - yc */ - s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u); - - /* xa' = xa + xb + xc + xd */ - pSrc[2u * i0] = (r1 + t1); - /* (xa + xc) - (xb + xd) */ - r1 = r1 - t1; - /* yb + yd */ - t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u); - /* ya' = ya + yb + yc + yd */ - pSrc[(2u * i0) + 1u] = (s1 + t2); - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* yb - yd */ - t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u); - /* xb - xd */ - t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u); - - /* index calculation for the coefficients */ - ia2 = 2u * ia1; - co2 = pCoef[ia2 * 2u]; - si2 = pCoef[(ia2 * 2u) + 1u]; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) - - ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[2u * i1 + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) + - ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u; - - /* (xa - xc) - (yb - yd) */ - r1 = r2 - t1; - /* (xa - xc) + (yb - yd) */ - r2 = r2 + t1; - - /* (ya - yc) + (xb - xd) */ - s1 = s2 + t2; - /* (ya - yc) - (xb - xd) */ - s2 = s2 - t2; - - co1 = pCoef[ia1 * 2u]; - si1 = pCoef[(ia1 * 2u) + 1u]; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) - - ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) + - ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u; - - /* index calculation for the coefficients */ - ia3 = 3u * ia1; - co3 = pCoef[ia3 * 2u]; - si3 = pCoef[(ia3 * 2u) + 1u]; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) - - ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) + - ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1u; - - } while(--j); - - /* data is in 5.27(q27) format */ - /* each stage provides two down scaling of the input */ - - - /* Start of Middle stages process */ - - twidCoefModifier <<= 2u; - - /* Calculation of second stage to excluding last stage */ - for (k = fftLen / 4u; k > 4u; k >>= 2u) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2u; - ia1 = 0u; - - for (j = 0; j <= (n2 - 1u); j++) - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2u]; - si1 = pCoef[(ia1 * 2u) + 1u]; - co2 = pCoef[ia2 * 2u]; - si2 = pCoef[(ia2 * 2u) + 1u]; - co3 = pCoef[ia3 * 2u]; - si3 = pCoef[(ia3 * 2u) + 1u]; - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - /* xa + xc */ - r1 = pSrc[2u * i0] + pSrc[2u * i2]; - /* xa - xc */ - r2 = pSrc[2u * i0] - pSrc[2u * i2]; - - /* ya + yc */ - s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u]; - /* ya - yc */ - s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u]; - - /* xb + xd */ - t1 = pSrc[2u * i1] + pSrc[2u * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2u * i0] = (r1 + t1) >> 2u; - /* xa + xc -(xb + xd) */ - r1 = r1 - t1; - /* yb + yd */ - t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u]; - /* ya' = ya + yb + yc + yd */ - pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u; - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* (yb - yd) */ - t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u]; - /* (xb - xd) */ - t2 = pSrc[2u * i1] - pSrc[2u * i3]; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32u)) - - ((int32_t) (((q63_t) s1 * si2) >> 32u))) >> 1u; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2u * i1) + 1u] = - (((int32_t) (((q63_t) s1 * co2) >> 32u)) + - ((int32_t) (((q63_t) r1 * si2) >> 32u))) >> 1u; - - /* (xa - xc) - (yb - yd) */ - r1 = r2 - t1; - /* (xa - xc) + (yb - yd) */ - r2 = r2 + t1; - - /* (ya - yc) + (xb - xd) */ - s1 = s2 + t2; - /* (ya - yc) - (xb - xd) */ - s2 = s2 - t2; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) - - ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) + - ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[(2u * i3)] = (((int32_t) (((q63_t) r2 * co3) >> 32)) - - ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) + - ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u; - } - } - twidCoefModifier <<= 2u; - } - - /* End of Middle stages process */ - - /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */ - /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */ - /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */ - /* data is in 5.27(q27) format for the 16 point as there are no middle stages */ - - - /* Start of last stage process */ - - - /* Initializations for the last stage */ - j = fftLen >> 2; - ptr1 = &pSrc[0]; - - /* Calculations of last stage */ - do - { -#ifndef ARM_MATH_BIG_ENDIAN - /* Read xa (real), ya(imag) input */ - xaya = *__SIMD64(ptr1)++; - xa = (q31_t) xaya; - ya = (q31_t) (xaya >> 32); - - /* Read xb (real), yb(imag) input */ - xbyb = *__SIMD64(ptr1)++; - xb = (q31_t) xbyb; - yb = (q31_t) (xbyb >> 32); - - /* Read xc (real), yc(imag) input */ - xcyc = *__SIMD64(ptr1)++; - xc = (q31_t) xcyc; - yc = (q31_t) (xcyc >> 32); - - /* Read xc (real), yc(imag) input */ - xdyd = *__SIMD64(ptr1)++; - xd = (q31_t) xdyd; - yd = (q31_t) (xdyd >> 32); - -#else - - /* Read xa (real), ya(imag) input */ - xaya = *__SIMD64(ptr1)++; - ya = (q31_t) xaya; - xa = (q31_t) (xaya >> 32); - - /* Read xb (real), yb(imag) input */ - xbyb = *__SIMD64(ptr1)++; - yb = (q31_t) xbyb; - xb = (q31_t) (xbyb >> 32); - - /* Read xc (real), yc(imag) input */ - xcyc = *__SIMD64(ptr1)++; - yc = (q31_t) xcyc; - xc = (q31_t) (xcyc >> 32); - - /* Read xc (real), yc(imag) input */ - xdyd = *__SIMD64(ptr1)++; - yd = (q31_t) xdyd; - xd = (q31_t) (xdyd >> 32); - - -#endif - - /* xa' = xa + xb + xc + xd */ - xa_out = xa + xb + xc + xd; - - /* ya' = ya + yb + yc + yd */ - ya_out = ya + yb + yc + yd; - - /* pointer updation for writing */ - ptr1 = ptr1 - 8u; - - /* writing xa' and ya' */ - *ptr1++ = xa_out; - *ptr1++ = ya_out; - - xc_out = (xa - xb + xc - xd); - yc_out = (ya - yb + yc - yd); - - /* writing xc' and yc' */ - *ptr1++ = xc_out; - *ptr1++ = yc_out; - - xb_out = (xa - yb - xc + yd); - yb_out = (ya + xb - yc - xd); - - /* writing xb' and yb' */ - *ptr1++ = xb_out; - *ptr1++ = yb_out; - - xd_out = (xa + yb - xc - yd); - yd_out = (ya - xb - yc + xd); - - /* writing xd' and yd' */ - *ptr1++ = xd_out; - *ptr1++ = yd_out; - - - } while(--j); - - /* output is in 11.21(q21) format for the 1024 point */ - /* output is in 9.23(q23) format for the 256 point */ - /* output is in 7.25(q25) format for the 64 point */ - /* output is in 5.27(q27) format for the 16 point */ - - /* End of last stage process */ -} diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c deleted file mode 100644 index 75cc3ef689..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c +++ /dev/null @@ -1,453 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dct4_f32.c -* -* Description: Processing function of DCT4 & IDCT4 F32. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @defgroup DCT4_IDCT4 DCT Type IV Functions - * Representation of signals by minimum number of values is important for storage and transmission. - * The possibility of large discontinuity between the beginning and end of a period of a signal - * in DFT can be avoided by extending the signal so that it is even-symmetric. - * Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the - * spectrum and is very widely used in signal and image coding applications. - * The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions. - * DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular. - * - * DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal. - * Reordering of the input data makes the computation of DCT just a problem of - * computing the DFT of a real signal with a few additional operations. - * This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations. - * - * DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used. - * DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing. - * DCT2 implementation can be described in the following steps: - * - Re-ordering input - * - Calculating Real FFT - * - Multiplication of weights and Real FFT output and getting real part from the product. - * - * This process is explained by the block diagram below: - * \image html DCT4.gif "Discrete Cosine Transform - type-IV" - * - * \par Algorithm: - * The N-point type-IV DCT is defined as a real, linear transformation by the formula: - * \image html DCT4Equation.gif - * where k = 0,1,2,.....N-1 - *\par - * Its inverse is defined as follows: - * \image html IDCT4Equation.gif - * where n = 0,1,2,.....N-1 - *\par - * The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N). - * The symmetry of the transform matrix indicates that the fast algorithms for the forward - * and inverse transform computation are identical. - * Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both. - * - * \par Lengths supported by the transform: - * As DCT4 internally uses Real FFT, it supports all the lengths supported by arm_rfft_f32(). - * The library provides separate functions for Q15, Q31, and floating-point data types. - * \par Instance Structure - * The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure. - * A separate instance structure must be defined for each transform. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Initializes Real FFT as its process function is used internally in DCT4, by calling arm_rfft_init_f32(). - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Manually initialize the instance structure as follows: - *
    
- *arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};    
- *arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};   
- *arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};   
- * 
- * where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4; - * \c normalize is normalizing factor used and is equal to sqrt(2/N); - * \c pTwiddle points to the twiddle factor table; - * \c pCosFactor points to the cosFactor table; - * \c pRfft points to the real FFT instance; - * \c pCfft points to the complex FFT instance; - * The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32() - * and arm_rfft_f32() respectively for details regarding static initialization. - * - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the DCT4 transform functions. - * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup DCT4_IDCT4 - * @{ - */ - -/** - * @brief Processing function for the floating-point DCT4/IDCT4. - * @param[in] *S points to an instance of the floating-point DCT4/IDCT4 structure. - * @param[in] *pState points to state buffer. - * @param[in,out] *pInlineBuffer points to the in-place input and output buffer. - * @return none. - */ - -void arm_dct4_f32( - const arm_dct4_instance_f32 * S, - float32_t * pState, - float32_t * pInlineBuffer) -{ - uint32_t i; /* Loop counter */ - float32_t *weights = S->pTwiddle; /* Pointer to the Weights table */ - float32_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */ - float32_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */ - float32_t in; /* Temporary variable */ - - - /* DCT4 computation involves DCT2 (which is calculated using RFFT) - * along with some pre-processing and post-processing. - * Computational procedure is explained as follows: - * (a) Pre-processing involves multiplying input with cos factor, - * r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n)) - * where, - * r(n) -- output of preprocessing - * u(n) -- input to preprocessing(actual Source buffer) - * (b) Calculation of DCT2 using FFT is divided into three steps: - * Step1: Re-ordering of even and odd elements of input. - * Step2: Calculating FFT of the re-ordered input. - * Step3: Taking the real part of the product of FFT output and weights. - * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation: - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * where, - * Y4 -- DCT4 output, Y2 -- DCT2 output - * (d) Multiplying the output with the normalizing factor sqrt(2/N). - */ - - /*-------- Pre-processing ------------*/ - /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */ - arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N); - arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N); - - /* ---------------------------------------------------------------- - * Step1: Re-ordering of even and odd elements as, - * pState[i] = pInlineBuffer[2*i] and - * pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2 - ---------------------------------------------------------------------*/ - - /* pS1 initialized to pState */ - pS1 = pState; - - /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */ - pS2 = pState + (S->N - 1u); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */ - i = (uint32_t) S->Nby2 >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = (uint32_t) S->N >> 2u; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. - * Compute 4 outputs at a time */ - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_f32(S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */ - i = ((uint32_t) S->N - 1u) >> 2u; - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ * (float32_t) 0.5; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - i = ((uint32_t) S->N - 1u) % 0x4u; - - while(i > 0u) - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - /* Decrement the loop counter */ - i--; - } - - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = (uint32_t) S->N >> 2u; - - /* pbuff initialized to the pInlineBuffer(now contains the output values) */ - pbuff = pInlineBuffer; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. Compute 4 outputs at a time */ - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = in * S->normalize; - - in = *pbuff; - *pbuff++ = in * S->normalize; - - in = *pbuff; - *pbuff++ = in * S->normalize; - - in = *pbuff; - *pbuff++ = in * S->normalize; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initializing the loop counter to N/2 */ - i = (uint32_t) S->Nby2; - - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter */ - i = (uint32_t) S->N; - - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_f32(S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ * (float32_t) 0.5; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - /* Initializing the loop counter */ - i = ((uint32_t) S->N - 1u); - - do - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing the loop counter */ - i = (uint32_t) S->N; - - /* pbuff initialized to the pInlineBuffer(now contains the output values) */ - pbuff = pInlineBuffer; - - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = in * S->normalize; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of DCT4_IDCT4 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c deleted file mode 100644 index f6848f61fc..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c +++ /dev/null @@ -1,16511 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dct4_init_f32.c -* -* Description: Initialization function of DCT-4 & IDCT4 F32 -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup DCT4_IDCT4 - * @{ - */ - -/* -* @brief Weights Table -*/ - -/** -* \par -* Weights tables are generated using the formula :
weights[n] = e^(-j*n*pi/(2*N))
-* \par -* C command to generate the table -*
    
-* for(i = 0; i< N; i++)    
-* {    
-*    weights[2*i]= cos(i*c);    
-*    weights[(2*i)+1]= -sin(i * c);    
-* } 
-* \par -* Where N is the Number of weights to be calculated and c is pi/(2*N) -* \par -* In the tables below the real and imaginary values are placed alternatively, hence the -* array length is 2*N. -*/ - -static const float32_t Weights_128[256] = { - 1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f, - -0.012271538285719925f, - 0.999698818696204250f, -0.024541228522912288f, 0.999322384588349540f, - -0.036807222941358832f, - 0.998795456205172410f, -0.049067674327418015f, 0.998118112900149180f, - -0.061320736302208578f, - 0.997290456678690210f, -0.073564563599667426f, 0.996312612182778000f, - -0.085797312344439894f, - 0.995184726672196930f, -0.098017140329560604f, 0.993906970002356060f, - -0.110222207293883060f, - 0.992479534598709970f, -0.122410675199216200f, 0.990902635427780010f, - -0.134580708507126170f, - 0.989176509964781010f, -0.146730474455361750f, 0.987301418157858430f, - -0.158858143333861450f, - 0.985277642388941220f, -0.170961888760301220f, 0.983105487431216290f, - -0.183039887955140950f, - 0.980785280403230430f, -0.195090322016128250f, 0.978317370719627650f, - -0.207111376192218560f, - 0.975702130038528570f, -0.219101240156869800f, 0.972939952205560180f, - -0.231058108280671110f, - 0.970031253194543970f, -0.242980179903263870f, 0.966976471044852070f, - -0.254865659604514570f, - 0.963776065795439840f, -0.266712757474898370f, 0.960430519415565790f, - -0.278519689385053060f, - 0.956940335732208820f, -0.290284677254462330f, 0.953306040354193860f, - -0.302005949319228080f, - 0.949528180593036670f, -0.313681740398891520f, 0.945607325380521280f, - -0.325310292162262930f, - 0.941544065183020810f, -0.336889853392220050f, 0.937339011912574960f, - -0.348418680249434560f, - 0.932992798834738960f, -0.359895036534988110f, 0.928506080473215590f, - -0.371317193951837540f, - 0.923879532511286740f, -0.382683432365089780f, 0.919113851690057770f, - -0.393992040061048100f, - 0.914209755703530690f, -0.405241314004989860f, 0.909167983090522380f, - -0.416429560097637150f, - 0.903989293123443340f, -0.427555093430282080f, 0.898674465693953820f, - -0.438616238538527660f, - 0.893224301195515320f, -0.449611329654606540f, 0.887639620402853930f, - -0.460538710958240010f, - 0.881921264348355050f, -0.471396736825997640f, 0.876070094195406600f, - -0.482183772079122720f, - 0.870086991108711460f, -0.492898192229784040f, 0.863972856121586810f, - -0.503538383725717580f, - 0.857728610000272120f, -0.514102744193221660f, 0.851355193105265200f, - -0.524589682678468950f, - 0.844853565249707120f, -0.534997619887097150f, 0.838224705554838080f, - -0.545324988422046460f, - 0.831469612302545240f, -0.555570233019602180f, 0.824589302785025290f, - -0.565731810783613120f, - 0.817584813151583710f, -0.575808191417845340f, 0.810457198252594770f, - -0.585797857456438860f, - 0.803207531480644940f, -0.595699304492433360f, 0.795836904608883570f, - -0.605511041404325550f, - 0.788346427626606340f, -0.615231590580626820f, 0.780737228572094490f, - -0.624859488142386340f, - 0.773010453362736990f, -0.634393284163645490f, 0.765167265622458960f, - -0.643831542889791390f, - 0.757208846506484570f, -0.653172842953776760f, 0.749136394523459370f, - -0.662415777590171780f, - 0.740951125354959110f, -0.671558954847018330f, 0.732654271672412820f, - -0.680600997795453020f, - 0.724247082951467000f, -0.689540544737066830f, 0.715730825283818590f, - -0.698376249408972920f, - 0.707106781186547570f, -0.707106781186547460f, 0.698376249408972920f, - -0.715730825283818590f, - 0.689540544737066940f, -0.724247082951466890f, 0.680600997795453130f, - -0.732654271672412820f, - 0.671558954847018330f, -0.740951125354959110f, 0.662415777590171780f, - -0.749136394523459260f, - 0.653172842953776760f, -0.757208846506484460f, 0.643831542889791500f, - -0.765167265622458960f, - 0.634393284163645490f, -0.773010453362736990f, 0.624859488142386450f, - -0.780737228572094380f, - 0.615231590580626820f, -0.788346427626606230f, 0.605511041404325550f, - -0.795836904608883460f, - 0.595699304492433470f, -0.803207531480644830f, 0.585797857456438860f, - -0.810457198252594770f, - 0.575808191417845340f, -0.817584813151583710f, 0.565731810783613230f, - -0.824589302785025290f, - 0.555570233019602290f, -0.831469612302545240f, 0.545324988422046460f, - -0.838224705554837970f, - 0.534997619887097260f, -0.844853565249707010f, 0.524589682678468840f, - -0.851355193105265200f, - 0.514102744193221660f, -0.857728610000272120f, 0.503538383725717580f, - -0.863972856121586700f, - 0.492898192229784090f, -0.870086991108711350f, 0.482183772079122830f, - -0.876070094195406600f, - 0.471396736825997810f, -0.881921264348354940f, 0.460538710958240010f, - -0.887639620402853930f, - 0.449611329654606600f, -0.893224301195515320f, 0.438616238538527710f, - -0.898674465693953820f, - 0.427555093430282200f, -0.903989293123443340f, 0.416429560097637320f, - -0.909167983090522270f, - 0.405241314004989860f, -0.914209755703530690f, 0.393992040061048100f, - -0.919113851690057770f, - 0.382683432365089840f, -0.923879532511286740f, 0.371317193951837600f, - -0.928506080473215480f, - 0.359895036534988280f, -0.932992798834738850f, 0.348418680249434510f, - -0.937339011912574960f, - 0.336889853392220050f, -0.941544065183020810f, 0.325310292162262980f, - -0.945607325380521280f, - 0.313681740398891570f, -0.949528180593036670f, 0.302005949319228200f, - -0.953306040354193750f, - 0.290284677254462330f, -0.956940335732208940f, 0.278519689385053060f, - -0.960430519415565790f, - 0.266712757474898420f, -0.963776065795439840f, 0.254865659604514630f, - -0.966976471044852070f, - 0.242980179903263980f, -0.970031253194543970f, 0.231058108280671280f, - -0.972939952205560070f, - 0.219101240156869770f, -0.975702130038528570f, 0.207111376192218560f, - -0.978317370719627650f, - 0.195090322016128330f, -0.980785280403230430f, 0.183039887955141060f, - -0.983105487431216290f, - 0.170961888760301360f, -0.985277642388941220f, 0.158858143333861390f, - -0.987301418157858430f, - 0.146730474455361750f, -0.989176509964781010f, 0.134580708507126220f, - -0.990902635427780010f, - 0.122410675199216280f, -0.992479534598709970f, 0.110222207293883180f, - -0.993906970002356060f, - 0.098017140329560770f, -0.995184726672196820f, 0.085797312344439880f, - -0.996312612182778000f, - 0.073564563599667454f, -0.997290456678690210f, 0.061320736302208648f, - -0.998118112900149180f, - 0.049067674327418126f, -0.998795456205172410f, 0.036807222941358991f, - -0.999322384588349540f, - 0.024541228522912264f, -0.999698818696204250f, 0.012271538285719944f, - -0.999924701839144500f -}; - -static const float32_t Weights_512[1024] = { - 1.000000000000000000f, 0.000000000000000000f, 0.999995293809576190f, - -0.003067956762965976f, - 0.999981175282601110f, -0.006135884649154475f, 0.999957644551963900f, - -0.009203754782059819f, - 0.999924701839144500f, -0.012271538285719925f, 0.999882347454212560f, - -0.015339206284988100f, - 0.999830581795823400f, -0.018406729905804820f, 0.999769405351215280f, - -0.021474080275469508f, - 0.999698818696204250f, -0.024541228522912288f, 0.999618822495178640f, - -0.027608145778965740f, - 0.999529417501093140f, -0.030674803176636626f, 0.999430604555461730f, - -0.033741171851377580f, - 0.999322384588349540f, -0.036807222941358832f, 0.999204758618363890f, - -0.039872927587739811f, - 0.999077727752645360f, -0.042938256934940820f, 0.998941293186856870f, - -0.046003182130914623f, - 0.998795456205172410f, -0.049067674327418015f, 0.998640218180265270f, - -0.052131704680283324f, - 0.998475580573294770f, -0.055195244349689934f, 0.998301544933892890f, - -0.058258264500435752f, - 0.998118112900149180f, -0.061320736302208578f, 0.997925286198596000f, - -0.064382630929857465f, - 0.997723066644191640f, -0.067443919563664051f, 0.997511456140303450f, - -0.070504573389613856f, - 0.997290456678690210f, -0.073564563599667426f, 0.997060070339482960f, - -0.076623861392031492f, - 0.996820299291165670f, -0.079682437971430126f, 0.996571145790554840f, - -0.082740264549375692f, - 0.996312612182778000f, -0.085797312344439894f, 0.996044700901251970f, - -0.088853552582524600f, - 0.995767414467659820f, -0.091908956497132724f, 0.995480755491926940f, - -0.094963495329638992f, - 0.995184726672196930f, -0.098017140329560604f, 0.994879330794805620f, - -0.101069862754827820f, - 0.994564570734255420f, -0.104121633872054590f, 0.994240449453187900f, - -0.107172424956808840f, - 0.993906970002356060f, -0.110222207293883060f, 0.993564135520595300f, - -0.113270952177564350f, - 0.993211949234794500f, -0.116318630911904750f, 0.992850414459865100f, - -0.119365214810991350f, - 0.992479534598709970f, -0.122410675199216200f, 0.992099313142191800f, - -0.125454983411546230f, - 0.991709753669099530f, -0.128498110793793170f, 0.991310859846115440f, - -0.131540028702883120f, - 0.990902635427780010f, -0.134580708507126170f, 0.990485084256457090f, - -0.137620121586486040f, - 0.990058210262297120f, -0.140658239332849210f, 0.989622017463200890f, - -0.143695033150294470f, - 0.989176509964781010f, -0.146730474455361750f, 0.988721691960323780f, - -0.149764534677321510f, - 0.988257567730749460f, -0.152797185258443440f, 0.987784141644572180f, - -0.155828397654265230f, - 0.987301418157858430f, -0.158858143333861450f, 0.986809401814185530f, - -0.161886393780111830f, - 0.986308097244598670f, -0.164913120489969890f, 0.985797509167567480f, - -0.167938294974731170f, - 0.985277642388941220f, -0.170961888760301220f, 0.984748501801904210f, - -0.173983873387463820f, - 0.984210092386929030f, -0.177004220412148750f, 0.983662419211730250f, - -0.180022901405699510f, - 0.983105487431216290f, -0.183039887955140950f, 0.982539302287441240f, - -0.186055151663446630f, - 0.981963869109555240f, -0.189068664149806190f, 0.981379193313754560f, - -0.192080397049892440f, - 0.980785280403230430f, -0.195090322016128250f, 0.980182135968117430f, - -0.198098410717953560f, - 0.979569765685440520f, -0.201104634842091900f, 0.978948175319062200f, - -0.204108966092816870f, - 0.978317370719627650f, -0.207111376192218560f, 0.977677357824509930f, - -0.210111836880469610f, - 0.977028142657754390f, -0.213110319916091360f, 0.976369731330021140f, - -0.216106797076219520f, - 0.975702130038528570f, -0.219101240156869800f, 0.975025345066994120f, - -0.222093620973203510f, - 0.974339382785575860f, -0.225083911359792830f, 0.973644249650811980f, - -0.228072083170885730f, - 0.972939952205560180f, -0.231058108280671110f, 0.972226497078936270f, - -0.234041958583543430f, - 0.971503890986251780f, -0.237023605994367200f, 0.970772140728950350f, - -0.240003022448741500f, - 0.970031253194543970f, -0.242980179903263870f, 0.969281235356548530f, - -0.245955050335794590f, - 0.968522094274417380f, -0.248927605745720150f, 0.967753837093475510f, - -0.251897818154216970f, - 0.966976471044852070f, -0.254865659604514570f, 0.966190003445412500f, - -0.257831102162158990f, - 0.965394441697689400f, -0.260794117915275510f, 0.964589793289812760f, - -0.263754678974831350f, - 0.963776065795439840f, -0.266712757474898370f, 0.962953266873683880f, - -0.269668325572915090f, - 0.962121404269041580f, -0.272621355449948980f, 0.961280485811320640f, - -0.275571819310958140f, - 0.960430519415565790f, -0.278519689385053060f, 0.959571513081984520f, - -0.281464937925757940f, - 0.958703474895871600f, -0.284407537211271880f, 0.957826413027532910f, - -0.287347459544729510f, - 0.956940335732208820f, -0.290284677254462330f, 0.956045251349996410f, - -0.293219162694258630f, - 0.955141168305770780f, -0.296150888243623790f, 0.954228095109105670f, - -0.299079826308040480f, - 0.953306040354193860f, -0.302005949319228080f, 0.952375012719765880f, - -0.304929229735402370f, - 0.951435020969008340f, -0.307849640041534870f, 0.950486073949481700f, - -0.310767152749611470f, - 0.949528180593036670f, -0.313681740398891520f, 0.948561349915730270f, - -0.316593375556165850f, - 0.947585591017741090f, -0.319502030816015690f, 0.946600913083283530f, - -0.322407678801069850f, - 0.945607325380521280f, -0.325310292162262930f, 0.944604837261480260f, - -0.328209843579092500f, - 0.943593458161960390f, -0.331106305759876430f, 0.942573197601446870f, - -0.333999651442009380f, - 0.941544065183020810f, -0.336889853392220050f, 0.940506070593268300f, - -0.339776884406826850f, - 0.939459223602189920f, -0.342660717311994380f, 0.938403534063108060f, - -0.345541324963989090f, - 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-0.999860857979768540, - 0.016489546112956454, -0.999864038191687680, 0.016297824282859176, - -0.999867181641464380, - 0.016106101853537263, -0.999870288328982950, 0.015914378832040249, - -0.999873358254129260, - 0.015722655225417017, -0.999876391416790410, 0.015530931040716478, - -0.999879387816854930, - 0.015339206284988220, -0.999882347454212560, 0.015147480965280975, - -0.999885270328754520, - 0.014955755088644378, -0.999888156440373320, 0.014764028662127416, - -0.999891005788962950, - 0.014572301692779104, -0.999893818374418490, 0.014380574187649138, - -0.999896594196636680, - 0.014188846153786343, -0.999899333255515390, 0.013997117598240459, - -0.999902035550953920, - 0.013805388528060349, -0.999904701082852900, 0.013613658950295789, - -0.999907329851114300, - 0.013421928871995907, -0.999909921855641540, 0.013230198300209845, - -0.999912477096339240, - 0.013038467241987433, -0.999914995573113470, 0.012846735704377631, - -0.999917477285871770, - 0.012655003694430301, -0.999919922234522750, 0.012463271219194662, - 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-0.999991892856248010, - 0.003834942569706248, -0.999992646580707190, 0.003643196311896179, - -0.999993363538295150, - 0.003451449920135975, -0.999994043728985820, 0.003259703401476044, - -0.999994687152754080, - 0.003067956762966138, -0.999995293809576190, 0.002876210011656010, - -0.999995863699429940, - 0.002684463154596083, -0.999996396822294350, 0.002492716198835898, - -0.999996893178149880, - 0.002300969151425887, -0.999997352766978210, 0.002109222019415816, - -0.999997775588762350, - 0.001917474809855460, -0.999998161643486980, 0.001725727529795258, - -0.999998510931137790, - 0.001533980186284766, -0.999998823451701880, 0.001342232786374430, - -0.999999099205167830, - 0.001150485337113809, -0.999999338191525530, 0.000958737845553352, - -0.999999540410766110, - 0.000766990318742846, -0.999999705862882230, 0.000575242763732077, - -0.999999834547867670, - 0.000383495187571497, -0.999999926465717890, 0.000191747597310674, - -0.999999981616429330, - -}; - -/** -* \par -* cosFactor tables are generated using the formula :
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
-* \par -* C command to generate the table -* \par -*
 for(i = 0; i< N; i++)    
-* {    
-*    cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
-* \par -* where N is the number of factors to generate and c is pi/(2*N) -*/ -static const float32_t cos_factors_128[128] = { - 0.999981175282601110f, 0.999830581795823400f, 0.999529417501093140f, - 0.999077727752645360f, - 0.998475580573294770f, 0.997723066644191640f, 0.996820299291165670f, - 0.995767414467659820f, - 0.994564570734255420f, 0.993211949234794500f, 0.991709753669099530f, - 0.990058210262297120f, - 0.988257567730749460f, 0.986308097244598670f, 0.984210092386929030f, - 0.981963869109555240f, - 0.979569765685440520f, 0.977028142657754390f, 0.974339382785575860f, - 0.971503890986251780f, - 0.968522094274417380f, 0.965394441697689400f, 0.962121404269041580f, - 0.958703474895871600f, - 0.955141168305770780f, 0.951435020969008340f, 0.947585591017741090f, - 0.943593458161960390f, - 0.939459223602189920f, 0.935183509938947610f, 0.930766961078983710f, - 0.926210242138311380f, - 0.921514039342042010f, 0.916679059921042700f, 0.911706032005429880f, - 0.906595704514915330f, - 0.901348847046022030f, 0.895966249756185220f, 0.890448723244757880f, - 0.884797098430937790f, - 0.879012226428633530f, 0.873094978418290090f, 0.867046245515692650f, - 0.860866938637767310f, - 0.854557988365400530f, 0.848120344803297230f, 0.841554977436898440f, - 0.834862874986380010f, - 0.828045045257755800f, 0.821102514991104650f, 0.814036329705948410f, - 0.806847553543799330f, - 0.799537269107905010f, 0.792106577300212390f, 0.784556597155575240f, - 0.776888465673232440f, - 0.769103337645579700f, 0.761202385484261780f, 0.753186799043612520f, - 0.745057785441466060f, - 0.736816568877369900f, 0.728464390448225200f, 0.720002507961381650f, - 0.711432195745216430f, - 0.702754744457225300f, 0.693971460889654000f, 0.685083667772700360f, - 0.676092703575316030f, - 0.666999922303637470f, 0.657806693297078640f, 0.648514401022112550f, - 0.639124444863775730f, - 0.629638238914927100f, 0.620057211763289210f, 0.610382806276309480f, - 0.600616479383868970f, - 0.590759701858874280f, 0.580813958095764530f, 0.570780745886967370f, - 0.560661576197336030f, - 0.550457972936604810f, 0.540171472729892970f, 0.529803624686294830f, - 0.519355990165589530f, - 0.508830142543106990f, 0.498227666972781870f, 0.487550160148436050f, - 0.476799230063322250f, - 0.465976495767966130f, 0.455083587126343840f, 0.444122144570429260f, - 0.433093818853152010f, - 0.422000270799799790f, 0.410843171057903910f, 0.399624199845646790f, - 0.388345046698826300f, - 0.377007410216418310f, 0.365612997804773960f, 0.354163525420490510f, - 0.342660717311994380f, - 0.331106305759876430f, 0.319502030816015750f, 0.307849640041534980f, - 0.296150888243623960f, - 0.284407537211271820f, 0.272621355449948980f, 0.260794117915275570f, - 0.248927605745720260f, - 0.237023605994367340f, 0.225083911359792780f, 0.213110319916091360f, - 0.201104634842091960f, - 0.189068664149806280f, 0.177004220412148860f, 0.164913120489970090f, - 0.152797185258443410f, - 0.140658239332849240f, 0.128498110793793220f, 0.116318630911904880f, - 0.104121633872054730f, - 0.091908956497132696f, 0.079682437971430126f, 0.067443919563664106f, - 0.055195244349690031f, - 0.042938256934940959f, 0.030674803176636581f, 0.018406729905804820f, - 0.006135884649154515f -}; - -static const float32_t cos_factors_512[512] = { - 0.999998823451701880f, 0.999989411081928400f, 0.999970586430974140f, - 0.999942349676023910f, - 0.999904701082852900f, 0.999857641005823860f, 0.999801169887884260f, - 0.999735288260561680f, - 0.999659996743959220f, 0.999575296046749220f, 0.999481186966166950f, - 0.999377670388002850f, - 0.999264747286594420f, 0.999142418724816910f, 0.999010685854073380f, - 0.998869549914283560f, - 0.998719012233872940f, 0.998559074229759310f, 0.998389737407340160f, - 0.998211003360478190f, - 0.998022873771486240f, 0.997825350411111640f, 0.997618435138519550f, - 0.997402129901275300f, - 0.997176436735326190f, 0.996941357764982160f, 0.996696895202896060f, - 0.996443051350042630f, - 0.996179828595696980f, 0.995907229417411720f, 0.995625256380994310f, - 0.995333912140482280f, - 0.995033199438118630f, 0.994723121104325700f, 0.994403680057679100f, - 0.994074879304879370f, - 0.993736721940724600f, 0.993389211148080650f, 0.993032350197851410f, - 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0.111730650802029900, 0.111347752452754000, 0.110964850009539970, - 0.110581943486465610, - 0.110199032897608850, 0.109816118257049110, 0.109433199578864170, - 0.109050276877133770, - 0.108667350165936400, 0.108284419459350770, 0.107901484771457020, - 0.107518546116333660, - 0.107135603508061170, 0.106752656960718350, 0.106369706488385940, - 0.105986752105143480, - 0.105603793825070680, 0.105220831662248700, 0.104837865630757090, - 0.104454895744677270, - 0.104071922018089540, 0.103688944465074300, 0.103305963099713400, - 0.102922977936087120, - 0.102539988988277600, 0.102156996270365800, 0.101773999796432830, - 0.101390999580561250, - 0.101007995636832020, 0.100624987979327970, 0.100241976622130760, - 0.099858961579322170, - 0.099475942864985456, 0.099092920493202258, 0.098709894478056073, - 0.098326864833628791, - 0.097943831574004214, 0.097560794713264939, 0.097177754265493674, - 0.096794710244774623, - 0.096411662665190329, 0.096028611540825232, 0.095645556885762609, - 0.095262498714085819, - 0.094879437039879722, 0.094496371877227495, 0.094113303240214247, - 0.093730231142923864, - 0.093347155599440373, 0.092964076623849271, 0.092580994230234359, - 0.092197908432681386, - 0.091814819245274432, 0.091431726682099479, 0.091048630757241303, - 0.090665531484784803, - 0.090282428878816323, 0.089899322953420582, 0.089516213722684160, - 0.089133101200692441, - 0.088749985401530951, 0.088366866339286629, 0.087983744028044805, - 0.087600618481892656, - 0.087217489714916191, 0.086834357741201490, 0.086451222574836131, - 0.086068084229906014, - 0.085684942720498897, 0.085301798060701386, 0.084918650264600160, - 0.084535499346283349, - 0.084152345319837438, 0.083769188199350780, 0.083386027998910095, - 0.083002864732603973, - 0.082619698414519799, 0.082236529058745025, 0.081853356679368619, - 0.081470181290477811, - 0.081087002906161790, 0.080703821540508452, 0.080320637207605849, - 0.079937449921543474, - 0.079554259696409127, 0.079171066546292510, 0.078787870485282088, - 0.078404671527466441, - 0.078021469686935602, 0.077638264977777913, 0.077255057414083589, - 0.076871847009941652, - 0.076488633779441206, 0.076105417736672773, 0.075722198895725248, - 0.075338977270689375, - 0.074955752875654230, 0.074572525724710764, 0.074189295831948693, - 0.073806063211457842, - 0.073422827877329483, 0.073039589843653177, 0.072656349124520389, - 0.072273105734021334, - 0.071889859686246352, 0.071506610995287156, 0.071123359675233852, - 0.070740105740178361, - 0.070356849204211397, 0.069973590081423773, 0.069590328385907715, - 0.069207064131753759, - 0.068823797333054326, 0.068440528003900616, 0.068057256158383886, - 0.067673981810596848, - 0.067290704974630494, 0.066907425664577733, 0.066524143894529736, - 0.066140859678579578, - 0.065757573030819083, 0.065374283965340146, 0.064990992496236119, - 0.064607698637598646, - 0.064224402403521202, 0.063841103808096086, 0.063457802865415636, - 0.063074499589573618, - 0.062691193994662109, 0.062307886094775049, 0.061924575904005130, - 0.061541263436445129, - 0.061157948706189229, 0.060774631727329942, 0.060391312513961619, - 0.060007991080177375, - 0.059624667440070382, 0.059241341607735261, 0.058858013597264912, - 0.058474683422754095, - 0.058091351098295878, 0.057708016637985186, 0.057324680055915692, - 0.056941341366181127, - 0.056558000582876661, 0.056174657720095743, 0.055791312791933681, - 0.055407965812484541, - 0.055024616795842439, 0.054641265756102911, 0.054257912707359794, - 0.053874557663708772, - 0.053491200639244271, 0.053107841648060788, 0.052724480704254229, - 0.052341117821918783, - 0.051957753015150501, 0.051574386298044173, 0.051191017684694640, - 0.050807647189198162, - 0.050424274825649297, 0.050040900608144430, 0.049657524550778251, - 0.049274146667647289, - 0.048890766972846805, 0.048507385480472134, 0.048124002204620014, - 0.047740617159385448, - 0.047357230358865306, 0.046973841817155179, 0.046590451548350717, - 0.046207059566548990, - 0.045823665885845313, 0.045440270520336883, 0.045056873484119603, - 0.044673474791289434, - 0.044290074455943754, 0.043906672492178188, 0.043523268914090238, - 0.043139863735776100, - 0.042756456971332048, 0.042373048634855741, 0.041989638740443119, - 0.041606227302191955, - 0.041222814334198304, 0.040839399850560058, 0.040455983865373815, - 0.040072566392736257, - 0.039689147446745419, 0.039305727041497644, 0.038922305191091085, - 0.038538881909622631, - 0.038155457211189216, 0.037772031109889144, 0.037388603619819022, - 0.037005174755077273, - 0.036621744529761024, 0.036238312957967478, 0.035854880053795196, - 0.035471445831341021, - 0.035088010304703626, 0.034704573487980395, 0.034321135395268765, - 0.033937696040667535, - 0.033554255438273790, 0.033170813602186440, 0.032787370546502645, - 0.032403926285321405, - 0.032020480832740429, 0.031637034202857461, 0.031253586409771626, - 0.030870137467580314, - 0.030486687390382738, 0.030103236192276818, 0.029719783887360508, - 0.029336330489733147, - 0.028952876013492331, 0.028569420472737472, 0.028185963881566689, - 0.027802506254078142, - 0.027419047604371360, 0.027035587946544135, 0.026652127294696067, - 0.026268665662925468, - 0.025885203065330677, 0.025501739516011413, 0.025118275029065638, - 0.024734809618593138, - 0.024351343298691951, 0.023967876083461924, 0.023584407987001611, - 0.023200939023409587, - 0.022817469206785804, 0.022433998551228459, 0.022050527070837558, - 0.021667054779711814, - 0.021283581691949955, 0.020900107821652084, 0.020516633182916549, - 0.020133157789843505, - 0.019749681656531803, 0.019366204797080316, 0.018982727225589285, - 0.018599248956157190, - 0.018215770002884327, 0.017832290379869671, 0.017448810101212228, - 0.017065329181012358, - 0.016681847633368677, 0.016298365472381587, 0.015914882712149747, - 0.015531399366773606, - 0.015147915450352307, 0.014764430976985016, 0.014380945960772247, - 0.013997460415812761, - 0.013613974356207112, 0.013230487796054543, 0.012847000749454314, - 0.012463513230507034, - 0.012080025253311559, 0.011696536831968529, 0.011313047980577277, - 0.010929558713237145, - 0.010546069044048827, 0.010162578987111254, 0.009779088556525145, - 0.009395597766389905, - 0.009012106630804949, 0.008628615163871038, 0.008245123379687167, - 0.007861631292354124, - 0.007478138915970929, 0.007094646264638386, 0.006711153352455981, - 0.006327660193523208, - 0.005944166801940901, 0.005560673191808128, 0.005177179377225743, - 0.004793685372293270, - 0.004410191191110246, 0.004026696847777542, 0.003643202356394263, - 0.003259707731061291, - 0.002876212985878184, 0.002492718134944503, 0.002109223192361147, - 0.001725728172227238, - 0.001342233088643682, 0.000958737955710053, 0.000575242787525925, - 0.000191747598192208, - -}; - -/** - * @brief Initialization function for the floating-point DCT4/IDCT4. - * @param[in,out] *S points to an instance of floating-point DCT4/IDCT4 structure. - * @param[in] *S_RFFT points to an instance of floating-point RFFT/RIFFT structure. - * @param[in] *S_CFFT points to an instance of floating-point CFFT/CIFFT structure. - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length. - * \par Normalizing factor: - * The normalizing factor is sqrt(2/N), which depends on the size of transform N. - * Floating-point normalizing factors are mentioned in the table below for different DCT sizes: - * \image html dct4NormalizingF32Table.gif - */ - -arm_status arm_dct4_init_f32( - arm_dct4_instance_f32 * S, - arm_rfft_instance_f32 * S_RFFT, - arm_cfft_radix4_instance_f32 * S_CFFT, - uint16_t N, - uint16_t Nby2, - float32_t normalize) -{ - /* Initialize the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initializing the pointer array with the weight table base addresses of different lengths */ - float32_t *twiddlePtr[4] = - { (float32_t *) Weights_128, (float32_t *) Weights_512, - (float32_t *) Weights_2048, (float32_t *) Weights_8192 - }; - - /* Initializing the pointer array with the cos factor table base addresses of different lengths */ - float32_t *pCosFactor[4] = - { (float32_t *) cos_factors_128, (float32_t *) cos_factors_512, - (float32_t *) cos_factors_2048, (float32_t *) cos_factors_8192 - }; - - /* Initialize the DCT4 length */ - S->N = N; - - /* Initialize the half of DCT4 length */ - S->Nby2 = Nby2; - - /* Initialize the DCT4 Normalizing factor */ - S->normalize = normalize; - - /* Initialize Real FFT Instance */ - S->pRfft = S_RFFT; - - /* Initialize Complex FFT Instance */ - S->pCfft = S_CFFT; - - switch (N) - { - /* Initialize the table modifier values */ - case 8192u: - S->pTwiddle = twiddlePtr[3]; - S->pCosFactor = pCosFactor[3]; - break; - case 2048u: - S->pTwiddle = twiddlePtr[2]; - S->pCosFactor = pCosFactor[2]; - break; - case 512u: - S->pTwiddle = twiddlePtr[1]; - S->pCosFactor = pCosFactor[1]; - break; - case 128u: - S->pTwiddle = twiddlePtr[0]; - S->pCosFactor = pCosFactor[0]; - break; - default: - status = ARM_MATH_ARGUMENT_ERROR; - } - - /* Initialize the RFFT/RIFFT */ - arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0u, 1u); - - /* return the status of DCT4 Init function */ - return (status); -} - -/** - * @} end of DCT4_IDCT4 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c deleted file mode 100644 index 8038716bd7..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c +++ /dev/null @@ -1,4276 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dct4_init_q15.c -* -* Description: Initialization function of DCT-4 & IDCT4 Q15 -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup DCT4_IDCT4 - * @{ - */ - -/* -* @brief Weights Table -*/ - -/** -* \par -* Weights tables are generated using the formula :
weights[n] = e^(-j*n*pi/(2*N))
-* \par -* C command to generate the table -*
    
-* for(i = 0; i< N; i++)    
-* {    
-*   weights[2*i]= cos(i*c);    
-*   weights[(2*i)+1]= -sin(i * c);    
-* } 
-* \par -* where N is the Number of weights to be calculated and c is pi/(2*N) -* \par -* Converted the output to q15 format by multiplying with 2^31 and saturated if required. -* \par -* In the tables below the real and imaginary values are placed alternatively, hence the -* array length is 2*N. -*/ - -static const q15_t ALIGN4 WeightsQ15_128[256] = { - 0x7fff, 0x0, 0x7ffd, 0xfe6e, 0x7ff6, 0xfcdc, 0x7fe9, 0xfb4a, - 0x7fd8, 0xf9b9, 0x7fc2, 0xf827, 0x7fa7, 0xf696, 0x7f87, 0xf505, - 0x7f62, 0xf375, 0x7f38, 0xf1e5, 0x7f09, 0xf055, 0x7ed5, 0xeec7, - 0x7e9d, 0xed38, 0x7e5f, 0xebab, 0x7e1d, 0xea1e, 0x7dd6, 0xe893, - 0x7d8a, 0xe708, 0x7d39, 0xe57e, 0x7ce3, 0xe3f5, 0x7c89, 0xe26d, - 0x7c29, 0xe0e7, 0x7bc5, 0xdf61, 0x7b5d, 0xdddd, 0x7aef, 0xdc5a, - 0x7a7d, 0xdad8, 0x7a05, 0xd958, 0x798a, 0xd7da, 0x7909, 0xd65d, - 0x7884, 0xd4e1, 0x77fa, 0xd368, 0x776c, 0xd1ef, 0x76d9, 0xd079, - 0x7641, 0xcf05, 0x75a5, 0xcd92, 0x7504, 0xcc22, 0x745f, 0xcab3, - 0x73b5, 0xc946, 0x7307, 0xc7dc, 0x7255, 0xc674, 0x719e, 0xc50e, - 0x70e2, 0xc3aa, 0x7023, 0xc248, 0x6f5f, 0xc0e9, 0x6e96, 0xbf8d, - 0x6dca, 0xbe32, 0x6cf9, 0xbcdb, 0x6c24, 0xbb86, 0x6b4a, 0xba33, - 0x6a6d, 0xb8e4, 0x698c, 0xb797, 0x68a6, 0xb64c, 0x67bd, 0xb505, - 0x66cf, 0xb3c1, 0x65dd, 0xb27f, 0x64e8, 0xb141, 0x63ef, 0xb005, - 0x62f2, 0xaecd, 0x61f1, 0xad97, 0x60ec, 0xac65, 0x5fe3, 0xab36, - 0x5ed7, 0xaa0b, 0x5dc7, 0xa8e3, 0x5cb4, 0xa7be, 0x5b9d, 0xa69c, - 0x5a82, 0xa57e, 0x5964, 0xa463, 0x5842, 0xa34c, 0x571d, 0xa239, - 0x55f5, 0xa129, 0x54ca, 0xa01d, 0x539b, 0x9f14, 0x5269, 0x9e0f, - 0x5133, 0x9d0e, 0x4ffb, 0x9c11, 0x4ebf, 0x9b18, 0x4d81, 0x9a23, - 0x4c3f, 0x9931, 0x4afb, 0x9843, 0x49b4, 0x975a, 0x4869, 0x9674, - 0x471c, 0x9593, 0x45cd, 0x94b6, 0x447a, 0x93dc, 0x4325, 0x9307, - 0x41ce, 0x9236, 0x4073, 0x916a, 0x3f17, 0x90a1, 0x3db8, 0x8fdd, - 0x3c56, 0x8f1e, 0x3af2, 0x8e62, 0x398c, 0x8dab, 0x3824, 0x8cf9, - 0x36ba, 0x8c4b, 0x354d, 0x8ba1, 0x33de, 0x8afc, 0x326e, 0x8a5b, - 0x30fb, 0x89bf, 0x2f87, 0x8927, 0x2e11, 0x8894, 0x2c98, 0x8806, - 0x2b1f, 0x877c, 0x29a3, 0x86f7, 0x2826, 0x8676, 0x26a8, 0x85fb, - 0x2528, 0x8583, 0x23a6, 0x8511, 0x2223, 0x84a3, 0x209f, 0x843b, - 0x1f19, 0x83d7, 0x1d93, 0x8377, 0x1c0b, 0x831d, 0x1a82, 0x82c7, - 0x18f8, 0x8276, 0x176d, 0x822a, 0x15e2, 0x81e3, 0x1455, 0x81a1, - 0x12c8, 0x8163, 0x1139, 0x812b, 0xfab, 0x80f7, 0xe1b, 0x80c8, - 0xc8b, 0x809e, 0xafb, 0x8079, 0x96a, 0x8059, 0x7d9, 0x803e, - 0x647, 0x8028, 0x4b6, 0x8017, 0x324, 0x800a, 0x192, 0x8003, -}; - -static const q15_t ALIGN4 WeightsQ15_512[1024] = { - 0x7fff, 0x0, 0x7fff, 0xff9c, 0x7fff, 0xff37, 0x7ffe, 0xfed3, - 0x7ffd, 0xfe6e, 0x7ffc, 0xfe0a, 0x7ffa, 0xfda5, 0x7ff8, 0xfd41, - 0x7ff6, 0xfcdc, 0x7ff3, 0xfc78, 0x7ff0, 0xfc13, 0x7fed, 0xfbaf, - 0x7fe9, 0xfb4a, 0x7fe5, 0xfae6, 0x7fe1, 0xfa81, 0x7fdd, 0xfa1d, - 0x7fd8, 0xf9b9, 0x7fd3, 0xf954, 0x7fce, 0xf8f0, 0x7fc8, 0xf88b, - 0x7fc2, 0xf827, 0x7fbc, 0xf7c3, 0x7fb5, 0xf75e, 0x7fae, 0xf6fa, - 0x7fa7, 0xf696, 0x7f9f, 0xf632, 0x7f97, 0xf5cd, 0x7f8f, 0xf569, - 0x7f87, 0xf505, 0x7f7e, 0xf4a1, 0x7f75, 0xf43d, 0x7f6b, 0xf3d9, - 0x7f62, 0xf375, 0x7f58, 0xf311, 0x7f4d, 0xf2ad, 0x7f43, 0xf249, - 0x7f38, 0xf1e5, 0x7f2d, 0xf181, 0x7f21, 0xf11d, 0x7f15, 0xf0b9, - 0x7f09, 0xf055, 0x7efd, 0xeff2, 0x7ef0, 0xef8e, 0x7ee3, 0xef2a, - 0x7ed5, 0xeec7, 0x7ec8, 0xee63, 0x7eba, 0xedff, 0x7eab, 0xed9c, - 0x7e9d, 0xed38, 0x7e8e, 0xecd5, 0x7e7f, 0xec72, 0x7e6f, 0xec0e, - 0x7e5f, 0xebab, 0x7e4f, 0xeb48, 0x7e3f, 0xeae5, 0x7e2e, 0xea81, - 0x7e1d, 0xea1e, 0x7e0c, 0xe9bb, 0x7dfa, 0xe958, 0x7de8, 0xe8f6, - 0x7dd6, 0xe893, 0x7dc3, 0xe830, 0x7db0, 0xe7cd, 0x7d9d, 0xe76a, - 0x7d8a, 0xe708, 0x7d76, 0xe6a5, 0x7d62, 0xe643, 0x7d4e, 0xe5e0, - 0x7d39, 0xe57e, 0x7d24, 0xe51c, 0x7d0f, 0xe4b9, 0x7cf9, 0xe457, - 0x7ce3, 0xe3f5, 0x7ccd, 0xe393, 0x7cb7, 0xe331, 0x7ca0, 0xe2cf, - 0x7c89, 0xe26d, 0x7c71, 0xe20b, 0x7c5a, 0xe1aa, 0x7c42, 0xe148, - 0x7c29, 0xe0e7, 0x7c11, 0xe085, 0x7bf8, 0xe024, 0x7bdf, 0xdfc2, - 0x7bc5, 0xdf61, 0x7bac, 0xdf00, 0x7b92, 0xde9f, 0x7b77, 0xde3e, - 0x7b5d, 0xdddd, 0x7b42, 0xdd7c, 0x7b26, 0xdd1b, 0x7b0b, 0xdcbb, - 0x7aef, 0xdc5a, 0x7ad3, 0xdbf9, 0x7ab6, 0xdb99, 0x7a9a, 0xdb39, - 0x7a7d, 0xdad8, 0x7a5f, 0xda78, 0x7a42, 0xda18, 0x7a24, 0xd9b8, - 0x7a05, 0xd958, 0x79e7, 0xd8f9, 0x79c8, 0xd899, 0x79a9, 0xd839, - 0x798a, 0xd7da, 0x796a, 0xd77a, 0x794a, 0xd71b, 0x792a, 0xd6bc, - 0x7909, 0xd65d, 0x78e8, 0xd5fe, 0x78c7, 0xd59f, 0x78a6, 0xd540, - 0x7884, 0xd4e1, 0x7862, 0xd483, 0x7840, 0xd424, 0x781d, 0xd3c6, - 0x77fa, 0xd368, 0x77d7, 0xd309, 0x77b4, 0xd2ab, 0x7790, 0xd24d, - 0x776c, 0xd1ef, 0x7747, 0xd192, 0x7723, 0xd134, 0x76fe, 0xd0d7, - 0x76d9, 0xd079, 0x76b3, 0xd01c, 0x768e, 0xcfbf, 0x7668, 0xcf62, - 0x7641, 0xcf05, 0x761b, 0xcea8, 0x75f4, 0xce4b, 0x75cc, 0xcdef, - 0x75a5, 0xcd92, 0x757d, 0xcd36, 0x7555, 0xccda, 0x752d, 0xcc7e, - 0x7504, 0xcc22, 0x74db, 0xcbc6, 0x74b2, 0xcb6a, 0x7489, 0xcb0e, - 0x745f, 0xcab3, 0x7435, 0xca58, 0x740b, 0xc9fc, 0x73e0, 0xc9a1, - 0x73b5, 0xc946, 0x738a, 0xc8ec, 0x735f, 0xc891, 0x7333, 0xc836, - 0x7307, 0xc7dc, 0x72db, 0xc782, 0x72af, 0xc728, 0x7282, 0xc6ce, - 0x7255, 0xc674, 0x7227, 0xc61a, 0x71fa, 0xc5c0, 0x71cc, 0xc567, - 0x719e, 0xc50e, 0x716f, 0xc4b4, 0x7141, 0xc45b, 0x7112, 0xc403, - 0x70e2, 0xc3aa, 0x70b3, 0xc351, 0x7083, 0xc2f9, 0x7053, 0xc2a0, - 0x7023, 0xc248, 0x6ff2, 0xc1f0, 0x6fc1, 0xc198, 0x6f90, 0xc141, - 0x6f5f, 0xc0e9, 0x6f2d, 0xc092, 0x6efb, 0xc03b, 0x6ec9, 0xbfe3, - 0x6e96, 0xbf8d, 0x6e63, 0xbf36, 0x6e30, 0xbedf, 0x6dfd, 0xbe89, - 0x6dca, 0xbe32, 0x6d96, 0xbddc, 0x6d62, 0xbd86, 0x6d2d, 0xbd30, - 0x6cf9, 0xbcdb, 0x6cc4, 0xbc85, 0x6c8f, 0xbc30, 0x6c59, 0xbbdb, - 0x6c24, 0xbb86, 0x6bee, 0xbb31, 0x6bb8, 0xbadc, 0x6b81, 0xba88, - 0x6b4a, 0xba33, 0x6b13, 0xb9df, 0x6adc, 0xb98b, 0x6aa5, 0xb937, - 0x6a6d, 0xb8e4, 0x6a35, 0xb890, 0x69fd, 0xb83d, 0x69c4, 0xb7ea, - 0x698c, 0xb797, 0x6953, 0xb744, 0x6919, 0xb6f1, 0x68e0, 0xb69f, - 0x68a6, 0xb64c, 0x686c, 0xb5fa, 0x6832, 0xb5a8, 0x67f7, 0xb557, - 0x67bd, 0xb505, 0x6782, 0xb4b4, 0x6746, 0xb462, 0x670b, 0xb411, - 0x66cf, 0xb3c1, 0x6693, 0xb370, 0x6657, 0xb31f, 0x661a, 0xb2cf, - 0x65dd, 0xb27f, 0x65a0, 0xb22f, 0x6563, 0xb1df, 0x6526, 0xb190, - 0x64e8, 0xb141, 0x64aa, 0xb0f1, 0x646c, 0xb0a2, 0x642d, 0xb054, - 0x63ef, 0xb005, 0x63b0, 0xafb7, 0x6371, 0xaf69, 0x6331, 0xaf1b, - 0x62f2, 0xaecd, 0x62b2, 0xae7f, 0x6271, 0xae32, 0x6231, 0xade4, - 0x61f1, 0xad97, 0x61b0, 0xad4b, 0x616f, 0xacfe, 0x612d, 0xacb2, - 0x60ec, 0xac65, 0x60aa, 0xac19, 0x6068, 0xabcd, 0x6026, 0xab82, - 0x5fe3, 0xab36, 0x5fa0, 0xaaeb, 0x5f5e, 0xaaa0, 0x5f1a, 0xaa55, - 0x5ed7, 0xaa0b, 0x5e93, 0xa9c0, 0x5e50, 0xa976, 0x5e0b, 0xa92c, - 0x5dc7, 0xa8e3, 0x5d83, 0xa899, 0x5d3e, 0xa850, 0x5cf9, 0xa807, - 0x5cb4, 0xa7be, 0x5c6e, 0xa775, 0x5c29, 0xa72c, 0x5be3, 0xa6e4, - 0x5b9d, 0xa69c, 0x5b56, 0xa654, 0x5b10, 0xa60d, 0x5ac9, 0xa5c5, - 0x5a82, 0xa57e, 0x5a3b, 0xa537, 0x59f3, 0xa4f0, 0x59ac, 0xa4aa, - 0x5964, 0xa463, 0x591c, 0xa41d, 0x58d4, 0xa3d7, 0x588b, 0xa392, - 0x5842, 0xa34c, 0x57f9, 0xa307, 0x57b0, 0xa2c2, 0x5767, 0xa27d, - 0x571d, 0xa239, 0x56d4, 0xa1f5, 0x568a, 0xa1b0, 0x5640, 0xa16d, - 0x55f5, 0xa129, 0x55ab, 0xa0e6, 0x5560, 0xa0a2, 0x5515, 0xa060, - 0x54ca, 0xa01d, 0x547e, 0x9fda, 0x5433, 0x9f98, 0x53e7, 0x9f56, - 0x539b, 0x9f14, 0x534e, 0x9ed3, 0x5302, 0x9e91, 0x52b5, 0x9e50, - 0x5269, 0x9e0f, 0x521c, 0x9dcf, 0x51ce, 0x9d8f, 0x5181, 0x9d4e, - 0x5133, 0x9d0e, 0x50e5, 0x9ccf, 0x5097, 0x9c8f, 0x5049, 0x9c50, - 0x4ffb, 0x9c11, 0x4fac, 0x9bd3, 0x4f5e, 0x9b94, 0x4f0f, 0x9b56, - 0x4ebf, 0x9b18, 0x4e70, 0x9ada, 0x4e21, 0x9a9d, 0x4dd1, 0x9a60, - 0x4d81, 0x9a23, 0x4d31, 0x99e6, 0x4ce1, 0x99a9, 0x4c90, 0x996d, - 0x4c3f, 0x9931, 0x4bef, 0x98f5, 0x4b9e, 0x98ba, 0x4b4c, 0x987e, - 0x4afb, 0x9843, 0x4aa9, 0x9809, 0x4a58, 0x97ce, 0x4a06, 0x9794, - 0x49b4, 0x975a, 0x4961, 0x9720, 0x490f, 0x96e7, 0x48bc, 0x96ad, - 0x4869, 0x9674, 0x4816, 0x963c, 0x47c3, 0x9603, 0x4770, 0x95cb, - 0x471c, 0x9593, 0x46c9, 0x955b, 0x4675, 0x9524, 0x4621, 0x94ed, - 0x45cd, 0x94b6, 0x4578, 0x947f, 0x4524, 0x9448, 0x44cf, 0x9412, - 0x447a, 0x93dc, 0x4425, 0x93a7, 0x43d0, 0x9371, 0x437b, 0x933c, - 0x4325, 0x9307, 0x42d0, 0x92d3, 0x427a, 0x929e, 0x4224, 0x926a, - 0x41ce, 0x9236, 0x4177, 0x9203, 0x4121, 0x91d0, 0x40ca, 0x919d, - 0x4073, 0x916a, 0x401d, 0x9137, 0x3fc5, 0x9105, 0x3f6e, 0x90d3, - 0x3f17, 0x90a1, 0x3ebf, 0x9070, 0x3e68, 0x903f, 0x3e10, 0x900e, - 0x3db8, 0x8fdd, 0x3d60, 0x8fad, 0x3d07, 0x8f7d, 0x3caf, 0x8f4d, - 0x3c56, 0x8f1e, 0x3bfd, 0x8eee, 0x3ba5, 0x8ebf, 0x3b4c, 0x8e91, - 0x3af2, 0x8e62, 0x3a99, 0x8e34, 0x3a40, 0x8e06, 0x39e6, 0x8dd9, - 0x398c, 0x8dab, 0x3932, 0x8d7e, 0x38d8, 0x8d51, 0x387e, 0x8d25, - 0x3824, 0x8cf9, 0x37ca, 0x8ccd, 0x376f, 0x8ca1, 0x3714, 0x8c76, - 0x36ba, 0x8c4b, 0x365f, 0x8c20, 0x3604, 0x8bf5, 0x35a8, 0x8bcb, - 0x354d, 0x8ba1, 0x34f2, 0x8b77, 0x3496, 0x8b4e, 0x343a, 0x8b25, - 0x33de, 0x8afc, 0x3382, 0x8ad3, 0x3326, 0x8aab, 0x32ca, 0x8a83, - 0x326e, 0x8a5b, 0x3211, 0x8a34, 0x31b5, 0x8a0c, 0x3158, 0x89e5, - 0x30fb, 0x89bf, 0x309e, 0x8998, 0x3041, 0x8972, 0x2fe4, 0x894d, - 0x2f87, 0x8927, 0x2f29, 0x8902, 0x2ecc, 0x88dd, 0x2e6e, 0x88b9, - 0x2e11, 0x8894, 0x2db3, 0x8870, 0x2d55, 0x884c, 0x2cf7, 0x8829, - 0x2c98, 0x8806, 0x2c3a, 0x87e3, 0x2bdc, 0x87c0, 0x2b7d, 0x879e, - 0x2b1f, 0x877c, 0x2ac0, 0x875a, 0x2a61, 0x8739, 0x2a02, 0x8718, - 0x29a3, 0x86f7, 0x2944, 0x86d6, 0x28e5, 0x86b6, 0x2886, 0x8696, - 0x2826, 0x8676, 0x27c7, 0x8657, 0x2767, 0x8638, 0x2707, 0x8619, - 0x26a8, 0x85fb, 0x2648, 0x85dc, 0x25e8, 0x85be, 0x2588, 0x85a1, - 0x2528, 0x8583, 0x24c7, 0x8566, 0x2467, 0x854a, 0x2407, 0x852d, - 0x23a6, 0x8511, 0x2345, 0x84f5, 0x22e5, 0x84da, 0x2284, 0x84be, - 0x2223, 0x84a3, 0x21c2, 0x8489, 0x2161, 0x846e, 0x2100, 0x8454, - 0x209f, 0x843b, 0x203e, 0x8421, 0x1fdc, 0x8408, 0x1f7b, 0x83ef, - 0x1f19, 0x83d7, 0x1eb8, 0x83be, 0x1e56, 0x83a6, 0x1df5, 0x838f, - 0x1d93, 0x8377, 0x1d31, 0x8360, 0x1ccf, 0x8349, 0x1c6d, 0x8333, - 0x1c0b, 0x831d, 0x1ba9, 0x8307, 0x1b47, 0x82f1, 0x1ae4, 0x82dc, - 0x1a82, 0x82c7, 0x1a20, 0x82b2, 0x19bd, 0x829e, 0x195b, 0x828a, - 0x18f8, 0x8276, 0x1896, 0x8263, 0x1833, 0x8250, 0x17d0, 0x823d, - 0x176d, 0x822a, 0x170a, 0x8218, 0x16a8, 0x8206, 0x1645, 0x81f4, - 0x15e2, 0x81e3, 0x157f, 0x81d2, 0x151b, 0x81c1, 0x14b8, 0x81b1, - 0x1455, 0x81a1, 0x13f2, 0x8191, 0x138e, 0x8181, 0x132b, 0x8172, - 0x12c8, 0x8163, 0x1264, 0x8155, 0x1201, 0x8146, 0x119d, 0x8138, - 0x1139, 0x812b, 0x10d6, 0x811d, 0x1072, 0x8110, 0x100e, 0x8103, - 0xfab, 0x80f7, 0xf47, 0x80eb, 0xee3, 0x80df, 0xe7f, 0x80d3, - 0xe1b, 0x80c8, 0xdb7, 0x80bd, 0xd53, 0x80b3, 0xcef, 0x80a8, - 0xc8b, 0x809e, 0xc27, 0x8095, 0xbc3, 0x808b, 0xb5f, 0x8082, - 0xafb, 0x8079, 0xa97, 0x8071, 0xa33, 0x8069, 0x9ce, 0x8061, - 0x96a, 0x8059, 0x906, 0x8052, 0x8a2, 0x804b, 0x83d, 0x8044, - 0x7d9, 0x803e, 0x775, 0x8038, 0x710, 0x8032, 0x6ac, 0x802d, - 0x647, 0x8028, 0x5e3, 0x8023, 0x57f, 0x801f, 0x51a, 0x801b, - 0x4b6, 0x8017, 0x451, 0x8013, 0x3ed, 0x8010, 0x388, 0x800d, - 0x324, 0x800a, 0x2bf, 0x8008, 0x25b, 0x8006, 0x1f6, 0x8004, - 0x192, 0x8003, 0x12d, 0x8002, 0xc9, 0x8001, 0x64, 0x8001, -}; - -static const q15_t ALIGN4 WeightsQ15_2048[4096] = { - 0x7fff, 0x0, 0x7fff, 0xffe7, 0x7fff, 0xffce, 0x7fff, 0xffb5, - 0x7fff, 0xff9c, 0x7fff, 0xff83, 0x7fff, 0xff6a, 0x7fff, 0xff51, - 0x7fff, 0xff37, 0x7fff, 0xff1e, 0x7fff, 0xff05, 0x7ffe, 0xfeec, - 0x7ffe, 0xfed3, 0x7ffe, 0xfeba, 0x7ffe, 0xfea1, 0x7ffd, 0xfe88, - 0x7ffd, 0xfe6e, 0x7ffd, 0xfe55, 0x7ffc, 0xfe3c, 0x7ffc, 0xfe23, - 0x7ffc, 0xfe0a, 0x7ffb, 0xfdf1, 0x7ffb, 0xfdd8, 0x7ffa, 0xfdbe, - 0x7ffa, 0xfda5, 0x7ff9, 0xfd8c, 0x7ff9, 0xfd73, 0x7ff8, 0xfd5a, - 0x7ff8, 0xfd41, 0x7ff7, 0xfd28, 0x7ff7, 0xfd0f, 0x7ff6, 0xfcf5, - 0x7ff6, 0xfcdc, 0x7ff5, 0xfcc3, 0x7ff4, 0xfcaa, 0x7ff4, 0xfc91, - 0x7ff3, 0xfc78, 0x7ff2, 0xfc5f, 0x7ff2, 0xfc46, 0x7ff1, 0xfc2c, - 0x7ff0, 0xfc13, 0x7fef, 0xfbfa, 0x7fee, 0xfbe1, 0x7fee, 0xfbc8, - 0x7fed, 0xfbaf, 0x7fec, 0xfb96, 0x7feb, 0xfb7d, 0x7fea, 0xfb64, - 0x7fe9, 0xfb4a, 0x7fe8, 0xfb31, 0x7fe7, 0xfb18, 0x7fe6, 0xfaff, - 0x7fe5, 0xfae6, 0x7fe4, 0xfacd, 0x7fe3, 0xfab4, 0x7fe2, 0xfa9b, - 0x7fe1, 0xfa81, 0x7fe0, 0xfa68, 0x7fdf, 0xfa4f, 0x7fde, 0xfa36, - 0x7fdd, 0xfa1d, 0x7fdc, 0xfa04, 0x7fda, 0xf9eb, 0x7fd9, 0xf9d2, - 0x7fd8, 0xf9b9, 0x7fd7, 0xf9a0, 0x7fd6, 0xf986, 0x7fd4, 0xf96d, - 0x7fd3, 0xf954, 0x7fd2, 0xf93b, 0x7fd0, 0xf922, 0x7fcf, 0xf909, - 0x7fce, 0xf8f0, 0x7fcc, 0xf8d7, 0x7fcb, 0xf8be, 0x7fc9, 0xf8a5, - 0x7fc8, 0xf88b, 0x7fc6, 0xf872, 0x7fc5, 0xf859, 0x7fc3, 0xf840, - 0x7fc2, 0xf827, 0x7fc0, 0xf80e, 0x7fbf, 0xf7f5, 0x7fbd, 0xf7dc, - 0x7fbc, 0xf7c3, 0x7fba, 0xf7aa, 0x7fb8, 0xf791, 0x7fb7, 0xf778, - 0x7fb5, 0xf75e, 0x7fb3, 0xf745, 0x7fb1, 0xf72c, 0x7fb0, 0xf713, - 0x7fae, 0xf6fa, 0x7fac, 0xf6e1, 0x7faa, 0xf6c8, 0x7fa9, 0xf6af, - 0x7fa7, 0xf696, 0x7fa5, 0xf67d, 0x7fa3, 0xf664, 0x7fa1, 0xf64b, - 0x7f9f, 0xf632, 0x7f9d, 0xf619, 0x7f9b, 0xf600, 0x7f99, 0xf5e7, - 0x7f97, 0xf5cd, 0x7f95, 0xf5b4, 0x7f93, 0xf59b, 0x7f91, 0xf582, - 0x7f8f, 0xf569, 0x7f8d, 0xf550, 0x7f8b, 0xf537, 0x7f89, 0xf51e, - 0x7f87, 0xf505, 0x7f85, 0xf4ec, 0x7f82, 0xf4d3, 0x7f80, 0xf4ba, - 0x7f7e, 0xf4a1, 0x7f7c, 0xf488, 0x7f79, 0xf46f, 0x7f77, 0xf456, - 0x7f75, 0xf43d, 0x7f72, 0xf424, 0x7f70, 0xf40b, 0x7f6e, 0xf3f2, - 0x7f6b, 0xf3d9, 0x7f69, 0xf3c0, 0x7f67, 0xf3a7, 0x7f64, 0xf38e, - 0x7f62, 0xf375, 0x7f5f, 0xf35c, 0x7f5d, 0xf343, 0x7f5a, 0xf32a, - 0x7f58, 0xf311, 0x7f55, 0xf2f8, 0x7f53, 0xf2df, 0x7f50, 0xf2c6, - 0x7f4d, 0xf2ad, 0x7f4b, 0xf294, 0x7f48, 0xf27b, 0x7f45, 0xf262, - 0x7f43, 0xf249, 0x7f40, 0xf230, 0x7f3d, 0xf217, 0x7f3b, 0xf1fe, - 0x7f38, 0xf1e5, 0x7f35, 0xf1cc, 0x7f32, 0xf1b3, 0x7f2f, 0xf19a, - 0x7f2d, 0xf181, 0x7f2a, 0xf168, 0x7f27, 0xf14f, 0x7f24, 0xf136, - 0x7f21, 0xf11d, 0x7f1e, 0xf104, 0x7f1b, 0xf0eb, 0x7f18, 0xf0d2, - 0x7f15, 0xf0b9, 0x7f12, 0xf0a0, 0x7f0f, 0xf087, 0x7f0c, 0xf06e, - 0x7f09, 0xf055, 0x7f06, 0xf03c, 0x7f03, 0xf023, 0x7f00, 0xf00b, - 0x7efd, 0xeff2, 0x7ef9, 0xefd9, 0x7ef6, 0xefc0, 0x7ef3, 0xefa7, - 0x7ef0, 0xef8e, 0x7eed, 0xef75, 0x7ee9, 0xef5c, 0x7ee6, 0xef43, - 0x7ee3, 0xef2a, 0x7edf, 0xef11, 0x7edc, 0xeef8, 0x7ed9, 0xeedf, - 0x7ed5, 0xeec7, 0x7ed2, 0xeeae, 0x7ecf, 0xee95, 0x7ecb, 0xee7c, - 0x7ec8, 0xee63, 0x7ec4, 0xee4a, 0x7ec1, 0xee31, 0x7ebd, 0xee18, - 0x7eba, 0xedff, 0x7eb6, 0xede7, 0x7eb3, 0xedce, 0x7eaf, 0xedb5, - 0x7eab, 0xed9c, 0x7ea8, 0xed83, 0x7ea4, 0xed6a, 0x7ea1, 0xed51, - 0x7e9d, 0xed38, 0x7e99, 0xed20, 0x7e95, 0xed07, 0x7e92, 0xecee, - 0x7e8e, 0xecd5, 0x7e8a, 0xecbc, 0x7e86, 0xeca3, 0x7e83, 0xec8a, - 0x7e7f, 0xec72, 0x7e7b, 0xec59, 0x7e77, 0xec40, 0x7e73, 0xec27, - 0x7e6f, 0xec0e, 0x7e6b, 0xebf5, 0x7e67, 0xebdd, 0x7e63, 0xebc4, - 0x7e5f, 0xebab, 0x7e5b, 0xeb92, 0x7e57, 0xeb79, 0x7e53, 0xeb61, - 0x7e4f, 0xeb48, 0x7e4b, 0xeb2f, 0x7e47, 0xeb16, 0x7e43, 0xeafd, - 0x7e3f, 0xeae5, 0x7e3b, 0xeacc, 0x7e37, 0xeab3, 0x7e32, 0xea9a, - 0x7e2e, 0xea81, 0x7e2a, 0xea69, 0x7e26, 0xea50, 0x7e21, 0xea37, - 0x7e1d, 0xea1e, 0x7e19, 0xea06, 0x7e14, 0xe9ed, 0x7e10, 0xe9d4, - 0x7e0c, 0xe9bb, 0x7e07, 0xe9a3, 0x7e03, 0xe98a, 0x7dff, 0xe971, - 0x7dfa, 0xe958, 0x7df6, 0xe940, 0x7df1, 0xe927, 0x7ded, 0xe90e, - 0x7de8, 0xe8f6, 0x7de4, 0xe8dd, 0x7ddf, 0xe8c4, 0x7dda, 0xe8ab, - 0x7dd6, 0xe893, 0x7dd1, 0xe87a, 0x7dcd, 0xe861, 0x7dc8, 0xe849, - 0x7dc3, 0xe830, 0x7dbf, 0xe817, 0x7dba, 0xe7fe, 0x7db5, 0xe7e6, - 0x7db0, 0xe7cd, 0x7dac, 0xe7b4, 0x7da7, 0xe79c, 0x7da2, 0xe783, - 0x7d9d, 0xe76a, 0x7d98, 0xe752, 0x7d94, 0xe739, 0x7d8f, 0xe720, - 0x7d8a, 0xe708, 0x7d85, 0xe6ef, 0x7d80, 0xe6d6, 0x7d7b, 0xe6be, - 0x7d76, 0xe6a5, 0x7d71, 0xe68d, 0x7d6c, 0xe674, 0x7d67, 0xe65b, - 0x7d62, 0xe643, 0x7d5d, 0xe62a, 0x7d58, 0xe611, 0x7d53, 0xe5f9, - 0x7d4e, 0xe5e0, 0x7d49, 0xe5c8, 0x7d43, 0xe5af, 0x7d3e, 0xe596, - 0x7d39, 0xe57e, 0x7d34, 0xe565, 0x7d2f, 0xe54d, 0x7d29, 0xe534, - 0x7d24, 0xe51c, 0x7d1f, 0xe503, 0x7d19, 0xe4ea, 0x7d14, 0xe4d2, - 0x7d0f, 0xe4b9, 0x7d09, 0xe4a1, 0x7d04, 0xe488, 0x7cff, 0xe470, - 0x7cf9, 0xe457, 0x7cf4, 0xe43f, 0x7cee, 0xe426, 0x7ce9, 0xe40e, - 0x7ce3, 0xe3f5, 0x7cde, 0xe3dc, 0x7cd8, 0xe3c4, 0x7cd3, 0xe3ab, - 0x7ccd, 0xe393, 0x7cc8, 0xe37a, 0x7cc2, 0xe362, 0x7cbc, 0xe349, - 0x7cb7, 0xe331, 0x7cb1, 0xe318, 0x7cab, 0xe300, 0x7ca6, 0xe2e8, - 0x7ca0, 0xe2cf, 0x7c9a, 0xe2b7, 0x7c94, 0xe29e, 0x7c8f, 0xe286, - 0x7c89, 0xe26d, 0x7c83, 0xe255, 0x7c7d, 0xe23c, 0x7c77, 0xe224, - 0x7c71, 0xe20b, 0x7c6c, 0xe1f3, 0x7c66, 0xe1db, 0x7c60, 0xe1c2, - 0x7c5a, 0xe1aa, 0x7c54, 0xe191, 0x7c4e, 0xe179, 0x7c48, 0xe160, - 0x7c42, 0xe148, 0x7c3c, 0xe130, 0x7c36, 0xe117, 0x7c30, 0xe0ff, - 0x7c29, 0xe0e7, 0x7c23, 0xe0ce, 0x7c1d, 0xe0b6, 0x7c17, 0xe09d, - 0x7c11, 0xe085, 0x7c0b, 0xe06d, 0x7c05, 0xe054, 0x7bfe, 0xe03c, - 0x7bf8, 0xe024, 0x7bf2, 0xe00b, 0x7beb, 0xdff3, 0x7be5, 0xdfdb, - 0x7bdf, 0xdfc2, 0x7bd9, 0xdfaa, 0x7bd2, 0xdf92, 0x7bcc, 0xdf79, - 0x7bc5, 0xdf61, 0x7bbf, 0xdf49, 0x7bb9, 0xdf30, 0x7bb2, 0xdf18, - 0x7bac, 0xdf00, 0x7ba5, 0xdee8, 0x7b9f, 0xdecf, 0x7b98, 0xdeb7, - 0x7b92, 0xde9f, 0x7b8b, 0xde87, 0x7b84, 0xde6e, 0x7b7e, 0xde56, - 0x7b77, 0xde3e, 0x7b71, 0xde26, 0x7b6a, 0xde0d, 0x7b63, 0xddf5, - 0x7b5d, 0xdddd, 0x7b56, 0xddc5, 0x7b4f, 0xddac, 0x7b48, 0xdd94, - 0x7b42, 0xdd7c, 0x7b3b, 0xdd64, 0x7b34, 0xdd4c, 0x7b2d, 0xdd33, - 0x7b26, 0xdd1b, 0x7b1f, 0xdd03, 0x7b19, 0xdceb, 0x7b12, 0xdcd3, - 0x7b0b, 0xdcbb, 0x7b04, 0xdca2, 0x7afd, 0xdc8a, 0x7af6, 0xdc72, - 0x7aef, 0xdc5a, 0x7ae8, 0xdc42, 0x7ae1, 0xdc2a, 0x7ada, 0xdc12, - 0x7ad3, 0xdbf9, 0x7acc, 0xdbe1, 0x7ac5, 0xdbc9, 0x7abd, 0xdbb1, - 0x7ab6, 0xdb99, 0x7aaf, 0xdb81, 0x7aa8, 0xdb69, 0x7aa1, 0xdb51, - 0x7a9a, 0xdb39, 0x7a92, 0xdb21, 0x7a8b, 0xdb09, 0x7a84, 0xdaf1, - 0x7a7d, 0xdad8, 0x7a75, 0xdac0, 0x7a6e, 0xdaa8, 0x7a67, 0xda90, - 0x7a5f, 0xda78, 0x7a58, 0xda60, 0x7a50, 0xda48, 0x7a49, 0xda30, - 0x7a42, 0xda18, 0x7a3a, 0xda00, 0x7a33, 0xd9e8, 0x7a2b, 0xd9d0, - 0x7a24, 0xd9b8, 0x7a1c, 0xd9a0, 0x7a15, 0xd988, 0x7a0d, 0xd970, - 0x7a05, 0xd958, 0x79fe, 0xd940, 0x79f6, 0xd928, 0x79ef, 0xd911, - 0x79e7, 0xd8f9, 0x79df, 0xd8e1, 0x79d8, 0xd8c9, 0x79d0, 0xd8b1, - 0x79c8, 0xd899, 0x79c0, 0xd881, 0x79b9, 0xd869, 0x79b1, 0xd851, - 0x79a9, 0xd839, 0x79a1, 0xd821, 0x7999, 0xd80a, 0x7992, 0xd7f2, - 0x798a, 0xd7da, 0x7982, 0xd7c2, 0x797a, 0xd7aa, 0x7972, 0xd792, - 0x796a, 0xd77a, 0x7962, 0xd763, 0x795a, 0xd74b, 0x7952, 0xd733, - 0x794a, 0xd71b, 0x7942, 0xd703, 0x793a, 0xd6eb, 0x7932, 0xd6d4, - 0x792a, 0xd6bc, 0x7922, 0xd6a4, 0x7919, 0xd68c, 0x7911, 0xd675, - 0x7909, 0xd65d, 0x7901, 0xd645, 0x78f9, 0xd62d, 0x78f1, 0xd615, - 0x78e8, 0xd5fe, 0x78e0, 0xd5e6, 0x78d8, 0xd5ce, 0x78cf, 0xd5b7, - 0x78c7, 0xd59f, 0x78bf, 0xd587, 0x78b6, 0xd56f, 0x78ae, 0xd558, - 0x78a6, 0xd540, 0x789d, 0xd528, 0x7895, 0xd511, 0x788c, 0xd4f9, - 0x7884, 0xd4e1, 0x787c, 0xd4ca, 0x7873, 0xd4b2, 0x786b, 0xd49a, - 0x7862, 0xd483, 0x7859, 0xd46b, 0x7851, 0xd453, 0x7848, 0xd43c, - 0x7840, 0xd424, 0x7837, 0xd40d, 0x782e, 0xd3f5, 0x7826, 0xd3dd, - 0x781d, 0xd3c6, 0x7814, 0xd3ae, 0x780c, 0xd397, 0x7803, 0xd37f, - 0x77fa, 0xd368, 0x77f1, 0xd350, 0x77e9, 0xd338, 0x77e0, 0xd321, - 0x77d7, 0xd309, 0x77ce, 0xd2f2, 0x77c5, 0xd2da, 0x77bc, 0xd2c3, - 0x77b4, 0xd2ab, 0x77ab, 0xd294, 0x77a2, 0xd27c, 0x7799, 0xd265, - 0x7790, 0xd24d, 0x7787, 0xd236, 0x777e, 0xd21e, 0x7775, 0xd207, - 0x776c, 0xd1ef, 0x7763, 0xd1d8, 0x775a, 0xd1c1, 0x7751, 0xd1a9, - 0x7747, 0xd192, 0x773e, 0xd17a, 0x7735, 0xd163, 0x772c, 0xd14b, - 0x7723, 0xd134, 0x771a, 0xd11d, 0x7710, 0xd105, 0x7707, 0xd0ee, - 0x76fe, 0xd0d7, 0x76f5, 0xd0bf, 0x76eb, 0xd0a8, 0x76e2, 0xd091, - 0x76d9, 0xd079, 0x76cf, 0xd062, 0x76c6, 0xd04b, 0x76bd, 0xd033, - 0x76b3, 0xd01c, 0x76aa, 0xd005, 0x76a0, 0xcfed, 0x7697, 0xcfd6, - 0x768e, 0xcfbf, 0x7684, 0xcfa7, 0x767b, 0xcf90, 0x7671, 0xcf79, - 0x7668, 0xcf62, 0x765e, 0xcf4a, 0x7654, 0xcf33, 0x764b, 0xcf1c, - 0x7641, 0xcf05, 0x7638, 0xceee, 0x762e, 0xced6, 0x7624, 0xcebf, - 0x761b, 0xcea8, 0x7611, 0xce91, 0x7607, 0xce7a, 0x75fd, 0xce62, - 0x75f4, 0xce4b, 0x75ea, 0xce34, 0x75e0, 0xce1d, 0x75d6, 0xce06, - 0x75cc, 0xcdef, 0x75c3, 0xcdd8, 0x75b9, 0xcdc0, 0x75af, 0xcda9, - 0x75a5, 0xcd92, 0x759b, 0xcd7b, 0x7591, 0xcd64, 0x7587, 0xcd4d, - 0x757d, 0xcd36, 0x7573, 0xcd1f, 0x7569, 0xcd08, 0x755f, 0xccf1, - 0x7555, 0xccda, 0x754b, 0xccc3, 0x7541, 0xccac, 0x7537, 0xcc95, - 0x752d, 0xcc7e, 0x7523, 0xcc67, 0x7519, 0xcc50, 0x750f, 0xcc39, - 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0x15e2, 0x81e3, 0x15c9, 0x81df, 0x15b0, 0x81da, 0x1597, 0x81d6, - 0x157f, 0x81d2, 0x1566, 0x81ce, 0x154d, 0x81c9, 0x1534, 0x81c5, - 0x151b, 0x81c1, 0x1503, 0x81bd, 0x14ea, 0x81b9, 0x14d1, 0x81b5, - 0x14b8, 0x81b1, 0x149f, 0x81ad, 0x1487, 0x81a9, 0x146e, 0x81a5, - 0x1455, 0x81a1, 0x143c, 0x819d, 0x1423, 0x8199, 0x140b, 0x8195, - 0x13f2, 0x8191, 0x13d9, 0x818d, 0x13c0, 0x8189, 0x13a7, 0x8185, - 0x138e, 0x8181, 0x1376, 0x817d, 0x135d, 0x817a, 0x1344, 0x8176, - 0x132b, 0x8172, 0x1312, 0x816e, 0x12f9, 0x816b, 0x12e0, 0x8167, - 0x12c8, 0x8163, 0x12af, 0x815f, 0x1296, 0x815c, 0x127d, 0x8158, - 0x1264, 0x8155, 0x124b, 0x8151, 0x1232, 0x814d, 0x1219, 0x814a, - 0x1201, 0x8146, 0x11e8, 0x8143, 0x11cf, 0x813f, 0x11b6, 0x813c, - 0x119d, 0x8138, 0x1184, 0x8135, 0x116b, 0x8131, 0x1152, 0x812e, - 0x1139, 0x812b, 0x1121, 0x8127, 0x1108, 0x8124, 0x10ef, 0x8121, - 0x10d6, 0x811d, 0x10bd, 0x811a, 0x10a4, 0x8117, 0x108b, 0x8113, - 0x1072, 0x8110, 0x1059, 0x810d, 0x1040, 0x810a, 0x1027, 0x8107, - 0x100e, 0x8103, 0xff5, 0x8100, 0xfdd, 0x80fd, 0xfc4, 0x80fa, - 0xfab, 0x80f7, 0xf92, 0x80f4, 0xf79, 0x80f1, 0xf60, 0x80ee, - 0xf47, 0x80eb, 0xf2e, 0x80e8, 0xf15, 0x80e5, 0xefc, 0x80e2, - 0xee3, 0x80df, 0xeca, 0x80dc, 0xeb1, 0x80d9, 0xe98, 0x80d6, - 0xe7f, 0x80d3, 0xe66, 0x80d1, 0xe4d, 0x80ce, 0xe34, 0x80cb, - 0xe1b, 0x80c8, 0xe02, 0x80c5, 0xde9, 0x80c3, 0xdd0, 0x80c0, - 0xdb7, 0x80bd, 0xd9e, 0x80bb, 0xd85, 0x80b8, 0xd6c, 0x80b5, - 0xd53, 0x80b3, 0xd3a, 0x80b0, 0xd21, 0x80ad, 0xd08, 0x80ab, - 0xcef, 0x80a8, 0xcd6, 0x80a6, 0xcbd, 0x80a3, 0xca4, 0x80a1, - 0xc8b, 0x809e, 0xc72, 0x809c, 0xc59, 0x8099, 0xc40, 0x8097, - 0xc27, 0x8095, 0xc0e, 0x8092, 0xbf5, 0x8090, 0xbdc, 0x808e, - 0xbc3, 0x808b, 0xbaa, 0x8089, 0xb91, 0x8087, 0xb78, 0x8084, - 0xb5f, 0x8082, 0xb46, 0x8080, 0xb2d, 0x807e, 0xb14, 0x807b, - 0xafb, 0x8079, 0xae2, 0x8077, 0xac9, 0x8075, 0xab0, 0x8073, - 0xa97, 0x8071, 0xa7e, 0x806f, 0xa65, 0x806d, 0xa4c, 0x806b, - 0xa33, 0x8069, 0xa19, 0x8067, 0xa00, 0x8065, 0x9e7, 0x8063, - 0x9ce, 0x8061, 0x9b5, 0x805f, 0x99c, 0x805d, 0x983, 0x805b, - 0x96a, 0x8059, 0x951, 0x8057, 0x938, 0x8056, 0x91f, 0x8054, - 0x906, 0x8052, 0x8ed, 0x8050, 0x8d4, 0x804f, 0x8bb, 0x804d, - 0x8a2, 0x804b, 0x888, 0x8049, 0x86f, 0x8048, 0x856, 0x8046, - 0x83d, 0x8044, 0x824, 0x8043, 0x80b, 0x8041, 0x7f2, 0x8040, - 0x7d9, 0x803e, 0x7c0, 0x803d, 0x7a7, 0x803b, 0x78e, 0x803a, - 0x775, 0x8038, 0x75b, 0x8037, 0x742, 0x8035, 0x729, 0x8034, - 0x710, 0x8032, 0x6f7, 0x8031, 0x6de, 0x8030, 0x6c5, 0x802e, - 0x6ac, 0x802d, 0x693, 0x802c, 0x67a, 0x802a, 0x660, 0x8029, - 0x647, 0x8028, 0x62e, 0x8027, 0x615, 0x8026, 0x5fc, 0x8024, - 0x5e3, 0x8023, 0x5ca, 0x8022, 0x5b1, 0x8021, 0x598, 0x8020, - 0x57f, 0x801f, 0x565, 0x801e, 0x54c, 0x801d, 0x533, 0x801c, - 0x51a, 0x801b, 0x501, 0x801a, 0x4e8, 0x8019, 0x4cf, 0x8018, - 0x4b6, 0x8017, 0x49c, 0x8016, 0x483, 0x8015, 0x46a, 0x8014, - 0x451, 0x8013, 0x438, 0x8012, 0x41f, 0x8012, 0x406, 0x8011, - 0x3ed, 0x8010, 0x3d4, 0x800f, 0x3ba, 0x800e, 0x3a1, 0x800e, - 0x388, 0x800d, 0x36f, 0x800c, 0x356, 0x800c, 0x33d, 0x800b, - 0x324, 0x800a, 0x30b, 0x800a, 0x2f1, 0x8009, 0x2d8, 0x8009, - 0x2bf, 0x8008, 0x2a6, 0x8008, 0x28d, 0x8007, 0x274, 0x8007, - 0x25b, 0x8006, 0x242, 0x8006, 0x228, 0x8005, 0x20f, 0x8005, - 0x1f6, 0x8004, 0x1dd, 0x8004, 0x1c4, 0x8004, 0x1ab, 0x8003, - 0x192, 0x8003, 0x178, 0x8003, 0x15f, 0x8002, 0x146, 0x8002, - 0x12d, 0x8002, 0x114, 0x8002, 0xfb, 0x8001, 0xe2, 0x8001, - 0xc9, 0x8001, 0xaf, 0x8001, 0x96, 0x8001, 0x7d, 0x8001, - 0x64, 0x8001, 0x4b, 0x8001, 0x32, 0x8001, 0x19, 0x8001, -}; - -static const q15_t ALIGN4 WeightsQ15_8192[16384] = { - 0x7fff, 0x0, 0x7fff, 0xfffa, 0x7fff, 0xfff4, 0x7fff, 0xffee, - 0x7fff, 0xffe7, 0x7fff, 0xffe1, 0x7fff, 0xffdb, 0x7fff, 0xffd5, - 0x7fff, 0xffce, 0x7fff, 0xffc8, 0x7fff, 0xffc2, 0x7fff, 0xffbb, - 0x7fff, 0xffb5, 0x7fff, 0xffaf, 0x7fff, 0xffa9, 0x7fff, 0xffa2, - 0x7fff, 0xff9c, 0x7fff, 0xff96, 0x7fff, 0xff8f, 0x7fff, 0xff89, - 0x7fff, 0xff83, 0x7fff, 0xff7d, 0x7fff, 0xff76, 0x7fff, 0xff70, - 0x7fff, 0xff6a, 0x7fff, 0xff63, 0x7fff, 0xff5d, 0x7fff, 0xff57, - 0x7fff, 0xff51, 0x7fff, 0xff4a, 0x7fff, 0xff44, 0x7fff, 0xff3e, - 0x7fff, 0xff37, 0x7fff, 0xff31, 0x7fff, 0xff2b, 0x7fff, 0xff25, - 0x7fff, 0xff1e, 0x7fff, 0xff18, 0x7fff, 0xff12, 0x7fff, 0xff0b, - 0x7fff, 0xff05, 0x7ffe, 0xfeff, 0x7ffe, 0xfef9, 0x7ffe, 0xfef2, - 0x7ffe, 0xfeec, 0x7ffe, 0xfee6, 0x7ffe, 0xfedf, 0x7ffe, 0xfed9, - 0x7ffe, 0xfed3, 0x7ffe, 0xfecd, 0x7ffe, 0xfec6, 0x7ffe, 0xfec0, - 0x7ffe, 0xfeba, 0x7ffe, 0xfeb3, 0x7ffe, 0xfead, 0x7ffe, 0xfea7, - 0x7ffe, 0xfea1, 0x7ffe, 0xfe9a, 0x7ffd, 0xfe94, 0x7ffd, 0xfe8e, - 0x7ffd, 0xfe88, 0x7ffd, 0xfe81, 0x7ffd, 0xfe7b, 0x7ffd, 0xfe75, - 0x7ffd, 0xfe6e, 0x7ffd, 0xfe68, 0x7ffd, 0xfe62, 0x7ffd, 0xfe5c, - 0x7ffd, 0xfe55, 0x7ffd, 0xfe4f, 0x7ffd, 0xfe49, 0x7ffc, 0xfe42, - 0x7ffc, 0xfe3c, 0x7ffc, 0xfe36, 0x7ffc, 0xfe30, 0x7ffc, 0xfe29, - 0x7ffc, 0xfe23, 0x7ffc, 0xfe1d, 0x7ffc, 0xfe16, 0x7ffc, 0xfe10, - 0x7ffc, 0xfe0a, 0x7ffc, 0xfe04, 0x7ffb, 0xfdfd, 0x7ffb, 0xfdf7, - 0x7ffb, 0xfdf1, 0x7ffb, 0xfdea, 0x7ffb, 0xfde4, 0x7ffb, 0xfdde, - 0x7ffb, 0xfdd8, 0x7ffb, 0xfdd1, 0x7ffb, 0xfdcb, 0x7ffb, 0xfdc5, - 0x7ffa, 0xfdbe, 0x7ffa, 0xfdb8, 0x7ffa, 0xfdb2, 0x7ffa, 0xfdac, - 0x7ffa, 0xfda5, 0x7ffa, 0xfd9f, 0x7ffa, 0xfd99, 0x7ffa, 0xfd93, - 0x7ff9, 0xfd8c, 0x7ff9, 0xfd86, 0x7ff9, 0xfd80, 0x7ff9, 0xfd79, - 0x7ff9, 0xfd73, 0x7ff9, 0xfd6d, 0x7ff9, 0xfd67, 0x7ff9, 0xfd60, - 0x7ff8, 0xfd5a, 0x7ff8, 0xfd54, 0x7ff8, 0xfd4d, 0x7ff8, 0xfd47, - 0x7ff8, 0xfd41, 0x7ff8, 0xfd3b, 0x7ff8, 0xfd34, 0x7ff8, 0xfd2e, - 0x7ff7, 0xfd28, 0x7ff7, 0xfd21, 0x7ff7, 0xfd1b, 0x7ff7, 0xfd15, - 0x7ff7, 0xfd0f, 0x7ff7, 0xfd08, 0x7ff7, 0xfd02, 0x7ff6, 0xfcfc, - 0x7ff6, 0xfcf5, 0x7ff6, 0xfcef, 0x7ff6, 0xfce9, 0x7ff6, 0xfce3, - 0x7ff6, 0xfcdc, 0x7ff5, 0xfcd6, 0x7ff5, 0xfcd0, 0x7ff5, 0xfcc9, - 0x7ff5, 0xfcc3, 0x7ff5, 0xfcbd, 0x7ff5, 0xfcb7, 0x7ff5, 0xfcb0, - 0x7ff4, 0xfcaa, 0x7ff4, 0xfca4, 0x7ff4, 0xfc9e, 0x7ff4, 0xfc97, - 0x7ff4, 0xfc91, 0x7ff4, 0xfc8b, 0x7ff3, 0xfc84, 0x7ff3, 0xfc7e, - 0x7ff3, 0xfc78, 0x7ff3, 0xfc72, 0x7ff3, 0xfc6b, 0x7ff2, 0xfc65, - 0x7ff2, 0xfc5f, 0x7ff2, 0xfc58, 0x7ff2, 0xfc52, 0x7ff2, 0xfc4c, - 0x7ff2, 0xfc46, 0x7ff1, 0xfc3f, 0x7ff1, 0xfc39, 0x7ff1, 0xfc33, - 0x7ff1, 0xfc2c, 0x7ff1, 0xfc26, 0x7ff0, 0xfc20, 0x7ff0, 0xfc1a, - 0x7ff0, 0xfc13, 0x7ff0, 0xfc0d, 0x7ff0, 0xfc07, 0x7fef, 0xfc01, - 0x7fef, 0xfbfa, 0x7fef, 0xfbf4, 0x7fef, 0xfbee, 0x7fef, 0xfbe7, - 0x7fee, 0xfbe1, 0x7fee, 0xfbdb, 0x7fee, 0xfbd5, 0x7fee, 0xfbce, - 0x7fee, 0xfbc8, 0x7fed, 0xfbc2, 0x7fed, 0xfbbb, 0x7fed, 0xfbb5, - 0x7fed, 0xfbaf, 0x7fed, 0xfba9, 0x7fec, 0xfba2, 0x7fec, 0xfb9c, - 0x7fec, 0xfb96, 0x7fec, 0xfb8f, 0x7fec, 0xfb89, 0x7feb, 0xfb83, - 0x7feb, 0xfb7d, 0x7feb, 0xfb76, 0x7feb, 0xfb70, 0x7fea, 0xfb6a, - 0x7fea, 0xfb64, 0x7fea, 0xfb5d, 0x7fea, 0xfb57, 0x7fea, 0xfb51, - 0x7fe9, 0xfb4a, 0x7fe9, 0xfb44, 0x7fe9, 0xfb3e, 0x7fe9, 0xfb38, - 0x7fe8, 0xfb31, 0x7fe8, 0xfb2b, 0x7fe8, 0xfb25, 0x7fe8, 0xfb1e, - 0x7fe7, 0xfb18, 0x7fe7, 0xfb12, 0x7fe7, 0xfb0c, 0x7fe7, 0xfb05, - 0x7fe6, 0xfaff, 0x7fe6, 0xfaf9, 0x7fe6, 0xfaf3, 0x7fe6, 0xfaec, - 0x7fe5, 0xfae6, 0x7fe5, 0xfae0, 0x7fe5, 0xfad9, 0x7fe5, 0xfad3, - 0x7fe4, 0xfacd, 0x7fe4, 0xfac7, 0x7fe4, 0xfac0, 0x7fe4, 0xfaba, - 0x7fe3, 0xfab4, 0x7fe3, 0xfaad, 0x7fe3, 0xfaa7, 0x7fe3, 0xfaa1, - 0x7fe2, 0xfa9b, 0x7fe2, 0xfa94, 0x7fe2, 0xfa8e, 0x7fe2, 0xfa88, - 0x7fe1, 0xfa81, 0x7fe1, 0xfa7b, 0x7fe1, 0xfa75, 0x7fe0, 0xfa6f, - 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0x67a, 0x802a, 0x673, 0x802a, 0x66d, 0x802a, 0x667, 0x802a, - 0x660, 0x8029, 0x65a, 0x8029, 0x654, 0x8029, 0x64e, 0x8028, - 0x647, 0x8028, 0x641, 0x8028, 0x63b, 0x8027, 0x635, 0x8027, - 0x62e, 0x8027, 0x628, 0x8026, 0x622, 0x8026, 0x61b, 0x8026, - 0x615, 0x8026, 0x60f, 0x8025, 0x609, 0x8025, 0x602, 0x8025, - 0x5fc, 0x8024, 0x5f6, 0x8024, 0x5ef, 0x8024, 0x5e9, 0x8023, - 0x5e3, 0x8023, 0x5dd, 0x8023, 0x5d6, 0x8023, 0x5d0, 0x8022, - 0x5ca, 0x8022, 0x5c4, 0x8022, 0x5bd, 0x8021, 0x5b7, 0x8021, - 0x5b1, 0x8021, 0x5aa, 0x8021, 0x5a4, 0x8020, 0x59e, 0x8020, - 0x598, 0x8020, 0x591, 0x8020, 0x58b, 0x801f, 0x585, 0x801f, - 0x57f, 0x801f, 0x578, 0x801e, 0x572, 0x801e, 0x56c, 0x801e, - 0x565, 0x801e, 0x55f, 0x801d, 0x559, 0x801d, 0x553, 0x801d, - 0x54c, 0x801d, 0x546, 0x801c, 0x540, 0x801c, 0x539, 0x801c, - 0x533, 0x801c, 0x52d, 0x801b, 0x527, 0x801b, 0x520, 0x801b, - 0x51a, 0x801b, 0x514, 0x801a, 0x50d, 0x801a, 0x507, 0x801a, - 0x501, 0x801a, 0x4fb, 0x8019, 0x4f4, 0x8019, 0x4ee, 0x8019, - 0x4e8, 0x8019, 0x4e2, 0x8018, 0x4db, 0x8018, 0x4d5, 0x8018, - 0x4cf, 0x8018, 0x4c8, 0x8017, 0x4c2, 0x8017, 0x4bc, 0x8017, - 0x4b6, 0x8017, 0x4af, 0x8016, 0x4a9, 0x8016, 0x4a3, 0x8016, - 0x49c, 0x8016, 0x496, 0x8016, 0x490, 0x8015, 0x48a, 0x8015, - 0x483, 0x8015, 0x47d, 0x8015, 0x477, 0x8014, 0x471, 0x8014, - 0x46a, 0x8014, 0x464, 0x8014, 0x45e, 0x8014, 0x457, 0x8013, - 0x451, 0x8013, 0x44b, 0x8013, 0x445, 0x8013, 0x43e, 0x8013, - 0x438, 0x8012, 0x432, 0x8012, 0x42b, 0x8012, 0x425, 0x8012, - 0x41f, 0x8012, 0x419, 0x8011, 0x412, 0x8011, 0x40c, 0x8011, - 0x406, 0x8011, 0x3ff, 0x8011, 0x3f9, 0x8010, 0x3f3, 0x8010, - 0x3ed, 0x8010, 0x3e6, 0x8010, 0x3e0, 0x8010, 0x3da, 0x800f, - 0x3d4, 0x800f, 0x3cd, 0x800f, 0x3c7, 0x800f, 0x3c1, 0x800f, - 0x3ba, 0x800e, 0x3b4, 0x800e, 0x3ae, 0x800e, 0x3a8, 0x800e, - 0x3a1, 0x800e, 0x39b, 0x800e, 0x395, 0x800d, 0x38e, 0x800d, - 0x388, 0x800d, 0x382, 0x800d, 0x37c, 0x800d, 0x375, 0x800c, - 0x36f, 0x800c, 0x369, 0x800c, 0x362, 0x800c, 0x35c, 0x800c, - 0x356, 0x800c, 0x350, 0x800b, 0x349, 0x800b, 0x343, 0x800b, - 0x33d, 0x800b, 0x337, 0x800b, 0x330, 0x800b, 0x32a, 0x800b, - 0x324, 0x800a, 0x31d, 0x800a, 0x317, 0x800a, 0x311, 0x800a, - 0x30b, 0x800a, 0x304, 0x800a, 0x2fe, 0x8009, 0x2f8, 0x8009, - 0x2f1, 0x8009, 0x2eb, 0x8009, 0x2e5, 0x8009, 0x2df, 0x8009, - 0x2d8, 0x8009, 0x2d2, 0x8008, 0x2cc, 0x8008, 0x2c5, 0x8008, - 0x2bf, 0x8008, 0x2b9, 0x8008, 0x2b3, 0x8008, 0x2ac, 0x8008, - 0x2a6, 0x8008, 0x2a0, 0x8007, 0x299, 0x8007, 0x293, 0x8007, - 0x28d, 0x8007, 0x287, 0x8007, 0x280, 0x8007, 0x27a, 0x8007, - 0x274, 0x8007, 0x26d, 0x8006, 0x267, 0x8006, 0x261, 0x8006, - 0x25b, 0x8006, 0x254, 0x8006, 0x24e, 0x8006, 0x248, 0x8006, - 0x242, 0x8006, 0x23b, 0x8005, 0x235, 0x8005, 0x22f, 0x8005, - 0x228, 0x8005, 0x222, 0x8005, 0x21c, 0x8005, 0x216, 0x8005, - 0x20f, 0x8005, 0x209, 0x8005, 0x203, 0x8005, 0x1fc, 0x8004, - 0x1f6, 0x8004, 0x1f0, 0x8004, 0x1ea, 0x8004, 0x1e3, 0x8004, - 0x1dd, 0x8004, 0x1d7, 0x8004, 0x1d0, 0x8004, 0x1ca, 0x8004, - 0x1c4, 0x8004, 0x1be, 0x8004, 0x1b7, 0x8003, 0x1b1, 0x8003, - 0x1ab, 0x8003, 0x1a4, 0x8003, 0x19e, 0x8003, 0x198, 0x8003, - 0x192, 0x8003, 0x18b, 0x8003, 0x185, 0x8003, 0x17f, 0x8003, - 0x178, 0x8003, 0x172, 0x8003, 0x16c, 0x8003, 0x166, 0x8002, - 0x15f, 0x8002, 0x159, 0x8002, 0x153, 0x8002, 0x14d, 0x8002, - 0x146, 0x8002, 0x140, 0x8002, 0x13a, 0x8002, 0x133, 0x8002, - 0x12d, 0x8002, 0x127, 0x8002, 0x121, 0x8002, 0x11a, 0x8002, - 0x114, 0x8002, 0x10e, 0x8002, 0x107, 0x8002, 0x101, 0x8002, - 0xfb, 0x8001, 0xf5, 0x8001, 0xee, 0x8001, 0xe8, 0x8001, - 0xe2, 0x8001, 0xdb, 0x8001, 0xd5, 0x8001, 0xcf, 0x8001, - 0xc9, 0x8001, 0xc2, 0x8001, 0xbc, 0x8001, 0xb6, 0x8001, - 0xaf, 0x8001, 0xa9, 0x8001, 0xa3, 0x8001, 0x9d, 0x8001, - 0x96, 0x8001, 0x90, 0x8001, 0x8a, 0x8001, 0x83, 0x8001, - 0x7d, 0x8001, 0x77, 0x8001, 0x71, 0x8001, 0x6a, 0x8001, - 0x64, 0x8001, 0x5e, 0x8001, 0x57, 0x8001, 0x51, 0x8001, - 0x4b, 0x8001, 0x45, 0x8001, 0x3e, 0x8001, 0x38, 0x8001, - 0x32, 0x8001, 0x2b, 0x8001, 0x25, 0x8001, 0x1f, 0x8001, - 0x19, 0x8001, 0x12, 0x8001, 0xc, 0x8001, 0x6, 0x8001, -}; - - -/** -* \par -* cosFactor tables are generated using the formula :
 cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) 
-* \par -* C command to generate the table -*
    
-* for(i = 0; i< N; i++)    
-* {    
-*   cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
-* \par -* where N is the number of factors to generate and c is pi/(2*N) -* \par -* Then converted to q15 format by multiplying with 2^31 and saturated if required. - -*/ - -static const q15_t ALIGN4 cos_factorsQ15_128[128] = { - 0x7fff, 0x7ffa, 0x7ff0, 0x7fe1, 0x7fce, 0x7fb5, 0x7f97, 0x7f75, - 0x7f4d, 0x7f21, 0x7ef0, 0x7eba, 0x7e7f, 0x7e3f, 0x7dfa, 0x7db0, - 0x7d62, 0x7d0f, 0x7cb7, 0x7c5a, 0x7bf8, 0x7b92, 0x7b26, 0x7ab6, - 0x7a42, 0x79c8, 0x794a, 0x78c7, 0x7840, 0x77b4, 0x7723, 0x768e, - 0x75f4, 0x7555, 0x74b2, 0x740b, 0x735f, 0x72af, 0x71fa, 0x7141, - 0x7083, 0x6fc1, 0x6efb, 0x6e30, 0x6d62, 0x6c8f, 0x6bb8, 0x6adc, - 0x69fd, 0x6919, 0x6832, 0x6746, 0x6657, 0x6563, 0x646c, 0x6371, - 0x6271, 0x616f, 0x6068, 0x5f5e, 0x5e50, 0x5d3e, 0x5c29, 0x5b10, - 0x59f3, 0x58d4, 0x57b0, 0x568a, 0x5560, 0x5433, 0x5302, 0x51ce, - 0x5097, 0x4f5e, 0x4e21, 0x4ce1, 0x4b9e, 0x4a58, 0x490f, 0x47c3, - 0x4675, 0x4524, 0x43d0, 0x427a, 0x4121, 0x3fc5, 0x3e68, 0x3d07, - 0x3ba5, 0x3a40, 0x38d8, 0x376f, 0x3604, 0x3496, 0x3326, 0x31b5, - 0x3041, 0x2ecc, 0x2d55, 0x2bdc, 0x2a61, 0x28e5, 0x2767, 0x25e8, - 0x2467, 0x22e5, 0x2161, 0x1fdc, 0x1e56, 0x1ccf, 0x1b47, 0x19bd, - 0x1833, 0x16a8, 0x151b, 0x138e, 0x1201, 0x1072, 0xee3, 0xd53, - 0xbc3, 0xa33, 0x8a2, 0x710, 0x57f, 0x3ed, 0x25b, 0xc9 -}; - -static const q15_t ALIGN4 cos_factorsQ15_512[512] = { - 0x7fff, 0x7fff, 0x7fff, 0x7ffe, 0x7ffc, 0x7ffb, 0x7ff9, 0x7ff7, - 0x7ff4, 0x7ff2, 0x7fee, 0x7feb, 0x7fe7, 0x7fe3, 0x7fdf, 0x7fda, - 0x7fd6, 0x7fd0, 0x7fcb, 0x7fc5, 0x7fbf, 0x7fb8, 0x7fb1, 0x7faa, - 0x7fa3, 0x7f9b, 0x7f93, 0x7f8b, 0x7f82, 0x7f79, 0x7f70, 0x7f67, - 0x7f5d, 0x7f53, 0x7f48, 0x7f3d, 0x7f32, 0x7f27, 0x7f1b, 0x7f0f, - 0x7f03, 0x7ef6, 0x7ee9, 0x7edc, 0x7ecf, 0x7ec1, 0x7eb3, 0x7ea4, - 0x7e95, 0x7e86, 0x7e77, 0x7e67, 0x7e57, 0x7e47, 0x7e37, 0x7e26, - 0x7e14, 0x7e03, 0x7df1, 0x7ddf, 0x7dcd, 0x7dba, 0x7da7, 0x7d94, - 0x7d80, 0x7d6c, 0x7d58, 0x7d43, 0x7d2f, 0x7d19, 0x7d04, 0x7cee, - 0x7cd8, 0x7cc2, 0x7cab, 0x7c94, 0x7c7d, 0x7c66, 0x7c4e, 0x7c36, - 0x7c1d, 0x7c05, 0x7beb, 0x7bd2, 0x7bb9, 0x7b9f, 0x7b84, 0x7b6a, - 0x7b4f, 0x7b34, 0x7b19, 0x7afd, 0x7ae1, 0x7ac5, 0x7aa8, 0x7a8b, - 0x7a6e, 0x7a50, 0x7a33, 0x7a15, 0x79f6, 0x79d8, 0x79b9, 0x7999, - 0x797a, 0x795a, 0x793a, 0x7919, 0x78f9, 0x78d8, 0x78b6, 0x7895, - 0x7873, 0x7851, 0x782e, 0x780c, 0x77e9, 0x77c5, 0x77a2, 0x777e, - 0x775a, 0x7735, 0x7710, 0x76eb, 0x76c6, 0x76a0, 0x767b, 0x7654, - 0x762e, 0x7607, 0x75e0, 0x75b9, 0x7591, 0x7569, 0x7541, 0x7519, - 0x74f0, 0x74c7, 0x749e, 0x7474, 0x744a, 0x7420, 0x73f6, 0x73cb, - 0x73a0, 0x7375, 0x7349, 0x731d, 0x72f1, 0x72c5, 0x7298, 0x726b, - 0x723e, 0x7211, 0x71e3, 0x71b5, 0x7186, 0x7158, 0x7129, 0x70fa, - 0x70cb, 0x709b, 0x706b, 0x703b, 0x700a, 0x6fda, 0x6fa9, 0x6f77, - 0x6f46, 0x6f14, 0x6ee2, 0x6eaf, 0x6e7d, 0x6e4a, 0x6e17, 0x6de3, - 0x6db0, 0x6d7c, 0x6d48, 0x6d13, 0x6cde, 0x6ca9, 0x6c74, 0x6c3f, - 0x6c09, 0x6bd3, 0x6b9c, 0x6b66, 0x6b2f, 0x6af8, 0x6ac1, 0x6a89, - 0x6a51, 0x6a19, 0x69e1, 0x69a8, 0x696f, 0x6936, 0x68fd, 0x68c3, - 0x6889, 0x684f, 0x6815, 0x67da, 0x679f, 0x6764, 0x6729, 0x66ed, - 0x66b1, 0x6675, 0x6639, 0x65fc, 0x65bf, 0x6582, 0x6545, 0x6507, - 0x64c9, 0x648b, 0x644d, 0x640e, 0x63cf, 0x6390, 0x6351, 0x6311, - 0x62d2, 0x6292, 0x6251, 0x6211, 0x61d0, 0x618f, 0x614e, 0x610d, - 0x60cb, 0x6089, 0x6047, 0x6004, 0x5fc2, 0x5f7f, 0x5f3c, 0x5ef9, - 0x5eb5, 0x5e71, 0x5e2d, 0x5de9, 0x5da5, 0x5d60, 0x5d1b, 0x5cd6, - 0x5c91, 0x5c4b, 0x5c06, 0x5bc0, 0x5b79, 0x5b33, 0x5aec, 0x5aa5, - 0x5a5e, 0x5a17, 0x59d0, 0x5988, 0x5940, 0x58f8, 0x58af, 0x5867, - 0x581e, 0x57d5, 0x578c, 0x5742, 0x56f9, 0x56af, 0x5665, 0x561a, - 0x55d0, 0x5585, 0x553a, 0x54ef, 0x54a4, 0x5458, 0x540d, 0x53c1, - 0x5375, 0x5328, 0x52dc, 0x528f, 0x5242, 0x51f5, 0x51a8, 0x515a, - 0x510c, 0x50bf, 0x5070, 0x5022, 0x4fd4, 0x4f85, 0x4f36, 0x4ee7, - 0x4e98, 0x4e48, 0x4df9, 0x4da9, 0x4d59, 0x4d09, 0x4cb8, 0x4c68, - 0x4c17, 0x4bc6, 0x4b75, 0x4b24, 0x4ad2, 0x4a81, 0x4a2f, 0x49dd, - 0x498a, 0x4938, 0x48e6, 0x4893, 0x4840, 0x47ed, 0x479a, 0x4746, - 0x46f3, 0x469f, 0x464b, 0x45f7, 0x45a3, 0x454e, 0x44fa, 0x44a5, - 0x4450, 0x43fb, 0x43a5, 0x4350, 0x42fa, 0x42a5, 0x424f, 0x41f9, - 0x41a2, 0x414c, 0x40f6, 0x409f, 0x4048, 0x3ff1, 0x3f9a, 0x3f43, - 0x3eeb, 0x3e93, 0x3e3c, 0x3de4, 0x3d8c, 0x3d33, 0x3cdb, 0x3c83, - 0x3c2a, 0x3bd1, 0x3b78, 0x3b1f, 0x3ac6, 0x3a6c, 0x3a13, 0x39b9, - 0x395f, 0x3906, 0x38ab, 0x3851, 0x37f7, 0x379c, 0x3742, 0x36e7, - 0x368c, 0x3631, 0x35d6, 0x357b, 0x351f, 0x34c4, 0x3468, 0x340c, - 0x33b0, 0x3354, 0x32f8, 0x329c, 0x3240, 0x31e3, 0x3186, 0x312a, - 0x30cd, 0x3070, 0x3013, 0x2fb5, 0x2f58, 0x2efb, 0x2e9d, 0x2e3f, - 0x2de2, 0x2d84, 0x2d26, 0x2cc8, 0x2c69, 0x2c0b, 0x2bad, 0x2b4e, - 0x2aef, 0x2a91, 0x2a32, 0x29d3, 0x2974, 0x2915, 0x28b5, 0x2856, - 0x27f6, 0x2797, 0x2737, 0x26d8, 0x2678, 0x2618, 0x25b8, 0x2558, - 0x24f7, 0x2497, 0x2437, 0x23d6, 0x2376, 0x2315, 0x22b4, 0x2254, - 0x21f3, 0x2192, 0x2131, 0x20d0, 0x206e, 0x200d, 0x1fac, 0x1f4a, - 0x1ee9, 0x1e87, 0x1e25, 0x1dc4, 0x1d62, 0x1d00, 0x1c9e, 0x1c3c, - 0x1bda, 0x1b78, 0x1b16, 0x1ab3, 0x1a51, 0x19ef, 0x198c, 0x192a, - 0x18c7, 0x1864, 0x1802, 0x179f, 0x173c, 0x16d9, 0x1676, 0x1613, - 0x15b0, 0x154d, 0x14ea, 0x1487, 0x1423, 0x13c0, 0x135d, 0x12f9, - 0x1296, 0x1232, 0x11cf, 0x116b, 0x1108, 0x10a4, 0x1040, 0xfdd, - 0xf79, 0xf15, 0xeb1, 0xe4d, 0xde9, 0xd85, 0xd21, 0xcbd, - 0xc59, 0xbf5, 0xb91, 0xb2d, 0xac9, 0xa65, 0xa00, 0x99c, - 0x938, 0x8d4, 0x86f, 0x80b, 0x7a7, 0x742, 0x6de, 0x67a, - 0x615, 0x5b1, 0x54c, 0x4e8, 0x483, 0x41f, 0x3ba, 0x356, - 0x2f1, 0x28d, 0x228, 0x1c4, 0x15f, 0xfb, 0x96, 0x32, -}; - -static const q15_t ALIGN4 cos_factorsQ15_2048[2048] = { - 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, - 0x7fff, 0x7fff, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffd, 0x7ffd, - 0x7ffd, 0x7ffd, 0x7ffc, 0x7ffc, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffa, - 0x7ffa, 0x7ff9, 0x7ff9, 0x7ff8, 0x7ff8, 0x7ff7, 0x7ff7, 0x7ff6, - 0x7ff5, 0x7ff5, 0x7ff4, 0x7ff3, 0x7ff3, 0x7ff2, 0x7ff1, 0x7ff0, - 0x7ff0, 0x7fef, 0x7fee, 0x7fed, 0x7fec, 0x7fec, 0x7feb, 0x7fea, - 0x7fe9, 0x7fe8, 0x7fe7, 0x7fe6, 0x7fe5, 0x7fe4, 0x7fe3, 0x7fe2, - 0x7fe1, 0x7fe0, 0x7fdf, 0x7fdd, 0x7fdc, 0x7fdb, 0x7fda, 0x7fd9, - 0x7fd7, 0x7fd6, 0x7fd5, 0x7fd4, 0x7fd2, 0x7fd1, 0x7fd0, 0x7fce, - 0x7fcd, 0x7fcb, 0x7fca, 0x7fc9, 0x7fc7, 0x7fc6, 0x7fc4, 0x7fc3, - 0x7fc1, 0x7fc0, 0x7fbe, 0x7fbc, 0x7fbb, 0x7fb9, 0x7fb7, 0x7fb6, - 0x7fb4, 0x7fb2, 0x7fb1, 0x7faf, 0x7fad, 0x7fab, 0x7fa9, 0x7fa8, - 0x7fa6, 0x7fa4, 0x7fa2, 0x7fa0, 0x7f9e, 0x7f9c, 0x7f9a, 0x7f98, - 0x7f96, 0x7f94, 0x7f92, 0x7f90, 0x7f8e, 0x7f8c, 0x7f8a, 0x7f88, - 0x7f86, 0x7f83, 0x7f81, 0x7f7f, 0x7f7d, 0x7f7b, 0x7f78, 0x7f76, - 0x7f74, 0x7f71, 0x7f6f, 0x7f6d, 0x7f6a, 0x7f68, 0x7f65, 0x7f63, - 0x7f60, 0x7f5e, 0x7f5b, 0x7f59, 0x7f56, 0x7f54, 0x7f51, 0x7f4f, - 0x7f4c, 0x7f49, 0x7f47, 0x7f44, 0x7f41, 0x7f3f, 0x7f3c, 0x7f39, - 0x7f36, 0x7f34, 0x7f31, 0x7f2e, 0x7f2b, 0x7f28, 0x7f25, 0x7f23, - 0x7f20, 0x7f1d, 0x7f1a, 0x7f17, 0x7f14, 0x7f11, 0x7f0e, 0x7f0b, - 0x7f08, 0x7f04, 0x7f01, 0x7efe, 0x7efb, 0x7ef8, 0x7ef5, 0x7ef1, - 0x7eee, 0x7eeb, 0x7ee8, 0x7ee4, 0x7ee1, 0x7ede, 0x7eda, 0x7ed7, - 0x7ed4, 0x7ed0, 0x7ecd, 0x7ec9, 0x7ec6, 0x7ec3, 0x7ebf, 0x7ebb, - 0x7eb8, 0x7eb4, 0x7eb1, 0x7ead, 0x7eaa, 0x7ea6, 0x7ea2, 0x7e9f, - 0x7e9b, 0x7e97, 0x7e94, 0x7e90, 0x7e8c, 0x7e88, 0x7e84, 0x7e81, - 0x7e7d, 0x7e79, 0x7e75, 0x7e71, 0x7e6d, 0x7e69, 0x7e65, 0x7e61, - 0x7e5d, 0x7e59, 0x7e55, 0x7e51, 0x7e4d, 0x7e49, 0x7e45, 0x7e41, - 0x7e3d, 0x7e39, 0x7e34, 0x7e30, 0x7e2c, 0x7e28, 0x7e24, 0x7e1f, - 0x7e1b, 0x7e17, 0x7e12, 0x7e0e, 0x7e0a, 0x7e05, 0x7e01, 0x7dfc, - 0x7df8, 0x7df3, 0x7def, 0x7dea, 0x7de6, 0x7de1, 0x7ddd, 0x7dd8, - 0x7dd4, 0x7dcf, 0x7dca, 0x7dc6, 0x7dc1, 0x7dbc, 0x7db8, 0x7db3, - 0x7dae, 0x7da9, 0x7da5, 0x7da0, 0x7d9b, 0x7d96, 0x7d91, 0x7d8c, - 0x7d87, 0x7d82, 0x7d7e, 0x7d79, 0x7d74, 0x7d6f, 0x7d6a, 0x7d65, - 0x7d60, 0x7d5a, 0x7d55, 0x7d50, 0x7d4b, 0x7d46, 0x7d41, 0x7d3c, - 0x7d36, 0x7d31, 0x7d2c, 0x7d27, 0x7d21, 0x7d1c, 0x7d17, 0x7d11, - 0x7d0c, 0x7d07, 0x7d01, 0x7cfc, 0x7cf6, 0x7cf1, 0x7cec, 0x7ce6, - 0x7ce1, 0x7cdb, 0x7cd5, 0x7cd0, 0x7cca, 0x7cc5, 0x7cbf, 0x7cb9, - 0x7cb4, 0x7cae, 0x7ca8, 0x7ca3, 0x7c9d, 0x7c97, 0x7c91, 0x7c8c, - 0x7c86, 0x7c80, 0x7c7a, 0x7c74, 0x7c6e, 0x7c69, 0x7c63, 0x7c5d, - 0x7c57, 0x7c51, 0x7c4b, 0x7c45, 0x7c3f, 0x7c39, 0x7c33, 0x7c2d, - 0x7c26, 0x7c20, 0x7c1a, 0x7c14, 0x7c0e, 0x7c08, 0x7c01, 0x7bfb, - 0x7bf5, 0x7bef, 0x7be8, 0x7be2, 0x7bdc, 0x7bd5, 0x7bcf, 0x7bc9, - 0x7bc2, 0x7bbc, 0x7bb5, 0x7baf, 0x7ba8, 0x7ba2, 0x7b9b, 0x7b95, - 0x7b8e, 0x7b88, 0x7b81, 0x7b7a, 0x7b74, 0x7b6d, 0x7b67, 0x7b60, - 0x7b59, 0x7b52, 0x7b4c, 0x7b45, 0x7b3e, 0x7b37, 0x7b31, 0x7b2a, - 0x7b23, 0x7b1c, 0x7b15, 0x7b0e, 0x7b07, 0x7b00, 0x7af9, 0x7af2, - 0x7aeb, 0x7ae4, 0x7add, 0x7ad6, 0x7acf, 0x7ac8, 0x7ac1, 0x7aba, - 0x7ab3, 0x7aac, 0x7aa4, 0x7a9d, 0x7a96, 0x7a8f, 0x7a87, 0x7a80, - 0x7a79, 0x7a72, 0x7a6a, 0x7a63, 0x7a5c, 0x7a54, 0x7a4d, 0x7a45, - 0x7a3e, 0x7a36, 0x7a2f, 0x7a27, 0x7a20, 0x7a18, 0x7a11, 0x7a09, - 0x7a02, 0x79fa, 0x79f2, 0x79eb, 0x79e3, 0x79db, 0x79d4, 0x79cc, - 0x79c4, 0x79bc, 0x79b5, 0x79ad, 0x79a5, 0x799d, 0x7995, 0x798e, - 0x7986, 0x797e, 0x7976, 0x796e, 0x7966, 0x795e, 0x7956, 0x794e, - 0x7946, 0x793e, 0x7936, 0x792e, 0x7926, 0x791e, 0x7915, 0x790d, - 0x7905, 0x78fd, 0x78f5, 0x78ec, 0x78e4, 0x78dc, 0x78d4, 0x78cb, - 0x78c3, 0x78bb, 0x78b2, 0x78aa, 0x78a2, 0x7899, 0x7891, 0x7888, - 0x7880, 0x7877, 0x786f, 0x7866, 0x785e, 0x7855, 0x784d, 0x7844, - 0x783b, 0x7833, 0x782a, 0x7821, 0x7819, 0x7810, 0x7807, 0x77ff, - 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0x112d, 0x1114, 0x10fb, 0x10e2, 0x10c9, 0x10b0, 0x1098, 0x107f, - 0x1066, 0x104d, 0x1034, 0x101b, 0x1002, 0xfe9, 0xfd0, 0xfb7, - 0xf9e, 0xf85, 0xf6c, 0xf53, 0xf3a, 0xf21, 0xf08, 0xef0, - 0xed7, 0xebe, 0xea5, 0xe8c, 0xe73, 0xe5a, 0xe41, 0xe28, - 0xe0f, 0xdf6, 0xddd, 0xdc4, 0xdab, 0xd92, 0xd79, 0xd60, - 0xd47, 0xd2e, 0xd15, 0xcfc, 0xce3, 0xcca, 0xcb1, 0xc98, - 0xc7f, 0xc66, 0xc4d, 0xc34, 0xc1b, 0xc02, 0xbe9, 0xbd0, - 0xbb7, 0xb9e, 0xb85, 0xb6c, 0xb53, 0xb3a, 0xb20, 0xb07, - 0xaee, 0xad5, 0xabc, 0xaa3, 0xa8a, 0xa71, 0xa58, 0xa3f, - 0xa26, 0xa0d, 0x9f4, 0x9db, 0x9c2, 0x9a9, 0x990, 0x977, - 0x95e, 0x944, 0x92b, 0x912, 0x8f9, 0x8e0, 0x8c7, 0x8ae, - 0x895, 0x87c, 0x863, 0x84a, 0x831, 0x818, 0x7fe, 0x7e5, - 0x7cc, 0x7b3, 0x79a, 0x781, 0x768, 0x74f, 0x736, 0x71d, - 0x704, 0x6ea, 0x6d1, 0x6b8, 0x69f, 0x686, 0x66d, 0x654, - 0x63b, 0x622, 0x609, 0x5ef, 0x5d6, 0x5bd, 0x5a4, 0x58b, - 0x572, 0x559, 0x540, 0x527, 0x50d, 0x4f4, 0x4db, 0x4c2, - 0x4a9, 0x490, 0x477, 0x45e, 0x445, 0x42b, 0x412, 0x3f9, - 0x3e0, 0x3c7, 0x3ae, 0x395, 0x37c, 0x362, 0x349, 0x330, - 0x317, 0x2fe, 0x2e5, 0x2cc, 0x2b3, 0x299, 0x280, 0x267, - 0x24e, 0x235, 0x21c, 0x203, 0x1ea, 0x1d0, 0x1b7, 0x19e, - 0x185, 0x16c, 0x153, 0x13a, 0x121, 0x107, 0xee, 0xd5, - 0xbc, 0xa3, 0x8a, 0x71, 0x57, 0x3e, 0x25, 0xc, - -}; - -static const q15_t ALIGN4 cos_factorsQ15_8192[8192] = { - 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, - 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, - 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, - 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, - 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, - 0x7fff, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, - 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, - 0x7ffe, 0x7ffe, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, - 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffc, - 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, - 0x7ffc, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, - 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffa, 0x7ffa, 0x7ffa, 0x7ffa, 0x7ffa, - 0x7ffa, 0x7ffa, 0x7ffa, 0x7ffa, 0x7ff9, 0x7ff9, 0x7ff9, 0x7ff9, - 0x7ff9, 0x7ff9, 0x7ff9, 0x7ff9, 0x7ff8, 0x7ff8, 0x7ff8, 0x7ff8, - 0x7ff8, 0x7ff8, 0x7ff8, 0x7ff7, 0x7ff7, 0x7ff7, 0x7ff7, 0x7ff7, - 0x7ff7, 0x7ff7, 0x7ff6, 0x7ff6, 0x7ff6, 0x7ff6, 0x7ff6, 0x7ff6, - 0x7ff6, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff4, - 0x7ff4, 0x7ff4, 0x7ff4, 0x7ff4, 0x7ff4, 0x7ff3, 0x7ff3, 0x7ff3, - 0x7ff3, 0x7ff3, 0x7ff3, 0x7ff2, 0x7ff2, 0x7ff2, 0x7ff2, 0x7ff2, - 0x7ff1, 0x7ff1, 0x7ff1, 0x7ff1, 0x7ff1, 0x7ff1, 0x7ff0, 0x7ff0, - 0x7ff0, 0x7ff0, 0x7ff0, 0x7fef, 0x7fef, 0x7fef, 0x7fef, 0x7fef, - 0x7fee, 0x7fee, 0x7fee, 0x7fee, 0x7fee, 0x7fed, 0x7fed, 0x7fed, - 0x7fed, 0x7fed, 0x7fec, 0x7fec, 0x7fec, 0x7fec, 0x7feb, 0x7feb, - 0x7feb, 0x7feb, 0x7feb, 0x7fea, 0x7fea, 0x7fea, 0x7fea, 0x7fe9, - 0x7fe9, 0x7fe9, 0x7fe9, 0x7fe8, 0x7fe8, 0x7fe8, 0x7fe8, 0x7fe8, - 0x7fe7, 0x7fe7, 0x7fe7, 0x7fe7, 0x7fe6, 0x7fe6, 0x7fe6, 0x7fe6, - 0x7fe5, 0x7fe5, 0x7fe5, 0x7fe5, 0x7fe4, 0x7fe4, 0x7fe4, 0x7fe4, - 0x7fe3, 0x7fe3, 0x7fe3, 0x7fe2, 0x7fe2, 0x7fe2, 0x7fe2, 0x7fe1, - 0x7fe1, 0x7fe1, 0x7fe1, 0x7fe0, 0x7fe0, 0x7fe0, 0x7fdf, 0x7fdf, - 0x7fdf, 0x7fdf, 0x7fde, 0x7fde, 0x7fde, 0x7fde, 0x7fdd, 0x7fdd, - 0x7fdd, 0x7fdc, 0x7fdc, 0x7fdc, 0x7fdb, 0x7fdb, 0x7fdb, 0x7fdb, - 0x7fda, 0x7fda, 0x7fda, 0x7fd9, 0x7fd9, 0x7fd9, 0x7fd8, 0x7fd8, - 0x7fd8, 0x7fd8, 0x7fd7, 0x7fd7, 0x7fd7, 0x7fd6, 0x7fd6, 0x7fd6, - 0x7fd5, 0x7fd5, 0x7fd5, 0x7fd4, 0x7fd4, 0x7fd4, 0x7fd3, 0x7fd3, - 0x7fd3, 0x7fd2, 0x7fd2, 0x7fd2, 0x7fd1, 0x7fd1, 0x7fd1, 0x7fd0, - 0x7fd0, 0x7fd0, 0x7fcf, 0x7fcf, 0x7fcf, 0x7fce, 0x7fce, 0x7fce, - 0x7fcd, 0x7fcd, 0x7fcd, 0x7fcc, 0x7fcc, 0x7fcc, 0x7fcb, 0x7fcb, - 0x7fcb, 0x7fca, 0x7fca, 0x7fc9, 0x7fc9, 0x7fc9, 0x7fc8, 0x7fc8, - 0x7fc8, 0x7fc7, 0x7fc7, 0x7fc7, 0x7fc6, 0x7fc6, 0x7fc5, 0x7fc5, - 0x7fc5, 0x7fc4, 0x7fc4, 0x7fc4, 0x7fc3, 0x7fc3, 0x7fc2, 0x7fc2, - 0x7fc2, 0x7fc1, 0x7fc1, 0x7fc0, 0x7fc0, 0x7fc0, 0x7fbf, 0x7fbf, - 0x7fbf, 0x7fbe, 0x7fbe, 0x7fbd, 0x7fbd, 0x7fbd, 0x7fbc, 0x7fbc, - 0x7fbb, 0x7fbb, 0x7fbb, 0x7fba, 0x7fba, 0x7fb9, 0x7fb9, 0x7fb8, - 0x7fb8, 0x7fb8, 0x7fb7, 0x7fb7, 0x7fb6, 0x7fb6, 0x7fb6, 0x7fb5, - 0x7fb5, 0x7fb4, 0x7fb4, 0x7fb3, 0x7fb3, 0x7fb3, 0x7fb2, 0x7fb2, - 0x7fb1, 0x7fb1, 0x7fb0, 0x7fb0, 0x7faf, 0x7faf, 0x7faf, 0x7fae, - 0x7fae, 0x7fad, 0x7fad, 0x7fac, 0x7fac, 0x7fac, 0x7fab, 0x7fab, - 0x7faa, 0x7faa, 0x7fa9, 0x7fa9, 0x7fa8, 0x7fa8, 0x7fa7, 0x7fa7, - 0x7fa6, 0x7fa6, 0x7fa6, 0x7fa5, 0x7fa5, 0x7fa4, 0x7fa4, 0x7fa3, - 0x7fa3, 0x7fa2, 0x7fa2, 0x7fa1, 0x7fa1, 0x7fa0, 0x7fa0, 0x7f9f, - 0x7f9f, 0x7f9e, 0x7f9e, 0x7f9d, 0x7f9d, 0x7f9c, 0x7f9c, 0x7f9c, - 0x7f9b, 0x7f9b, 0x7f9a, 0x7f9a, 0x7f99, 0x7f99, 0x7f98, 0x7f98, - 0x7f97, 0x7f97, 0x7f96, 0x7f96, 0x7f95, 0x7f95, 0x7f94, 0x7f94, - 0x7f93, 0x7f92, 0x7f92, 0x7f91, 0x7f91, 0x7f90, 0x7f90, 0x7f8f, - 0x7f8f, 0x7f8e, 0x7f8e, 0x7f8d, 0x7f8d, 0x7f8c, 0x7f8c, 0x7f8b, - 0x7f8b, 0x7f8a, 0x7f8a, 0x7f89, 0x7f89, 0x7f88, 0x7f87, 0x7f87, - 0x7f86, 0x7f86, 0x7f85, 0x7f85, 0x7f84, 0x7f84, 0x7f83, 0x7f83, - 0x7f82, 0x7f81, 0x7f81, 0x7f80, 0x7f80, 0x7f7f, 0x7f7f, 0x7f7e, - 0x7f7e, 0x7f7d, 0x7f7c, 0x7f7c, 0x7f7b, 0x7f7b, 0x7f7a, 0x7f7a, - 0x7f79, 0x7f79, 0x7f78, 0x7f77, 0x7f77, 0x7f76, 0x7f76, 0x7f75, - 0x7f75, 0x7f74, 0x7f73, 0x7f73, 0x7f72, 0x7f72, 0x7f71, 0x7f70, - 0x7f70, 0x7f6f, 0x7f6f, 0x7f6e, 0x7f6d, 0x7f6d, 0x7f6c, 0x7f6c, - 0x7f6b, 0x7f6b, 0x7f6a, 0x7f69, 0x7f69, 0x7f68, 0x7f68, 0x7f67, - 0x7f66, 0x7f66, 0x7f65, 0x7f64, 0x7f64, 0x7f63, 0x7f63, 0x7f62, - 0x7f61, 0x7f61, 0x7f60, 0x7f60, 0x7f5f, 0x7f5e, 0x7f5e, 0x7f5d, - 0x7f5c, 0x7f5c, 0x7f5b, 0x7f5b, 0x7f5a, 0x7f59, 0x7f59, 0x7f58, - 0x7f57, 0x7f57, 0x7f56, 0x7f55, 0x7f55, 0x7f54, 0x7f54, 0x7f53, - 0x7f52, 0x7f52, 0x7f51, 0x7f50, 0x7f50, 0x7f4f, 0x7f4e, 0x7f4e, - 0x7f4d, 0x7f4c, 0x7f4c, 0x7f4b, 0x7f4a, 0x7f4a, 0x7f49, 0x7f48, - 0x7f48, 0x7f47, 0x7f46, 0x7f46, 0x7f45, 0x7f44, 0x7f44, 0x7f43, - 0x7f42, 0x7f42, 0x7f41, 0x7f40, 0x7f40, 0x7f3f, 0x7f3e, 0x7f3e, - 0x7f3d, 0x7f3c, 0x7f3c, 0x7f3b, 0x7f3a, 0x7f3a, 0x7f39, 0x7f38, - 0x7f37, 0x7f37, 0x7f36, 0x7f35, 0x7f35, 0x7f34, 0x7f33, 0x7f33, - 0x7f32, 0x7f31, 0x7f31, 0x7f30, 0x7f2f, 0x7f2e, 0x7f2e, 0x7f2d, - 0x7f2c, 0x7f2c, 0x7f2b, 0x7f2a, 0x7f29, 0x7f29, 0x7f28, 0x7f27, - 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0x13bd, 0x13b7, 0x13b1, 0x13aa, 0x13a4, 0x139e, 0x1398, 0x1391, - 0x138b, 0x1385, 0x137f, 0x1379, 0x1372, 0x136c, 0x1366, 0x1360, - 0x135a, 0x1353, 0x134d, 0x1347, 0x1341, 0x133b, 0x1334, 0x132e, - 0x1328, 0x1322, 0x131b, 0x1315, 0x130f, 0x1309, 0x1303, 0x12fc, - 0x12f6, 0x12f0, 0x12ea, 0x12e4, 0x12dd, 0x12d7, 0x12d1, 0x12cb, - 0x12c4, 0x12be, 0x12b8, 0x12b2, 0x12ac, 0x12a5, 0x129f, 0x1299, - 0x1293, 0x128d, 0x1286, 0x1280, 0x127a, 0x1274, 0x126d, 0x1267, - 0x1261, 0x125b, 0x1255, 0x124e, 0x1248, 0x1242, 0x123c, 0x1235, - 0x122f, 0x1229, 0x1223, 0x121d, 0x1216, 0x1210, 0x120a, 0x1204, - 0x11fd, 0x11f7, 0x11f1, 0x11eb, 0x11e5, 0x11de, 0x11d8, 0x11d2, - 0x11cc, 0x11c5, 0x11bf, 0x11b9, 0x11b3, 0x11ad, 0x11a6, 0x11a0, - 0x119a, 0x1194, 0x118d, 0x1187, 0x1181, 0x117b, 0x1175, 0x116e, - 0x1168, 0x1162, 0x115c, 0x1155, 0x114f, 0x1149, 0x1143, 0x113d, - 0x1136, 0x1130, 0x112a, 0x1124, 0x111d, 0x1117, 0x1111, 0x110b, - 0x1105, 0x10fe, 0x10f8, 0x10f2, 0x10ec, 0x10e5, 0x10df, 0x10d9, - 0x10d3, 0x10cc, 0x10c6, 0x10c0, 0x10ba, 0x10b4, 0x10ad, 0x10a7, - 0x10a1, 0x109b, 0x1094, 0x108e, 0x1088, 0x1082, 0x107b, 0x1075, - 0x106f, 0x1069, 0x1063, 0x105c, 0x1056, 0x1050, 0x104a, 0x1043, - 0x103d, 0x1037, 0x1031, 0x102a, 0x1024, 0x101e, 0x1018, 0x1012, - 0x100b, 0x1005, 0xfff, 0xff9, 0xff2, 0xfec, 0xfe6, 0xfe0, - 0xfd9, 0xfd3, 0xfcd, 0xfc7, 0xfc0, 0xfba, 0xfb4, 0xfae, - 0xfa8, 0xfa1, 0xf9b, 0xf95, 0xf8f, 0xf88, 0xf82, 0xf7c, - 0xf76, 0xf6f, 0xf69, 0xf63, 0xf5d, 0xf56, 0xf50, 0xf4a, - 0xf44, 0xf3e, 0xf37, 0xf31, 0xf2b, 0xf25, 0xf1e, 0xf18, - 0xf12, 0xf0c, 0xf05, 0xeff, 0xef9, 0xef3, 0xeec, 0xee6, - 0xee0, 0xeda, 0xed3, 0xecd, 0xec7, 0xec1, 0xeba, 0xeb4, - 0xeae, 0xea8, 0xea1, 0xe9b, 0xe95, 0xe8f, 0xe89, 0xe82, - 0xe7c, 0xe76, 0xe70, 0xe69, 0xe63, 0xe5d, 0xe57, 0xe50, - 0xe4a, 0xe44, 0xe3e, 0xe37, 0xe31, 0xe2b, 0xe25, 0xe1e, - 0xe18, 0xe12, 0xe0c, 0xe05, 0xdff, 0xdf9, 0xdf3, 0xdec, - 0xde6, 0xde0, 0xdda, 0xdd3, 0xdcd, 0xdc7, 0xdc1, 0xdba, - 0xdb4, 0xdae, 0xda8, 0xda1, 0xd9b, 0xd95, 0xd8f, 0xd88, - 0xd82, 0xd7c, 0xd76, 0xd6f, 0xd69, 0xd63, 0xd5d, 0xd56, - 0xd50, 0xd4a, 0xd44, 0xd3d, 0xd37, 0xd31, 0xd2b, 0xd24, - 0xd1e, 0xd18, 0xd12, 0xd0b, 0xd05, 0xcff, 0xcf9, 0xcf2, - 0xcec, 0xce6, 0xce0, 0xcd9, 0xcd3, 0xccd, 0xcc7, 0xcc0, - 0xcba, 0xcb4, 0xcae, 0xca7, 0xca1, 0xc9b, 0xc95, 0xc8e, - 0xc88, 0xc82, 0xc7c, 0xc75, 0xc6f, 0xc69, 0xc63, 0xc5c, - 0xc56, 0xc50, 0xc4a, 0xc43, 0xc3d, 0xc37, 0xc31, 0xc2a, - 0xc24, 0xc1e, 0xc18, 0xc11, 0xc0b, 0xc05, 0xbff, 0xbf8, - 0xbf2, 0xbec, 0xbe6, 0xbdf, 0xbd9, 0xbd3, 0xbcd, 0xbc6, - 0xbc0, 0xbba, 0xbb4, 0xbad, 0xba7, 0xba1, 0xb9b, 0xb94, - 0xb8e, 0xb88, 0xb81, 0xb7b, 0xb75, 0xb6f, 0xb68, 0xb62, - 0xb5c, 0xb56, 0xb4f, 0xb49, 0xb43, 0xb3d, 0xb36, 0xb30, - 0xb2a, 0xb24, 0xb1d, 0xb17, 0xb11, 0xb0b, 0xb04, 0xafe, - 0xaf8, 0xaf2, 0xaeb, 0xae5, 0xadf, 0xad8, 0xad2, 0xacc, - 0xac6, 0xabf, 0xab9, 0xab3, 0xaad, 0xaa6, 0xaa0, 0xa9a, - 0xa94, 0xa8d, 0xa87, 0xa81, 0xa7b, 0xa74, 0xa6e, 0xa68, - 0xa62, 0xa5b, 0xa55, 0xa4f, 0xa48, 0xa42, 0xa3c, 0xa36, - 0xa2f, 0xa29, 0xa23, 0xa1d, 0xa16, 0xa10, 0xa0a, 0xa04, - 0x9fd, 0x9f7, 0x9f1, 0x9eb, 0x9e4, 0x9de, 0x9d8, 0x9d1, - 0x9cb, 0x9c5, 0x9bf, 0x9b8, 0x9b2, 0x9ac, 0x9a6, 0x99f, - 0x999, 0x993, 0x98d, 0x986, 0x980, 0x97a, 0x973, 0x96d, - 0x967, 0x961, 0x95a, 0x954, 0x94e, 0x948, 0x941, 0x93b, - 0x935, 0x92f, 0x928, 0x922, 0x91c, 0x915, 0x90f, 0x909, - 0x903, 0x8fc, 0x8f6, 0x8f0, 0x8ea, 0x8e3, 0x8dd, 0x8d7, - 0x8d1, 0x8ca, 0x8c4, 0x8be, 0x8b7, 0x8b1, 0x8ab, 0x8a5, - 0x89e, 0x898, 0x892, 0x88c, 0x885, 0x87f, 0x879, 0x872, - 0x86c, 0x866, 0x860, 0x859, 0x853, 0x84d, 0x847, 0x840, - 0x83a, 0x834, 0x82e, 0x827, 0x821, 0x81b, 0x814, 0x80e, - 0x808, 0x802, 0x7fb, 0x7f5, 0x7ef, 0x7e9, 0x7e2, 0x7dc, - 0x7d6, 0x7cf, 0x7c9, 0x7c3, 0x7bd, 0x7b6, 0x7b0, 0x7aa, - 0x7a4, 0x79d, 0x797, 0x791, 0x78a, 0x784, 0x77e, 0x778, - 0x771, 0x76b, 0x765, 0x75f, 0x758, 0x752, 0x74c, 0x745, - 0x73f, 0x739, 0x733, 0x72c, 0x726, 0x720, 0x71a, 0x713, - 0x70d, 0x707, 0x700, 0x6fa, 0x6f4, 0x6ee, 0x6e7, 0x6e1, - 0x6db, 0x6d5, 0x6ce, 0x6c8, 0x6c2, 0x6bb, 0x6b5, 0x6af, - 0x6a9, 0x6a2, 0x69c, 0x696, 0x690, 0x689, 0x683, 0x67d, - 0x676, 0x670, 0x66a, 0x664, 0x65d, 0x657, 0x651, 0x64a, - 0x644, 0x63e, 0x638, 0x631, 0x62b, 0x625, 0x61f, 0x618, - 0x612, 0x60c, 0x605, 0x5ff, 0x5f9, 0x5f3, 0x5ec, 0x5e6, - 0x5e0, 0x5da, 0x5d3, 0x5cd, 0x5c7, 0x5c0, 0x5ba, 0x5b4, - 0x5ae, 0x5a7, 0x5a1, 0x59b, 0x594, 0x58e, 0x588, 0x582, - 0x57b, 0x575, 0x56f, 0x569, 0x562, 0x55c, 0x556, 0x54f, - 0x549, 0x543, 0x53d, 0x536, 0x530, 0x52a, 0x523, 0x51d, - 0x517, 0x511, 0x50a, 0x504, 0x4fe, 0x4f8, 0x4f1, 0x4eb, - 0x4e5, 0x4de, 0x4d8, 0x4d2, 0x4cc, 0x4c5, 0x4bf, 0x4b9, - 0x4b2, 0x4ac, 0x4a6, 0x4a0, 0x499, 0x493, 0x48d, 0x487, - 0x480, 0x47a, 0x474, 0x46d, 0x467, 0x461, 0x45b, 0x454, - 0x44e, 0x448, 0x441, 0x43b, 0x435, 0x42f, 0x428, 0x422, - 0x41c, 0x415, 0x40f, 0x409, 0x403, 0x3fc, 0x3f6, 0x3f0, - 0x3ea, 0x3e3, 0x3dd, 0x3d7, 0x3d0, 0x3ca, 0x3c4, 0x3be, - 0x3b7, 0x3b1, 0x3ab, 0x3a4, 0x39e, 0x398, 0x392, 0x38b, - 0x385, 0x37f, 0x378, 0x372, 0x36c, 0x366, 0x35f, 0x359, - 0x353, 0x34c, 0x346, 0x340, 0x33a, 0x333, 0x32d, 0x327, - 0x321, 0x31a, 0x314, 0x30e, 0x307, 0x301, 0x2fb, 0x2f5, - 0x2ee, 0x2e8, 0x2e2, 0x2db, 0x2d5, 0x2cf, 0x2c9, 0x2c2, - 0x2bc, 0x2b6, 0x2af, 0x2a9, 0x2a3, 0x29d, 0x296, 0x290, - 0x28a, 0x283, 0x27d, 0x277, 0x271, 0x26a, 0x264, 0x25e, - 0x258, 0x251, 0x24b, 0x245, 0x23e, 0x238, 0x232, 0x22c, - 0x225, 0x21f, 0x219, 0x212, 0x20c, 0x206, 0x200, 0x1f9, - 0x1f3, 0x1ed, 0x1e6, 0x1e0, 0x1da, 0x1d4, 0x1cd, 0x1c7, - 0x1c1, 0x1ba, 0x1b4, 0x1ae, 0x1a8, 0x1a1, 0x19b, 0x195, - 0x18e, 0x188, 0x182, 0x17c, 0x175, 0x16f, 0x169, 0x162, - 0x15c, 0x156, 0x150, 0x149, 0x143, 0x13d, 0x137, 0x130, - 0x12a, 0x124, 0x11d, 0x117, 0x111, 0x10b, 0x104, 0xfe, - 0xf8, 0xf1, 0xeb, 0xe5, 0xdf, 0xd8, 0xd2, 0xcc, - 0xc5, 0xbf, 0xb9, 0xb3, 0xac, 0xa6, 0xa0, 0x99, - 0x93, 0x8d, 0x87, 0x80, 0x7a, 0x74, 0x6d, 0x67, - 0x61, 0x5b, 0x54, 0x4e, 0x48, 0x41, 0x3b, 0x35, - 0x2f, 0x28, 0x22, 0x1c, 0x15, 0xf, 0x9, 0x3, -}; - -/** - * @brief Initialization function for the Q15 DCT4/IDCT4. - * @param[in,out] *S points to an instance of Q15 DCT4/IDCT4 structure. - * @param[in] *S_RFFT points to an instance of Q15 RFFT/RIFFT structure. - * @param[in] *S_CFFT points to an instance of Q15 CFFT/CIFFT structure. - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length. - * \par Normalizing factor: - * The normalizing factor is sqrt(2/N), which depends on the size of transform N. - * Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes: - * \image html dct4NormalizingQ15Table.gif - */ - -arm_status arm_dct4_init_q15( - arm_dct4_instance_q15 * S, - arm_rfft_instance_q15 * S_RFFT, - arm_cfft_radix4_instance_q15 * S_CFFT, - uint16_t N, - uint16_t Nby2, - q15_t normalize) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initializing the pointer array with the weight table base addresses of different lengths */ - q15_t *twiddlePtr[4] = { (q15_t *) WeightsQ15_128, (q15_t *) WeightsQ15_512, - (q15_t *) WeightsQ15_2048, (q15_t *) WeightsQ15_8192 - }; - - /* Initializing the pointer array with the cos factor table base addresses of different lengths */ - q15_t *pCosFactor[4] = - { (q15_t *) cos_factorsQ15_128, (q15_t *) cos_factorsQ15_512, - (q15_t *) cos_factorsQ15_2048, (q15_t *) cos_factorsQ15_8192 - }; - - /* Initialize the DCT4 length */ - S->N = N; - - /* Initialize the half of DCT4 length */ - S->Nby2 = Nby2; - - /* Initialize the DCT4 Normalizing factor */ - S->normalize = normalize; - - /* Initialize Real FFT Instance */ - S->pRfft = S_RFFT; - - /* Initialize Complex FFT Instance */ - S->pCfft = S_CFFT; - - switch (N) - { - /* Initialize the table modifier values */ - case 8192u: - S->pTwiddle = twiddlePtr[3]; - S->pCosFactor = pCosFactor[3]; - break; - case 2048u: - S->pTwiddle = twiddlePtr[2]; - S->pCosFactor = pCosFactor[2]; - break; - case 512u: - S->pTwiddle = twiddlePtr[1]; - S->pCosFactor = pCosFactor[1]; - break; - case 128u: - S->pTwiddle = twiddlePtr[0]; - S->pCosFactor = pCosFactor[0]; - break; - default: - status = ARM_MATH_ARGUMENT_ERROR; - } - - /* Initialize the RFFT/RIFFT */ - arm_rfft_init_q15(S->pRfft, S->pCfft, S->N, 0u, 1u); - - /* return the status of DCT4 Init function */ - return (status); -} - -/** - * @} end of DCT4_IDCT4 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c deleted file mode 100644 index 9294ae062c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c +++ /dev/null @@ -1,8356 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dct4_init_q31.c -* -* Description: Initialization function of DCT-4 & IDCT4 Q31 -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup DCT4_IDCT4 - * @{ - */ - -/* -* @brief Weights Table -*/ - -/** -* \par -* Weights tables are generated using the formula :
weights[n] = e^(-j*n*pi/(2*N))
-* \par -* C command to generate the table -*
    
-* for(i = 0; i< N; i++)    
-* {    
-*   weights[2*i]= cos(i*c);    
-*   weights[(2*i)+1]= -sin(i * c);    
-* } 
-* \par -* where N is the Number of weights to be calculated and c is pi/(2*N) -* \par -* Convert the output to q31 format by multiplying with 2^31 and saturated if required. -* \par -* In the tables below the real and imaginary values are placed alternatively, hence the -* array length is 2*N. -*/ - -static const q31_t WeightsQ31_128[256] = { - 0x7fffffff, 0x0, 0x7ffd885a, 0xfe6de2e0, 0x7ff62182, 0xfcdbd541, 0x7fe9cbc0, - 0xfb49e6a3, - 0x7fd8878e, 0xf9b82684, 0x7fc25596, 0xf826a462, 0x7fa736b4, 0xf6956fb7, - 0x7f872bf3, 0xf50497fb, - 0x7f62368f, 0xf3742ca2, 0x7f3857f6, 0xf1e43d1c, 0x7f0991c4, 0xf054d8d5, - 0x7ed5e5c6, 0xeec60f31, - 0x7e9d55fc, 0xed37ef91, 0x7e5fe493, 0xebaa894f, 0x7e1d93ea, 0xea1debbb, - 0x7dd6668f, 0xe8922622, - 0x7d8a5f40, 0xe70747c4, 0x7d3980ec, 0xe57d5fda, 0x7ce3ceb2, 0xe3f47d96, - 0x7c894bde, 0xe26cb01b, - 0x7c29fbee, 0xe0e60685, 0x7bc5e290, 0xdf608fe4, 0x7b5d039e, 0xdddc5b3b, - 0x7aef6323, 0xdc597781, - 0x7a7d055b, 0xdad7f3a2, 0x7a05eead, 0xd957de7a, 0x798a23b1, 0xd7d946d8, - 0x7909a92d, 0xd65c3b7b, - 0x78848414, 0xd4e0cb15, 0x77fab989, 0xd3670446, 0x776c4edb, 0xd1eef59e, - 0x76d94989, 0xd078ad9e, - 0x7641af3d, 0xcf043ab3, 0x75a585cf, 0xcd91ab39, 0x7504d345, 0xcc210d79, - 0x745f9dd1, 0xcab26fa9, - 0x73b5ebd1, 0xc945dfec, 0x7307c3d0, 0xc7db6c50, 0x72552c85, 0xc67322ce, - 0x719e2cd2, 0xc50d1149, - 0x70e2cbc6, 0xc3a94590, 0x7023109a, 0xc247cd5a, 0x6f5f02b2, 0xc0e8b648, - 0x6e96a99d, 0xbf8c0de3, - 0x6dca0d14, 0xbe31e19b, 0x6cf934fc, 0xbcda3ecb, 0x6c242960, 0xbb8532b0, - 0x6b4af279, 0xba32ca71, - 0x6a6d98a4, 0xb8e31319, 0x698c246c, 0xb796199b, 0x68a69e81, 0xb64beacd, - 0x67bd0fbd, 0xb5049368, - 0x66cf8120, 0xb3c0200c, 0x65ddfbd3, 0xb27e9d3c, 0x64e88926, 0xb140175b, - 0x63ef3290, 0xb0049ab3, - 0x62f201ac, 0xaecc336c, 0x61f1003f, 0xad96ed92, 0x60ec3830, 0xac64d510, - 0x5fe3b38d, 0xab35f5b5, - 0x5ed77c8a, 0xaa0a5b2e, 0x5dc79d7c, 0xa8e21106, 0x5cb420e0, 0xa7bd22ac, - 0x5b9d1154, 0xa69b9b68, - 0x5a82799a, 0xa57d8666, 0x59646498, 0xa462eeac, 0x5842dd54, 0xa34bdf20, - 0x571deefa, 0xa2386284, - 0x55f5a4d2, 0xa1288376, 0x54ca0a4b, 0xa01c4c73, 0x539b2af0, 0x9f13c7d0, - 0x5269126e, 0x9e0effc1, - 0x5133cc94, 0x9d0dfe54, 0x4ffb654d, 0x9c10cd70, 0x4ebfe8a5, 0x9b1776da, - 0x4d8162c4, 0x9a22042d, - 0x4c3fdff4, 0x99307ee0, 0x4afb6c98, 0x9842f043, 0x49b41533, 0x9759617f, - 0x4869e665, 0x9673db94, - 0x471cece7, 0x9592675c, 0x45cd358f, 0x94b50d87, 0x447acd50, 0x93dbd6a0, - 0x4325c135, 0x9306cb04, - 0x41ce1e65, 0x9235f2ec, 0x4073f21d, 0x91695663, 0x3f1749b8, 0x90a0fd4e, - 0x3db832a6, 0x8fdcef66, - 0x3c56ba70, 0x8f1d343a, 0x3af2eeb7, 0x8e61d32e, 0x398cdd32, 0x8daad37b, - 0x382493b0, 0x8cf83c30, - 0x36ba2014, 0x8c4a142f, 0x354d9057, 0x8ba0622f, 0x33def287, 0x8afb2cbb, - 0x326e54c7, 0x8a5a7a31, - 0x30fbc54d, 0x89be50c3, 0x2f875262, 0x8926b677, 0x2e110a62, 0x8893b125, - 0x2c98fbba, 0x88054677, - 0x2b1f34eb, 0x877b7bec, 0x29a3c485, 0x86f656d3, 0x2826b928, 0x8675dc4f, - 0x26a82186, 0x85fa1153, - 0x25280c5e, 0x8582faa5, 0x23a6887f, 0x85109cdd, 0x2223a4c5, 0x84a2fc62, - 0x209f701c, 0x843a1d70, - 0x1f19f97b, 0x83d60412, 0x1d934fe5, 0x8376b422, 0x1c0b826a, 0x831c314e, - 0x1a82a026, 0x82c67f14, - 0x18f8b83c, 0x8275a0c0, 0x176dd9de, 0x82299971, 0x15e21445, 0x81e26c16, - 0x145576b1, 0x81a01b6d, - 0x12c8106f, 0x8162aa04, 0x1139f0cf, 0x812a1a3a, 0xfab272b, 0x80f66e3c, - 0xe1bc2e4, 0x80c7a80a, - 0xc8bd35e, 0x809dc971, 0xafb6805, 0x8078d40d, 0x96a9049, 0x8058c94c, - 0x7d95b9e, 0x803daa6a, - 0x647d97c, 0x80277872, 0x4b6195d, 0x80163440, 0x3242abf, 0x8009de7e, - 0x1921d20, 0x800277a6, -}; - -static const q31_t WeightsQ31_512[1024] = { - 0x7fffffff, 0x0, 0x7fffd886, 0xff9b781d, 0x7fff6216, 0xff36f078, 0x7ffe9cb2, - 0xfed2694f, - 0x7ffd885a, 0xfe6de2e0, 0x7ffc250f, 0xfe095d69, 0x7ffa72d1, 0xfda4d929, - 0x7ff871a2, 0xfd40565c, - 0x7ff62182, 0xfcdbd541, 0x7ff38274, 0xfc775616, 0x7ff09478, 0xfc12d91a, - 0x7fed5791, 0xfbae5e89, - 0x7fe9cbc0, 0xfb49e6a3, 0x7fe5f108, 0xfae571a4, 0x7fe1c76b, 0xfa80ffcb, - 0x7fdd4eec, 0xfa1c9157, - 0x7fd8878e, 0xf9b82684, 0x7fd37153, 0xf953bf91, 0x7fce0c3e, 0xf8ef5cbb, - 0x7fc85854, 0xf88afe42, - 0x7fc25596, 0xf826a462, 0x7fbc040a, 0xf7c24f59, 0x7fb563b3, 0xf75dff66, - 0x7fae7495, 0xf6f9b4c6, - 0x7fa736b4, 0xf6956fb7, 0x7f9faa15, 0xf6313077, 0x7f97cebd, 0xf5ccf743, - 0x7f8fa4b0, 0xf568c45b, - 0x7f872bf3, 0xf50497fb, 0x7f7e648c, 0xf4a07261, 0x7f754e80, 0xf43c53cb, - 0x7f6be9d4, 0xf3d83c77, - 0x7f62368f, 0xf3742ca2, 0x7f5834b7, 0xf310248a, 0x7f4de451, 0xf2ac246e, - 0x7f434563, 0xf2482c8a, - 0x7f3857f6, 0xf1e43d1c, 0x7f2d1c0e, 0xf1805662, 0x7f2191b4, 0xf11c789a, - 0x7f15b8ee, 0xf0b8a401, - 0x7f0991c4, 0xf054d8d5, 0x7efd1c3c, 0xeff11753, 0x7ef05860, 0xef8d5fb8, - 0x7ee34636, 0xef29b243, - 0x7ed5e5c6, 0xeec60f31, 0x7ec8371a, 0xee6276bf, 0x7eba3a39, 0xedfee92b, - 0x7eabef2c, 0xed9b66b2, - 0x7e9d55fc, 0xed37ef91, 0x7e8e6eb2, 0xecd48407, 0x7e7f3957, 0xec71244f, - 0x7e6fb5f4, 0xec0dd0a8, - 0x7e5fe493, 0xebaa894f, 0x7e4fc53e, 0xeb474e81, 0x7e3f57ff, 0xeae4207a, - 0x7e2e9cdf, 0xea80ff7a, - 0x7e1d93ea, 0xea1debbb, 0x7e0c3d29, 0xe9bae57d, 0x7dfa98a8, 0xe957ecfb, - 0x7de8a670, 0xe8f50273, - 0x7dd6668f, 0xe8922622, 0x7dc3d90d, 0xe82f5844, 0x7db0fdf8, 0xe7cc9917, - 0x7d9dd55a, 0xe769e8d8, - 0x7d8a5f40, 0xe70747c4, 0x7d769bb5, 0xe6a4b616, 0x7d628ac6, 0xe642340d, - 0x7d4e2c7f, 0xe5dfc1e5, - 0x7d3980ec, 0xe57d5fda, 0x7d24881b, 0xe51b0e2a, 0x7d0f4218, 0xe4b8cd11, - 0x7cf9aef0, 0xe4569ccb, - 0x7ce3ceb2, 0xe3f47d96, 0x7ccda169, 0xe3926fad, 0x7cb72724, 0xe330734d, - 0x7ca05ff1, 0xe2ce88b3, - 0x7c894bde, 0xe26cb01b, 0x7c71eaf9, 0xe20ae9c1, 0x7c5a3d50, 0xe1a935e2, - 0x7c4242f2, 0xe14794ba, - 0x7c29fbee, 0xe0e60685, 0x7c116853, 0xe0848b7f, 0x7bf88830, 0xe02323e5, - 0x7bdf5b94, 0xdfc1cff3, - 0x7bc5e290, 0xdf608fe4, 0x7bac1d31, 0xdeff63f4, 0x7b920b89, 0xde9e4c60, - 0x7b77ada8, 0xde3d4964, - 0x7b5d039e, 0xdddc5b3b, 0x7b420d7a, 0xdd7b8220, 0x7b26cb4f, 0xdd1abe51, - 0x7b0b3d2c, 0xdcba1008, - 0x7aef6323, 0xdc597781, 0x7ad33d45, 0xdbf8f4f8, 0x7ab6cba4, 0xdb9888a8, - 0x7a9a0e50, 0xdb3832cd, - 0x7a7d055b, 0xdad7f3a2, 0x7a5fb0d8, 0xda77cb63, 0x7a4210d8, 0xda17ba4a, - 0x7a24256f, 0xd9b7c094, - 0x7a05eead, 0xd957de7a, 0x79e76ca7, 0xd8f81439, 0x79c89f6e, 0xd898620c, - 0x79a98715, 0xd838c82d, - 0x798a23b1, 0xd7d946d8, 0x796a7554, 0xd779de47, 0x794a7c12, 0xd71a8eb5, - 0x792a37fe, 0xd6bb585e, - 0x7909a92d, 0xd65c3b7b, 0x78e8cfb2, 0xd5fd3848, 0x78c7aba2, 0xd59e4eff, - 0x78a63d11, 0xd53f7fda, - 0x78848414, 0xd4e0cb15, 0x786280bf, 0xd48230e9, 0x78403329, 0xd423b191, - 0x781d9b65, 0xd3c54d47, - 0x77fab989, 0xd3670446, 0x77d78daa, 0xd308d6c7, 0x77b417df, 0xd2aac504, - 0x7790583e, 0xd24ccf39, - 0x776c4edb, 0xd1eef59e, 0x7747fbce, 0xd191386e, 0x77235f2d, 0xd13397e2, - 0x76fe790e, 0xd0d61434, - 0x76d94989, 0xd078ad9e, 0x76b3d0b4, 0xd01b6459, 0x768e0ea6, 0xcfbe389f, - 0x76680376, 0xcf612aaa, - 0x7641af3d, 0xcf043ab3, 0x761b1211, 0xcea768f2, 0x75f42c0b, 0xce4ab5a2, - 0x75ccfd42, 0xcdee20fc, - 0x75a585cf, 0xcd91ab39, 0x757dc5ca, 0xcd355491, 0x7555bd4c, 0xccd91d3d, - 0x752d6c6c, 0xcc7d0578, - 0x7504d345, 0xcc210d79, 0x74dbf1ef, 0xcbc53579, 0x74b2c884, 0xcb697db0, - 0x7489571c, 0xcb0de658, - 0x745f9dd1, 0xcab26fa9, 0x74359cbd, 0xca5719db, 0x740b53fb, 0xc9fbe527, - 0x73e0c3a3, 0xc9a0d1c5, - 0x73b5ebd1, 0xc945dfec, 0x738acc9e, 0xc8eb0fd6, 0x735f6626, 0xc89061ba, - 0x7333b883, 0xc835d5d0, - 0x7307c3d0, 0xc7db6c50, 0x72db8828, 0xc7812572, 0x72af05a7, 0xc727016d, - 0x72823c67, 0xc6cd0079, - 0x72552c85, 0xc67322ce, 0x7227d61c, 0xc61968a2, 0x71fa3949, 0xc5bfd22e, - 0x71cc5626, 0xc5665fa9, - 0x719e2cd2, 0xc50d1149, 0x716fbd68, 0xc4b3e746, 0x71410805, 0xc45ae1d7, - 0x71120cc5, 0xc4020133, - 0x70e2cbc6, 0xc3a94590, 0x70b34525, 0xc350af26, 0x708378ff, 0xc2f83e2a, - 0x70536771, 0xc29ff2d4, - 0x7023109a, 0xc247cd5a, 0x6ff27497, 0xc1efcdf3, 0x6fc19385, 0xc197f4d4, - 0x6f906d84, 0xc1404233, - 0x6f5f02b2, 0xc0e8b648, 0x6f2d532c, 0xc0915148, 0x6efb5f12, 0xc03a1368, - 0x6ec92683, 0xbfe2fcdf, - 0x6e96a99d, 0xbf8c0de3, 0x6e63e87f, 0xbf3546a8, 0x6e30e34a, 0xbedea765, - 0x6dfd9a1c, 0xbe88304f, - 0x6dca0d14, 0xbe31e19b, 0x6d963c54, 0xbddbbb7f, 0x6d6227fa, 0xbd85be30, - 0x6d2dd027, 0xbd2fe9e2, - 0x6cf934fc, 0xbcda3ecb, 0x6cc45698, 0xbc84bd1f, 0x6c8f351c, 0xbc2f6513, - 0x6c59d0a9, 0xbbda36dd, - 0x6c242960, 0xbb8532b0, 0x6bee3f62, 0xbb3058c0, 0x6bb812d1, 0xbadba943, - 0x6b81a3cd, 0xba87246d, - 0x6b4af279, 0xba32ca71, 0x6b13fef5, 0xb9de9b83, 0x6adcc964, 0xb98a97d8, - 0x6aa551e9, 0xb936bfa4, - 0x6a6d98a4, 0xb8e31319, 0x6a359db9, 0xb88f926d, 0x69fd614a, 0xb83c3dd1, - 0x69c4e37a, 0xb7e9157a, - 0x698c246c, 0xb796199b, 0x69532442, 0xb7434a67, 0x6919e320, 0xb6f0a812, - 0x68e06129, 0xb69e32cd, - 0x68a69e81, 0xb64beacd, 0x686c9b4b, 0xb5f9d043, 0x683257ab, 0xb5a7e362, - 0x67f7d3c5, 0xb556245e, - 0x67bd0fbd, 0xb5049368, 0x67820bb7, 0xb4b330b3, 0x6746c7d8, 0xb461fc70, - 0x670b4444, 0xb410f6d3, - 0x66cf8120, 0xb3c0200c, 0x66937e91, 0xb36f784f, 0x66573cbb, 0xb31effcc, - 0x661abbc5, 0xb2ceb6b5, - 0x65ddfbd3, 0xb27e9d3c, 0x65a0fd0b, 0xb22eb392, 0x6563bf92, 0xb1def9e9, - 0x6526438f, 0xb18f7071, - 0x64e88926, 0xb140175b, 0x64aa907f, 0xb0f0eeda, 0x646c59bf, 0xb0a1f71d, - 0x642de50d, 0xb0533055, - 0x63ef3290, 0xb0049ab3, 0x63b0426d, 0xafb63667, 0x637114cc, 0xaf6803a2, - 0x6331a9d4, 0xaf1a0293, - 0x62f201ac, 0xaecc336c, 0x62b21c7b, 0xae7e965b, 0x6271fa69, 0xae312b92, - 0x62319b9d, 0xade3f33e, - 0x61f1003f, 0xad96ed92, 0x61b02876, 0xad4a1aba, 0x616f146c, 0xacfd7ae8, - 0x612dc447, 0xacb10e4b, - 0x60ec3830, 0xac64d510, 0x60aa7050, 0xac18cf69, 0x60686ccf, 0xabccfd83, - 0x60262dd6, 0xab815f8d, - 0x5fe3b38d, 0xab35f5b5, 0x5fa0fe1f, 0xaaeac02c, 0x5f5e0db3, 0xaa9fbf1e, - 0x5f1ae274, 0xaa54f2ba, - 0x5ed77c8a, 0xaa0a5b2e, 0x5e93dc1f, 0xa9bff8a8, 0x5e50015d, 0xa975cb57, - 0x5e0bec6e, 0xa92bd367, - 0x5dc79d7c, 0xa8e21106, 0x5d8314b1, 0xa8988463, 0x5d3e5237, 0xa84f2daa, - 0x5cf95638, 0xa8060d08, - 0x5cb420e0, 0xa7bd22ac, 0x5c6eb258, 0xa7746ec0, 0x5c290acc, 0xa72bf174, - 0x5be32a67, 0xa6e3aaf2, - 0x5b9d1154, 0xa69b9b68, 0x5b56bfbd, 0xa653c303, 0x5b1035cf, 0xa60c21ee, - 0x5ac973b5, 0xa5c4b855, - 0x5a82799a, 0xa57d8666, 0x5a3b47ab, 0xa5368c4b, 0x59f3de12, 0xa4efca31, - 0x59ac3cfd, 0xa4a94043, - 0x59646498, 0xa462eeac, 0x591c550e, 0xa41cd599, 0x58d40e8c, 0xa3d6f534, - 0x588b9140, 0xa3914da8, - 0x5842dd54, 0xa34bdf20, 0x57f9f2f8, 0xa306a9c8, 0x57b0d256, 0xa2c1adc9, - 0x57677b9d, 0xa27ceb4f, - 0x571deefa, 0xa2386284, 0x56d42c99, 0xa1f41392, 0x568a34a9, 0xa1affea3, - 0x56400758, 0xa16c23e1, - 0x55f5a4d2, 0xa1288376, 0x55ab0d46, 0xa0e51d8c, 0x556040e2, 0xa0a1f24d, - 0x55153fd4, 0xa05f01e1, - 0x54ca0a4b, 0xa01c4c73, 0x547ea073, 0x9fd9d22a, 0x5433027d, 0x9f979331, - 0x53e73097, 0x9f558fb0, - 0x539b2af0, 0x9f13c7d0, 0x534ef1b5, 0x9ed23bb9, 0x53028518, 0x9e90eb94, - 0x52b5e546, 0x9e4fd78a, - 0x5269126e, 0x9e0effc1, 0x521c0cc2, 0x9dce6463, 0x51ced46e, 0x9d8e0597, - 0x518169a5, 0x9d4de385, - 0x5133cc94, 0x9d0dfe54, 0x50e5fd6d, 0x9cce562c, 0x5097fc5e, 0x9c8eeb34, - 0x5049c999, 0x9c4fbd93, - 0x4ffb654d, 0x9c10cd70, 0x4faccfab, 0x9bd21af3, 0x4f5e08e3, 0x9b93a641, - 0x4f0f1126, 0x9b556f81, - 0x4ebfe8a5, 0x9b1776da, 0x4e708f8f, 0x9ad9bc71, 0x4e210617, 0x9a9c406e, - 0x4dd14c6e, 0x9a5f02f5, - 0x4d8162c4, 0x9a22042d, 0x4d31494b, 0x99e5443b, 0x4ce10034, 0x99a8c345, - 0x4c9087b1, 0x996c816f, - 0x4c3fdff4, 0x99307ee0, 0x4bef092d, 0x98f4bbbc, 0x4b9e0390, 0x98b93828, - 0x4b4ccf4d, 0x987df449, - 0x4afb6c98, 0x9842f043, 0x4aa9dba2, 0x98082c3b, 0x4a581c9e, 0x97cda855, - 0x4a062fbd, 0x979364b5, - 0x49b41533, 0x9759617f, 0x4961cd33, 0x971f9ed7, 0x490f57ee, 0x96e61ce0, - 0x48bcb599, 0x96acdbbe, - 0x4869e665, 0x9673db94, 0x4816ea86, 0x963b1c86, 0x47c3c22f, 0x96029eb6, - 0x47706d93, 0x95ca6247, - 0x471cece7, 0x9592675c, 0x46c9405c, 0x955aae17, 0x46756828, 0x9523369c, - 0x4621647d, 0x94ec010b, - 0x45cd358f, 0x94b50d87, 0x4578db93, 0x947e5c33, 0x452456bd, 0x9447ed2f, - 0x44cfa740, 0x9411c09e, - 0x447acd50, 0x93dbd6a0, 0x4425c923, 0x93a62f57, 0x43d09aed, 0x9370cae4, - 0x437b42e1, 0x933ba968, - 0x4325c135, 0x9306cb04, 0x42d0161e, 0x92d22fd9, 0x427a41d0, 0x929dd806, - 0x42244481, 0x9269c3ac, - 0x41ce1e65, 0x9235f2ec, 0x4177cfb1, 0x920265e4, 0x4121589b, 0x91cf1cb6, - 0x40cab958, 0x919c1781, - 0x4073f21d, 0x91695663, 0x401d0321, 0x9136d97d, 0x3fc5ec98, 0x9104a0ee, - 0x3f6eaeb8, 0x90d2acd4, - 0x3f1749b8, 0x90a0fd4e, 0x3ebfbdcd, 0x906f927c, 0x3e680b2c, 0x903e6c7b, - 0x3e10320d, 0x900d8b69, - 0x3db832a6, 0x8fdcef66, 0x3d600d2c, 0x8fac988f, 0x3d07c1d6, 0x8f7c8701, - 0x3caf50da, 0x8f4cbadb, - 0x3c56ba70, 0x8f1d343a, 0x3bfdfecd, 0x8eedf33b, 0x3ba51e29, 0x8ebef7fb, - 0x3b4c18ba, 0x8e904298, - 0x3af2eeb7, 0x8e61d32e, 0x3a99a057, 0x8e33a9da, 0x3a402dd2, 0x8e05c6b7, - 0x39e6975e, 0x8dd829e4, - 0x398cdd32, 0x8daad37b, 0x3932ff87, 0x8d7dc399, 0x38d8fe93, 0x8d50fa59, - 0x387eda8e, 0x8d2477d8, - 0x382493b0, 0x8cf83c30, 0x37ca2a30, 0x8ccc477d, 0x376f9e46, 0x8ca099da, - 0x3714f02a, 0x8c753362, - 0x36ba2014, 0x8c4a142f, 0x365f2e3b, 0x8c1f3c5d, 0x36041ad9, 0x8bf4ac05, - 0x35a8e625, 0x8bca6343, - 0x354d9057, 0x8ba0622f, 0x34f219a8, 0x8b76a8e4, 0x34968250, 0x8b4d377c, - 0x343aca87, 0x8b240e11, - 0x33def287, 0x8afb2cbb, 0x3382fa88, 0x8ad29394, 0x3326e2c3, 0x8aaa42b4, - 0x32caab6f, 0x8a823a36, - 0x326e54c7, 0x8a5a7a31, 0x3211df04, 0x8a3302be, 0x31b54a5e, 0x8a0bd3f5, - 0x3158970e, 0x89e4edef, - 0x30fbc54d, 0x89be50c3, 0x309ed556, 0x8997fc8a, 0x3041c761, 0x8971f15a, - 0x2fe49ba7, 0x894c2f4c, - 0x2f875262, 0x8926b677, 0x2f29ebcc, 0x890186f2, 0x2ecc681e, 0x88dca0d3, - 0x2e6ec792, 0x88b80432, - 0x2e110a62, 0x8893b125, 0x2db330c7, 0x886fa7c2, 0x2d553afc, 0x884be821, - 0x2cf72939, 0x88287256, - 0x2c98fbba, 0x88054677, 0x2c3ab2b9, 0x87e2649b, 0x2bdc4e6f, 0x87bfccd7, - 0x2b7dcf17, 0x879d7f41, - 0x2b1f34eb, 0x877b7bec, 0x2ac08026, 0x8759c2ef, 0x2a61b101, 0x8738545e, - 0x2a02c7b8, 0x8717304e, - 0x29a3c485, 0x86f656d3, 0x2944a7a2, 0x86d5c802, 0x28e5714b, 0x86b583ee, - 0x288621b9, 0x86958aac, - 0x2826b928, 0x8675dc4f, 0x27c737d3, 0x865678eb, 0x27679df4, 0x86376092, - 0x2707ebc7, 0x86189359, - 0x26a82186, 0x85fa1153, 0x26483f6c, 0x85dbda91, 0x25e845b6, 0x85bdef28, - 0x2588349d, 0x85a04f28, - 0x25280c5e, 0x8582faa5, 0x24c7cd33, 0x8565f1b0, 0x24677758, 0x8549345c, - 0x24070b08, 0x852cc2bb, - 0x23a6887f, 0x85109cdd, 0x2345eff8, 0x84f4c2d4, 0x22e541af, 0x84d934b1, - 0x22847de0, 0x84bdf286, - 0x2223a4c5, 0x84a2fc62, 0x21c2b69c, 0x84885258, 0x2161b3a0, 0x846df477, - 0x21009c0c, 0x8453e2cf, - 0x209f701c, 0x843a1d70, 0x203e300d, 0x8420a46c, 0x1fdcdc1b, 0x840777d0, - 0x1f7b7481, 0x83ee97ad, - 0x1f19f97b, 0x83d60412, 0x1eb86b46, 0x83bdbd0e, 0x1e56ca1e, 0x83a5c2b0, - 0x1df5163f, 0x838e1507, - 0x1d934fe5, 0x8376b422, 0x1d31774d, 0x835fa00f, 0x1ccf8cb3, 0x8348d8dc, - 0x1c6d9053, 0x83325e97, - 0x1c0b826a, 0x831c314e, 0x1ba96335, 0x83065110, 0x1b4732ef, 0x82f0bde8, - 0x1ae4f1d6, 0x82db77e5, - 0x1a82a026, 0x82c67f14, 0x1a203e1b, 0x82b1d381, 0x19bdcbf3, 0x829d753a, - 0x195b49ea, 0x8289644b, - 0x18f8b83c, 0x8275a0c0, 0x18961728, 0x82622aa6, 0x183366e9, 0x824f0208, - 0x17d0a7bc, 0x823c26f3, - 0x176dd9de, 0x82299971, 0x170afd8d, 0x82175990, 0x16a81305, 0x82056758, - 0x16451a83, 0x81f3c2d7, - 0x15e21445, 0x81e26c16, 0x157f0086, 0x81d16321, 0x151bdf86, 0x81c0a801, - 0x14b8b17f, 0x81b03ac2, - 0x145576b1, 0x81a01b6d, 0x13f22f58, 0x81904a0c, 0x138edbb1, 0x8180c6a9, - 0x132b7bf9, 0x8171914e, - 0x12c8106f, 0x8162aa04, 0x1264994e, 0x815410d4, 0x120116d5, 0x8145c5c7, - 0x119d8941, 0x8137c8e6, - 0x1139f0cf, 0x812a1a3a, 0x10d64dbd, 0x811cb9ca, 0x1072a048, 0x810fa7a0, - 0x100ee8ad, 0x8102e3c4, - 0xfab272b, 0x80f66e3c, 0xf475bff, 0x80ea4712, 0xee38766, 0x80de6e4c, - 0xe7fa99e, 0x80d2e3f2, - 0xe1bc2e4, 0x80c7a80a, 0xdb7d376, 0x80bcba9d, 0xd53db92, 0x80b21baf, - 0xcefdb76, 0x80a7cb49, - 0xc8bd35e, 0x809dc971, 0xc27c389, 0x8094162c, 0xbc3ac35, 0x808ab180, - 0xb5f8d9f, 0x80819b74, - 0xafb6805, 0x8078d40d, 0xa973ba5, 0x80705b50, 0xa3308bd, 0x80683143, - 0x9cecf89, 0x806055eb, - 0x96a9049, 0x8058c94c, 0x9064b3a, 0x80518b6b, 0x8a2009a, 0x804a9c4d, - 0x83db0a7, 0x8043fbf6, - 0x7d95b9e, 0x803daa6a, 0x77501be, 0x8037a7ac, 0x710a345, 0x8031f3c2, - 0x6ac406f, 0x802c8ead, - 0x647d97c, 0x80277872, 0x5e36ea9, 0x8022b114, 0x57f0035, 0x801e3895, - 0x51a8e5c, 0x801a0ef8, - 0x4b6195d, 0x80163440, 0x451a177, 0x8012a86f, 0x3ed26e6, 0x800f6b88, - 0x388a9ea, 0x800c7d8c, - 0x3242abf, 0x8009de7e, 0x2bfa9a4, 0x80078e5e, 0x25b26d7, 0x80058d2f, - 0x1f6a297, 0x8003daf1, - 0x1921d20, 0x800277a6, 0x12d96b1, 0x8001634e, 0xc90f88, 0x80009dea, - 0x6487e3, 0x8000277a, -}; - -static const q31_t WeightsQ31_2048[4096] = { - 0x7fffffff, 0x0, 0x7ffffd88, 0xffe6de05, 0x7ffff621, 0xffcdbc0b, 0x7fffe9cb, - 0xffb49a12, - 0x7fffd886, 0xff9b781d, 0x7fffc251, 0xff82562c, 0x7fffa72c, 0xff69343f, - 0x7fff8719, 0xff501258, - 0x7fff6216, 0xff36f078, 0x7fff3824, 0xff1dcea0, 0x7fff0943, 0xff04acd0, - 0x7ffed572, 0xfeeb8b0a, - 0x7ffe9cb2, 0xfed2694f, 0x7ffe5f03, 0xfeb947a0, 0x7ffe1c65, 0xfea025fd, - 0x7ffdd4d7, 0xfe870467, - 0x7ffd885a, 0xfe6de2e0, 0x7ffd36ee, 0xfe54c169, 0x7ffce093, 0xfe3ba002, - 0x7ffc8549, 0xfe227eac, - 0x7ffc250f, 0xfe095d69, 0x7ffbbfe6, 0xfdf03c3a, 0x7ffb55ce, 0xfdd71b1e, - 0x7ffae6c7, 0xfdbdfa18, - 0x7ffa72d1, 0xfda4d929, 0x7ff9f9ec, 0xfd8bb850, 0x7ff97c18, 0xfd729790, - 0x7ff8f954, 0xfd5976e9, - 0x7ff871a2, 0xfd40565c, 0x7ff7e500, 0xfd2735ea, 0x7ff75370, 0xfd0e1594, - 0x7ff6bcf0, 0xfcf4f55c, - 0x7ff62182, 0xfcdbd541, 0x7ff58125, 0xfcc2b545, 0x7ff4dbd9, 0xfca9956a, - 0x7ff4319d, 0xfc9075af, - 0x7ff38274, 0xfc775616, 0x7ff2ce5b, 0xfc5e36a0, 0x7ff21553, 0xfc45174e, - 0x7ff1575d, 0xfc2bf821, - 0x7ff09478, 0xfc12d91a, 0x7fefcca4, 0xfbf9ba39, 0x7feeffe1, 0xfbe09b80, - 0x7fee2e30, 0xfbc77cf0, - 0x7fed5791, 0xfbae5e89, 0x7fec7c02, 0xfb95404d, 0x7feb9b85, 0xfb7c223d, - 0x7feab61a, 0xfb630459, - 0x7fe9cbc0, 0xfb49e6a3, 0x7fe8dc78, 0xfb30c91b, 0x7fe7e841, 0xfb17abc2, - 0x7fe6ef1c, 0xfafe8e9b, - 0x7fe5f108, 0xfae571a4, 0x7fe4ee06, 0xfacc54e0, 0x7fe3e616, 0xfab3384f, - 0x7fe2d938, 0xfa9a1bf3, - 0x7fe1c76b, 0xfa80ffcb, 0x7fe0b0b1, 0xfa67e3da, 0x7fdf9508, 0xfa4ec821, - 0x7fde7471, 0xfa35ac9f, - 0x7fdd4eec, 0xfa1c9157, 0x7fdc247a, 0xfa037648, 0x7fdaf519, 0xf9ea5b75, - 0x7fd9c0ca, 0xf9d140de, - 0x7fd8878e, 0xf9b82684, 0x7fd74964, 0xf99f0c68, 0x7fd6064c, 0xf985f28a, - 0x7fd4be46, 0xf96cd8ed, - 0x7fd37153, 0xf953bf91, 0x7fd21f72, 0xf93aa676, 0x7fd0c8a3, 0xf9218d9e, - 0x7fcf6ce8, 0xf908750a, - 0x7fce0c3e, 0xf8ef5cbb, 0x7fcca6a7, 0xf8d644b2, 0x7fcb3c23, 0xf8bd2cef, - 0x7fc9ccb2, 0xf8a41574, - 0x7fc85854, 0xf88afe42, 0x7fc6df08, 0xf871e759, 0x7fc560cf, 0xf858d0bb, - 0x7fc3dda9, 0xf83fba68, - 0x7fc25596, 0xf826a462, 0x7fc0c896, 0xf80d8ea9, 0x7fbf36aa, 0xf7f4793e, - 0x7fbd9fd0, 0xf7db6423, - 0x7fbc040a, 0xf7c24f59, 0x7fba6357, 0xf7a93ae0, 0x7fb8bdb8, 0xf79026b9, - 0x7fb7132b, 0xf77712e5, - 0x7fb563b3, 0xf75dff66, 0x7fb3af4e, 0xf744ec3b, 0x7fb1f5fc, 0xf72bd967, - 0x7fb037bf, 0xf712c6ea, - 0x7fae7495, 0xf6f9b4c6, 0x7facac7f, 0xf6e0a2fa, 0x7faadf7c, 0xf6c79188, - 0x7fa90d8e, 0xf6ae8071, - 0x7fa736b4, 0xf6956fb7, 0x7fa55aee, 0xf67c5f59, 0x7fa37a3c, 0xf6634f59, - 0x7fa1949e, 0xf64a3fb8, - 0x7f9faa15, 0xf6313077, 0x7f9dbaa0, 0xf6182196, 0x7f9bc640, 0xf5ff1318, - 0x7f99ccf4, 0xf5e604fc, - 0x7f97cebd, 0xf5ccf743, 0x7f95cb9a, 0xf5b3e9f0, 0x7f93c38c, 0xf59add02, - 0x7f91b694, 0xf581d07b, - 0x7f8fa4b0, 0xf568c45b, 0x7f8d8de1, 0xf54fb8a4, 0x7f8b7227, 0xf536ad56, - 0x7f895182, 0xf51da273, - 0x7f872bf3, 0xf50497fb, 0x7f850179, 0xf4eb8def, 0x7f82d214, 0xf4d28451, - 0x7f809dc5, 0xf4b97b21, - 0x7f7e648c, 0xf4a07261, 0x7f7c2668, 0xf4876a10, 0x7f79e35a, 0xf46e6231, - 0x7f779b62, 0xf4555ac5, - 0x7f754e80, 0xf43c53cb, 0x7f72fcb4, 0xf4234d45, 0x7f70a5fe, 0xf40a4735, - 0x7f6e4a5e, 0xf3f1419a, - 0x7f6be9d4, 0xf3d83c77, 0x7f698461, 0xf3bf37cb, 0x7f671a05, 0xf3a63398, - 0x7f64aabf, 0xf38d2fe0, - 0x7f62368f, 0xf3742ca2, 0x7f5fbd77, 0xf35b29e0, 0x7f5d3f75, 0xf342279b, - 0x7f5abc8a, 0xf32925d3, - 0x7f5834b7, 0xf310248a, 0x7f55a7fa, 0xf2f723c1, 0x7f531655, 0xf2de2379, - 0x7f507fc7, 0xf2c523b2, - 0x7f4de451, 0xf2ac246e, 0x7f4b43f2, 0xf29325ad, 0x7f489eaa, 0xf27a2771, - 0x7f45f47b, 0xf26129ba, - 0x7f434563, 0xf2482c8a, 0x7f409164, 0xf22f2fe1, 0x7f3dd87c, 0xf21633c0, - 0x7f3b1aad, 0xf1fd3829, - 0x7f3857f6, 0xf1e43d1c, 0x7f359057, 0xf1cb429a, 0x7f32c3d1, 0xf1b248a5, - 0x7f2ff263, 0xf1994f3d, - 0x7f2d1c0e, 0xf1805662, 0x7f2a40d2, 0xf1675e17, 0x7f2760af, 0xf14e665c, - 0x7f247ba5, 0xf1356f32, - 0x7f2191b4, 0xf11c789a, 0x7f1ea2dc, 0xf1038295, 0x7f1baf1e, 0xf0ea8d24, - 0x7f18b679, 0xf0d19848, - 0x7f15b8ee, 0xf0b8a401, 0x7f12b67c, 0xf09fb051, 0x7f0faf25, 0xf086bd39, - 0x7f0ca2e7, 0xf06dcaba, - 0x7f0991c4, 0xf054d8d5, 0x7f067bba, 0xf03be78a, 0x7f0360cb, 0xf022f6da, - 0x7f0040f6, 0xf00a06c8, - 0x7efd1c3c, 0xeff11753, 0x7ef9f29d, 0xefd8287c, 0x7ef6c418, 0xefbf3a45, - 0x7ef390ae, 0xefa64cae, - 0x7ef05860, 0xef8d5fb8, 0x7eed1b2c, 0xef747365, 0x7ee9d914, 0xef5b87b5, - 0x7ee69217, 0xef429caa, - 0x7ee34636, 0xef29b243, 0x7edff570, 0xef10c883, 0x7edc9fc6, 0xeef7df6a, - 0x7ed94538, 0xeedef6f9, - 0x7ed5e5c6, 0xeec60f31, 0x7ed28171, 0xeead2813, 0x7ecf1837, 0xee9441a0, - 0x7ecbaa1a, 0xee7b5bd9, - 0x7ec8371a, 0xee6276bf, 0x7ec4bf36, 0xee499253, 0x7ec14270, 0xee30ae96, - 0x7ebdc0c6, 0xee17cb88, - 0x7eba3a39, 0xedfee92b, 0x7eb6aeca, 0xede60780, 0x7eb31e78, 0xedcd2687, - 0x7eaf8943, 0xedb44642, - 0x7eabef2c, 0xed9b66b2, 0x7ea85033, 0xed8287d7, 0x7ea4ac58, 0xed69a9b3, - 0x7ea1039b, 0xed50cc46, - 0x7e9d55fc, 0xed37ef91, 0x7e99a37c, 0xed1f1396, 0x7e95ec1a, 0xed063856, - 0x7e922fd6, 0xeced5dd0, - 0x7e8e6eb2, 0xecd48407, 0x7e8aa8ac, 0xecbbaafb, 0x7e86ddc6, 0xeca2d2ad, - 0x7e830dff, 0xec89fb1e, - 0x7e7f3957, 0xec71244f, 0x7e7b5fce, 0xec584e41, 0x7e778166, 0xec3f78f6, - 0x7e739e1d, 0xec26a46d, - 0x7e6fb5f4, 0xec0dd0a8, 0x7e6bc8eb, 0xebf4fda8, 0x7e67d703, 0xebdc2b6e, - 0x7e63e03b, 0xebc359fb, - 0x7e5fe493, 0xebaa894f, 0x7e5be40c, 0xeb91b96c, 0x7e57dea7, 0xeb78ea52, - 0x7e53d462, 0xeb601c04, - 0x7e4fc53e, 0xeb474e81, 0x7e4bb13c, 0xeb2e81ca, 0x7e47985b, 0xeb15b5e1, - 0x7e437a9c, 0xeafceac6, - 0x7e3f57ff, 0xeae4207a, 0x7e3b3083, 0xeacb56ff, 0x7e37042a, 0xeab28e56, - 0x7e32d2f4, 0xea99c67e, - 0x7e2e9cdf, 0xea80ff7a, 0x7e2a61ed, 0xea683949, 0x7e26221f, 0xea4f73ee, - 0x7e21dd73, 0xea36af69, - 0x7e1d93ea, 0xea1debbb, 0x7e194584, 0xea0528e5, 0x7e14f242, 0xe9ec66e8, - 0x7e109a24, 0xe9d3a5c5, - 0x7e0c3d29, 0xe9bae57d, 0x7e07db52, 0xe9a22610, 0x7e0374a0, 0xe9896781, - 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0x1ce80906, 0x834e8373, - 0x1ccf8cb3, 0x8348d8dc, 0x1cb70f43, 0x83433314, 0x1c9e90b8, 0x833d921b, - 0x1c861113, 0x8337f5f1, - 0x1c6d9053, 0x83325e97, 0x1c550e7c, 0x832ccc0d, 0x1c3c8b8c, 0x83273e52, - 0x1c240786, 0x8321b568, - 0x1c0b826a, 0x831c314e, 0x1bf2fc3a, 0x8316b205, 0x1bda74f6, 0x8311378d, - 0x1bc1ec9e, 0x830bc1e6, - 0x1ba96335, 0x83065110, 0x1b90d8bb, 0x8300e50b, 0x1b784d30, 0x82fb7dd8, - 0x1b5fc097, 0x82f61b77, - 0x1b4732ef, 0x82f0bde8, 0x1b2ea43a, 0x82eb652b, 0x1b161479, 0x82e61141, - 0x1afd83ad, 0x82e0c22a, - 0x1ae4f1d6, 0x82db77e5, 0x1acc5ef6, 0x82d63274, 0x1ab3cb0d, 0x82d0f1d5, - 0x1a9b361d, 0x82cbb60b, - 0x1a82a026, 0x82c67f14, 0x1a6a0929, 0x82c14cf1, 0x1a517128, 0x82bc1fa2, - 0x1a38d823, 0x82b6f727, - 0x1a203e1b, 0x82b1d381, 0x1a07a311, 0x82acb4b0, 0x19ef0707, 0x82a79ab3, - 0x19d669fc, 0x82a2858c, - 0x19bdcbf3, 0x829d753a, 0x19a52ceb, 0x829869be, 0x198c8ce7, 0x82936317, - 0x1973ebe6, 0x828e6146, - 0x195b49ea, 0x8289644b, 0x1942a6f3, 0x82846c26, 0x192a0304, 0x827f78d8, - 0x19115e1c, 0x827a8a61, - 0x18f8b83c, 0x8275a0c0, 0x18e01167, 0x8270bbf7, 0x18c7699b, 0x826bdc04, - 0x18aec0db, 0x826700e9, - 0x18961728, 0x82622aa6, 0x187d6c82, 0x825d593a, 0x1864c0ea, 0x82588ca7, - 0x184c1461, 0x8253c4eb, - 0x183366e9, 0x824f0208, 0x181ab881, 0x824a43fe, 0x1802092c, 0x82458acc, - 0x17e958ea, 0x8240d673, - 0x17d0a7bc, 0x823c26f3, 0x17b7f5a3, 0x82377c4c, 0x179f429f, 0x8232d67f, - 0x17868eb3, 0x822e358b, - 0x176dd9de, 0x82299971, 0x17552422, 0x82250232, 0x173c6d80, 0x82206fcc, - 0x1723b5f9, 0x821be240, - 0x170afd8d, 0x82175990, 0x16f2443e, 0x8212d5b9, 0x16d98a0c, 0x820e56be, - 0x16c0cef9, 0x8209dc9e, - 0x16a81305, 0x82056758, 0x168f5632, 0x8200f6ef, 0x1676987f, 0x81fc8b60, - 0x165dd9f0, 0x81f824ae, - 0x16451a83, 0x81f3c2d7, 0x162c5a3b, 0x81ef65dc, 0x16139918, 0x81eb0dbe, - 0x15fad71b, 0x81e6ba7c, - 0x15e21445, 0x81e26c16, 0x15c95097, 0x81de228d, 0x15b08c12, 0x81d9dde1, - 0x1597c6b7, 0x81d59e13, - 0x157f0086, 0x81d16321, 0x15663982, 0x81cd2d0c, 0x154d71aa, 0x81c8fbd6, - 0x1534a901, 0x81c4cf7d, - 0x151bdf86, 0x81c0a801, 0x1503153a, 0x81bc8564, 0x14ea4a1f, 0x81b867a5, - 0x14d17e36, 0x81b44ec4, - 0x14b8b17f, 0x81b03ac2, 0x149fe3fc, 0x81ac2b9e, 0x148715ae, 0x81a82159, - 0x146e4694, 0x81a41bf4, - 0x145576b1, 0x81a01b6d, 0x143ca605, 0x819c1fc5, 0x1423d492, 0x819828fd, - 0x140b0258, 0x81943715, - 0x13f22f58, 0x81904a0c, 0x13d95b93, 0x818c61e3, 0x13c0870a, 0x81887e9a, - 0x13a7b1bf, 0x8184a032, - 0x138edbb1, 0x8180c6a9, 0x137604e2, 0x817cf201, 0x135d2d53, 0x8179223a, - 0x13445505, 0x81755754, - 0x132b7bf9, 0x8171914e, 0x1312a230, 0x816dd02a, 0x12f9c7aa, 0x816a13e6, - 0x12e0ec6a, 0x81665c84, - 0x12c8106f, 0x8162aa04, 0x12af33ba, 0x815efc65, 0x1296564d, 0x815b53a8, - 0x127d7829, 0x8157afcd, - 0x1264994e, 0x815410d4, 0x124bb9be, 0x815076bd, 0x1232d979, 0x814ce188, - 0x1219f880, 0x81495136, - 0x120116d5, 0x8145c5c7, 0x11e83478, 0x81423f3a, 0x11cf516a, 0x813ebd90, - 0x11b66dad, 0x813b40ca, - 0x119d8941, 0x8137c8e6, 0x1184a427, 0x813455e6, 0x116bbe60, 0x8130e7c9, - 0x1152d7ed, 0x812d7e8f, - 0x1139f0cf, 0x812a1a3a, 0x11210907, 0x8126bac8, 0x11082096, 0x8123603a, - 0x10ef377d, 0x81200a90, - 0x10d64dbd, 0x811cb9ca, 0x10bd6356, 0x81196de9, 0x10a4784b, 0x811626ec, - 0x108b8c9b, 0x8112e4d4, - 0x1072a048, 0x810fa7a0, 0x1059b352, 0x810c6f52, 0x1040c5bb, 0x81093be8, - 0x1027d784, 0x81060d63, - 0x100ee8ad, 0x8102e3c4, 0xff5f938, 0x80ffbf0a, 0xfdd0926, 0x80fc9f35, - 0xfc41876, 0x80f98446, - 0xfab272b, 0x80f66e3c, 0xf923546, 0x80f35d19, 0xf7942c7, 0x80f050db, - 0xf604faf, 0x80ed4984, - 0xf475bff, 0x80ea4712, 0xf2e67b8, 0x80e74987, 0xf1572dc, 0x80e450e2, - 0xefc7d6b, 0x80e15d24, - 0xee38766, 0x80de6e4c, 0xeca90ce, 0x80db845b, 0xeb199a4, 0x80d89f51, - 0xe98a1e9, 0x80d5bf2e, - 0xe7fa99e, 0x80d2e3f2, 0xe66b0c3, 0x80d00d9d, 0xe4db75b, 0x80cd3c2f, - 0xe34bd66, 0x80ca6fa9, - 0xe1bc2e4, 0x80c7a80a, 0xe02c7d7, 0x80c4e553, 0xde9cc40, 0x80c22784, - 0xdd0d01f, 0x80bf6e9c, - 0xdb7d376, 0x80bcba9d, 0xd9ed646, 0x80ba0b85, 0xd85d88f, 0x80b76156, - 0xd6cda53, 0x80b4bc0e, - 0xd53db92, 0x80b21baf, 0xd3adc4e, 0x80af8039, 0xd21dc87, 0x80ace9ab, - 0xd08dc3f, 0x80aa5806, - 0xcefdb76, 0x80a7cb49, 0xcd6da2d, 0x80a54376, 0xcbdd865, 0x80a2c08b, - 0xca4d620, 0x80a04289, - 0xc8bd35e, 0x809dc971, 0xc72d020, 0x809b5541, 0xc59cc68, 0x8098e5fb, - 0xc40c835, 0x80967b9f, - 0xc27c389, 0x8094162c, 0xc0ebe66, 0x8091b5a2, 0xbf5b8cb, 0x808f5a02, - 0xbdcb2bb, 0x808d034c, - 0xbc3ac35, 0x808ab180, 0xbaaa53b, 0x8088649e, 0xb919dcf, 0x80861ca6, - 0xb7895f0, 0x8083d998, - 0xb5f8d9f, 0x80819b74, 0xb4684df, 0x807f623b, 0xb2d7baf, 0x807d2dec, - 0xb147211, 0x807afe87, - 0xafb6805, 0x8078d40d, 0xae25d8d, 0x8076ae7e, 0xac952aa, 0x80748dd9, - 0xab0475c, 0x8072721f, - 0xa973ba5, 0x80705b50, 0xa7e2f85, 0x806e496c, 0xa6522fe, 0x806c3c74, - 0xa4c1610, 0x806a3466, - 0xa3308bd, 0x80683143, 0xa19fb04, 0x8066330c, 0xa00ece8, 0x806439c0, - 0x9e7de6a, 0x80624560, - 0x9cecf89, 0x806055eb, 0x9b5c048, 0x805e6b62, 0x99cb0a7, 0x805c85c4, - 0x983a0a7, 0x805aa512, - 0x96a9049, 0x8058c94c, 0x9517f8f, 0x8056f272, 0x9386e78, 0x80552084, - 0x91f5d06, 0x80535381, - 0x9064b3a, 0x80518b6b, 0x8ed3916, 0x804fc841, 0x8d42699, 0x804e0a04, - 0x8bb13c5, 0x804c50b2, - 0x8a2009a, 0x804a9c4d, 0x888ed1b, 0x8048ecd5, 0x86fd947, 0x80474248, - 0x856c520, 0x80459ca9, - 0x83db0a7, 0x8043fbf6, 0x8249bdd, 0x80426030, 0x80b86c2, 0x8040c956, - 0x7f27157, 0x803f376a, - 0x7d95b9e, 0x803daa6a, 0x7c04598, 0x803c2257, 0x7a72f45, 0x803a9f31, - 0x78e18a7, 0x803920f8, - 0x77501be, 0x8037a7ac, 0x75bea8c, 0x8036334e, 0x742d311, 0x8034c3dd, - 0x729bb4e, 0x80335959, - 0x710a345, 0x8031f3c2, 0x6f78af6, 0x80309318, 0x6de7262, 0x802f375d, - 0x6c5598a, 0x802de08e, - 0x6ac406f, 0x802c8ead, 0x6932713, 0x802b41ba, 0x67a0d76, 0x8029f9b4, - 0x660f398, 0x8028b69c, - 0x647d97c, 0x80277872, 0x62ebf22, 0x80263f36, 0x615a48b, 0x80250ae7, - 0x5fc89b8, 0x8023db86, - 0x5e36ea9, 0x8022b114, 0x5ca5361, 0x80218b8f, 0x5b137df, 0x80206af8, - 0x5981c26, 0x801f4f4f, - 0x57f0035, 0x801e3895, 0x565e40d, 0x801d26c8, 0x54cc7b1, 0x801c19ea, - 0x533ab20, 0x801b11fa, - 0x51a8e5c, 0x801a0ef8, 0x5017165, 0x801910e4, 0x4e8543e, 0x801817bf, - 0x4cf36e5, 0x80172388, - 0x4b6195d, 0x80163440, 0x49cfba7, 0x801549e6, 0x483ddc3, 0x8014647b, - 0x46abfb3, 0x801383fe, - 0x451a177, 0x8012a86f, 0x4388310, 0x8011d1d0, 0x41f6480, 0x8011001f, - 0x40645c7, 0x8010335c, - 0x3ed26e6, 0x800f6b88, 0x3d407df, 0x800ea8a3, 0x3bae8b2, 0x800deaad, - 0x3a1c960, 0x800d31a5, - 0x388a9ea, 0x800c7d8c, 0x36f8a51, 0x800bce63, 0x3566a96, 0x800b2427, - 0x33d4abb, 0x800a7edb, - 0x3242abf, 0x8009de7e, 0x30b0aa4, 0x80094310, 0x2f1ea6c, 0x8008ac90, - 0x2d8ca16, 0x80081b00, - 0x2bfa9a4, 0x80078e5e, 0x2a68917, 0x800706ac, 0x28d6870, 0x800683e8, - 0x27447b0, 0x80060614, - 0x25b26d7, 0x80058d2f, 0x24205e8, 0x80051939, 0x228e4e2, 0x8004aa32, - 0x20fc3c6, 0x8004401a, - 0x1f6a297, 0x8003daf1, 0x1dd8154, 0x80037ab7, 0x1c45ffe, 0x80031f6d, - 0x1ab3e97, 0x8002c912, - 0x1921d20, 0x800277a6, 0x178fb99, 0x80022b29, 0x15fda03, 0x8001e39b, - 0x146b860, 0x8001a0fd, - 0x12d96b1, 0x8001634e, 0x11474f6, 0x80012a8e, 0xfb5330, 0x8000f6bd, - 0xe23160, 0x8000c7dc, - 0xc90f88, 0x80009dea, 0xafeda8, 0x800078e7, 0x96cbc1, 0x800058d4, 0x7da9d4, - 0x80003daf, - 0x6487e3, 0x8000277a, 0x4b65ee, 0x80001635, 0x3243f5, 0x800009df, 0x1921fb, - 0x80000278, -}; - -static const q31_t WeightsQ31_8192[16384] = { - 0x7fffffff, 0x0, 0x7fffffd9, 0xfff9b781, 0x7fffff62, 0xfff36f02, 0x7ffffe9d, - 0xffed2684, - 0x7ffffd88, 0xffe6de05, 0x7ffffc25, 0xffe09586, 0x7ffffa73, 0xffda4d08, - 0x7ffff872, 0xffd40489, - 0x7ffff621, 0xffcdbc0b, 0x7ffff382, 0xffc7738c, 0x7ffff094, 0xffc12b0e, - 0x7fffed57, 0xffbae290, - 0x7fffe9cb, 0xffb49a12, 0x7fffe5f0, 0xffae5195, 0x7fffe1c6, 0xffa80917, - 0x7fffdd4d, 0xffa1c09a, - 0x7fffd886, 0xff9b781d, 0x7fffd36f, 0xff952fa0, 0x7fffce09, 0xff8ee724, - 0x7fffc854, 0xff889ea7, - 0x7fffc251, 0xff82562c, 0x7fffbbfe, 0xff7c0db0, 0x7fffb55c, 0xff75c535, - 0x7fffae6c, 0xff6f7cba, - 0x7fffa72c, 0xff69343f, 0x7fff9f9e, 0xff62ebc5, 0x7fff97c1, 0xff5ca34b, - 0x7fff8f94, 0xff565ad1, - 0x7fff8719, 0xff501258, 0x7fff7e4f, 0xff49c9df, 0x7fff7536, 0xff438167, - 0x7fff6bcd, 0xff3d38ef, - 0x7fff6216, 0xff36f078, 0x7fff5810, 0xff30a801, 0x7fff4dbb, 0xff2a5f8b, - 0x7fff4317, 0xff241715, - 0x7fff3824, 0xff1dcea0, 0x7fff2ce2, 0xff17862b, 0x7fff2151, 0xff113db7, - 0x7fff1572, 0xff0af543, - 0x7fff0943, 0xff04acd0, 0x7ffefcc5, 0xfefe645e, 0x7ffeeff8, 0xfef81bec, - 0x7ffee2dd, 0xfef1d37b, - 0x7ffed572, 0xfeeb8b0a, 0x7ffec7b9, 0xfee5429a, 0x7ffeb9b0, 0xfedefa2b, - 0x7ffeab59, 0xfed8b1bd, - 0x7ffe9cb2, 0xfed2694f, 0x7ffe8dbd, 0xfecc20e2, 0x7ffe7e79, 0xfec5d876, - 0x7ffe6ee5, 0xfebf900a, - 0x7ffe5f03, 0xfeb947a0, 0x7ffe4ed2, 0xfeb2ff36, 0x7ffe3e52, 0xfeacb6cc, - 0x7ffe2d83, 0xfea66e64, - 0x7ffe1c65, 0xfea025fd, 0x7ffe0af8, 0xfe99dd96, 0x7ffdf93c, 0xfe939530, - 0x7ffde731, 0xfe8d4ccb, - 0x7ffdd4d7, 0xfe870467, 0x7ffdc22e, 0xfe80bc04, 0x7ffdaf37, 0xfe7a73a2, - 0x7ffd9bf0, 0xfe742b41, - 0x7ffd885a, 0xfe6de2e0, 0x7ffd7476, 0xfe679a81, 0x7ffd6042, 0xfe615223, - 0x7ffd4bc0, 0xfe5b09c5, - 0x7ffd36ee, 0xfe54c169, 0x7ffd21ce, 0xfe4e790d, 0x7ffd0c5f, 0xfe4830b3, - 0x7ffcf6a0, 0xfe41e85a, - 0x7ffce093, 0xfe3ba002, 0x7ffcca37, 0xfe3557ab, 0x7ffcb38c, 0xfe2f0f55, - 0x7ffc9c92, 0xfe28c700, - 0x7ffc8549, 0xfe227eac, 0x7ffc6db1, 0xfe1c365a, 0x7ffc55ca, 0xfe15ee09, - 0x7ffc3d94, 0xfe0fa5b8, - 0x7ffc250f, 0xfe095d69, 0x7ffc0c3b, 0xfe03151c, 0x7ffbf319, 0xfdfccccf, - 0x7ffbd9a7, 0xfdf68484, - 0x7ffbbfe6, 0xfdf03c3a, 0x7ffba5d7, 0xfde9f3f1, 0x7ffb8b78, 0xfde3aba9, - 0x7ffb70cb, 0xfddd6363, - 0x7ffb55ce, 0xfdd71b1e, 0x7ffb3a83, 0xfdd0d2db, 0x7ffb1ee9, 0xfdca8a99, - 0x7ffb0300, 0xfdc44258, - 0x7ffae6c7, 0xfdbdfa18, 0x7ffaca40, 0xfdb7b1da, 0x7ffaad6a, 0xfdb1699e, - 0x7ffa9045, 0xfdab2162, - 0x7ffa72d1, 0xfda4d929, 0x7ffa550e, 0xfd9e90f0, 0x7ffa36fc, 0xfd9848b9, - 0x7ffa189c, 0xfd920084, - 0x7ff9f9ec, 0xfd8bb850, 0x7ff9daed, 0xfd85701e, 0x7ff9bba0, 0xfd7f27ed, - 0x7ff99c03, 0xfd78dfbd, - 0x7ff97c18, 0xfd729790, 0x7ff95bdd, 0xfd6c4f64, 0x7ff93b54, 0xfd660739, - 0x7ff91a7b, 0xfd5fbf10, - 0x7ff8f954, 0xfd5976e9, 0x7ff8d7de, 0xfd532ec3, 0x7ff8b619, 0xfd4ce69f, - 0x7ff89405, 0xfd469e7c, - 0x7ff871a2, 0xfd40565c, 0x7ff84ef0, 0xfd3a0e3d, 0x7ff82bef, 0xfd33c61f, - 0x7ff8089f, 0xfd2d7e04, - 0x7ff7e500, 0xfd2735ea, 0x7ff7c113, 0xfd20edd2, 0x7ff79cd6, 0xfd1aa5bc, - 0x7ff7784a, 0xfd145da7, - 0x7ff75370, 0xfd0e1594, 0x7ff72e46, 0xfd07cd83, 0x7ff708ce, 0xfd018574, - 0x7ff6e307, 0xfcfb3d67, - 0x7ff6bcf0, 0xfcf4f55c, 0x7ff6968b, 0xfceead52, 0x7ff66fd7, 0xfce8654b, - 0x7ff648d4, 0xfce21d45, - 0x7ff62182, 0xfcdbd541, 0x7ff5f9e1, 0xfcd58d3f, 0x7ff5d1f1, 0xfccf453f, - 0x7ff5a9b2, 0xfcc8fd41, - 0x7ff58125, 0xfcc2b545, 0x7ff55848, 0xfcbc6d4c, 0x7ff52f1d, 0xfcb62554, - 0x7ff505a2, 0xfcafdd5e, - 0x7ff4dbd9, 0xfca9956a, 0x7ff4b1c0, 0xfca34d78, 0x7ff48759, 0xfc9d0588, - 0x7ff45ca3, 0xfc96bd9b, - 0x7ff4319d, 0xfc9075af, 0x7ff40649, 0xfc8a2dc6, 0x7ff3daa6, 0xfc83e5de, - 0x7ff3aeb4, 0xfc7d9df9, - 0x7ff38274, 0xfc775616, 0x7ff355e4, 0xfc710e36, 0x7ff32905, 0xfc6ac657, - 0x7ff2fbd7, 0xfc647e7b, - 0x7ff2ce5b, 0xfc5e36a0, 0x7ff2a08f, 0xfc57eec9, 0x7ff27275, 0xfc51a6f3, - 0x7ff2440b, 0xfc4b5f20, - 0x7ff21553, 0xfc45174e, 0x7ff1e64c, 0xfc3ecf80, 0x7ff1b6f6, 0xfc3887b3, - 0x7ff18751, 0xfc323fe9, - 0x7ff1575d, 0xfc2bf821, 0x7ff1271a, 0xfc25b05c, 0x7ff0f688, 0xfc1f6899, - 0x7ff0c5a7, 0xfc1920d8, - 0x7ff09478, 0xfc12d91a, 0x7ff062f9, 0xfc0c915e, 0x7ff0312c, 0xfc0649a5, - 0x7fefff0f, 0xfc0001ee, - 0x7fefcca4, 0xfbf9ba39, 0x7fef99ea, 0xfbf37287, 0x7fef66e1, 0xfbed2ad8, - 0x7fef3388, 0xfbe6e32b, - 0x7feeffe1, 0xfbe09b80, 0x7feecbec, 0xfbda53d8, 0x7fee97a7, 0xfbd40c33, - 0x7fee6313, 0xfbcdc490, - 0x7fee2e30, 0xfbc77cf0, 0x7fedf8ff, 0xfbc13552, 0x7fedc37e, 0xfbbaedb7, - 0x7fed8daf, 0xfbb4a61f, - 0x7fed5791, 0xfbae5e89, 0x7fed2123, 0xfba816f6, 0x7fecea67, 0xfba1cf66, - 0x7fecb35c, 0xfb9b87d8, - 0x7fec7c02, 0xfb95404d, 0x7fec4459, 0xfb8ef8c5, 0x7fec0c62, 0xfb88b13f, - 0x7febd41b, 0xfb8269bd, - 0x7feb9b85, 0xfb7c223d, 0x7feb62a1, 0xfb75dac0, 0x7feb296d, 0xfb6f9345, - 0x7feaefeb, 0xfb694bce, - 0x7feab61a, 0xfb630459, 0x7fea7bfa, 0xfb5cbce7, 0x7fea418b, 0xfb567578, - 0x7fea06cd, 0xfb502e0c, - 0x7fe9cbc0, 0xfb49e6a3, 0x7fe99064, 0xfb439f3c, 0x7fe954ba, 0xfb3d57d9, - 0x7fe918c0, 0xfb371078, - 0x7fe8dc78, 0xfb30c91b, 0x7fe89fe0, 0xfb2a81c0, 0x7fe862fa, 0xfb243a69, - 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0x5d09a38, 0x8021d47a, - 0x5ca5361, 0x80218b8f, 0x5c40c86, 0x802142f3, 0x5bdc5a7, 0x8020faa6, - 0x5b77ec5, 0x8020b2a7, - 0x5b137df, 0x80206af8, 0x5aaf0f6, 0x80202397, 0x5a4aa09, 0x801fdc86, - 0x59e6319, 0x801f95c3, - 0x5981c26, 0x801f4f4f, 0x591d52f, 0x801f092a, 0x58b8e34, 0x801ec354, - 0x5854736, 0x801e7dcd, - 0x57f0035, 0x801e3895, 0x578b930, 0x801df3ab, 0x5727228, 0x801daf11, - 0x56c2b1c, 0x801d6ac5, - 0x565e40d, 0x801d26c8, 0x55f9cfb, 0x801ce31a, 0x55955e6, 0x801c9fbb, - 0x5530ecd, 0x801c5cab, - 0x54cc7b1, 0x801c19ea, 0x5468092, 0x801bd777, 0x540396f, 0x801b9554, - 0x539f249, 0x801b537f, - 0x533ab20, 0x801b11fa, 0x52d63f4, 0x801ad0c3, 0x5271cc4, 0x801a8fdb, - 0x520d592, 0x801a4f42, - 0x51a8e5c, 0x801a0ef8, 0x5144723, 0x8019cefd, 0x50dffe7, 0x80198f50, - 0x507b8a8, 0x80194ff3, - 0x5017165, 0x801910e4, 0x4fb2a20, 0x8018d225, 0x4f4e2d8, 0x801893b4, - 0x4ee9b8c, 0x80185592, - 0x4e8543e, 0x801817bf, 0x4e20cec, 0x8017da3b, 0x4dbc597, 0x80179d06, - 0x4d57e40, 0x80176020, - 0x4cf36e5, 0x80172388, 0x4c8ef88, 0x8016e740, 0x4c2a827, 0x8016ab46, - 0x4bc60c4, 0x80166f9c, - 0x4b6195d, 0x80163440, 0x4afd1f4, 0x8015f933, 0x4a98a88, 0x8015be75, - 0x4a34319, 0x80158406, - 0x49cfba7, 0x801549e6, 0x496b432, 0x80151015, 0x4906cbb, 0x8014d693, - 0x48a2540, 0x80149d5f, - 0x483ddc3, 0x8014647b, 0x47d9643, 0x80142be5, 0x4774ec1, 0x8013f39e, - 0x471073b, 0x8013bba7, - 0x46abfb3, 0x801383fe, 0x4647828, 0x80134ca4, 0x45e309a, 0x80131599, - 0x457e90a, 0x8012dedd, - 0x451a177, 0x8012a86f, 0x44b59e1, 0x80127251, 0x4451249, 0x80123c82, - 0x43ecaae, 0x80120701, - 0x4388310, 0x8011d1d0, 0x4323b70, 0x80119ced, 0x42bf3cd, 0x80116859, - 0x425ac28, 0x80113414, - 0x41f6480, 0x8011001f, 0x4191cd5, 0x8010cc78, 0x412d528, 0x8010991f, - 0x40c8d79, 0x80106616, - 0x40645c7, 0x8010335c, 0x3fffe12, 0x801000f1, 0x3f9b65b, 0x800fced4, - 0x3f36ea2, 0x800f9d07, - 0x3ed26e6, 0x800f6b88, 0x3e6df28, 0x800f3a59, 0x3e09767, 0x800f0978, - 0x3da4fa4, 0x800ed8e6, - 0x3d407df, 0x800ea8a3, 0x3cdc017, 0x800e78af, 0x3c7784d, 0x800e490a, - 0x3c13080, 0x800e19b4, - 0x3bae8b2, 0x800deaad, 0x3b4a0e0, 0x800dbbf5, 0x3ae590d, 0x800d8d8b, - 0x3a81137, 0x800d5f71, - 0x3a1c960, 0x800d31a5, 0x39b8185, 0x800d0429, 0x39539a9, 0x800cd6fb, - 0x38ef1ca, 0x800caa1c, - 0x388a9ea, 0x800c7d8c, 0x3826207, 0x800c514c, 0x37c1a22, 0x800c255a, - 0x375d23a, 0x800bf9b7, - 0x36f8a51, 0x800bce63, 0x3694265, 0x800ba35d, 0x362fa78, 0x800b78a7, - 0x35cb288, 0x800b4e40, - 0x3566a96, 0x800b2427, 0x35022a2, 0x800afa5e, 0x349daac, 0x800ad0e3, - 0x34392b4, 0x800aa7b8, - 0x33d4abb, 0x800a7edb, 0x33702bf, 0x800a564e, 0x330bac1, 0x800a2e0f, - 0x32a72c1, 0x800a061f, - 0x3242abf, 0x8009de7e, 0x31de2bb, 0x8009b72c, 0x3179ab5, 0x80099029, - 0x31152ae, 0x80096975, - 0x30b0aa4, 0x80094310, 0x304c299, 0x80091cf9, 0x2fe7a8c, 0x8008f732, - 0x2f8327d, 0x8008d1ba, - 0x2f1ea6c, 0x8008ac90, 0x2eba259, 0x800887b6, 0x2e55a44, 0x8008632a, - 0x2df122e, 0x80083eed, - 0x2d8ca16, 0x80081b00, 0x2d281fc, 0x8007f761, 0x2cc39e1, 0x8007d411, - 0x2c5f1c3, 0x8007b110, - 0x2bfa9a4, 0x80078e5e, 0x2b96184, 0x80076bfb, 0x2b31961, 0x800749e7, - 0x2acd13d, 0x80072822, - 0x2a68917, 0x800706ac, 0x2a040f0, 0x8006e585, 0x299f8c7, 0x8006c4ac, - 0x293b09c, 0x8006a423, - 0x28d6870, 0x800683e8, 0x2872043, 0x800663fd, 0x280d813, 0x80064460, - 0x27a8fe2, 0x80062513, - 0x27447b0, 0x80060614, 0x26dff7c, 0x8005e764, 0x267b747, 0x8005c904, - 0x2616f10, 0x8005aaf2, - 0x25b26d7, 0x80058d2f, 0x254de9e, 0x80056fbb, 0x24e9662, 0x80055296, - 0x2484e26, 0x800535c0, - 0x24205e8, 0x80051939, 0x23bbda8, 0x8004fd00, 0x2357567, 0x8004e117, - 0x22f2d25, 0x8004c57d, - 0x228e4e2, 0x8004aa32, 0x2229c9d, 0x80048f35, 0x21c5457, 0x80047488, - 0x2160c0f, 0x80045a29, - 0x20fc3c6, 0x8004401a, 0x2097b7c, 0x80042659, 0x2033331, 0x80040ce7, - 0x1fceae4, 0x8003f3c5, - 0x1f6a297, 0x8003daf1, 0x1f05a48, 0x8003c26c, 0x1ea11f7, 0x8003aa36, - 0x1e3c9a6, 0x8003924f, - 0x1dd8154, 0x80037ab7, 0x1d73900, 0x8003636e, 0x1d0f0ab, 0x80034c74, - 0x1caa855, 0x800335c9, - 0x1c45ffe, 0x80031f6d, 0x1be17a6, 0x80030960, 0x1b7cf4d, 0x8002f3a1, - 0x1b186f3, 0x8002de32, - 0x1ab3e97, 0x8002c912, 0x1a4f63b, 0x8002b440, 0x19eaddd, 0x80029fbe, - 0x198657f, 0x80028b8a, - 0x1921d20, 0x800277a6, 0x18bd4bf, 0x80026410, 0x1858c5e, 0x800250c9, - 0x17f43fc, 0x80023dd2, - 0x178fb99, 0x80022b29, 0x172b335, 0x800218cf, 0x16c6ad0, 0x800206c4, - 0x166226a, 0x8001f508, - 0x15fda03, 0x8001e39b, 0x159919c, 0x8001d27d, 0x1534934, 0x8001c1ae, - 0x14d00ca, 0x8001b12e, - 0x146b860, 0x8001a0fd, 0x1406ff6, 0x8001911b, 0x13a278a, 0x80018187, - 0x133df1e, 0x80017243, - 0x12d96b1, 0x8001634e, 0x1274e43, 0x800154a7, 0x12105d5, 0x80014650, - 0x11abd66, 0x80013847, - 0x11474f6, 0x80012a8e, 0x10e2c85, 0x80011d23, 0x107e414, 0x80011008, - 0x1019ba2, 0x8001033b, - 0xfb5330, 0x8000f6bd, 0xf50abd, 0x8000ea8e, 0xeec249, 0x8000deaf, 0xe879d5, - 0x8000d31e, - 0xe23160, 0x8000c7dc, 0xdbe8eb, 0x8000bce9, 0xd5a075, 0x8000b245, 0xcf57ff, - 0x8000a7f0, - 0xc90f88, 0x80009dea, 0xc2c711, 0x80009433, 0xbc7e99, 0x80008aca, 0xb63621, - 0x800081b1, - 0xafeda8, 0x800078e7, 0xa9a52f, 0x8000706c, 0xa35cb5, 0x8000683f, 0x9d143b, - 0x80006062, - 0x96cbc1, 0x800058d4, 0x908346, 0x80005194, 0x8a3acb, 0x80004aa4, 0x83f250, - 0x80004402, - 0x7da9d4, 0x80003daf, 0x776159, 0x800037ac, 0x7118dc, 0x800031f7, 0x6ad060, - 0x80002c91, - 0x6487e3, 0x8000277a, 0x5e3f66, 0x800022b3, 0x57f6e9, 0x80001e3a, 0x51ae6b, - 0x80001a10, - 0x4b65ee, 0x80001635, 0x451d70, 0x800012a9, 0x3ed4f2, 0x80000f6c, 0x388c74, - 0x80000c7e, - 0x3243f5, 0x800009df, 0x2bfb77, 0x8000078e, 0x25b2f8, 0x8000058d, 0x1f6a7a, - 0x800003db, - 0x1921fb, 0x80000278, 0x12d97c, 0x80000163, 0xc90fe, 0x8000009e, 0x6487f, - 0x80000027, - -}; - -/** -* \par -* cosFactor tables are generated using the formula :
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
-* \par -* C command to generate the table -*
    
-* for(i = 0; i< N; i++)    
-* {    
-*   cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
-* \par -* where N is the number of factors to generate and c is pi/(2*N) -* \par -* Then converted to q31 format by multiplying with 2^31 and saturated if required. -*/ - - -static const q31_t cos_factorsQ31_128[128] = { - 0x7fff6216, 0x7ffa72d1, 0x7ff09478, 0x7fe1c76b, 0x7fce0c3e, 0x7fb563b3, - 0x7f97cebd, 0x7f754e80, - 0x7f4de451, 0x7f2191b4, 0x7ef05860, 0x7eba3a39, 0x7e7f3957, 0x7e3f57ff, - 0x7dfa98a8, 0x7db0fdf8, - 0x7d628ac6, 0x7d0f4218, 0x7cb72724, 0x7c5a3d50, 0x7bf88830, 0x7b920b89, - 0x7b26cb4f, 0x7ab6cba4, - 0x7a4210d8, 0x79c89f6e, 0x794a7c12, 0x78c7aba2, 0x78403329, 0x77b417df, - 0x77235f2d, 0x768e0ea6, - 0x75f42c0b, 0x7555bd4c, 0x74b2c884, 0x740b53fb, 0x735f6626, 0x72af05a7, - 0x71fa3949, 0x71410805, - 0x708378ff, 0x6fc19385, 0x6efb5f12, 0x6e30e34a, 0x6d6227fa, 0x6c8f351c, - 0x6bb812d1, 0x6adcc964, - 0x69fd614a, 0x6919e320, 0x683257ab, 0x6746c7d8, 0x66573cbb, 0x6563bf92, - 0x646c59bf, 0x637114cc, - 0x6271fa69, 0x616f146c, 0x60686ccf, 0x5f5e0db3, 0x5e50015d, 0x5d3e5237, - 0x5c290acc, 0x5b1035cf, - 0x59f3de12, 0x58d40e8c, 0x57b0d256, 0x568a34a9, 0x556040e2, 0x5433027d, - 0x53028518, 0x51ced46e, - 0x5097fc5e, 0x4f5e08e3, 0x4e210617, 0x4ce10034, 0x4b9e0390, 0x4a581c9e, - 0x490f57ee, 0x47c3c22f, - 0x46756828, 0x452456bd, 0x43d09aed, 0x427a41d0, 0x4121589b, 0x3fc5ec98, - 0x3e680b2c, 0x3d07c1d6, - 0x3ba51e29, 0x3a402dd2, 0x38d8fe93, 0x376f9e46, 0x36041ad9, 0x34968250, - 0x3326e2c3, 0x31b54a5e, - 0x3041c761, 0x2ecc681e, 0x2d553afc, 0x2bdc4e6f, 0x2a61b101, 0x28e5714b, - 0x27679df4, 0x25e845b6, - 0x24677758, 0x22e541af, 0x2161b3a0, 0x1fdcdc1b, 0x1e56ca1e, 0x1ccf8cb3, - 0x1b4732ef, 0x19bdcbf3, - 0x183366e9, 0x16a81305, 0x151bdf86, 0x138edbb1, 0x120116d5, 0x1072a048, - 0xee38766, 0xd53db92, - 0xbc3ac35, 0xa3308bd, 0x8a2009a, 0x710a345, 0x57f0035, 0x3ed26e6, 0x25b26d7, - 0xc90f88, -}; - -static const q31_t cos_factorsQ31_512[512] = { - 0x7ffff621, 0x7fffa72c, 0x7fff0943, 0x7ffe1c65, 0x7ffce093, 0x7ffb55ce, - 0x7ff97c18, 0x7ff75370, - 0x7ff4dbd9, 0x7ff21553, 0x7feeffe1, 0x7feb9b85, 0x7fe7e841, 0x7fe3e616, - 0x7fdf9508, 0x7fdaf519, - 0x7fd6064c, 0x7fd0c8a3, 0x7fcb3c23, 0x7fc560cf, 0x7fbf36aa, 0x7fb8bdb8, - 0x7fb1f5fc, 0x7faadf7c, - 0x7fa37a3c, 0x7f9bc640, 0x7f93c38c, 0x7f8b7227, 0x7f82d214, 0x7f79e35a, - 0x7f70a5fe, 0x7f671a05, - 0x7f5d3f75, 0x7f531655, 0x7f489eaa, 0x7f3dd87c, 0x7f32c3d1, 0x7f2760af, - 0x7f1baf1e, 0x7f0faf25, - 0x7f0360cb, 0x7ef6c418, 0x7ee9d914, 0x7edc9fc6, 0x7ecf1837, 0x7ec14270, - 0x7eb31e78, 0x7ea4ac58, - 0x7e95ec1a, 0x7e86ddc6, 0x7e778166, 0x7e67d703, 0x7e57dea7, 0x7e47985b, - 0x7e37042a, 0x7e26221f, - 0x7e14f242, 0x7e0374a0, 0x7df1a942, 0x7ddf9034, 0x7dcd2981, 0x7dba7534, - 0x7da77359, 0x7d9423fc, - 0x7d808728, 0x7d6c9ce9, 0x7d58654d, 0x7d43e05e, 0x7d2f0e2b, 0x7d19eebf, - 0x7d048228, 0x7ceec873, - 0x7cd8c1ae, 0x7cc26de5, 0x7cabcd28, 0x7c94df83, 0x7c7da505, 0x7c661dbc, - 0x7c4e49b7, 0x7c362904, - 0x7c1dbbb3, 0x7c0501d2, 0x7bebfb70, 0x7bd2a89e, 0x7bb9096b, 0x7b9f1de6, - 0x7b84e61f, 0x7b6a6227, - 0x7b4f920e, 0x7b3475e5, 0x7b190dbc, 0x7afd59a4, 0x7ae159ae, 0x7ac50dec, - 0x7aa8766f, 0x7a8b9348, - 0x7a6e648a, 0x7a50ea47, 0x7a332490, 0x7a151378, 0x79f6b711, 0x79d80f6f, - 0x79b91ca4, 0x7999dec4, - 0x797a55e0, 0x795a820e, 0x793a6361, 0x7919f9ec, 0x78f945c3, 0x78d846fb, - 0x78b6fda8, 0x789569df, - 0x78738bb3, 0x7851633b, 0x782ef08b, 0x780c33b8, 0x77e92cd9, 0x77c5dc01, - 0x77a24148, 0x777e5cc3, - 0x775a2e89, 0x7735b6af, 0x7710f54c, 0x76ebea77, 0x76c69647, 0x76a0f8d2, - 0x767b1231, 0x7654e279, - 0x762e69c4, 0x7607a828, 0x75e09dbd, 0x75b94a9c, 0x7591aedd, 0x7569ca99, - 0x75419de7, 0x751928e0, - 0x74f06b9e, 0x74c7663a, 0x749e18cd, 0x74748371, 0x744aa63f, 0x74208150, - 0x73f614c0, 0x73cb60a8, - 0x73a06522, 0x73752249, 0x73499838, 0x731dc70a, 0x72f1aed9, 0x72c54fc1, - 0x7298a9dd, 0x726bbd48, - 0x723e8a20, 0x7211107e, 0x71e35080, 0x71b54a41, 0x7186fdde, 0x71586b74, - 0x7129931f, 0x70fa74fc, - 0x70cb1128, 0x709b67c0, 0x706b78e3, 0x703b44ad, 0x700acb3c, 0x6fda0cae, - 0x6fa90921, 0x6f77c0b3, - 0x6f463383, 0x6f1461b0, 0x6ee24b57, 0x6eaff099, 0x6e7d5193, 0x6e4a6e66, - 0x6e174730, 0x6de3dc11, - 0x6db02d29, 0x6d7c3a98, 0x6d48047e, 0x6d138afb, 0x6cdece2f, 0x6ca9ce3b, - 0x6c748b3f, 0x6c3f055d, - 0x6c093cb6, 0x6bd3316a, 0x6b9ce39b, 0x6b66536b, 0x6b2f80fb, 0x6af86c6c, - 0x6ac115e2, 0x6a897d7d, - 0x6a51a361, 0x6a1987b0, 0x69e12a8c, 0x69a88c19, 0x696fac78, 0x69368bce, - 0x68fd2a3d, 0x68c387e9, - 0x6889a4f6, 0x684f8186, 0x68151dbe, 0x67da79c3, 0x679f95b7, 0x676471c0, - 0x67290e02, 0x66ed6aa1, - 0x66b187c3, 0x6675658c, 0x66390422, 0x65fc63a9, 0x65bf8447, 0x65826622, - 0x6545095f, 0x65076e25, - 0x64c99498, 0x648b7ce0, 0x644d2722, 0x640e9386, 0x63cfc231, 0x6390b34a, - 0x635166f9, 0x6311dd64, - 0x62d216b3, 0x6292130c, 0x6251d298, 0x6211557e, 0x61d09be5, 0x618fa5f7, - 0x614e73da, 0x610d05b7, - 0x60cb5bb7, 0x60897601, 0x604754bf, 0x6004f819, 0x5fc26038, 0x5f7f8d46, - 0x5f3c7f6b, 0x5ef936d1, - 0x5eb5b3a2, 0x5e71f606, 0x5e2dfe29, 0x5de9cc33, 0x5da5604f, 0x5d60baa7, - 0x5d1bdb65, 0x5cd6c2b5, - 0x5c9170bf, 0x5c4be5b0, 0x5c0621b2, 0x5bc024f0, 0x5b79ef96, 0x5b3381ce, - 0x5aecdbc5, 0x5aa5fda5, - 0x5a5ee79a, 0x5a1799d1, 0x59d01475, 0x598857b2, 0x594063b5, 0x58f838a9, - 0x58afd6bd, 0x58673e1b, - 0x581e6ef1, 0x57d5696d, 0x578c2dba, 0x5742bc06, 0x56f9147e, 0x56af3750, - 0x566524aa, 0x561adcb9, - 0x55d05faa, 0x5585adad, 0x553ac6ee, 0x54efab9c, 0x54a45be6, 0x5458d7f9, - 0x540d2005, 0x53c13439, - 0x537514c2, 0x5328c1d0, 0x52dc3b92, 0x528f8238, 0x524295f0, 0x51f576ea, - 0x51a82555, 0x515aa162, - 0x510ceb40, 0x50bf031f, 0x5070e92f, 0x50229da1, 0x4fd420a4, 0x4f857269, - 0x4f369320, 0x4ee782fb, - 0x4e984229, 0x4e48d0dd, 0x4df92f46, 0x4da95d96, 0x4d595bfe, 0x4d092ab0, - 0x4cb8c9dd, 0x4c6839b7, - 0x4c177a6e, 0x4bc68c36, 0x4b756f40, 0x4b2423be, 0x4ad2a9e2, 0x4a8101de, - 0x4a2f2be6, 0x49dd282a, - 0x498af6df, 0x49389836, 0x48e60c62, 0x48935397, 0x48406e08, 0x47ed5be6, - 0x479a1d67, 0x4746b2bc, - 0x46f31c1a, 0x469f59b4, 0x464b6bbe, 0x45f7526b, 0x45a30df0, 0x454e9e80, - 0x44fa0450, 0x44a53f93, - 0x4450507e, 0x43fb3746, 0x43a5f41e, 0x4350873c, 0x42faf0d4, 0x42a5311b, - 0x424f4845, 0x41f93689, - 0x41a2fc1a, 0x414c992f, 0x40f60dfb, 0x409f5ab6, 0x40487f94, 0x3ff17cca, - 0x3f9a5290, 0x3f430119, - 0x3eeb889c, 0x3e93e950, 0x3e3c2369, 0x3de4371f, 0x3d8c24a8, 0x3d33ec39, - 0x3cdb8e09, 0x3c830a50, - 0x3c2a6142, 0x3bd19318, 0x3b78a007, 0x3b1f8848, 0x3ac64c0f, 0x3a6ceb96, - 0x3a136712, 0x39b9bebc, - 0x395ff2c9, 0x39060373, 0x38abf0ef, 0x3851bb77, 0x37f76341, 0x379ce885, - 0x37424b7b, 0x36e78c5b, - 0x368cab5c, 0x3631a8b8, 0x35d684a6, 0x357b3f5d, 0x351fd918, 0x34c4520d, - 0x3468aa76, 0x340ce28b, - 0x33b0fa84, 0x3354f29b, 0x32f8cb07, 0x329c8402, 0x32401dc6, 0x31e39889, - 0x3186f487, 0x312a31f8, - 0x30cd5115, 0x30705217, 0x30133539, 0x2fb5fab2, 0x2f58a2be, 0x2efb2d95, - 0x2e9d9b70, 0x2e3fec8b, - 0x2de2211e, 0x2d843964, 0x2d263596, 0x2cc815ee, 0x2c69daa6, 0x2c0b83fa, - 0x2bad1221, 0x2b4e8558, - 0x2aefddd8, 0x2a911bdc, 0x2a323f9e, 0x29d34958, 0x29743946, 0x29150fa1, - 0x28b5cca5, 0x2856708d, - 0x27f6fb92, 0x27976df1, 0x2737c7e3, 0x26d809a5, 0x26783370, 0x26184581, - 0x25b84012, 0x2558235f, - 0x24f7efa2, 0x2497a517, 0x243743fa, 0x23d6cc87, 0x23763ef7, 0x23159b88, - 0x22b4e274, 0x225413f8, - 0x21f3304f, 0x219237b5, 0x21312a65, 0x20d0089c, 0x206ed295, 0x200d888d, - 0x1fac2abf, 0x1f4ab968, - 0x1ee934c3, 0x1e879d0d, 0x1e25f282, 0x1dc4355e, 0x1d6265dd, 0x1d00843d, - 0x1c9e90b8, 0x1c3c8b8c, - 0x1bda74f6, 0x1b784d30, 0x1b161479, 0x1ab3cb0d, 0x1a517128, 0x19ef0707, - 0x198c8ce7, 0x192a0304, - 0x18c7699b, 0x1864c0ea, 0x1802092c, 0x179f429f, 0x173c6d80, 0x16d98a0c, - 0x1676987f, 0x16139918, - 0x15b08c12, 0x154d71aa, 0x14ea4a1f, 0x148715ae, 0x1423d492, 0x13c0870a, - 0x135d2d53, 0x12f9c7aa, - 0x1296564d, 0x1232d979, 0x11cf516a, 0x116bbe60, 0x11082096, 0x10a4784b, - 0x1040c5bb, 0xfdd0926, - 0xf7942c7, 0xf1572dc, 0xeb199a4, 0xe4db75b, 0xde9cc40, 0xd85d88f, 0xd21dc87, - 0xcbdd865, - 0xc59cc68, 0xbf5b8cb, 0xb919dcf, 0xb2d7baf, 0xac952aa, 0xa6522fe, 0xa00ece8, - 0x99cb0a7, - 0x9386e78, 0x8d42699, 0x86fd947, 0x80b86c2, 0x7a72f45, 0x742d311, 0x6de7262, - 0x67a0d76, - 0x615a48b, 0x5b137df, 0x54cc7b1, 0x4e8543e, 0x483ddc3, 0x41f6480, 0x3bae8b2, - 0x3566a96, - 0x2f1ea6c, 0x28d6870, 0x228e4e2, 0x1c45ffe, 0x15fda03, 0xfb5330, 0x96cbc1, - 0x3243f5, -}; - -static const q31_t cos_factorsQ31_2048[2048] = { - 0x7fffff62, 0x7ffffa73, 0x7ffff094, 0x7fffe1c6, 0x7fffce09, 0x7fffb55c, - 0x7fff97c1, 0x7fff7536, - 0x7fff4dbb, 0x7fff2151, 0x7ffeeff8, 0x7ffeb9b0, 0x7ffe7e79, 0x7ffe3e52, - 0x7ffdf93c, 0x7ffdaf37, - 0x7ffd6042, 0x7ffd0c5f, 0x7ffcb38c, 0x7ffc55ca, 0x7ffbf319, 0x7ffb8b78, - 0x7ffb1ee9, 0x7ffaad6a, - 0x7ffa36fc, 0x7ff9bba0, 0x7ff93b54, 0x7ff8b619, 0x7ff82bef, 0x7ff79cd6, - 0x7ff708ce, 0x7ff66fd7, - 0x7ff5d1f1, 0x7ff52f1d, 0x7ff48759, 0x7ff3daa6, 0x7ff32905, 0x7ff27275, - 0x7ff1b6f6, 0x7ff0f688, - 0x7ff0312c, 0x7fef66e1, 0x7fee97a7, 0x7fedc37e, 0x7fecea67, 0x7fec0c62, - 0x7feb296d, 0x7fea418b, - 0x7fe954ba, 0x7fe862fa, 0x7fe76c4c, 0x7fe670b0, 0x7fe57025, 0x7fe46aac, - 0x7fe36045, 0x7fe250ef, - 0x7fe13cac, 0x7fe0237a, 0x7fdf055a, 0x7fdde24d, 0x7fdcba51, 0x7fdb8d67, - 0x7fda5b8f, 0x7fd924ca, - 0x7fd7e917, 0x7fd6a875, 0x7fd562e7, 0x7fd4186a, 0x7fd2c900, 0x7fd174a8, - 0x7fd01b63, 0x7fcebd31, - 0x7fcd5a11, 0x7fcbf203, 0x7fca8508, 0x7fc91320, 0x7fc79c4b, 0x7fc62089, - 0x7fc49fda, 0x7fc31a3d, - 0x7fc18fb4, 0x7fc0003e, 0x7fbe6bdb, 0x7fbcd28b, 0x7fbb344e, 0x7fb99125, - 0x7fb7e90f, 0x7fb63c0d, - 0x7fb48a1e, 0x7fb2d343, 0x7fb1177b, 0x7faf56c7, 0x7fad9127, 0x7fabc69b, - 0x7fa9f723, 0x7fa822bf, - 0x7fa6496e, 0x7fa46b32, 0x7fa2880b, 0x7fa09ff7, 0x7f9eb2f8, 0x7f9cc10d, - 0x7f9aca37, 0x7f98ce76, - 0x7f96cdc9, 0x7f94c831, 0x7f92bdad, 0x7f90ae3f, 0x7f8e99e6, 0x7f8c80a1, - 0x7f8a6272, 0x7f883f58, - 0x7f861753, 0x7f83ea64, 0x7f81b88a, 0x7f7f81c6, 0x7f7d4617, 0x7f7b057e, - 0x7f78bffb, 0x7f76758e, - 0x7f742637, 0x7f71d1f6, 0x7f6f78cb, 0x7f6d1ab6, 0x7f6ab7b8, 0x7f684fd0, - 0x7f65e2ff, 0x7f637144, - 0x7f60faa0, 0x7f5e7f13, 0x7f5bfe9d, 0x7f59793e, 0x7f56eef5, 0x7f545fc5, - 0x7f51cbab, 0x7f4f32a9, - 0x7f4c94be, 0x7f49f1eb, 0x7f474a30, 0x7f449d8c, 0x7f41ec01, 0x7f3f358d, - 0x7f3c7a31, 0x7f39b9ee, - 0x7f36f4c3, 0x7f342ab1, 0x7f315bb7, 0x7f2e87d6, 0x7f2baf0d, 0x7f28d15d, - 0x7f25eec7, 0x7f230749, - 0x7f201ae5, 0x7f1d299a, 0x7f1a3368, 0x7f173850, 0x7f143852, 0x7f11336d, - 0x7f0e29a3, 0x7f0b1af2, - 0x7f08075c, 0x7f04eedf, 0x7f01d17d, 0x7efeaf36, 0x7efb8809, 0x7ef85bf7, - 0x7ef52b00, 0x7ef1f524, - 0x7eeeba62, 0x7eeb7abc, 0x7ee83632, 0x7ee4ecc3, 0x7ee19e6f, 0x7ede4b38, - 0x7edaf31c, 0x7ed7961c, - 0x7ed43438, 0x7ed0cd70, 0x7ecd61c5, 0x7ec9f137, 0x7ec67bc5, 0x7ec3016f, - 0x7ebf8237, 0x7ebbfe1c, - 0x7eb8751e, 0x7eb4e73d, 0x7eb1547a, 0x7eadbcd4, 0x7eaa204c, 0x7ea67ee2, - 0x7ea2d896, 0x7e9f2d68, - 0x7e9b7d58, 0x7e97c867, 0x7e940e94, 0x7e904fe0, 0x7e8c8c4b, 0x7e88c3d5, - 0x7e84f67e, 0x7e812447, - 0x7e7d4d2f, 0x7e797136, 0x7e75905d, 0x7e71aaa4, 0x7e6dc00c, 0x7e69d093, - 0x7e65dc3b, 0x7e61e303, - 0x7e5de4ec, 0x7e59e1f5, 0x7e55da20, 0x7e51cd6c, 0x7e4dbbd9, 0x7e49a567, - 0x7e458a17, 0x7e4169e9, - 0x7e3d44dd, 0x7e391af3, 0x7e34ec2b, 0x7e30b885, 0x7e2c8002, 0x7e2842a2, - 0x7e240064, 0x7e1fb94a, - 0x7e1b6d53, 0x7e171c7f, 0x7e12c6ce, 0x7e0e6c42, 0x7e0a0cd9, 0x7e05a894, - 0x7e013f74, 0x7dfcd178, - 0x7df85ea0, 0x7df3e6ee, 0x7def6a60, 0x7deae8f7, 0x7de662b3, 0x7de1d795, - 0x7ddd479d, 0x7dd8b2ca, - 0x7dd4191d, 0x7dcf7a96, 0x7dcad736, 0x7dc62efc, 0x7dc181e8, 0x7dbccffc, - 0x7db81936, 0x7db35d98, - 0x7dae9d21, 0x7da9d7d2, 0x7da50dab, 0x7da03eab, 0x7d9b6ad3, 0x7d969224, - 0x7d91b49e, 0x7d8cd240, - 0x7d87eb0a, 0x7d82fefe, 0x7d7e0e1c, 0x7d791862, 0x7d741dd2, 0x7d6f1e6c, - 0x7d6a1a31, 0x7d65111f, - 0x7d600338, 0x7d5af07b, 0x7d55d8e9, 0x7d50bc82, 0x7d4b9b46, 0x7d467536, - 0x7d414a51, 0x7d3c1a98, - 0x7d36e60b, 0x7d31acaa, 0x7d2c6e76, 0x7d272b6e, 0x7d21e393, 0x7d1c96e5, - 0x7d174564, 0x7d11ef11, - 0x7d0c93eb, 0x7d0733f3, 0x7d01cf29, 0x7cfc658d, 0x7cf6f720, 0x7cf183e1, - 0x7cec0bd1, 0x7ce68ef0, - 0x7ce10d3f, 0x7cdb86bd, 0x7cd5fb6a, 0x7cd06b48, 0x7ccad656, 0x7cc53c94, - 0x7cbf9e03, 0x7cb9faa2, - 0x7cb45272, 0x7caea574, 0x7ca8f3a7, 0x7ca33d0c, 0x7c9d81a3, 0x7c97c16b, - 0x7c91fc66, 0x7c8c3294, - 0x7c8663f4, 0x7c809088, 0x7c7ab84e, 0x7c74db48, 0x7c6ef976, 0x7c6912d7, - 0x7c63276d, 0x7c5d3737, - 0x7c574236, 0x7c514869, 0x7c4b49d2, 0x7c45466f, 0x7c3f3e42, 0x7c39314b, - 0x7c331f8a, 0x7c2d08ff, - 0x7c26edab, 0x7c20cd8d, 0x7c1aa8a6, 0x7c147ef6, 0x7c0e507e, 0x7c081d3d, - 0x7c01e534, 0x7bfba863, - 0x7bf566cb, 0x7bef206b, 0x7be8d544, 0x7be28556, 0x7bdc30a1, 0x7bd5d726, - 0x7bcf78e5, 0x7bc915dd, - 0x7bc2ae10, 0x7bbc417e, 0x7bb5d026, 0x7baf5a09, 0x7ba8df28, 0x7ba25f82, - 0x7b9bdb18, 0x7b9551ea, - 0x7b8ec3f8, 0x7b883143, 0x7b8199ca, 0x7b7afd8f, 0x7b745c91, 0x7b6db6d0, - 0x7b670c4d, 0x7b605d09, - 0x7b59a902, 0x7b52f03a, 0x7b4c32b1, 0x7b457068, 0x7b3ea95d, 0x7b37dd92, - 0x7b310d07, 0x7b2a37bc, - 0x7b235db2, 0x7b1c7ee8, 0x7b159b5f, 0x7b0eb318, 0x7b07c612, 0x7b00d44d, - 0x7af9ddcb, 0x7af2e28b, - 0x7aebe28d, 0x7ae4ddd2, 0x7addd45b, 0x7ad6c626, 0x7acfb336, 0x7ac89b89, - 0x7ac17f20, 0x7aba5dfc, - 0x7ab3381d, 0x7aac0d82, 0x7aa4de2d, 0x7a9daa1d, 0x7a967153, 0x7a8f33d0, - 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0x4888f957, 0x487442be, - 0x485f8959, 0x484acd2a, 0x48360e32, 0x48214c71, 0x480c87e8, 0x47f7c099, - 0x47e2f682, 0x47ce29a7, - 0x47b95a06, 0x47a487a2, 0x478fb27b, 0x477ada91, 0x4765ffe6, 0x4751227a, - 0x473c424e, 0x47275f63, - 0x471279ba, 0x46fd9154, 0x46e8a631, 0x46d3b852, 0x46bec7b8, 0x46a9d464, - 0x4694de56, 0x467fe590, - 0x466aea12, 0x4655ebdd, 0x4640eaf2, 0x462be751, 0x4616e0fc, 0x4601d7f3, - 0x45eccc37, 0x45d7bdc9, - 0x45c2acaa, 0x45ad98da, 0x4598825a, 0x4583692c, 0x456e4d4f, 0x45592ec6, - 0x45440d90, 0x452ee9ae, - 0x4519c321, 0x450499eb, 0x44ef6e0b, 0x44da3f83, 0x44c50e53, 0x44afda7d, - 0x449aa400, 0x44856adf, - 0x44702f19, 0x445af0b0, 0x4445afa4, 0x44306bf6, 0x441b25a8, 0x4405dcb9, - 0x43f0912b, 0x43db42fe, - 0x43c5f234, 0x43b09ecc, 0x439b48c9, 0x4385f02a, 0x437094f1, 0x435b371f, - 0x4345d6b3, 0x433073b0, - 0x431b0e15, 0x4305a5e5, 0x42f03b1e, 0x42dacdc3, 0x42c55dd4, 0x42afeb53, - 0x429a763f, 0x4284fe99, - 0x426f8463, 0x425a079e, 0x42448849, 0x422f0667, 0x421981f7, 0x4203fafb, - 0x41ee7174, 0x41d8e561, - 0x41c356c5, 0x41adc5a0, 0x419831f3, 0x41829bbe, 0x416d0302, 0x415767c1, - 0x4141c9fb, 0x412c29b1, - 0x411686e4, 0x4100e194, 0x40eb39c3, 0x40d58f71, 0x40bfe29f, 0x40aa334e, - 0x4094817f, 0x407ecd32, - 0x40691669, 0x40535d24, 0x403da165, 0x4027e32b, 0x40122278, 0x3ffc5f4d, - 0x3fe699aa, 0x3fd0d191, - 0x3fbb0702, 0x3fa539fd, 0x3f8f6a85, 0x3f799899, 0x3f63c43b, 0x3f4ded6b, - 0x3f38142a, 0x3f22387a, - 0x3f0c5a5a, 0x3ef679cc, 0x3ee096d1, 0x3ecab169, 0x3eb4c995, 0x3e9edf57, - 0x3e88f2ae, 0x3e73039d, - 0x3e5d1222, 0x3e471e41, 0x3e3127f9, 0x3e1b2f4a, 0x3e053437, 0x3def36c0, - 0x3dd936e6, 0x3dc334a9, - 0x3dad300b, 0x3d97290b, 0x3d811fac, 0x3d6b13ee, 0x3d5505d2, 0x3d3ef559, - 0x3d28e282, 0x3d12cd51, - 0x3cfcb5c4, 0x3ce69bde, 0x3cd07f9f, 0x3cba6107, 0x3ca44018, 0x3c8e1cd3, - 0x3c77f737, 0x3c61cf48, - 0x3c4ba504, 0x3c35786d, 0x3c1f4983, 0x3c091849, 0x3bf2e4be, 0x3bdcaee3, - 0x3bc676b9, 0x3bb03c42, - 0x3b99ff7d, 0x3b83c06c, 0x3b6d7f10, 0x3b573b69, 0x3b40f579, 0x3b2aad3f, - 0x3b1462be, 0x3afe15f6, - 0x3ae7c6e7, 0x3ad17593, 0x3abb21fb, 0x3aa4cc1e, 0x3a8e7400, 0x3a78199f, - 0x3a61bcfd, 0x3a4b5e1b, - 0x3a34fcf9, 0x3a1e9999, 0x3a0833fc, 0x39f1cc21, 0x39db620b, 0x39c4f5ba, - 0x39ae872f, 0x3998166a, - 0x3981a36d, 0x396b2e38, 0x3954b6cd, 0x393e3d2c, 0x3927c155, 0x3911434b, - 0x38fac30e, 0x38e4409e, - 0x38cdbbfc, 0x38b7352a, 0x38a0ac29, 0x388a20f8, 0x38739399, 0x385d040d, - 0x38467255, 0x382fde72, - 0x38194864, 0x3802b02c, 0x37ec15cb, 0x37d57943, 0x37beda93, 0x37a839be, - 0x379196c3, 0x377af1a3, - 0x37644a60, 0x374da0fa, 0x3736f573, 0x372047ca, 0x37099802, 0x36f2e61a, - 0x36dc3214, 0x36c57bf0, - 0x36aec3b0, 0x36980954, 0x36814cde, 0x366a8e4d, 0x3653cda3, 0x363d0ae2, - 0x36264609, 0x360f7f19, - 0x35f8b614, 0x35e1eafa, 0x35cb1dcc, 0x35b44e8c, 0x359d7d39, 0x3586a9d5, - 0x356fd461, 0x3558fcde, - 0x3542234c, 0x352b47ad, 0x35146a00, 0x34fd8a48, 0x34e6a885, 0x34cfc4b7, - 0x34b8dee1, 0x34a1f702, - 0x348b0d1c, 0x3474212f, 0x345d333c, 0x34464345, 0x342f5149, 0x34185d4b, - 0x3401674a, 0x33ea6f48, - 0x33d37546, 0x33bc7944, 0x33a57b44, 0x338e7b46, 0x3377794b, 0x33607554, - 0x33496f62, 0x33326776, - 0x331b5d91, 0x330451b3, 0x32ed43de, 0x32d63412, 0x32bf2250, 0x32a80e99, - 0x3290f8ef, 0x3279e151, - 0x3262c7c1, 0x324bac40, 0x32348ecf, 0x321d6f6e, 0x32064e1e, 0x31ef2ae1, - 0x31d805b7, 0x31c0dea1, - 0x31a9b5a0, 0x31928ab4, 0x317b5de0, 0x31642f23, 0x314cfe7f, 0x3135cbf4, - 0x311e9783, 0x3107612e, - 0x30f028f4, 0x30d8eed8, 0x30c1b2da, 0x30aa74fa, 0x3093353a, 0x307bf39b, - 0x3064b01d, 0x304d6ac1, - 0x30362389, 0x301eda75, 0x30078f86, 0x2ff042bd, 0x2fd8f41b, 0x2fc1a3a0, - 0x2faa514f, 0x2f92fd26, - 0x2f7ba729, 0x2f644f56, 0x2f4cf5b0, 0x2f359a37, 0x2f1e3ced, 0x2f06ddd1, - 0x2eef7ce5, 0x2ed81a29, - 0x2ec0b5a0, 0x2ea94f49, 0x2e91e725, 0x2e7a7d36, 0x2e63117c, 0x2e4ba3f8, - 0x2e3434ac, 0x2e1cc397, - 0x2e0550bb, 0x2deddc19, 0x2dd665b2, 0x2dbeed86, 0x2da77397, 0x2d8ff7e5, - 0x2d787a72, 0x2d60fb3e, - 0x2d497a4a, 0x2d31f797, 0x2d1a7325, 0x2d02ecf7, 0x2ceb650d, 0x2cd3db67, - 0x2cbc5006, 0x2ca4c2ed, - 0x2c8d341a, 0x2c75a390, 0x2c5e114f, 0x2c467d58, 0x2c2ee7ad, 0x2c17504d, - 0x2bffb73a, 0x2be81c74, - 0x2bd07ffe, 0x2bb8e1d7, 0x2ba14200, 0x2b89a07b, 0x2b71fd48, 0x2b5a5868, - 0x2b42b1dd, 0x2b2b09a6, - 0x2b135fc6, 0x2afbb43c, 0x2ae4070a, 0x2acc5831, 0x2ab4a7b1, 0x2a9cf58c, - 0x2a8541c3, 0x2a6d8c55, - 0x2a55d545, 0x2a3e1c93, 0x2a266240, 0x2a0ea64d, 0x29f6e8bb, 0x29df298b, - 0x29c768be, 0x29afa654, - 0x2997e24f, 0x29801caf, 0x29685576, 0x29508ca4, 0x2938c23a, 0x2920f63a, - 0x290928a3, 0x28f15978, - 0x28d988b8, 0x28c1b666, 0x28a9e281, 0x28920d0a, 0x287a3604, 0x28625d6d, - 0x284a8349, 0x2832a796, - 0x281aca57, 0x2802eb8c, 0x27eb0b36, 0x27d32956, 0x27bb45ed, 0x27a360fc, - 0x278b7a84, 0x27739285, - 0x275ba901, 0x2743bdf9, 0x272bd16d, 0x2713e35f, 0x26fbf3ce, 0x26e402bd, - 0x26cc102d, 0x26b41c1d, - 0x269c268f, 0x26842f84, 0x266c36fe, 0x26543cfb, 0x263c417f, 0x26244489, - 0x260c461b, 0x25f44635, - 0x25dc44d9, 0x25c44207, 0x25ac3dc0, 0x25943806, 0x257c30d8, 0x25642839, - 0x254c1e28, 0x253412a8, - 0x251c05b8, 0x2503f75a, 0x24ebe78f, 0x24d3d657, 0x24bbc3b4, 0x24a3afa6, - 0x248b9a2f, 0x2473834f, - 0x245b6b07, 0x24435158, 0x242b3644, 0x241319ca, 0x23fafbec, 0x23e2dcac, - 0x23cabc09, 0x23b29a05, - 0x239a76a0, 0x238251dd, 0x236a2bba, 0x2352043b, 0x2339db5e, 0x2321b126, - 0x23098593, 0x22f158a7, - 0x22d92a61, 0x22c0fac4, 0x22a8c9cf, 0x22909785, 0x227863e5, 0x22602ef1, - 0x2247f8aa, 0x222fc111, - 0x22178826, 0x21ff4dea, 0x21e71260, 0x21ced586, 0x21b6975f, 0x219e57eb, - 0x2186172b, 0x216dd521, - 0x215591cc, 0x213d4d2f, 0x21250749, 0x210cc01d, 0x20f477aa, 0x20dc2df2, - 0x20c3e2f5, 0x20ab96b5, - 0x20934933, 0x207afa6f, 0x2062aa6b, 0x204a5927, 0x203206a4, 0x2019b2e4, - 0x20015de7, 0x1fe907ae, - 0x1fd0b03a, 0x1fb8578b, 0x1f9ffda4, 0x1f87a285, 0x1f6f462f, 0x1f56e8a2, - 0x1f3e89e0, 0x1f2629ea, - 0x1f0dc8c0, 0x1ef56664, 0x1edd02d6, 0x1ec49e17, 0x1eac3829, 0x1e93d10c, - 0x1e7b68c2, 0x1e62ff4a, - 0x1e4a94a7, 0x1e3228d9, 0x1e19bbe0, 0x1e014dbf, 0x1de8de75, 0x1dd06e04, - 0x1db7fc6d, 0x1d9f89b1, - 0x1d8715d0, 0x1d6ea0cc, 0x1d562aa6, 0x1d3db35e, 0x1d253af5, 0x1d0cc16c, - 0x1cf446c5, 0x1cdbcb00, - 0x1cc34e1f, 0x1caad021, 0x1c925109, 0x1c79d0d6, 0x1c614f8b, 0x1c48cd27, - 0x1c3049ac, 0x1c17c51b, - 0x1bff3f75, 0x1be6b8ba, 0x1bce30ec, 0x1bb5a80c, 0x1b9d1e1a, 0x1b849317, - 0x1b6c0705, 0x1b5379e5, - 0x1b3aebb6, 0x1b225c7b, 0x1b09cc34, 0x1af13ae3, 0x1ad8a887, 0x1ac01522, - 0x1aa780b6, 0x1a8eeb42, - 0x1a7654c8, 0x1a5dbd49, 0x1a4524c6, 0x1a2c8b3f, 0x1a13f0b6, 0x19fb552c, - 0x19e2b8a2, 0x19ca1b17, - 0x19b17c8f, 0x1998dd09, 0x19803c86, 0x19679b07, 0x194ef88e, 0x1936551b, - 0x191db0af, 0x19050b4b, - 0x18ec64f0, 0x18d3bda0, 0x18bb155a, 0x18a26c20, 0x1889c1f3, 0x187116d4, - 0x18586ac3, 0x183fbdc3, - 0x18270fd3, 0x180e60f4, 0x17f5b129, 0x17dd0070, 0x17c44ecd, 0x17ab9c3e, - 0x1792e8c6, 0x177a3466, - 0x17617f1d, 0x1748c8ee, 0x173011d9, 0x171759df, 0x16fea102, 0x16e5e741, - 0x16cd2c9f, 0x16b4711b, - 0x169bb4b7, 0x1682f774, 0x166a3953, 0x16517a55, 0x1638ba7a, 0x161ff9c4, - 0x16073834, 0x15ee75cb, - 0x15d5b288, 0x15bcee6f, 0x15a4297f, 0x158b63b9, 0x15729d1f, 0x1559d5b1, - 0x15410d70, 0x1528445d, - 0x150f7a7a, 0x14f6afc7, 0x14dde445, 0x14c517f4, 0x14ac4ad7, 0x14937cee, - 0x147aae3a, 0x1461debc, - 0x14490e74, 0x14303d65, 0x14176b8e, 0x13fe98f1, 0x13e5c58e, 0x13ccf167, - 0x13b41c7d, 0x139b46d0, - 0x13827062, 0x13699933, 0x1350c144, 0x1337e897, 0x131f0f2c, 0x13063505, - 0x12ed5a21, 0x12d47e83, - 0x12bba22b, 0x12a2c51b, 0x1289e752, 0x127108d2, 0x1258299c, 0x123f49b2, - 0x12266913, 0x120d87c1, - 0x11f4a5bd, 0x11dbc307, 0x11c2dfa2, 0x11a9fb8d, 0x119116c9, 0x11783159, - 0x115f4b3c, 0x11466473, - 0x112d7d00, 0x111494e4, 0x10fbac1e, 0x10e2c2b2, 0x10c9d89e, 0x10b0ede5, - 0x10980287, 0x107f1686, - 0x106629e1, 0x104d3c9b, 0x10344eb4, 0x101b602d, 0x10027107, 0xfe98143, - 0xfd090e1, 0xfb79fe4, - 0xf9eae4c, 0xf85bc19, 0xf6cc94e, 0xf53d5ea, 0xf3ae1ee, 0xf21ed5d, 0xf08f836, - 0xef0027b, - 0xed70c2c, 0xebe154b, 0xea51dd8, 0xe8c25d5, 0xe732d42, 0xe5a3421, 0xe413a72, - 0xe284036, - 0xe0f456f, 0xdf64a1c, 0xddd4e40, 0xdc451dc, 0xdab54ef, 0xd92577b, 0xd795982, - 0xd605b03, - 0xd475c00, 0xd2e5c7b, 0xd155c73, 0xcfc5bea, 0xce35ae1, 0xcca5959, 0xcb15752, - 0xc9854cf, - 0xc7f51cf, 0xc664e53, 0xc4d4a5d, 0xc3445ee, 0xc1b4107, 0xc023ba7, 0xbe935d2, - 0xbd02f87, - 0xbb728c7, 0xb9e2193, 0xb8519ed, 0xb6c11d5, 0xb53094d, 0xb3a0055, 0xb20f6ee, - 0xb07ed19, - 0xaeee2d7, 0xad5d829, 0xabccd11, 0xaa3c18e, 0xa8ab5a2, 0xa71a94f, 0xa589c94, - 0xa3f8f73, - 0xa2681ed, 0xa0d7403, 0x9f465b5, 0x9db5706, 0x9c247f5, 0x9a93884, 0x99028b3, - 0x9771884, - 0x95e07f8, 0x944f70f, 0x92be5ca, 0x912d42c, 0x8f9c233, 0x8e0afe2, 0x8c79d3a, - 0x8ae8a3a, - 0x89576e5, 0x87c633c, 0x8634f3e, 0x84a3aee, 0x831264c, 0x8181159, 0x7fefc16, - 0x7e5e685, - 0x7ccd0a5, 0x7b3ba78, 0x79aa400, 0x7818d3c, 0x768762e, 0x74f5ed7, 0x7364738, - 0x71d2f52, - 0x7041726, 0x6eafeb4, 0x6d1e5fe, 0x6b8cd05, 0x69fb3c9, 0x6869a4c, 0x66d808f, - 0x6546692, - 0x63b4c57, 0x62231de, 0x6091729, 0x5effc38, 0x5d6e10c, 0x5bdc5a7, 0x5a4aa09, - 0x58b8e34, - 0x5727228, 0x55955e6, 0x540396f, 0x5271cc4, 0x50dffe7, 0x4f4e2d8, 0x4dbc597, - 0x4c2a827, - 0x4a98a88, 0x4906cbb, 0x4774ec1, 0x45e309a, 0x4451249, 0x42bf3cd, 0x412d528, - 0x3f9b65b, - 0x3e09767, 0x3c7784d, 0x3ae590d, 0x39539a9, 0x37c1a22, 0x362fa78, 0x349daac, - 0x330bac1, - 0x3179ab5, 0x2fe7a8c, 0x2e55a44, 0x2cc39e1, 0x2b31961, 0x299f8c7, 0x280d813, - 0x267b747, - 0x24e9662, 0x2357567, 0x21c5457, 0x2033331, 0x1ea11f7, 0x1d0f0ab, 0x1b7cf4d, - 0x19eaddd, - 0x1858c5e, 0x16c6ad0, 0x1534934, 0x13a278a, 0x12105d5, 0x107e414, 0xeec249, - 0xd5a075, - 0xbc7e99, 0xa35cb5, 0x8a3acb, 0x7118dc, 0x57f6e9, 0x3ed4f2, 0x25b2f8, - 0xc90fe, - -}; - -static const q31_t cos_factorsQ31_8192[8192] = { - 0x7ffffff6, 0x7fffffa7, 0x7fffff09, 0x7ffffe1c, 0x7ffffce1, 0x7ffffb56, - 0x7ffff97c, 0x7ffff753, - 0x7ffff4dc, 0x7ffff215, 0x7fffef00, 0x7fffeb9b, 0x7fffe7e8, 0x7fffe3e5, - 0x7fffdf94, 0x7fffdaf3, - 0x7fffd604, 0x7fffd0c6, 0x7fffcb39, 0x7fffc55c, 0x7fffbf31, 0x7fffb8b7, - 0x7fffb1ee, 0x7fffaad6, - 0x7fffa36f, 0x7fff9bb9, 0x7fff93b4, 0x7fff8b61, 0x7fff82be, 0x7fff79cc, - 0x7fff708b, 0x7fff66fc, - 0x7fff5d1d, 0x7fff52ef, 0x7fff4873, 0x7fff3da8, 0x7fff328d, 0x7fff2724, - 0x7fff1b6b, 0x7fff0f64, - 0x7fff030e, 0x7ffef669, 0x7ffee975, 0x7ffedc31, 0x7ffece9f, 0x7ffec0be, - 0x7ffeb28e, 0x7ffea40f, - 0x7ffe9542, 0x7ffe8625, 0x7ffe76b9, 0x7ffe66fe, 0x7ffe56f5, 0x7ffe469c, - 0x7ffe35f4, 0x7ffe24fe, - 0x7ffe13b8, 0x7ffe0224, 0x7ffdf040, 0x7ffdde0e, 0x7ffdcb8d, 0x7ffdb8bc, - 0x7ffda59d, 0x7ffd922f, - 0x7ffd7e72, 0x7ffd6a66, 0x7ffd560b, 0x7ffd4161, 0x7ffd2c68, 0x7ffd1720, - 0x7ffd0189, 0x7ffceba4, - 0x7ffcd56f, 0x7ffcbeeb, 0x7ffca819, 0x7ffc90f7, 0x7ffc7987, 0x7ffc61c7, - 0x7ffc49b9, 0x7ffc315b, - 0x7ffc18af, 0x7ffbffb4, 0x7ffbe66a, 0x7ffbccd0, 0x7ffbb2e8, 0x7ffb98b1, - 0x7ffb7e2b, 0x7ffb6356, - 0x7ffb4833, 0x7ffb2cc0, 0x7ffb10fe, 0x7ffaf4ed, 0x7ffad88e, 0x7ffabbdf, - 0x7ffa9ee2, 0x7ffa8195, - 0x7ffa63fa, 0x7ffa460f, 0x7ffa27d6, 0x7ffa094e, 0x7ff9ea76, 0x7ff9cb50, - 0x7ff9abdb, 0x7ff98c17, - 0x7ff96c04, 0x7ff94ba2, 0x7ff92af1, 0x7ff909f2, 0x7ff8e8a3, 0x7ff8c705, - 0x7ff8a519, 0x7ff882dd, - 0x7ff86053, 0x7ff83d79, 0x7ff81a51, 0x7ff7f6da, 0x7ff7d313, 0x7ff7aefe, - 0x7ff78a9a, 0x7ff765e7, - 0x7ff740e5, 0x7ff71b94, 0x7ff6f5f4, 0x7ff6d005, 0x7ff6a9c8, 0x7ff6833b, - 0x7ff65c5f, 0x7ff63535, - 0x7ff60dbb, 0x7ff5e5f3, 0x7ff5bddc, 0x7ff59576, 0x7ff56cc0, 0x7ff543bc, - 0x7ff51a69, 0x7ff4f0c7, - 0x7ff4c6d6, 0x7ff49c96, 0x7ff47208, 0x7ff4472a, 0x7ff41bfd, 0x7ff3f082, - 0x7ff3c4b7, 0x7ff3989e, - 0x7ff36c36, 0x7ff33f7e, 0x7ff31278, 0x7ff2e523, 0x7ff2b77f, 0x7ff2898c, - 0x7ff25b4a, 0x7ff22cb9, - 0x7ff1fdd9, 0x7ff1ceab, 0x7ff19f2d, 0x7ff16f61, 0x7ff13f45, 0x7ff10edb, - 0x7ff0de22, 0x7ff0ad19, - 0x7ff07bc2, 0x7ff04a1c, 0x7ff01827, 0x7fefe5e4, 0x7fefb351, 0x7fef806f, - 0x7fef4d3e, 0x7fef19bf, - 0x7feee5f0, 0x7feeb1d3, 0x7fee7d67, 0x7fee48ac, 0x7fee13a1, 0x7fedde48, - 0x7feda8a0, 0x7fed72aa, - 0x7fed3c64, 0x7fed05cf, 0x7fecceec, 0x7fec97b9, 0x7fec6038, 0x7fec2867, - 0x7febf048, 0x7febb7da, - 0x7feb7f1d, 0x7feb4611, 0x7feb0cb6, 0x7fead30c, 0x7fea9914, 0x7fea5ecc, - 0x7fea2436, 0x7fe9e950, - 0x7fe9ae1c, 0x7fe97299, 0x7fe936c7, 0x7fe8faa6, 0x7fe8be36, 0x7fe88177, - 0x7fe84469, 0x7fe8070d, - 0x7fe7c961, 0x7fe78b67, 0x7fe74d1e, 0x7fe70e85, 0x7fe6cf9e, 0x7fe69068, - 0x7fe650e3, 0x7fe61110, - 0x7fe5d0ed, 0x7fe5907b, 0x7fe54fbb, 0x7fe50eac, 0x7fe4cd4d, 0x7fe48ba0, - 0x7fe449a4, 0x7fe40759, - 0x7fe3c4bf, 0x7fe381d7, 0x7fe33e9f, 0x7fe2fb19, 0x7fe2b743, 0x7fe2731f, - 0x7fe22eac, 0x7fe1e9ea, - 0x7fe1a4d9, 0x7fe15f79, 0x7fe119cb, 0x7fe0d3cd, 0x7fe08d81, 0x7fe046e5, - 0x7fdffffb, 0x7fdfb8c2, - 0x7fdf713a, 0x7fdf2963, 0x7fdee13e, 0x7fde98c9, 0x7fde5006, 0x7fde06f3, - 0x7fddbd92, 0x7fdd73e2, - 0x7fdd29e3, 0x7fdcdf95, 0x7fdc94f9, 0x7fdc4a0d, 0x7fdbfed3, 0x7fdbb349, - 0x7fdb6771, 0x7fdb1b4a, - 0x7fdaced4, 0x7fda820f, 0x7fda34fc, 0x7fd9e799, 0x7fd999e8, 0x7fd94be8, - 0x7fd8fd98, 0x7fd8aefa, - 0x7fd8600e, 0x7fd810d2, 0x7fd7c147, 0x7fd7716e, 0x7fd72146, 0x7fd6d0cf, - 0x7fd68009, 0x7fd62ef4, - 0x7fd5dd90, 0x7fd58bdd, 0x7fd539dc, 0x7fd4e78c, 0x7fd494ed, 0x7fd441ff, - 0x7fd3eec2, 0x7fd39b36, - 0x7fd3475c, 0x7fd2f332, 0x7fd29eba, 0x7fd249f3, 0x7fd1f4dd, 0x7fd19f78, - 0x7fd149c5, 0x7fd0f3c2, - 0x7fd09d71, 0x7fd046d1, 0x7fcfefe2, 0x7fcf98a4, 0x7fcf4117, 0x7fcee93c, - 0x7fce9112, 0x7fce3898, - 0x7fcddfd0, 0x7fcd86b9, 0x7fcd2d54, 0x7fccd39f, 0x7fcc799c, 0x7fcc1f4a, - 0x7fcbc4a9, 0x7fcb69b9, - 0x7fcb0e7a, 0x7fcab2ed, 0x7fca5710, 0x7fc9fae5, 0x7fc99e6b, 0x7fc941a2, - 0x7fc8e48b, 0x7fc88724, - 0x7fc8296f, 0x7fc7cb6b, 0x7fc76d18, 0x7fc70e76, 0x7fc6af86, 0x7fc65046, - 0x7fc5f0b8, 0x7fc590db, - 0x7fc530af, 0x7fc4d035, 0x7fc46f6b, 0x7fc40e53, 0x7fc3acec, 0x7fc34b36, - 0x7fc2e931, 0x7fc286de, - 0x7fc2243b, 0x7fc1c14a, 0x7fc15e0a, 0x7fc0fa7b, 0x7fc0969e, 0x7fc03271, - 0x7fbfcdf6, 0x7fbf692c, - 0x7fbf0414, 0x7fbe9eac, 0x7fbe38f6, 0x7fbdd2f0, 0x7fbd6c9c, 0x7fbd05fa, - 0x7fbc9f08, 0x7fbc37c8, - 0x7fbbd039, 0x7fbb685b, 0x7fbb002e, 0x7fba97b2, 0x7fba2ee8, 0x7fb9c5cf, - 0x7fb95c67, 0x7fb8f2b0, - 0x7fb888ab, 0x7fb81e57, 0x7fb7b3b4, 0x7fb748c2, 0x7fb6dd81, 0x7fb671f2, - 0x7fb60614, 0x7fb599e7, - 0x7fb52d6b, 0x7fb4c0a1, 0x7fb45387, 0x7fb3e61f, 0x7fb37869, 0x7fb30a63, - 0x7fb29c0f, 0x7fb22d6c, - 0x7fb1be7a, 0x7fb14f39, 0x7fb0dfaa, 0x7fb06fcb, 0x7fafff9e, 0x7faf8f23, - 0x7faf1e58, 0x7faead3f, - 0x7fae3bd7, 0x7fadca20, 0x7fad581b, 0x7face5c6, 0x7fac7323, 0x7fac0031, - 0x7fab8cf1, 0x7fab1962, - 0x7faaa584, 0x7faa3157, 0x7fa9bcdb, 0x7fa94811, 0x7fa8d2f8, 0x7fa85d90, - 0x7fa7e7d9, 0x7fa771d4, - 0x7fa6fb80, 0x7fa684dd, 0x7fa60dec, 0x7fa596ac, 0x7fa51f1d, 0x7fa4a73f, - 0x7fa42f12, 0x7fa3b697, - 0x7fa33dcd, 0x7fa2c4b5, 0x7fa24b4d, 0x7fa1d197, 0x7fa15792, 0x7fa0dd3f, - 0x7fa0629c, 0x7f9fe7ab, - 0x7f9f6c6b, 0x7f9ef0dd, 0x7f9e7500, 0x7f9df8d4, 0x7f9d7c59, 0x7f9cff90, - 0x7f9c8278, 0x7f9c0511, - 0x7f9b875b, 0x7f9b0957, 0x7f9a8b04, 0x7f9a0c62, 0x7f998d72, 0x7f990e33, - 0x7f988ea5, 0x7f980ec8, - 0x7f978e9d, 0x7f970e23, 0x7f968d5b, 0x7f960c43, 0x7f958add, 0x7f950929, - 0x7f948725, 0x7f9404d3, - 0x7f938232, 0x7f92ff43, 0x7f927c04, 0x7f91f878, 0x7f91749c, 0x7f90f072, - 0x7f906bf9, 0x7f8fe731, - 0x7f8f621b, 0x7f8edcb6, 0x7f8e5702, 0x7f8dd0ff, 0x7f8d4aae, 0x7f8cc40f, - 0x7f8c3d20, 0x7f8bb5e3, - 0x7f8b2e57, 0x7f8aa67d, 0x7f8a1e54, 0x7f8995dc, 0x7f890d15, 0x7f888400, - 0x7f87fa9c, 0x7f8770ea, - 0x7f86e6e9, 0x7f865c99, 0x7f85d1fa, 0x7f85470d, 0x7f84bbd1, 0x7f843047, - 0x7f83a46e, 0x7f831846, - 0x7f828bcf, 0x7f81ff0a, 0x7f8171f6, 0x7f80e494, 0x7f8056e3, 0x7f7fc8e3, - 0x7f7f3a95, 0x7f7eabf8, - 0x7f7e1d0c, 0x7f7d8dd2, 0x7f7cfe49, 0x7f7c6e71, 0x7f7bde4b, 0x7f7b4dd6, - 0x7f7abd13, 0x7f7a2c01, - 0x7f799aa0, 0x7f7908f0, 0x7f7876f2, 0x7f77e4a6, 0x7f77520a, 0x7f76bf21, - 0x7f762be8, 0x7f759861, - 0x7f75048b, 0x7f747067, 0x7f73dbf4, 0x7f734732, 0x7f72b222, 0x7f721cc3, - 0x7f718715, 0x7f70f119, - 0x7f705ace, 0x7f6fc435, 0x7f6f2d4d, 0x7f6e9617, 0x7f6dfe91, 0x7f6d66be, - 0x7f6cce9b, 0x7f6c362a, - 0x7f6b9d6b, 0x7f6b045d, 0x7f6a6b00, 0x7f69d154, 0x7f69375a, 0x7f689d12, - 0x7f68027b, 0x7f676795, - 0x7f66cc61, 0x7f6630de, 0x7f65950c, 0x7f64f8ec, 0x7f645c7d, 0x7f63bfc0, - 0x7f6322b4, 0x7f62855a, - 0x7f61e7b1, 0x7f6149b9, 0x7f60ab73, 0x7f600cdf, 0x7f5f6dfb, 0x7f5ecec9, - 0x7f5e2f49, 0x7f5d8f7a, - 0x7f5cef5c, 0x7f5c4ef0, 0x7f5bae36, 0x7f5b0d2c, 0x7f5a6bd5, 0x7f59ca2e, - 0x7f592839, 0x7f5885f6, - 0x7f57e364, 0x7f574083, 0x7f569d54, 0x7f55f9d6, 0x7f55560a, 0x7f54b1ef, - 0x7f540d86, 0x7f5368ce, - 0x7f52c3c8, 0x7f521e73, 0x7f5178cf, 0x7f50d2dd, 0x7f502c9d, 0x7f4f860e, - 0x7f4edf30, 0x7f4e3804, - 0x7f4d9089, 0x7f4ce8c0, 0x7f4c40a8, 0x7f4b9842, 0x7f4aef8d, 0x7f4a468a, - 0x7f499d38, 0x7f48f398, - 0x7f4849a9, 0x7f479f6c, 0x7f46f4e0, 0x7f464a06, 0x7f459edd, 0x7f44f365, - 0x7f44479f, 0x7f439b8b, - 0x7f42ef28, 0x7f424277, 0x7f419577, 0x7f40e828, 0x7f403a8b, 0x7f3f8ca0, - 0x7f3ede66, 0x7f3e2fde, - 0x7f3d8107, 0x7f3cd1e2, 0x7f3c226e, 0x7f3b72ab, 0x7f3ac29b, 0x7f3a123b, - 0x7f39618e, 0x7f38b091, - 0x7f37ff47, 0x7f374dad, 0x7f369bc6, 0x7f35e990, 0x7f35370b, 0x7f348438, - 0x7f33d116, 0x7f331da6, - 0x7f3269e8, 0x7f31b5db, 0x7f31017f, 0x7f304cd6, 0x7f2f97dd, 0x7f2ee296, - 0x7f2e2d01, 0x7f2d771e, - 0x7f2cc0eb, 0x7f2c0a6b, 0x7f2b539c, 0x7f2a9c7e, 0x7f29e512, 0x7f292d58, - 0x7f28754f, 0x7f27bcf8, - 0x7f270452, 0x7f264b5e, 0x7f25921c, 0x7f24d88b, 0x7f241eab, 0x7f23647e, - 0x7f22aa01, 0x7f21ef37, - 0x7f21341e, 0x7f2078b6, 0x7f1fbd00, 0x7f1f00fc, 0x7f1e44a9, 0x7f1d8808, - 0x7f1ccb18, 0x7f1c0dda, - 0x7f1b504e, 0x7f1a9273, 0x7f19d44a, 0x7f1915d2, 0x7f18570c, 0x7f1797f8, - 0x7f16d895, 0x7f1618e4, - 0x7f1558e4, 0x7f149896, 0x7f13d7fa, 0x7f13170f, 0x7f1255d6, 0x7f11944f, - 0x7f10d279, 0x7f101054, - 0x7f0f4de2, 0x7f0e8b21, 0x7f0dc811, 0x7f0d04b3, 0x7f0c4107, 0x7f0b7d0d, - 0x7f0ab8c4, 0x7f09f42d, - 0x7f092f47, 0x7f086a13, 0x7f07a491, 0x7f06dec0, 0x7f0618a1, 0x7f055233, - 0x7f048b78, 0x7f03c46d, - 0x7f02fd15, 0x7f02356e, 0x7f016d79, 0x7f00a535, 0x7effdca4, 0x7eff13c3, - 0x7efe4a95, 0x7efd8118, - 0x7efcb74d, 0x7efbed33, 0x7efb22cb, 0x7efa5815, 0x7ef98d11, 0x7ef8c1be, - 0x7ef7f61d, 0x7ef72a2d, - 0x7ef65def, 0x7ef59163, 0x7ef4c489, 0x7ef3f760, 0x7ef329e9, 0x7ef25c24, - 0x7ef18e10, 0x7ef0bfae, - 0x7eeff0fe, 0x7eef21ff, 0x7eee52b2, 0x7eed8317, 0x7eecb32d, 0x7eebe2f6, - 0x7eeb1270, 0x7eea419b, - 0x7ee97079, 0x7ee89f08, 0x7ee7cd49, 0x7ee6fb3b, 0x7ee628df, 0x7ee55635, - 0x7ee4833d, 0x7ee3aff6, - 0x7ee2dc61, 0x7ee2087e, 0x7ee1344d, 0x7ee05fcd, 0x7edf8aff, 0x7edeb5e3, - 0x7edde079, 0x7edd0ac0, - 0x7edc34b9, 0x7edb5e64, 0x7eda87c0, 0x7ed9b0ce, 0x7ed8d98e, 0x7ed80200, - 0x7ed72a24, 0x7ed651f9, - 0x7ed57980, 0x7ed4a0b9, 0x7ed3c7a3, 0x7ed2ee40, 0x7ed2148e, 0x7ed13a8e, - 0x7ed0603f, 0x7ecf85a3, - 0x7eceaab8, 0x7ecdcf7f, 0x7eccf3f8, 0x7ecc1822, 0x7ecb3bff, 0x7eca5f8d, - 0x7ec982cd, 0x7ec8a5bf, - 0x7ec7c862, 0x7ec6eab7, 0x7ec60cbe, 0x7ec52e77, 0x7ec44fe2, 0x7ec370fe, - 0x7ec291cd, 0x7ec1b24d, - 0x7ec0d27f, 0x7ebff263, 0x7ebf11f8, 0x7ebe313f, 0x7ebd5039, 0x7ebc6ee4, - 0x7ebb8d40, 0x7ebaab4f, - 0x7eb9c910, 0x7eb8e682, 0x7eb803a6, 0x7eb7207c, 0x7eb63d04, 0x7eb5593d, - 0x7eb47529, 0x7eb390c6, - 0x7eb2ac15, 0x7eb1c716, 0x7eb0e1c9, 0x7eaffc2e, 0x7eaf1645, 0x7eae300d, - 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0x70d803f, 0x7073a2f, 0x700f41b, 0x6faae03, 0x6f467e7, 0x6ee21c6, 0x6e7dba1, - 0x6e19578, - 0x6db4f4a, 0x6d50919, 0x6cec2e3, 0x6c87ca9, 0x6c2366a, 0x6bbf028, 0x6b5a9e1, - 0x6af6396, - 0x6a91d47, 0x6a2d6f4, 0x69c909d, 0x6964a42, 0x69003e3, 0x689bd80, 0x6837718, - 0x67d30ad, - 0x676ea3d, 0x670a3ca, 0x66a5d53, 0x66416d8, 0x65dd058, 0x65789d5, 0x651434e, - 0x64afcc3, - 0x644b634, 0x63e6fa2, 0x638290b, 0x631e271, 0x62b9bd3, 0x6255531, 0x61f0e8b, - 0x618c7e1, - 0x6128134, 0x60c3a83, 0x605f3ce, 0x5ffad15, 0x5f96659, 0x5f31f99, 0x5ecd8d6, - 0x5e6920e, - 0x5e04b43, 0x5da0475, 0x5d3bda3, 0x5cd76cd, 0x5c72ff4, 0x5c0e917, 0x5baa237, - 0x5b45b53, - 0x5ae146b, 0x5a7cd80, 0x5a18692, 0x59b3fa0, 0x594f8aa, 0x58eb1b2, 0x5886ab5, - 0x58223b6, - 0x57bdcb3, 0x57595ac, 0x56f4ea2, 0x5690795, 0x562c085, 0x55c7971, 0x556325a, - 0x54feb3f, - 0x549a422, 0x5435d01, 0x53d15dd, 0x536ceb5, 0x530878a, 0x52a405d, 0x523f92c, - 0x51db1f7, - 0x5176ac0, 0x5112385, 0x50adc48, 0x5049507, 0x4fe4dc3, 0x4f8067c, 0x4f1bf32, - 0x4eb77e5, - 0x4e53095, 0x4dee942, 0x4d8a1ec, 0x4d25a93, 0x4cc1337, 0x4c5cbd8, 0x4bf8476, - 0x4b93d11, - 0x4b2f5a9, 0x4acae3e, 0x4a666d1, 0x4a01f60, 0x499d7ed, 0x4939077, 0x48d48fe, - 0x4870182, - 0x480ba04, 0x47a7282, 0x4742afe, 0x46de377, 0x4679bee, 0x4615461, 0x45b0cd2, - 0x454c541, - 0x44e7dac, 0x4483615, 0x441ee7c, 0x43ba6df, 0x4355f40, 0x42f179f, 0x428cffb, - 0x4228854, - 0x41c40ab, 0x415f8ff, 0x40fb151, 0x40969a0, 0x40321ed, 0x3fcda37, 0x3f6927f, - 0x3f04ac4, - 0x3ea0307, 0x3e3bb48, 0x3dd7386, 0x3d72bc2, 0x3d0e3fb, 0x3ca9c32, 0x3c45467, - 0x3be0c99, - 0x3b7c4c9, 0x3b17cf7, 0x3ab3523, 0x3a4ed4c, 0x39ea573, 0x3985d97, 0x39215ba, - 0x38bcdda, - 0x38585f8, 0x37f3e14, 0x378f62e, 0x372ae46, 0x36c665b, 0x3661e6f, 0x35fd680, - 0x3598e8f, - 0x353469c, 0x34cfea8, 0x346b6b1, 0x3406eb8, 0x33a26bd, 0x333dec0, 0x32d96c1, - 0x3274ec0, - 0x32106bd, 0x31abeb9, 0x31476b2, 0x30e2ea9, 0x307e69f, 0x3019e93, 0x2fb5684, - 0x2f50e74, - 0x2eec663, 0x2e87e4f, 0x2e2363a, 0x2dbee22, 0x2d5a609, 0x2cf5def, 0x2c915d2, - 0x2c2cdb4, - 0x2bc8594, 0x2b63d73, 0x2aff54f, 0x2a9ad2a, 0x2a36504, 0x29d1cdc, 0x296d4b2, - 0x2908c87, - 0x28a445a, 0x283fc2b, 0x27db3fb, 0x2776bc9, 0x2712396, 0x26adb62, 0x264932b, - 0x25e4af4, - 0x25802bb, 0x251ba80, 0x24b7244, 0x2452a07, 0x23ee1c8, 0x2389988, 0x2325147, - 0x22c0904, - 0x225c0bf, 0x21f787a, 0x2193033, 0x212e7eb, 0x20c9fa1, 0x2065757, 0x2000f0b, - 0x1f9c6be, - 0x1f37e6f, 0x1ed3620, 0x1e6edcf, 0x1e0a57d, 0x1da5d2a, 0x1d414d6, 0x1cdcc80, - 0x1c7842a, - 0x1c13bd2, 0x1baf37a, 0x1b4ab20, 0x1ae62c5, 0x1a81a69, 0x1a1d20c, 0x19b89ae, - 0x1954150, - 0x18ef8f0, 0x188b08f, 0x182682d, 0x17c1fcb, 0x175d767, 0x16f8f03, 0x169469d, - 0x162fe37, - 0x15cb5d0, 0x1566d68, 0x15024ff, 0x149dc96, 0x143942b, 0x13d4bc0, 0x1370354, - 0x130bae7, - 0x12a727a, 0x1242a0c, 0x11de19d, 0x117992e, 0x11150be, 0x10b084d, 0x104bfdb, - 0xfe7769, - 0xf82ef6, 0xf1e683, 0xeb9e0f, 0xe5559b, 0xdf0d26, 0xd8c4b0, 0xd27c3a, - 0xcc33c3, - 0xc5eb4c, 0xbfa2d5, 0xb95a5d, 0xb311e4, 0xacc96b, 0xa680f2, 0xa03878, - 0x99effe, - 0x93a784, 0x8d5f09, 0x87168e, 0x80ce12, 0x7a8597, 0x743d1a, 0x6df49e, - 0x67ac21, - 0x6163a5, 0x5b1b27, 0x54d2aa, 0x4e8a2c, 0x4841af, 0x41f931, 0x3bb0b3, - 0x356835, - 0x2f1fb6, 0x28d738, 0x228eb9, 0x1c463b, 0x15fdbc, 0xfb53d, 0x96cbe, 0x3243f, - -}; - -/** - * @brief Initialization function for the Q31 DCT4/IDCT4. - * @param[in,out] *S points to an instance of Q31 DCT4/IDCT4 structure. - * @param[in] *S_RFFT points to an instance of Q31 RFFT/RIFFT structure - * @param[in] *S_CFFT points to an instance of Q31 CFFT/CIFFT structure - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length. - * \par Normalizing factor: - * The normalizing factor is sqrt(2/N), which depends on the size of transform N. - * Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes: - * \image html dct4NormalizingQ31Table.gif - */ - -arm_status arm_dct4_init_q31( - arm_dct4_instance_q31 * S, - arm_rfft_instance_q31 * S_RFFT, - arm_cfft_radix4_instance_q31 * S_CFFT, - uint16_t N, - uint16_t Nby2, - q31_t normalize) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initializing the pointer array with the weight table base addresses of different lengths */ - q31_t *twiddlePtr[4] = { (q31_t *) WeightsQ31_128, (q31_t *) WeightsQ31_512, - (q31_t *) WeightsQ31_2048, (q31_t *) WeightsQ31_8192 - }; - - /* Initializing the pointer array with the cos factor table base addresses of different lengths */ - q31_t *pCosFactor[4] = - { (q31_t *) cos_factorsQ31_128, (q31_t *) cos_factorsQ31_512, - (q31_t *) cos_factorsQ31_2048, (q31_t *) cos_factorsQ31_8192 - }; - - /* Initialize the DCT4 length */ - S->N = N; - - /* Initialize the half of DCT4 length */ - S->Nby2 = Nby2; - - /* Initialize the DCT4 Normalizing factor */ - S->normalize = normalize; - - /* Initialize Real FFT Instance */ - S->pRfft = S_RFFT; - - /* Initialize Complex FFT Instance */ - S->pCfft = S_CFFT; - - switch (N) - { - /* Initialize the table modifier values */ - case 8192u: - S->pTwiddle = twiddlePtr[3]; - S->pCosFactor = pCosFactor[3]; - break; - case 2048u: - S->pTwiddle = twiddlePtr[2]; - S->pCosFactor = pCosFactor[2]; - break; - case 512u: - S->pTwiddle = twiddlePtr[1]; - S->pCosFactor = pCosFactor[1]; - break; - case 128u: - S->pTwiddle = twiddlePtr[0]; - S->pCosFactor = pCosFactor[0]; - break; - default: - status = ARM_MATH_ARGUMENT_ERROR; - } - - /* Initialize the RFFT/RIFFT Function */ - arm_rfft_init_q31(S->pRfft, S->pCfft, S->N, 0, 1); - - /* return the status of DCT4 Init function */ - return (status); -} - -/** - * @} end of DCT4_IDCT4 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c deleted file mode 100644 index ac3f691ecd..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c +++ /dev/null @@ -1,386 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dct4_q15.c -* -* Description: Processing function of DCT4 & IDCT4 Q15. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @addtogroup DCT4_IDCT4 - * @{ - */ - -/** - * @brief Processing function for the Q15 DCT4/IDCT4. - * @param[in] *S points to an instance of the Q15 DCT4 structure. - * @param[in] *pState points to state buffer. - * @param[in,out] *pInlineBuffer points to the in-place input and output buffer. - * @return none. - * - * \par Input an output formats: - * Internally inputs are downscaled in the RFFT process function to avoid overflows. - * Number of bits downscaled, depends on the size of the transform. - * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below: - * - * \image html dct4FormatsQ15Table.gif - */ - -void arm_dct4_q15( - const arm_dct4_instance_q15 * S, - q15_t * pState, - q15_t * pInlineBuffer) -{ - uint32_t i; /* Loop counter */ - q15_t *weights = S->pTwiddle; /* Pointer to the Weights table */ - q15_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */ - q15_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */ - q15_t in; /* Temporary variable */ - - - /* DCT4 computation involves DCT2 (which is calculated using RFFT) - * along with some pre-processing and post-processing. - * Computational procedure is explained as follows: - * (a) Pre-processing involves multiplying input with cos factor, - * r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n)) - * where, - * r(n) -- output of preprocessing - * u(n) -- input to preprocessing(actual Source buffer) - * (b) Calculation of DCT2 using FFT is divided into three steps: - * Step1: Re-ordering of even and odd elements of input. - * Step2: Calculating FFT of the re-ordered input. - * Step3: Taking the real part of the product of FFT output and weights. - * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation: - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * where, - * Y4 -- DCT4 output, Y2 -- DCT2 output - * (d) Multiplying the output with the normalizing factor sqrt(2/N). - */ - - /*-------- Pre-processing ------------*/ - /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */ - arm_mult_q15(pInlineBuffer, cosFact, pInlineBuffer, S->N); - arm_shift_q15(pInlineBuffer, 1, pInlineBuffer, S->N); - - /* ---------------------------------------------------------------- - * Step1: Re-ordering of even and odd elements as - * pState[i] = pInlineBuffer[2*i] and - * pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2 - ---------------------------------------------------------------------*/ - - /* pS1 initialized to pState */ - pS1 = pState; - - /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */ - pS2 = pState + (S->N - 1u); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */ - i = (uint32_t) S->Nby2 >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = (uint32_t) S->N >> 2u; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. - * Compute 4 outputs at a time */ - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_q15(S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N); - - /* The output of complex multiplication is in 3.13 format. - * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */ - arm_shift_q15(pState, 2, pState, S->N * 2); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */ - i = ((uint32_t) S->N - 1u) >> 2u; - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ >> 1u; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - i = ((uint32_t) S->N - 1u) % 0x4u; - - while(i > 0u) - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - /* Decrement the loop counter */ - i--; - } - - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = (uint32_t) S->N >> 2u; - - /* pbuff initialized to the pInlineBuffer(now contains the output values) */ - pbuff = pInlineBuffer; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. Compute 4 outputs at a time */ - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); - - in = *pbuff; - *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); - - in = *pbuff; - *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); - - in = *pbuff; - *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initializing the loop counter to N/2 */ - i = (uint32_t) S->Nby2; - - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter */ - i = (uint32_t) S->N; - - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_q15(S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N); - - /* The output of complex multiplication is in 3.13 format. - * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */ - arm_shift_q15(pState, 2, pState, S->N * 2); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* Initializing the loop counter */ - i = ((uint32_t) S->N - 1u); - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ >> 1u; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - do - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing the loop counter */ - i = (uint32_t) S->N; - - /* pbuff initialized to the pInlineBuffer(now contains the output values) */ - pbuff = pInlineBuffer; - - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of DCT4_IDCT4 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c deleted file mode 100644 index a8c3678779..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c +++ /dev/null @@ -1,387 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dct4_q31.c -* -* Description: Processing function of DCT4 & IDCT4 Q31. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @addtogroup DCT4_IDCT4 - * @{ - */ - -/** - * @brief Processing function for the Q31 DCT4/IDCT4. - * @param[in] *S points to an instance of the Q31 DCT4 structure. - * @param[in] *pState points to state buffer. - * @param[in,out] *pInlineBuffer points to the in-place input and output buffer. - * @return none. - * \par Input an output formats: - * Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process, - * as the conversion from DCT2 to DCT4 involves one subtraction. - * Internally inputs are downscaled in the RFFT process function to avoid overflows. - * Number of bits downscaled, depends on the size of the transform. - * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below: - * - * \image html dct4FormatsQ31Table.gif - */ - -void arm_dct4_q31( - const arm_dct4_instance_q31 * S, - q31_t * pState, - q31_t * pInlineBuffer) -{ - uint16_t i; /* Loop counter */ - q31_t *weights = S->pTwiddle; /* Pointer to the Weights table */ - q31_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */ - q31_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */ - q31_t in; /* Temporary variable */ - - - /* DCT4 computation involves DCT2 (which is calculated using RFFT) - * along with some pre-processing and post-processing. - * Computational procedure is explained as follows: - * (a) Pre-processing involves multiplying input with cos factor, - * r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n)) - * where, - * r(n) -- output of preprocessing - * u(n) -- input to preprocessing(actual Source buffer) - * (b) Calculation of DCT2 using FFT is divided into three steps: - * Step1: Re-ordering of even and odd elements of input. - * Step2: Calculating FFT of the re-ordered input. - * Step3: Taking the real part of the product of FFT output and weights. - * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation: - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * where, - * Y4 -- DCT4 output, Y2 -- DCT2 output - * (d) Multiplying the output with the normalizing factor sqrt(2/N). - */ - - /*-------- Pre-processing ------------*/ - /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */ - arm_mult_q31(pInlineBuffer, cosFact, pInlineBuffer, S->N); - arm_shift_q31(pInlineBuffer, 1, pInlineBuffer, S->N); - - /* ---------------------------------------------------------------- - * Step1: Re-ordering of even and odd elements as - * pState[i] = pInlineBuffer[2*i] and - * pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2 - ---------------------------------------------------------------------*/ - - /* pS1 initialized to pState */ - pS1 = pState; - - /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */ - pS2 = pState + (S->N - 1u); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */ - i = S->Nby2 >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = S->N >> 2u; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. - * Compute 4 outputs at a time */ - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_q31(S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N); - - /* The output of complex multiplication is in 3.29 format. - * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */ - arm_shift_q31(pState, 2, pState, S->N * 2); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */ - i = (S->N - 1u) >> 2u; - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ >> 1u; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - i = (S->N - 1u) % 0x4u; - - while(i > 0u) - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - /* Decrement the loop counter */ - i--; - } - - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = S->N >> 2u; - - /* pbuff initialized to the pInlineBuffer(now contains the output values) */ - pbuff = pInlineBuffer; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. Compute 4 outputs at a time */ - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); - - in = *pbuff; - *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); - - in = *pbuff; - *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); - - in = *pbuff; - *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initializing the loop counter to N/2 */ - i = S->Nby2; - - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter */ - i = S->N; - - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_q31(S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N); - - /* The output of complex multiplication is in 3.29 format. - * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */ - arm_shift_q31(pState, 2, pState, S->N * 2); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ >> 1u; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - /* Initializing the loop counter */ - i = (S->N - 1u); - - while(i > 0u) - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - /* Decrement the loop counter */ - i--; - } - - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing the loop counter */ - i = S->N; - - /* pbuff initialized to the pInlineBuffer(now contains the output values) */ - pbuff = pInlineBuffer; - - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); - - /* Decrement the loop counter */ - i--; - } while(i > 0u); - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of DCT4_IDCT4 group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c deleted file mode 100644 index a3a2d23aa5..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c +++ /dev/null @@ -1,382 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_rfft_f32.c -* -* Description: RFFT & RIFFT Floating point process function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @defgroup RFFT_RIFFT Real FFT Functions - * - * \par - * Complex FFT/IFFT typically assumes complex input and output. However many applications use real valued data in time domain. - * Real FFT/IFFT efficiently process real valued sequences with the advantage of requirement of low memory and with less complexity. - * - * \par - * This set of functions implements Real Fast Fourier Transforms(RFFT) and Real Inverse Fast Fourier Transform(RIFFT) - * for Q15, Q31, and floating-point data types. - * - * - * \par Algorithm: - * - * Real Fast Fourier Transform: - * \par - * Real FFT of N-point is calculated using CFFT of N/2-point and Split RFFT process as shown below figure. - * \par - * \image html RFFT.gif "Real Fast Fourier Transform" - * \par - * The RFFT functions operate on blocks of input and output data and each call to the function processes - * fftLenR samples through the transform. pSrc points to input array containing fftLenR values. - * pDst points to output array containing 2*fftLenR values. \n - * Input for real FFT is in the order of - *
{real[0], real[1], real[2], real[3], ..}
- * Output for real FFT is complex and are in the order of - *
{real(0), imag(0), real(1), imag(1), ...}
- * - * Real Inverse Fast Fourier Transform: - * \par - * Real IFFT of N-point is calculated using Split RIFFT process and CFFT of N/2-point as shown below figure. - * \par - * \image html RIFFT.gif "Real Inverse Fast Fourier Transform" - * \par - * The RIFFT functions operate on blocks of input and output data and each call to the function processes - * 2*fftLenR samples through the transform. pSrc points to input array containing 2*fftLenR values. - * pDst points to output array containing fftLenR values. \n - * Input for real IFFT is complex and are in the order of - *
{real(0), imag(0), real(1), imag(1), ...}
- * Output for real IFFT is real and in the order of - *
{real[0], real[1], real[2], real[3], ..}
- * - * \par Lengths supported by the transform: - * \par - * Real FFT/IFFT supports the lengths [128, 512, 2048], as it internally uses CFFT/CIFFT. - * - * \par Instance Structure - * A separate instance structure must be defined for each Instance but the twiddle factors can be reused. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Sets the values of the internal structure fields. - * - Initializes twiddle factor tables. - * - Initializes CFFT data structure fields. - * \par - * Use of the initialization function is optional. - * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - * To place an instance structure into a const data section, the instance structure must be manually initialized. - * Manually initialize the instance structure as follows: - *
    
- *arm_rfft_instance_f32 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- *arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- *arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- * 
- * where fftLenReal length of RFFT/RIFFT; fftLenBy2 length of CFFT/CIFFT. - * ifftFlagR Flag for selection of RFFT or RIFFT(Set ifftFlagR to calculate RIFFT otherwise calculates RFFT); - * bitReverseFlagR Flag for selection of output order(Set bitReverseFlagR to output in normal order otherwise output in bit reversed order); - * twidCoefRModifier modifier for twiddle factor table which supports 128, 512, 2048 RFFT lengths with same table; - * pTwiddleARealpoints to A array of twiddle coefficients; pTwiddleBRealpoints to B array of twiddle coefficients; - * pCfft points to the CFFT Instance structure. The CFFT structure also needs to be initialized, refer to arm_cfft_radix4_f32() for details regarding - * static initialization of cfft structure. - * - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the RFFT/RIFFT function. - * Refer to the function specific documentation below for usage guidelines. - */ - -/*-------------------------------------------------------------------- - * Internal functions prototypes - *--------------------------------------------------------------------*/ - -void arm_split_rfft_f32( - float32_t * pSrc, - uint32_t fftLen, - float32_t * pATable, - float32_t * pBTable, - float32_t * pDst, - uint32_t modifier); -void arm_split_rifft_f32( - float32_t * pSrc, - uint32_t fftLen, - float32_t * pATable, - float32_t * pBTable, - float32_t * pDst, - uint32_t modifier); - -/** - * @addtogroup RFFT_RIFFT - * @{ - */ - -/** - * @brief Processing function for the floating-point RFFT/RIFFT. - * @param[in] *S points to an instance of the floating-point RFFT/RIFFT structure. - * @param[in] *pSrc points to the input buffer. - * @param[out] *pDst points to the output buffer. - * @return none. - */ - -void arm_rfft_f32( - const arm_rfft_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst) -{ - const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft; - - - /* Calculation of Real IFFT of input */ - if(S->ifftFlagR == 1u) - { - /* Real IFFT core process */ - arm_split_rifft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal, - S->pTwiddleBReal, pDst, S->twidCoefRModifier); - - - /* Complex radix-4 IFFT process */ - arm_radix4_butterfly_inverse_f32(pDst, S_CFFT->fftLen, - S_CFFT->pTwiddle, - S_CFFT->twidCoefModifier, - S_CFFT->onebyfftLen); - - /* Bit reversal process */ - if(S->bitReverseFlagR == 1u) - { - arm_bitreversal_f32(pDst, S_CFFT->fftLen, - S_CFFT->bitRevFactor, S_CFFT->pBitRevTable); - } - } - else - { - - /* Calculation of RFFT of input */ - - /* Complex radix-4 FFT process */ - arm_radix4_butterfly_f32(pSrc, S_CFFT->fftLen, - S_CFFT->pTwiddle, S_CFFT->twidCoefModifier); - - /* Bit reversal process */ - if(S->bitReverseFlagR == 1u) - { - arm_bitreversal_f32(pSrc, S_CFFT->fftLen, - S_CFFT->bitRevFactor, S_CFFT->pBitRevTable); - } - - - /* Real FFT core process */ - arm_split_rfft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal, - S->pTwiddleBReal, pDst, S->twidCoefRModifier); - } - -} - -/** - * @} end of RFFT_RIFFT group - */ - -/** - * @brief Core Real FFT process - * @param[in] *pSrc points to the input buffer. - * @param[in] fftLen length of FFT. - * @param[in] *pATable points to the twiddle Coef A buffer. - * @param[in] *pBTable points to the twiddle Coef B buffer. - * @param[out] *pDst points to the output buffer. - * @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - */ - -void arm_split_rfft_f32( - float32_t * pSrc, - uint32_t fftLen, - float32_t * pATable, - float32_t * pBTable, - float32_t * pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - float32_t outR, outI; /* Temporary variables for output */ - float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - float32_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */ - float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4u * fftLen) - 1u]; /* temp pointers for output buffer */ - float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2u * fftLen) - 1u]; /* temp pointers for input buffer */ - - /* Init coefficient pointers */ - pCoefA = &pATable[modifier * 2u]; - pCoefB = &pBTable[modifier * 2u]; - - i = fftLen - 1u; - - while(i > 0u) - { - /* - outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] - + pSrc[2 * n - 2 * i] * pBTable[2 * i] + - pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - */ - - /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] + - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */ - - /* read pATable[2 * i] */ - CoefA1 = *pCoefA++; - /* pATable[2 * i + 1] */ - CoefA2 = *pCoefA; - - /* pSrc[2 * i] * pATable[2 * i] */ - outR = *pSrc1 * CoefA1; - /* pSrc[2 * i] * CoefA2 */ - outI = *pSrc1++ * CoefA2; - - /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */ - outR -= (*pSrc1 + *pSrc2) * CoefA2; - /* pSrc[2 * i + 1] * CoefA1 */ - outI += *pSrc1++ * CoefA1; - - CoefB1 = *pCoefB; - - /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */ - outI -= *pSrc2-- * CoefB1; - /* pSrc[2 * fftLen - 2 * i] * CoefA2 */ - outI -= *pSrc2 * CoefA2; - - /* pSrc[2 * fftLen - 2 * i] * CoefB1 */ - outR += *pSrc2-- * CoefB1; - - /* write output */ - *pDst1++ = outR; - *pDst1++ = outI; - - /* write complex conjugate output */ - *pDst2-- = -outI; - *pDst2-- = outR; - - /* update coefficient pointer */ - pCoefB = pCoefB + (modifier * 2u); - pCoefA = pCoefA + ((modifier * 2u) - 1u); - - i--; - - } - - pDst[2u * fftLen] = pSrc[0] - pSrc[1]; - pDst[(2u * fftLen) + 1u] = 0.0f; - - pDst[0] = pSrc[0] + pSrc[1]; - pDst[1] = 0.0f; - -} - - -/** - * @brief Core Real IFFT process - * @param[in] *pSrc points to the input buffer. - * @param[in] fftLen length of FFT. - * @param[in] *pATable points to the twiddle Coef A buffer. - * @param[in] *pBTable points to the twiddle Coef B buffer. - * @param[out] *pDst points to the output buffer. - * @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - */ - -void arm_split_rifft_f32( - float32_t * pSrc, - uint32_t fftLen, - float32_t * pATable, - float32_t * pBTable, - float32_t * pDst, - uint32_t modifier) -{ - float32_t outR, outI; /* Temporary variables for output */ - float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - float32_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */ - float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2u * fftLen) + 1u]; - - pCoefA = &pATable[0]; - pCoefB = &pBTable[0]; - - while(fftLen > 0u) - { - /* - outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + - pIn[2 * n - 2 * i] * pBTable[2 * i] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - - outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] - - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); - - */ - - CoefA1 = *pCoefA++; - CoefA2 = *pCoefA; - - /* outR = (pSrc[2 * i] * CoefA1 */ - outR = *pSrc1 * CoefA1; - - /* - pSrc[2 * i] * CoefA2 */ - outI = -(*pSrc1++) * CoefA2; - - /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */ - outR += (*pSrc1 + *pSrc2) * CoefA2; - - /* pSrc[2 * i + 1] * CoefA1 */ - outI += (*pSrc1++) * CoefA1; - - CoefB1 = *pCoefB; - - /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */ - outI -= *pSrc2-- * CoefB1; - - /* pSrc[2 * fftLen - 2 * i] * CoefB1 */ - outR += *pSrc2 * CoefB1; - - /* pSrc[2 * fftLen - 2 * i] * CoefA2 */ - outI += *pSrc2-- * CoefA2; - - /* write output */ - *pDst++ = outR; - *pDst++ = outI; - - /* update coefficient pointer */ - pCoefB = pCoefB + (modifier * 2u); - pCoefA = pCoefA + ((modifier * 2u) - 1u); - - /* Decrement loop count */ - fftLen--; - } - -} diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c deleted file mode 100644 index 0133ae511c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c +++ /dev/null @@ -1,8369 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_rfft_init_f32.c -* -* Description: RFFT & RIFFT Floating point initialisation function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup RFFT_RIFFT - * @{ - */ - -/** -* \par -* Generation of realCoefA array: -* \par -* n = 4096 -*
for (i = 0; i < n; i++)    
-*  {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
-*/ - - - -static const float32_t realCoefA[8192] = { - 0.500000000000000f, -0.500000000000000f, 0.499616503715515f, - -0.499999850988388f, - 0.499233007431030f, -0.499999403953552f, 0.498849511146545f, - -0.499998688697815f, - 0.498466014862061f, -0.499997645616531f, 0.498082518577576f, - -0.499996334314346f, - 0.497699022293091f, -0.499994695186615f, 0.497315555810928f, - -0.499992787837982f, - 0.496932059526443f, -0.499990582466125f, 0.496548563241959f, - -0.499988079071045f, - 0.496165096759796f, -0.499985307455063f, 0.495781600475311f, - -0.499982208013535f, - 0.495398133993149f, -0.499978810548782f, 0.495014637708664f, - -0.499975144863129f, - 0.494631171226501f, -0.499971181154251f, 0.494247704744339f, - -0.499966919422150f, - 0.493864238262177f, -0.499962359666824f, 0.493480771780014f, - -0.499957501888275f, - 0.493097305297852f, -0.499952346086502f, 0.492713838815689f, - -0.499946922063828f, - 0.492330402135849f, -0.499941170215607f, 0.491946935653687f, - -0.499935150146484f, - 0.491563498973846f, -0.499928832054138f, 0.491180062294006f, - -0.499922215938568f, - 0.490796625614166f, -0.499915301799774f, 0.490413218736649f, - -0.499908089637756f, - 0.490029782056808f, -0.499900579452515f, 0.489646375179291f, - -0.499892801046371f, - 0.489262968301773f, -0.499884694814682f, 0.488879561424255f, - -0.499876320362091f, - 0.488496154546738f, -0.499867647886276f, 0.488112777471542f, - -0.499858677387238f, - 0.487729400396347f, -0.499849408864975f, 0.487346023321152f, - -0.499839842319489f, - 0.486962646245956f, -0.499830007553101f, 0.486579269170761f, - -0.499819844961166f, - 0.486195921897888f, -0.499809414148331f, 0.485812574625015f, - -0.499798685312271f, - 0.485429257154465f, -0.499787658452988f, 0.485045909881592f, - -0.499776333570480f, - 0.484662592411041f, -0.499764710664749f, 0.484279274940491f, - -0.499752789735794f, - 0.483895987272263f, -0.499740600585938f, 0.483512699604034f, - -0.499728083610535f, - 0.483129411935806f, -0.499715298414230f, 0.482746154069901f, - -0.499702215194702f, - 0.482362866401672f, -0.499688833951950f, 0.481979638338089f, - -0.499675154685974f, - 0.481596380472183f, -0.499661177396774f, 0.481213152408600f, - -0.499646931886673f, - 0.480829954147339f, -0.499632388353348f, 0.480446726083755f, - -0.499617516994476f, - 0.480063527822495f, -0.499602377414703f, 0.479680359363556f, - -0.499586939811707f, - 0.479297190904617f, -0.499571204185486f, 0.478914022445679f, - -0.499555170536041f, - 0.478530883789063f, -0.499538868665695f, 0.478147745132446f, - -0.499522238969803f, - 0.477764606475830f, -0.499505341053009f, 0.477381497621536f, - -0.499488145112991f, - 0.476998418569565f, -0.499470651149750f, 0.476615339517593f, - -0.499452859163284f, - 0.476232260465622f, -0.499434769153595f, 0.475849211215973f, - -0.499416410923004f, - 0.475466161966324f, -0.499397724866867f, 0.475083142518997f, - -0.499378770589828f, - 0.474700123071671f, -0.499359518289566f, 0.474317133426666f, - -0.499339967966080f, - 0.473934143781662f, -0.499320119619370f, 0.473551183938980f, - -0.499299973249435f, - 0.473168224096298f, -0.499279528856277f, 0.472785294055939f, - -0.499258816242218f, - 0.472402364015579f, -0.499237775802612f, 0.472019463777542f, - -0.499216467142105f, - 0.471636593341827f, -0.499194860458374f, 0.471253722906113f, - -0.499172955751419f, - 0.470870882272720f, -0.499150782823563f, 0.470488041639328f, - -0.499128282070160f, - 0.470105201005936f, -0.499105513095856f, 0.469722419977188f, - -0.499082416296005f, - 0.469339638948441f, -0.499059051275253f, 0.468956857919693f, - -0.499035388231277f, - 0.468574106693268f, -0.499011427164078f, 0.468191385269165f, - -0.498987197875977f, - 0.467808693647385f, -0.498962640762329f, 0.467426002025604f, - -0.498937815427780f, - 0.467043310403824f, -0.498912662267685f, 0.466660678386688f, - -0.498887240886688f, - 0.466278046369553f, -0.498861521482468f, 0.465895414352417f, - -0.498835533857346f, - 0.465512841939926f, -0.498809218406677f, 0.465130269527435f, - -0.498782604932785f, - 0.464747726917267f, -0.498755723237991f, 0.464365184307098f, - -0.498728543519974f, - 0.463982671499252f, -0.498701065778732f, 0.463600188493729f, - -0.498673290014267f, - 0.463217705488205f, -0.498645216226578f, 0.462835282087326f, - -0.498616874217987f, - 0.462452858686447f, -0.498588204383850f, 0.462070435285568f, - -0.498559266328812f, - 0.461688071489334f, -0.498530030250549f, 0.461305707693100f, - -0.498500496149063f, - 0.460923373699188f, -0.498470664024353f, 0.460541069507599f, - -0.498440563678741f, - 0.460158795118332f, -0.498410135507584f, 0.459776520729065f, - -0.498379439115524f, - 0.459394276142120f, -0.498348444700241f, 0.459012061357498f, - -0.498317152261734f, - 0.458629876375198f, -0.498285561800003f, 0.458247691392899f, - -0.498253703117371f, - 0.457865566015244f, -0.498221516609192f, 0.457483440637589f, - -0.498189061880112f, - 0.457101345062256f, -0.498156309127808f, 0.456719279289246f, - -0.498123258352280f, - 0.456337243318558f, -0.498089909553528f, 0.455955207347870f, - -0.498056292533875f, - 0.455573230981827f, -0.498022347688675f, 0.455191254615784f, - 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0.499946922063828f, - 0.493097305297852f, 0.499952346086502f, 0.493480771780014f, - 0.499957501888275f, - 0.493864238262177f, 0.499962359666824f, 0.494247704744339f, - 0.499966919422150f, - 0.494631171226501f, 0.499971181154251f, 0.495014637708664f, - 0.499975144863129f, - 0.495398133993149f, 0.499978810548782f, 0.495781600475311f, - 0.499982208013535f, - 0.496165096759796f, 0.499985307455063f, 0.496548563241959f, - 0.499988079071045f, - 0.496932059526443f, 0.499990582466125f, 0.497315555810928f, - 0.499992787837982f, - 0.497699022293091f, 0.499994695186615f, 0.498082518577576f, - 0.499996334314346f, - 0.498466014862061f, 0.499997645616531f, 0.498849511146545f, - 0.499998688697815f, - 0.499233007431030f, 0.499999403953552f, 0.499616503715515f, - 0.499999850988388f, -}; - - -/** -* \par -* Generation of realCoefB array: -* \par -* n = 4096 -*
for (i = 0; i < n; i++)    
-* {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
-* -*/ -static const float32_t realCoefB[8192] = { - 0.500000000000000f, 0.500000000000000f, 0.500383496284485f, - 0.499999850988388f, - 0.500766992568970f, 0.499999403953552f, 0.501150488853455f, - 0.499998688697815f, - 0.501533985137939f, 0.499997645616531f, 0.501917481422424f, - 0.499996334314346f, - 0.502300977706909f, 0.499994695186615f, 0.502684473991394f, - 0.499992787837982f, - 0.503067970275879f, 0.499990582466125f, 0.503451406955719f, - 0.499988079071045f, - 0.503834903240204f, 0.499985307455063f, 0.504218399524689f, - 0.499982208013535f, - 0.504601895809174f, 0.499978810548782f, 0.504985332489014f, - 0.499975144863129f, - 0.505368828773499f, 0.499971181154251f, 0.505752325057983f, - 0.499966919422150f, - 0.506135761737823f, 0.499962359666824f, 0.506519258022308f, - 0.499957501888275f, - 0.506902694702148f, 0.499952346086502f, 0.507286131381989f, - 0.499946922063828f, - 0.507669627666473f, 0.499941170215607f, 0.508053064346313f, - 0.499935150146484f, - 0.508436501026154f, 0.499928832054138f, 0.508819937705994f, - 0.499922215938568f, - 0.509203374385834f, 0.499915301799774f, 0.509586811065674f, - 0.499908089637756f, - 0.509970188140869f, 0.499900579452515f, 0.510353624820709f, - 0.499892801046371f, - 0.510737061500549f, 0.499884694814682f, 0.511120438575745f, - 0.499876320362091f, - 0.511503815650940f, 0.499867647886276f, 0.511887252330780f, - 0.499858677387238f, - 0.512270629405975f, 0.499849408864975f, 0.512654006481171f, - 0.499839842319489f, - 0.513037383556366f, 0.499830007553101f, 0.513420701026917f, - 0.499819844961166f, - 0.513804078102112f, 0.499809414148331f, 0.514187395572662f, - 0.499798685312271f, - 0.514570772647858f, 0.499787658452988f, 0.514954090118408f, - 0.499776333570480f, - 0.515337407588959f, 0.499764710664749f, 0.515720725059509f, - 0.499752789735794f, - 0.516103982925415f, 0.499740600585938f, 0.516487300395966f, - 0.499728083610535f, - 0.516870558261871f, 0.499715298414230f, 0.517253875732422f, - 0.499702215194702f, - 0.517637133598328f, 0.499688833951950f, 0.518020391464233f, - 0.499675154685974f, - 0.518403589725494f, 0.499661177396774f, 0.518786847591400f, - 0.499646931886673f, - 0.519170045852661f, 0.499632388353348f, 0.519553244113922f, - 0.499617516994476f, - 0.519936442375183f, 0.499602377414703f, 0.520319640636444f, - 0.499586939811707f, - 0.520702838897705f, 0.499571204185486f, 0.521085977554321f, - 0.499555170536041f, - 0.521469116210938f, 0.499538868665695f, 0.521852254867554f, - 0.499522238969803f, - 0.522235393524170f, 0.499505341053009f, 0.522618472576141f, - 0.499488145112991f, - 0.523001611232758f, 0.499470651149750f, 0.523384690284729f, - 0.499452859163284f, - 0.523767769336700f, 0.499434769153595f, 0.524150788784027f, - 0.499416410923004f, - 0.524533808231354f, 0.499397724866867f, 0.524916887283325f, - 0.499378770589828f, - 0.525299847126007f, 0.499359518289566f, 0.525682866573334f, - 0.499339967966080f, - 0.526065826416016f, 0.499320119619370f, 0.526448845863342f, - 0.499299973249435f, - 0.526831746101379f, 0.499279528856277f, 0.527214705944061f, - 0.499258816242218f, - 0.527597606182098f, 0.499237775802612f, 0.527980506420136f, - 0.499216467142105f, - 0.528363406658173f, 0.499194860458374f, 0.528746306896210f, - 0.499172955751419f, - 0.529129147529602f, 0.499150782823563f, 0.529511988162994f, - 0.499128282070160f, - 0.529894769191742f, 0.499105513095856f, 0.530277609825134f, - 0.499082416296005f, - 0.530660390853882f, 0.499059051275253f, 0.531043112277985f, - 0.499035388231277f, - 0.531425893306732f, 0.499011427164078f, 0.531808614730835f, - 0.498987197875977f, - 0.532191336154938f, 0.498962640762329f, 0.532573997974396f, - 0.498937815427780f, - 0.532956659793854f, 0.498912662267685f, 0.533339321613312f, - 0.498887240886688f, - 0.533721983432770f, 0.498861521482468f, 0.534104585647583f, - 0.498835533857346f, - 0.534487187862396f, 0.498809218406677f, 0.534869730472565f, - 0.498782604932785f, - 0.535252273082733f, 0.498755723237991f, 0.535634815692902f, - 0.498728543519974f, - 0.536017298698425f, 0.498701065778732f, 0.536399841308594f, - 0.498673290014267f, - 0.536782264709473f, 0.498645216226578f, 0.537164747714996f, - 0.498616874217987f, - 0.537547171115875f, 0.498588204383850f, 0.537929534912109f, - 0.498559266328812f, - 0.538311958312988f, 0.498530030250549f, 0.538694262504578f, - 0.498500496149063f, - 0.539076626300812f, 0.498470664024353f, 0.539458930492401f, - 0.498440563678741f, - 0.539841234683990f, 0.498410135507584f, 0.540223479270935f, - 0.498379439115524f, - 0.540605723857880f, 0.498348444700241f, 0.540987968444824f, - 0.498317152261734f, - 0.541370153427124f, 0.498285561800003f, 0.541752278804779f, - 0.498253703117371f, - 0.542134463787079f, 0.498221516609192f, 0.542516589164734f, - 0.498189061880112f, - 0.542898654937744f, 0.498156309127808f, 0.543280720710754f, - 0.498123258352280f, - 0.543662786483765f, 0.498089909553528f, 0.544044792652130f, - 0.498056292533875f, - 0.544426798820496f, 0.498022347688675f, 0.544808745384216f, - 0.497988134622574f, - 0.545190691947937f, 0.497953623533249f, 0.545572578907013f, - 0.497918814420700f, - 0.545954465866089f, 0.497883707284927f, 0.546336352825165f, - 0.497848302125931f, - 0.546718180179596f, 0.497812628746033f, 0.547099947929382f, - 0.497776657342911f, - 0.547481775283813f, 0.497740387916565f, 0.547863483428955f, - 0.497703820466995f, - 0.548245191574097f, 0.497666954994202f, 0.548626899719238f, - 0.497629791498184f, - 0.549008548259735f, 0.497592359781265f, 0.549390196800232f, - 0.497554630041122f, - 0.549771785736084f, 0.497516602277756f, 0.550153374671936f, - 0.497478276491165f, - 0.550534904003143f, 0.497439652681351f, 0.550916433334351f, - 0.497400760650635f, - 0.551297962665558f, 0.497361570596695f, 0.551679372787476f, - 0.497322082519531f, - 0.552060842514038f, 0.497282296419144f, 0.552442193031311f, - 0.497242212295532f, - 0.552823603153229f, 0.497201830148697f, 0.553204894065857f, - 0.497161179780960f, - 0.553586184978485f, 0.497120231389999f, 0.553967475891113f, - 0.497078984975815f, - 0.554348707199097f, 0.497037440538406f, 0.554729938507080f, - 0.496995598077774f, - 0.555111110210419f, 0.496953487396240f, 0.555492222309113f, - 0.496911078691483f, - 0.555873334407806f, 0.496868371963501f, 0.556254446506500f, - 0.496825367212296f, - 0.556635499000549f, 0.496782064437866f, 0.557016491889954f, - 0.496738493442535f, - 0.557397484779358f, 0.496694594621658f, 0.557778418064117f, - 0.496650427579880f, - 0.558159291744232f, 0.496605962514877f, 0.558540165424347f, - 0.496561229228973f, - 0.558921039104462f, 0.496516168117523f, 0.559301853179932f, - 0.496470838785172f, - 0.559682607650757f, 0.496425211429596f, 0.560063362121582f, - 0.496379286050797f, - 0.560444056987762f, 0.496333062648773f, 0.560824692249298f, - 0.496286571025848f, - 0.561205327510834f, 0.496239781379700f, 0.561585903167725f, - 0.496192663908005f, - 0.561966478824615f, 0.496145308017731f, 0.562346994876862f, - 0.496097624301910f, - 0.562727510929108f, 0.496049642562866f, 0.563107967376709f, - 0.496001392602921f, - 0.563488364219666f, 0.495952844619751f, 0.563868701457977f, - 0.495903998613358f, - 0.564249038696289f, 0.495854884386063f, 0.564629375934601f, - 0.495805442333221f, - 0.565009593963623f, 0.495755732059479f, 0.565389811992645f, - 0.495705723762512f, - 0.565770030021667f, 0.495655417442322f, 0.566150128841400f, - 0.495604842901230f, - 0.566530287265778f, 0.495553970336914f, 0.566910326480865f, - 0.495502769947052f, - 0.567290365695953f, 0.495451331138611f, 0.567670345306396f, - 0.495399564504623f, - 0.568050265312195f, 0.495347499847412f, 0.568430185317993f, - 0.495295166969299f, - 0.568810045719147f, 0.495242536067963f, 0.569189906120300f, - 0.495189607143402f, - 0.569569647312164f, 0.495136409997940f, 0.569949388504028f, - 0.495082914829254f, - 0.570329129695892f, 0.495029091835022f, 0.570708811283112f, - 0.494975030422211f, - 0.571088373661041f, 0.494920641183853f, 0.571467995643616f, - 0.494865983724594f, - 0.571847498416901f, 0.494810998439789f, 0.572227001190186f, - 0.494755744934082f, - 0.572606444358826f, 0.494700223207474f, 0.572985887527466f, - 0.494644373655319f, - 0.573365211486816f, 0.494588255882263f, 0.573744535446167f, - 0.494531840085983f, - 0.574123859405518f, 0.494475126266479f, 0.574503064155579f, - 0.494418144226074f, - 0.574882268905640f, 0.494360834360123f, 0.575261414051056f, - 0.494303256273270f, - 0.575640499591827f, 0.494245409965515f, 0.576019585132599f, - 0.494187235832214f, - 0.576398611068726f, 0.494128793478012f, 0.576777577400208f, - 0.494070053100586f, - 0.577156484127045f, 0.494011014699936f, 0.577535390853882f, - 0.493951678276062f, - 0.577914178371429f, 0.493892073631287f, 0.578292965888977f, - 0.493832170963287f, - 0.578671753406525f, 0.493771970272064f, 0.579050421714783f, - 0.493711471557617f, - 0.579429090023041f, 0.493650704622269f, 0.579807698726654f, - 0.493589639663696f, - 0.580186247825623f, 0.493528276681900f, 0.580564737319946f, - 0.493466645479202f, - 0.580943167209625f, 0.493404686450958f, 0.581321597099304f, - 0.493342459201813f, - 0.581699967384338f, 0.493279963731766f, 0.582078278064728f, - 0.493217140436172f, - 0.582456588745117f, 0.493154048919678f, 0.582834780216217f, - 0.493090659379959f, - 0.583212971687317f, 0.493026971817017f, 0.583591103553772f, - 0.492963016033173f, - 0.583969175815582f, 0.492898762226105f, 0.584347188472748f, - 0.492834210395813f, - 0.584725141525269f, 0.492769360542297f, 0.585103094577789f, - 0.492704242467880f, - 0.585480928421021f, 0.492638826370239f, 0.585858762264252f, - 0.492573112249374f, - 0.586236536502838f, 0.492507129907608f, 0.586614251136780f, - 0.492440819740295f, - 0.586991965770721f, 0.492374241352081f, 0.587369561195374f, - 0.492307394742966f, - 0.587747097015381f, 0.492240220308304f, 0.588124632835388f, - 0.492172777652740f, - 0.588502109050751f, 0.492105036973953f, 0.588879525661469f, - 0.492037028074265f, - 0.589256882667542f, 0.491968721151352f, 0.589634180068970f, - 0.491900116205215f, - 0.590011477470398f, 0.491831213235855f, 0.590388655662537f, - 0.491762012243271f, - 0.590765833854675f, 0.491692543029785f, 0.591142892837524f, - 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-0.499957501888275f, - 0.506135761737823f, -0.499962359666824f, 0.505752325057983f, - -0.499966919422150f, - 0.505368828773499f, -0.499971181154251f, 0.504985332489014f, - -0.499975144863129f, - 0.504601895809174f, -0.499978810548782f, 0.504218399524689f, - -0.499982208013535f, - 0.503834903240204f, -0.499985307455063f, 0.503451406955719f, - -0.499988079071045f, - 0.503067970275879f, -0.499990582466125f, 0.502684473991394f, - -0.499992787837982f, - 0.502300977706909f, -0.499994695186615f, 0.501917481422424f, - -0.499996334314346f, - 0.501533985137939f, -0.499997645616531f, 0.501150488853455f, - -0.499998688697815f, - 0.500766992568970f, -0.499999403953552f, 0.500383496284485f, - -0.499999850988388f, -}; - - - -/** -* @brief Initialization function for the floating-point RFFT/RIFFT. -* @param[in,out] *S points to an instance of the floating-point RFFT/RIFFT structure. -* @param[in,out] *S_CFFT points to an instance of the floating-point CFFT/CIFFT structure. -* @param[in] fftLenReal length of the FFT. -* @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. -* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. -* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value. -* -* \par Description: -* \par -* The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048. -* \par -* The parameter ifftFlagR controls whether a forward or inverse transform is computed. -* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. -* \par -* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. -* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. -* \par -* This function also initializes Twiddle factor table. -*/ - -arm_status arm_rfft_init_f32( - arm_rfft_instance_f32 * S, - arm_cfft_radix4_instance_f32 * S_CFFT, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag) -{ - - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialize the Real FFT length */ - S->fftLenReal = (uint16_t) fftLenReal; - - /* Initialize the Complex FFT length */ - S->fftLenBy2 = (uint16_t) fftLenReal / 2u; - - /* Initialize the Twiddle coefficientA pointer */ - S->pTwiddleAReal = (float32_t *) realCoefA; - - /* Initialize the Twiddle coefficientB pointer */ - S->pTwiddleBReal = (float32_t *) realCoefB; - - /* Initialize the Flag for selection of RFFT or RIFFT */ - S->ifftFlagR = (uint8_t) ifftFlagR; - - /* Initialize the Flag for calculation Bit reversal or not */ - S->bitReverseFlagR = (uint8_t) bitReverseFlag; - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLenReal) - { - /* Init table modifier value */ - case 8192u: - S->twidCoefRModifier = 1u; - break; - case 2048u: - S->twidCoefRModifier = 4u; - break; - case 512u: - S->twidCoefRModifier = 16u; - break; - case 128u: - S->twidCoefRModifier = 64u; - break; - default: - /* Reporting argument error if rfftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - /* Init Complex FFT Instance */ - S->pCfft = S_CFFT; - - if(S->ifftFlagR) - { - /* Initializes the CIFFT Module for fftLenreal/2 length */ - arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 1u, 0u); - } - else - { - /* Initializes the CFFT Module for fftLenreal/2 length */ - arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 0u, 0u); - } - - /* return the status of RFFT Init function */ - return (status); - -} - - /** - * @} end of RFFT_RIFFT group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c deleted file mode 100644 index 144b2d0c61..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c +++ /dev/null @@ -1,2229 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_rfft_init_q15.c -* -* Description: RFFT & RIFFT Q15 initialisation function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup RFFT_RIFFT - * @{ - */ - - - -/** -* \par -* Generation floating point real_CoefA array: -* \par -* n = 4096 -*
for (i = 0; i < n; i++)    
-*  {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
-* \par -* Convert to fixed point Q15 format -* round(pATable[i] * pow(2, 15)) -*/ - - -static const q15_t ALIGN4 realCoefAQ15[8192] = { - 0x4000, 0xc000, 0x3ff3, 0xc000, 0x3fe7, 0xc000, 0x3fda, 0xc000, - 0x3fce, 0xc000, 0x3fc1, 0xc000, 0x3fb5, 0xc000, 0x3fa8, 0xc000, - 0x3f9b, 0xc000, 0x3f8f, 0xc000, 0x3f82, 0xc000, 0x3f76, 0xc001, - 0x3f69, 0xc001, 0x3f5d, 0xc001, 0x3f50, 0xc001, 0x3f44, 0xc001, - 0x3f37, 0xc001, 0x3f2a, 0xc001, 0x3f1e, 0xc002, 0x3f11, 0xc002, - 0x3f05, 0xc002, 0x3ef8, 0xc002, 0x3eec, 0xc002, 0x3edf, 0xc003, - 0x3ed2, 0xc003, 0x3ec6, 0xc003, 0x3eb9, 0xc003, 0x3ead, 0xc004, - 0x3ea0, 0xc004, 0x3e94, 0xc004, 0x3e87, 0xc004, 0x3e7a, 0xc005, - 0x3e6e, 0xc005, 0x3e61, 0xc005, 0x3e55, 0xc006, 0x3e48, 0xc006, - 0x3e3c, 0xc006, 0x3e2f, 0xc007, 0x3e23, 0xc007, 0x3e16, 0xc007, - 0x3e09, 0xc008, 0x3dfd, 0xc008, 0x3df0, 0xc009, 0x3de4, 0xc009, - 0x3dd7, 0xc009, 0x3dcb, 0xc00a, 0x3dbe, 0xc00a, 0x3db2, 0xc00b, - 0x3da5, 0xc00b, 0x3d98, 0xc00c, 0x3d8c, 0xc00c, 0x3d7f, 0xc00d, - 0x3d73, 0xc00d, 0x3d66, 0xc00e, 0x3d5a, 0xc00e, 0x3d4d, 0xc00f, - 0x3d40, 0xc00f, 0x3d34, 0xc010, 0x3d27, 0xc010, 0x3d1b, 0xc011, - 0x3d0e, 0xc011, 0x3d02, 0xc012, 0x3cf5, 0xc013, 0x3ce9, 0xc013, - 0x3cdc, 0xc014, 0x3cd0, 0xc014, 0x3cc3, 0xc015, 0x3cb6, 0xc016, - 0x3caa, 0xc016, 0x3c9d, 0xc017, 0x3c91, 0xc018, 0x3c84, 0xc018, - 0x3c78, 0xc019, 0x3c6b, 0xc01a, 0x3c5f, 0xc01a, 0x3c52, 0xc01b, - 0x3c45, 0xc01c, 0x3c39, 0xc01d, 0x3c2c, 0xc01d, 0x3c20, 0xc01e, - 0x3c13, 0xc01f, 0x3c07, 0xc020, 0x3bfa, 0xc020, 0x3bee, 0xc021, - 0x3be1, 0xc022, 0x3bd5, 0xc023, 0x3bc8, 0xc024, 0x3bbc, 0xc024, - 0x3baf, 0xc025, 0x3ba2, 0xc026, 0x3b96, 0xc027, 0x3b89, 0xc028, - 0x3b7d, 0xc029, 0x3b70, 0xc02a, 0x3b64, 0xc02b, 0x3b57, 0xc02b, - 0x3b4b, 0xc02c, 0x3b3e, 0xc02d, 0x3b32, 0xc02e, 0x3b25, 0xc02f, - 0x3b19, 0xc030, 0x3b0c, 0xc031, 0x3b00, 0xc032, 0x3af3, 0xc033, - 0x3ae6, 0xc034, 0x3ada, 0xc035, 0x3acd, 0xc036, 0x3ac1, 0xc037, - 0x3ab4, 0xc038, 0x3aa8, 0xc039, 0x3a9b, 0xc03a, 0x3a8f, 0xc03b, - 0x3a82, 0xc03c, 0x3a76, 0xc03d, 0x3a69, 0xc03f, 0x3a5d, 0xc040, - 0x3a50, 0xc041, 0x3a44, 0xc042, 0x3a37, 0xc043, 0x3a2b, 0xc044, - 0x3a1e, 0xc045, 0x3a12, 0xc047, 0x3a05, 0xc048, 0x39f9, 0xc049, - 0x39ec, 0xc04a, 0x39e0, 0xc04b, 0x39d3, 0xc04c, 0x39c7, 0xc04e, - 0x39ba, 0xc04f, 0x39ae, 0xc050, 0x39a1, 0xc051, 0x3995, 0xc053, - 0x3988, 0xc054, 0x397c, 0xc055, 0x396f, 0xc056, 0x3963, 0xc058, - 0x3956, 0xc059, 0x394a, 0xc05a, 0x393d, 0xc05c, 0x3931, 0xc05d, - 0x3924, 0xc05e, 0x3918, 0xc060, 0x390b, 0xc061, 0x38ff, 0xc062, - 0x38f2, 0xc064, 0x38e6, 0xc065, 0x38d9, 0xc067, 0x38cd, 0xc068, - 0x38c0, 0xc069, 0x38b4, 0xc06b, 0x38a7, 0xc06c, 0x389b, 0xc06e, - 0x388e, 0xc06f, 0x3882, 0xc071, 0x3875, 0xc072, 0x3869, 0xc074, - 0x385c, 0xc075, 0x3850, 0xc077, 0x3843, 0xc078, 0x3837, 0xc07a, - 0x382a, 0xc07b, 0x381e, 0xc07d, 0x3811, 0xc07e, 0x3805, 0xc080, - 0x37f9, 0xc081, 0x37ec, 0xc083, 0x37e0, 0xc085, 0x37d3, 0xc086, - 0x37c7, 0xc088, 0x37ba, 0xc089, 0x37ae, 0xc08b, 0x37a1, 0xc08d, - 0x3795, 0xc08e, 0x3788, 0xc090, 0x377c, 0xc092, 0x376f, 0xc093, - 0x3763, 0xc095, 0x3757, 0xc097, 0x374a, 0xc098, 0x373e, 0xc09a, - 0x3731, 0xc09c, 0x3725, 0xc09e, 0x3718, 0xc09f, 0x370c, 0xc0a1, - 0x36ff, 0xc0a3, 0x36f3, 0xc0a5, 0x36e7, 0xc0a6, 0x36da, 0xc0a8, - 0x36ce, 0xc0aa, 0x36c1, 0xc0ac, 0x36b5, 0xc0ae, 0x36a8, 0xc0af, - 0x369c, 0xc0b1, 0x3690, 0xc0b3, 0x3683, 0xc0b5, 0x3677, 0xc0b7, - 0x366a, 0xc0b9, 0x365e, 0xc0bb, 0x3651, 0xc0bd, 0x3645, 0xc0be, - 0x3639, 0xc0c0, 0x362c, 0xc0c2, 0x3620, 0xc0c4, 0x3613, 0xc0c6, - 0x3607, 0xc0c8, 0x35fa, 0xc0ca, 0x35ee, 0xc0cc, 0x35e2, 0xc0ce, - 0x35d5, 0xc0d0, 0x35c9, 0xc0d2, 0x35bc, 0xc0d4, 0x35b0, 0xc0d6, - 0x35a4, 0xc0d8, 0x3597, 0xc0da, 0x358b, 0xc0dc, 0x357e, 0xc0de, - 0x3572, 0xc0e0, 0x3566, 0xc0e2, 0x3559, 0xc0e4, 0x354d, 0xc0e7, - 0x3540, 0xc0e9, 0x3534, 0xc0eb, 0x3528, 0xc0ed, 0x351b, 0xc0ef, - 0x350f, 0xc0f1, 0x3503, 0xc0f3, 0x34f6, 0xc0f6, 0x34ea, 0xc0f8, - 0x34dd, 0xc0fa, 0x34d1, 0xc0fc, 0x34c5, 0xc0fe, 0x34b8, 0xc100, - 0x34ac, 0xc103, 0x34a0, 0xc105, 0x3493, 0xc107, 0x3487, 0xc109, - 0x347b, 0xc10c, 0x346e, 0xc10e, 0x3462, 0xc110, 0x3455, 0xc113, - 0x3449, 0xc115, 0x343d, 0xc117, 0x3430, 0xc119, 0x3424, 0xc11c, - 0x3418, 0xc11e, 0x340b, 0xc120, 0x33ff, 0xc123, 0x33f3, 0xc125, - 0x33e6, 0xc128, 0x33da, 0xc12a, 0x33ce, 0xc12c, 0x33c1, 0xc12f, - 0x33b5, 0xc131, 0x33a9, 0xc134, 0x339c, 0xc136, 0x3390, 0xc138, - 0x3384, 0xc13b, 0x3377, 0xc13d, 0x336b, 0xc140, 0x335f, 0xc142, - 0x3352, 0xc145, 0x3346, 0xc147, 0x333a, 0xc14a, 0x332d, 0xc14c, - 0x3321, 0xc14f, 0x3315, 0xc151, 0x3308, 0xc154, 0x32fc, 0xc156, - 0x32f0, 0xc159, 0x32e4, 0xc15b, 0x32d7, 0xc15e, 0x32cb, 0xc161, - 0x32bf, 0xc163, 0x32b2, 0xc166, 0x32a6, 0xc168, 0x329a, 0xc16b, - 0x328e, 0xc16e, 0x3281, 0xc170, 0x3275, 0xc173, 0x3269, 0xc176, - 0x325c, 0xc178, 0x3250, 0xc17b, 0x3244, 0xc17e, 0x3238, 0xc180, - 0x322b, 0xc183, 0x321f, 0xc186, 0x3213, 0xc189, 0x3207, 0xc18b, - 0x31fa, 0xc18e, 0x31ee, 0xc191, 0x31e2, 0xc194, 0x31d5, 0xc196, - 0x31c9, 0xc199, 0x31bd, 0xc19c, 0x31b1, 0xc19f, 0x31a4, 0xc1a2, - 0x3198, 0xc1a4, 0x318c, 0xc1a7, 0x3180, 0xc1aa, 0x3174, 0xc1ad, - 0x3167, 0xc1b0, 0x315b, 0xc1b3, 0x314f, 0xc1b6, 0x3143, 0xc1b8, - 0x3136, 0xc1bb, 0x312a, 0xc1be, 0x311e, 0xc1c1, 0x3112, 0xc1c4, - 0x3105, 0xc1c7, 0x30f9, 0xc1ca, 0x30ed, 0xc1cd, 0x30e1, 0xc1d0, - 0x30d5, 0xc1d3, 0x30c8, 0xc1d6, 0x30bc, 0xc1d9, 0x30b0, 0xc1dc, - 0x30a4, 0xc1df, 0x3098, 0xc1e2, 0x308b, 0xc1e5, 0x307f, 0xc1e8, - 0x3073, 0xc1eb, 0x3067, 0xc1ee, 0x305b, 0xc1f1, 0x304e, 0xc1f4, - 0x3042, 0xc1f7, 0x3036, 0xc1fa, 0x302a, 0xc1fd, 0x301e, 0xc201, - 0x3012, 0xc204, 0x3005, 0xc207, 0x2ff9, 0xc20a, 0x2fed, 0xc20d, - 0x2fe1, 0xc210, 0x2fd5, 0xc213, 0x2fc9, 0xc217, 0x2fbc, 0xc21a, - 0x2fb0, 0xc21d, 0x2fa4, 0xc220, 0x2f98, 0xc223, 0x2f8c, 0xc227, - 0x2f80, 0xc22a, 0x2f74, 0xc22d, 0x2f67, 0xc230, 0x2f5b, 0xc234, - 0x2f4f, 0xc237, 0x2f43, 0xc23a, 0x2f37, 0xc23e, 0x2f2b, 0xc241, - 0x2f1f, 0xc244, 0x2f13, 0xc247, 0x2f06, 0xc24b, 0x2efa, 0xc24e, - 0x2eee, 0xc251, 0x2ee2, 0xc255, 0x2ed6, 0xc258, 0x2eca, 0xc25c, - 0x2ebe, 0xc25f, 0x2eb2, 0xc262, 0x2ea6, 0xc266, 0x2e99, 0xc269, - 0x2e8d, 0xc26d, 0x2e81, 0xc270, 0x2e75, 0xc273, 0x2e69, 0xc277, - 0x2e5d, 0xc27a, 0x2e51, 0xc27e, 0x2e45, 0xc281, 0x2e39, 0xc285, - 0x2e2d, 0xc288, 0x2e21, 0xc28c, 0x2e15, 0xc28f, 0x2e09, 0xc293, - 0x2dfc, 0xc296, 0x2df0, 0xc29a, 0x2de4, 0xc29d, 0x2dd8, 0xc2a1, - 0x2dcc, 0xc2a5, 0x2dc0, 0xc2a8, 0x2db4, 0xc2ac, 0x2da8, 0xc2af, - 0x2d9c, 0xc2b3, 0x2d90, 0xc2b7, 0x2d84, 0xc2ba, 0x2d78, 0xc2be, - 0x2d6c, 0xc2c1, 0x2d60, 0xc2c5, 0x2d54, 0xc2c9, 0x2d48, 0xc2cc, - 0x2d3c, 0xc2d0, 0x2d30, 0xc2d4, 0x2d24, 0xc2d8, 0x2d18, 0xc2db, - 0x2d0c, 0xc2df, 0x2d00, 0xc2e3, 0x2cf4, 0xc2e6, 0x2ce8, 0xc2ea, - 0x2cdc, 0xc2ee, 0x2cd0, 0xc2f2, 0x2cc4, 0xc2f5, 0x2cb8, 0xc2f9, - 0x2cac, 0xc2fd, 0x2ca0, 0xc301, 0x2c94, 0xc305, 0x2c88, 0xc308, - 0x2c7c, 0xc30c, 0x2c70, 0xc310, 0x2c64, 0xc314, 0x2c58, 0xc318, - 0x2c4c, 0xc31c, 0x2c40, 0xc320, 0x2c34, 0xc323, 0x2c28, 0xc327, - 0x2c1c, 0xc32b, 0x2c10, 0xc32f, 0x2c05, 0xc333, 0x2bf9, 0xc337, - 0x2bed, 0xc33b, 0x2be1, 0xc33f, 0x2bd5, 0xc343, 0x2bc9, 0xc347, - 0x2bbd, 0xc34b, 0x2bb1, 0xc34f, 0x2ba5, 0xc353, 0x2b99, 0xc357, - 0x2b8d, 0xc35b, 0x2b81, 0xc35f, 0x2b75, 0xc363, 0x2b6a, 0xc367, - 0x2b5e, 0xc36b, 0x2b52, 0xc36f, 0x2b46, 0xc373, 0x2b3a, 0xc377, - 0x2b2e, 0xc37b, 0x2b22, 0xc37f, 0x2b16, 0xc383, 0x2b0a, 0xc387, - 0x2aff, 0xc38c, 0x2af3, 0xc390, 0x2ae7, 0xc394, 0x2adb, 0xc398, - 0x2acf, 0xc39c, 0x2ac3, 0xc3a0, 0x2ab7, 0xc3a5, 0x2aac, 0xc3a9, - 0x2aa0, 0xc3ad, 0x2a94, 0xc3b1, 0x2a88, 0xc3b5, 0x2a7c, 0xc3ba, - 0x2a70, 0xc3be, 0x2a65, 0xc3c2, 0x2a59, 0xc3c6, 0x2a4d, 0xc3ca, - 0x2a41, 0xc3cf, 0x2a35, 0xc3d3, 0x2a29, 0xc3d7, 0x2a1e, 0xc3dc, - 0x2a12, 0xc3e0, 0x2a06, 0xc3e4, 0x29fa, 0xc3e9, 0x29ee, 0xc3ed, - 0x29e3, 0xc3f1, 0x29d7, 0xc3f6, 0x29cb, 0xc3fa, 0x29bf, 0xc3fe, - 0x29b4, 0xc403, 0x29a8, 0xc407, 0x299c, 0xc40b, 0x2990, 0xc410, - 0x2984, 0xc414, 0x2979, 0xc419, 0x296d, 0xc41d, 0x2961, 0xc422, - 0x2955, 0xc426, 0x294a, 0xc42a, 0x293e, 0xc42f, 0x2932, 0xc433, - 0x2926, 0xc438, 0x291b, 0xc43c, 0x290f, 0xc441, 0x2903, 0xc445, - 0x28f7, 0xc44a, 0x28ec, 0xc44e, 0x28e0, 0xc453, 0x28d4, 0xc457, - 0x28c9, 0xc45c, 0x28bd, 0xc461, 0x28b1, 0xc465, 0x28a5, 0xc46a, - 0x289a, 0xc46e, 0x288e, 0xc473, 0x2882, 0xc478, 0x2877, 0xc47c, - 0x286b, 0xc481, 0x285f, 0xc485, 0x2854, 0xc48a, 0x2848, 0xc48f, - 0x283c, 0xc493, 0x2831, 0xc498, 0x2825, 0xc49d, 0x2819, 0xc4a1, - 0x280e, 0xc4a6, 0x2802, 0xc4ab, 0x27f6, 0xc4b0, 0x27eb, 0xc4b4, - 0x27df, 0xc4b9, 0x27d3, 0xc4be, 0x27c8, 0xc4c2, 0x27bc, 0xc4c7, - 0x27b1, 0xc4cc, 0x27a5, 0xc4d1, 0x2799, 0xc4d6, 0x278e, 0xc4da, - 0x2782, 0xc4df, 0x2777, 0xc4e4, 0x276b, 0xc4e9, 0x275f, 0xc4ee, - 0x2754, 0xc4f2, 0x2748, 0xc4f7, 0x273d, 0xc4fc, 0x2731, 0xc501, - 0x2725, 0xc506, 0x271a, 0xc50b, 0x270e, 0xc510, 0x2703, 0xc515, - 0x26f7, 0xc51a, 0x26ec, 0xc51e, 0x26e0, 0xc523, 0x26d4, 0xc528, - 0x26c9, 0xc52d, 0x26bd, 0xc532, 0x26b2, 0xc537, 0x26a6, 0xc53c, - 0x269b, 0xc541, 0x268f, 0xc546, 0x2684, 0xc54b, 0x2678, 0xc550, - 0x266d, 0xc555, 0x2661, 0xc55a, 0x2656, 0xc55f, 0x264a, 0xc564, - 0x263f, 0xc569, 0x2633, 0xc56e, 0x2628, 0xc573, 0x261c, 0xc578, - 0x2611, 0xc57e, 0x2605, 0xc583, 0x25fa, 0xc588, 0x25ee, 0xc58d, - 0x25e3, 0xc592, 0x25d7, 0xc597, 0x25cc, 0xc59c, 0x25c0, 0xc5a1, - 0x25b5, 0xc5a7, 0x25a9, 0xc5ac, 0x259e, 0xc5b1, 0x2592, 0xc5b6, - 0x2587, 0xc5bb, 0x257c, 0xc5c1, 0x2570, 0xc5c6, 0x2565, 0xc5cb, - 0x2559, 0xc5d0, 0x254e, 0xc5d5, 0x2542, 0xc5db, 0x2537, 0xc5e0, - 0x252c, 0xc5e5, 0x2520, 0xc5ea, 0x2515, 0xc5f0, 0x2509, 0xc5f5, - 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0x2e2d, 0x3d78, 0x2e39, 0x3d7b, 0x2e45, 0x3d7f, 0x2e51, 0x3d82, - 0x2e5d, 0x3d86, 0x2e69, 0x3d89, 0x2e75, 0x3d8d, 0x2e81, 0x3d90, - 0x2e8d, 0x3d93, 0x2e99, 0x3d97, 0x2ea6, 0x3d9a, 0x2eb2, 0x3d9e, - 0x2ebe, 0x3da1, 0x2eca, 0x3da4, 0x2ed6, 0x3da8, 0x2ee2, 0x3dab, - 0x2eee, 0x3daf, 0x2efa, 0x3db2, 0x2f06, 0x3db5, 0x2f13, 0x3db9, - 0x2f1f, 0x3dbc, 0x2f2b, 0x3dbf, 0x2f37, 0x3dc2, 0x2f43, 0x3dc6, - 0x2f4f, 0x3dc9, 0x2f5b, 0x3dcc, 0x2f67, 0x3dd0, 0x2f74, 0x3dd3, - 0x2f80, 0x3dd6, 0x2f8c, 0x3dd9, 0x2f98, 0x3ddd, 0x2fa4, 0x3de0, - 0x2fb0, 0x3de3, 0x2fbc, 0x3de6, 0x2fc9, 0x3de9, 0x2fd5, 0x3ded, - 0x2fe1, 0x3df0, 0x2fed, 0x3df3, 0x2ff9, 0x3df6, 0x3005, 0x3df9, - 0x3012, 0x3dfc, 0x301e, 0x3dff, 0x302a, 0x3e03, 0x3036, 0x3e06, - 0x3042, 0x3e09, 0x304e, 0x3e0c, 0x305b, 0x3e0f, 0x3067, 0x3e12, - 0x3073, 0x3e15, 0x307f, 0x3e18, 0x308b, 0x3e1b, 0x3098, 0x3e1e, - 0x30a4, 0x3e21, 0x30b0, 0x3e24, 0x30bc, 0x3e27, 0x30c8, 0x3e2a, - 0x30d5, 0x3e2d, 0x30e1, 0x3e30, 0x30ed, 0x3e33, 0x30f9, 0x3e36, - 0x3105, 0x3e39, 0x3112, 0x3e3c, 0x311e, 0x3e3f, 0x312a, 0x3e42, - 0x3136, 0x3e45, 0x3143, 0x3e48, 0x314f, 0x3e4a, 0x315b, 0x3e4d, - 0x3167, 0x3e50, 0x3174, 0x3e53, 0x3180, 0x3e56, 0x318c, 0x3e59, - 0x3198, 0x3e5c, 0x31a4, 0x3e5e, 0x31b1, 0x3e61, 0x31bd, 0x3e64, - 0x31c9, 0x3e67, 0x31d5, 0x3e6a, 0x31e2, 0x3e6c, 0x31ee, 0x3e6f, - 0x31fa, 0x3e72, 0x3207, 0x3e75, 0x3213, 0x3e77, 0x321f, 0x3e7a, - 0x322b, 0x3e7d, 0x3238, 0x3e80, 0x3244, 0x3e82, 0x3250, 0x3e85, - 0x325c, 0x3e88, 0x3269, 0x3e8a, 0x3275, 0x3e8d, 0x3281, 0x3e90, - 0x328e, 0x3e92, 0x329a, 0x3e95, 0x32a6, 0x3e98, 0x32b2, 0x3e9a, - 0x32bf, 0x3e9d, 0x32cb, 0x3e9f, 0x32d7, 0x3ea2, 0x32e4, 0x3ea5, - 0x32f0, 0x3ea7, 0x32fc, 0x3eaa, 0x3308, 0x3eac, 0x3315, 0x3eaf, - 0x3321, 0x3eb1, 0x332d, 0x3eb4, 0x333a, 0x3eb6, 0x3346, 0x3eb9, - 0x3352, 0x3ebb, 0x335f, 0x3ebe, 0x336b, 0x3ec0, 0x3377, 0x3ec3, - 0x3384, 0x3ec5, 0x3390, 0x3ec8, 0x339c, 0x3eca, 0x33a9, 0x3ecc, - 0x33b5, 0x3ecf, 0x33c1, 0x3ed1, 0x33ce, 0x3ed4, 0x33da, 0x3ed6, - 0x33e6, 0x3ed8, 0x33f3, 0x3edb, 0x33ff, 0x3edd, 0x340b, 0x3ee0, - 0x3418, 0x3ee2, 0x3424, 0x3ee4, 0x3430, 0x3ee7, 0x343d, 0x3ee9, - 0x3449, 0x3eeb, 0x3455, 0x3eed, 0x3462, 0x3ef0, 0x346e, 0x3ef2, - 0x347b, 0x3ef4, 0x3487, 0x3ef7, 0x3493, 0x3ef9, 0x34a0, 0x3efb, - 0x34ac, 0x3efd, 0x34b8, 0x3f00, 0x34c5, 0x3f02, 0x34d1, 0x3f04, - 0x34dd, 0x3f06, 0x34ea, 0x3f08, 0x34f6, 0x3f0a, 0x3503, 0x3f0d, - 0x350f, 0x3f0f, 0x351b, 0x3f11, 0x3528, 0x3f13, 0x3534, 0x3f15, - 0x3540, 0x3f17, 0x354d, 0x3f19, 0x3559, 0x3f1c, 0x3566, 0x3f1e, - 0x3572, 0x3f20, 0x357e, 0x3f22, 0x358b, 0x3f24, 0x3597, 0x3f26, - 0x35a4, 0x3f28, 0x35b0, 0x3f2a, 0x35bc, 0x3f2c, 0x35c9, 0x3f2e, - 0x35d5, 0x3f30, 0x35e2, 0x3f32, 0x35ee, 0x3f34, 0x35fa, 0x3f36, - 0x3607, 0x3f38, 0x3613, 0x3f3a, 0x3620, 0x3f3c, 0x362c, 0x3f3e, - 0x3639, 0x3f40, 0x3645, 0x3f42, 0x3651, 0x3f43, 0x365e, 0x3f45, - 0x366a, 0x3f47, 0x3677, 0x3f49, 0x3683, 0x3f4b, 0x3690, 0x3f4d, - 0x369c, 0x3f4f, 0x36a8, 0x3f51, 0x36b5, 0x3f52, 0x36c1, 0x3f54, - 0x36ce, 0x3f56, 0x36da, 0x3f58, 0x36e7, 0x3f5a, 0x36f3, 0x3f5b, - 0x36ff, 0x3f5d, 0x370c, 0x3f5f, 0x3718, 0x3f61, 0x3725, 0x3f62, - 0x3731, 0x3f64, 0x373e, 0x3f66, 0x374a, 0x3f68, 0x3757, 0x3f69, - 0x3763, 0x3f6b, 0x376f, 0x3f6d, 0x377c, 0x3f6e, 0x3788, 0x3f70, - 0x3795, 0x3f72, 0x37a1, 0x3f73, 0x37ae, 0x3f75, 0x37ba, 0x3f77, - 0x37c7, 0x3f78, 0x37d3, 0x3f7a, 0x37e0, 0x3f7b, 0x37ec, 0x3f7d, - 0x37f9, 0x3f7f, 0x3805, 0x3f80, 0x3811, 0x3f82, 0x381e, 0x3f83, - 0x382a, 0x3f85, 0x3837, 0x3f86, 0x3843, 0x3f88, 0x3850, 0x3f89, - 0x385c, 0x3f8b, 0x3869, 0x3f8c, 0x3875, 0x3f8e, 0x3882, 0x3f8f, - 0x388e, 0x3f91, 0x389b, 0x3f92, 0x38a7, 0x3f94, 0x38b4, 0x3f95, - 0x38c0, 0x3f97, 0x38cd, 0x3f98, 0x38d9, 0x3f99, 0x38e6, 0x3f9b, - 0x38f2, 0x3f9c, 0x38ff, 0x3f9e, 0x390b, 0x3f9f, 0x3918, 0x3fa0, - 0x3924, 0x3fa2, 0x3931, 0x3fa3, 0x393d, 0x3fa4, 0x394a, 0x3fa6, - 0x3956, 0x3fa7, 0x3963, 0x3fa8, 0x396f, 0x3faa, 0x397c, 0x3fab, - 0x3988, 0x3fac, 0x3995, 0x3fad, 0x39a1, 0x3faf, 0x39ae, 0x3fb0, - 0x39ba, 0x3fb1, 0x39c7, 0x3fb2, 0x39d3, 0x3fb4, 0x39e0, 0x3fb5, - 0x39ec, 0x3fb6, 0x39f9, 0x3fb7, 0x3a05, 0x3fb8, 0x3a12, 0x3fb9, - 0x3a1e, 0x3fbb, 0x3a2b, 0x3fbc, 0x3a37, 0x3fbd, 0x3a44, 0x3fbe, - 0x3a50, 0x3fbf, 0x3a5d, 0x3fc0, 0x3a69, 0x3fc1, 0x3a76, 0x3fc3, - 0x3a82, 0x3fc4, 0x3a8f, 0x3fc5, 0x3a9b, 0x3fc6, 0x3aa8, 0x3fc7, - 0x3ab4, 0x3fc8, 0x3ac1, 0x3fc9, 0x3acd, 0x3fca, 0x3ada, 0x3fcb, - 0x3ae6, 0x3fcc, 0x3af3, 0x3fcd, 0x3b00, 0x3fce, 0x3b0c, 0x3fcf, - 0x3b19, 0x3fd0, 0x3b25, 0x3fd1, 0x3b32, 0x3fd2, 0x3b3e, 0x3fd3, - 0x3b4b, 0x3fd4, 0x3b57, 0x3fd5, 0x3b64, 0x3fd5, 0x3b70, 0x3fd6, - 0x3b7d, 0x3fd7, 0x3b89, 0x3fd8, 0x3b96, 0x3fd9, 0x3ba2, 0x3fda, - 0x3baf, 0x3fdb, 0x3bbc, 0x3fdc, 0x3bc8, 0x3fdc, 0x3bd5, 0x3fdd, - 0x3be1, 0x3fde, 0x3bee, 0x3fdf, 0x3bfa, 0x3fe0, 0x3c07, 0x3fe0, - 0x3c13, 0x3fe1, 0x3c20, 0x3fe2, 0x3c2c, 0x3fe3, 0x3c39, 0x3fe3, - 0x3c45, 0x3fe4, 0x3c52, 0x3fe5, 0x3c5f, 0x3fe6, 0x3c6b, 0x3fe6, - 0x3c78, 0x3fe7, 0x3c84, 0x3fe8, 0x3c91, 0x3fe8, 0x3c9d, 0x3fe9, - 0x3caa, 0x3fea, 0x3cb6, 0x3fea, 0x3cc3, 0x3feb, 0x3cd0, 0x3fec, - 0x3cdc, 0x3fec, 0x3ce9, 0x3fed, 0x3cf5, 0x3fed, 0x3d02, 0x3fee, - 0x3d0e, 0x3fef, 0x3d1b, 0x3fef, 0x3d27, 0x3ff0, 0x3d34, 0x3ff0, - 0x3d40, 0x3ff1, 0x3d4d, 0x3ff1, 0x3d5a, 0x3ff2, 0x3d66, 0x3ff2, - 0x3d73, 0x3ff3, 0x3d7f, 0x3ff3, 0x3d8c, 0x3ff4, 0x3d98, 0x3ff4, - 0x3da5, 0x3ff5, 0x3db2, 0x3ff5, 0x3dbe, 0x3ff6, 0x3dcb, 0x3ff6, - 0x3dd7, 0x3ff7, 0x3de4, 0x3ff7, 0x3df0, 0x3ff7, 0x3dfd, 0x3ff8, - 0x3e09, 0x3ff8, 0x3e16, 0x3ff9, 0x3e23, 0x3ff9, 0x3e2f, 0x3ff9, - 0x3e3c, 0x3ffa, 0x3e48, 0x3ffa, 0x3e55, 0x3ffa, 0x3e61, 0x3ffb, - 0x3e6e, 0x3ffb, 0x3e7a, 0x3ffb, 0x3e87, 0x3ffc, 0x3e94, 0x3ffc, - 0x3ea0, 0x3ffc, 0x3ead, 0x3ffc, 0x3eb9, 0x3ffd, 0x3ec6, 0x3ffd, - 0x3ed2, 0x3ffd, 0x3edf, 0x3ffd, 0x3eec, 0x3ffe, 0x3ef8, 0x3ffe, - 0x3f05, 0x3ffe, 0x3f11, 0x3ffe, 0x3f1e, 0x3ffe, 0x3f2a, 0x3fff, - 0x3f37, 0x3fff, 0x3f44, 0x3fff, 0x3f50, 0x3fff, 0x3f5d, 0x3fff, - 0x3f69, 0x3fff, 0x3f76, 0x3fff, 0x3f82, 0x4000, 0x3f8f, 0x4000, - 0x3f9b, 0x4000, 0x3fa8, 0x4000, 0x3fb5, 0x4000, 0x3fc1, 0x4000, - 0x3fce, 0x4000, 0x3fda, 0x4000, 0x3fe7, 0x4000, 0x3ff3, 0x4000, -}; - -/** -* \par -* Generation of real_CoefB array: -* \par -* n = 4096 -*
for (i = 0; i < n; i++)    
-*  {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
-* \par -* Convert to fixed point Q15 format -* round(pBTable[i] * pow(2, 15)) -* -*/ - -static const q15_t ALIGN4 realCoefBQ15[8192] = { - 0x4000, 0x4000, 0x400d, 0x4000, 0x4019, 0x4000, 0x4026, 0x4000, - 0x4032, 0x4000, 0x403f, 0x4000, 0x404b, 0x4000, 0x4058, 0x4000, - 0x4065, 0x4000, 0x4071, 0x4000, 0x407e, 0x4000, 0x408a, 0x3fff, - 0x4097, 0x3fff, 0x40a3, 0x3fff, 0x40b0, 0x3fff, 0x40bc, 0x3fff, - 0x40c9, 0x3fff, 0x40d6, 0x3fff, 0x40e2, 0x3ffe, 0x40ef, 0x3ffe, - 0x40fb, 0x3ffe, 0x4108, 0x3ffe, 0x4114, 0x3ffe, 0x4121, 0x3ffd, - 0x412e, 0x3ffd, 0x413a, 0x3ffd, 0x4147, 0x3ffd, 0x4153, 0x3ffc, - 0x4160, 0x3ffc, 0x416c, 0x3ffc, 0x4179, 0x3ffc, 0x4186, 0x3ffb, - 0x4192, 0x3ffb, 0x419f, 0x3ffb, 0x41ab, 0x3ffa, 0x41b8, 0x3ffa, - 0x41c4, 0x3ffa, 0x41d1, 0x3ff9, 0x41dd, 0x3ff9, 0x41ea, 0x3ff9, - 0x41f7, 0x3ff8, 0x4203, 0x3ff8, 0x4210, 0x3ff7, 0x421c, 0x3ff7, - 0x4229, 0x3ff7, 0x4235, 0x3ff6, 0x4242, 0x3ff6, 0x424e, 0x3ff5, - 0x425b, 0x3ff5, 0x4268, 0x3ff4, 0x4274, 0x3ff4, 0x4281, 0x3ff3, - 0x428d, 0x3ff3, 0x429a, 0x3ff2, 0x42a6, 0x3ff2, 0x42b3, 0x3ff1, - 0x42c0, 0x3ff1, 0x42cc, 0x3ff0, 0x42d9, 0x3ff0, 0x42e5, 0x3fef, - 0x42f2, 0x3fef, 0x42fe, 0x3fee, 0x430b, 0x3fed, 0x4317, 0x3fed, - 0x4324, 0x3fec, 0x4330, 0x3fec, 0x433d, 0x3feb, 0x434a, 0x3fea, - 0x4356, 0x3fea, 0x4363, 0x3fe9, 0x436f, 0x3fe8, 0x437c, 0x3fe8, - 0x4388, 0x3fe7, 0x4395, 0x3fe6, 0x43a1, 0x3fe6, 0x43ae, 0x3fe5, - 0x43bb, 0x3fe4, 0x43c7, 0x3fe3, 0x43d4, 0x3fe3, 0x43e0, 0x3fe2, - 0x43ed, 0x3fe1, 0x43f9, 0x3fe0, 0x4406, 0x3fe0, 0x4412, 0x3fdf, - 0x441f, 0x3fde, 0x442b, 0x3fdd, 0x4438, 0x3fdc, 0x4444, 0x3fdc, - 0x4451, 0x3fdb, 0x445e, 0x3fda, 0x446a, 0x3fd9, 0x4477, 0x3fd8, - 0x4483, 0x3fd7, 0x4490, 0x3fd6, 0x449c, 0x3fd5, 0x44a9, 0x3fd5, - 0x44b5, 0x3fd4, 0x44c2, 0x3fd3, 0x44ce, 0x3fd2, 0x44db, 0x3fd1, - 0x44e7, 0x3fd0, 0x44f4, 0x3fcf, 0x4500, 0x3fce, 0x450d, 0x3fcd, - 0x451a, 0x3fcc, 0x4526, 0x3fcb, 0x4533, 0x3fca, 0x453f, 0x3fc9, - 0x454c, 0x3fc8, 0x4558, 0x3fc7, 0x4565, 0x3fc6, 0x4571, 0x3fc5, - 0x457e, 0x3fc4, 0x458a, 0x3fc3, 0x4597, 0x3fc1, 0x45a3, 0x3fc0, - 0x45b0, 0x3fbf, 0x45bc, 0x3fbe, 0x45c9, 0x3fbd, 0x45d5, 0x3fbc, - 0x45e2, 0x3fbb, 0x45ee, 0x3fb9, 0x45fb, 0x3fb8, 0x4607, 0x3fb7, - 0x4614, 0x3fb6, 0x4620, 0x3fb5, 0x462d, 0x3fb4, 0x4639, 0x3fb2, - 0x4646, 0x3fb1, 0x4652, 0x3fb0, 0x465f, 0x3faf, 0x466b, 0x3fad, - 0x4678, 0x3fac, 0x4684, 0x3fab, 0x4691, 0x3faa, 0x469d, 0x3fa8, - 0x46aa, 0x3fa7, 0x46b6, 0x3fa6, 0x46c3, 0x3fa4, 0x46cf, 0x3fa3, - 0x46dc, 0x3fa2, 0x46e8, 0x3fa0, 0x46f5, 0x3f9f, 0x4701, 0x3f9e, - 0x470e, 0x3f9c, 0x471a, 0x3f9b, 0x4727, 0x3f99, 0x4733, 0x3f98, - 0x4740, 0x3f97, 0x474c, 0x3f95, 0x4759, 0x3f94, 0x4765, 0x3f92, - 0x4772, 0x3f91, 0x477e, 0x3f8f, 0x478b, 0x3f8e, 0x4797, 0x3f8c, - 0x47a4, 0x3f8b, 0x47b0, 0x3f89, 0x47bd, 0x3f88, 0x47c9, 0x3f86, - 0x47d6, 0x3f85, 0x47e2, 0x3f83, 0x47ef, 0x3f82, 0x47fb, 0x3f80, - 0x4807, 0x3f7f, 0x4814, 0x3f7d, 0x4820, 0x3f7b, 0x482d, 0x3f7a, - 0x4839, 0x3f78, 0x4846, 0x3f77, 0x4852, 0x3f75, 0x485f, 0x3f73, - 0x486b, 0x3f72, 0x4878, 0x3f70, 0x4884, 0x3f6e, 0x4891, 0x3f6d, - 0x489d, 0x3f6b, 0x48a9, 0x3f69, 0x48b6, 0x3f68, 0x48c2, 0x3f66, - 0x48cf, 0x3f64, 0x48db, 0x3f62, 0x48e8, 0x3f61, 0x48f4, 0x3f5f, - 0x4901, 0x3f5d, 0x490d, 0x3f5b, 0x4919, 0x3f5a, 0x4926, 0x3f58, - 0x4932, 0x3f56, 0x493f, 0x3f54, 0x494b, 0x3f52, 0x4958, 0x3f51, - 0x4964, 0x3f4f, 0x4970, 0x3f4d, 0x497d, 0x3f4b, 0x4989, 0x3f49, - 0x4996, 0x3f47, 0x49a2, 0x3f45, 0x49af, 0x3f43, 0x49bb, 0x3f42, - 0x49c7, 0x3f40, 0x49d4, 0x3f3e, 0x49e0, 0x3f3c, 0x49ed, 0x3f3a, - 0x49f9, 0x3f38, 0x4a06, 0x3f36, 0x4a12, 0x3f34, 0x4a1e, 0x3f32, - 0x4a2b, 0x3f30, 0x4a37, 0x3f2e, 0x4a44, 0x3f2c, 0x4a50, 0x3f2a, - 0x4a5c, 0x3f28, 0x4a69, 0x3f26, 0x4a75, 0x3f24, 0x4a82, 0x3f22, - 0x4a8e, 0x3f20, 0x4a9a, 0x3f1e, 0x4aa7, 0x3f1c, 0x4ab3, 0x3f19, - 0x4ac0, 0x3f17, 0x4acc, 0x3f15, 0x4ad8, 0x3f13, 0x4ae5, 0x3f11, - 0x4af1, 0x3f0f, 0x4afd, 0x3f0d, 0x4b0a, 0x3f0a, 0x4b16, 0x3f08, - 0x4b23, 0x3f06, 0x4b2f, 0x3f04, 0x4b3b, 0x3f02, 0x4b48, 0x3f00, - 0x4b54, 0x3efd, 0x4b60, 0x3efb, 0x4b6d, 0x3ef9, 0x4b79, 0x3ef7, - 0x4b85, 0x3ef4, 0x4b92, 0x3ef2, 0x4b9e, 0x3ef0, 0x4bab, 0x3eed, - 0x4bb7, 0x3eeb, 0x4bc3, 0x3ee9, 0x4bd0, 0x3ee7, 0x4bdc, 0x3ee4, - 0x4be8, 0x3ee2, 0x4bf5, 0x3ee0, 0x4c01, 0x3edd, 0x4c0d, 0x3edb, - 0x4c1a, 0x3ed8, 0x4c26, 0x3ed6, 0x4c32, 0x3ed4, 0x4c3f, 0x3ed1, - 0x4c4b, 0x3ecf, 0x4c57, 0x3ecc, 0x4c64, 0x3eca, 0x4c70, 0x3ec8, - 0x4c7c, 0x3ec5, 0x4c89, 0x3ec3, 0x4c95, 0x3ec0, 0x4ca1, 0x3ebe, - 0x4cae, 0x3ebb, 0x4cba, 0x3eb9, 0x4cc6, 0x3eb6, 0x4cd3, 0x3eb4, - 0x4cdf, 0x3eb1, 0x4ceb, 0x3eaf, 0x4cf8, 0x3eac, 0x4d04, 0x3eaa, - 0x4d10, 0x3ea7, 0x4d1c, 0x3ea5, 0x4d29, 0x3ea2, 0x4d35, 0x3e9f, - 0x4d41, 0x3e9d, 0x4d4e, 0x3e9a, 0x4d5a, 0x3e98, 0x4d66, 0x3e95, - 0x4d72, 0x3e92, 0x4d7f, 0x3e90, 0x4d8b, 0x3e8d, 0x4d97, 0x3e8a, - 0x4da4, 0x3e88, 0x4db0, 0x3e85, 0x4dbc, 0x3e82, 0x4dc8, 0x3e80, - 0x4dd5, 0x3e7d, 0x4de1, 0x3e7a, 0x4ded, 0x3e77, 0x4df9, 0x3e75, - 0x4e06, 0x3e72, 0x4e12, 0x3e6f, 0x4e1e, 0x3e6c, 0x4e2b, 0x3e6a, - 0x4e37, 0x3e67, 0x4e43, 0x3e64, 0x4e4f, 0x3e61, 0x4e5c, 0x3e5e, - 0x4e68, 0x3e5c, 0x4e74, 0x3e59, 0x4e80, 0x3e56, 0x4e8c, 0x3e53, - 0x4e99, 0x3e50, 0x4ea5, 0x3e4d, 0x4eb1, 0x3e4a, 0x4ebd, 0x3e48, - 0x4eca, 0x3e45, 0x4ed6, 0x3e42, 0x4ee2, 0x3e3f, 0x4eee, 0x3e3c, - 0x4efb, 0x3e39, 0x4f07, 0x3e36, 0x4f13, 0x3e33, 0x4f1f, 0x3e30, - 0x4f2b, 0x3e2d, 0x4f38, 0x3e2a, 0x4f44, 0x3e27, 0x4f50, 0x3e24, - 0x4f5c, 0x3e21, 0x4f68, 0x3e1e, 0x4f75, 0x3e1b, 0x4f81, 0x3e18, - 0x4f8d, 0x3e15, 0x4f99, 0x3e12, 0x4fa5, 0x3e0f, 0x4fb2, 0x3e0c, - 0x4fbe, 0x3e09, 0x4fca, 0x3e06, 0x4fd6, 0x3e03, 0x4fe2, 0x3dff, - 0x4fee, 0x3dfc, 0x4ffb, 0x3df9, 0x5007, 0x3df6, 0x5013, 0x3df3, - 0x501f, 0x3df0, 0x502b, 0x3ded, 0x5037, 0x3de9, 0x5044, 0x3de6, - 0x5050, 0x3de3, 0x505c, 0x3de0, 0x5068, 0x3ddd, 0x5074, 0x3dd9, - 0x5080, 0x3dd6, 0x508c, 0x3dd3, 0x5099, 0x3dd0, 0x50a5, 0x3dcc, - 0x50b1, 0x3dc9, 0x50bd, 0x3dc6, 0x50c9, 0x3dc2, 0x50d5, 0x3dbf, - 0x50e1, 0x3dbc, 0x50ed, 0x3db9, 0x50fa, 0x3db5, 0x5106, 0x3db2, - 0x5112, 0x3daf, 0x511e, 0x3dab, 0x512a, 0x3da8, 0x5136, 0x3da4, - 0x5142, 0x3da1, 0x514e, 0x3d9e, 0x515a, 0x3d9a, 0x5167, 0x3d97, - 0x5173, 0x3d93, 0x517f, 0x3d90, 0x518b, 0x3d8d, 0x5197, 0x3d89, - 0x51a3, 0x3d86, 0x51af, 0x3d82, 0x51bb, 0x3d7f, 0x51c7, 0x3d7b, - 0x51d3, 0x3d78, 0x51df, 0x3d74, 0x51eb, 0x3d71, 0x51f7, 0x3d6d, - 0x5204, 0x3d6a, 0x5210, 0x3d66, 0x521c, 0x3d63, 0x5228, 0x3d5f, - 0x5234, 0x3d5b, 0x5240, 0x3d58, 0x524c, 0x3d54, 0x5258, 0x3d51, - 0x5264, 0x3d4d, 0x5270, 0x3d49, 0x527c, 0x3d46, 0x5288, 0x3d42, - 0x5294, 0x3d3f, 0x52a0, 0x3d3b, 0x52ac, 0x3d37, 0x52b8, 0x3d34, - 0x52c4, 0x3d30, 0x52d0, 0x3d2c, 0x52dc, 0x3d28, 0x52e8, 0x3d25, - 0x52f4, 0x3d21, 0x5300, 0x3d1d, 0x530c, 0x3d1a, 0x5318, 0x3d16, - 0x5324, 0x3d12, 0x5330, 0x3d0e, 0x533c, 0x3d0b, 0x5348, 0x3d07, - 0x5354, 0x3d03, 0x5360, 0x3cff, 0x536c, 0x3cfb, 0x5378, 0x3cf8, - 0x5384, 0x3cf4, 0x5390, 0x3cf0, 0x539c, 0x3cec, 0x53a8, 0x3ce8, - 0x53b4, 0x3ce4, 0x53c0, 0x3ce0, 0x53cc, 0x3cdd, 0x53d8, 0x3cd9, - 0x53e4, 0x3cd5, 0x53f0, 0x3cd1, 0x53fb, 0x3ccd, 0x5407, 0x3cc9, - 0x5413, 0x3cc5, 0x541f, 0x3cc1, 0x542b, 0x3cbd, 0x5437, 0x3cb9, - 0x5443, 0x3cb5, 0x544f, 0x3cb1, 0x545b, 0x3cad, 0x5467, 0x3ca9, - 0x5473, 0x3ca5, 0x547f, 0x3ca1, 0x548b, 0x3c9d, 0x5496, 0x3c99, - 0x54a2, 0x3c95, 0x54ae, 0x3c91, 0x54ba, 0x3c8d, 0x54c6, 0x3c89, - 0x54d2, 0x3c85, 0x54de, 0x3c81, 0x54ea, 0x3c7d, 0x54f6, 0x3c79, - 0x5501, 0x3c74, 0x550d, 0x3c70, 0x5519, 0x3c6c, 0x5525, 0x3c68, - 0x5531, 0x3c64, 0x553d, 0x3c60, 0x5549, 0x3c5b, 0x5554, 0x3c57, - 0x5560, 0x3c53, 0x556c, 0x3c4f, 0x5578, 0x3c4b, 0x5584, 0x3c46, - 0x5590, 0x3c42, 0x559b, 0x3c3e, 0x55a7, 0x3c3a, 0x55b3, 0x3c36, - 0x55bf, 0x3c31, 0x55cb, 0x3c2d, 0x55d7, 0x3c29, 0x55e2, 0x3c24, - 0x55ee, 0x3c20, 0x55fa, 0x3c1c, 0x5606, 0x3c17, 0x5612, 0x3c13, - 0x561d, 0x3c0f, 0x5629, 0x3c0a, 0x5635, 0x3c06, 0x5641, 0x3c02, - 0x564c, 0x3bfd, 0x5658, 0x3bf9, 0x5664, 0x3bf5, 0x5670, 0x3bf0, - 0x567c, 0x3bec, 0x5687, 0x3be7, 0x5693, 0x3be3, 0x569f, 0x3bde, - 0x56ab, 0x3bda, 0x56b6, 0x3bd6, 0x56c2, 0x3bd1, 0x56ce, 0x3bcd, - 0x56da, 0x3bc8, 0x56e5, 0x3bc4, 0x56f1, 0x3bbf, 0x56fd, 0x3bbb, - 0x5709, 0x3bb6, 0x5714, 0x3bb2, 0x5720, 0x3bad, 0x572c, 0x3ba9, - 0x5737, 0x3ba4, 0x5743, 0x3b9f, 0x574f, 0x3b9b, 0x575b, 0x3b96, - 0x5766, 0x3b92, 0x5772, 0x3b8d, 0x577e, 0x3b88, 0x5789, 0x3b84, - 0x5795, 0x3b7f, 0x57a1, 0x3b7b, 0x57ac, 0x3b76, 0x57b8, 0x3b71, - 0x57c4, 0x3b6d, 0x57cf, 0x3b68, 0x57db, 0x3b63, 0x57e7, 0x3b5f, - 0x57f2, 0x3b5a, 0x57fe, 0x3b55, 0x580a, 0x3b50, 0x5815, 0x3b4c, - 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0x5ad4, 0xc5e5, 0x5ac9, 0xc5e0, 0x5abe, 0xc5db, 0x5ab2, 0xc5d5, - 0x5aa7, 0xc5d0, 0x5a9b, 0xc5cb, 0x5a90, 0xc5c6, 0x5a84, 0xc5c1, - 0x5a79, 0xc5bb, 0x5a6e, 0xc5b6, 0x5a62, 0xc5b1, 0x5a57, 0xc5ac, - 0x5a4b, 0xc5a7, 0x5a40, 0xc5a1, 0x5a34, 0xc59c, 0x5a29, 0xc597, - 0x5a1d, 0xc592, 0x5a12, 0xc58d, 0x5a06, 0xc588, 0x59fb, 0xc583, - 0x59ef, 0xc57e, 0x59e4, 0xc578, 0x59d8, 0xc573, 0x59cd, 0xc56e, - 0x59c1, 0xc569, 0x59b6, 0xc564, 0x59aa, 0xc55f, 0x599f, 0xc55a, - 0x5993, 0xc555, 0x5988, 0xc550, 0x597c, 0xc54b, 0x5971, 0xc546, - 0x5965, 0xc541, 0x595a, 0xc53c, 0x594e, 0xc537, 0x5943, 0xc532, - 0x5937, 0xc52d, 0x592c, 0xc528, 0x5920, 0xc523, 0x5914, 0xc51e, - 0x5909, 0xc51a, 0x58fd, 0xc515, 0x58f2, 0xc510, 0x58e6, 0xc50b, - 0x58db, 0xc506, 0x58cf, 0xc501, 0x58c3, 0xc4fc, 0x58b8, 0xc4f7, - 0x58ac, 0xc4f2, 0x58a1, 0xc4ee, 0x5895, 0xc4e9, 0x5889, 0xc4e4, - 0x587e, 0xc4df, 0x5872, 0xc4da, 0x5867, 0xc4d6, 0x585b, 0xc4d1, - 0x584f, 0xc4cc, 0x5844, 0xc4c7, 0x5838, 0xc4c2, 0x582d, 0xc4be, - 0x5821, 0xc4b9, 0x5815, 0xc4b4, 0x580a, 0xc4b0, 0x57fe, 0xc4ab, - 0x57f2, 0xc4a6, 0x57e7, 0xc4a1, 0x57db, 0xc49d, 0x57cf, 0xc498, - 0x57c4, 0xc493, 0x57b8, 0xc48f, 0x57ac, 0xc48a, 0x57a1, 0xc485, - 0x5795, 0xc481, 0x5789, 0xc47c, 0x577e, 0xc478, 0x5772, 0xc473, - 0x5766, 0xc46e, 0x575b, 0xc46a, 0x574f, 0xc465, 0x5743, 0xc461, - 0x5737, 0xc45c, 0x572c, 0xc457, 0x5720, 0xc453, 0x5714, 0xc44e, - 0x5709, 0xc44a, 0x56fd, 0xc445, 0x56f1, 0xc441, 0x56e5, 0xc43c, - 0x56da, 0xc438, 0x56ce, 0xc433, 0x56c2, 0xc42f, 0x56b6, 0xc42a, - 0x56ab, 0xc426, 0x569f, 0xc422, 0x5693, 0xc41d, 0x5687, 0xc419, - 0x567c, 0xc414, 0x5670, 0xc410, 0x5664, 0xc40b, 0x5658, 0xc407, - 0x564c, 0xc403, 0x5641, 0xc3fe, 0x5635, 0xc3fa, 0x5629, 0xc3f6, - 0x561d, 0xc3f1, 0x5612, 0xc3ed, 0x5606, 0xc3e9, 0x55fa, 0xc3e4, - 0x55ee, 0xc3e0, 0x55e2, 0xc3dc, 0x55d7, 0xc3d7, 0x55cb, 0xc3d3, - 0x55bf, 0xc3cf, 0x55b3, 0xc3ca, 0x55a7, 0xc3c6, 0x559b, 0xc3c2, - 0x5590, 0xc3be, 0x5584, 0xc3ba, 0x5578, 0xc3b5, 0x556c, 0xc3b1, - 0x5560, 0xc3ad, 0x5554, 0xc3a9, 0x5549, 0xc3a5, 0x553d, 0xc3a0, - 0x5531, 0xc39c, 0x5525, 0xc398, 0x5519, 0xc394, 0x550d, 0xc390, - 0x5501, 0xc38c, 0x54f6, 0xc387, 0x54ea, 0xc383, 0x54de, 0xc37f, - 0x54d2, 0xc37b, 0x54c6, 0xc377, 0x54ba, 0xc373, 0x54ae, 0xc36f, - 0x54a2, 0xc36b, 0x5496, 0xc367, 0x548b, 0xc363, 0x547f, 0xc35f, - 0x5473, 0xc35b, 0x5467, 0xc357, 0x545b, 0xc353, 0x544f, 0xc34f, - 0x5443, 0xc34b, 0x5437, 0xc347, 0x542b, 0xc343, 0x541f, 0xc33f, - 0x5413, 0xc33b, 0x5407, 0xc337, 0x53fb, 0xc333, 0x53f0, 0xc32f, - 0x53e4, 0xc32b, 0x53d8, 0xc327, 0x53cc, 0xc323, 0x53c0, 0xc320, - 0x53b4, 0xc31c, 0x53a8, 0xc318, 0x539c, 0xc314, 0x5390, 0xc310, - 0x5384, 0xc30c, 0x5378, 0xc308, 0x536c, 0xc305, 0x5360, 0xc301, - 0x5354, 0xc2fd, 0x5348, 0xc2f9, 0x533c, 0xc2f5, 0x5330, 0xc2f2, - 0x5324, 0xc2ee, 0x5318, 0xc2ea, 0x530c, 0xc2e6, 0x5300, 0xc2e3, - 0x52f4, 0xc2df, 0x52e8, 0xc2db, 0x52dc, 0xc2d8, 0x52d0, 0xc2d4, - 0x52c4, 0xc2d0, 0x52b8, 0xc2cc, 0x52ac, 0xc2c9, 0x52a0, 0xc2c5, - 0x5294, 0xc2c1, 0x5288, 0xc2be, 0x527c, 0xc2ba, 0x5270, 0xc2b7, - 0x5264, 0xc2b3, 0x5258, 0xc2af, 0x524c, 0xc2ac, 0x5240, 0xc2a8, - 0x5234, 0xc2a5, 0x5228, 0xc2a1, 0x521c, 0xc29d, 0x5210, 0xc29a, - 0x5204, 0xc296, 0x51f7, 0xc293, 0x51eb, 0xc28f, 0x51df, 0xc28c, - 0x51d3, 0xc288, 0x51c7, 0xc285, 0x51bb, 0xc281, 0x51af, 0xc27e, - 0x51a3, 0xc27a, 0x5197, 0xc277, 0x518b, 0xc273, 0x517f, 0xc270, - 0x5173, 0xc26d, 0x5167, 0xc269, 0x515a, 0xc266, 0x514e, 0xc262, - 0x5142, 0xc25f, 0x5136, 0xc25c, 0x512a, 0xc258, 0x511e, 0xc255, - 0x5112, 0xc251, 0x5106, 0xc24e, 0x50fa, 0xc24b, 0x50ed, 0xc247, - 0x50e1, 0xc244, 0x50d5, 0xc241, 0x50c9, 0xc23e, 0x50bd, 0xc23a, - 0x50b1, 0xc237, 0x50a5, 0xc234, 0x5099, 0xc230, 0x508c, 0xc22d, - 0x5080, 0xc22a, 0x5074, 0xc227, 0x5068, 0xc223, 0x505c, 0xc220, - 0x5050, 0xc21d, 0x5044, 0xc21a, 0x5037, 0xc217, 0x502b, 0xc213, - 0x501f, 0xc210, 0x5013, 0xc20d, 0x5007, 0xc20a, 0x4ffb, 0xc207, - 0x4fee, 0xc204, 0x4fe2, 0xc201, 0x4fd6, 0xc1fd, 0x4fca, 0xc1fa, - 0x4fbe, 0xc1f7, 0x4fb2, 0xc1f4, 0x4fa5, 0xc1f1, 0x4f99, 0xc1ee, - 0x4f8d, 0xc1eb, 0x4f81, 0xc1e8, 0x4f75, 0xc1e5, 0x4f68, 0xc1e2, - 0x4f5c, 0xc1df, 0x4f50, 0xc1dc, 0x4f44, 0xc1d9, 0x4f38, 0xc1d6, - 0x4f2b, 0xc1d3, 0x4f1f, 0xc1d0, 0x4f13, 0xc1cd, 0x4f07, 0xc1ca, - 0x4efb, 0xc1c7, 0x4eee, 0xc1c4, 0x4ee2, 0xc1c1, 0x4ed6, 0xc1be, - 0x4eca, 0xc1bb, 0x4ebd, 0xc1b8, 0x4eb1, 0xc1b6, 0x4ea5, 0xc1b3, - 0x4e99, 0xc1b0, 0x4e8c, 0xc1ad, 0x4e80, 0xc1aa, 0x4e74, 0xc1a7, - 0x4e68, 0xc1a4, 0x4e5c, 0xc1a2, 0x4e4f, 0xc19f, 0x4e43, 0xc19c, - 0x4e37, 0xc199, 0x4e2b, 0xc196, 0x4e1e, 0xc194, 0x4e12, 0xc191, - 0x4e06, 0xc18e, 0x4df9, 0xc18b, 0x4ded, 0xc189, 0x4de1, 0xc186, - 0x4dd5, 0xc183, 0x4dc8, 0xc180, 0x4dbc, 0xc17e, 0x4db0, 0xc17b, - 0x4da4, 0xc178, 0x4d97, 0xc176, 0x4d8b, 0xc173, 0x4d7f, 0xc170, - 0x4d72, 0xc16e, 0x4d66, 0xc16b, 0x4d5a, 0xc168, 0x4d4e, 0xc166, - 0x4d41, 0xc163, 0x4d35, 0xc161, 0x4d29, 0xc15e, 0x4d1c, 0xc15b, - 0x4d10, 0xc159, 0x4d04, 0xc156, 0x4cf8, 0xc154, 0x4ceb, 0xc151, - 0x4cdf, 0xc14f, 0x4cd3, 0xc14c, 0x4cc6, 0xc14a, 0x4cba, 0xc147, - 0x4cae, 0xc145, 0x4ca1, 0xc142, 0x4c95, 0xc140, 0x4c89, 0xc13d, - 0x4c7c, 0xc13b, 0x4c70, 0xc138, 0x4c64, 0xc136, 0x4c57, 0xc134, - 0x4c4b, 0xc131, 0x4c3f, 0xc12f, 0x4c32, 0xc12c, 0x4c26, 0xc12a, - 0x4c1a, 0xc128, 0x4c0d, 0xc125, 0x4c01, 0xc123, 0x4bf5, 0xc120, - 0x4be8, 0xc11e, 0x4bdc, 0xc11c, 0x4bd0, 0xc119, 0x4bc3, 0xc117, - 0x4bb7, 0xc115, 0x4bab, 0xc113, 0x4b9e, 0xc110, 0x4b92, 0xc10e, - 0x4b85, 0xc10c, 0x4b79, 0xc109, 0x4b6d, 0xc107, 0x4b60, 0xc105, - 0x4b54, 0xc103, 0x4b48, 0xc100, 0x4b3b, 0xc0fe, 0x4b2f, 0xc0fc, - 0x4b23, 0xc0fa, 0x4b16, 0xc0f8, 0x4b0a, 0xc0f6, 0x4afd, 0xc0f3, - 0x4af1, 0xc0f1, 0x4ae5, 0xc0ef, 0x4ad8, 0xc0ed, 0x4acc, 0xc0eb, - 0x4ac0, 0xc0e9, 0x4ab3, 0xc0e7, 0x4aa7, 0xc0e4, 0x4a9a, 0xc0e2, - 0x4a8e, 0xc0e0, 0x4a82, 0xc0de, 0x4a75, 0xc0dc, 0x4a69, 0xc0da, - 0x4a5c, 0xc0d8, 0x4a50, 0xc0d6, 0x4a44, 0xc0d4, 0x4a37, 0xc0d2, - 0x4a2b, 0xc0d0, 0x4a1e, 0xc0ce, 0x4a12, 0xc0cc, 0x4a06, 0xc0ca, - 0x49f9, 0xc0c8, 0x49ed, 0xc0c6, 0x49e0, 0xc0c4, 0x49d4, 0xc0c2, - 0x49c7, 0xc0c0, 0x49bb, 0xc0be, 0x49af, 0xc0bd, 0x49a2, 0xc0bb, - 0x4996, 0xc0b9, 0x4989, 0xc0b7, 0x497d, 0xc0b5, 0x4970, 0xc0b3, - 0x4964, 0xc0b1, 0x4958, 0xc0af, 0x494b, 0xc0ae, 0x493f, 0xc0ac, - 0x4932, 0xc0aa, 0x4926, 0xc0a8, 0x4919, 0xc0a6, 0x490d, 0xc0a5, - 0x4901, 0xc0a3, 0x48f4, 0xc0a1, 0x48e8, 0xc09f, 0x48db, 0xc09e, - 0x48cf, 0xc09c, 0x48c2, 0xc09a, 0x48b6, 0xc098, 0x48a9, 0xc097, - 0x489d, 0xc095, 0x4891, 0xc093, 0x4884, 0xc092, 0x4878, 0xc090, - 0x486b, 0xc08e, 0x485f, 0xc08d, 0x4852, 0xc08b, 0x4846, 0xc089, - 0x4839, 0xc088, 0x482d, 0xc086, 0x4820, 0xc085, 0x4814, 0xc083, - 0x4807, 0xc081, 0x47fb, 0xc080, 0x47ef, 0xc07e, 0x47e2, 0xc07d, - 0x47d6, 0xc07b, 0x47c9, 0xc07a, 0x47bd, 0xc078, 0x47b0, 0xc077, - 0x47a4, 0xc075, 0x4797, 0xc074, 0x478b, 0xc072, 0x477e, 0xc071, - 0x4772, 0xc06f, 0x4765, 0xc06e, 0x4759, 0xc06c, 0x474c, 0xc06b, - 0x4740, 0xc069, 0x4733, 0xc068, 0x4727, 0xc067, 0x471a, 0xc065, - 0x470e, 0xc064, 0x4701, 0xc062, 0x46f5, 0xc061, 0x46e8, 0xc060, - 0x46dc, 0xc05e, 0x46cf, 0xc05d, 0x46c3, 0xc05c, 0x46b6, 0xc05a, - 0x46aa, 0xc059, 0x469d, 0xc058, 0x4691, 0xc056, 0x4684, 0xc055, - 0x4678, 0xc054, 0x466b, 0xc053, 0x465f, 0xc051, 0x4652, 0xc050, - 0x4646, 0xc04f, 0x4639, 0xc04e, 0x462d, 0xc04c, 0x4620, 0xc04b, - 0x4614, 0xc04a, 0x4607, 0xc049, 0x45fb, 0xc048, 0x45ee, 0xc047, - 0x45e2, 0xc045, 0x45d5, 0xc044, 0x45c9, 0xc043, 0x45bc, 0xc042, - 0x45b0, 0xc041, 0x45a3, 0xc040, 0x4597, 0xc03f, 0x458a, 0xc03d, - 0x457e, 0xc03c, 0x4571, 0xc03b, 0x4565, 0xc03a, 0x4558, 0xc039, - 0x454c, 0xc038, 0x453f, 0xc037, 0x4533, 0xc036, 0x4526, 0xc035, - 0x451a, 0xc034, 0x450d, 0xc033, 0x4500, 0xc032, 0x44f4, 0xc031, - 0x44e7, 0xc030, 0x44db, 0xc02f, 0x44ce, 0xc02e, 0x44c2, 0xc02d, - 0x44b5, 0xc02c, 0x44a9, 0xc02b, 0x449c, 0xc02b, 0x4490, 0xc02a, - 0x4483, 0xc029, 0x4477, 0xc028, 0x446a, 0xc027, 0x445e, 0xc026, - 0x4451, 0xc025, 0x4444, 0xc024, 0x4438, 0xc024, 0x442b, 0xc023, - 0x441f, 0xc022, 0x4412, 0xc021, 0x4406, 0xc020, 0x43f9, 0xc020, - 0x43ed, 0xc01f, 0x43e0, 0xc01e, 0x43d4, 0xc01d, 0x43c7, 0xc01d, - 0x43bb, 0xc01c, 0x43ae, 0xc01b, 0x43a1, 0xc01a, 0x4395, 0xc01a, - 0x4388, 0xc019, 0x437c, 0xc018, 0x436f, 0xc018, 0x4363, 0xc017, - 0x4356, 0xc016, 0x434a, 0xc016, 0x433d, 0xc015, 0x4330, 0xc014, - 0x4324, 0xc014, 0x4317, 0xc013, 0x430b, 0xc013, 0x42fe, 0xc012, - 0x42f2, 0xc011, 0x42e5, 0xc011, 0x42d9, 0xc010, 0x42cc, 0xc010, - 0x42c0, 0xc00f, 0x42b3, 0xc00f, 0x42a6, 0xc00e, 0x429a, 0xc00e, - 0x428d, 0xc00d, 0x4281, 0xc00d, 0x4274, 0xc00c, 0x4268, 0xc00c, - 0x425b, 0xc00b, 0x424e, 0xc00b, 0x4242, 0xc00a, 0x4235, 0xc00a, - 0x4229, 0xc009, 0x421c, 0xc009, 0x4210, 0xc009, 0x4203, 0xc008, - 0x41f7, 0xc008, 0x41ea, 0xc007, 0x41dd, 0xc007, 0x41d1, 0xc007, - 0x41c4, 0xc006, 0x41b8, 0xc006, 0x41ab, 0xc006, 0x419f, 0xc005, - 0x4192, 0xc005, 0x4186, 0xc005, 0x4179, 0xc004, 0x416c, 0xc004, - 0x4160, 0xc004, 0x4153, 0xc004, 0x4147, 0xc003, 0x413a, 0xc003, - 0x412e, 0xc003, 0x4121, 0xc003, 0x4114, 0xc002, 0x4108, 0xc002, - 0x40fb, 0xc002, 0x40ef, 0xc002, 0x40e2, 0xc002, 0x40d6, 0xc001, - 0x40c9, 0xc001, 0x40bc, 0xc001, 0x40b0, 0xc001, 0x40a3, 0xc001, - 0x4097, 0xc001, 0x408a, 0xc001, 0x407e, 0xc000, 0x4071, 0xc000, - 0x4065, 0xc000, 0x4058, 0xc000, 0x404b, 0xc000, 0x403f, 0xc000, - 0x4032, 0xc000, 0x4026, 0xc000, 0x4019, 0xc000, 0x400d, 0xc000, -}; - -/** -* @brief Initialization function for the Q15 RFFT/RIFFT. -* @param[in, out] *S points to an instance of the Q15 RFFT/RIFFT structure. -* @param[in] *S_CFFT points to an instance of the Q15 CFFT/CIFFT structure. -* @param[in] fftLenReal length of the FFT. -* @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. -* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. -* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value. -* -* \par Description: -* \par -* The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048. -* \par -* The parameter ifftFlagR controls whether a forward or inverse transform is computed. -* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. -* \par -* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. -* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. -* \par -* This function also initializes Twiddle factor table. -*/ - -arm_status arm_rfft_init_q15( - arm_rfft_instance_q15 * S, - arm_cfft_radix4_instance_q15 * S_CFFT, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag) -{ - - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialize the Real FFT length */ - S->fftLenReal = (uint16_t) fftLenReal; - - /* Initialize the Complex FFT length */ - S->fftLenBy2 = (uint16_t) fftLenReal / 2u; - - /* Initialize the Twiddle coefficientA pointer */ - S->pTwiddleAReal = (q15_t *) realCoefAQ15; - - /* Initialize the Twiddle coefficientB pointer */ - S->pTwiddleBReal = (q15_t *) realCoefBQ15; - - /* Initialize the Flag for selection of RFFT or RIFFT */ - S->ifftFlagR = (uint8_t) ifftFlagR; - - /* Initialize the Flag for calculation Bit reversal or not */ - S->bitReverseFlagR = (uint8_t) bitReverseFlag; - - /* Initialization of coef modifier depending on the FFT length */ - switch (S->fftLenReal) - { - case 8192: - S->twidCoefRModifier = 1u; - break; - case 2048u: - S->twidCoefRModifier = 4u; - break; - case 512u: - S->twidCoefRModifier = 16u; - break; - case 128u: - S->twidCoefRModifier = 64u; - break; - default: - /* Reporting argument error if rfftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - /* Init Complex FFT Instance */ - S->pCfft = S_CFFT; - - if(S->ifftFlagR) - { - /* Initializes the CIFFT Module for fftLenreal/2 length */ - arm_cfft_radix4_init_q15(S->pCfft, S->fftLenBy2, 1u, 1u); - } - else - { - /* Initializes the CFFT Module for fftLenreal/2 length */ - arm_cfft_radix4_init_q15(S->pCfft, S->fftLenBy2, 0u, 1u); - } - - /* return the status of RFFT Init function */ - return (status); - -} - - /** - * @} end of RFFT_RIFFT group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c deleted file mode 100644 index f2f82f73b4..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c +++ /dev/null @@ -1,4274 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_rfft_init_q31.c -* -* Description: RFFT & RIFFT Q31 initialisation function -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup RFFT_RIFFT - * @{ - */ - -/** -* \par -* Generation floating point realCoefAQ31 array: -* \par -* n = 4096 -*
for (i = 0; i < n; i++)    
-* {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-* }
-* \par -* Convert to fixed point Q31 format -* round(pATable[i] * pow(2, 31)) -*/ - - -static const q31_t realCoefAQ31[8192] = { - 0x40000000, 0xc0000000, 0x3ff36f02, 0xc000013c, - 0x3fe6de05, 0xc00004ef, 0x3fda4d09, 0xc0000b1a, - 0x3fcdbc0f, 0xc00013bd, 0x3fc12b16, 0xc0001ed8, - 0x3fb49a1f, 0xc0002c6a, 0x3fa8092c, 0xc0003c74, - 0x3f9b783c, 0xc0004ef5, 0x3f8ee750, 0xc00063ee, - 0x3f825668, 0xc0007b5f, 0x3f75c585, 0xc0009547, - 0x3f6934a8, 0xc000b1a7, 0x3f5ca3d0, 0xc000d07e, - 0x3f5012fe, 0xc000f1ce, 0x3f438234, 0xc0011594, - 0x3f36f170, 0xc0013bd3, 0x3f2a60b4, 0xc0016489, - 0x3f1dd001, 0xc0018fb6, 0x3f113f56, 0xc001bd5c, - 0x3f04aeb5, 0xc001ed78, 0x3ef81e1d, 0xc002200d, - 0x3eeb8d8f, 0xc0025519, 0x3edefd0c, 0xc0028c9c, - 0x3ed26c94, 0xc002c697, 0x3ec5dc28, 0xc003030a, - 0x3eb94bc8, 0xc00341f4, 0x3eacbb74, 0xc0038356, - 0x3ea02b2e, 0xc003c72f, 0x3e939af5, 0xc0040d80, - 0x3e870aca, 0xc0045648, 0x3e7a7aae, 0xc004a188, - 0x3e6deaa1, 0xc004ef3f, 0x3e615aa3, 0xc0053f6e, - 0x3e54cab5, 0xc0059214, 0x3e483ad8, 0xc005e731, - 0x3e3bab0b, 0xc0063ec6, 0x3e2f1b50, 0xc00698d3, - 0x3e228ba7, 0xc006f556, 0x3e15fc11, 0xc0075452, - 0x3e096c8d, 0xc007b5c4, 0x3dfcdd1d, 0xc00819ae, - 0x3df04dc0, 0xc008800f, 0x3de3be78, 0xc008e8e8, - 0x3dd72f45, 0xc0095438, 0x3dcaa027, 0xc009c1ff, - 0x3dbe111e, 0xc00a323d, 0x3db1822c, 0xc00aa4f3, - 0x3da4f351, 0xc00b1a20, 0x3d98648d, 0xc00b91c4, - 0x3d8bd5e1, 0xc00c0be0, 0x3d7f474d, 0xc00c8872, - 0x3d72b8d2, 0xc00d077c, 0x3d662a70, 0xc00d88fd, - 0x3d599c28, 0xc00e0cf5, 0x3d4d0df9, 0xc00e9364, - 0x3d407fe6, 0xc00f1c4a, 0x3d33f1ed, 0xc00fa7a8, - 0x3d276410, 0xc010357c, 0x3d1ad650, 0xc010c5c7, - 0x3d0e48ab, 0xc011588a, 0x3d01bb24, 0xc011edc3, - 0x3cf52dbb, 0xc0128574, 0x3ce8a06f, 0xc0131f9b, - 0x3cdc1342, 0xc013bc39, 0x3ccf8634, 0xc0145b4e, - 0x3cc2f945, 0xc014fcda, 0x3cb66c77, 0xc015a0dd, - 0x3ca9dfc8, 0xc0164757, 0x3c9d533b, 0xc016f047, - 0x3c90c6cf, 0xc0179bae, 0x3c843a85, 0xc018498c, - 0x3c77ae5e, 0xc018f9e1, 0x3c6b2259, 0xc019acac, - 0x3c5e9678, 0xc01a61ee, 0x3c520aba, 0xc01b19a7, - 0x3c457f21, 0xc01bd3d6, 0x3c38f3ac, 0xc01c907c, - 0x3c2c685d, 0xc01d4f99, 0x3c1fdd34, 0xc01e112b, - 0x3c135231, 0xc01ed535, 0x3c06c754, 0xc01f9bb5, - 0x3bfa3c9f, 0xc02064ab, 0x3bedb212, 0xc0213018, - 0x3be127ac, 0xc021fdfb, 0x3bd49d70, 0xc022ce54, - 0x3bc8135c, 0xc023a124, 0x3bbb8973, 0xc024766a, - 0x3baeffb3, 0xc0254e27, 0x3ba2761e, 0xc0262859, - 0x3b95ecb4, 0xc0270502, 0x3b896375, 0xc027e421, - 0x3b7cda63, 0xc028c5b6, 0x3b70517d, 0xc029a9c1, - 0x3b63c8c4, 0xc02a9042, 0x3b574039, 0xc02b7939, - 0x3b4ab7db, 0xc02c64a6, 0x3b3e2fac, 0xc02d5289, - 0x3b31a7ac, 0xc02e42e2, 0x3b251fdc, 0xc02f35b1, - 0x3b18983b, 0xc0302af5, 0x3b0c10cb, 0xc03122b0, - 0x3aff898c, 0xc0321ce0, 0x3af3027e, 0xc0331986, - 0x3ae67ba2, 0xc03418a2, 0x3ad9f4f8, 0xc0351a33, - 0x3acd6e81, 0xc0361e3a, 0x3ac0e83d, 0xc03724b6, - 0x3ab4622d, 0xc0382da8, 0x3aa7dc52, 0xc0393910, - 0x3a9b56ab, 0xc03a46ed, 0x3a8ed139, 0xc03b573f, - 0x3a824bfd, 0xc03c6a07, 0x3a75c6f8, 0xc03d7f44, - 0x3a694229, 0xc03e96f6, 0x3a5cbd91, 0xc03fb11d, - 0x3a503930, 0xc040cdba, 0x3a43b508, 0xc041eccc, - 0x3a373119, 0xc0430e53, 0x3a2aad62, 0xc044324f, - 0x3a1e29e5, 0xc04558c0, 0x3a11a6a3, 0xc04681a6, - 0x3a05239a, 0xc047ad01, 0x39f8a0cd, 0xc048dad1, - 0x39ec1e3b, 0xc04a0b16, 0x39df9be6, 0xc04b3dcf, - 0x39d319cc, 0xc04c72fe, 0x39c697f0, 0xc04daaa1, - 0x39ba1651, 0xc04ee4b8, 0x39ad94f0, 0xc0502145, - 0x39a113cd, 0xc0516045, 0x399492ea, 0xc052a1bb, - 0x39881245, 0xc053e5a5, 0x397b91e1, 0xc0552c03, - 0x396f11bc, 0xc05674d6, 0x396291d9, 0xc057c01d, - 0x39561237, 0xc0590dd8, 0x394992d7, 0xc05a5e07, - 0x393d13b8, 0xc05bb0ab, 0x393094dd, 0xc05d05c3, - 0x39241645, 0xc05e5d4e, 0x391797f0, 0xc05fb74e, - 0x390b19e0, 0xc06113c2, 0x38fe9c15, 0xc06272aa, - 0x38f21e8e, 0xc063d405, 0x38e5a14d, 0xc06537d4, - 0x38d92452, 0xc0669e18, 0x38cca79e, 0xc06806ce, - 0x38c02b31, 0xc06971f9, 0x38b3af0c, 0xc06adf97, - 0x38a7332e, 0xc06c4fa8, 0x389ab799, 0xc06dc22e, - 0x388e3c4d, 0xc06f3726, 0x3881c14b, 0xc070ae92, - 0x38754692, 0xc0722871, 0x3868cc24, 0xc073a4c3, - 0x385c5201, 0xc0752389, 0x384fd829, 0xc076a4c2, - 0x38435e9d, 0xc078286e, 0x3836e55d, 0xc079ae8c, - 0x382a6c6a, 0xc07b371e, 0x381df3c5, 0xc07cc223, - 0x38117b6d, 0xc07e4f9b, 0x38050364, 0xc07fdf85, - 0x37f88ba9, 0xc08171e2, 0x37ec143e, 0xc08306b2, - 0x37df9d22, 0xc0849df4, 0x37d32657, 0xc08637a9, - 0x37c6afdc, 0xc087d3d0, 0x37ba39b3, 0xc089726a, - 0x37adc3db, 0xc08b1376, 0x37a14e55, 0xc08cb6f5, - 0x3794d922, 0xc08e5ce5, 0x37886442, 0xc0900548, - 0x377befb5, 0xc091b01d, 0x376f7b7d, 0xc0935d64, - 0x37630799, 0xc0950d1d, 0x3756940a, 0xc096bf48, - 0x374a20d0, 0xc09873e4, 0x373daded, 0xc09a2af3, - 0x37313b60, 0xc09be473, 0x3724c92a, 0xc09da065, - 0x3718574b, 0xc09f5ec8, 0x370be5c4, 0xc0a11f9d, - 0x36ff7496, 0xc0a2e2e3, 0x36f303c0, 0xc0a4a89b, - 0x36e69344, 0xc0a670c4, 0x36da2321, 0xc0a83b5e, - 0x36cdb359, 0xc0aa086a, 0x36c143ec, 0xc0abd7e6, - 0x36b4d4d9, 0xc0ada9d4, 0x36a86623, 0xc0af7e33, - 0x369bf7c9, 0xc0b15502, 0x368f89cb, 0xc0b32e42, - 0x36831c2b, 0xc0b509f3, 0x3676aee8, 0xc0b6e815, - 0x366a4203, 0xc0b8c8a7, 0x365dd57d, 0xc0baabaa, - 0x36516956, 0xc0bc911d, 0x3644fd8f, 0xc0be7901, - 0x36389228, 0xc0c06355, 0x362c2721, 0xc0c25019, - 0x361fbc7b, 0xc0c43f4d, 0x36135237, 0xc0c630f2, - 0x3606e854, 0xc0c82506, 0x35fa7ed4, 0xc0ca1b8a, - 0x35ee15b7, 0xc0cc147f, 0x35e1acfd, 0xc0ce0fe3, - 0x35d544a7, 0xc0d00db6, 0x35c8dcb6, 0xc0d20dfa, - 0x35bc7529, 0xc0d410ad, 0x35b00e02, 0xc0d615cf, - 0x35a3a740, 0xc0d81d61, 0x359740e5, 0xc0da2762, - 0x358adaf0, 0xc0dc33d2, 0x357e7563, 0xc0de42b2, - 0x3572103d, 0xc0e05401, 0x3565ab80, 0xc0e267be, - 0x3559472b, 0xc0e47deb, 0x354ce33f, 0xc0e69686, - 0x35407fbd, 0xc0e8b190, 0x35341ca5, 0xc0eacf09, - 0x3527b9f7, 0xc0eceef1, 0x351b57b5, 0xc0ef1147, - 0x350ef5de, 0xc0f1360b, 0x35029473, 0xc0f35d3e, - 0x34f63374, 0xc0f586df, 0x34e9d2e3, 0xc0f7b2ee, - 0x34dd72be, 0xc0f9e16b, 0x34d11308, 0xc0fc1257, - 0x34c4b3c0, 0xc0fe45b0, 0x34b854e7, 0xc1007b77, - 0x34abf67e, 0xc102b3ac, 0x349f9884, 0xc104ee4f, - 0x34933afa, 0xc1072b5f, 0x3486dde1, 0xc1096add, - 0x347a8139, 0xc10bacc8, 0x346e2504, 0xc10df120, - 0x3461c940, 0xc11037e6, 0x34556def, 0xc1128119, - 0x34491311, 0xc114ccb9, 0x343cb8a7, 0xc1171ac6, - 0x34305eb0, 0xc1196b3f, 0x3424052f, 0xc11bbe26, - 0x3417ac22, 0xc11e1379, 0x340b538b, 0xc1206b39, - 0x33fefb6a, 0xc122c566, 0x33f2a3bf, 0xc12521ff, - 0x33e64c8c, 0xc1278104, 0x33d9f5cf, 0xc129e276, - 0x33cd9f8b, 0xc12c4653, 0x33c149bf, 0xc12eac9d, - 0x33b4f46c, 0xc1311553, 0x33a89f92, 0xc1338075, - 0x339c4b32, 0xc135ee02, 0x338ff74d, 0xc1385dfb, - 0x3383a3e2, 0xc13ad060, 0x337750f2, 0xc13d4530, - 0x336afe7e, 0xc13fbc6c, 0x335eac86, 0xc1423613, - 0x33525b0b, 0xc144b225, 0x33460a0d, 0xc14730a3, - 0x3339b98d, 0xc149b18b, 0x332d698a, 0xc14c34df, - 0x33211a07, 0xc14eba9d, 0x3314cb02, 0xc15142c6, - 0x33087c7d, 0xc153cd5a, 0x32fc2e77, 0xc1565a58, - 0x32efe0f2, 0xc158e9c1, 0x32e393ef, 0xc15b7b94, - 0x32d7476c, 0xc15e0fd1, 0x32cafb6b, 0xc160a678, - 0x32beafed, 0xc1633f8a, 0x32b264f2, 0xc165db05, - 0x32a61a7a, 0xc16878eb, 0x3299d085, 0xc16b193a, - 0x328d8715, 0xc16dbbf3, 0x32813e2a, 0xc1706115, - 0x3274f5c3, 0xc17308a1, 0x3268ade3, 0xc175b296, - 0x325c6688, 0xc1785ef4, 0x32501fb5, 0xc17b0dbb, - 0x3243d968, 0xc17dbeec, 0x323793a3, 0xc1807285, - 0x322b4e66, 0xc1832888, 0x321f09b1, 0xc185e0f3, - 0x3212c585, 0xc1889bc6, 0x320681e3, 0xc18b5903, - 0x31fa3ecb, 0xc18e18a7, 0x31edfc3d, 0xc190dab4, - 0x31e1ba3a, 0xc1939f29, 0x31d578c2, 0xc1966606, - 0x31c937d6, 0xc1992f4c, 0x31bcf777, 0xc19bfaf9, - 0x31b0b7a4, 0xc19ec90d, 0x31a4785e, 0xc1a1998a, - 0x319839a6, 0xc1a46c6e, 0x318bfb7d, 0xc1a741b9, - 0x317fbde2, 0xc1aa196c, 0x317380d6, 0xc1acf386, - 0x31674459, 0xc1afd007, 0x315b086d, 0xc1b2aef0, - 0x314ecd11, 0xc1b5903f, 0x31429247, 0xc1b873f5, - 0x3136580d, 0xc1bb5a11, 0x312a1e66, 0xc1be4294, - 0x311de551, 0xc1c12d7e, 0x3111accf, 0xc1c41ace, - 0x310574e0, 0xc1c70a84, 0x30f93d86, 0xc1c9fca0, - 0x30ed06bf, 0xc1ccf122, 0x30e0d08d, 0xc1cfe80a, - 0x30d49af1, 0xc1d2e158, 0x30c865ea, 0xc1d5dd0c, - 0x30bc317a, 0xc1d8db25, 0x30affda0, 0xc1dbdba3, - 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0x39ec1e3b, 0x3fb5f4ea, 0x39f8a0cd, 0x3fb7252f, - 0x3a05239a, 0x3fb852ff, 0x3a11a6a3, 0x3fb97e5a, - 0x3a1e29e5, 0x3fbaa740, 0x3a2aad62, 0x3fbbcdb1, - 0x3a373119, 0x3fbcf1ad, 0x3a43b508, 0x3fbe1334, - 0x3a503930, 0x3fbf3246, 0x3a5cbd91, 0x3fc04ee3, - 0x3a694229, 0x3fc1690a, 0x3a75c6f8, 0x3fc280bc, - 0x3a824bfd, 0x3fc395f9, 0x3a8ed139, 0x3fc4a8c1, - 0x3a9b56ab, 0x3fc5b913, 0x3aa7dc52, 0x3fc6c6f0, - 0x3ab4622d, 0x3fc7d258, 0x3ac0e83d, 0x3fc8db4a, - 0x3acd6e81, 0x3fc9e1c6, 0x3ad9f4f8, 0x3fcae5cd, - 0x3ae67ba2, 0x3fcbe75e, 0x3af3027e, 0x3fcce67a, - 0x3aff898c, 0x3fcde320, 0x3b0c10cb, 0x3fcedd50, - 0x3b18983b, 0x3fcfd50b, 0x3b251fdc, 0x3fd0ca4f, - 0x3b31a7ac, 0x3fd1bd1e, 0x3b3e2fac, 0x3fd2ad77, - 0x3b4ab7db, 0x3fd39b5a, 0x3b574039, 0x3fd486c7, - 0x3b63c8c4, 0x3fd56fbe, 0x3b70517d, 0x3fd6563f, - 0x3b7cda63, 0x3fd73a4a, 0x3b896375, 0x3fd81bdf, - 0x3b95ecb4, 0x3fd8fafe, 0x3ba2761e, 0x3fd9d7a7, - 0x3baeffb3, 0x3fdab1d9, 0x3bbb8973, 0x3fdb8996, - 0x3bc8135c, 0x3fdc5edc, 0x3bd49d70, 0x3fdd31ac, - 0x3be127ac, 0x3fde0205, 0x3bedb212, 0x3fdecfe8, - 0x3bfa3c9f, 0x3fdf9b55, 0x3c06c754, 0x3fe0644b, - 0x3c135231, 0x3fe12acb, 0x3c1fdd34, 0x3fe1eed5, - 0x3c2c685d, 0x3fe2b067, 0x3c38f3ac, 0x3fe36f84, - 0x3c457f21, 0x3fe42c2a, 0x3c520aba, 0x3fe4e659, - 0x3c5e9678, 0x3fe59e12, 0x3c6b2259, 0x3fe65354, - 0x3c77ae5e, 0x3fe7061f, 0x3c843a85, 0x3fe7b674, - 0x3c90c6cf, 0x3fe86452, 0x3c9d533b, 0x3fe90fb9, - 0x3ca9dfc8, 0x3fe9b8a9, 0x3cb66c77, 0x3fea5f23, - 0x3cc2f945, 0x3feb0326, 0x3ccf8634, 0x3feba4b2, - 0x3cdc1342, 0x3fec43c7, 0x3ce8a06f, 0x3fece065, - 0x3cf52dbb, 0x3fed7a8c, 0x3d01bb24, 0x3fee123d, - 0x3d0e48ab, 0x3feea776, 0x3d1ad650, 0x3fef3a39, - 0x3d276410, 0x3fefca84, 0x3d33f1ed, 0x3ff05858, - 0x3d407fe6, 0x3ff0e3b6, 0x3d4d0df9, 0x3ff16c9c, - 0x3d599c28, 0x3ff1f30b, 0x3d662a70, 0x3ff27703, - 0x3d72b8d2, 0x3ff2f884, 0x3d7f474d, 0x3ff3778e, - 0x3d8bd5e1, 0x3ff3f420, 0x3d98648d, 0x3ff46e3c, - 0x3da4f351, 0x3ff4e5e0, 0x3db1822c, 0x3ff55b0d, - 0x3dbe111e, 0x3ff5cdc3, 0x3dcaa027, 0x3ff63e01, - 0x3dd72f45, 0x3ff6abc8, 0x3de3be78, 0x3ff71718, - 0x3df04dc0, 0x3ff77ff1, 0x3dfcdd1d, 0x3ff7e652, - 0x3e096c8d, 0x3ff84a3c, 0x3e15fc11, 0x3ff8abae, - 0x3e228ba7, 0x3ff90aaa, 0x3e2f1b50, 0x3ff9672d, - 0x3e3bab0b, 0x3ff9c13a, 0x3e483ad8, 0x3ffa18cf, - 0x3e54cab5, 0x3ffa6dec, 0x3e615aa3, 0x3ffac092, - 0x3e6deaa1, 0x3ffb10c1, 0x3e7a7aae, 0x3ffb5e78, - 0x3e870aca, 0x3ffba9b8, 0x3e939af5, 0x3ffbf280, - 0x3ea02b2e, 0x3ffc38d1, 0x3eacbb74, 0x3ffc7caa, - 0x3eb94bc8, 0x3ffcbe0c, 0x3ec5dc28, 0x3ffcfcf6, - 0x3ed26c94, 0x3ffd3969, 0x3edefd0c, 0x3ffd7364, - 0x3eeb8d8f, 0x3ffdaae7, 0x3ef81e1d, 0x3ffddff3, - 0x3f04aeb5, 0x3ffe1288, 0x3f113f56, 0x3ffe42a4, - 0x3f1dd001, 0x3ffe704a, 0x3f2a60b4, 0x3ffe9b77, - 0x3f36f170, 0x3ffec42d, 0x3f438234, 0x3ffeea6c, - 0x3f5012fe, 0x3fff0e32, 0x3f5ca3d0, 0x3fff2f82, - 0x3f6934a8, 0x3fff4e59, 0x3f75c585, 0x3fff6ab9, - 0x3f825668, 0x3fff84a1, 0x3f8ee750, 0x3fff9c12, - 0x3f9b783c, 0x3fffb10b, 0x3fa8092c, 0x3fffc38c, - 0x3fb49a1f, 0x3fffd396, 0x3fc12b16, 0x3fffe128, - 0x3fcdbc0f, 0x3fffec43, 0x3fda4d09, 0x3ffff4e6, - 0x3fe6de05, 0x3ffffb11, 0x3ff36f02, 0x3ffffec4, -}; - - -/** -* \par -* Generation of realCoefBQ31 array: -* \par -* n = 4096 -*
for (i = 0; i < n; i++)    
-* {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-* } 
-* \par -* Convert to fixed point Q31 format -* round(pBTable[i] * pow(2, 31)) -* -*/ - -static const q31_t realCoefBQ31[8192] = { - 0x40000000, 0x40000000, 0x400c90fe, 0x3ffffec4, - 0x401921fb, 0x3ffffb11, 0x4025b2f7, 0x3ffff4e6, - 0x403243f1, 0x3fffec43, 0x403ed4ea, 0x3fffe128, - 0x404b65e1, 0x3fffd396, 0x4057f6d4, 0x3fffc38c, - 0x406487c4, 0x3fffb10b, 0x407118b0, 0x3fff9c12, - 0x407da998, 0x3fff84a1, 0x408a3a7b, 0x3fff6ab9, - 0x4096cb58, 0x3fff4e59, 0x40a35c30, 0x3fff2f82, - 0x40afed02, 0x3fff0e32, 0x40bc7dcc, 0x3ffeea6c, - 0x40c90e90, 0x3ffec42d, 0x40d59f4c, 0x3ffe9b77, - 0x40e22fff, 0x3ffe704a, 0x40eec0aa, 0x3ffe42a4, - 0x40fb514b, 0x3ffe1288, 0x4107e1e3, 0x3ffddff3, - 0x41147271, 0x3ffdaae7, 0x412102f4, 0x3ffd7364, - 0x412d936c, 0x3ffd3969, 0x413a23d8, 0x3ffcfcf6, - 0x4146b438, 0x3ffcbe0c, 0x4153448c, 0x3ffc7caa, - 0x415fd4d2, 0x3ffc38d1, 0x416c650b, 0x3ffbf280, - 0x4178f536, 0x3ffba9b8, 0x41858552, 0x3ffb5e78, - 0x4192155f, 0x3ffb10c1, 0x419ea55d, 0x3ffac092, - 0x41ab354b, 0x3ffa6dec, 0x41b7c528, 0x3ffa18cf, - 0x41c454f5, 0x3ff9c13a, 0x41d0e4b0, 0x3ff9672d, - 0x41dd7459, 0x3ff90aaa, 0x41ea03ef, 0x3ff8abae, - 0x41f69373, 0x3ff84a3c, 0x420322e3, 0x3ff7e652, - 0x420fb240, 0x3ff77ff1, 0x421c4188, 0x3ff71718, - 0x4228d0bb, 0x3ff6abc8, 0x42355fd9, 0x3ff63e01, - 0x4241eee2, 0x3ff5cdc3, 0x424e7dd4, 0x3ff55b0d, - 0x425b0caf, 0x3ff4e5e0, 0x42679b73, 0x3ff46e3c, - 0x42742a1f, 0x3ff3f420, 0x4280b8b3, 0x3ff3778e, - 0x428d472e, 0x3ff2f884, 0x4299d590, 0x3ff27703, - 0x42a663d8, 0x3ff1f30b, 0x42b2f207, 0x3ff16c9c, - 0x42bf801a, 0x3ff0e3b6, 0x42cc0e13, 0x3ff05858, - 0x42d89bf0, 0x3fefca84, 0x42e529b0, 0x3fef3a39, - 0x42f1b755, 0x3feea776, 0x42fe44dc, 0x3fee123d, - 0x430ad245, 0x3fed7a8c, 0x43175f91, 0x3fece065, - 0x4323ecbe, 0x3fec43c7, 0x433079cc, 0x3feba4b2, - 0x433d06bb, 0x3feb0326, 0x43499389, 0x3fea5f23, - 0x43562038, 0x3fe9b8a9, 0x4362acc5, 0x3fe90fb9, - 0x436f3931, 0x3fe86452, 0x437bc57b, 0x3fe7b674, - 0x438851a2, 0x3fe7061f, 0x4394dda7, 0x3fe65354, - 0x43a16988, 0x3fe59e12, 0x43adf546, 0x3fe4e659, - 0x43ba80df, 0x3fe42c2a, 0x43c70c54, 0x3fe36f84, - 0x43d397a3, 0x3fe2b067, 0x43e022cc, 0x3fe1eed5, - 0x43ecadcf, 0x3fe12acb, 0x43f938ac, 0x3fe0644b, - 0x4405c361, 0x3fdf9b55, 0x44124dee, 0x3fdecfe8, - 0x441ed854, 0x3fde0205, 0x442b6290, 0x3fdd31ac, - 0x4437eca4, 0x3fdc5edc, 0x4444768d, 0x3fdb8996, - 0x4451004d, 0x3fdab1d9, 0x445d89e2, 0x3fd9d7a7, - 0x446a134c, 0x3fd8fafe, 0x44769c8b, 0x3fd81bdf, - 0x4483259d, 0x3fd73a4a, 0x448fae83, 0x3fd6563f, - 0x449c373c, 0x3fd56fbe, 0x44a8bfc7, 0x3fd486c7, - 0x44b54825, 0x3fd39b5a, 0x44c1d054, 0x3fd2ad77, - 0x44ce5854, 0x3fd1bd1e, 0x44dae024, 0x3fd0ca4f, - 0x44e767c5, 0x3fcfd50b, 0x44f3ef35, 0x3fcedd50, - 0x45007674, 0x3fcde320, 0x450cfd82, 0x3fcce67a, - 0x4519845e, 0x3fcbe75e, 0x45260b08, 0x3fcae5cd, - 0x4532917f, 0x3fc9e1c6, 0x453f17c3, 0x3fc8db4a, - 0x454b9dd3, 0x3fc7d258, 0x455823ae, 0x3fc6c6f0, - 0x4564a955, 0x3fc5b913, 0x45712ec7, 0x3fc4a8c1, - 0x457db403, 0x3fc395f9, 0x458a3908, 0x3fc280bc, - 0x4596bdd7, 0x3fc1690a, 0x45a3426f, 0x3fc04ee3, - 0x45afc6d0, 0x3fbf3246, 0x45bc4af8, 0x3fbe1334, - 0x45c8cee7, 0x3fbcf1ad, 0x45d5529e, 0x3fbbcdb1, - 0x45e1d61b, 0x3fbaa740, 0x45ee595d, 0x3fb97e5a, - 0x45fadc66, 0x3fb852ff, 0x46075f33, 0x3fb7252f, - 0x4613e1c5, 0x3fb5f4ea, 0x4620641a, 0x3fb4c231, - 0x462ce634, 0x3fb38d02, 0x46396810, 0x3fb2555f, - 0x4645e9af, 0x3fb11b48, 0x46526b10, 0x3fafdebb, - 0x465eec33, 0x3fae9fbb, 0x466b6d16, 0x3fad5e45, - 0x4677edbb, 0x3fac1a5b, 0x46846e1f, 0x3faad3fd, - 0x4690ee44, 0x3fa98b2a, 0x469d6e27, 0x3fa83fe3, - 0x46a9edc9, 0x3fa6f228, 0x46b66d29, 0x3fa5a1f9, - 0x46c2ec48, 0x3fa44f55, 0x46cf6b23, 0x3fa2fa3d, - 0x46dbe9bb, 0x3fa1a2b2, 0x46e86810, 0x3fa048b2, - 0x46f4e620, 0x3f9eec3e, 0x470163eb, 0x3f9d8d56, - 0x470de172, 0x3f9c2bfb, 0x471a5eb3, 0x3f9ac82c, - 0x4726dbae, 0x3f9961e8, 0x47335862, 0x3f97f932, - 0x473fd4cf, 0x3f968e07, 0x474c50f4, 0x3f952069, - 0x4758ccd2, 0x3f93b058, 0x47654867, 0x3f923dd2, - 0x4771c3b3, 0x3f90c8da, 0x477e3eb5, 0x3f8f516e, - 0x478ab96e, 0x3f8dd78f, 0x479733dc, 0x3f8c5b3d, - 0x47a3adff, 0x3f8adc77, 0x47b027d7, 0x3f895b3e, - 0x47bca163, 0x3f87d792, 0x47c91aa3, 0x3f865174, - 0x47d59396, 0x3f84c8e2, 0x47e20c3b, 0x3f833ddd, - 0x47ee8493, 0x3f81b065, 0x47fafc9c, 0x3f80207b, - 0x48077457, 0x3f7e8e1e, 0x4813ebc2, 0x3f7cf94e, - 0x482062de, 0x3f7b620c, 0x482cd9a9, 0x3f79c857, - 0x48395024, 0x3f782c30, 0x4845c64d, 0x3f768d96, - 0x48523c25, 0x3f74ec8a, 0x485eb1ab, 0x3f73490b, - 0x486b26de, 0x3f71a31b, 0x48779bbe, 0x3f6ffab8, - 0x4884104b, 0x3f6e4fe3, 0x48908483, 0x3f6ca29c, - 0x489cf867, 0x3f6af2e3, 0x48a96bf6, 0x3f6940b8, - 0x48b5df30, 0x3f678c1c, 0x48c25213, 0x3f65d50d, - 0x48cec4a0, 0x3f641b8d, 0x48db36d6, 0x3f625f9b, - 0x48e7a8b5, 0x3f60a138, 0x48f41a3c, 0x3f5ee063, - 0x49008b6a, 0x3f5d1d1d, 0x490cfc40, 0x3f5b5765, - 0x49196cbc, 0x3f598f3c, 0x4925dcdf, 0x3f57c4a2, - 0x49324ca7, 0x3f55f796, 0x493ebc14, 0x3f54281a, - 0x494b2b27, 0x3f52562c, 0x495799dd, 0x3f5081cd, - 0x49640837, 0x3f4eaafe, 0x49707635, 0x3f4cd1be, - 0x497ce3d5, 0x3f4af60d, 0x49895118, 0x3f4917eb, - 0x4995bdfd, 0x3f473759, 0x49a22a83, 0x3f455456, - 0x49ae96aa, 0x3f436ee3, 0x49bb0271, 0x3f4186ff, - 0x49c76dd8, 0x3f3f9cab, 0x49d3d8df, 0x3f3dafe7, - 0x49e04385, 0x3f3bc0b3, 0x49ecadc9, 0x3f39cf0e, - 0x49f917ac, 0x3f37dafa, 0x4a05812c, 0x3f35e476, - 0x4a11ea49, 0x3f33eb81, 0x4a1e5303, 0x3f31f01d, - 0x4a2abb59, 0x3f2ff24a, 0x4a37234a, 0x3f2df206, - 0x4a438ad7, 0x3f2bef53, 0x4a4ff1fe, 0x3f29ea31, - 0x4a5c58c0, 0x3f27e29f, 0x4a68bf1b, 0x3f25d89e, - 0x4a752510, 0x3f23cc2e, 0x4a818a9d, 0x3f21bd4e, - 0x4a8defc3, 0x3f1fabff, 0x4a9a5480, 0x3f1d9842, - 0x4aa6b8d5, 0x3f1b8215, 0x4ab31cc1, 0x3f19697a, - 0x4abf8043, 0x3f174e70, 0x4acbe35b, 0x3f1530f7, - 0x4ad84609, 0x3f13110f, 0x4ae4a84b, 0x3f10eeb9, - 0x4af10a22, 0x3f0ec9f5, 0x4afd6b8d, 0x3f0ca2c2, - 0x4b09cc8c, 0x3f0a7921, 0x4b162d1d, 0x3f084d12, - 0x4b228d42, 0x3f061e95, 0x4b2eecf8, 0x3f03eda9, - 0x4b3b4c40, 0x3f01ba50, 0x4b47ab19, 0x3eff8489, - 0x4b540982, 0x3efd4c54, 0x4b60677c, 0x3efb11b1, - 0x4b6cc506, 0x3ef8d4a1, 0x4b79221f, 0x3ef69523, - 0x4b857ec7, 0x3ef45338, 0x4b91dafc, 0x3ef20ee0, - 0x4b9e36c0, 0x3eefc81a, 0x4baa9211, 0x3eed7ee7, - 0x4bb6ecef, 0x3eeb3347, 0x4bc34759, 0x3ee8e53a, - 0x4bcfa150, 0x3ee694c1, 0x4bdbfad1, 0x3ee441da, - 0x4be853de, 0x3ee1ec87, 0x4bf4ac75, 0x3edf94c7, - 0x4c010496, 0x3edd3a9a, 0x4c0d5c41, 0x3edade01, - 0x4c19b374, 0x3ed87efc, 0x4c260a31, 0x3ed61d8a, - 0x4c326075, 0x3ed3b9ad, 0x4c3eb641, 0x3ed15363, - 0x4c4b0b94, 0x3eceeaad, 0x4c57606e, 0x3ecc7f8b, - 0x4c63b4ce, 0x3eca11fe, 0x4c7008b3, 0x3ec7a205, - 0x4c7c5c1e, 0x3ec52fa0, 0x4c88af0e, 0x3ec2bad0, - 0x4c950182, 0x3ec04394, 0x4ca1537a, 0x3ebdc9ed, - 0x4cada4f5, 0x3ebb4ddb, 0x4cb9f5f3, 0x3eb8cf5d, - 0x4cc64673, 0x3eb64e75, 0x4cd29676, 0x3eb3cb21, - 0x4cdee5f9, 0x3eb14563, 0x4ceb34fe, 0x3eaebd3a, - 0x4cf78383, 0x3eac32a6, 0x4d03d189, 0x3ea9a5a8, - 0x4d101f0e, 0x3ea7163f, 0x4d1c6c11, 0x3ea4846c, - 0x4d28b894, 0x3ea1f02f, 0x4d350495, 0x3e9f5988, - 0x4d415013, 0x3e9cc076, 0x4d4d9b0e, 0x3e9a24fb, - 0x4d59e586, 0x3e978715, 0x4d662f7b, 0x3e94e6c6, - 0x4d7278eb, 0x3e92440d, 0x4d7ec1d6, 0x3e8f9eeb, - 0x4d8b0a3d, 0x3e8cf75f, 0x4d97521d, 0x3e8a4d6a, - 0x4da39978, 0x3e87a10c, 0x4dafe04b, 0x3e84f245, - 0x4dbc2698, 0x3e824114, 0x4dc86c5d, 0x3e7f8d7b, - 0x4dd4b19a, 0x3e7cd778, 0x4de0f64f, 0x3e7a1f0d, - 0x4ded3a7b, 0x3e77643a, 0x4df97e1d, 0x3e74a6fd, - 0x4e05c135, 0x3e71e759, 0x4e1203c3, 0x3e6f254c, - 0x4e1e45c6, 0x3e6c60d7, 0x4e2a873e, 0x3e6999fa, - 0x4e36c82a, 0x3e66d0b4, 0x4e430889, 0x3e640507, - 0x4e4f485c, 0x3e6136f3, 0x4e5b87a2, 0x3e5e6676, - 0x4e67c65a, 0x3e5b9392, 0x4e740483, 0x3e58be47, - 0x4e80421e, 0x3e55e694, 0x4e8c7f2a, 0x3e530c7a, - 0x4e98bba7, 0x3e502ff9, 0x4ea4f793, 0x3e4d5110, - 0x4eb132ef, 0x3e4a6fc1, 0x4ebd6db9, 0x3e478c0b, - 0x4ec9a7f3, 0x3e44a5ef, 0x4ed5e19a, 0x3e41bd6c, - 0x4ee21aaf, 0x3e3ed282, 0x4eee5331, 0x3e3be532, - 0x4efa8b20, 0x3e38f57c, 0x4f06c27a, 0x3e360360, - 0x4f12f941, 0x3e330ede, 0x4f1f2f73, 0x3e3017f6, - 0x4f2b650f, 0x3e2d1ea8, 0x4f379a16, 0x3e2a22f4, - 0x4f43ce86, 0x3e2724db, 0x4f500260, 0x3e24245d, - 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0x4bcfa150, 0xc1196b3f, 0x4bc34759, 0xc1171ac6, - 0x4bb6ecef, 0xc114ccb9, 0x4baa9211, 0xc1128119, - 0x4b9e36c0, 0xc11037e6, 0x4b91dafc, 0xc10df120, - 0x4b857ec7, 0xc10bacc8, 0x4b79221f, 0xc1096add, - 0x4b6cc506, 0xc1072b5f, 0x4b60677c, 0xc104ee4f, - 0x4b540982, 0xc102b3ac, 0x4b47ab19, 0xc1007b77, - 0x4b3b4c40, 0xc0fe45b0, 0x4b2eecf8, 0xc0fc1257, - 0x4b228d42, 0xc0f9e16b, 0x4b162d1d, 0xc0f7b2ee, - 0x4b09cc8c, 0xc0f586df, 0x4afd6b8d, 0xc0f35d3e, - 0x4af10a22, 0xc0f1360b, 0x4ae4a84b, 0xc0ef1147, - 0x4ad84609, 0xc0eceef1, 0x4acbe35b, 0xc0eacf09, - 0x4abf8043, 0xc0e8b190, 0x4ab31cc1, 0xc0e69686, - 0x4aa6b8d5, 0xc0e47deb, 0x4a9a5480, 0xc0e267be, - 0x4a8defc3, 0xc0e05401, 0x4a818a9d, 0xc0de42b2, - 0x4a752510, 0xc0dc33d2, 0x4a68bf1b, 0xc0da2762, - 0x4a5c58c0, 0xc0d81d61, 0x4a4ff1fe, 0xc0d615cf, - 0x4a438ad7, 0xc0d410ad, 0x4a37234a, 0xc0d20dfa, - 0x4a2abb59, 0xc0d00db6, 0x4a1e5303, 0xc0ce0fe3, - 0x4a11ea49, 0xc0cc147f, 0x4a05812c, 0xc0ca1b8a, - 0x49f917ac, 0xc0c82506, 0x49ecadc9, 0xc0c630f2, - 0x49e04385, 0xc0c43f4d, 0x49d3d8df, 0xc0c25019, - 0x49c76dd8, 0xc0c06355, 0x49bb0271, 0xc0be7901, - 0x49ae96aa, 0xc0bc911d, 0x49a22a83, 0xc0baabaa, - 0x4995bdfd, 0xc0b8c8a7, 0x49895118, 0xc0b6e815, - 0x497ce3d5, 0xc0b509f3, 0x49707635, 0xc0b32e42, - 0x49640837, 0xc0b15502, 0x495799dd, 0xc0af7e33, - 0x494b2b27, 0xc0ada9d4, 0x493ebc14, 0xc0abd7e6, - 0x49324ca7, 0xc0aa086a, 0x4925dcdf, 0xc0a83b5e, - 0x49196cbc, 0xc0a670c4, 0x490cfc40, 0xc0a4a89b, - 0x49008b6a, 0xc0a2e2e3, 0x48f41a3c, 0xc0a11f9d, - 0x48e7a8b5, 0xc09f5ec8, 0x48db36d6, 0xc09da065, - 0x48cec4a0, 0xc09be473, 0x48c25213, 0xc09a2af3, - 0x48b5df30, 0xc09873e4, 0x48a96bf6, 0xc096bf48, - 0x489cf867, 0xc0950d1d, 0x48908483, 0xc0935d64, - 0x4884104b, 0xc091b01d, 0x48779bbe, 0xc0900548, - 0x486b26de, 0xc08e5ce5, 0x485eb1ab, 0xc08cb6f5, - 0x48523c25, 0xc08b1376, 0x4845c64d, 0xc089726a, - 0x48395024, 0xc087d3d0, 0x482cd9a9, 0xc08637a9, - 0x482062de, 0xc0849df4, 0x4813ebc2, 0xc08306b2, - 0x48077457, 0xc08171e2, 0x47fafc9c, 0xc07fdf85, - 0x47ee8493, 0xc07e4f9b, 0x47e20c3b, 0xc07cc223, - 0x47d59396, 0xc07b371e, 0x47c91aa3, 0xc079ae8c, - 0x47bca163, 0xc078286e, 0x47b027d7, 0xc076a4c2, - 0x47a3adff, 0xc0752389, 0x479733dc, 0xc073a4c3, - 0x478ab96e, 0xc0722871, 0x477e3eb5, 0xc070ae92, - 0x4771c3b3, 0xc06f3726, 0x47654867, 0xc06dc22e, - 0x4758ccd2, 0xc06c4fa8, 0x474c50f4, 0xc06adf97, - 0x473fd4cf, 0xc06971f9, 0x47335862, 0xc06806ce, - 0x4726dbae, 0xc0669e18, 0x471a5eb3, 0xc06537d4, - 0x470de172, 0xc063d405, 0x470163eb, 0xc06272aa, - 0x46f4e620, 0xc06113c2, 0x46e86810, 0xc05fb74e, - 0x46dbe9bb, 0xc05e5d4e, 0x46cf6b23, 0xc05d05c3, - 0x46c2ec48, 0xc05bb0ab, 0x46b66d29, 0xc05a5e07, - 0x46a9edc9, 0xc0590dd8, 0x469d6e27, 0xc057c01d, - 0x4690ee44, 0xc05674d6, 0x46846e1f, 0xc0552c03, - 0x4677edbb, 0xc053e5a5, 0x466b6d16, 0xc052a1bb, - 0x465eec33, 0xc0516045, 0x46526b10, 0xc0502145, - 0x4645e9af, 0xc04ee4b8, 0x46396810, 0xc04daaa1, - 0x462ce634, 0xc04c72fe, 0x4620641a, 0xc04b3dcf, - 0x4613e1c5, 0xc04a0b16, 0x46075f33, 0xc048dad1, - 0x45fadc66, 0xc047ad01, 0x45ee595d, 0xc04681a6, - 0x45e1d61b, 0xc04558c0, 0x45d5529e, 0xc044324f, - 0x45c8cee7, 0xc0430e53, 0x45bc4af8, 0xc041eccc, - 0x45afc6d0, 0xc040cdba, 0x45a3426f, 0xc03fb11d, - 0x4596bdd7, 0xc03e96f6, 0x458a3908, 0xc03d7f44, - 0x457db403, 0xc03c6a07, 0x45712ec7, 0xc03b573f, - 0x4564a955, 0xc03a46ed, 0x455823ae, 0xc0393910, - 0x454b9dd3, 0xc0382da8, 0x453f17c3, 0xc03724b6, - 0x4532917f, 0xc0361e3a, 0x45260b08, 0xc0351a33, - 0x4519845e, 0xc03418a2, 0x450cfd82, 0xc0331986, - 0x45007674, 0xc0321ce0, 0x44f3ef35, 0xc03122b0, - 0x44e767c5, 0xc0302af5, 0x44dae024, 0xc02f35b1, - 0x44ce5854, 0xc02e42e2, 0x44c1d054, 0xc02d5289, - 0x44b54825, 0xc02c64a6, 0x44a8bfc7, 0xc02b7939, - 0x449c373c, 0xc02a9042, 0x448fae83, 0xc029a9c1, - 0x4483259d, 0xc028c5b6, 0x44769c8b, 0xc027e421, - 0x446a134c, 0xc0270502, 0x445d89e2, 0xc0262859, - 0x4451004d, 0xc0254e27, 0x4444768d, 0xc024766a, - 0x4437eca4, 0xc023a124, 0x442b6290, 0xc022ce54, - 0x441ed854, 0xc021fdfb, 0x44124dee, 0xc0213018, - 0x4405c361, 0xc02064ab, 0x43f938ac, 0xc01f9bb5, - 0x43ecadcf, 0xc01ed535, 0x43e022cc, 0xc01e112b, - 0x43d397a3, 0xc01d4f99, 0x43c70c54, 0xc01c907c, - 0x43ba80df, 0xc01bd3d6, 0x43adf546, 0xc01b19a7, - 0x43a16988, 0xc01a61ee, 0x4394dda7, 0xc019acac, - 0x438851a2, 0xc018f9e1, 0x437bc57b, 0xc018498c, - 0x436f3931, 0xc0179bae, 0x4362acc5, 0xc016f047, - 0x43562038, 0xc0164757, 0x43499389, 0xc015a0dd, - 0x433d06bb, 0xc014fcda, 0x433079cc, 0xc0145b4e, - 0x4323ecbe, 0xc013bc39, 0x43175f91, 0xc0131f9b, - 0x430ad245, 0xc0128574, 0x42fe44dc, 0xc011edc3, - 0x42f1b755, 0xc011588a, 0x42e529b0, 0xc010c5c7, - 0x42d89bf0, 0xc010357c, 0x42cc0e13, 0xc00fa7a8, - 0x42bf801a, 0xc00f1c4a, 0x42b2f207, 0xc00e9364, - 0x42a663d8, 0xc00e0cf5, 0x4299d590, 0xc00d88fd, - 0x428d472e, 0xc00d077c, 0x4280b8b3, 0xc00c8872, - 0x42742a1f, 0xc00c0be0, 0x42679b73, 0xc00b91c4, - 0x425b0caf, 0xc00b1a20, 0x424e7dd4, 0xc00aa4f3, - 0x4241eee2, 0xc00a323d, 0x42355fd9, 0xc009c1ff, - 0x4228d0bb, 0xc0095438, 0x421c4188, 0xc008e8e8, - 0x420fb240, 0xc008800f, 0x420322e3, 0xc00819ae, - 0x41f69373, 0xc007b5c4, 0x41ea03ef, 0xc0075452, - 0x41dd7459, 0xc006f556, 0x41d0e4b0, 0xc00698d3, - 0x41c454f5, 0xc0063ec6, 0x41b7c528, 0xc005e731, - 0x41ab354b, 0xc0059214, 0x419ea55d, 0xc0053f6e, - 0x4192155f, 0xc004ef3f, 0x41858552, 0xc004a188, - 0x4178f536, 0xc0045648, 0x416c650b, 0xc0040d80, - 0x415fd4d2, 0xc003c72f, 0x4153448c, 0xc0038356, - 0x4146b438, 0xc00341f4, 0x413a23d8, 0xc003030a, - 0x412d936c, 0xc002c697, 0x412102f4, 0xc0028c9c, - 0x41147271, 0xc0025519, 0x4107e1e3, 0xc002200d, - 0x40fb514b, 0xc001ed78, 0x40eec0aa, 0xc001bd5c, - 0x40e22fff, 0xc0018fb6, 0x40d59f4c, 0xc0016489, - 0x40c90e90, 0xc0013bd3, 0x40bc7dcc, 0xc0011594, - 0x40afed02, 0xc000f1ce, 0x40a35c30, 0xc000d07e, - 0x4096cb58, 0xc000b1a7, 0x408a3a7b, 0xc0009547, - 0x407da998, 0xc0007b5f, 0x407118b0, 0xc00063ee, - 0x406487c4, 0xc0004ef5, 0x4057f6d4, 0xc0003c74, - 0x404b65e1, 0xc0002c6a, 0x403ed4ea, 0xc0001ed8, - 0x403243f1, 0xc00013bd, 0x4025b2f7, 0xc0000b1a, - 0x401921fb, 0xc00004ef, 0x400c90fe, 0xc000013c, -}; - -/** -* @brief Initialization function for the Q31 RFFT/RIFFT. -* @param[in, out] *S points to an instance of the Q31 RFFT/RIFFT structure. -* @param[in, out] *S_CFFT points to an instance of the Q31 CFFT/CIFFT structure. -* @param[in] fftLenReal length of the FFT. -* @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. -* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. -* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value. -* -* \par Description: -* \par -* The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048. -* \par -* The parameter ifftFlagR controls whether a forward or inverse transform is computed. -* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. -* \par -* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. -* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. -* \par -* This function also initializes Twiddle factor table. -*/ - -arm_status arm_rfft_init_q31( - arm_rfft_instance_q31 * S, - arm_cfft_radix4_instance_q31 * S_CFFT, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialize the Real FFT length */ - S->fftLenReal = (uint16_t) fftLenReal; - - /* Initialize the Complex FFT length */ - S->fftLenBy2 = (uint16_t) fftLenReal / 2u; - - /* Initialize the Twiddle coefficientA pointer */ - S->pTwiddleAReal = (q31_t *) realCoefAQ31; - - /* Initialize the Twiddle coefficientB pointer */ - S->pTwiddleBReal = (q31_t *) realCoefBQ31; - - /* Initialize the Flag for selection of RFFT or RIFFT */ - S->ifftFlagR = (uint8_t) ifftFlagR; - - /* Initialize the Flag for calculation Bit reversal or not */ - S->bitReverseFlagR = (uint8_t) bitReverseFlag; - - /* Initialization of coef modifier depending on the FFT length */ - switch (S->fftLenReal) - { - case 8192: - S->twidCoefRModifier = 1u; - break; - case 2048u: - S->twidCoefRModifier = 4u; - break; - case 512u: - S->twidCoefRModifier = 16u; - break; - case 128u: - S->twidCoefRModifier = 64u; - break; - default: - /* Reporting argument error if rfftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - /* Init Complex FFT Instance */ - S->pCfft = S_CFFT; - - if(S->ifftFlagR) - { - /* Initializes the CIFFT Module for fftLenreal/2 length */ - arm_cfft_radix4_init_q31(S->pCfft, (uint16_t) S->fftLenBy2, 1u, 1u); - } - else - { - /* Initializes the CFFT Module for fftLenreal/2 length */ - arm_cfft_radix4_init_q31(S->pCfft, (uint16_t) S->fftLenBy2, 0u, 1u); - } - - /* return the status of RFFT Init function */ - return (status); - -} - - /** - * @} end of RFFT_RIFFT group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c deleted file mode 100644 index a307ecd215..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c +++ /dev/null @@ -1,460 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_rfft_q15.c -* -* Description: RFFT & RIFFT Q15 process function -* -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -/*-------------------------------------------------------------------- -* Internal functions prototypes ---------------------------------------------------------------------*/ - -void arm_split_rfft_q15( - q15_t * pSrc, - uint32_t fftLen, - q15_t * pATable, - q15_t * pBTable, - q15_t * pDst, - uint32_t modifier); - -void arm_split_rifft_q15( - q15_t * pSrc, - uint32_t fftLen, - q15_t * pATable, - q15_t * pBTable, - q15_t * pDst, - uint32_t modifier); - -/** - * @addtogroup RFFT_RIFFT - * @{ - */ - -/** - * @brief Processing function for the Q15 RFFT/RIFFT. - * @param[in] *S points to an instance of the Q15 RFFT/RIFFT structure. - * @param[in] *pSrc points to the input buffer. - * @param[out] *pDst points to the output buffer. - * @return none. - * - * \par Input an output formats: - * \par - * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. - * Hence the output format is different for different RFFT sizes. - * The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT: - * \par - * \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT" - * \par - * \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT" - */ - -void arm_rfft_q15( - const arm_rfft_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst) -{ - const arm_cfft_radix4_instance_q15 *S_CFFT = S->pCfft; - - /* Calculation of RIFFT of input */ - if(S->ifftFlagR == 1u) - { - /* Real IFFT core process */ - arm_split_rifft_q15(pSrc, S->fftLenBy2, S->pTwiddleAReal, - S->pTwiddleBReal, pDst, S->twidCoefRModifier); - - /* Complex readix-4 IFFT process */ - arm_radix4_butterfly_inverse_q15(pDst, S_CFFT->fftLen, - S_CFFT->pTwiddle, - S_CFFT->twidCoefModifier); - - /* Bit reversal process */ - if(S->bitReverseFlagR == 1u) - { - arm_bitreversal_q15(pDst, S_CFFT->fftLen, - S_CFFT->bitRevFactor, S_CFFT->pBitRevTable); - } - } - else - { - /* Calculation of RFFT of input */ - - /* Complex readix-4 FFT process */ - arm_radix4_butterfly_q15(pSrc, S_CFFT->fftLen, - S_CFFT->pTwiddle, S_CFFT->twidCoefModifier); - - /* Bit reversal process */ - if(S->bitReverseFlagR == 1u) - { - arm_bitreversal_q15(pSrc, S_CFFT->fftLen, - S_CFFT->bitRevFactor, S_CFFT->pBitRevTable); - } - - arm_split_rfft_q15(pSrc, S->fftLenBy2, S->pTwiddleAReal, - S->pTwiddleBReal, pDst, S->twidCoefRModifier); - } - -} - - /** - * @} end of RFFT_RIFFT group - */ - -/** - * @brief Core Real FFT process - * @param *pSrc points to the input buffer. - * @param fftLen length of FFT. - * @param *pATable points to the A twiddle Coef buffer. - * @param *pBTable points to the B twiddle Coef buffer. - * @param *pDst points to the output buffer. - * @param modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - * The function implements a Real FFT - */ - -void arm_split_rfft_q15( - q15_t * pSrc, - uint32_t fftLen, - q15_t * pATable, - q15_t * pBTable, - q15_t * pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - q31_t outR, outI; /* Temporary variables for output */ - q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q15_t *pSrc1, *pSrc2; - - -// pSrc[2u * fftLen] = pSrc[0]; -// pSrc[(2u * fftLen) + 1u] = pSrc[1]; - - pCoefA = &pATable[modifier * 2u]; - pCoefB = &pBTable[modifier * 2u]; - - pSrc1 = &pSrc[2]; - pSrc2 = &pSrc[(2u * fftLen) - 2u]; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - i = 1u; - - while(i < fftLen) - { - /* - outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] - + pSrc[2 * n - 2 * i] * pBTable[2 * i] + - pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - */ - - /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] + - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */ - - -#ifndef ARM_MATH_BIG_ENDIAN - - /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */ - outR = __SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA)); - -#else - - /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */ - outR = -(__SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA))); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* pSrc[2 * n - 2 * i] * pBTable[2 * i] + - pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */ - outR = __SMLAD(*__SIMD32(pSrc2), *__SIMD32(pCoefB), outR) >> 15u; - - /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ - -#ifndef ARM_MATH_BIG_ENDIAN - - outI = __SMUSDX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB)); - -#else - - outI = __SMUSDX(*__SIMD32(pCoefB), *__SIMD32(pSrc2)--); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */ - outI = __SMLADX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), outI); - - /* write output */ - pDst[2u * i] = (q15_t) outR; - pDst[(2u * i) + 1u] = outI >> 15u; - - /* write complex conjugate output */ - pDst[(4u * fftLen) - (2u * i)] = (q15_t) outR; - pDst[((4u * fftLen) - (2u * i)) + 1u] = -(outI >> 15u); - - /* update coefficient pointer */ - pCoefB = pCoefB + (2u * modifier); - pCoefA = pCoefA + (2u * modifier); - - i++; - - } - - pDst[2u * fftLen] = pSrc[0] - pSrc[1]; - pDst[(2u * fftLen) + 1u] = 0; - - pDst[0] = pSrc[0] + pSrc[1]; - pDst[1] = 0; - - -#else - - /* Run the below code for Cortex-M0 */ - - i = 1u; - - while(i < fftLen) - { - /* - outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] - + pSrc[2 * n - 2 * i] * pBTable[2 * i] + - pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - */ - - outR = *pSrc1 * *pCoefA; - outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1)); - outR = outR + (*pSrc2 * *pCoefB); - outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 15; - - - /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] + - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); - */ - - outI = *pSrc2 * *(pCoefB + 1); - outI = outI - (*(pSrc2 + 1) * *pCoefB); - outI = outI + (*(pSrc1 + 1) * *pCoefA); - outI = outI + (*pSrc1 * *(pCoefA + 1)); - - /* update input pointers */ - pSrc1 += 2u; - pSrc2 -= 2u; - - /* write output */ - pDst[2u * i] = (q15_t) outR; - pDst[(2u * i) + 1u] = outI >> 15u; - - /* write complex conjugate output */ - pDst[(4u * fftLen) - (2u * i)] = (q15_t) outR; - pDst[((4u * fftLen) - (2u * i)) + 1u] = -(outI >> 15u); - - /* update coefficient pointer */ - pCoefB = pCoefB + (2u * modifier); - pCoefA = pCoefA + (2u * modifier); - - i++; - - } - - pDst[2u * fftLen] = pSrc[0] - pSrc[1]; - pDst[(2u * fftLen) + 1u] = 0; - - pDst[0] = pSrc[0] + pSrc[1]; - pDst[1] = 0; - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - - -/** - * @brief Core Real IFFT process - * @param[in] *pSrc points to the input buffer. - * @param[in] fftLen length of FFT. - * @param[in] *pATable points to the twiddle Coef A buffer. - * @param[in] *pBTable points to the twiddle Coef B buffer. - * @param[out] *pDst points to the output buffer. - * @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - * The function implements a Real IFFT - */ -void arm_split_rifft_q15( - q15_t * pSrc, - uint32_t fftLen, - q15_t * pATable, - q15_t * pBTable, - q15_t * pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - q31_t outR, outI; /* Temporary variables for output */ - q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q15_t *pSrc1, *pSrc2; - q15_t *pDst1 = &pDst[0]; - - pCoefA = &pATable[0]; - pCoefB = &pBTable[0]; - - pSrc1 = &pSrc[0]; - pSrc2 = &pSrc[2u * fftLen]; - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - i = fftLen; - - while(i > 0u) - { - - /* - outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + - pIn[2 * n - 2 * i] * pBTable[2 * i] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - - outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] - - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); - - */ - - -#ifndef ARM_MATH_BIG_ENDIAN - - /* pIn[2 * n - 2 * i] * pBTable[2 * i] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */ - outR = __SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB)); - -#else - - /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] + - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */ - outR = -(__SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB))); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + - pIn[2 * n - 2 * i] * pBTable[2 * i] */ - outR = __SMLAD(*__SIMD32(pSrc1), *__SIMD32(pCoefA), outR) >> 15u; - - /* - -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] + - pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ - outI = __SMUADX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB)); - - /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */ - -#ifndef ARM_MATH_BIG_ENDIAN - - outI = __SMLSDX(*__SIMD32(pCoefA), *__SIMD32(pSrc1)++, -outI); - -#else - - outI = __SMLSDX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), -outI); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - /* write output */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst1)++ = __PKHBT(outR, (outI >> 15u), 16); - -#else - - *__SIMD32(pDst1)++ = __PKHBT((outI >> 15u), outR, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* update coefficient pointer */ - pCoefB = pCoefB + (2u * modifier); - pCoefA = pCoefA + (2u * modifier); - - i--; - - } - - -#else - - /* Run the below code for Cortex-M0 */ - - i = fftLen; - - while(i > 0u) - { - - /* - outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + - pIn[2 * n - 2 * i] * pBTable[2 * i] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - */ - - outR = *pSrc2 * *pCoefB; - outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1)); - outR = outR + (*pSrc1 * *pCoefA); - outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 15; - - /* - outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] - - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); - */ - - outI = *(pSrc1 + 1) * *pCoefA; - outI = outI - (*pSrc1 * *(pCoefA + 1)); - outI = outI - (*pSrc2 * *(pCoefB + 1)); - outI = outI - (*(pSrc2 + 1) * *(pCoefB)); - - /* update input pointers */ - pSrc1 += 2u; - pSrc2 -= 2u; - - /* write output */ - *pDst1++ = (q15_t) outR; - *pDst1++ = (q15_t) (outI >> 15); - - /* update coefficient pointer */ - pCoefB = pCoefB + (2u * modifier); - pCoefA = pCoefA + (2u * modifier); - - i--; - - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c deleted file mode 100644 index c50c2951a5..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c +++ /dev/null @@ -1,326 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_rfft_q31.c -* -* Description: RFFT & RIFFT Q31 process function -* -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/*-------------------------------------------------------------------- -* Internal functions prototypes ---------------------------------------------------------------------*/ - -void arm_split_rfft_q31( - q31_t * pSrc, - uint32_t fftLen, - q31_t * pATable, - q31_t * pBTable, - q31_t * pDst, - uint32_t modifier); - -void arm_split_rifft_q31( - q31_t * pSrc, - uint32_t fftLen, - q31_t * pATable, - q31_t * pBTable, - q31_t * pDst, - uint32_t modifier); - -/** - * @addtogroup RFFT_RIFFT - * @{ - */ - -/** - * @brief Processing function for the Q31 RFFT/RIFFT. - * @param[in] *S points to an instance of the Q31 RFFT/RIFFT structure. - * @param[in] *pSrc points to the input buffer. - * @param[out] *pDst points to the output buffer. - * @return none. - * - * \par Input an output formats: - * \par - * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. - * Hence the output format is different for different RFFT sizes. - * The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT: - * \par - * \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT" - * - * \par - * \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT" - */ - -void arm_rfft_q31( - const arm_rfft_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst) -{ - const arm_cfft_radix4_instance_q31 *S_CFFT = S->pCfft; - - /* Calculation of RIFFT of input */ - if(S->ifftFlagR == 1u) - { - /* Real IFFT core process */ - arm_split_rifft_q31(pSrc, S->fftLenBy2, S->pTwiddleAReal, - S->pTwiddleBReal, pDst, S->twidCoefRModifier); - - /* Complex readix-4 IFFT process */ - arm_radix4_butterfly_inverse_q31(pDst, S_CFFT->fftLen, - S_CFFT->pTwiddle, - S_CFFT->twidCoefModifier); - /* Bit reversal process */ - if(S->bitReverseFlagR == 1u) - { - arm_bitreversal_q31(pDst, S_CFFT->fftLen, - S_CFFT->bitRevFactor, S_CFFT->pBitRevTable); - } - } - else - { - /* Calculation of RFFT of input */ - - /* Complex readix-4 FFT process */ - arm_radix4_butterfly_q31(pSrc, S_CFFT->fftLen, - S_CFFT->pTwiddle, S_CFFT->twidCoefModifier); - - /* Bit reversal process */ - if(S->bitReverseFlagR == 1u) - { - arm_bitreversal_q31(pSrc, S_CFFT->fftLen, - S_CFFT->bitRevFactor, S_CFFT->pBitRevTable); - } - - /* Real FFT core process */ - arm_split_rfft_q31(pSrc, S->fftLenBy2, S->pTwiddleAReal, - S->pTwiddleBReal, pDst, S->twidCoefRModifier); - } - -} - - - /** - * @} end of RFFT_RIFFT group - */ - -/** - * @brief Core Real FFT process - * @param[in] *pSrc points to the input buffer. - * @param[in] fftLen length of FFT. - * @param[in] *pATable points to the twiddle Coef A buffer. - * @param[in] *pBTable points to the twiddle Coef B buffer. - * @param[out] *pDst points to the output buffer. - * @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - */ - -void arm_split_rfft_q31( - q31_t * pSrc, - uint32_t fftLen, - q31_t * pATable, - q31_t * pBTable, - q31_t * pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - q31_t outR, outI; /* Temporary variables for output */ - q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q31_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */ - q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[(4u * fftLen) - 1u]; - q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[(2u * fftLen) - 1u]; - - /* Init coefficient pointers */ - pCoefA = &pATable[modifier * 2u]; - pCoefB = &pBTable[modifier * 2u]; - - i = fftLen - 1u; - - while(i > 0u) - { - /* - outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] - + pSrc[2 * n - 2 * i] * pBTable[2 * i] + - pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - */ - - /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] + - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */ - - CoefA1 = *pCoefA++; - CoefA2 = *pCoefA; - - /* outR = (pSrc[2 * i] * pATable[2 * i] */ - outR = ((int32_t) (((q63_t) * pIn1 * CoefA1) >> 32)); - - /* outI = pIn[2 * i] * pATable[2 * i + 1] */ - outI = ((int32_t) (((q63_t) * pIn1++ * CoefA2) >> 32)); - - /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */ - outR = - (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn1 * (-CoefA2))) >> 32); - - /* (pIn[2 * i + 1] * pATable[2 * i] */ - outI = - (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn1++ * (CoefA1))) >> 32); - - /* pSrc[2 * n - 2 * i] * pBTable[2 * i] */ - outR = - (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (-CoefA2))) >> 32); - CoefB1 = *pCoefB; - - /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */ - outI = - (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (-CoefB1))) >> 32); - - /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */ - outR = - (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefB1))) >> 32); - - /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ - outI = - (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (-CoefA2))) >> 32); - - /* write output */ - *pOut1++ = (outR << 1u); - *pOut1++ = (outI << 1u); - - /* write complex conjugate output */ - *pOut2-- = -(outI << 1u); - *pOut2-- = (outR << 1u); - - /* update coefficient pointer */ - pCoefB = pCoefB + (modifier * 2u); - pCoefA = pCoefA + ((modifier * 2u) - 1u); - - i--; - - } - - pDst[2u * fftLen] = pSrc[0] - pSrc[1]; - pDst[(2u * fftLen) + 1u] = 0; - - pDst[0] = pSrc[0] + pSrc[1]; - pDst[1] = 0; - -} - - -/** - * @brief Core Real IFFT process - * @param[in] *pSrc points to the input buffer. - * @param[in] fftLen length of FFT. - * @param[in] *pATable points to the twiddle Coef A buffer. - * @param[in] *pBTable points to the twiddle Coef B buffer. - * @param[out] *pDst points to the output buffer. - * @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - * @return none. - */ - -void arm_split_rifft_q31( - q31_t * pSrc, - uint32_t fftLen, - q31_t * pATable, - q31_t * pBTable, - q31_t * pDst, - uint32_t modifier) -{ - q31_t outR, outI; /* Temporary variables for output */ - q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q31_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */ - q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[(2u * fftLen) + 1u]; - - pCoefA = &pATable[0]; - pCoefB = &pBTable[0]; - - while(fftLen > 0u) - { - /* - outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + - pIn[2 * n - 2 * i] * pBTable[2 * i] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - - outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] - - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); - - */ - CoefA1 = *pCoefA++; - CoefA2 = *pCoefA; - - /* outR = (pIn[2 * i] * pATable[2 * i] */ - outR = ((int32_t) (((q63_t) * pIn1 * CoefA1) >> 32)); - - /* - pIn[2 * i] * pATable[2 * i + 1] */ - outI = -((int32_t) (((q63_t) * pIn1++ * CoefA2) >> 32)); - - /* pIn[2 * i + 1] * pATable[2 * i + 1] */ - outR = - (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn1 * (CoefA2))) >> 32); - - /* pIn[2 * i + 1] * pATable[2 * i] */ - outI = - (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn1++ * (CoefA1))) >> 32); - - /* pIn[2 * n - 2 * i] * pBTable[2 * i] */ - outR = - (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefA2))) >> 32); - - CoefB1 = *pCoefB; - - /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */ - outI = - (q31_t) ((((q63_t) outI << 32) - ((q63_t) * pIn2-- * (CoefB1))) >> 32); - - /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */ - outR = - (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefB1))) >> 32); - - /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ - outI = - (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (CoefA2))) >> 32); - - /* write output */ - *pDst++ = (outR << 1u); - *pDst++ = (outI << 1u); - - /* update coefficient pointer */ - pCoefB = pCoefB + (modifier * 2u); - pCoefA = pCoefA + ((modifier * 2u) - 1u); - - /* Decrement loop count */ - fftLen--; - - } - - -} diff --git a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM0l_math.a b/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM0l_math.a deleted file mode 100644 index 30c034f577..0000000000 Binary files a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM0l_math.a and /dev/null differ diff --git a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM3l_math.a b/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM3l_math.a deleted file mode 100644 index b90e307b54..0000000000 Binary files a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM3l_math.a and /dev/null differ diff --git a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM4l_math.a b/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM4l_math.a deleted file mode 100644 index 8135948545..0000000000 Binary files a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM4l_math.a and /dev/null differ diff --git a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a b/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a deleted file mode 100644 index 2b48514757..0000000000 Binary files a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a and /dev/null differ diff --git a/bsp/fh8620/applications/main.c b/bsp/fh8620/applications/main.c index fe690504d1..366245b48a 100644 --- a/bsp/fh8620/applications/main.c +++ b/bsp/fh8620/applications/main.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -27,18 +27,18 @@ void init_thread(void *parameter) { - rt_components_init(); + rt_components_init(); - return ; + return ; } int rt_application_init(void) { - rt_thread_t tid; + rt_thread_t tid; - tid = rt_thread_create("init", init_thread, RT_NULL, - 4096, RT_THREAD_PRIORITY_MAX/3, 20); - if (tid) rt_thread_startup(tid); + tid = rt_thread_create("init", init_thread, RT_NULL, + 4096, RT_THREAD_PRIORITY_MAX/3, 20); + if (tid) rt_thread_startup(tid); - return 0; + return 0; } diff --git a/bsp/fh8620/drivers/acw.c b/bsp/fh8620/drivers/acw.c index 49e10a3bda..6099ff0aa3 100644 --- a/bsp/fh8620/drivers/acw.c +++ b/bsp/fh8620/drivers/acw.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -30,12 +30,12 @@ #include "dma.h" #ifdef RT_USING_FH_ACW #if 1 -typedef struct +typedef struct { - unsigned int base; - void *vbase; - unsigned int size; - unsigned int align; + unsigned int base; + void *vbase; + unsigned int size; + unsigned int align; }MEM_DESC; #define ACW_SELFTEST 0 int buffer_malloc_withname(MEM_DESC *mem, int size, int align, char* name); @@ -222,9 +222,9 @@ void fh_acw_stop_playback(struct fh_audio_cfg *audio_config) audio_config->playback.state = stopping; writel(0, audio_dev.reg_base + ACW_TXFIFO_CTRL);//tx fifo disable if(audio_config->plauback_trans->channel_number != ACW_PLY_DMA_CHAN) - goto free_mem; + goto free_mem; if(!audio_config->plauback_trans->first_lli) - goto free_channel; + goto free_channel; audio_config->playback_dma->ops->control(audio_config->playback_dma,RT_DEVICE_CTRL_DMA_CYCLIC_STOP,audio_config->plauback_trans); audio_config->playback_dma->ops->control(audio_config->playback_dma,RT_DEVICE_CTRL_DMA_CYCLIC_FREE,audio_config->plauback_trans); free_channel: @@ -259,9 +259,9 @@ void fh_acw_stop_capture(struct fh_audio_cfg *audio_config) writel(0, audio_dev.reg_base + 8);//rx fifo disable if(audio_config->capture_trans->channel_number != ACW_CAP_DMA_CHAN) - goto free_mem; + goto free_mem; if(!audio_config->capture_trans->first_lli) - goto free_channel; + goto free_channel; audio_config->capture_dma->ops->control(audio_config->capture_dma,RT_DEVICE_CTRL_DMA_CYCLIC_STOP,audio_config->capture_trans); audio_config->capture_dma->ops->control(audio_config->capture_dma,RT_DEVICE_CTRL_DMA_CYCLIC_FREE,audio_config->capture_trans); @@ -286,10 +286,10 @@ void switch_io_type(enum audio_type type, enum io_select io_type) { rt_kprintf("audio input changed to mic_in\n"); writel( reg & (~(1<<1)),audio_dev.reg_base + ACW_ADC_PATH_CTRL); - reg = readl(audio_dev.reg_base + ACW_ADC_PATH_CTRL); - reg = reg & (~(1<<3)); - reg |=(0x1<<3); - writel(reg, audio_dev.reg_base + ACW_ADC_PATH_CTRL); + reg = readl(audio_dev.reg_base + ACW_ADC_PATH_CTRL); + reg = reg & (~(1<<3)); + reg |=(0x1<<3); + writel(reg, audio_dev.reg_base + ACW_ADC_PATH_CTRL); } else if (line_in == io_type) { @@ -397,7 +397,7 @@ void switch_input_volume(int volume) param = get_param_from_volume(volume); if (param < 0) { - rt_kprintf("capture volume error\n"); + rt_kprintf("capture volume error\n"); return; } @@ -511,25 +511,25 @@ int register_tx_dma(struct fh_audio_cfg *audio_config) if(playback_trans->channel_number == ACW_PLY_DMA_CHAN){ - ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,playback_trans); - if(ret){ - rt_kprintf("can't playback cyclic prepare \n"); - return RT_ERROR; - } - ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,playback_trans); - if(ret){ - rt_kprintf("can't playback cyclic start \n"); - return RT_ERROR; - } + ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,playback_trans); + if(ret){ + rt_kprintf("can't playback cyclic prepare \n"); + return RT_ERROR; + } + ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,playback_trans); + if(ret){ + rt_kprintf("can't playback cyclic start \n"); + return RT_ERROR; + } } else - return RT_ERROR; + return RT_ERROR; return 0; } int register_rx_dma( struct fh_audio_cfg *audio_config) { - int ret; + int ret; struct dma_transfer *capture_slave; capture_slave = audio_config->capture_trans; struct rt_dma_device *rt_dma_dev; @@ -546,19 +546,19 @@ int register_rx_dma( struct fh_audio_cfg *audio_config) return RT_ERROR; } if(capture_slave->channel_number==ACW_CAP_DMA_CHAN){ - ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,capture_slave); - if(ret){ - rt_kprintf("can't capture cyclic prepare \n"); - return RT_ERROR; - } - ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,capture_slave); - if(ret){ - rt_kprintf("can't capture cyclic start \n"); - return RT_ERROR; - } + ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,capture_slave); + if(ret){ + rt_kprintf("can't capture cyclic prepare \n"); + return RT_ERROR; + } + ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,capture_slave); + if(ret){ + rt_kprintf("can't capture cyclic start \n"); + return RT_ERROR; + } } else - return RT_ERROR; + return RT_ERROR; writel(0x11,audio_dev.reg_base + ACW_RXFIFO_CTRL);//clear rx fifo writel(0x30029,audio_dev.reg_base + ACW_RXFIFO_CTRL);/*enable rx fifo*/ @@ -614,13 +614,13 @@ int fh_acw_start_playback(struct fh_audio_cfg *audio_config) audio_config->playback.state = running; ret = audio_request_playback_channel(audio_config); if(ret){ - rt_kprintf("can't request playback channel\n"); - return ret; + rt_kprintf("can't request playback channel\n"); + return ret; } ret = register_tx_dma(audio_config); if (ret < 0) { - rt_kprintf("can't register tx dma\n"); + rt_kprintf("can't register tx dma\n"); return ret; } rt_list_init(&(playback_wq.list)); @@ -638,7 +638,7 @@ int fh_acw_start_playback(struct fh_audio_cfg *audio_config) int fh_acw_start_capture(struct fh_audio_cfg *audio_config) { - int ret; + int ret; if(audio_config->capture.state == running) { return 0; @@ -654,8 +654,8 @@ int fh_acw_start_capture(struct fh_audio_cfg *audio_config) audio_config->capture.state = running; ret = audio_request_capture_channel(audio_config); if(ret){ - rt_kprintf("can't request capture channel \n"); - return ret; + rt_kprintf("can't request capture channel \n"); + return ret; } return register_rx_dma(audio_config); @@ -698,12 +698,12 @@ static void fh_acw_tx_dma_done(void *arg) audio_config->playback.hw_ptr = audio_config->playback.hw_ptr - audio_config->playback.size; } - int avail = avail_data_len(playback,audio_config); - if (avail > audio_config->playback.cfg.period_bytes) - { + int avail = avail_data_len(playback,audio_config); + if (avail > audio_config->playback.cfg.period_bytes) + { - rt_sem_release(&audio_config->sem_playback); - } + rt_sem_release(&audio_config->sem_playback); + } #endif } @@ -719,12 +719,12 @@ int arg_config_support(struct fh_audio_cfg_arg * cfg) ret = get_param_from_volume(cfg->volume); if (ret < 0) { - rt_kprintf("invalid volume\n"); + rt_kprintf("invalid volume\n"); return -EINVAL; } ret = get_factor_from_table(cfg->rate); if (ret < 0) { - rt_kprintf("invalid rate\n"); + rt_kprintf("invalid rate\n"); return -EINVAL; } return 0; @@ -1084,7 +1084,7 @@ static void fh_audio_interrupt(int irq, void *param) void audio_prealloc_dma_buffer(int aiaotype,struct fh_audio_cfg *audio_config) { - if(aiaotype == mic_in || aiaotype == line_in){ + if(aiaotype == mic_in || aiaotype == line_in){ audio_config->capture.area = (void *)fh_dma_mem_malloc(audio_config->capture.cfg.buffer_bytes \ + audio_config->capture.cfg.period_bytes); @@ -1093,8 +1093,8 @@ void audio_prealloc_dma_buffer(int aiaotype,struct fh_audio_cfg *audio_config) rt_kprintf("no enough mem for capture buffer alloc\n"); return ; } - } - if(aiaotype == speaker_out || aiaotype == line_out){ + } + if(aiaotype == speaker_out || aiaotype == line_out){ audio_config->playback.area = (void *)fh_dma_mem_malloc(audio_config->playback.cfg.buffer_bytes \ + audio_config->playback.cfg.period_bytes); @@ -1169,9 +1169,9 @@ int audio_request_capture_channel(struct fh_audio_cfg *audio_config){ rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_OPEN,dma_rx_transfer); ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,dma_rx_transfer); if(ret){ - rt_kprintf("can't request capture channel\n"); - dma_rx_transfer->channel_number =0xff; - return -ret; + rt_kprintf("can't request capture channel\n"); + dma_rx_transfer->channel_number =0xff; + return -ret; } } @@ -1219,9 +1219,9 @@ int audio_request_playback_channel(struct fh_audio_cfg *audio_config) rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_OPEN,dma_tx_transfer); ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,dma_tx_transfer); if(ret){ - rt_kprintf("can't request playbak channel\n"); - dma_tx_transfer->channel_number = 0xff; - return -ret; + rt_kprintf("can't request playbak channel\n"); + dma_tx_transfer->channel_number = 0xff; + return -ret; } return 0; @@ -1320,7 +1320,7 @@ void fh_acw_test(){ cfg.frame_bit = 16; cfg.io_type = mic_in; - + cfg.period_size = BUFF_SIZE/8; cfg.rate = 8000; cfg.volume = 80; @@ -1344,18 +1344,18 @@ void fh_acw_test(){ ret = acw_dev->control(acw_dev,AC_AI_EN,&cfg); if(ret) - acw_dev->control(acw_dev,AC_AI_DISABLE,&cfg); + acw_dev->control(acw_dev,AC_AI_DISABLE,&cfg); cfg.io_type = line_out; acw_dev->control(acw_dev,AC_INIT_PLAYBACK_MEM,&cfg); ret = acw_dev->control(acw_dev,AC_AO_EN,&cfg); if(ret){ - acw_dev->control(acw_dev,AC_AO_DISABLE,&cfg); + acw_dev->control(acw_dev,AC_AO_DISABLE,&cfg); // acw_dev->control(acw_dev,AC_SET_OUTPUT_MODE,&output); - return ; + return ; } - for(i=0;i<100;i++) + for(i=0;i<100;i++) { rx: @@ -1374,7 +1374,7 @@ tx: acw_dev->write(acw_dev,0,&rx_buff[0],1024*8); } - acw_dev->close(acw_dev); + acw_dev->close(acw_dev); } #ifdef RT_USING_FINSH diff --git a/bsp/fh8620/drivers/acw.h b/bsp/fh8620/drivers/acw.h index 2156d343f4..82fce3b9ff 100644 --- a/bsp/fh8620/drivers/acw.h +++ b/bsp/fh8620/drivers/acw.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef ACW_H_ #define ACW_H_ #include @@ -37,86 +37,86 @@ typedef unsigned long long dma_addr_t; struct scatterlist { #ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; + unsigned long sg_magic; #endif - unsigned long page_link; - unsigned int offset; - unsigned int length; - dma_addr_t dma_address; + unsigned long page_link; + unsigned int offset; + unsigned int length; + dma_addr_t dma_address; #ifdef CONFIG_NEED_SG_DMA_LENGTH - unsigned int dma_length; + unsigned int dma_length; #endif }; #define readl(a) (*(volatile rt_uint32_t *)(a)) -#define rkqueue_struct rt_workqueue -#define work_struct rt_work -#define INIT_WORK(work,func) rt_work_init(work,func,RT_NULL); -#define queue_work rt_workqueue_dowork +#define rkqueue_struct rt_workqueue +#define work_struct rt_work +#define INIT_WORK(work,func) rt_work_init(work,func,RT_NULL); +#define queue_work rt_workqueue_dowork //timer -#define timer_list rt_timer -#define wait_queue_head_t struct rt_event -#define init_waitqueue_head(event_t) rt_event_init(event_t, "audio_event", RT_IPC_FLAG_FIFO) +#define timer_list rt_timer +#define wait_queue_head_t struct rt_event +#define init_waitqueue_head(event_t) rt_event_init(event_t, "audio_event", RT_IPC_FLAG_FIFO) typedef enum{ - AC_SR_8K = 8000, - AC_SR_16K = 16000, - AC_SR_32K = 32000, - AC_SR_441K = 44100, - AC_SR_48K = 48000, + AC_SR_8K = 8000, + AC_SR_16K = 16000, + AC_SR_32K = 32000, + AC_SR_441K = 44100, + AC_SR_48K = 48000, } FH_AC_SAMPLE_RATE_E; typedef enum{ - AC_BW_8 = 8, - AC_BW_16 = 16, - AC_BW_24 = 24, + AC_BW_8 = 8, + AC_BW_16 = 16, + AC_BW_24 = 24, } FH_AC_BIT_WIDTH_E; enum io_select{ - mic_in = 0, - line_in = 1, - speaker_out = 2, - line_out = 3, + mic_in = 0, + line_in = 1, + speaker_out = 2, + line_out = 3, }; struct fh_audio_cfg_arg{ - enum io_select io_type; - int volume; - int rate; - int frame_bit; - int channels; - int buffer_size; - int period_size; + enum io_select io_type; + int volume; + int rate; + int frame_bit; + int channels; + int buffer_size; + int period_size; }; typedef struct{ - unsigned int len; - unsigned char *data; + unsigned int len; + unsigned char *data; }FH_AC_FRAME_S; typedef enum{ - FH_AC_MIC_IN = 0, - FH_AC_LINE_IN = 1, - FH_AC_SPK_OUT = 2, - FH_AC_LINE_OUT = 3 + FH_AC_MIC_IN = 0, + FH_AC_LINE_IN = 1, + FH_AC_SPK_OUT = 2, + FH_AC_LINE_OUT = 3 }FH_AC_IO_TYPE_E; typedef struct { - FH_AC_IO_TYPE_E io_type; - FH_AC_SAMPLE_RATE_E sample_rate; - FH_AC_BIT_WIDTH_E bit_width; - unsigned int channels; - unsigned int period_size; - unsigned int volume; + FH_AC_IO_TYPE_E io_type; + FH_AC_SAMPLE_RATE_E sample_rate; + FH_AC_BIT_WIDTH_E bit_width; + unsigned int channels; + unsigned int period_size; + unsigned int volume; } FH_AC_CONFIG; struct device_dma_parameters { - /* - * a low level driver may set these to teach IOMMU code about - * sg limitations. - */ - unsigned int max_segment_size; - unsigned long segment_boundary_mask; + /* + * a low level driver may set these to teach IOMMU code about + * sg limitations. + */ + unsigned int max_segment_size; + unsigned long segment_boundary_mask; }; struct list_head { @@ -124,32 +124,32 @@ struct list_head { struct list_head *prev; }; struct dma_coherent_mem { - void *virt_base; - dma_addr_t device_base; - int size; - int flags; - unsigned long *bitmap; + void *virt_base; + dma_addr_t device_base; + int size; + int flags; + unsigned long *bitmap; }; struct device_acw{ - unsigned long long *dma_mask; /* dma mask (if dma'able device) */ - unsigned long long coherent_dma_mask;/* Like dma_mask, but for - alloc_coherent mappings as - not all hardware supports - 64 bit addresses for consistent - allocations such descriptors. */ - struct device_dma_parameters *dma_parms; + unsigned long long *dma_mask; /* dma mask (if dma'able device) */ + unsigned long long coherent_dma_mask;/* Like dma_mask, but for + alloc_coherent mappings as + not all hardware supports + 64 bit addresses for consistent + allocations such descriptors. */ + struct device_dma_parameters *dma_parms; - struct list_head dma_pools; + struct list_head dma_pools; - struct dma_coherent_mem *dma_mem; + struct dma_coherent_mem *dma_mem; }; #define false 0 #define true 1 -#define AC_INIT_CAPTURE_MEM 0x10 -#define AC_INIT_PLAYBACK_MEM 0x11 +#define AC_INIT_CAPTURE_MEM 0x10 +#define AC_INIT_PLAYBACK_MEM 0x11 #define AC_SET_VOL 0x12 @@ -160,73 +160,73 @@ struct device_acw{ #define AC_AI_EN 0x15 #define AC_AO_EN 0x16 #define AC_AI_DISABLE 0x17 -#define AC_AO_DISABLE 0x18 -#define AC_AI_PAUSE 0x19 -#define AC_AI_RESUME 0x1a -#define AC_AO_PAUSE 0x1b -#define AC_AO_RESUME 0x1c -#define AC_MIC_BOOST 0x1d +#define AC_AO_DISABLE 0x18 +#define AC_AI_PAUSE 0x19 +#define AC_AI_RESUME 0x1a +#define AC_AO_PAUSE 0x1b +#define AC_AO_RESUME 0x1c +#define AC_MIC_BOOST 0x1d -#define POLLIN 0x001 /* There is data to read. */ -#define POLLPRI 0x002 /* There is urgent data to read. */ -#define POLLOUT 0x004 /* Writing now will not block. */ +#define POLLIN 0x001 /* There is data to read. */ +#define POLLPRI 0x002 /* There is urgent data to read. */ +#define POLLOUT 0x004 /* Writing now will not block. */ /* These values are defined in XPG4.2. */ -# define POLLRDNORM 0x040 /* Normal data may be read. */ -# define POLLRDBAND 0x080 /* Priority data may be read. */ -# define POLLWRNORM 0x100 /* Writing now will not block. */ -# define POLLWRBAND 0x200 /* Priority data may be written. */ +# define POLLRDNORM 0x040 /* Normal data may be read. */ +# define POLLRDBAND 0x080 /* Priority data may be read. */ +# define POLLWRNORM 0x100 /* Writing now will not block. */ +# define POLLWRBAND 0x200 /* Priority data may be written. */ /* These are extensions for Linux. */ -# define POLLMSG 0x400 -# define POLLREMOVE 0x1000 -# define POLLRDHUP 0x2000 +# define POLLMSG 0x400 +# define POLLREMOVE 0x1000 +# define POLLRDHUP 0x2000 /* Event types always implicitly polled for. These bits need not be set in `events', but they will appear in `revents' to indicate the status of the file descriptor. */ -#define POLLERR 0x008 /* Error condition. */ -#define POLLHUP 0x010 /* Hung up. */ -#define POLLNVAL 0x020 /* Invalid polling request. */ +#define POLLERR 0x008 /* Error condition. */ +#define POLLHUP 0x010 /* Hung up. */ +#define POLLNVAL 0x020 /* Invalid polling request. */ -#define EPERM 1 /* Operation not permitted */ -#define ENOENT 2 /* No such file or directory */ -#define ESRCH 3 /* No such process */ -#define EINTR 4 /* Interrupted system call */ -#define EIO 5 /* I/O error */ -#define ENXIO 6 /* No such device or address */ -#define E2BIG 7 /* Argument list too long */ -#define ENOEXEC 8 /* Exec format error */ -#define EBADF 9 /* Bad file number */ -#define ECHILD 10 /* No child processes */ -#define EAGAIN 11 /* Try again */ -#define ENOMEM 12 /* Out of memory */ -#define EACCES 13 /* Permission denied */ -#define EFAULT 14 /* Bad address */ -#define ENOTBLK 15 /* Block device required */ -#define EBUSY 16 /* Device or resource busy */ -#define EEXIST 17 /* File exists */ -#define EXDEV 18 /* Cross-device link */ -#define ENODEV 19 /* No such device */ -#define ENOTDIR 20 /* Not a directory */ -#define EISDIR 21 /* Is a directory */ -#define EINVAL 22 /* Invalid argument */ -#define ENFILE 23 /* File table overflow */ -#define EMFILE 24 /* Too many open files */ -#define ENOTTY 25 /* Not a typewriter */ -#define ETXTBSY 26 /* Text file busy */ -#define EFBIG 27 /* File too large */ -#define ENOSPC 28 /* No space left on device */ -#define ESPIPE 29 /* Illegal seek */ -#define EROFS 30 /* Read-only file system */ -#define EMLINK 31 /* Too many links */ -#define EPIPE 32 /* Broken pipe */ -#define EDOM 33 /* Math argument out of domain of func */ -#define ERANGE 34 /* Math result not representable */ +#define EPERM 1 /* Operation not permitted */ +#define ENOENT 2 /* No such file or directory */ +#define ESRCH 3 /* No such process */ +#define EINTR 4 /* Interrupted system call */ +#define EIO 5 /* I/O error */ +#define ENXIO 6 /* No such device or address */ +#define E2BIG 7 /* Argument list too long */ +#define ENOEXEC 8 /* Exec format error */ +#define EBADF 9 /* Bad file number */ +#define ECHILD 10 /* No child processes */ +#define EAGAIN 11 /* Try again */ +#define ENOMEM 12 /* Out of memory */ +#define EACCES 13 /* Permission denied */ +#define EFAULT 14 /* Bad address */ +#define ENOTBLK 15 /* Block device required */ +#define EBUSY 16 /* Device or resource busy */ +#define EEXIST 17 /* File exists */ +#define EXDEV 18 /* Cross-device link */ +#define ENODEV 19 /* No such device */ +#define ENOTDIR 20 /* Not a directory */ +#define EISDIR 21 /* Is a directory */ +#define EINVAL 22 /* Invalid argument */ +#define ENFILE 23 /* File table overflow */ +#define EMFILE 24 /* Too many open files */ +#define ENOTTY 25 /* Not a typewriter */ +#define ETXTBSY 26 /* Text file busy */ +#define EFBIG 27 /* File too large */ +#define ENOSPC 28 /* No space left on device */ +#define ESPIPE 29 /* Illegal seek */ +#define EROFS 30 /* Read-only file system */ +#define EMLINK 31 /* Too many links */ +#define EPIPE 32 /* Broken pipe */ +#define EDOM 33 /* Math argument out of domain of func */ +#define ERANGE 34 /* Math result not representable */ extern void fh_audio_init(void); extern void fh_acw_test(); #endif diff --git a/bsp/fh8620/drivers/dma.c b/bsp/fh8620/drivers/dma.c index 394ac2a6a3..3105f9261b 100644 --- a/bsp/fh8620/drivers/dma.c +++ b/bsp/fh8620/drivers/dma.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + /***************************************************************************** * Include Section * add all #include here @@ -88,7 +88,7 @@ static rt_err_t rt_dma_control(struct rt_device *dev, *****************************************************************************/ static rt_err_t rt_dma_init(struct rt_device *dev) { - struct rt_dma_device *dma; + struct rt_dma_device *dma; RT_ASSERT(dev != RT_NULL); dma = (struct rt_dma_device *)dev; @@ -107,7 +107,7 @@ static rt_err_t rt_dma_open(struct rt_device *dev, rt_uint16_t oflag) static rt_err_t rt_dma_close(struct rt_device *dev) { - struct rt_dma_device *dma; + struct rt_dma_device *dma; RT_ASSERT(dev != RT_NULL); dma = (struct rt_dma_device *)dev; @@ -124,7 +124,7 @@ static rt_err_t rt_dma_control(struct rt_device *dev, rt_uint8_t cmd, void *args) { - struct rt_dma_device *dma; + struct rt_dma_device *dma; RT_ASSERT(dev != RT_NULL); dma = (struct rt_dma_device *)dev; @@ -141,7 +141,7 @@ rt_err_t rt_hw_dma_register(struct rt_dma_device *dma, rt_uint32_t flag, void *data) { - rt_uint32_t ret; + rt_uint32_t ret; struct rt_device *device; RT_ASSERT(dma != RT_NULL); diff --git a/bsp/fh8620/drivers/dma.h b/bsp/fh8620/drivers/dma.h index c8c3fbf574..2ef3253196 100644 --- a/bsp/fh8620/drivers/dma.h +++ b/bsp/fh8620/drivers/dma.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -29,31 +29,31 @@ #include /**************************************************************************** * #include section -* add #include here if any +* add #include here if any ***************************************************************************/ /**************************************************************************** * #define section -* add constant #define here if any +* add constant #define here if any ***************************************************************************/ -#define RT_DEVICE_CTRL_DMA_OPEN (1) -#define RT_DEVICE_CTRL_DMA_CLOSE (2) -#define RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL (3) -#define RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL (4) -#define RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER (5) +#define RT_DEVICE_CTRL_DMA_OPEN (1) +#define RT_DEVICE_CTRL_DMA_CLOSE (2) +#define RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL (3) +#define RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL (4) +#define RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER (5) //cyclic add func below.... -#define RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE (6) -#define RT_DEVICE_CTRL_DMA_CYCLIC_START (7) -#define RT_DEVICE_CTRL_DMA_CYCLIC_STOP (8) -#define RT_DEVICE_CTRL_DMA_CYCLIC_FREE (9) +#define RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE (6) +#define RT_DEVICE_CTRL_DMA_CYCLIC_START (7) +#define RT_DEVICE_CTRL_DMA_CYCLIC_STOP (8) +#define RT_DEVICE_CTRL_DMA_CYCLIC_FREE (9) -//#define RT_DEVICE_CTRL_ (3) /* get the left time before reboot(in seconds) */ +//#define RT_DEVICE_CTRL_ (3) /* get the left time before reboot(in seconds) */ //#define RT_DEVICE_CTRL_ (4) /* refresh watchdog */ //#define RT_DEVICE_CTRL_ (5) /* start watchdog */ //#define RT_DEVICE_CTRL_ (6) /* stop watchdog */ @@ -64,13 +64,13 @@ /**************************************************************************** * ADT section -* add Abstract Data Type definition here +* add Abstract Data Type definition here ***************************************************************************/ struct rt_dma_ops; struct rt_dma_device { - // the parent must be the fitst para.. + // the parent must be the fitst para.. struct rt_device parent; struct rt_dma_ops *ops; }; @@ -91,7 +91,7 @@ struct rt_dma_ops /**************************************************************************** * section -* add function prototype here if any +* add function prototype here if any ***************************************************************************/ rt_err_t rt_hw_dma_register(struct rt_dma_device *dma, const char *name, diff --git a/bsp/fh8620/drivers/dma_mem.c b/bsp/fh8620/drivers/dma_mem.c index 52c9e56b4a..9360ab5b81 100644 --- a/bsp/fh8620/drivers/dma_mem.c +++ b/bsp/fh8620/drivers/dma_mem.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + /***************************************************************************** * Include Section * add all #include here @@ -86,27 +86,27 @@ static struct rt_memheap dma_heap = {0}; * what does this function returned? *****************************************************************************/ rt_err_t fh_dma_mem_init(rt_uint32_t *mem_start,rt_uint32_t size){ - return rt_memheap_init(&dma_heap,"dma_heap",mem_start,size); + return rt_memheap_init(&dma_heap,"dma_heap",mem_start,size); } void *fh_dma_mem_malloc(rt_uint32_t size){ - return rt_memheap_alloc(&dma_heap, size); + return rt_memheap_alloc(&dma_heap, size); } void fh_dma_mem_free(void *ptr){ - rt_memheap_free(ptr); + rt_memheap_free(ptr); } #ifdef FH_TEST_DMA_MEM int dma_mem_debug(void *ptr){ - //rt_memheap_free(ptr); - rt_kprintf("dma mem start 0x%08x\n",(rt_uint32_t)dma_heap.start_addr); - rt_kprintf("dma mem total size 0x%08x\n",dma_heap.pool_size); - rt_kprintf("dma mem left size 0x%08x\n",dma_heap.available_size); - rt_kprintf("dma mem max use size 0x%08x\n",dma_heap.max_used_size); - return 0; + //rt_memheap_free(ptr); + rt_kprintf("dma mem start 0x%08x\n",(rt_uint32_t)dma_heap.start_addr); + rt_kprintf("dma mem total size 0x%08x\n",dma_heap.pool_size); + rt_kprintf("dma mem left size 0x%08x\n",dma_heap.available_size); + rt_kprintf("dma mem max use size 0x%08x\n",dma_heap.max_used_size); + return 0; } #endif diff --git a/bsp/fh8620/drivers/dma_mem.h b/bsp/fh8620/drivers/dma_mem.h index b431703a4a..fea4222432 100644 --- a/bsp/fh8620/drivers/dma_mem.h +++ b/bsp/fh8620/drivers/dma_mem.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef DMA_MEM_H_ #define DMA_MEM_H_ @@ -36,20 +36,20 @@ #include /**************************************************************************** * #include section -* add #include here if any +* add #include here if any ***************************************************************************/ /**************************************************************************** * #define section -* add constant #define here if any +* add constant #define here if any ***************************************************************************/ /**************************************************************************** * ADT section -* add Abstract Data Type definition here +* add Abstract Data Type definition here ***************************************************************************/ @@ -61,7 +61,7 @@ /**************************************************************************** * section -* add function prototype here if any +* add function prototype here if any ***************************************************************************/ #ifdef RT_USING_DMA_MEM rt_err_t fh_dma_mem_init(rt_uint32_t *mem_start,rt_uint32_t size); diff --git a/bsp/fh8620/drivers/fh_dma.c b/bsp/fh8620/drivers/fh_dma.c index c50ae1e1df..d44ecf4e1f 100644 --- a/bsp/fh8620/drivers/fh_dma.c +++ b/bsp/fh8620/drivers/fh_dma.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + /***************************************************************************** * Include Section * add all #include here @@ -45,187 +45,187 @@ //#define DMA_DEBUG #ifdef DMA_DEBUG -#define FH_DMA_DEBUG(fmt, args...) \ - rt_kprintf(fmt,##args); +#define FH_DMA_DEBUG(fmt, args...) \ + rt_kprintf(fmt,##args); #else #define FH_DMA_DEBUG(fmt, args...) #endif -#define DMA_REG_BASE (0xEE000000) -#define DMA_CONTROLLER_NUMBER (1) +#define DMA_REG_BASE (0xEE000000) +#define DMA_CONTROLLER_NUMBER (1) -#define WORK_QUEUE_STACK_SIZE 512 -#define WORK_QUEUE_PRIORITY 12 +#define WORK_QUEUE_STACK_SIZE 512 +#define WORK_QUEUE_PRIORITY 12 -#define TEST_PER_NO (10) +#define TEST_PER_NO (10) -#define DESC_MAX_SIZE (20) +#define DESC_MAX_SIZE (20) /********************************* * * copy from the linux core start * *********************************/ //this is the ip reg offset....don't change!!!!!!! -#define DW_DMA_MAX_NR_CHANNELS 8 +#define DW_DMA_MAX_NR_CHANNELS 8 /* * Redefine this macro to handle differences between 32- and 64-bit * addressing, big vs. little endian, etc. */ -#define DW_REG(name) rt_uint32_t name; rt_uint32_t __pad_##name +#define DW_REG(name) rt_uint32_t name; rt_uint32_t __pad_##name /* Hardware register definitions. */ struct dw_dma_chan_regs { - DW_REG(SAR); /* Source Address Register */ - DW_REG(DAR); /* Destination Address Register */ - DW_REG(LLP); /* Linked List Pointer */ - rt_uint32_t CTL_LO; /* Control Register Low */ - rt_uint32_t CTL_HI; /* Control Register High */ - DW_REG(SSTAT); - DW_REG(DSTAT); - DW_REG(SSTATAR); - DW_REG(DSTATAR); - rt_uint32_t CFG_LO; /* Configuration Register Low */ - rt_uint32_t CFG_HI; /* Configuration Register High */ - DW_REG(SGR); - DW_REG(DSR); + DW_REG(SAR); /* Source Address Register */ + DW_REG(DAR); /* Destination Address Register */ + DW_REG(LLP); /* Linked List Pointer */ + rt_uint32_t CTL_LO; /* Control Register Low */ + rt_uint32_t CTL_HI; /* Control Register High */ + DW_REG(SSTAT); + DW_REG(DSTAT); + DW_REG(SSTATAR); + DW_REG(DSTATAR); + rt_uint32_t CFG_LO; /* Configuration Register Low */ + rt_uint32_t CFG_HI; /* Configuration Register High */ + DW_REG(SGR); + DW_REG(DSR); }; struct dw_dma_irq_regs { - DW_REG(XFER); - DW_REG(BLOCK); - DW_REG(SRC_TRAN); - DW_REG(DST_TRAN); - DW_REG(ERROR); + DW_REG(XFER); + DW_REG(BLOCK); + DW_REG(SRC_TRAN); + DW_REG(DST_TRAN); + DW_REG(ERROR); }; struct dw_dma_regs { - /* per-channel registers */ - struct dw_dma_chan_regs CHAN[DW_DMA_MAX_NR_CHANNELS]; + /* per-channel registers */ + struct dw_dma_chan_regs CHAN[DW_DMA_MAX_NR_CHANNELS]; - /* irq handling */ - struct dw_dma_irq_regs RAW; /* r */ - struct dw_dma_irq_regs STATUS; /* r (raw & mask) */ - struct dw_dma_irq_regs MASK; /* rw (set = irq enabled) */ - struct dw_dma_irq_regs CLEAR; /* w (ack, affects "raw") */ + /* irq handling */ + struct dw_dma_irq_regs RAW; /* r */ + struct dw_dma_irq_regs STATUS; /* r (raw & mask) */ + struct dw_dma_irq_regs MASK; /* rw (set = irq enabled) */ + struct dw_dma_irq_regs CLEAR; /* w (ack, affects "raw") */ - DW_REG(STATUS_INT); /* r */ + DW_REG(STATUS_INT); /* r */ - /* software handshaking */ - DW_REG(REQ_SRC); - DW_REG(REQ_DST); - DW_REG(SGL_REQ_SRC); - DW_REG(SGL_REQ_DST); - DW_REG(LAST_SRC); - DW_REG(LAST_DST); + /* software handshaking */ + DW_REG(REQ_SRC); + DW_REG(REQ_DST); + DW_REG(SGL_REQ_SRC); + DW_REG(SGL_REQ_DST); + DW_REG(LAST_SRC); + DW_REG(LAST_DST); - /* miscellaneous */ - DW_REG(CFG); - DW_REG(CH_EN); - DW_REG(ID); - DW_REG(TEST); + /* miscellaneous */ + DW_REG(CFG); + DW_REG(CH_EN); + DW_REG(ID); + DW_REG(TEST); - /* optional encoded params, 0x3c8..0x3 */ + /* optional encoded params, 0x3c8..0x3 */ }; /* Bitfields in CTL_LO */ -#define DWC_CTLL_INT_EN (1 << 0) /* irqs enabled? */ -#define DWC_CTLL_DST_WIDTH(n) ((n)<<1) /* bytes per element */ -#define DWC_CTLL_SRC_WIDTH(n) ((n)<<4) +#define DWC_CTLL_INT_EN (1 << 0) /* irqs enabled? */ +#define DWC_CTLL_DST_WIDTH(n) ((n)<<1) /* bytes per element */ +#define DWC_CTLL_SRC_WIDTH(n) ((n)<<4) #define DWC_CTLL_DST_INC_MODE(n) ((n)<<7) -#define DWC_CTLL_DST_INC (0<<7) /* DAR update/not */ -#define DWC_CTLL_DST_DEC (1<<7) -#define DWC_CTLL_DST_FIX (2<<7) +#define DWC_CTLL_DST_INC (0<<7) /* DAR update/not */ +#define DWC_CTLL_DST_DEC (1<<7) +#define DWC_CTLL_DST_FIX (2<<7) #define DWC_CTLL_SRC_INC_MODE(n) ((n)<<9) -#define DWC_CTLL_SRC_INC (0<<9) /* SAR update/not */ -#define DWC_CTLL_SRC_DEC (1<<9) -#define DWC_CTLL_SRC_FIX (2<<9) -#define DWC_CTLL_DST_MSIZE(n) ((n)<<11) /* burst, #elements */ -#define DWC_CTLL_SRC_MSIZE(n) ((n)<<14) -#define DWC_CTLL_S_GATH_EN (1 << 17) /* src gather, !FIX */ -#define DWC_CTLL_D_SCAT_EN (1 << 18) /* dst scatter, !FIX */ -#define DWC_CTLL_FC(n) ((n) << 20) -#define DWC_CTLL_FC_M2M (0 << 20) /* mem-to-mem */ -#define DWC_CTLL_FC_M2P (1 << 20) /* mem-to-periph */ -#define DWC_CTLL_FC_P2M (2 << 20) /* periph-to-mem */ -#define DWC_CTLL_FC_P2P (3 << 20) /* periph-to-periph */ +#define DWC_CTLL_SRC_INC (0<<9) /* SAR update/not */ +#define DWC_CTLL_SRC_DEC (1<<9) +#define DWC_CTLL_SRC_FIX (2<<9) +#define DWC_CTLL_DST_MSIZE(n) ((n)<<11) /* burst, #elements */ +#define DWC_CTLL_SRC_MSIZE(n) ((n)<<14) +#define DWC_CTLL_S_GATH_EN (1 << 17) /* src gather, !FIX */ +#define DWC_CTLL_D_SCAT_EN (1 << 18) /* dst scatter, !FIX */ +#define DWC_CTLL_FC(n) ((n) << 20) +#define DWC_CTLL_FC_M2M (0 << 20) /* mem-to-mem */ +#define DWC_CTLL_FC_M2P (1 << 20) /* mem-to-periph */ +#define DWC_CTLL_FC_P2M (2 << 20) /* periph-to-mem */ +#define DWC_CTLL_FC_P2P (3 << 20) /* periph-to-periph */ /* plus 4 transfer types for peripheral-as-flow-controller */ -#define DWC_CTLL_DMS(n) ((n)<<23) /* dst master select */ -#define DWC_CTLL_SMS(n) ((n)<<25) /* src master select */ -#define DWC_CTLL_LLP_D_EN (1 << 27) /* dest block chain */ -#define DWC_CTLL_LLP_S_EN (1 << 28) /* src block chain */ +#define DWC_CTLL_DMS(n) ((n)<<23) /* dst master select */ +#define DWC_CTLL_SMS(n) ((n)<<25) /* src master select */ +#define DWC_CTLL_LLP_D_EN (1 << 27) /* dest block chain */ +#define DWC_CTLL_LLP_S_EN (1 << 28) /* src block chain */ /* Bitfields in CTL_HI */ -#define DWC_CTLH_DONE 0x00001000 -#define DWC_CTLH_BLOCK_TS_MASK 0x00000fff +#define DWC_CTLH_DONE 0x00001000 +#define DWC_CTLH_BLOCK_TS_MASK 0x00000fff /* Bitfields in CFG_LO. Platform-configurable bits are in */ -#define DWC_CFGL_CH_PRIOR_MASK (0x7 << 5) /* priority mask */ -#define DWC_CFGL_CH_PRIOR(x) ((x) << 5) /* priority */ -#define DWC_CFGL_CH_SUSP (1 << 8) /* pause xfer */ -#define DWC_CFGL_FIFO_EMPTY (1 << 9) /* pause xfer */ +#define DWC_CFGL_CH_PRIOR_MASK (0x7 << 5) /* priority mask */ +#define DWC_CFGL_CH_PRIOR(x) ((x) << 5) /* priority */ +#define DWC_CFGL_CH_SUSP (1 << 8) /* pause xfer */ +#define DWC_CFGL_FIFO_EMPTY (1 << 9) /* pause xfer */ -#define DWC_CFGL_HS_DST (1 << 10) /* handshake w/dst */ -#define DWC_CFGL_HS_SRC (1 << 11) /* handshake w/src */ -#define DWC_CFGL_MAX_BURST(x) ((x) << 20) -#define DWC_CFGL_RELOAD_SAR (1 << 30) -#define DWC_CFGL_RELOAD_DAR (1 << 31) +#define DWC_CFGL_HS_DST (1 << 10) /* handshake w/dst */ +#define DWC_CFGL_HS_SRC (1 << 11) /* handshake w/src */ +#define DWC_CFGL_MAX_BURST(x) ((x) << 20) +#define DWC_CFGL_RELOAD_SAR (1 << 30) +#define DWC_CFGL_RELOAD_DAR (1 << 31) /* Bitfields in CFG_HI. Platform-configurable bits are in */ -#define DWC_CFGH_DS_UPD_EN (1 << 5) -#define DWC_CFGH_SS_UPD_EN (1 << 6) +#define DWC_CFGH_DS_UPD_EN (1 << 5) +#define DWC_CFGH_SS_UPD_EN (1 << 6) /* Bitfields in SGR */ -#define DWC_SGR_SGI(x) ((x) << 0) -#define DWC_SGR_SGC(x) ((x) << 20) +#define DWC_SGR_SGI(x) ((x) << 0) +#define DWC_SGR_SGC(x) ((x) << 20) /* Bitfields in DSR */ -#define DWC_DSR_DSI(x) ((x) << 0) -#define DWC_DSR_DSC(x) ((x) << 20) +#define DWC_DSR_DSI(x) ((x) << 0) +#define DWC_DSR_DSC(x) ((x) << 20) /* Bitfields in CFG */ -#define DW_CFG_DMA_EN (1 << 0) +#define DW_CFG_DMA_EN (1 << 0) -#define DW_REGLEN 0x400 +#define DW_REGLEN 0x400 /* Platform-configurable bits in CFG_HI */ -#define DWC_CFGH_FCMODE (1 << 0) -#define DWC_CFGH_FIFO_MODE (1 << 1) -#define DWC_CFGH_PROTCTL(x) ((x) << 2) -#define DWC_CFGH_SRC_PER(x) ((x) << 7) -#define DWC_CFGH_DST_PER(x) ((x) << 11) +#define DWC_CFGH_FCMODE (1 << 0) +#define DWC_CFGH_FIFO_MODE (1 << 1) +#define DWC_CFGH_PROTCTL(x) ((x) << 2) +#define DWC_CFGH_SRC_PER(x) ((x) << 7) +#define DWC_CFGH_DST_PER(x) ((x) << 11) /* Platform-configurable bits in CFG_LO */ -#define DWC_CFGL_LOCK_CH_XFER (0 << 12) /* scope of LOCK_CH */ -#define DWC_CFGL_LOCK_CH_BLOCK (1 << 12) -#define DWC_CFGL_LOCK_CH_XACT (2 << 12) -#define DWC_CFGL_LOCK_BUS_XFER (0 << 14) /* scope of LOCK_BUS */ -#define DWC_CFGL_LOCK_BUS_BLOCK (1 << 14) -#define DWC_CFGL_LOCK_BUS_XACT (2 << 14) -#define DWC_CFGL_LOCK_CH (1 << 15) /* channel lockout */ -#define DWC_CFGL_LOCK_BUS (1 << 16) /* busmaster lockout */ -#define DWC_CFGL_HS_DST_POL (1 << 18) /* dst handshake active low */ -#define DWC_CFGL_HS_SRC_POL (1 << 19) /* src handshake active low */ +#define DWC_CFGL_LOCK_CH_XFER (0 << 12) /* scope of LOCK_CH */ +#define DWC_CFGL_LOCK_CH_BLOCK (1 << 12) +#define DWC_CFGL_LOCK_CH_XACT (2 << 12) +#define DWC_CFGL_LOCK_BUS_XFER (0 << 14) /* scope of LOCK_BUS */ +#define DWC_CFGL_LOCK_BUS_BLOCK (1 << 14) +#define DWC_CFGL_LOCK_BUS_XACT (2 << 14) +#define DWC_CFGL_LOCK_CH (1 << 15) /* channel lockout */ +#define DWC_CFGL_LOCK_BUS (1 << 16) /* busmaster lockout */ +#define DWC_CFGL_HS_DST_POL (1 << 18) /* dst handshake active low */ +#define DWC_CFGL_HS_SRC_POL (1 << 19) /* src handshake active low */ -#define lift_shift_bit_num(bit_num) (1<regs)->name)) + __raw_readl(&(((struct dw_dma_regs *)dw->regs)->name)) #define dw_writel(dw, name, val) \ - __raw_writel((val), &(((struct dw_dma_regs *)dw->regs)->name)) + __raw_writel((val), &(((struct dw_dma_regs *)dw->regs)->name)) #define dw_readw(dw, name) \ - __raw_readw(&(((struct dw_dma_regs *)dw->regs)->name)) + __raw_readw(&(((struct dw_dma_regs *)dw->regs)->name)) #define dw_writew(dw, name, val) \ - __raw_writew((val), &(((struct dw_dma_regs *)dw->regs)->name)) + __raw_writew((val), &(((struct dw_dma_regs *)dw->regs)->name)) -#define CHANNEL0 (lift_shift_bit_num(0)) -#define CHANNEL1 (lift_shift_bit_num(1)) -#define CHANNEL2 (lift_shift_bit_num(2)) -#define CHANNEL3 (lift_shift_bit_num(3)) +#define CHANNEL0 (lift_shift_bit_num(0)) +#define CHANNEL1 (lift_shift_bit_num(1)) +#define CHANNEL2 (lift_shift_bit_num(2)) +#define CHANNEL3 (lift_shift_bit_num(3)) #define channel_set_bit(dw, reg, mask) \ - dw_writel(dw, reg, ((mask) << 8) | (mask)) + dw_writel(dw, reg, ((mask) << 8) | (mask)) #define channel_clear_bit(dw, reg, mask) \ - dw_writel(dw, reg, ((mask) << 8) | 0) + dw_writel(dw, reg, ((mask) << 8) | 0) @@ -275,83 +275,83 @@ struct dw_dma_regs { ***************************************************************************/ struct dw_dma{ - //vadd - void *regs; - //padd - rt_uint32_t paddr; - rt_uint32_t irq; - rt_uint32_t channel_max_number; + //vadd + void *regs; + //padd + rt_uint32_t paddr; + rt_uint32_t irq; + rt_uint32_t channel_max_number; -#define CONTROLLER_STATUS_CLOSED (0) -#define CONTROLLER_STATUS_OPEN (1) - rt_uint32_t controller_status; -#define FH81_DMA_INIT_NOT_YET (0) -#define FH81_DMA_INIT_ALREADY (1) - rt_uint32_t init; - rt_uint32_t id; - char *name; - rt_uint32_t channel_work_done; +#define CONTROLLER_STATUS_CLOSED (0) +#define CONTROLLER_STATUS_OPEN (1) + rt_uint32_t controller_status; +#define FH81_DMA_INIT_NOT_YET (0) +#define FH81_DMA_INIT_ALREADY (1) + rt_uint32_t init; + rt_uint32_t id; + char *name; + rt_uint32_t channel_work_done; }; struct dma_channel { -#define CHANNEL_STATUS_CLOSED (0) -#define CHANNEL_STATUS_OPEN (1) -#define CHANNEL_STATUS_IDLE (2) -#define CHANNEL_STATUS_BUSY (3) +#define CHANNEL_STATUS_CLOSED (0) +#define CHANNEL_STATUS_OPEN (1) +#define CHANNEL_STATUS_IDLE (2) +#define CHANNEL_STATUS_BUSY (3) - rt_uint32_t channel_status; //open, busy ,closed - rt_uint32_t desc_trans_size; + rt_uint32_t channel_status; //open, busy ,closed + rt_uint32_t desc_trans_size; - //isr will set it complete. - struct rt_completion transfer_completion; - //add lock,when set the channel.lock it - struct rt_semaphore channel_lock; - //struct rt_mutex lock; - //rt_enter_critical(); - rt_list_t queue; - //active transfer now!!! - struct dma_transfer *active_trans; + //isr will set it complete. + struct rt_completion transfer_completion; + //add lock,when set the channel.lock it + struct rt_semaphore channel_lock; + //struct rt_mutex lock; + //rt_enter_critical(); + rt_list_t queue; + //active transfer now!!! + struct dma_transfer *active_trans; -#define SINGLE_TRANSFER (0) -#define CYCLIC_TRANSFER (1) -#define DEFAULT_TRANSFER SINGLE_TRANSFER - rt_uint32_t open_flag; - // +#define SINGLE_TRANSFER (0) +#define CYCLIC_TRANSFER (1) +#define DEFAULT_TRANSFER SINGLE_TRANSFER + rt_uint32_t open_flag; + // - //new add para... - rt_uint32_t desc_total_no; - rt_uint32_t free_index; - rt_uint32_t used_index; - rt_uint32_t desc_left_cnt; + //new add para... + rt_uint32_t desc_total_no; + rt_uint32_t free_index; + rt_uint32_t used_index; + rt_uint32_t desc_left_cnt; - rt_uint32_t allign_malloc; - struct dw_lli *base_lli; + rt_uint32_t allign_malloc; + struct dw_lli *base_lli; }; struct fh81_dma{ - //core use ,this must be the first para!!!! - struct rt_dma_device parent; - //myown - struct dw_dma dwc; - //channel obj - struct dma_channel dma_channel[FH81_MAX_CHANNEL]; + //core use ,this must be the first para!!!! + struct rt_dma_device parent; + //myown + struct dw_dma dwc; + //channel obj + struct dma_channel dma_channel[FH81_MAX_CHANNEL]; - //struct rt_workqueue* isr_workqueue; - //struct rt_work *isr_work; + //struct rt_workqueue* isr_workqueue; + //struct rt_work *isr_work; }; -#define list_for_each_entry_safe(pos, n, head, member) \ - for (pos = rt_list_entry((head)->next, typeof(*pos), member), \ - n = rt_list_entry(pos->member.next, typeof(*pos), member); \ - &pos->member != (head); \ - pos = n, n = rt_list_entry(n->member.next, typeof(*n), member)) +#define list_for_each_entry_safe(pos, n, head, member) \ + for (pos = rt_list_entry((head)->next, typeof(*pos), member), \ + n = rt_list_entry(pos->member.next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = n, n = rt_list_entry(n->member.next, typeof(*n), member)) /****************************************************************************** @@ -384,8 +384,8 @@ static void rt_fh_dma_cyclic_free(struct dma_transfer *p); static struct rt_dma_ops fh81_dma_ops = { - init, - control + init, + control }; @@ -398,7 +398,7 @@ static struct rt_dma_ops fh81_dma_ops = * e.g. * static uint8_t ufoo; *****************************************************************************/ -static struct fh81_dma fh81_dma_controller[DMA_CONTROLLER_NUMBER] = {0}; +static struct fh81_dma fh81_dma_controller[DMA_CONTROLLER_NUMBER] = {0}; /* function body */ /***************************************************************************** @@ -411,80 +411,80 @@ static struct fh81_dma fh81_dma_controller[DMA_CONTROLLER_NUMBER] = {0}; *****************************************************************************/ static rt_uint32_t allign_func(rt_uint32_t in_addr,rt_uint32_t allign_size){ - return (in_addr + allign_size-1) & (~(allign_size - 1)); + return (in_addr + allign_size-1) & (~(allign_size - 1)); } struct dw_lli * get_desc(struct fh81_dma *p_dma,struct dma_transfer *p_transfer,rt_uint32_t lli_size){ - struct dw_lli * ret_lli; - rt_uint32_t free_index; - rt_uint32_t allign_left; - rt_uint32_t totoal_desc; - rt_uint32_t actual_get_desc; - rt_uint32_t totoal_free_desc; - totoal_free_desc = p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt; - free_index = p_dma->dma_channel[p_transfer->channel_number].free_index; - totoal_desc = p_dma->dma_channel[p_transfer->channel_number].desc_total_no; - allign_left = totoal_desc - free_index; + struct dw_lli * ret_lli; + rt_uint32_t free_index; + rt_uint32_t allign_left; + rt_uint32_t totoal_desc; + rt_uint32_t actual_get_desc; + rt_uint32_t totoal_free_desc; + totoal_free_desc = p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt; + free_index = p_dma->dma_channel[p_transfer->channel_number].free_index; + totoal_desc = p_dma->dma_channel[p_transfer->channel_number].desc_total_no; + allign_left = totoal_desc - free_index; - //check first.. - if(totoal_free_desc < lli_size){ - rt_kprintf("not enough desc to get...\n"); - rt_kprintf("get size is %d,left is %d\n",lli_size,totoal_free_desc); - return RT_NULL; - } - //rt_kprintf("get desc in...\n"); + //check first.. + if(totoal_free_desc < lli_size){ + rt_kprintf("not enough desc to get...\n"); + rt_kprintf("get size is %d,left is %d\n",lli_size,totoal_free_desc); + return RT_NULL; + } + //rt_kprintf("get desc in...\n"); - //rt_kprintf("lli size is %d\n",lli_size); - if(lli_size > allign_left){ - //if allign desc not enough...just reset null.... - if((totoal_free_desc - allign_left) < lli_size){ - rt_kprintf("not enough desc to get...\n"); - rt_kprintf("app need size is %d, totoal left is %d, allign left is %d\n",lli_size,totoal_free_desc,allign_left); - rt_kprintf("from head to get desc size is %d, actual get is %d\n",(totoal_free_desc - allign_left),(allign_left +lli_size)); - return RT_NULL; - } - else{ - actual_get_desc = allign_left +lli_size; - free_index = 0; - } - } + //rt_kprintf("lli size is %d\n",lli_size); + if(lli_size > allign_left){ + //if allign desc not enough...just reset null.... + if((totoal_free_desc - allign_left) < lli_size){ + rt_kprintf("not enough desc to get...\n"); + rt_kprintf("app need size is %d, totoal left is %d, allign left is %d\n",lli_size,totoal_free_desc,allign_left); + rt_kprintf("from head to get desc size is %d, actual get is %d\n",(totoal_free_desc - allign_left),(allign_left +lli_size)); + return RT_NULL; + } + else{ + actual_get_desc = allign_left +lli_size; + free_index = 0; + } + } - //ret_lli = &p_dma->dma_channel[p_transfer->channel_number].base_lli[free_index]; + //ret_lli = &p_dma->dma_channel[p_transfer->channel_number].base_lli[free_index]; - ret_lli = &p_dma->dma_channel[p_transfer->channel_number].base_lli[free_index]; -// rt_kprintf("get desc base index addr:%08x\n",(rt_uint32_t)&p_dma->dma_channel[p_transfer->channel_number].base_lli[0]); -// rt_kprintf("get desc free index addr:%08x\n",(rt_uint32_t)ret_lli); -// rt_kprintf("get desc request size:%08x\n",lli_size); -// rt_kprintf("get desc total size:%08x\n",p_dma->dma_channel[p_transfer->channel_number].desc_total_no); -// rt_kprintf("one desc size is:%08x\n",sizeof( struct dw_lli)); + ret_lli = &p_dma->dma_channel[p_transfer->channel_number].base_lli[free_index]; +// rt_kprintf("get desc base index addr:%08x\n",(rt_uint32_t)&p_dma->dma_channel[p_transfer->channel_number].base_lli[0]); +// rt_kprintf("get desc free index addr:%08x\n",(rt_uint32_t)ret_lli); +// rt_kprintf("get desc request size:%08x\n",lli_size); +// rt_kprintf("get desc total size:%08x\n",p_dma->dma_channel[p_transfer->channel_number].desc_total_no); +// rt_kprintf("one desc size is:%08x\n",sizeof( struct dw_lli)); - p_dma->dma_channel[p_transfer->channel_number].free_index += actual_get_desc; + p_dma->dma_channel[p_transfer->channel_number].free_index += actual_get_desc; - //rt_kprintf("get desc free index addr:%08x\n",(rt_uint32_t)&p_dma->dma_channel[p_transfer->channel_number].base_lli[p_dma->dma_channel[p_transfer->channel_number].free_index]); + //rt_kprintf("get desc free index addr:%08x\n",(rt_uint32_t)&p_dma->dma_channel[p_transfer->channel_number].base_lli[p_dma->dma_channel[p_transfer->channel_number].free_index]); - p_dma->dma_channel[p_transfer->channel_number].free_index %= p_dma->dma_channel[p_transfer->channel_number].desc_total_no; - p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt -= actual_get_desc; - p_transfer->lli_size = lli_size; - p_transfer->actual_lli_size = actual_get_desc; - return ret_lli; + p_dma->dma_channel[p_transfer->channel_number].free_index %= p_dma->dma_channel[p_transfer->channel_number].desc_total_no; + p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt -= actual_get_desc; + p_transfer->lli_size = lli_size; + p_transfer->actual_lli_size = actual_get_desc; + return ret_lli; } rt_uint32_t put_desc(struct fh81_dma *p_dma,struct dma_transfer *p_transfer){ - struct dw_lli * ret_lli; - rt_uint32_t used_index; - rt_uint32_t lli_size; - //rt_kprintf("put desc in...\n"); - used_index = p_dma->dma_channel[p_transfer->channel_number].used_index; - lli_size = p_transfer->actual_lli_size; - p_dma->dma_channel[p_transfer->channel_number].used_index += lli_size; - p_dma->dma_channel[p_transfer->channel_number].used_index %= p_dma->dma_channel[p_transfer->channel_number].desc_total_no; - p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt += lli_size; - p_transfer->lli_size = 0; - p_transfer->actual_lli_size = 0; - return 0; + struct dw_lli * ret_lli; + rt_uint32_t used_index; + rt_uint32_t lli_size; + //rt_kprintf("put desc in...\n"); + used_index = p_dma->dma_channel[p_transfer->channel_number].used_index; + lli_size = p_transfer->actual_lli_size; + p_dma->dma_channel[p_transfer->channel_number].used_index += lli_size; + p_dma->dma_channel[p_transfer->channel_number].used_index %= p_dma->dma_channel[p_transfer->channel_number].desc_total_no; + p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt += lli_size; + p_transfer->lli_size = 0; + p_transfer->actual_lli_size = 0; + return 0; } /***************************************************************************** @@ -499,17 +499,17 @@ rt_uint32_t put_desc(struct fh81_dma *p_dma,struct dma_transfer *p_transfer){ static rt_err_t init (struct rt_dma_device *dma){ - //init the clk table + //init the clk table - struct fh81_dma *my_own = (struct fh81_dma *)dma->parent.user_data; + struct fh81_dma *my_own = (struct fh81_dma *)dma->parent.user_data; - FH_DMA_DEBUG("my_own value:0x%x\n",(rt_uint32_t)my_own); + FH_DMA_DEBUG("my_own value:0x%x\n",(rt_uint32_t)my_own); - //check the user data - RT_ASSERT(my_own != RT_NULL); + //check the user data + RT_ASSERT(my_own != RT_NULL); - return RT_EOK; + return RT_EOK; } @@ -528,12 +528,12 @@ static rt_err_t init (struct rt_dma_device *dma){ static void handle_dma_open(struct fh81_dma *p_dma){ - rt_uint32_t i; - struct dw_dma *temp_dwc; - temp_dwc = &p_dma->dwc; + rt_uint32_t i; + struct dw_dma *temp_dwc; + temp_dwc = &p_dma->dwc; - dw_writel(temp_dwc, CFG, 1); - p_dma->dwc.controller_status = CONTROLLER_STATUS_OPEN; + dw_writel(temp_dwc, CFG, 1); + p_dma->dwc.controller_status = CONTROLLER_STATUS_OPEN; } @@ -549,27 +549,27 @@ static void handle_dma_open(struct fh81_dma *p_dma){ static void handle_dma_close(struct fh81_dma *p_dma){ - rt_uint32_t i; - struct dw_dma *temp_dwc; - temp_dwc = &p_dma->dwc; + rt_uint32_t i; + struct dw_dma *temp_dwc; + temp_dwc = &p_dma->dwc; - //take lock - for(i=0;idwc.channel_max_number;i++){ - rt_sem_take(&p_dma->dma_channel[i].channel_lock, RT_WAITING_FOREVER); + //take lock + for(i=0;idwc.channel_max_number;i++){ + rt_sem_take(&p_dma->dma_channel[i].channel_lock, RT_WAITING_FOREVER); - channel_clear_bit(temp_dwc, CH_EN, lift_shift_bit_num(i)); - p_dma->dma_channel[i].channel_status = CHANNEL_STATUS_CLOSED; - } - dw_writel(temp_dwc, CFG, 0); - p_dma->dwc.controller_status = CONTROLLER_STATUS_CLOSED; + channel_clear_bit(temp_dwc, CH_EN, lift_shift_bit_num(i)); + p_dma->dma_channel[i].channel_status = CHANNEL_STATUS_CLOSED; + } + dw_writel(temp_dwc, CFG, 0); + p_dma->dwc.controller_status = CONTROLLER_STATUS_CLOSED; - //release lock - for(i=0;idwc.channel_max_number;i++){ - rt_sem_release(&p_dma->dma_channel[i].channel_lock); - } + //release lock + for(i=0;idwc.channel_max_number;i++){ + rt_sem_release(&p_dma->dma_channel[i].channel_lock); + } - //destroy the workqueue.. - //rt_workqueue_destroy(p_dma->isr_workqueue); + //destroy the workqueue.. + //rt_workqueue_destroy(p_dma->isr_workqueue); } @@ -584,26 +584,26 @@ static void handle_dma_close(struct fh81_dma *p_dma){ * what does this function returned? *****************************************************************************/ -#define CHANNEL_REAL_FREE (0) -#define CHANNEL_NOT_FREE (1) +#define CHANNEL_REAL_FREE (0) +#define CHANNEL_NOT_FREE (1) static rt_uint32_t check_channel_real_free(struct fh81_dma *p_dma,rt_uint32_t channel_number){ - struct dw_dma *temp_dwc; - temp_dwc = &p_dma->dwc; - rt_uint32_t ret_status; + struct dw_dma *temp_dwc; + temp_dwc = &p_dma->dwc; + rt_uint32_t ret_status; - RT_ASSERT(channel_number < p_dma->dwc.channel_max_number); + RT_ASSERT(channel_number < p_dma->dwc.channel_max_number); - ret_status = dw_readl(temp_dwc, CH_EN); - if(ret_status & lift_shift_bit_num(channel_number)){ - //the channel is still busy!!!error here - //FH_DMA_DEBUG("auto request channel error\n"); - return CHANNEL_NOT_FREE; - } - return CHANNEL_REAL_FREE; + ret_status = dw_readl(temp_dwc, CH_EN); + if(ret_status & lift_shift_bit_num(channel_number)){ + //the channel is still busy!!!error here + //FH_DMA_DEBUG("auto request channel error\n"); + return CHANNEL_NOT_FREE; + } + return CHANNEL_REAL_FREE; } @@ -620,110 +620,110 @@ static rt_uint32_t check_channel_real_free(struct fh81_dma *p_dma,rt_uint32_t c static rt_err_t handle_request_channel(struct fh81_dma *p_dma,struct dma_transfer *p_transfer){ - rt_uint32_t i; - struct dw_dma *temp_dwc; - temp_dwc = &p_dma->dwc; - rt_err_t ret_status = RT_EOK; + rt_uint32_t i; + struct dw_dma *temp_dwc; + temp_dwc = &p_dma->dwc; + rt_err_t ret_status = RT_EOK; - //handle if auto check channel... - if(p_transfer->channel_number == AUTO_FIND_CHANNEL){ - //check each channel lock,find a free channel... - for(i=0;idwc.channel_max_number;i++){ - ret_status = rt_sem_trytake(&p_dma->dma_channel[i].channel_lock); - if(ret_status == RT_EOK){ - break; - } - } + //handle if auto check channel... + if(p_transfer->channel_number == AUTO_FIND_CHANNEL){ + //check each channel lock,find a free channel... + for(i=0;idwc.channel_max_number;i++){ + ret_status = rt_sem_trytake(&p_dma->dma_channel[i].channel_lock); + if(ret_status == RT_EOK){ + break; + } + } - if(i < p_dma->dwc.channel_max_number){ - ret_status = check_channel_real_free(p_dma,i); - if(ret_status!= CHANNEL_REAL_FREE){ - FH_DMA_DEBUG("auto request channel error\n"); - RT_ASSERT(ret_status == CHANNEL_REAL_FREE); - } - //caution : channel is already locked here.... - p_transfer->channel_number = i; - //bind to the controller. - //p_transfer->dma_controller = p_dma; - p_dma->dma_channel[i].channel_status = CHANNEL_STATUS_OPEN; - } - else - return -RT_ENOMEM; + if(i < p_dma->dwc.channel_max_number){ + ret_status = check_channel_real_free(p_dma,i); + if(ret_status!= CHANNEL_REAL_FREE){ + FH_DMA_DEBUG("auto request channel error\n"); + RT_ASSERT(ret_status == CHANNEL_REAL_FREE); + } + //caution : channel is already locked here.... + p_transfer->channel_number = i; + //bind to the controller. + //p_transfer->dma_controller = p_dma; + p_dma->dma_channel[i].channel_status = CHANNEL_STATUS_OPEN; + } + else + return -RT_ENOMEM; - } + } - // request channel by user - else{ - // + // request channel by user + else{ + // - RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number); - ret_status = rt_sem_take(&p_dma->dma_channel[p_transfer->channel_number].channel_lock, RT_TICK_PER_SECOND*50); - if(ret_status != RT_EOK) - return -RT_ENOMEM; - //rt_enter_critical(); - ret_status = check_channel_real_free(p_dma,p_transfer->channel_number); - if(ret_status!= CHANNEL_REAL_FREE){ - FH_DMA_DEBUG("user request channel error\n"); - RT_ASSERT(ret_status == CHANNEL_REAL_FREE); - } + RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number); + ret_status = rt_sem_take(&p_dma->dma_channel[p_transfer->channel_number].channel_lock, RT_TICK_PER_SECOND*50); + if(ret_status != RT_EOK) + return -RT_ENOMEM; + //rt_enter_critical(); + ret_status = check_channel_real_free(p_dma,p_transfer->channel_number); + if(ret_status!= CHANNEL_REAL_FREE){ + FH_DMA_DEBUG("user request channel error\n"); + RT_ASSERT(ret_status == CHANNEL_REAL_FREE); + } - //bind to the controller - //p_transfer->dma_controller = p_dma; - p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_OPEN; - //rt_exit_critical(); - } + //bind to the controller + //p_transfer->dma_controller = p_dma; + p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_OPEN; + //rt_exit_critical(); + } - //malloc desc for this one channel... - //fix me.... + //malloc desc for this one channel... + //fix me.... - p_dma->dma_channel[p_transfer->channel_number].allign_malloc = (rt_uint32_t) rt_malloc( - (p_dma->dma_channel[p_transfer->channel_number].desc_total_no - * sizeof(struct dw_lli)) + CACHE_LINE_SIZE); + p_dma->dma_channel[p_transfer->channel_number].allign_malloc = (rt_uint32_t) rt_malloc( + (p_dma->dma_channel[p_transfer->channel_number].desc_total_no + * sizeof(struct dw_lli)) + CACHE_LINE_SIZE); - if(!p_dma->dma_channel[p_transfer->channel_number].allign_malloc){ - //release channel - rt_kprintf("[dma]: no mem to malloc channel%d desc..\n",p_transfer->channel_number); - p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_CLOSED; - rt_sem_release(&p_dma->dma_channel[p_transfer->channel_number].channel_lock); - return -RT_ENOMEM; - } + if(!p_dma->dma_channel[p_transfer->channel_number].allign_malloc){ + //release channel + rt_kprintf("[dma]: no mem to malloc channel%d desc..\n",p_transfer->channel_number); + p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_CLOSED; + rt_sem_release(&p_dma->dma_channel[p_transfer->channel_number].channel_lock); + return -RT_ENOMEM; + } - p_dma->dma_channel[p_transfer->channel_number].base_lli = - (struct dw_lli *) allign_func( - p_dma->dma_channel[p_transfer->channel_number].allign_malloc, - CACHE_LINE_SIZE); + p_dma->dma_channel[p_transfer->channel_number].base_lli = + (struct dw_lli *) allign_func( + p_dma->dma_channel[p_transfer->channel_number].allign_malloc, + CACHE_LINE_SIZE); - FH_DMA_DEBUG("dma desc addr is %x\n",(rt_uint32_t)p_dma->dma_channel[p_transfer->channel_number].base_lli); - //t1 = (UINT32)rt_malloc(GMAC_TX_RING_SIZE * sizeof(Gmac_Tx_DMA_Descriptors) + CACHE_LINE_SIZE); + FH_DMA_DEBUG("dma desc addr is %x\n",(rt_uint32_t)p_dma->dma_channel[p_transfer->channel_number].base_lli); + //t1 = (UINT32)rt_malloc(GMAC_TX_RING_SIZE * sizeof(Gmac_Tx_DMA_Descriptors) + CACHE_LINE_SIZE); - if(!p_dma->dma_channel[p_transfer->channel_number].base_lli){ - FH_DMA_DEBUG("request desc failed..\n"); - RT_ASSERT(p_dma->dma_channel[p_transfer->channel_number].base_lli != RT_NULL); - } + if(!p_dma->dma_channel[p_transfer->channel_number].base_lli){ + FH_DMA_DEBUG("request desc failed..\n"); + RT_ASSERT(p_dma->dma_channel[p_transfer->channel_number].base_lli != RT_NULL); + } - if((rt_uint32_t)p_dma->dma_channel[p_transfer->channel_number].base_lli % 32){ - rt_kprintf("malloc is not cache allign.."); + if((rt_uint32_t)p_dma->dma_channel[p_transfer->channel_number].base_lli % 32){ + rt_kprintf("malloc is not cache allign.."); - } + } - //rt_memset((void *)dma_trans_desc->first_lli, 0, lli_size * sizeof(struct dw_lli)); - rt_memset((void *) p_dma->dma_channel[p_transfer->channel_number].base_lli, - 0, - p_dma->dma_channel[p_transfer->channel_number].desc_total_no - * sizeof(struct dw_lli)); + //rt_memset((void *)dma_trans_desc->first_lli, 0, lli_size * sizeof(struct dw_lli)); + rt_memset((void *) p_dma->dma_channel[p_transfer->channel_number].base_lli, + 0, + p_dma->dma_channel[p_transfer->channel_number].desc_total_no + * sizeof(struct dw_lli)); - p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt = p_dma->dma_channel[p_transfer->channel_number].desc_total_no; - p_dma->dma_channel[p_transfer->channel_number].free_index = 0; - p_dma->dma_channel[p_transfer->channel_number].used_index = 0; + p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt = p_dma->dma_channel[p_transfer->channel_number].desc_total_no; + p_dma->dma_channel[p_transfer->channel_number].free_index = 0; + p_dma->dma_channel[p_transfer->channel_number].used_index = 0; - return RT_EOK; + return RT_EOK; } @@ -747,40 +747,40 @@ static rt_err_t handle_request_channel(struct fh81_dma *p_dma,struct dma_transf static rt_uint32_t handle_release_channel(struct fh81_dma *p_dma,struct dma_transfer *p_transfer){ - rt_uint32_t i; - struct dw_dma *temp_dwc; - temp_dwc = &p_dma->dwc; - rt_uint32_t ret_status; + rt_uint32_t i; + struct dw_dma *temp_dwc; + temp_dwc = &p_dma->dwc; + rt_uint32_t ret_status; - //rt_enter_critical(); - ret_status = p_dma->dma_channel[p_transfer->channel_number].channel_status; + //rt_enter_critical(); + ret_status = p_dma->dma_channel[p_transfer->channel_number].channel_status; - RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number); + RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number); - if(ret_status == CHANNEL_STATUS_CLOSED){ - FH_DMA_DEBUG("release channel error,reason: release a closed channel!!\n"); - RT_ASSERT(ret_status != CHANNEL_STATUS_CLOSED); - } + if(ret_status == CHANNEL_STATUS_CLOSED){ + FH_DMA_DEBUG("release channel error,reason: release a closed channel!!\n"); + RT_ASSERT(ret_status != CHANNEL_STATUS_CLOSED); + } - channel_clear_bit(temp_dwc, CH_EN, lift_shift_bit_num(p_transfer->channel_number)); - rt_sem_release(&p_dma->dma_channel[p_transfer->channel_number].channel_lock); - //p_transfer->dma_controller = RT_NULL; - p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_CLOSED; - p_dma->dma_channel[p_transfer->channel_number].open_flag = DEFAULT_TRANSFER; - //rt_exit_critical(); + channel_clear_bit(temp_dwc, CH_EN, lift_shift_bit_num(p_transfer->channel_number)); + rt_sem_release(&p_dma->dma_channel[p_transfer->channel_number].channel_lock); + //p_transfer->dma_controller = RT_NULL; + p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_CLOSED; + p_dma->dma_channel[p_transfer->channel_number].open_flag = DEFAULT_TRANSFER; + //rt_exit_critical(); - //release this channel malloc mem... - //fix me..... - rt_free((void *)p_dma->dma_channel[p_transfer->channel_number].allign_malloc); - p_dma->dma_channel[p_transfer->channel_number].allign_malloc = RT_NULL; - p_dma->dma_channel[p_transfer->channel_number].base_lli = RT_NULL; - p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt = p_dma->dma_channel[p_transfer->channel_number].desc_total_no; - p_dma->dma_channel[p_transfer->channel_number].free_index = 0; - p_dma->dma_channel[p_transfer->channel_number].used_index = 0; + //release this channel malloc mem... + //fix me..... + rt_free((void *)p_dma->dma_channel[p_transfer->channel_number].allign_malloc); + p_dma->dma_channel[p_transfer->channel_number].allign_malloc = RT_NULL; + p_dma->dma_channel[p_transfer->channel_number].base_lli = RT_NULL; + p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt = p_dma->dma_channel[p_transfer->channel_number].desc_total_no; + p_dma->dma_channel[p_transfer->channel_number].free_index = 0; + p_dma->dma_channel[p_transfer->channel_number].used_index = 0; - return RT_EOK; + return RT_EOK; } @@ -788,26 +788,26 @@ static rt_uint32_t handle_release_channel(struct fh81_dma *p_dma,struct dma_tra static rt_uint32_t cal_lli_size(struct dma_transfer *p_transfer){ - RT_ASSERT(p_transfer != RT_NULL); - RT_ASSERT(p_transfer->dma_controller != RT_NULL); - RT_ASSERT(p_transfer->src_width <= DW_DMA_SLAVE_WIDTH_32BIT); - rt_uint32_t lli_number = 0; - rt_uint32_t channel_max_trans_per_lli = 0; - channel_max_trans_per_lli = p_transfer->dma_controller->dma_channel[p_transfer->channel_number].desc_trans_size; + RT_ASSERT(p_transfer != RT_NULL); + RT_ASSERT(p_transfer->dma_controller != RT_NULL); + RT_ASSERT(p_transfer->src_width <= DW_DMA_SLAVE_WIDTH_32BIT); + rt_uint32_t lli_number = 0; + rt_uint32_t channel_max_trans_per_lli = 0; + channel_max_trans_per_lli = p_transfer->dma_controller->dma_channel[p_transfer->channel_number].desc_trans_size; - lli_number = (p_transfer->trans_len % channel_max_trans_per_lli) ? 1:0; - lli_number += p_transfer->trans_len / channel_max_trans_per_lli; + lli_number = (p_transfer->trans_len % channel_max_trans_per_lli) ? 1:0; + lli_number += p_transfer->trans_len / channel_max_trans_per_lli; - return lli_number; + return lli_number; } static void dump_lli(struct dw_lli *p_lli){ - FH_DMA_DEBUG("link_mem padd:0x%x\n sar:0x%x\n dar:0x%x\n llp:0x%x\n ctllo:0x%x\n ctlhi:0x%x\n sstat:0x%x\n dstat:0x%x\n", - (rt_uint32_t)p_lli,p_lli->sar, p_lli->dar, p_lli->llp, - p_lli->ctllo, p_lli->ctlhi,p_lli->sstat,p_lli->dstat); + FH_DMA_DEBUG("link_mem padd:0x%x\n sar:0x%x\n dar:0x%x\n llp:0x%x\n ctllo:0x%x\n ctlhi:0x%x\n sstat:0x%x\n dstat:0x%x\n", + (rt_uint32_t)p_lli,p_lli->sar, p_lli->dar, p_lli->llp, + p_lli->ctllo, p_lli->ctlhi,p_lli->sstat,p_lli->dstat); } /***************************************************************************** * Description: @@ -820,296 +820,296 @@ static void dump_lli(struct dw_lli *p_lli){ static void handle_single_transfer(struct fh81_dma *p_dma,struct dma_transfer *p_transfer){ - rt_uint32_t i; - struct dw_dma *temp_dwc; - temp_dwc = &p_dma->dwc; - volatile rt_uint32_t ret_status; - rt_list_t *p_controller_list; - rt_uint32_t lli_size,max_trans_size; - struct dw_lli *p_lli = RT_NULL; - struct dma_transfer *dma_trans_desc; - struct dma_transfer *_dma_trans_desc; + rt_uint32_t i; + struct dw_dma *temp_dwc; + temp_dwc = &p_dma->dwc; + volatile rt_uint32_t ret_status; + rt_list_t *p_controller_list; + rt_uint32_t lli_size,max_trans_size; + struct dw_lli *p_lli = RT_NULL; + struct dma_transfer *dma_trans_desc; + struct dma_transfer *_dma_trans_desc; - rt_uint32_t temp_src_add; - rt_uint32_t temp_dst_add; - rt_uint32_t trans_total_len = 0; - rt_uint32_t temp_trans_size = 0; - //rt_uint32_t dma_channl_no = 0; + rt_uint32_t temp_src_add; + rt_uint32_t temp_dst_add; + rt_uint32_t trans_total_len = 0; + rt_uint32_t temp_trans_size = 0; + //rt_uint32_t dma_channl_no = 0; - RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number); - RT_ASSERT(p_transfer->dma_number < DMA_CONTROLLER_NUMBER); - RT_ASSERT(&fh81_dma_controller[p_transfer->dma_number] == p_dma); - //when the dma transfer....the lock should be 0!!!! - //or user may not request the channel... - RT_ASSERT(p_dma->dma_channel[p_transfer->channel_number].channel_lock.value == 0); + RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number); + RT_ASSERT(p_transfer->dma_number < DMA_CONTROLLER_NUMBER); + RT_ASSERT(&fh81_dma_controller[p_transfer->dma_number] == p_dma); + //when the dma transfer....the lock should be 0!!!! + //or user may not request the channel... + RT_ASSERT(p_dma->dma_channel[p_transfer->channel_number].channel_lock.value == 0); - ret_status = p_dma->dma_channel[p_transfer->channel_number].channel_status; - if(ret_status == CHANNEL_STATUS_CLOSED){ - FH_DMA_DEBUG("transfer error,reason: use a closed channel..\n"); - RT_ASSERT(ret_status != CHANNEL_STATUS_CLOSED); - } - p_transfer->dma_controller = p_dma; + ret_status = p_dma->dma_channel[p_transfer->channel_number].channel_status; + if(ret_status == CHANNEL_STATUS_CLOSED){ + FH_DMA_DEBUG("transfer error,reason: use a closed channel..\n"); + RT_ASSERT(ret_status != CHANNEL_STATUS_CLOSED); + } + p_transfer->dma_controller = p_dma; - rt_list_init(&p_transfer->transfer_list); - max_trans_size = p_transfer->dma_controller->dma_channel[p_transfer->channel_number].desc_trans_size; - //add transfer to the controller's queue list - //here should insert before and handle after....this could be a fifo... - rt_list_insert_before(&p_dma->dma_channel[p_transfer->channel_number].queue , &p_transfer->transfer_list); + rt_list_init(&p_transfer->transfer_list); + max_trans_size = p_transfer->dma_controller->dma_channel[p_transfer->channel_number].desc_trans_size; + //add transfer to the controller's queue list + //here should insert before and handle after....this could be a fifo... + rt_list_insert_before(&p_dma->dma_channel[p_transfer->channel_number].queue , &p_transfer->transfer_list); - p_controller_list = &p_dma->dma_channel[p_transfer->channel_number].queue; + p_controller_list = &p_dma->dma_channel[p_transfer->channel_number].queue; - //here the driver could make a queue to cache the transfer and kick a thread to handle the queue~~~ - //but now,this is a easy version...,just handle the transfer now!!! - list_for_each_entry_safe(dma_trans_desc, _dma_trans_desc, p_controller_list, transfer_list) { + //here the driver could make a queue to cache the transfer and kick a thread to handle the queue~~~ + //but now,this is a easy version...,just handle the transfer now!!! + list_for_each_entry_safe(dma_trans_desc, _dma_trans_desc, p_controller_list, transfer_list) { - //the dma controller could see the active transfer ..... - p_transfer->dma_controller->dma_channel[p_transfer->channel_number].active_trans = dma_trans_desc; + //the dma controller could see the active transfer ..... + p_transfer->dma_controller->dma_channel[p_transfer->channel_number].active_trans = dma_trans_desc; - trans_total_len = p_transfer->trans_len; + trans_total_len = p_transfer->trans_len; - //handle desc - //step1:cal lli size... - lli_size = cal_lli_size(dma_trans_desc); - //step2:malloc lli_size mem - //dma_trans_desc->first_lli = (struct dw_lli *)rt_malloc(lli_size * sizeof(struct dw_lli)); + //handle desc + //step1:cal lli size... + lli_size = cal_lli_size(dma_trans_desc); + //step2:malloc lli_size mem + //dma_trans_desc->first_lli = (struct dw_lli *)rt_malloc(lli_size * sizeof(struct dw_lli)); - dma_trans_desc->first_lli = get_desc(p_dma,p_transfer,lli_size); + dma_trans_desc->first_lli = get_desc(p_dma,p_transfer,lli_size); - //not enough mem.. - if(dma_trans_desc->first_lli == RT_NULL){ + //not enough mem.. + if(dma_trans_desc->first_lli == RT_NULL){ - FH_DMA_DEBUG("transfer error,reason: not enough mem..\n"); - RT_ASSERT(dma_trans_desc->first_lli != RT_NULL); - } + FH_DMA_DEBUG("transfer error,reason: not enough mem..\n"); + RT_ASSERT(dma_trans_desc->first_lli != RT_NULL); + } - //bug here.... - rt_memset((void *)dma_trans_desc->first_lli, 0, lli_size * sizeof(struct dw_lli)); + //bug here.... + rt_memset((void *)dma_trans_desc->first_lli, 0, lli_size * sizeof(struct dw_lli)); - p_lli = dma_trans_desc->first_lli; + p_lli = dma_trans_desc->first_lli; - //warnning!!!!must check if the add is 32bits ally... - RT_ASSERT(((rt_uint32_t)p_lli & 0x03) == 0); + //warnning!!!!must check if the add is 32bits ally... + RT_ASSERT(((rt_uint32_t)p_lli & 0x03) == 0); - RT_ASSERT(dma_trans_desc->dst_inc_mode <=DW_DMA_SLAVE_FIX); - RT_ASSERT(dma_trans_desc->src_inc_mode <=DW_DMA_SLAVE_FIX); - //step3: set the mem.. - for(i=0;idst_inc_mode <=DW_DMA_SLAVE_FIX); + RT_ASSERT(dma_trans_desc->src_inc_mode <=DW_DMA_SLAVE_FIX); + //step3: set the mem.. + for(i=0;idst_inc_mode){ - case DW_DMA_SLAVE_INC: - temp_dst_add = dma_trans_desc->dst_add + i * max_trans_size * (1<dst_width); - break; - case DW_DMA_SLAVE_DEC: - temp_dst_add = dma_trans_desc->dst_add - i * max_trans_size * (1<dst_width); - break; - case DW_DMA_SLAVE_FIX: - temp_dst_add = dma_trans_desc->dst_add; - break; + switch(dma_trans_desc->dst_inc_mode){ + case DW_DMA_SLAVE_INC: + temp_dst_add = dma_trans_desc->dst_add + i * max_trans_size * (1<dst_width); + break; + case DW_DMA_SLAVE_DEC: + temp_dst_add = dma_trans_desc->dst_add - i * max_trans_size * (1<dst_width); + break; + case DW_DMA_SLAVE_FIX: + temp_dst_add = dma_trans_desc->dst_add; + break; - } + } - switch(dma_trans_desc->src_inc_mode){ - case DW_DMA_SLAVE_INC: - temp_src_add = dma_trans_desc->src_add + i * max_trans_size * (1<src_width); - break; - case DW_DMA_SLAVE_DEC: - temp_src_add = dma_trans_desc->src_add - i * max_trans_size * (1<src_width); - break; - case DW_DMA_SLAVE_FIX: - temp_src_add = dma_trans_desc->src_add ; - break; + switch(dma_trans_desc->src_inc_mode){ + case DW_DMA_SLAVE_INC: + temp_src_add = dma_trans_desc->src_add + i * max_trans_size * (1<src_width); + break; + case DW_DMA_SLAVE_DEC: + temp_src_add = dma_trans_desc->src_add - i * max_trans_size * (1<src_width); + break; + case DW_DMA_SLAVE_FIX: + temp_src_add = dma_trans_desc->src_add ; + break; - } + } - p_lli[i].sar = temp_src_add; - p_lli[i].dar = temp_dst_add; + p_lli[i].sar = temp_src_add; + p_lli[i].dar = temp_dst_add; - //para ctl - temp_trans_size = (trans_total_len / max_trans_size)? max_trans_size : (trans_total_len % max_trans_size); - trans_total_len -= temp_trans_size; + //para ctl + temp_trans_size = (trans_total_len / max_trans_size)? max_trans_size : (trans_total_len % max_trans_size); + trans_total_len -= temp_trans_size; - RT_ASSERT(dma_trans_desc->dst_width <=DW_DMA_SLAVE_WIDTH_32BIT); - RT_ASSERT(dma_trans_desc->src_width <=DW_DMA_SLAVE_WIDTH_32BIT); + RT_ASSERT(dma_trans_desc->dst_width <=DW_DMA_SLAVE_WIDTH_32BIT); + RT_ASSERT(dma_trans_desc->src_width <=DW_DMA_SLAVE_WIDTH_32BIT); - RT_ASSERT(dma_trans_desc->dst_msize <=DW_DMA_SLAVE_MSIZE_256); - RT_ASSERT(dma_trans_desc->src_msize <=DW_DMA_SLAVE_MSIZE_256); - RT_ASSERT(dma_trans_desc->fc_mode <=DMA_P2P); + RT_ASSERT(dma_trans_desc->dst_msize <=DW_DMA_SLAVE_MSIZE_256); + RT_ASSERT(dma_trans_desc->src_msize <=DW_DMA_SLAVE_MSIZE_256); + RT_ASSERT(dma_trans_desc->fc_mode <=DMA_P2P); - p_lli[i].ctllo = DWC_CTLL_INT_EN|DWC_CTLL_DST_WIDTH(dma_trans_desc->dst_width)|DWC_CTLL_SRC_WIDTH(dma_trans_desc->src_width) - |DWC_CTLL_DST_INC_MODE(dma_trans_desc->dst_inc_mode)|DWC_CTLL_SRC_INC_MODE(dma_trans_desc->src_inc_mode) - |DWC_CTLL_DST_MSIZE(dma_trans_desc->dst_msize)|DWC_CTLL_SRC_MSIZE(dma_trans_desc->src_msize)|DWC_CTLL_FC(dma_trans_desc->fc_mode) - |DWC_CTLL_DMS(0)|DWC_CTLL_SMS(0); - //block size - p_lli[i].ctlhi = temp_trans_size; + p_lli[i].ctllo = DWC_CTLL_INT_EN|DWC_CTLL_DST_WIDTH(dma_trans_desc->dst_width)|DWC_CTLL_SRC_WIDTH(dma_trans_desc->src_width) + |DWC_CTLL_DST_INC_MODE(dma_trans_desc->dst_inc_mode)|DWC_CTLL_SRC_INC_MODE(dma_trans_desc->src_inc_mode) + |DWC_CTLL_DST_MSIZE(dma_trans_desc->dst_msize)|DWC_CTLL_SRC_MSIZE(dma_trans_desc->src_msize)|DWC_CTLL_FC(dma_trans_desc->fc_mode) + |DWC_CTLL_DMS(0)|DWC_CTLL_SMS(0); + //block size + p_lli[i].ctlhi = temp_trans_size; - if(trans_total_len > 0){ - p_lli[i].llp = (rt_uint32_t)&p_lli[i+1]; - p_lli[i].ctllo |= DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN; - } + if(trans_total_len > 0){ + p_lli[i].llp = (rt_uint32_t)&p_lli[i+1]; + p_lli[i].ctllo |= DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN; + } - //flush cache to mem - mmu_clean_invalidated_dcache((rt_uint32_t)&p_lli[i],sizeof(struct dw_lli)); + //flush cache to mem + mmu_clean_invalidated_dcache((rt_uint32_t)&p_lli[i],sizeof(struct dw_lli)); - dump_lli(&p_lli[i]); - } + dump_lli(&p_lli[i]); + } - //clear the isr status + //clear the isr status - //set the dma config reg - //clear cfg reload reg - //ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); - //ret_status &= ~(DWC_CFGL_RELOAD_SAR|DWC_CFGL_RELOAD_DAR); - dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,0); + //set the dma config reg + //clear cfg reload reg + //ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); + //ret_status &= ~(DWC_CFGL_RELOAD_SAR|DWC_CFGL_RELOAD_DAR); + dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,0); - //set the first link add - //ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].LLP); - ret_status = 0; - ret_status = (rt_uint32_t)&p_lli[0]; - dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].LLP,ret_status); + //set the first link add + //ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].LLP); + ret_status = 0; + ret_status = (rt_uint32_t)&p_lli[0]; + dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].LLP,ret_status); - //set link enable - //ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_LO); - ret_status = 0; - ret_status =DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN; - dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_LO,ret_status); + //set link enable + //ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_LO); + ret_status = 0; + ret_status =DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN; + dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_LO,ret_status); - dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_HI,0); - //set handshaking + dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_HI,0); + //set handshaking - RT_ASSERT(dma_trans_desc->dst_hs <= DMA_SW_HANDSHAKING); - RT_ASSERT(dma_trans_desc->src_hs <= DMA_SW_HANDSHAKING); + RT_ASSERT(dma_trans_desc->dst_hs <= DMA_SW_HANDSHAKING); + RT_ASSERT(dma_trans_desc->src_hs <= DMA_SW_HANDSHAKING); - if(dma_trans_desc->dst_hs == DMA_SW_HANDSHAKING){ - ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); - ret_status |= DWC_CFGL_HS_DST; - dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); - } - else{ - ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); - ret_status &= ~DWC_CFGL_HS_DST; - dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); - } + if(dma_trans_desc->dst_hs == DMA_SW_HANDSHAKING){ + ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); + ret_status |= DWC_CFGL_HS_DST; + dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); + } + else{ + ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); + ret_status &= ~DWC_CFGL_HS_DST; + dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); + } - if(dma_trans_desc->src_hs == DMA_SW_HANDSHAKING){ - ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); - ret_status |= DWC_CFGL_HS_SRC; - dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); - } - else{ - ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); - ret_status &= ~DWC_CFGL_HS_SRC; - dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); - } + if(dma_trans_desc->src_hs == DMA_SW_HANDSHAKING){ + ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); + ret_status |= DWC_CFGL_HS_SRC; + dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); + } + else{ + ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); + ret_status &= ~DWC_CFGL_HS_SRC; + dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); + } - //only hw handshaking need this.. - switch(dma_trans_desc->fc_mode){ - case DMA_M2M: - break; - case DMA_M2P: - //set dst per... - RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END); + //only hw handshaking need this.. + switch(dma_trans_desc->fc_mode){ + case DMA_M2M: + break; + case DMA_M2P: + //set dst per... + RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END); - ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); + ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); - //clear 43 ~ 46 bit - ret_status &= ~0x7800; + //clear 43 ~ 46 bit + ret_status &= ~0x7800; - ret_status |= DWC_CFGH_DST_PER(dma_trans_desc->dst_per); - dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); - //DWC_CFGH_SRC_PER + ret_status |= DWC_CFGH_DST_PER(dma_trans_desc->dst_per); + dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); + //DWC_CFGH_SRC_PER - break; - case DMA_P2M: - //set src per... - RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END); + break; + case DMA_P2M: + //set src per... + RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END); - ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); + ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); - //clear 39 ~ 42 bit - ret_status &= ~0x780; + //clear 39 ~ 42 bit + ret_status &= ~0x780; - ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per); - dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); + ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per); + dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); - break; - case DMA_P2P: - //set src and dst.. - RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END); - RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END); + break; + case DMA_P2P: + //set src and dst.. + RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END); + RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END); - ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); - ret_status &= ~0x7800; - ret_status &= ~0x780; - ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per) | DWC_CFGH_DST_PER(dma_trans_desc->dst_per); - dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); + ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); + ret_status &= ~0x7800; + ret_status &= ~0x780; + ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per) | DWC_CFGH_DST_PER(dma_trans_desc->dst_per); + dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); - break; - default: - break; - } + break; + default: + break; + } - dma_trans_desc->dma_controller->dma_channel[dma_trans_desc->channel_number].channel_status = CHANNEL_STATUS_BUSY; - //enable isr... - channel_set_bit(temp_dwc, MASK.XFER, lift_shift_bit_num(dma_trans_desc->channel_number)); - channel_set_bit(temp_dwc, MASK.ERROR, lift_shift_bit_num(dma_trans_desc->channel_number)); - //close - channel_clear_bit(temp_dwc, MASK.BLOCK, lift_shift_bit_num(dma_trans_desc->channel_number)); + dma_trans_desc->dma_controller->dma_channel[dma_trans_desc->channel_number].channel_status = CHANNEL_STATUS_BUSY; + //enable isr... + channel_set_bit(temp_dwc, MASK.XFER, lift_shift_bit_num(dma_trans_desc->channel_number)); + channel_set_bit(temp_dwc, MASK.ERROR, lift_shift_bit_num(dma_trans_desc->channel_number)); + //close + channel_clear_bit(temp_dwc, MASK.BLOCK, lift_shift_bit_num(dma_trans_desc->channel_number)); - dw_writel(temp_dwc, CLEAR.XFER, 1<<(dma_trans_desc->channel_number)); - dw_writel(temp_dwc, CLEAR.BLOCK, 1<<(dma_trans_desc->channel_number)); - dw_writel(temp_dwc, CLEAR.SRC_TRAN, 1<<(dma_trans_desc->channel_number)); - dw_writel(temp_dwc, CLEAR.DST_TRAN, 1<<(dma_trans_desc->channel_number)); - dw_writel(temp_dwc, CLEAR.ERROR, 1<<(dma_trans_desc->channel_number)); + dw_writel(temp_dwc, CLEAR.XFER, 1<<(dma_trans_desc->channel_number)); + dw_writel(temp_dwc, CLEAR.BLOCK, 1<<(dma_trans_desc->channel_number)); + dw_writel(temp_dwc, CLEAR.SRC_TRAN, 1<<(dma_trans_desc->channel_number)); + dw_writel(temp_dwc, CLEAR.DST_TRAN, 1<<(dma_trans_desc->channel_number)); + dw_writel(temp_dwc, CLEAR.ERROR, 1<<(dma_trans_desc->channel_number)); - ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); - FH_DMA_DEBUG("cfg_hi value:0x%x\n",ret_status); + ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); + FH_DMA_DEBUG("cfg_hi value:0x%x\n",ret_status); - ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); - FH_DMA_DEBUG("cfg_low value:0x%x\n",ret_status); + ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); + FH_DMA_DEBUG("cfg_low value:0x%x\n",ret_status); - ret_status = dw_readl(temp_dwc, MASK.BLOCK); - FH_DMA_DEBUG("mask block value:0x%x\n",ret_status); + ret_status = dw_readl(temp_dwc, MASK.BLOCK); + FH_DMA_DEBUG("mask block value:0x%x\n",ret_status); - ret_status = dw_readl(temp_dwc, MASK.XFER); - FH_DMA_DEBUG("mask xfer value:0x%x\n",ret_status); + ret_status = dw_readl(temp_dwc, MASK.XFER); + FH_DMA_DEBUG("mask xfer value:0x%x\n",ret_status); - if(dma_trans_desc->prepare_callback){ - dma_trans_desc->prepare_callback(dma_trans_desc->prepare_para); - } - //enable the channle to transfer - channel_set_bit(temp_dwc, CH_EN, lift_shift_bit_num(dma_trans_desc->channel_number)); + if(dma_trans_desc->prepare_callback){ + dma_trans_desc->prepare_callback(dma_trans_desc->prepare_para); + } + //enable the channle to transfer + channel_set_bit(temp_dwc, CH_EN, lift_shift_bit_num(dma_trans_desc->channel_number)); - } + } } @@ -1124,85 +1124,85 @@ static void handle_single_transfer(struct fh81_dma *p_dma,struct dma_transfer * static rt_err_t control (struct rt_dma_device *dma, int cmd, void *arg){ - struct fh81_dma *my_own = (struct fh81_dma *)dma->parent.user_data; - rt_uint32_t i; - struct dw_dma *dwc; - dwc = &my_own->dwc; + struct fh81_dma *my_own = (struct fh81_dma *)dma->parent.user_data; + rt_uint32_t i; + struct dw_dma *dwc; + dwc = &my_own->dwc; - rt_err_t ret = RT_EOK; + rt_err_t ret = RT_EOK; - struct dma_transfer *p_dma_transfer = (struct dma_transfer *)arg; + struct dma_transfer *p_dma_transfer = (struct dma_transfer *)arg; - //FH_DMA_DEBUG("p_dma_transfer value:0x%x\n",(rt_uint32_t)p_dma_transfer); + //FH_DMA_DEBUG("p_dma_transfer value:0x%x\n",(rt_uint32_t)p_dma_transfer); - RT_ASSERT(my_own != RT_NULL); - RT_ASSERT(dwc != RT_NULL); + RT_ASSERT(my_own != RT_NULL); + RT_ASSERT(dwc != RT_NULL); - switch(cmd){ - case RT_DEVICE_CTRL_DMA_OPEN: + switch(cmd){ + case RT_DEVICE_CTRL_DMA_OPEN: - //open the controller.. - handle_dma_open(my_own); - break; - case RT_DEVICE_CTRL_DMA_CLOSE: + //open the controller.. + handle_dma_open(my_own); + break; + case RT_DEVICE_CTRL_DMA_CLOSE: - //close the controller.. - handle_dma_close(my_own); - break; - case RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL: - //request a channel for the user - RT_ASSERT(p_dma_transfer != RT_NULL); - ret = handle_request_channel(my_own,p_dma_transfer); + //close the controller.. + handle_dma_close(my_own); + break; + case RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL: + //request a channel for the user + RT_ASSERT(p_dma_transfer != RT_NULL); + ret = handle_request_channel(my_own,p_dma_transfer); - break; - case RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL: - //release a channel - RT_ASSERT(p_dma_transfer != RT_NULL); + break; + case RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL: + //release a channel + RT_ASSERT(p_dma_transfer != RT_NULL); - ret = handle_release_channel(my_own,p_dma_transfer); + ret = handle_release_channel(my_own,p_dma_transfer); - break; + break; - case RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER: - //make a channel to transfer data. - RT_ASSERT(p_dma_transfer != RT_NULL); - //check if the dma channel is open,or return error. + case RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER: + //make a channel to transfer data. + RT_ASSERT(p_dma_transfer != RT_NULL); + //check if the dma channel is open,or return error. - my_own->dma_channel[p_dma_transfer->channel_number].open_flag = SINGLE_TRANSFER; - handle_single_transfer(my_own,p_dma_transfer); - //then wait for the channel is complete.. - //caution that::we should be in the "rt_enter_critical()"when set the dma to work. - break; + my_own->dma_channel[p_dma_transfer->channel_number].open_flag = SINGLE_TRANSFER; + handle_single_transfer(my_own,p_dma_transfer); + //then wait for the channel is complete.. + //caution that::we should be in the "rt_enter_critical()"when set the dma to work. + break; - case RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE: - RT_ASSERT(p_dma_transfer != RT_NULL); - my_own->dma_channel[p_dma_transfer->channel_number].open_flag = CYCLIC_TRANSFER; - rt_fh_dma_cyclic_prep(my_own,p_dma_transfer); - break; + case RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE: + RT_ASSERT(p_dma_transfer != RT_NULL); + my_own->dma_channel[p_dma_transfer->channel_number].open_flag = CYCLIC_TRANSFER; + rt_fh_dma_cyclic_prep(my_own,p_dma_transfer); + break; - case RT_DEVICE_CTRL_DMA_CYCLIC_START: - rt_fh_dma_cyclic_start(p_dma_transfer); - break; + case RT_DEVICE_CTRL_DMA_CYCLIC_START: + rt_fh_dma_cyclic_start(p_dma_transfer); + break; - case RT_DEVICE_CTRL_DMA_CYCLIC_STOP: - rt_fh_dma_cyclic_stop(p_dma_transfer); - break; + case RT_DEVICE_CTRL_DMA_CYCLIC_STOP: + rt_fh_dma_cyclic_stop(p_dma_transfer); + break; - case RT_DEVICE_CTRL_DMA_CYCLIC_FREE: - rt_fh_dma_cyclic_free(p_dma_transfer); - break; + case RT_DEVICE_CTRL_DMA_CYCLIC_FREE: + rt_fh_dma_cyclic_free(p_dma_transfer); + break; - default: - break; + default: + break; - } + } - return ret; + return ret; } @@ -1213,55 +1213,55 @@ static void rt_fh81_dma_isr(int irq, void *param) { - RT_ASSERT(irq == DMAC_IRQn); - rt_uint32_t isr_channel_x,i,error,isr_channel_b; - struct fh81_dma *my_own = (struct fh81_dma *)param; - struct dw_dma *dwc; - struct dma_transfer *p_transfer; - dwc = &my_own->dwc; - //p_transfer = - //rt_kprintf("dma isr get in~~~\n"); - error = dw_readl(dwc,STATUS.ERROR); - if(error != 0){ - FH_DMA_DEBUG("dma isr error!!!!\n"); - RT_ASSERT(error == RT_NULL); - } + RT_ASSERT(irq == DMAC_IRQn); + rt_uint32_t isr_channel_x,i,error,isr_channel_b; + struct fh81_dma *my_own = (struct fh81_dma *)param; + struct dw_dma *dwc; + struct dma_transfer *p_transfer; + dwc = &my_own->dwc; + //p_transfer = + //rt_kprintf("dma isr get in~~~\n"); + error = dw_readl(dwc,STATUS.ERROR); + if(error != 0){ + FH_DMA_DEBUG("dma isr error!!!!\n"); + RT_ASSERT(error == RT_NULL); + } - isr_channel_x = dw_readl(dwc,STATUS.XFER); - isr_channel_b = dw_readl(dwc,STATUS.BLOCK); - //for single check the transfer status - //check which channel... + isr_channel_x = dw_readl(dwc,STATUS.XFER); + isr_channel_b = dw_readl(dwc,STATUS.BLOCK); + //for single check the transfer status + //check which channel... - for(i=0;idwc.channel_max_number;i++){ + for(i=0;idwc.channel_max_number;i++){ - if(my_own->dma_channel[i].open_flag == SINGLE_TRANSFER){ - if(isr_channel_x & 1<dma_channel[i].open_flag == SINGLE_TRANSFER){ + if(isr_channel_x & 1<dma_channel[i].active_trans; + p_transfer = my_own->dma_channel[i].active_trans; - if(p_transfer->complete_callback){ - p_transfer->complete_callback(p_transfer->complete_para); - } - p_transfer->dma_controller->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_IDLE; - //here is a bug...do not free here - //rt_free(p_transfer->first_lli); - put_desc(my_own,p_transfer); - rt_list_remove(&p_transfer->transfer_list); - } + if(p_transfer->complete_callback){ + p_transfer->complete_callback(p_transfer->complete_para); + } + p_transfer->dma_controller->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_IDLE; + //here is a bug...do not free here + //rt_free(p_transfer->first_lli); + put_desc(my_own,p_transfer); + rt_list_remove(&p_transfer->transfer_list); + } - } + } - else if(my_own->dma_channel[i].open_flag == CYCLIC_TRANSFER){ - if(isr_channel_b & 1<dma_channel[i].active_trans; - dw_writel(dwc, CLEAR.BLOCK, 1<<(p_transfer->channel_number)); - if(p_transfer->complete_callback){ - p_transfer->complete_callback(p_transfer->complete_para); - } - } - } - } + else if(my_own->dma_channel[i].open_flag == CYCLIC_TRANSFER){ + if(isr_channel_b & 1<dma_channel[i].active_trans; + dw_writel(dwc, CLEAR.BLOCK, 1<<(p_transfer->channel_number)); + if(p_transfer->complete_callback){ + p_transfer->complete_callback(p_transfer->complete_para); + } + } + } + } } @@ -1278,55 +1278,55 @@ static void rt_fh81_dma_isr(int irq, void *param) *****************************************************************************/ const char *channel_lock_name[FH81_MAX_CHANNEL] = { - "channel_0_lock", - "channel_1_lock", - "channel_2_lock", - "channel_3_lock", + "channel_0_lock", + "channel_1_lock", + "channel_2_lock", + "channel_3_lock", }; rt_err_t fh81_dma_register(struct fh81_dma * fh81_dma_p, char * dma_name){ - rt_uint32_t i; + rt_uint32_t i; - RT_ASSERT(fh81_dma_p != RT_NULL); - RT_ASSERT(dma_name != RT_NULL); - //RT_ASSERT(fh81_dma_p->dwc.init != FH81_DMA_INIT_ALREADY); + RT_ASSERT(fh81_dma_p != RT_NULL); + RT_ASSERT(dma_name != RT_NULL); + //RT_ASSERT(fh81_dma_p->dwc.init != FH81_DMA_INIT_ALREADY); - if(fh81_dma_p->dwc.init == FH81_DMA_INIT_ALREADY) - return 0; + if(fh81_dma_p->dwc.init == FH81_DMA_INIT_ALREADY) + return 0; - struct rt_dma_device *rt_dma; - rt_dma = &fh81_dma_p->parent; - rt_dma->ops = &fh81_dma_ops; + struct rt_dma_device *rt_dma; + rt_dma = &fh81_dma_p->parent; + rt_dma->ops = &fh81_dma_ops; - //soc para set - fh81_dma_p->dwc.name = dma_name; - fh81_dma_p->dwc.regs =(void *)DMA_REG_BASE; - fh81_dma_p->dwc.paddr = DMA_REG_BASE; - fh81_dma_p->dwc.irq = DMAC_IRQn; - fh81_dma_p->dwc.channel_max_number = FH81_MAX_CHANNEL; - fh81_dma_p->dwc.controller_status = CONTROLLER_STATUS_CLOSED; - fh81_dma_p->dwc.init = FH81_DMA_INIT_ALREADY; - fh81_dma_p->dwc.id = 0; - //channel set - for(i=0;idma_channel[i].channel_status = CHANNEL_STATUS_CLOSED; - fh81_dma_p->dma_channel[i].desc_total_no = DESC_MAX_SIZE; - //rt_completion_init(&(fh81_dma_p->dma_channel[i].transfer_completion)); - rt_list_init(&(fh81_dma_p->dma_channel[i].queue)); - fh81_dma_p->dma_channel[i].desc_trans_size = FH81_CHANNEL_MAX_TRANSFER_SIZE; - rt_sem_init(&fh81_dma_p->dma_channel[i].channel_lock, channel_lock_name[i], 1, RT_IPC_FLAG_FIFO); - } + //soc para set + fh81_dma_p->dwc.name = dma_name; + fh81_dma_p->dwc.regs =(void *)DMA_REG_BASE; + fh81_dma_p->dwc.paddr = DMA_REG_BASE; + fh81_dma_p->dwc.irq = DMAC_IRQn; + fh81_dma_p->dwc.channel_max_number = FH81_MAX_CHANNEL; + fh81_dma_p->dwc.controller_status = CONTROLLER_STATUS_CLOSED; + fh81_dma_p->dwc.init = FH81_DMA_INIT_ALREADY; + fh81_dma_p->dwc.id = 0; + //channel set + for(i=0;idma_channel[i].channel_status = CHANNEL_STATUS_CLOSED; + fh81_dma_p->dma_channel[i].desc_total_no = DESC_MAX_SIZE; + //rt_completion_init(&(fh81_dma_p->dma_channel[i].transfer_completion)); + rt_list_init(&(fh81_dma_p->dma_channel[i].queue)); + fh81_dma_p->dma_channel[i].desc_trans_size = FH81_CHANNEL_MAX_TRANSFER_SIZE; + rt_sem_init(&fh81_dma_p->dma_channel[i].channel_lock, channel_lock_name[i], 1, RT_IPC_FLAG_FIFO); + } - //isr - rt_hw_interrupt_install(fh81_dma_p->dwc.irq, rt_fh81_dma_isr, - (void *)fh81_dma_p, "dma_isr"); - rt_hw_interrupt_umask(fh81_dma_p->dwc.irq); + //isr + rt_hw_interrupt_install(fh81_dma_p->dwc.irq, rt_fh81_dma_isr, + (void *)fh81_dma_p, "dma_isr"); + rt_hw_interrupt_umask(fh81_dma_p->dwc.irq); - return rt_hw_dma_register(rt_dma,dma_name,RT_DEVICE_FLAG_RDWR,fh81_dma_p); + return rt_hw_dma_register(rt_dma,dma_name,RT_DEVICE_FLAG_RDWR,fh81_dma_p); } @@ -1334,10 +1334,10 @@ rt_err_t fh81_dma_register(struct fh81_dma * fh81_dma_p, static void rt_fh_dma_cyclic_stop(struct dma_transfer *p){ - struct fh81_dma *my_own = p->dma_controller; - struct dw_dma *dwc; - dwc = &my_own->dwc; - channel_clear_bit(dwc, CH_EN, 1<<(p->channel_number)); + struct fh81_dma *my_own = p->dma_controller; + struct dw_dma *dwc; + dwc = &my_own->dwc; + channel_clear_bit(dwc, CH_EN, 1<<(p->channel_number)); } @@ -1345,45 +1345,45 @@ static void rt_fh_dma_cyclic_stop(struct dma_transfer *p){ static void rt_fh_dma_cyclic_start(struct dma_transfer *p){ - struct fh81_dma *my_own = p->dma_controller; - struct dw_dma *dwc; - dwc = &my_own->dwc; - volatile uint32_t ret_status; - struct dw_lli *p_lli = RT_NULL; - p_lli = p->first_lli; + struct fh81_dma *my_own = p->dma_controller; + struct dw_dma *dwc; + dwc = &my_own->dwc; + volatile uint32_t ret_status; + struct dw_lli *p_lli = RT_NULL; + p_lli = p->first_lli; - //32bit ally - RT_ASSERT(((uint32_t)p_lli & 0x03) == 0); + //32bit ally + RT_ASSERT(((uint32_t)p_lli & 0x03) == 0); - dw_writel(dwc, CLEAR.XFER, 1<<(p->channel_number)); - dw_writel(dwc, CLEAR.BLOCK, 1<<(p->channel_number)); - dw_writel(dwc, CLEAR.ERROR, 1<<(p->channel_number)); + dw_writel(dwc, CLEAR.XFER, 1<<(p->channel_number)); + dw_writel(dwc, CLEAR.BLOCK, 1<<(p->channel_number)); + dw_writel(dwc, CLEAR.ERROR, 1<<(p->channel_number)); - //enable isr - channel_set_bit(dwc, MASK.BLOCK, lift_shift_bit_num(p->channel_number)); - //disable isr - channel_clear_bit(dwc, MASK.XFER, lift_shift_bit_num(p->channel_number)); + //enable isr + channel_set_bit(dwc, MASK.BLOCK, lift_shift_bit_num(p->channel_number)); + //disable isr + channel_clear_bit(dwc, MASK.XFER, lift_shift_bit_num(p->channel_number)); - ret_status = dw_readl(dwc,CHAN[p->channel_number].CFG_LO); - ret_status &= ~(DWC_CFGL_RELOAD_SAR|DWC_CFGL_RELOAD_DAR); - dw_writel(dwc,CHAN[p->channel_number].CFG_LO,ret_status); + ret_status = dw_readl(dwc,CHAN[p->channel_number].CFG_LO); + ret_status &= ~(DWC_CFGL_RELOAD_SAR|DWC_CFGL_RELOAD_DAR); + dw_writel(dwc,CHAN[p->channel_number].CFG_LO,ret_status); - //set the first link add - ret_status = dw_readl(dwc,CHAN[p->channel_number].LLP); - ret_status = (uint32_t)&p_lli[0]; - dw_writel(dwc,CHAN[p->channel_number].LLP,ret_status); + //set the first link add + ret_status = dw_readl(dwc,CHAN[p->channel_number].LLP); + ret_status = (uint32_t)&p_lli[0]; + dw_writel(dwc,CHAN[p->channel_number].LLP,ret_status); - //set link enable - //ret_status = dw_readl(dwc,CHAN[p->channel_number].CTL_LO); - ret_status =DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN; - dw_writel(dwc,CHAN[p->channel_number].CTL_LO,ret_status); + //set link enable + //ret_status = dw_readl(dwc,CHAN[p->channel_number].CTL_LO); + ret_status =DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN; + dw_writel(dwc,CHAN[p->channel_number].CTL_LO,ret_status); - //clear ctl_hi - dw_writel(dwc,CHAN[p->channel_number].CTL_HI,0); + //clear ctl_hi + dw_writel(dwc,CHAN[p->channel_number].CTL_HI,0); - //enable channle - channel_set_bit(dwc, CH_EN, 1<<(p->channel_number)); + //enable channle + channel_set_bit(dwc, CH_EN, 1<<(p->channel_number)); } @@ -1391,228 +1391,228 @@ static void rt_fh_dma_cyclic_start(struct dma_transfer *p){ static void rt_fh_dma_cyclic_prep(struct fh81_dma * fh81_dma_p,struct dma_transfer *p) { - //bind the controller to the transfer - p->dma_controller = fh81_dma_p; - //bind active transfer - fh81_dma_p->dma_channel[p->channel_number].active_trans = p; - //p_transfer->dma_controller->dma_channel[p_transfer->channel_number].active_trans = dma_trans_desc; - struct fh81_dma *my_own = p->dma_controller; - struct dw_dma *dwc; - dwc = &my_own->dwc; - volatile uint32_t ret_status; - struct dw_lli *p_lli = RT_NULL; - uint32_t periods,i; - uint32_t temp_src_add; - uint32_t temp_dst_add; - uint32_t buf_len = p->trans_len; - uint32_t period_len = p->period_len; + //bind the controller to the transfer + p->dma_controller = fh81_dma_p; + //bind active transfer + fh81_dma_p->dma_channel[p->channel_number].active_trans = p; + //p_transfer->dma_controller->dma_channel[p_transfer->channel_number].active_trans = dma_trans_desc; + struct fh81_dma *my_own = p->dma_controller; + struct dw_dma *dwc; + dwc = &my_own->dwc; + volatile uint32_t ret_status; + struct dw_lli *p_lli = RT_NULL; + uint32_t periods,i; + uint32_t temp_src_add; + uint32_t temp_dst_add; + uint32_t buf_len = p->trans_len; + uint32_t period_len = p->period_len; - struct dma_transfer * dma_trans_desc = p; - //check first... - RT_ASSERT(buf_len % period_len == 0); + struct dma_transfer * dma_trans_desc = p; + //check first... + RT_ASSERT(buf_len % period_len == 0); - //cal the periods... - periods = buf_len / period_len; + //cal the periods... + periods = buf_len / period_len; - //get desc.... - //dma_trans_desc->first_lli = (struct dw_lli *)rt_malloc(periods * sizeof(struct dw_lli)); - dma_trans_desc->first_lli = get_desc(fh81_dma_p,dma_trans_desc,periods); + //get desc.... + //dma_trans_desc->first_lli = (struct dw_lli *)rt_malloc(periods * sizeof(struct dw_lli)); + dma_trans_desc->first_lli = get_desc(fh81_dma_p,dma_trans_desc,periods); - if(dma_trans_desc->first_lli == RT_NULL){ + if(dma_trans_desc->first_lli == RT_NULL){ - FH_DMA_DEBUG("transfer error,reason: not enough mem..\n"); - RT_ASSERT(dma_trans_desc->first_lli != RT_NULL); - } + FH_DMA_DEBUG("transfer error,reason: not enough mem..\n"); + RT_ASSERT(dma_trans_desc->first_lli != RT_NULL); + } - rt_memset((void *)dma_trans_desc->first_lli, 0, periods * sizeof(struct dw_lli)); - p_lli = dma_trans_desc->first_lli; + rt_memset((void *)dma_trans_desc->first_lli, 0, periods * sizeof(struct dw_lli)); + p_lli = dma_trans_desc->first_lli; - RT_ASSERT(((uint32_t)p_lli & 0x03) == 0); + RT_ASSERT(((uint32_t)p_lli & 0x03) == 0); - RT_ASSERT(dma_trans_desc->dst_inc_mode <=DW_DMA_SLAVE_FIX); - RT_ASSERT(dma_trans_desc->src_inc_mode <=DW_DMA_SLAVE_FIX); - //step3: set the mem.. - for(i=0;idst_inc_mode){ - case DW_DMA_SLAVE_INC: - temp_dst_add = dma_trans_desc->dst_add + i * period_len * (1<dst_width); - break; - case DW_DMA_SLAVE_DEC: - temp_dst_add = dma_trans_desc->dst_add - i * period_len * (1<dst_width); - break; - case DW_DMA_SLAVE_FIX: - temp_dst_add = dma_trans_desc->dst_add; - break; + RT_ASSERT(dma_trans_desc->dst_inc_mode <=DW_DMA_SLAVE_FIX); + RT_ASSERT(dma_trans_desc->src_inc_mode <=DW_DMA_SLAVE_FIX); + //step3: set the mem.. + for(i=0;idst_inc_mode){ + case DW_DMA_SLAVE_INC: + temp_dst_add = dma_trans_desc->dst_add + i * period_len * (1<dst_width); + break; + case DW_DMA_SLAVE_DEC: + temp_dst_add = dma_trans_desc->dst_add - i * period_len * (1<dst_width); + break; + case DW_DMA_SLAVE_FIX: + temp_dst_add = dma_trans_desc->dst_add; + break; - } + } - switch(dma_trans_desc->src_inc_mode){ - case DW_DMA_SLAVE_INC: - temp_src_add = dma_trans_desc->src_add + i * period_len * (1<src_width); - break; - case DW_DMA_SLAVE_DEC: - temp_src_add = dma_trans_desc->src_add - i * period_len * (1<src_width); - break; - case DW_DMA_SLAVE_FIX: - temp_src_add = dma_trans_desc->src_add ; - break; + switch(dma_trans_desc->src_inc_mode){ + case DW_DMA_SLAVE_INC: + temp_src_add = dma_trans_desc->src_add + i * period_len * (1<src_width); + break; + case DW_DMA_SLAVE_DEC: + temp_src_add = dma_trans_desc->src_add - i * period_len * (1<src_width); + break; + case DW_DMA_SLAVE_FIX: + temp_src_add = dma_trans_desc->src_add ; + break; - } + } - p_lli[i].sar = temp_src_add; - p_lli[i].dar = temp_dst_add; + p_lli[i].sar = temp_src_add; + p_lli[i].dar = temp_dst_add; - //para ctl + //para ctl - RT_ASSERT(dma_trans_desc->dst_width <=DW_DMA_SLAVE_WIDTH_32BIT); - RT_ASSERT(dma_trans_desc->src_width <=DW_DMA_SLAVE_WIDTH_32BIT); + RT_ASSERT(dma_trans_desc->dst_width <=DW_DMA_SLAVE_WIDTH_32BIT); + RT_ASSERT(dma_trans_desc->src_width <=DW_DMA_SLAVE_WIDTH_32BIT); - RT_ASSERT(dma_trans_desc->dst_msize <=DW_DMA_SLAVE_MSIZE_256); - RT_ASSERT(dma_trans_desc->src_msize <=DW_DMA_SLAVE_MSIZE_256); - RT_ASSERT(dma_trans_desc->fc_mode <=DMA_P2P); + RT_ASSERT(dma_trans_desc->dst_msize <=DW_DMA_SLAVE_MSIZE_256); + RT_ASSERT(dma_trans_desc->src_msize <=DW_DMA_SLAVE_MSIZE_256); + RT_ASSERT(dma_trans_desc->fc_mode <=DMA_P2P); - p_lli[i].ctllo = DWC_CTLL_INT_EN|DWC_CTLL_DST_WIDTH(dma_trans_desc->dst_width)|DWC_CTLL_SRC_WIDTH(dma_trans_desc->src_width) - |DWC_CTLL_DST_INC_MODE(dma_trans_desc->dst_inc_mode)|DWC_CTLL_SRC_INC_MODE(dma_trans_desc->src_inc_mode) - |DWC_CTLL_DST_MSIZE(dma_trans_desc->dst_msize)|DWC_CTLL_SRC_MSIZE(dma_trans_desc->src_msize)|DWC_CTLL_FC(dma_trans_desc->fc_mode) - |DWC_CTLL_DMS(0)|DWC_CTLL_SMS(0); - //block size - p_lli[i].ctlhi = period_len; + p_lli[i].ctllo = DWC_CTLL_INT_EN|DWC_CTLL_DST_WIDTH(dma_trans_desc->dst_width)|DWC_CTLL_SRC_WIDTH(dma_trans_desc->src_width) + |DWC_CTLL_DST_INC_MODE(dma_trans_desc->dst_inc_mode)|DWC_CTLL_SRC_INC_MODE(dma_trans_desc->src_inc_mode) + |DWC_CTLL_DST_MSIZE(dma_trans_desc->dst_msize)|DWC_CTLL_SRC_MSIZE(dma_trans_desc->src_msize)|DWC_CTLL_FC(dma_trans_desc->fc_mode) + |DWC_CTLL_DMS(0)|DWC_CTLL_SMS(0); + //block size + p_lli[i].ctlhi = period_len; - p_lli[i].llp = (uint32_t)&p_lli[i+1]; - p_lli[i].ctllo |= DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN; + p_lli[i].llp = (uint32_t)&p_lli[i+1]; + p_lli[i].ctllo |= DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN; - //flush cache to mem - mmu_clean_invalidated_dcache((uint32_t)&p_lli[i],sizeof(struct dw_lli)); + //flush cache to mem + mmu_clean_invalidated_dcache((uint32_t)&p_lli[i],sizeof(struct dw_lli)); - dump_lli(&p_lli[i]); - } - //make a ring here - p_lli[periods -1 ].llp = (uint32_t)&p_lli[0]; + dump_lli(&p_lli[i]); + } + //make a ring here + p_lli[periods -1 ].llp = (uint32_t)&p_lli[0]; - mmu_clean_invalidated_dcache((uint32_t)&p_lli[periods -1 ],sizeof(struct dw_lli)); + mmu_clean_invalidated_dcache((uint32_t)&p_lli[periods -1 ],sizeof(struct dw_lli)); - //parse the handshake - RT_ASSERT(dma_trans_desc->dst_hs <= DMA_SW_HANDSHAKING); - RT_ASSERT(dma_trans_desc->src_hs <= DMA_SW_HANDSHAKING); + //parse the handshake + RT_ASSERT(dma_trans_desc->dst_hs <= DMA_SW_HANDSHAKING); + RT_ASSERT(dma_trans_desc->src_hs <= DMA_SW_HANDSHAKING); - //dst handshake - dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,0); - ret_status = 0; - if(dma_trans_desc->dst_hs == DMA_SW_HANDSHAKING){ - ret_status |= DWC_CFGL_HS_DST; - } - else{ - ret_status &= ~DWC_CFGL_HS_DST; - } - dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); + //dst handshake + dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,0); + ret_status = 0; + if(dma_trans_desc->dst_hs == DMA_SW_HANDSHAKING){ + ret_status |= DWC_CFGL_HS_DST; + } + else{ + ret_status &= ~DWC_CFGL_HS_DST; + } + dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); - //src handshake - ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); - if(dma_trans_desc->src_hs == DMA_SW_HANDSHAKING){ - ret_status |= DWC_CFGL_HS_SRC; - } - else{ - ret_status &= ~DWC_CFGL_HS_SRC; - } - dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); + //src handshake + ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO); + if(dma_trans_desc->src_hs == DMA_SW_HANDSHAKING){ + ret_status |= DWC_CFGL_HS_SRC; + } + else{ + ret_status &= ~DWC_CFGL_HS_SRC; + } + dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status); - //only hw handshaking need this.. - switch(dma_trans_desc->fc_mode){ - case DMA_M2M: - break; - case DMA_M2P: - //set dst per... - RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END); - ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); - //clear 43 ~ 46 bit - ret_status &= ~0x7800; - ret_status |= DWC_CFGH_DST_PER(dma_trans_desc->dst_per); - dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); - //DWC_CFGH_SRC_PER + //only hw handshaking need this.. + switch(dma_trans_desc->fc_mode){ + case DMA_M2M: + break; + case DMA_M2P: + //set dst per... + RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END); + ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); + //clear 43 ~ 46 bit + ret_status &= ~0x7800; + ret_status |= DWC_CFGH_DST_PER(dma_trans_desc->dst_per); + dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); + //DWC_CFGH_SRC_PER - break; - case DMA_P2M: - //set src per... - RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END); - ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); - //clear 39 ~ 42 bit - ret_status &= ~0x780; - ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per); - dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); + break; + case DMA_P2M: + //set src per... + RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END); + ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); + //clear 39 ~ 42 bit + ret_status &= ~0x780; + ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per); + dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); - break; - case DMA_P2P: - //set src and dst.. - RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END); - RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END); + break; + case DMA_P2P: + //set src and dst.. + RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END); + RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END); - ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); - ret_status &= ~0x7800; - ret_status &= ~0x780; - ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per) | DWC_CFGH_DST_PER(dma_trans_desc->dst_per); - dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); + ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI); + ret_status &= ~0x7800; + ret_status &= ~0x780; + ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per) | DWC_CFGH_DST_PER(dma_trans_desc->dst_per); + dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status); - break; - default: - break; - } + break; + default: + break; + } - dma_trans_desc->dma_controller->dma_channel[dma_trans_desc->channel_number].channel_status = CHANNEL_STATUS_BUSY; + dma_trans_desc->dma_controller->dma_channel[dma_trans_desc->channel_number].channel_status = CHANNEL_STATUS_BUSY; - if(dma_trans_desc->prepare_callback){ - dma_trans_desc->prepare_callback(dma_trans_desc->prepare_para); - } + if(dma_trans_desc->prepare_callback){ + dma_trans_desc->prepare_callback(dma_trans_desc->prepare_para); + } } static void rt_fh_dma_cyclic_free(struct dma_transfer *p){ - struct fh81_dma *my_own = p->dma_controller; - struct dw_dma *dwc; - dwc = &my_own->dwc; - volatile uint32_t ret_status; - struct dw_lli *p_lli = RT_NULL; - p_lli = p->first_lli; + struct fh81_dma *my_own = p->dma_controller; + struct dw_dma *dwc; + dwc = &my_own->dwc; + volatile uint32_t ret_status; + struct dw_lli *p_lli = RT_NULL; + p_lli = p->first_lli; - //close channel first.. - channel_clear_bit(dwc, CH_EN, 1<<(p->channel_number)); + //close channel first.. + channel_clear_bit(dwc, CH_EN, 1<<(p->channel_number)); - //check if close really - while (dw_readl(dwc, CH_EN) & 1<<(p->channel_number)); + //check if close really + while (dw_readl(dwc, CH_EN) & 1<<(p->channel_number)); - dw_writel(dwc, CLEAR.XFER, 1<<(p->channel_number)); - dw_writel(dwc, CLEAR.BLOCK, 1<<(p->channel_number)); - dw_writel(dwc, CLEAR.ERROR, 1<<(p->channel_number)); + dw_writel(dwc, CLEAR.XFER, 1<<(p->channel_number)); + dw_writel(dwc, CLEAR.BLOCK, 1<<(p->channel_number)); + dw_writel(dwc, CLEAR.ERROR, 1<<(p->channel_number)); - //rt_free(p->first_lli); - put_desc(my_own,p); + //rt_free(p->first_lli); + put_desc(my_own,p); } void rt_fh_dma_init(void){ - fh81_dma_register(&fh81_dma_controller[0],"fh81_dma"); + fh81_dma_register(&fh81_dma_controller[0],"fh81_dma"); } diff --git a/bsp/fh8620/drivers/fh_dma.h b/bsp/fh8620/drivers/fh_dma.h index faceac2deb..477718d0a5 100644 --- a/bsp/fh8620/drivers/fh_dma.h +++ b/bsp/fh8620/drivers/fh_dma.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,19 +18,19 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef FH_DMA_H_ #define FH_DMA_H_ /**************************************************************************** * #include section -* add #include here if any +* add #include here if any ***************************************************************************/ #include @@ -43,24 +43,24 @@ *********************************/ -#define FH81_MAX_CHANNEL (4) -#define FH81_CHANNEL_MAX_TRANSFER_SIZE (4095) +#define FH81_MAX_CHANNEL (4) +#define FH81_CHANNEL_MAX_TRANSFER_SIZE (4095) enum DMA_HW_HS_MAP{ - ACODEC_RX = 0, - ACODEC_TX, - SPI0_RX, - SPI0_TX, - SPI1_RX, - SPI1_TX, - UART0_RX, - UART0_TX, - UART1_RX, - UART1_TX, - DMA_HW_HS_END, + ACODEC_RX = 0, + ACODEC_TX, + SPI0_RX, + SPI0_TX, + SPI1_RX, + SPI1_TX, + UART0_RX, + UART0_TX, + UART1_RX, + UART1_TX, + DMA_HW_HS_END, }; /********************************* @@ -76,7 +76,7 @@ typedef void (*user_prepare)(void *prepare_para); -/**************************** i'm cut-off line ************************************/ +/**************************** i'm cut-off line ************************************/ @@ -88,128 +88,128 @@ struct fh81_dma; struct dw_lli { - /* values that are not changed by hardware */ - rt_uint32_t sar; - rt_uint32_t dar; - rt_uint32_t llp; /* chain to next lli */ - rt_uint32_t ctllo; - /* values that may get written back: */ - rt_uint32_t ctlhi; - /* sstat and dstat can snapshot peripheral register state. - * silicon config may discard either or both... - */ - rt_uint32_t sstat; - rt_uint32_t dstat; - rt_uint32_t reserve; + /* values that are not changed by hardware */ + rt_uint32_t sar; + rt_uint32_t dar; + rt_uint32_t llp; /* chain to next lli */ + rt_uint32_t ctllo; + /* values that may get written back: */ + rt_uint32_t ctlhi; + /* sstat and dstat can snapshot peripheral register state. + * silicon config may discard either or both... + */ + rt_uint32_t sstat; + rt_uint32_t dstat; + rt_uint32_t reserve; }; //transfer use below struct dma_transfer{ - //this is private for the dma drive....app don't touch it,the driver will manger it - //link interface for more transfer to the controller... - rt_list_t transfer_list; - struct fh81_dma *dma_controller; - //this the mem add....the dma controller will load the setting to move data .... - //user don't touch it - struct dw_lli *first_lli; - rt_uint32_t lli_size; - //new add for allign get desc... - rt_uint32_t actual_lli_size; + //this is private for the dma drive....app don't touch it,the driver will manger it + //link interface for more transfer to the controller... + rt_list_t transfer_list; + struct fh81_dma *dma_controller; + //this the mem add....the dma controller will load the setting to move data .... + //user don't touch it + struct dw_lli *first_lli; + rt_uint32_t lli_size; + //new add for allign get desc... + rt_uint32_t actual_lli_size; - //user could set paras below~~~ -#define AUTO_FIND_CHANNEL (0xff) - //transfer with which dma channel...if the data is 0xff, the driver will auto find a free channel. - rt_uint32_t channel_number; - //which dma you want to use...for fh81....only 0!!! - rt_uint32_t dma_number; + //user could set paras below~~~ +#define AUTO_FIND_CHANNEL (0xff) + //transfer with which dma channel...if the data is 0xff, the driver will auto find a free channel. + rt_uint32_t channel_number; + //which dma you want to use...for fh81....only 0!!! + rt_uint32_t dma_number; - //user should set the para below -#define DMA_M2M (0) // MEM <=> MEM -#define DMA_M2P (1) // MEM => peripheral A -#define DMA_P2M (2) // MEM <= peripheral A -#define DMA_P2P (3) // peripheral A <=> peripheral B - rt_uint32_t fc_mode;//ip->mem. mem->mem. mem->ip + //user should set the para below +#define DMA_M2M (0) // MEM <=> MEM +#define DMA_M2P (1) // MEM => peripheral A +#define DMA_P2M (2) // MEM <= peripheral A +#define DMA_P2P (3) // peripheral A <=> peripheral B + rt_uint32_t fc_mode;//ip->mem. mem->mem. mem->ip -#define DMA_HW_HANDSHAKING (0) -#define DMA_SW_HANDSHAKING (1) - rt_uint32_t src_hs; //src - //if use hw handshaking ,you need to set the hw handshaking number, this SOC defined - rt_uint32_t src_per; //src hw handshake number - //rt_uint32_t irq_mode;//for each transfer,irq maybe not same. suggest for the default(transfer isr) +#define DMA_HW_HANDSHAKING (0) +#define DMA_SW_HANDSHAKING (1) + rt_uint32_t src_hs; //src + //if use hw handshaking ,you need to set the hw handshaking number, this SOC defined + rt_uint32_t src_per; //src hw handshake number + //rt_uint32_t irq_mode;//for each transfer,irq maybe not same. suggest for the default(transfer isr) -#define DW_DMA_SLAVE_WIDTH_8BIT (0) -#define DW_DMA_SLAVE_WIDTH_16BIT (1) -#define DW_DMA_SLAVE_WIDTH_32BIT (2) - rt_uint32_t src_width; +#define DW_DMA_SLAVE_WIDTH_8BIT (0) +#define DW_DMA_SLAVE_WIDTH_16BIT (1) +#define DW_DMA_SLAVE_WIDTH_32BIT (2) + rt_uint32_t src_width; - //the user should reference the hw handshaking watermark.. -#define DW_DMA_SLAVE_MSIZE_1 (0) -#define DW_DMA_SLAVE_MSIZE_4 (1) -#define DW_DMA_SLAVE_MSIZE_8 (2) -#define DW_DMA_SLAVE_MSIZE_16 (3) -#define DW_DMA_SLAVE_MSIZE_32 (4) -#define DW_DMA_SLAVE_MSIZE_64 (5) -#define DW_DMA_SLAVE_MSIZE_128 (6) -#define DW_DMA_SLAVE_MSIZE_256 (7) - rt_uint32_t src_msize; - rt_uint32_t src_add; -#define DW_DMA_SLAVE_INC (0) -#define DW_DMA_SLAVE_DEC (1) -#define DW_DMA_SLAVE_FIX (2) - rt_uint32_t src_inc_mode; //increase mode: increase or not change + //the user should reference the hw handshaking watermark.. +#define DW_DMA_SLAVE_MSIZE_1 (0) +#define DW_DMA_SLAVE_MSIZE_4 (1) +#define DW_DMA_SLAVE_MSIZE_8 (2) +#define DW_DMA_SLAVE_MSIZE_16 (3) +#define DW_DMA_SLAVE_MSIZE_32 (4) +#define DW_DMA_SLAVE_MSIZE_64 (5) +#define DW_DMA_SLAVE_MSIZE_128 (6) +#define DW_DMA_SLAVE_MSIZE_256 (7) + rt_uint32_t src_msize; + rt_uint32_t src_add; +#define DW_DMA_SLAVE_INC (0) +#define DW_DMA_SLAVE_DEC (1) +#define DW_DMA_SLAVE_FIX (2) + rt_uint32_t src_inc_mode; //increase mode: increase or not change -//#define DMA_DST_HW_HANDSHAKING (0) -//#define DMA_DST_SW_HANDSHAKING (1) - rt_uint32_t dst_hs; //src - //if use hw handshaking ,you need to set the hw handshaking number, this SOC defined - rt_uint32_t dst_per; //dst hw handshake number -//#define DW_DMA_SLAVE_WIDTH_8BIT (0) -//#define DW_DMA_SLAVE_WIDTH_16BIT (1) -//#define DW_DMA_SLAVE_WIDTH_32BIT (2) - rt_uint32_t dst_width; -//#define DW_DMA_SLAVE_MSIZE_1 (0) -//#define DW_DMA_SLAVE_MSIZE_4 (1) -//#define DW_DMA_SLAVE_MSIZE_8 (2) -//#define DW_DMA_SLAVE_MSIZE_16 (3) -//#define DW_DMA_SLAVE_MSIZE_32 (4) -//#define DW_DMA_SLAVE_MSIZE_64 (5) -//#define DW_DMA_SLAVE_MSIZE_128 (6) -//#define DW_DMA_SLAVE_MSIZE_256 (7) - rt_uint32_t dst_msize; - rt_uint32_t dst_add; -//#define DW_DMA_SLAVE_INC (0) -//#define DW_DMA_SLAVE_DEC (1) -//#define DW_DMA_SLAVE_FIX (2) - rt_uint32_t dst_inc_mode; //increase mode: increase or not change +//#define DMA_DST_HW_HANDSHAKING (0) +//#define DMA_DST_SW_HANDSHAKING (1) + rt_uint32_t dst_hs; //src + //if use hw handshaking ,you need to set the hw handshaking number, this SOC defined + rt_uint32_t dst_per; //dst hw handshake number +//#define DW_DMA_SLAVE_WIDTH_8BIT (0) +//#define DW_DMA_SLAVE_WIDTH_16BIT (1) +//#define DW_DMA_SLAVE_WIDTH_32BIT (2) + rt_uint32_t dst_width; +//#define DW_DMA_SLAVE_MSIZE_1 (0) +//#define DW_DMA_SLAVE_MSIZE_4 (1) +//#define DW_DMA_SLAVE_MSIZE_8 (2) +//#define DW_DMA_SLAVE_MSIZE_16 (3) +//#define DW_DMA_SLAVE_MSIZE_32 (4) +//#define DW_DMA_SLAVE_MSIZE_64 (5) +//#define DW_DMA_SLAVE_MSIZE_128 (6) +//#define DW_DMA_SLAVE_MSIZE_256 (7) + rt_uint32_t dst_msize; + rt_uint32_t dst_add; +//#define DW_DMA_SLAVE_INC (0) +//#define DW_DMA_SLAVE_DEC (1) +//#define DW_DMA_SLAVE_FIX (2) + rt_uint32_t dst_inc_mode; //increase mode: increase or not change - //total sizes, unit: src_width/DW_DMA_SLAVE_WIDTH_8BIT... - //exg: src_width = DW_DMA_SLAVE_WIDTH_32BIT. trans_len = 2...means that: the dma will transfer 2*4 bytes.. - //exg: src_width = DW_DMA_SLAVE_WIDTH_8BIT. trans_len = 6...means that: the dma will transfer 1*6 bytes.. - rt_uint32_t trans_len; + //total sizes, unit: src_width/DW_DMA_SLAVE_WIDTH_8BIT... + //exg: src_width = DW_DMA_SLAVE_WIDTH_32BIT. trans_len = 2...means that: the dma will transfer 2*4 bytes.. + //exg: src_width = DW_DMA_SLAVE_WIDTH_8BIT. trans_len = 6...means that: the dma will transfer 1*6 bytes.. + rt_uint32_t trans_len; - //this is used when dma finish transfer job - dma_complete_callback complete_callback; - void *complete_para; //for the driver data use the dma driver. + //this is used when dma finish transfer job + dma_complete_callback complete_callback; + void *complete_para; //for the driver data use the dma driver. - //this is used when dma before work..the user maybe need to set his own private para.. - user_prepare prepare_callback; - void *prepare_para; + //this is used when dma before work..the user maybe need to set his own private para.. + user_prepare prepare_callback; + void *prepare_para; - //add cyclic para... - //period len.. - rt_uint32_t period_len; + //add cyclic para... + //period len.. + rt_uint32_t period_len; }; @@ -223,13 +223,13 @@ struct dma_transfer{ /**************************************************************************** * #define section -* add constant #define here if any +* add constant #define here if any ***************************************************************************/ /**************************************************************************** * ADT section -* add Abstract Data Type definition here +* add Abstract Data Type definition here ***************************************************************************/ @@ -240,7 +240,7 @@ struct dma_transfer{ /**************************************************************************** * section -* add function prototype here if any +* add function prototype here if any ***************************************************************************/ rt_err_t fh81_dma_register(struct fh81_dma * fh81_dma_p, char * dma_name); diff --git a/bsp/fh8620/drivers/gpio.c b/bsp/fh8620/drivers/gpio.c index fc3fff639e..7a0dca36df 100644 --- a/bsp/fh8620/drivers/gpio.c +++ b/bsp/fh8620/drivers/gpio.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -410,10 +410,10 @@ int fh_gpio_probe(void *priv_data) int i; if(gpio_obj->id == 0){ - rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_0"); + rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_0"); } else if(gpio_obj->id == 1){ - rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_1"); + rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_1"); } diff --git a/bsp/fh8620/drivers/gpio.h b/bsp/fh8620/drivers/gpio.h index 7fe4d236b7..97b613871b 100644 --- a/bsp/fh8620/drivers/gpio.h +++ b/bsp/fh8620/drivers/gpio.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef GPIO_H_ #define GPIO_H_ diff --git a/bsp/fh8620/drivers/i2c.c b/bsp/fh8620/drivers/i2c.c index 0f9636853d..66931666ea 100644 --- a/bsp/fh8620/drivers/i2c.c +++ b/bsp/fh8620/drivers/i2c.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include #include #include "i2c.h" @@ -50,25 +50,25 @@ static void fh_i2c_xfer_init(struct rt_i2c_bus_device *dev, struct rt_i2c_msg ms { struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv; struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv; - rt_uint32_t ic_con; + rt_uint32_t ic_con; - /* if the slave address is ten bit address, ERROR*/ + /* if the slave address is ten bit address, ERROR*/ if (msgs[i2c_drv->msg_write_idx].flags & I2C_M_TEN) { rt_kprintf("ERROR: %s, ten bit address is NOT supported\n", __func__); return; } - /* Disable the adapter */ - I2C_WaitMasterIdle(i2c_obj); + /* Disable the adapter */ + I2C_WaitMasterIdle(i2c_obj); - I2C_Enable(i2c_obj, RT_FALSE); + I2C_Enable(i2c_obj, RT_FALSE); - /* set the slave (target) address */ - I2C_SetSlaveAddress(i2c_obj, msgs[i2c_drv->msg_write_idx].addr); + /* set the slave (target) address */ + I2C_SetSlaveAddress(i2c_obj, msgs[i2c_drv->msg_write_idx].addr); - /* Enable interrupts */ - I2C_SetInterruptMask(i2c_obj, DW_IC_INTR_DEFAULT_MASK); + /* Enable interrupts */ + I2C_SetInterruptMask(i2c_obj, DW_IC_INTR_DEFAULT_MASK); /* Enable the adapter */ I2C_Enable(i2c_obj, RT_TRUE); @@ -76,30 +76,30 @@ static void fh_i2c_xfer_init(struct rt_i2c_bus_device *dev, struct rt_i2c_msg ms static rt_size_t fh_i2c_xfer(struct rt_i2c_bus_device *dev, - struct rt_i2c_msg msgs[], rt_uint32_t num) + struct rt_i2c_msg msgs[], rt_uint32_t num) { struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv; struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv; int ret; - struct rt_i2c_msg *pmsg = RT_NULL; + struct rt_i2c_msg *pmsg = RT_NULL; - PRINT_I2C_DBG(">>>>>>>>>>>>>%s start\n", __func__); + PRINT_I2C_DBG(">>>>>>>>>>>>>%s start\n", __func__); rt_completion_init(&i2c_drv->transfer_completion); ret = rt_mutex_take(i2c_drv->lock, RT_WAITING_FOREVER); - if (ret != RT_EOK) { - goto done; - } + if (ret != RT_EOK) { + goto done; + } - i2c_drv->msgs = msgs; - i2c_drv->msgs_num = num; - i2c_drv->msg_read_idx = 0; - i2c_drv->msg_write_idx = 0; - i2c_drv->cmd_err = 0; - i2c_drv->msg_err = 0; - i2c_drv->status = STATUS_IDLE; - i2c_obj->abort_source = 0; + i2c_drv->msgs = msgs; + i2c_drv->msgs_num = num; + i2c_drv->msg_read_idx = 0; + i2c_drv->msg_write_idx = 0; + i2c_drv->cmd_err = 0; + i2c_drv->msg_err = 0; + i2c_drv->status = STATUS_IDLE; + i2c_obj->abort_source = 0; ret = I2C_WaitDeviceIdle(i2c_obj); if (ret < 0) @@ -108,51 +108,51 @@ static rt_size_t fh_i2c_xfer(struct rt_i2c_bus_device *dev, //goto done; } - fh_i2c_xfer_init(dev, msgs, num); + fh_i2c_xfer_init(dev, msgs, num); - ret = rt_completion_wait(&i2c_drv->transfer_completion, RT_TICK_PER_SECOND); - PRINT_I2C_DBG("%s transfer finished\n", "rt_completion_wait"); + ret = rt_completion_wait(&i2c_drv->transfer_completion, RT_TICK_PER_SECOND); + PRINT_I2C_DBG("%s transfer finished\n", "rt_completion_wait"); if(ret) - { + { rt_kprintf("ERROR: %s, transfer timeout\n", __func__); I2C_SetDataCmd(i2c_obj, 0x200); I2C_Init(i2c_obj); - ret = -RT_ETIMEOUT; - goto done; - } + ret = -RT_ETIMEOUT; + goto done; + } - if (i2c_drv->msg_err) - { - rt_kprintf("i2c_priv->msg_err: %d\n", i2c_drv->msg_err); - ret = i2c_drv->msg_err; - goto done; - } + if (i2c_drv->msg_err) + { + rt_kprintf("i2c_priv->msg_err: %d\n", i2c_drv->msg_err); + ret = i2c_drv->msg_err; + goto done; + } - /* no error */ - if (!i2c_drv->cmd_err) - { - /* Disable the adapter */ - I2C_WaitMasterIdle(i2c_obj); - I2C_Enable(i2c_obj, RT_FALSE); - ret = num; - goto done; - } + /* no error */ + if (!i2c_drv->cmd_err) + { + /* Disable the adapter */ + I2C_WaitMasterIdle(i2c_obj); + I2C_Enable(i2c_obj, RT_FALSE); + ret = num; + goto done; + } - /* We have an error */ - if (i2c_drv->cmd_err == DW_IC_ERR_TX_ABRT) - { - rt_kprintf("ERROR: %s, i2c_priv>cmd_err == DW_IC_ERR_TX_ABRT\n", __func__); - ret = I2C_HandleTxAbort(i2c_obj); - goto done; - } + /* We have an error */ + if (i2c_drv->cmd_err == DW_IC_ERR_TX_ABRT) + { + rt_kprintf("ERROR: %s, i2c_priv>cmd_err == DW_IC_ERR_TX_ABRT\n", __func__); + ret = I2C_HandleTxAbort(i2c_obj); + goto done; + } - ret = 1; + ret = 1; done: I2C_Enable(i2c_obj, RT_FALSE); rt_mutex_release(i2c_drv->lock); PRINT_I2C_DBG(">>>>>>>>>>>>>%s end\n", __func__); - return ret; + return ret; } @@ -167,164 +167,164 @@ static void i2c_fh_xfer_msg(struct rt_i2c_bus_device *dev) { struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv; struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv; - struct rt_i2c_msg *msgs = i2c_drv->msgs; - rt_uint32_t intr_mask, cmd; - int tx_limit, rx_limit; - rt_uint32_t addr = msgs[i2c_drv->msg_write_idx].addr; - rt_uint32_t buf_len = i2c_drv->tx_buf_len; - rt_uint8_t *buf = i2c_drv->tx_buf; + struct rt_i2c_msg *msgs = i2c_drv->msgs; + rt_uint32_t intr_mask, cmd; + int tx_limit, rx_limit; + rt_uint32_t addr = msgs[i2c_drv->msg_write_idx].addr; + rt_uint32_t buf_len = i2c_drv->tx_buf_len; + rt_uint8_t *buf = i2c_drv->tx_buf; - PRINT_I2C_DBG("%s start, msgs_num: %d, write_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_write_idx); + PRINT_I2C_DBG("%s start, msgs_num: %d, write_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_write_idx); - intr_mask = DW_IC_INTR_DEFAULT_MASK; + intr_mask = DW_IC_INTR_DEFAULT_MASK; - for (; i2c_drv->msg_write_idx < i2c_drv->msgs_num; i2c_drv->msg_write_idx++) - { - /* - * if target address has changed, we need to - * reprogram the target address in the i2c - * adapter when we are done with this transfer - */ - if (msgs[i2c_drv->msg_write_idx].addr != addr) { - rt_kprintf( - "ERROR: %s, invalid target address\n", __func__); - i2c_drv->msg_err = 1; - break; - } + for (; i2c_drv->msg_write_idx < i2c_drv->msgs_num; i2c_drv->msg_write_idx++) + { + /* + * if target address has changed, we need to + * reprogram the target address in the i2c + * adapter when we are done with this transfer + */ + if (msgs[i2c_drv->msg_write_idx].addr != addr) { + rt_kprintf( + "ERROR: %s, invalid target address\n", __func__); + i2c_drv->msg_err = 1; + break; + } - if (msgs[i2c_drv->msg_write_idx].len == 0) { - rt_kprintf( - "ERROR: %s, invalid message length\n", __func__); - i2c_drv->msg_err = 1; - break; - } + if (msgs[i2c_drv->msg_write_idx].len == 0) { + rt_kprintf( + "ERROR: %s, invalid message length\n", __func__); + i2c_drv->msg_err = 1; + break; + } - if (!(i2c_drv->status & STATUS_WRITE_IN_PROGRESS)) - { - /* new i2c_msg */ - buf = msgs[i2c_drv->msg_write_idx].buf; - buf_len = msgs[i2c_drv->msg_write_idx].len; + if (!(i2c_drv->status & STATUS_WRITE_IN_PROGRESS)) + { + /* new i2c_msg */ + buf = msgs[i2c_drv->msg_write_idx].buf; + buf_len = msgs[i2c_drv->msg_write_idx].len; - PRINT_I2C_DBG("new msg: len: %d, buf: 0x%x\n", buf_len, buf[0]); - } + PRINT_I2C_DBG("new msg: len: %d, buf: 0x%x\n", buf_len, buf[0]); + } - tx_limit = i2c_obj->config.tx_fifo_depth - I2C_GetTransmitFifoLevel(i2c_obj); - rx_limit = i2c_obj->config.rx_fifo_depth - I2C_GetReceiveFifoLevel(i2c_obj); + tx_limit = i2c_obj->config.tx_fifo_depth - I2C_GetTransmitFifoLevel(i2c_obj); + rx_limit = i2c_obj->config.rx_fifo_depth - I2C_GetReceiveFifoLevel(i2c_obj); - while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) - { - if (msgs[i2c_drv->msg_write_idx].flags & RT_I2C_RD) - { - cmd = 0x100; - rx_limit--; - } - else - { - cmd = *buf++; - } + while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) + { + if (msgs[i2c_drv->msg_write_idx].flags & RT_I2C_RD) + { + cmd = 0x100; + rx_limit--; + } + else + { + cmd = *buf++; + } - tx_limit--; buf_len--; + tx_limit--; buf_len--; - if(!buf_len) - { - //2015-11-8 ar0130 bug fixed - while(I2C_GetTransmitFifoLevel(i2c_obj)); - cmd |= 0x200; - } + if(!buf_len) + { + //2015-11-8 ar0130 bug fixed + while(I2C_GetTransmitFifoLevel(i2c_obj)); + cmd |= 0x200; + } - I2C_SetDataCmd(i2c_obj, cmd); - } + I2C_SetDataCmd(i2c_obj, cmd); + } - i2c_drv->tx_buf = buf; - i2c_drv->tx_buf_len = buf_len; + i2c_drv->tx_buf = buf; + i2c_drv->tx_buf_len = buf_len; - if (buf_len > 0) - { - /* more bytes to be written */ - i2c_drv->status |= STATUS_WRITE_IN_PROGRESS; - break; - } - else - { - i2c_drv->status &= ~STATUS_WRITE_IN_PROGRESS; - } - } + if (buf_len > 0) + { + /* more bytes to be written */ + i2c_drv->status |= STATUS_WRITE_IN_PROGRESS; + break; + } + else + { + i2c_drv->status &= ~STATUS_WRITE_IN_PROGRESS; + } + } - /* - * If i2c_msg index search is completed, we don't need TX_EMPTY - * interrupt any more. - */ + /* + * If i2c_msg index search is completed, we don't need TX_EMPTY + * interrupt any more. + */ - if (i2c_drv->msg_write_idx == i2c_drv->msgs_num) - intr_mask &= ~DW_IC_INTR_TX_EMPTY; + if (i2c_drv->msg_write_idx == i2c_drv->msgs_num) + intr_mask &= ~DW_IC_INTR_TX_EMPTY; - if (i2c_drv->msg_err) - { - rt_kprintf("ERROR: %s, msg_err: %d\n", __func__, i2c_drv->msg_err); - intr_mask = 0; - } + if (i2c_drv->msg_err) + { + rt_kprintf("ERROR: %s, msg_err: %d\n", __func__, i2c_drv->msg_err); + intr_mask = 0; + } - I2C_SetInterruptMask(i2c_obj, intr_mask); + I2C_SetInterruptMask(i2c_obj, intr_mask); - PRINT_I2C_DBG("%s end\n", __func__); + PRINT_I2C_DBG("%s end\n", __func__); } static void i2c_fh_read(struct rt_i2c_bus_device *dev) { - struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv; - struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv; - struct rt_i2c_msg *msgs = i2c_drv->msgs; - int rx_valid; + struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv; + struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv; + struct rt_i2c_msg *msgs = i2c_drv->msgs; + int rx_valid; - PRINT_I2C_DBG("%s start, msgs_num: %d, read_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_read_idx); + PRINT_I2C_DBG("%s start, msgs_num: %d, read_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_read_idx); - for (; i2c_drv->msg_read_idx < i2c_drv->msgs_num; i2c_drv->msg_read_idx++) - { - rt_uint32_t len; - rt_uint8_t *buf; + for (; i2c_drv->msg_read_idx < i2c_drv->msgs_num; i2c_drv->msg_read_idx++) + { + rt_uint32_t len; + rt_uint8_t *buf; - if (!(msgs[i2c_drv->msg_read_idx].flags & RT_I2C_RD)) - continue; + if (!(msgs[i2c_drv->msg_read_idx].flags & RT_I2C_RD)) + continue; - if (!(i2c_drv->status & STATUS_READ_IN_PROGRESS)) - { - len = msgs[i2c_drv->msg_read_idx].len; - buf = msgs[i2c_drv->msg_read_idx].buf; - } - else - { - PRINT_I2C_DBG("STATUS_READ_IN_PROGRESS\n"); - len = i2c_drv->rx_buf_len; - buf = i2c_drv->rx_buf; - } + if (!(i2c_drv->status & STATUS_READ_IN_PROGRESS)) + { + len = msgs[i2c_drv->msg_read_idx].len; + buf = msgs[i2c_drv->msg_read_idx].buf; + } + else + { + PRINT_I2C_DBG("STATUS_READ_IN_PROGRESS\n"); + len = i2c_drv->rx_buf_len; + buf = i2c_drv->rx_buf; + } - rx_valid = I2C_GetReceiveFifoLevel(i2c_obj); + rx_valid = I2C_GetReceiveFifoLevel(i2c_obj); - if(rx_valid == 0) - { - rt_kprintf("ERROR: %s, rx_valid == 0\n", __func__); - } - PRINT_I2C_DBG("%s, len=%d, rx_valid=%d\n", __func__, len, rx_valid); - for (; len > 0 && rx_valid > 0; len--, rx_valid--) - { - *buf++ = I2C_GetData(i2c_obj); - } + if(rx_valid == 0) + { + rt_kprintf("ERROR: %s, rx_valid == 0\n", __func__); + } + PRINT_I2C_DBG("%s, len=%d, rx_valid=%d\n", __func__, len, rx_valid); + for (; len > 0 && rx_valid > 0; len--, rx_valid--) + { + *buf++ = I2C_GetData(i2c_obj); + } - PRINT_I2C_DBG("i2c_fh_read, len: %d, buf[0]: 0x%x\n", msgs[i2c_drv->msg_read_idx].len, msgs[i2c_drv->msg_read_idx].buf[0]); + PRINT_I2C_DBG("i2c_fh_read, len: %d, buf[0]: 0x%x\n", msgs[i2c_drv->msg_read_idx].len, msgs[i2c_drv->msg_read_idx].buf[0]); - if (len > 0) - { - PRINT_I2C_DBG("len > 0\n"); - i2c_drv->status |= STATUS_READ_IN_PROGRESS; - i2c_drv->rx_buf_len = len; - i2c_drv->rx_buf = buf; - return; - } - else - i2c_drv->status &= ~STATUS_READ_IN_PROGRESS; - } + if (len > 0) + { + PRINT_I2C_DBG("len > 0\n"); + i2c_drv->status |= STATUS_READ_IN_PROGRESS; + i2c_drv->rx_buf_len = len; + i2c_drv->rx_buf = buf; + return; + } + else + i2c_drv->status &= ~STATUS_READ_IN_PROGRESS; + } - PRINT_I2C_DBG("%s end\n", __func__); + PRINT_I2C_DBG("%s end\n", __func__); } /* @@ -336,44 +336,44 @@ static void fh_i2c_interrupt(int this_irq, void *dev_id) struct i2c_driver *i2c_drv = dev_id; struct rt_i2c_bus_device *i2c_bus_dev = i2c_drv->i2c_bus_dev; struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv; - rt_uint32_t stat; + rt_uint32_t stat; - stat = I2C_ClearAndGetInterrupts(i2c_obj); - PRINT_I2C_DBG("status: 0x%x, mask: 0x%x\n", stat, I2C_GetInterruptMask(i2c_obj)); + stat = I2C_ClearAndGetInterrupts(i2c_obj); + PRINT_I2C_DBG("status: 0x%x, mask: 0x%x\n", stat, I2C_GetInterruptMask(i2c_obj)); - if (stat & DW_IC_INTR_TX_ABRT) - { - PRINT_I2C_DBG("DW_IC_INTR_TX_ABRT\n"); - i2c_drv->cmd_err |= DW_IC_ERR_TX_ABRT; - i2c_drv->status = STATUS_IDLE; + if (stat & DW_IC_INTR_TX_ABRT) + { + PRINT_I2C_DBG("DW_IC_INTR_TX_ABRT\n"); + i2c_drv->cmd_err |= DW_IC_ERR_TX_ABRT; + i2c_drv->status = STATUS_IDLE; - /* - * Anytime TX_ABRT is set, the contents of the tx/rx - * buffers are flushed. Make sure to skip them. - */ - I2C_SetInterruptMask(i2c_obj, 0); - goto tx_aborted; - } + /* + * Anytime TX_ABRT is set, the contents of the tx/rx + * buffers are flushed. Make sure to skip them. + */ + I2C_SetInterruptMask(i2c_obj, 0); + goto tx_aborted; + } - if (stat & DW_IC_INTR_RX_FULL) - { - i2c_fh_read(i2c_bus_dev); - } + if (stat & DW_IC_INTR_RX_FULL) + { + i2c_fh_read(i2c_bus_dev); + } - if (stat & DW_IC_INTR_TX_EMPTY) - { - i2c_fh_xfer_msg(i2c_bus_dev); - } + if (stat & DW_IC_INTR_TX_EMPTY) + { + i2c_fh_xfer_msg(i2c_bus_dev); + } - /* - * No need to modify or disable the interrupt mask here. - * i2c_fh_xfer_msg() will take care of it according to - * the current transmit status. - */ + /* + * No need to modify or disable the interrupt mask here. + * i2c_fh_xfer_msg() will take care of it according to + * the current transmit status. + */ tx_aborted: - if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || i2c_drv->msg_err) - rt_completion_done(&i2c_drv->transfer_completion); + if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || i2c_drv->msg_err) + rt_completion_done(&i2c_drv->transfer_completion); } @@ -464,64 +464,64 @@ void rt_hw_i2c_init(void) } static rt_err_t fh_i2c_read_reg(struct rt_i2c_bus_device *fh81_i2c, - rt_uint16_t reg, rt_uint8_t *data) { - struct rt_i2c_msg msg[2]; - rt_uint8_t send_buf[2]; - rt_uint8_t recv_buf[1] = {0}; + rt_uint16_t reg, rt_uint8_t *data) { + struct rt_i2c_msg msg[2]; + rt_uint8_t send_buf[2]; + rt_uint8_t recv_buf[1] = {0}; - PRINT_I2C_DBG("%s start\n", __func__); + PRINT_I2C_DBG("%s start\n", __func__); - // send_buf[0] = ((reg >> 8) & 0xff); - send_buf[0] = (reg & 0xFF); + // send_buf[0] = ((reg >> 8) & 0xff); + send_buf[0] = (reg & 0xFF); - msg[0].addr = 0x51; - msg[0].flags = RT_I2C_WR; - msg[0].len = 1; - msg[0].buf = send_buf; + msg[0].addr = 0x51; + msg[0].flags = RT_I2C_WR; + msg[0].len = 1; + msg[0].buf = send_buf; - msg[1].addr = 0x51; - msg[1].flags = RT_I2C_RD; - msg[1].len = 1; - msg[1].buf = recv_buf; + msg[1].addr = 0x51; + msg[1].flags = RT_I2C_RD; + msg[1].len = 1; + msg[1].buf = recv_buf; - rt_i2c_transfer(fh81_i2c, msg, 2); - *data = recv_buf[0]; - return RT_EOK; + rt_i2c_transfer(fh81_i2c, msg, 2); + *data = recv_buf[0]; + return RT_EOK; } static rt_err_t fh_i2c_write_reg(struct rt_i2c_bus_device *fh81_i2c, - rt_uint16_t reg, rt_uint8_t data) { - struct rt_i2c_msg msg; - rt_uint8_t send_buf[3]; + rt_uint16_t reg, rt_uint8_t data) { + struct rt_i2c_msg msg; + rt_uint8_t send_buf[3]; - PRINT_I2C_DBG("%s start\n", __func__); + PRINT_I2C_DBG("%s start\n", __func__); - // send_buf[0] = ((reg >> 8) & 0xff); - send_buf[1] = (reg & 0xFF); - send_buf[2] = data; + // send_buf[0] = ((reg >> 8) & 0xff); + send_buf[1] = (reg & 0xFF); + send_buf[2] = data; - msg.addr = 0x51; - msg.flags = RT_I2C_WR; - msg.len = 2; - msg.buf = send_buf; + msg.addr = 0x51; + msg.flags = RT_I2C_WR; + msg.len = 2; + msg.buf = send_buf; - rt_i2c_transfer(fh81_i2c, &msg, 1); - PRINT_I2C_DBG("%s end\n", __func__); - return RT_EOK; + rt_i2c_transfer(fh81_i2c, &msg, 1); + PRINT_I2C_DBG("%s end\n", __func__); + return RT_EOK; } void i2c_test_sensor() { - struct rt_i2c_bus_device *fh81_i2c; - struct rt_i2c_msg msg[2]; - rt_uint8_t data[1] = { 0x00 }; + struct rt_i2c_bus_device *fh81_i2c; + struct rt_i2c_msg msg[2]; + rt_uint8_t data[1] = { 0x00 }; - fh81_i2c = rt_i2c_bus_device_find("i2c1"); + fh81_i2c = rt_i2c_bus_device_find("i2c1"); - fh_i2c_write_reg(fh81_i2c, 0x04, 0x02); + fh_i2c_write_reg(fh81_i2c, 0x04, 0x02); - fh_i2c_read_reg(fh81_i2c, 0x02, data); + fh_i2c_read_reg(fh81_i2c, 0x02, data); - rt_kprintf("data read from 0x3038 is 0x%x\r\n", data[0]); - PRINT_I2C_DBG("%s end\n", __func__); + rt_kprintf("data read from 0x3038 is 0x%x\r\n", data[0]); + PRINT_I2C_DBG("%s end\n", __func__); } #ifdef RT_USING_FINSH #include diff --git a/bsp/fh8620/drivers/i2c.h b/bsp/fh8620/drivers/i2c.h index 9046bd81cb..15e4d7e8f2 100644 --- a/bsp/fh8620/drivers/i2c.h +++ b/bsp/fh8620/drivers/i2c.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes diff --git a/bsp/fh8620/drivers/interrupt.c b/bsp/fh8620/drivers/interrupt.c index ab522fab70..4cb250d8e5 100644 --- a/bsp/fh8620/drivers/interrupt.c +++ b/bsp/fh8620/drivers/interrupt.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -105,10 +105,10 @@ void rt_hw_interrupt_init(void) { rt_int32_t i; register rt_uint32_t idx; - fh_intc *p = (fh_intc *)INTC_REG_BASE; + fh_intc *p = (fh_intc *)INTC_REG_BASE; - ictl_close_all_isr(p); + ictl_close_all_isr(p); /* init exceptions table */ for(idx=0; idx < MAX_HANDLERS; idx++) { @@ -137,27 +137,27 @@ void rt_hw_interrupt_init(void) void rt_hw_interrupt_mask(int irq) { - fh_intc *p = (fh_intc *)INTC_REG_BASE; + fh_intc *p = (fh_intc *)INTC_REG_BASE; /* Disable irq on AIC */ - ictl_mask_isr(p,irq); + ictl_mask_isr(p,irq); -// if (irq < 32) -// p->IRQ_EN_L &= ~(1 << irq); -// else -// p->IRQ_EN_H &= ~(1 << (irq - 32)); +// if (irq < 32) +// p->IRQ_EN_L &= ~(1 << irq); +// else +// p->IRQ_EN_H &= ~(1 << (irq - 32)); } void rt_hw_interrupt_umask(int irq) { - fh_intc *p = (fh_intc *)INTC_REG_BASE; + fh_intc *p = (fh_intc *)INTC_REG_BASE; /* Enable irq on AIC */ - ictl_unmask_isr(p,irq); + ictl_unmask_isr(p,irq); // if (irq < 32) -// p->IRQ_EN_L |= 1 << irq; -// else -// p->IRQ_EN_H |= 1 << (irq - 32); +// p->IRQ_EN_L |= 1 << irq; +// else +// p->IRQ_EN_H |= 1 << (irq - 32); } /** @@ -168,7 +168,7 @@ void rt_hw_interrupt_umask(int irq) * @param name the interrupt name * @return old handler */ -rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, +rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, void *param, const char *name) { rt_isr_handler_t old_handler = RT_NULL; @@ -182,7 +182,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, irq_desc[vector].param = param; #ifdef RT_USING_INTERRUPT_INFO rt_snprintf(irq_desc[vector].name, RT_NAME_MAX - 1, "%s", name); - irq_desc[vector].counter = 0; + irq_desc[vector].counter = 0; #endif } } @@ -195,7 +195,7 @@ void list_irq(void) { #ifdef RT_USING_INTERRUPT_INFO - int irq; + int irq; rt_kprintf("number\tcount\tname\n"); for (irq = 0; irq < MAX_HANDLERS; irq++) { diff --git a/bsp/fh8620/drivers/interrupt.h b/bsp/fh8620/drivers/interrupt.h index fd4283b95c..6f62b0d95a 100644 --- a/bsp/fh8620/drivers/interrupt.h +++ b/bsp/fh8620/drivers/interrupt.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -35,6 +35,6 @@ void rt_hw_interrupt_init(void); void rt_hw_interrupt_mask(int irq); void rt_hw_interrupt_umask(int irq); rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, - void *param, const char *name); + void *param, const char *name); #endif /* INTERRUPT_H_ */ diff --git a/bsp/fh8620/drivers/mem_process.c b/bsp/fh8620/drivers/mem_process.c index 4ef7e2d599..e1424bd6ac 100644 --- a/bsp/fh8620/drivers/mem_process.c +++ b/bsp/fh8620/drivers/mem_process.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -28,52 +28,52 @@ #include #include "mmu.h" -#define CHANGLINE_SIZE (1) +#define CHANGLINE_SIZE (1) //#define FH_DBG_MEM_PROCESS #ifdef FH_DBG_MEM_PROCESS void mem_input(rt_uint32_t t_addr, rt_uint32_t t_size, rt_uint8_t t_value) { - rt_kprintf("mem process add:%x \tsize:%x\tvalue:%x\n", t_addr, t_size, - t_value); + rt_kprintf("mem process add:%x \tsize:%x\tvalue:%x\n", t_addr, t_size, + t_value); - rt_memset((void *) t_addr, t_value, t_size); + rt_memset((void *) t_addr, t_value, t_size); - mmu_clean_invalidated_dcache(t_addr, t_size); + mmu_clean_invalidated_dcache(t_addr, t_size); } void mem_output(rt_uint32_t t_addr, rt_uint32_t t_size) { - rt_uint32_t i; - rt_uint32_t cnt = 0; - rt_uint32_t value; - rt_uint32_t addr, size; + rt_uint32_t i; + rt_uint32_t cnt = 0; + rt_uint32_t value; + rt_uint32_t addr, size; - addr = t_addr; - if (t_size % 4) { - rt_kprintf("mem must be alligned\n"); - } - size = t_size / 4; - rt_int32_t *p = (rt_uint32_t *) t_addr; + addr = t_addr; + if (t_size % 4) { + rt_kprintf("mem must be alligned\n"); + } + size = t_size / 4; + rt_int32_t *p = (rt_uint32_t *) t_addr; - //mmu_clean_invalidated_dcache(addr,t_size); - rt_kprintf("mem process add:0x%x \tsize:0x%x\n", addr, t_size); - rt_kprintf("0x%08x:", addr); - for (i = 0; i < size; i++) { - value = *p++; - if ((cnt / CHANGLINE_SIZE) && (cnt % CHANGLINE_SIZE == 0)) { - rt_kprintf("\n"); - } - if (cnt / CHANGLINE_SIZE && (cnt % CHANGLINE_SIZE) == 0) { - rt_kprintf("0x%08x:", addr + i * 4); - } - rt_kprintf("\t%08x", value); - cnt++; + //mmu_clean_invalidated_dcache(addr,t_size); + rt_kprintf("mem process add:0x%x \tsize:0x%x\n", addr, t_size); + rt_kprintf("0x%08x:", addr); + for (i = 0; i < size; i++) { + value = *p++; + if ((cnt / CHANGLINE_SIZE) && (cnt % CHANGLINE_SIZE == 0)) { + rt_kprintf("\n"); + } + if (cnt / CHANGLINE_SIZE && (cnt % CHANGLINE_SIZE) == 0) { + rt_kprintf("0x%08x:", addr + i * 4); + } + rt_kprintf("\t%08x", value); + cnt++; - } - rt_kprintf("\n"); + } + rt_kprintf("\n"); } #endif diff --git a/bsp/fh8620/drivers/mmc.c b/bsp/fh8620/drivers/mmc.c index 399efd5829..1b10974975 100644 --- a/bsp/fh8620/drivers/mmc.c +++ b/bsp/fh8620/drivers/mmc.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes diff --git a/bsp/fh8620/drivers/mmc.h b/bsp/fh8620/drivers/mmc.h index 5de1f5643f..1a0a6c66dc 100644 --- a/bsp/fh8620/drivers/mmc.h +++ b/bsp/fh8620/drivers/mmc.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes diff --git a/bsp/fh8620/drivers/pwm.c b/bsp/fh8620/drivers/pwm.c index 58c9703d78..497527a2f4 100644 --- a/bsp/fh8620/drivers/pwm.c +++ b/bsp/fh8620/drivers/pwm.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -193,7 +193,7 @@ int fh_pwm_probe(void *priv_data) rt_kprintf("ERROR: %s rt_device calloc failed\n", __func__); return -RT_ENOMEM; } - + pwm_dev->user_data = &pwm_drv; pwm_dev->open =fh_pwm_open; pwm_dev->close = fh_pwm_close; diff --git a/bsp/fh8620/drivers/pwm.h b/bsp/fh8620/drivers/pwm.h index 3693ab7973..b40fa89ff9 100644 --- a/bsp/fh8620/drivers/pwm.h +++ b/bsp/fh8620/drivers/pwm.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef PWM_H_ #define PWM_H_ diff --git a/bsp/fh8620/drivers/sadc.c b/bsp/fh8620/drivers/sadc.c index b1654d295c..403b92cd71 100644 --- a/bsp/fh8620/drivers/sadc.c +++ b/bsp/fh8620/drivers/sadc.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -50,123 +50,123 @@ -#define __raw_writeb(v,a) ( *(volatile unsigned char *)(a) = (v)) -#define __raw_writew(v,a) ( *(volatile unsigned short *)(a) = (v)) -#define __raw_writel(v,a) ( *(volatile unsigned int *)(a) = (v)) +#define __raw_writeb(v,a) ( *(volatile unsigned char *)(a) = (v)) +#define __raw_writew(v,a) ( *(volatile unsigned short *)(a) = (v)) +#define __raw_writel(v,a) ( *(volatile unsigned int *)(a) = (v)) -#define __raw_readb(a) ( *(volatile unsigned char *)(a)) -#define __raw_readw(a) ( *(volatile unsigned short *)(a)) -#define __raw_readl(a) ( *(volatile unsigned int *)(a)) +#define __raw_readb(a) ( *(volatile unsigned char *)(a)) +#define __raw_readw(a) ( *(volatile unsigned short *)(a)) +#define __raw_readl(a) ( *(volatile unsigned int *)(a)) #define wrap_readl(wrap, name) \ - __raw_readl(&(((struct wrap_sadc_reg *)wrap->regs)->name)) + __raw_readl(&(((struct wrap_sadc_reg *)wrap->regs)->name)) #define wrap_writel(wrap, name, val) \ - __raw_writel((val), &(((struct wrap_sadc_reg *)wrap->regs)->name)) + __raw_writel((val), &(((struct wrap_sadc_reg *)wrap->regs)->name)) #define wrap_readw(wrap, name) \ - __raw_readw(&(((struct wrap_sadc_reg *)wrap->regs)->name)) + __raw_readw(&(((struct wrap_sadc_reg *)wrap->regs)->name)) #define wrap_writew(wrap, name, val) \ - __raw_writew((val), &(((struct wrap_sadc_reg *)wrap->regs)->name)) + __raw_writew((val), &(((struct wrap_sadc_reg *)wrap->regs)->name)) #define wrap_readb(wrap, name) \ - __raw_readb(&(((struct wrap_sadc_reg *)wrap->regs)->name)) + __raw_readb(&(((struct wrap_sadc_reg *)wrap->regs)->name)) #define wrap_writeb(wrap, name, val) \ - __raw_writeb((val), &(((struct wrap_sadc_reg *)wrap->regs)->name)) + __raw_writeb((val), &(((struct wrap_sadc_reg *)wrap->regs)->name)) -#define IOCTL_GET_SADC_DATA 1 -#define IOCTL_SADC_POWER_DOWN 0xff -#define SADC_WRAP_BASE (0xf1200000) -#define SADC_IRQn (23) -#define SADC_MAX_CONTROLLER (1) -#define SADC_STATUS_COLESD (0) -#define SADC_STATUS_OPEN (1) +#define IOCTL_GET_SADC_DATA 1 +#define IOCTL_SADC_POWER_DOWN 0xff +#define SADC_WRAP_BASE (0xf1200000) +#define SADC_IRQn (23) +#define SADC_MAX_CONTROLLER (1) +#define SADC_STATUS_COLESD (0) +#define SADC_STATUS_OPEN (1) rt_err_t fh_sadc_isr_read_data(struct wrap_sadc_obj *sadc, rt_uint32_t channel, - rt_uint16_t *buf) { - rt_uint32_t xainsel = 1 << channel; - rt_uint32_t xversel = 0; - rt_uint32_t xpwdb = 1; - //cnt - rt_uint32_t sel2sam_pre_cnt = 2; - rt_uint32_t sam_cnt = 2; - rt_uint32_t sam2sel_pos_cnt = 2; - //time out - rt_uint32_t eoc_tos = 0xff; - rt_uint32_t eoc_toe = 0xff; - rt_uint32_t time_out = 0xffff; - //set isr en.. - rt_uint32_t sadc_isr = 0x01; - //start - rt_uint32_t sadc_cmd = 0x01; - //get data - rt_uint32_t temp_data = 0; - rt_err_t ret; + rt_uint16_t *buf) { + rt_uint32_t xainsel = 1 << channel; + rt_uint32_t xversel = 0; + rt_uint32_t xpwdb = 1; + //cnt + rt_uint32_t sel2sam_pre_cnt = 2; + rt_uint32_t sam_cnt = 2; + rt_uint32_t sam2sel_pos_cnt = 2; + //time out + rt_uint32_t eoc_tos = 0xff; + rt_uint32_t eoc_toe = 0xff; + rt_uint32_t time_out = 0xffff; + //set isr en.. + rt_uint32_t sadc_isr = 0x01; + //start + rt_uint32_t sadc_cmd = 0x01; + //get data + rt_uint32_t temp_data = 0; + rt_err_t ret; - //control... - wrap_writel(sadc, sadc_control, xainsel | (xversel << 8) | (xpwdb << 12)); + //control... + wrap_writel(sadc, sadc_control, xainsel | (xversel << 8) | (xpwdb << 12)); - wrap_writel(sadc, sadc_cnt, - sel2sam_pre_cnt | (sam_cnt << 8) | (sam2sel_pos_cnt << 16)); + wrap_writel(sadc, sadc_cnt, + sel2sam_pre_cnt | (sam_cnt << 8) | (sam2sel_pos_cnt << 16)); - wrap_writel(sadc, sadc_timeout, - eoc_tos | (eoc_toe << 8) | (time_out << 16)); + wrap_writel(sadc, sadc_timeout, + eoc_tos | (eoc_toe << 8) | (time_out << 16)); - wrap_writel(sadc, sadc_ier, sadc_isr); + wrap_writel(sadc, sadc_ier, sadc_isr); - wrap_writel(sadc, sadc_cmd, sadc_cmd); + wrap_writel(sadc, sadc_cmd, sadc_cmd); // ret = rt_completion_wait(&sadc->completion, RT_TICK_PER_SECOND / 2); - ret = rt_sem_take(&sadc->completion, 5000); - if(ret != RT_EOK) - return ret; + ret = rt_sem_take(&sadc->completion, 5000); + if(ret != RT_EOK) + return ret; - switch (channel) { - case 0: - case 1: - //read channel 0 1 - temp_data = wrap_readl(sadc, sadc_dout0); - break; + switch (channel) { + case 0: + case 1: + //read channel 0 1 + temp_data = wrap_readl(sadc, sadc_dout0); + break; - case 2: - case 3: - //read channel 2 3 - temp_data = wrap_readl(sadc, sadc_dout1); - break; + case 2: + case 3: + //read channel 2 3 + temp_data = wrap_readl(sadc, sadc_dout1); + break; - case 4: - case 5: - //read channel 4 5 - temp_data = wrap_readl(sadc, sadc_dout2); - break; + case 4: + case 5: + //read channel 4 5 + temp_data = wrap_readl(sadc, sadc_dout2); + break; - case 6: - case 7: - //read channel 6 7 - temp_data = wrap_readl(sadc, sadc_dout3); - break; - default: - break; - } - if (channel % 2) { - //read low 16bit - *buf = (rt_uint16_t) (temp_data & 0xffff); - } else { - //read high 16bit - *buf = (rt_uint16_t) (temp_data >> 16); - } - return RT_EOK; + case 6: + case 7: + //read channel 6 7 + temp_data = wrap_readl(sadc, sadc_dout3); + break; + default: + break; + } + if (channel % 2) { + //read low 16bit + *buf = (rt_uint16_t) (temp_data & 0xffff); + } else { + //read high 16bit + *buf = (rt_uint16_t) (temp_data >> 16); + } + return RT_EOK; } @@ -204,41 +204,41 @@ static rt_err_t fh_sadc_close(rt_device_t dev) static rt_err_t fh_sadc_ioctl(rt_device_t dev, int cmd, void *arg) { - rt_uint32_t control_reg; - struct wrap_sadc_obj *sadc_pri =(struct wrap_sadc_obj *)dev->user_data; - rt_uint32_t ad_data; - rt_uint16_t ad_raw_data; + rt_uint32_t control_reg; + struct wrap_sadc_obj *sadc_pri =(struct wrap_sadc_obj *)dev->user_data; + rt_uint32_t ad_data; + rt_uint16_t ad_raw_data; - SADC_INFO *sadc_info = (SADC_INFO *)arg; - rt_err_t ret; - switch(cmd){ - case SADC_CMD_READ_RAW_DATA: - ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data); - if(ret != RT_EOK) - return ret; - sadc_info->sadc_data = ad_raw_data; + SADC_INFO *sadc_info = (SADC_INFO *)arg; + rt_err_t ret; + switch(cmd){ + case SADC_CMD_READ_RAW_DATA: + ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data); + if(ret != RT_EOK) + return ret; + sadc_info->sadc_data = ad_raw_data; - break; - case SADC_CMD_READ_VOLT: - ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data); - if(ret != RT_EOK) - return ret; + break; + case SADC_CMD_READ_VOLT: + ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data); + if(ret != RT_EOK) + return ret; - ad_data = ad_raw_data * SADC_REF; - ad_data /= SADC_MAX_AD_VALUE; - sadc_info->sadc_data = ad_data; + ad_data = ad_raw_data * SADC_REF; + ad_data /= SADC_MAX_AD_VALUE; + sadc_info->sadc_data = ad_data; - break; - case SADC_CMD_DISABLE: - control_reg = wrap_readl(sadc_pri, sadc_control); - control_reg &= ~(1 << 12); - wrap_writel(sadc_pri, sadc_control, control_reg); + break; + case SADC_CMD_DISABLE: + control_reg = wrap_readl(sadc_pri, sadc_control); + control_reg &= ~(1 << 12); + wrap_writel(sadc_pri, sadc_control, control_reg); - break; - default : - rt_kprintf("wrong para...\n"); - return RT_EIO; - } + break; + default : + rt_kprintf("wrong para...\n"); + return RT_EIO; + } return RT_EOK; } @@ -249,25 +249,25 @@ static void fh_sadc_interrupt(int irq, void *param) { rt_uint32_t isr_status; - struct wrap_sadc_obj *sadc = (struct wrap_sadc_obj *) param; + struct wrap_sadc_obj *sadc = (struct wrap_sadc_obj *) param; - isr_status = wrap_readl(sadc, sadc_int_status); + isr_status = wrap_readl(sadc, sadc_int_status); - if (isr_status & 0x01) { - //close isr - rt_uint32_t sadc_isr = 0x00; + if (isr_status & 0x01) { + //close isr + rt_uint32_t sadc_isr = 0x00; - wrap_writel(sadc, sadc_ier, sadc_isr); - //clear status.. + wrap_writel(sadc, sadc_ier, sadc_isr); + //clear status.. - wrap_writel(sadc, sadc_int_status, isr_status); + wrap_writel(sadc, sadc_int_status, isr_status); - rt_sem_release(&sadc->completion); - // rt_completion_done(&sadc->completion); - } else { - //add error handle process - rt_kprintf("sadc maybe error!\n"); - } + rt_sem_release(&sadc->completion); + // rt_completion_done(&sadc->completion); + } else { + //add error handle process + rt_kprintf("sadc maybe error!\n"); + } } @@ -282,13 +282,13 @@ int fh_sadc_probe(void *priv_data) //caution this is a read only data...if the driver want to use.malloc and copy it.. struct wrap_sadc_obj *sadc_obj = (struct wrap_sadc_obj *)priv_data; if(sadc_obj->init_flag == SADC_INIT_ALREADY) - return RT_EFULL; + return RT_EFULL; //malloc a rt device.. sadc_dev = RT_KERNEL_MALLOC(sizeof(struct rt_device)); if(!sadc_dev){ - return RT_ENOMEM; + return RT_ENOMEM; } rt_memset(sadc_dev, 0, sizeof(struct rt_device)); PRINT_SADC_DBG("id:%d,\treg:%x,\tirq:%d\n",sadc_obj->id,(rt_uint32_t)sadc_obj->regs,sadc_obj->irq_no); @@ -304,8 +304,8 @@ int fh_sadc_probe(void *priv_data) struct wrap_sadc_obj *sadc_pri = RT_KERNEL_MALLOC(sizeof(struct wrap_sadc_obj)); if(!sadc_pri){ - RT_KERNEL_FREE(sadc_dev); - return RT_ENOMEM; + RT_KERNEL_FREE(sadc_dev); + return RT_ENOMEM; } //copy platform data to pri data.. @@ -349,23 +349,23 @@ int fh_sadc_probe(void *priv_data) int fh_sadc_exit(void *priv_data) { - PRINT_SADC_DBG("%s\n",__func__); - struct wrap_sadc_obj *sadc_obj = (struct wrap_sadc_obj *)priv_data; + PRINT_SADC_DBG("%s\n",__func__); + struct wrap_sadc_obj *sadc_obj = (struct wrap_sadc_obj *)priv_data; - struct wrap_sadc_obj *sadc_pri = sadc_obj->rt_dev->user_data; - //release sem; - rt_sem_detach(&sadc_pri->completion); - //sadc_pri->completion = RT_NULL; + struct wrap_sadc_obj *sadc_pri = sadc_obj->rt_dev->user_data; + //release sem; + rt_sem_detach(&sadc_pri->completion); + //sadc_pri->completion = RT_NULL; - //release lock; - rt_mutex_detach(&sadc_pri->lock); + //release lock; + rt_mutex_detach(&sadc_pri->lock); - RT_KERNEL_FREE(sadc_obj->rt_dev->user_data); + RT_KERNEL_FREE(sadc_obj->rt_dev->user_data); - sadc_obj->rt_dev->user_data = RT_NULL; - RT_KERNEL_FREE(sadc_obj->rt_dev); - sadc_obj->rt_dev = RT_NULL; + sadc_obj->rt_dev->user_data = RT_NULL; + RT_KERNEL_FREE(sadc_obj->rt_dev); + sadc_obj->rt_dev = RT_NULL; return 0; } @@ -386,23 +386,23 @@ void rt_hw_sadc_init(void) #ifdef FH_TEST_SADC int fh_sadc_test(void){ - rt_device_t sadc_dev; - SADC_INFO info; - info.channel = 0; - info.sadc_data = 0; - sadc_dev = rt_device_find("sadc"); - if(!sadc_dev){ - rt_kprintf("cann't find the sadc dev\n"); - } - sadc_dev->init(sadc_dev); - sadc_dev->open(sadc_dev,0); - while(1) - { - sadc_dev->control(sadc_dev,SADC_CMD_READ_VOLT,&info); - rt_kprintf("channel:%d,volt:%dmv\n",info.channel,info.sadc_data); - } + rt_device_t sadc_dev; + SADC_INFO info; + info.channel = 0; + info.sadc_data = 0; + sadc_dev = rt_device_find("sadc"); + if(!sadc_dev){ + rt_kprintf("cann't find the sadc dev\n"); + } + sadc_dev->init(sadc_dev); + sadc_dev->open(sadc_dev,0); + while(1) + { + sadc_dev->control(sadc_dev,SADC_CMD_READ_VOLT,&info); + rt_kprintf("channel:%d,volt:%dmv\n",info.channel,info.sadc_data); + } - return 0; + return 0; } #endif diff --git a/bsp/fh8620/drivers/sadc.h b/bsp/fh8620/drivers/sadc.h index d28ed9ba24..afe168bd2e 100644 --- a/bsp/fh8620/drivers/sadc.h +++ b/bsp/fh8620/drivers/sadc.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef SADC_H_ #define SADC_H_ @@ -33,57 +33,57 @@ /**************************************************************************** * #define section - * add constant #define here if any + * add constant #define here if any ***************************************************************************/ //#define FH_SADC_PROC_FILE "driver/sadc" -#define MAX_CHANNEL_NO (8) -#define SADC_REF (3300) -#define SADC_MAX_AD_VALUE (0x3ff) -#define LOOP_MODE (0x55) -#define ISR_MODE (0xAA) +#define MAX_CHANNEL_NO (8) +#define SADC_REF (3300) +#define SADC_MAX_AD_VALUE (0x3ff) +#define LOOP_MODE (0x55) +#define ISR_MODE (0xAA) -#define SADC_INIT_ALREADY (0x33) -#define SADC_INIT_NOT_YET (0) +#define SADC_INIT_ALREADY (0x33) +#define SADC_INIT_NOT_YET (0) -#define SADC_CMD_READ_RAW_DATA (0x22) -#define SADC_CMD_READ_VOLT (0x33) -#define SADC_CMD_DISABLE (0x44) +#define SADC_CMD_READ_RAW_DATA (0x22) +#define SADC_CMD_READ_VOLT (0x33) +#define SADC_CMD_DISABLE (0x44) /**************************************************************************** * ADT section - * add Abstract Data Type definition here + * add Abstract Data Type definition here ***************************************************************************/ struct wrap_sadc_reg { - rt_uint32_t sadc_cmd; - rt_uint32_t sadc_control; - rt_uint32_t sadc_ier; - rt_uint32_t sadc_int_status; - rt_uint32_t sadc_dout0; - rt_uint32_t sadc_dout1; - rt_uint32_t sadc_dout2; - rt_uint32_t sadc_dout3; - rt_uint32_t sadc_debuge0; - rt_uint32_t sadc_status; - rt_uint32_t sadc_cnt; - rt_uint32_t sadc_timeout; + rt_uint32_t sadc_cmd; + rt_uint32_t sadc_control; + rt_uint32_t sadc_ier; + rt_uint32_t sadc_int_status; + rt_uint32_t sadc_dout0; + rt_uint32_t sadc_dout1; + rt_uint32_t sadc_dout2; + rt_uint32_t sadc_dout3; + rt_uint32_t sadc_debuge0; + rt_uint32_t sadc_status; + rt_uint32_t sadc_cnt; + rt_uint32_t sadc_timeout; }; struct wrap_sadc_obj { - rt_uint32_t id; - void *regs; - rt_uint32_t irq_no; - rt_uint32_t init_flag; - rt_uint32_t active_channel_no; - rt_uint32_t active_channel_status; - rt_uint16_t channel_data[MAX_CHANNEL_NO]; - rt_uint32_t error_rec; - rt_uint32_t en_isr; - rt_uint32_t sample_mode; - struct rt_mutex lock; - struct rt_semaphore completion; + rt_uint32_t id; + void *regs; + rt_uint32_t irq_no; + rt_uint32_t init_flag; + rt_uint32_t active_channel_no; + rt_uint32_t active_channel_status; + rt_uint16_t channel_data[MAX_CHANNEL_NO]; + rt_uint32_t error_rec; + rt_uint32_t en_isr; + rt_uint32_t sample_mode; + struct rt_mutex lock; + struct rt_semaphore completion; //bind to the rtdev.. rt_device_t rt_dev; @@ -91,8 +91,8 @@ struct wrap_sadc_obj { }; typedef struct{ - rt_uint32_t channel; - rt_uint32_t sadc_data; + rt_uint32_t channel; + rt_uint32_t sadc_data; }SADC_INFO; @@ -102,7 +102,7 @@ typedef struct{ /**************************************************************************** * section - * add function prototype here if any + * add function prototype here if any ***************************************************************************/ void rt_hw_sadc_init(void); #endif diff --git a/bsp/fh8620/drivers/spi_fh_adapt.c b/bsp/fh8620/drivers/spi_fh_adapt.c index 291fe9a4f9..437b30d1c9 100644 --- a/bsp/fh8620/drivers/spi_fh_adapt.c +++ b/bsp/fh8620/drivers/spi_fh_adapt.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + /* * spi_fh_adapt.c * @@ -60,9 +60,9 @@ #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) -#define WX_MANU_ID 0xEF +#define WX_MANU_ID 0xEF #define AT_MANU_ID 0x1F /* atmel */ -#define SST_MANU_ID 0xBF +#define SST_MANU_ID 0xBF #define GD_MANU_ID 0xC8 @@ -70,50 +70,50 @@ #define SPI_ADAPT_DEBUG #ifdef SPI_ADAPT_DEBUG -#define CMD_JEDEC_ID 0x9f +#define CMD_JEDEC_ID 0x9f -#define FH_SPI_ADAPT_DEBUG(fmt, args...) \ - rt_kprintf(fmt,##args); +#define FH_SPI_ADAPT_DEBUG(fmt, args...) \ + rt_kprintf(fmt,##args); #else #define FH_SPI_ADAPT_DEBUG(fmt, args...) #endif struct fh_flash_id{ - unsigned char id; - rt_err_t (*fh_flash_init)(struct flash_platform_data *plat_flash); - char *name; + unsigned char id; + rt_err_t (*fh_flash_init)(struct flash_platform_data *plat_flash); + char *name; }; const struct fh_flash_id id_map[] = { #ifdef RT_USING_W25QXX - WX_MANU_ID,w25qxx_init,"winbond", + WX_MANU_ID,w25qxx_init,"winbond", #endif #ifdef RT_USING_AT45DBXX - AT_MANU_ID,at45dbxx_init,"atmel", + AT_MANU_ID,at45dbxx_init,"atmel", #endif #ifdef RT_USING_SST25VFXX - SST_MANU_ID,sst25vfxx_init,"SST", + SST_MANU_ID,sst25vfxx_init,"SST", #endif #ifdef RT_USING_GD - GD_MANU_ID,gd_init,"GD", + GD_MANU_ID,gd_init,"GD", #endif }; struct fh_flash_id * fh_flash_check_id_map(unsigned char id){ - struct fh_flash_id *p_map = RT_NULL; - unsigned int i; - for (i = 0; i < ARRAY_SIZE(id_map); i++) { - p_map = (struct fh_flash_id *)&id_map[i]; - if (p_map->id == id){ - return p_map; - } - } - return RT_NULL; + struct fh_flash_id *p_map = RT_NULL; + unsigned int i; + for (i = 0; i < ARRAY_SIZE(id_map); i++) { + p_map = (struct fh_flash_id *)&id_map[i]; + if (p_map->id == id){ + return p_map; + } + } + return RT_NULL; } @@ -144,50 +144,50 @@ int fh_flash_adapt_probe(void *priv_data) /* init flash */ - rt_uint8_t cmd; - rt_uint8_t id_recv[3]; - uint16_t memory_type_capacity; - rt_err_t ret; + rt_uint8_t cmd; + rt_uint8_t id_recv[3]; + uint16_t memory_type_capacity; + rt_err_t ret; - cmd = 0xFF; /* reset SPI FLASH, cancel all cmd in processing. */ - rt_spi_send(rt_spi_device, &cmd, 1); - /* read flash id */ - cmd = CMD_JEDEC_ID; - rt_spi_send_then_recv(rt_spi_device, &cmd, 1, id_recv, 3); + cmd = 0xFF; /* reset SPI FLASH, cancel all cmd in processing. */ + rt_spi_send(rt_spi_device, &cmd, 1); + /* read flash id */ + cmd = CMD_JEDEC_ID; + rt_spi_send_then_recv(rt_spi_device, &cmd, 1, id_recv, 3); - //if the flash is already connect. - if(id_recv[0] != 0xff){ - flash_model =fh_flash_check_id_map(id_recv[0]); - if(flash_model){ - ret = flash_model->fh_flash_init(plat_flash); - if(ret != RT_EOK){ - rt_kprintf("flash:%s init error\n",flash_model->name); - rt_kprintf("use default flash ops..\n"); - //flash_model->fh_flash_adapt_init =flash_default_init; - ret = flash_default_init(plat_flash); - } - } - else{ - rt_kprintf( - "use default flash ops...\nunrecognized flash id is :%02X %02X %02X\n", - id_recv[0], id_recv[1], id_recv[2]); - ret = flash_default_init(plat_flash); + //if the flash is already connect. + if(id_recv[0] != 0xff){ + flash_model =fh_flash_check_id_map(id_recv[0]); + if(flash_model){ + ret = flash_model->fh_flash_init(plat_flash); + if(ret != RT_EOK){ + rt_kprintf("flash:%s init error\n",flash_model->name); + rt_kprintf("use default flash ops..\n"); + //flash_model->fh_flash_adapt_init =flash_default_init; + ret = flash_default_init(plat_flash); + } + } + else{ + rt_kprintf( + "use default flash ops...\nunrecognized flash id is :%02X %02X %02X\n", + id_recv[0], id_recv[1], id_recv[2]); + ret = flash_default_init(plat_flash); - } + } - int i; - for(i=0; inr_parts; i++) - { - fh_spi_partition_register(plat_flash->flash_name, &plat_flash->parts[i]); - } + int i; + for(i=0; inr_parts; i++) + { + fh_spi_partition_register(plat_flash->flash_name, &plat_flash->parts[i]); + } - return ret; + return ret; - } - else{ - rt_kprintf("please check if you connect the flash already...\n"); - return RT_ENOSYS; - } + } + else{ + rt_kprintf("please check if you connect the flash already...\n"); + return RT_ENOSYS; + } } diff --git a/bsp/fh8620/drivers/spi_fh_adapt.h b/bsp/fh8620/drivers/spi_fh_adapt.h index 171fdf7184..3e3cc365ab 100644 --- a/bsp/fh8620/drivers/spi_fh_adapt.h +++ b/bsp/fh8620/drivers/spi_fh_adapt.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + /* * spi_fh_adapt.h * diff --git a/bsp/fh8620/drivers/ssi.c b/bsp/fh8620/drivers/ssi.c index e5cb99042e..c87a4352ae 100644 --- a/bsp/fh8620/drivers/ssi.c +++ b/bsp/fh8620/drivers/ssi.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include #include #include "fh_arch.h" @@ -49,20 +49,20 @@ #endif -#define RX_DMA_CHANNEL AUTO_FIND_CHANNEL -#define TX_DMA_CHANNEL AUTO_FIND_CHANNEL +#define RX_DMA_CHANNEL AUTO_FIND_CHANNEL +#define TX_DMA_CHANNEL AUTO_FIND_CHANNEL -#define DMA_OR_ISR_THRESHOLD 20 -#define MALLOC_DMA_MEM_SIZE 0x1000 +#define DMA_OR_ISR_THRESHOLD 20 +#define MALLOC_DMA_MEM_SIZE 0x1000 //static rt_uint32_t allign_func(rt_uint32_t in_addr,rt_uint32_t allign_size){ -// return (in_addr + allign_size-1) & (~(allign_size - 1)); +// return (in_addr + allign_size-1) & (~(allign_size - 1)); //} void * fh_get_spi_dev_pri_data(struct rt_spi_device* device){ - return device->parent.user_data; + return device->parent.user_data; } static rt_err_t fh_spi_configure(struct rt_spi_device* device, @@ -87,54 +87,54 @@ static rt_err_t fh_spi_configure(struct rt_spi_device* device, PRINT_SPI_DBG("\tmax_hz: 0x%x\n", configuration->max_hz); do{ - status = SPI_ReadStatus(spi_obj); - } + status = SPI_ReadStatus(spi_obj); + } while(status & SPI_STATUS_BUSY); - /* data_width */ - if(configuration->data_width <= 8){ - config->data_size = SPI_DATA_SIZE_8BIT; - } - else if(configuration->data_width <= 16){ - config->data_size = SPI_DATA_SIZE_16BIT; - } - else{ - return -RT_ERROR; - } + /* data_width */ + if(configuration->data_width <= 8){ + config->data_size = SPI_DATA_SIZE_8BIT; + } + else if(configuration->data_width <= 16){ + config->data_size = SPI_DATA_SIZE_16BIT; + } + else{ + return -RT_ERROR; + } - if(configuration->max_hz > spi_control->max_hz) - spi_hz = spi_control->max_hz; - else - spi_hz = configuration->max_hz; + if(configuration->max_hz > spi_control->max_hz) + spi_hz = spi_control->max_hz; + else + spi_hz = configuration->max_hz; - //fixme: div - config->clk_div = spi_control->clk_in/spi_hz; - //config->clk_div = 8; - PRINT_SPI_DBG("config hz:%d spi div:%d\n",spi_hz,config->clk_div); - /* CPOL */ - if(configuration->mode & RT_SPI_CPOL){ - config->clk_polarity = SPI_POLARITY_HIGH; - } - else{ - config->clk_polarity = SPI_POLARITY_LOW; - } + //fixme: div + config->clk_div = spi_control->clk_in/spi_hz; + //config->clk_div = 8; + PRINT_SPI_DBG("config hz:%d spi div:%d\n",spi_hz,config->clk_div); + /* CPOL */ + if(configuration->mode & RT_SPI_CPOL){ + config->clk_polarity = SPI_POLARITY_HIGH; + } + else{ + config->clk_polarity = SPI_POLARITY_LOW; + } - /* CPHA */ - if(configuration->mode & RT_SPI_CPHA){ - config->clk_phase = SPI_PHASE_TX_FIRST; - } - else{ - config->clk_phase = SPI_PHASE_RX_FIRST; - } + /* CPHA */ + if(configuration->mode & RT_SPI_CPHA){ + config->clk_phase = SPI_PHASE_TX_FIRST; + } + else{ + config->clk_phase = SPI_PHASE_RX_FIRST; + } - config->frame_format = SPI_FORMAT_MOTOROLA; - config->transfer_mode = SPI_MODE_TX_RX; + config->frame_format = SPI_FORMAT_MOTOROLA; + config->transfer_mode = SPI_MODE_TX_RX; - SPI_Enable(spi_obj, 0); - SPI_SetParameter(spi_obj); - SPI_DisableInterrupt(spi_obj, SPI_IRQ_ALL); - SPI_Enable(spi_obj, 1); + SPI_Enable(spi_obj, 0); + SPI_SetParameter(spi_obj); + SPI_DisableInterrupt(spi_obj, SPI_IRQ_ALL); + SPI_Enable(spi_obj, 1); return RT_EOK; } @@ -142,8 +142,8 @@ static rt_err_t fh_spi_configure(struct rt_spi_device* device, static void xfer_dma_done(void *arg) { - struct spi_controller *spi_control = (struct spi_controller *)arg; - spi_control->dma_complete_times++; + struct spi_controller *spi_control = (struct spi_controller *)arg; + spi_control->dma_complete_times++; struct fh_spi_obj *spi_obj; int ret; @@ -151,72 +151,72 @@ static void xfer_dma_done(void *arg) spi_obj = &spi_control->obj; - //rt_kprintf("spi dma isr done.....\n"); - if (spi_control->dma_complete_times == 2) { - spi_control->dma_complete_times = 0; + //rt_kprintf("spi dma isr done.....\n"); + if (spi_control->dma_complete_times == 2) { + spi_control->dma_complete_times = 0; - //add memcpy to user buff - if(spi_control->current_message->recv_buf){ - rt_memcpy((void*)spi_control->current_message->recv_buf,(void*)spi_control->dma.rx_dummy_buff,spi_control->current_message->length); - } + //add memcpy to user buff + if(spi_control->current_message->recv_buf){ + rt_memcpy((void*)spi_control->current_message->recv_buf,(void*)spi_control->dma.rx_dummy_buff,spi_control->current_message->length); + } - SPI_Enable(spi_obj,0); - SPI_DisableDma(spi_obj,SPI_TX_DMA|SPI_RX_DMA); - SPI_Enable(spi_obj,1); + SPI_Enable(spi_obj,0); + SPI_DisableDma(spi_obj,SPI_TX_DMA|SPI_RX_DMA); + SPI_Enable(spi_obj,1); - rt_completion_done(&spi_control->transfer_completion); - } + rt_completion_done(&spi_control->transfer_completion); + } } void dma_set_tx_data(struct spi_controller *spi_control){ - struct dma_transfer *trans; - rt_uint32_t hs_no; - struct rt_spi_message* current_message = spi_control->current_message; - trans = &spi_control->dma.tx_trans; - hs_no = spi_control->dma.tx_hs; + struct dma_transfer *trans; + rt_uint32_t hs_no; + struct rt_spi_message* current_message = spi_control->current_message; + trans = &spi_control->dma.tx_trans; + hs_no = spi_control->dma.tx_hs; - struct fh_spi_obj *spi_obj; - spi_obj = &spi_control->obj; + struct fh_spi_obj *spi_obj; + spi_obj = &spi_control->obj; - if(current_message->length > MALLOC_DMA_MEM_SIZE){ - rt_kprintf("[spi_dma]message len too large..\n"); - rt_kprintf("[spi_dma] message len is %d,max len is %d\n",current_message->length,MALLOC_DMA_MEM_SIZE); - RT_ASSERT(current_message->length <= MALLOC_DMA_MEM_SIZE); - } + if(current_message->length > MALLOC_DMA_MEM_SIZE){ + rt_kprintf("[spi_dma]message len too large..\n"); + rt_kprintf("[spi_dma] message len is %d,max len is %d\n",current_message->length,MALLOC_DMA_MEM_SIZE); + RT_ASSERT(current_message->length <= MALLOC_DMA_MEM_SIZE); + } - rt_memset((void*)spi_control->dma.tx_dummy_buff,0xff,current_message->length); - //copy tx data.... - if(current_message->send_buf){ - rt_memcpy(spi_control->dma.tx_dummy_buff,current_message->send_buf,current_message->length); - } + rt_memset((void*)spi_control->dma.tx_dummy_buff,0xff,current_message->length); + //copy tx data.... + if(current_message->send_buf){ + rt_memcpy(spi_control->dma.tx_dummy_buff,current_message->send_buf,current_message->length); + } - trans->dma_number = 0; - trans->dst_add = (rt_uint32_t)(spi_obj->base + OFFSET_SPI_DR); + trans->dma_number = 0; + trans->dst_add = (rt_uint32_t)(spi_obj->base + OFFSET_SPI_DR); - trans->dst_hs = DMA_HW_HANDSHAKING; - trans->dst_inc_mode = DW_DMA_SLAVE_FIX; - trans->dst_msize = DW_DMA_SLAVE_MSIZE_1; - trans->dst_per = hs_no; - trans->dst_width = DW_DMA_SLAVE_WIDTH_8BIT; - trans->fc_mode = DMA_M2P; + trans->dst_hs = DMA_HW_HANDSHAKING; + trans->dst_inc_mode = DW_DMA_SLAVE_FIX; + trans->dst_msize = DW_DMA_SLAVE_MSIZE_1; + trans->dst_per = hs_no; + trans->dst_width = DW_DMA_SLAVE_WIDTH_8BIT; + trans->fc_mode = DMA_M2P; - trans->src_add = (rt_uint32_t)spi_control->dma.tx_dummy_buff; + trans->src_add = (rt_uint32_t)spi_control->dma.tx_dummy_buff; - trans->src_inc_mode = DW_DMA_SLAVE_INC; - trans->src_msize = DW_DMA_SLAVE_MSIZE_1; + trans->src_inc_mode = DW_DMA_SLAVE_INC; + trans->src_msize = DW_DMA_SLAVE_MSIZE_1; - trans->src_width = DW_DMA_SLAVE_WIDTH_8BIT; - trans->trans_len = current_message->length; + trans->src_width = DW_DMA_SLAVE_WIDTH_8BIT; + trans->trans_len = current_message->length; - trans->complete_callback = (void *)xfer_dma_done; - trans->complete_para = (void *)spi_control; + trans->complete_callback = (void *)xfer_dma_done; + trans->complete_para = (void *)spi_control; @@ -225,153 +225,153 @@ void dma_set_tx_data(struct spi_controller *spi_control){ void dma_set_rx_data(struct spi_controller *spi_control){ - struct dma_transfer *trans; - rt_uint32_t hs_no; - struct rt_spi_message* current_message = spi_control->current_message; - trans = &spi_control->dma.rx_trans; - hs_no = spi_control->dma.rx_hs; + struct dma_transfer *trans; + rt_uint32_t hs_no; + struct rt_spi_message* current_message = spi_control->current_message; + trans = &spi_control->dma.rx_trans; + hs_no = spi_control->dma.rx_hs; - struct fh_spi_obj *spi_obj; - spi_obj = &spi_control->obj; + struct fh_spi_obj *spi_obj; + spi_obj = &spi_control->obj; - if(current_message->length > MALLOC_DMA_MEM_SIZE){ - rt_kprintf("[spi_dma]message len too large..len is %d\n",current_message->length); - RT_ASSERT(current_message->length <= MALLOC_DMA_MEM_SIZE); - } + if(current_message->length > MALLOC_DMA_MEM_SIZE){ + rt_kprintf("[spi_dma]message len too large..len is %d\n",current_message->length); + RT_ASSERT(current_message->length <= MALLOC_DMA_MEM_SIZE); + } - //rt_memset((void *)spi_control->dma.rx_dummy_buff,0,MALLOC_DMA_MEM_SIZE); + //rt_memset((void *)spi_control->dma.rx_dummy_buff,0,MALLOC_DMA_MEM_SIZE); - trans->dma_number = 0; - trans->fc_mode = DMA_P2M; + trans->dma_number = 0; + trans->fc_mode = DMA_P2M; - trans->dst_add = (rt_uint32_t)spi_control->dma.rx_dummy_buff; - trans->dst_inc_mode = DW_DMA_SLAVE_INC; - trans->dst_msize = DW_DMA_SLAVE_MSIZE_1; - trans->dst_width = DW_DMA_SLAVE_WIDTH_8BIT; + trans->dst_add = (rt_uint32_t)spi_control->dma.rx_dummy_buff; + trans->dst_inc_mode = DW_DMA_SLAVE_INC; + trans->dst_msize = DW_DMA_SLAVE_MSIZE_1; + trans->dst_width = DW_DMA_SLAVE_WIDTH_8BIT; - trans->src_add = (rt_uint32_t)(spi_obj->base + OFFSET_SPI_DR); - trans->src_inc_mode = DW_DMA_SLAVE_FIX; - trans->src_msize = DW_DMA_SLAVE_MSIZE_1; - trans->src_width = DW_DMA_SLAVE_WIDTH_8BIT; - trans->src_hs = DMA_HW_HANDSHAKING; - trans->src_per = hs_no; - trans->trans_len = current_message->length; + trans->src_add = (rt_uint32_t)(spi_obj->base + OFFSET_SPI_DR); + trans->src_inc_mode = DW_DMA_SLAVE_FIX; + trans->src_msize = DW_DMA_SLAVE_MSIZE_1; + trans->src_width = DW_DMA_SLAVE_WIDTH_8BIT; + trans->src_hs = DMA_HW_HANDSHAKING; + trans->src_per = hs_no; + trans->trans_len = current_message->length; - trans->complete_callback = (void *)xfer_dma_done; - trans->complete_para = (void *)spi_control; + trans->complete_callback = (void *)xfer_dma_done; + trans->complete_para = (void *)spi_control; } rt_uint32_t xfer_data_dma(struct spi_controller *spi_control){ - int ret; + int ret; - struct fh_spi_obj *spi_obj; - spi_obj = &spi_control->obj; + struct fh_spi_obj *spi_obj; + spi_obj = &spi_control->obj; - struct rt_dma_device *dma_dev = spi_control->dma.dma_dev; + struct rt_dma_device *dma_dev = spi_control->dma.dma_dev; - //tx data prepare - dma_set_tx_data(spi_control); - //rx data prepare - dma_set_rx_data(spi_control); - //dma go... + //tx data prepare + dma_set_tx_data(spi_control); + //rx data prepare + dma_set_rx_data(spi_control); + //dma go... - SPI_Enable(spi_obj,0); + SPI_Enable(spi_obj,0); - //SPI_WriteTxDmaLevel(spi_obj,SPI_FIFO_DEPTH / 4); - SPI_WriteTxDmaLevel(spi_obj,1); - //SPI_WriteTxDmaLevel(spi_obj,0); - SPI_WriteRxDmaLevel(spi_obj,0); - SPI_EnableDma(spi_obj,SPI_TX_DMA|SPI_RX_DMA); - SPI_Enable(spi_obj,1); + //SPI_WriteTxDmaLevel(spi_obj,SPI_FIFO_DEPTH / 4); + SPI_WriteTxDmaLevel(spi_obj,1); + //SPI_WriteTxDmaLevel(spi_obj,0); + SPI_WriteRxDmaLevel(spi_obj,0); + SPI_EnableDma(spi_obj,SPI_TX_DMA|SPI_RX_DMA); + SPI_Enable(spi_obj,1); - dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER,(void *)&spi_control->dma.rx_trans); - dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER,(void *)&spi_control->dma.tx_trans); + dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER,(void *)&spi_control->dma.rx_trans); + dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER,(void *)&spi_control->dma.tx_trans); - ret = rt_completion_wait(&spi_control->transfer_completion, RT_TICK_PER_SECOND*50); - //release channel.. + ret = rt_completion_wait(&spi_control->transfer_completion, RT_TICK_PER_SECOND*50); + //release channel.. - //dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&spi_control->dma.tx_trans); - //dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&spi_control->dma.rx_trans); + //dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&spi_control->dma.tx_trans); + //dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&spi_control->dma.rx_trans); - if(ret) - { - rt_kprintf("ERROR: %s, transfer timeout\n", __func__); - return -RT_ETIMEOUT; - } + if(ret) + { + rt_kprintf("ERROR: %s, transfer timeout\n", __func__); + return -RT_ETIMEOUT; + } - return RT_EOK; + return RT_EOK; } rt_uint32_t xfer_data_isr(struct spi_controller *spi_control){ - int ret; - struct fh_spi_obj *spi_obj; - spi_obj = &spi_control->obj; + int ret; + struct fh_spi_obj *spi_obj; + spi_obj = &spi_control->obj; SPI_SetTxLevel(spi_obj, SPI_FIFO_DEPTH / 2); SPI_EnableInterrupt(spi_obj, SPI_IRQ_TXEIM); - ret = rt_completion_wait(&spi_control->transfer_completion, RT_TICK_PER_SECOND*50); - if(ret) - { - rt_kprintf("ERROR: %s, transfer timeout\n", __func__); - return -RT_ETIMEOUT; - } + ret = rt_completion_wait(&spi_control->transfer_completion, RT_TICK_PER_SECOND*50); + if(ret) + { + rt_kprintf("ERROR: %s, transfer timeout\n", __func__); + return -RT_ETIMEOUT; + } - return RT_EOK; + return RT_EOK; } void fix_spi_xfer_mode(struct spi_controller *spi_control){ - //switch dma or isr....first check dma ...is error .use isr xfer... - struct rt_dma_device * rt_dma_dev; - struct dma_transfer *tx_trans; - struct dma_transfer *rx_trans; - int ret; - //retry to check if the dma status... - if(spi_control->dma.dma_flag == DMA_BIND_OK){ - //if transfer data too short...use isr.. - if(spi_control->current_message->length < DMA_OR_ISR_THRESHOLD){ - spi_control->xfer_mode = XFER_USE_ISR; - return; - } + //switch dma or isr....first check dma ...is error .use isr xfer... + struct rt_dma_device * rt_dma_dev; + struct dma_transfer *tx_trans; + struct dma_transfer *rx_trans; + int ret; + //retry to check if the dma status... + if(spi_control->dma.dma_flag == DMA_BIND_OK){ + //if transfer data too short...use isr.. + if(spi_control->current_message->length < DMA_OR_ISR_THRESHOLD){ + spi_control->xfer_mode = XFER_USE_ISR; + return; + } #if(0) - rt_dma_dev = spi_control->dma.dma_dev; - //first request channel + rt_dma_dev = spi_control->dma.dma_dev; + //first request channel - tx_trans = &spi_control->dma.tx_trans; - rx_trans = &spi_control->dma.rx_trans; - tx_trans->channel_number = TX_DMA_CHANNEL; - rx_trans->channel_number = RX_DMA_CHANNEL; + tx_trans = &spi_control->dma.tx_trans; + rx_trans = &spi_control->dma.rx_trans; + tx_trans->channel_number = TX_DMA_CHANNEL; + rx_trans->channel_number = RX_DMA_CHANNEL; - ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)tx_trans); - if(ret != RT_EOK){ - spi_control->xfer_mode = XFER_USE_ISR; - return; - } + ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)tx_trans); + if(ret != RT_EOK){ + spi_control->xfer_mode = XFER_USE_ISR; + return; + } - ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)rx_trans); - if(ret != RT_EOK){ - //release tx channel... - rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&tx_trans); - spi_control->xfer_mode = XFER_USE_ISR; - return; - } + ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)rx_trans); + if(ret != RT_EOK){ + //release tx channel... + rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&tx_trans); + spi_control->xfer_mode = XFER_USE_ISR; + return; + } #endif - spi_control->xfer_mode = XFER_USE_DMA; - //if error use isr mode - } - else - spi_control->xfer_mode = XFER_USE_ISR; + spi_control->xfer_mode = XFER_USE_DMA; + //if error use isr mode + } + else + spi_control->xfer_mode = XFER_USE_ISR; @@ -392,7 +392,7 @@ static rt_uint32_t fh_spi_xfer(struct rt_spi_device* device, struct rt_spi_messa spi_control->transfered_len = 0; spi_control->received_len = 0; - rt_sem_take(&spi_control->xfer_lock, RT_WAITING_FOREVER); + rt_sem_take(&spi_control->xfer_lock, RT_WAITING_FOREVER); rt_completion_init(&spi_control->transfer_completion); @@ -400,52 +400,52 @@ static rt_uint32_t fh_spi_xfer(struct rt_spi_device* device, struct rt_spi_messa /* take CS */ if(message->cs_take) { - if(spi_slave->plat_slave.actice_level == ACTIVE_LOW) - gpio_direction_output(spi_slave->plat_slave.cs_pin, 0); - else - gpio_direction_output(spi_slave->plat_slave.cs_pin, 1); + if(spi_slave->plat_slave.actice_level == ACTIVE_LOW) + gpio_direction_output(spi_slave->plat_slave.cs_pin, 0); + else + gpio_direction_output(spi_slave->plat_slave.cs_pin, 1); - //here will always use the slave_0 because that the cs is gpio... - SPI_EnableSlaveen(spi_obj, 0); + //here will always use the slave_0 because that the cs is gpio... + SPI_EnableSlaveen(spi_obj, 0); } //fix transfer mode ..... fix_spi_xfer_mode(spi_control); - switch(spi_control->xfer_mode){ - case XFER_USE_DMA: - PRINT_SPI_DBG("use dma xfer.....###############\n"); - ret = xfer_data_dma(spi_control); - if(ret == RT_EOK){ - break; - } - else{ - //use the isr mode to transfer - spi_control->xfer_mode = XFER_USE_ISR; - rt_kprintf("%s dma transfer error no:%x\n",__func__,ret); - } - case XFER_USE_ISR: - PRINT_SPI_DBG("use isr xfer.....&&&&&&&&&&&&&\n"); - ret = xfer_data_isr(spi_control); - if(ret != RT_EOK) - rt_kprintf("%s isr transfer error no:%x\n",__func__,ret); - break; + switch(spi_control->xfer_mode){ + case XFER_USE_DMA: + PRINT_SPI_DBG("use dma xfer.....###############\n"); + ret = xfer_data_dma(spi_control); + if(ret == RT_EOK){ + break; + } + else{ + //use the isr mode to transfer + spi_control->xfer_mode = XFER_USE_ISR; + rt_kprintf("%s dma transfer error no:%x\n",__func__,ret); + } + case XFER_USE_ISR: + PRINT_SPI_DBG("use isr xfer.....&&&&&&&&&&&&&\n"); + ret = xfer_data_isr(spi_control); + if(ret != RT_EOK) + rt_kprintf("%s isr transfer error no:%x\n",__func__,ret); + break; - default: - rt_kprintf("%s unknow xfer func...\n",__func__); - while(1) - ; - } + default: + rt_kprintf("%s unknow xfer func...\n",__func__); + while(1) + ; + } /* release CS */ if(message->cs_release) { - if(spi_slave->plat_slave.actice_level == ACTIVE_LOW) - gpio_direction_output(spi_slave->plat_slave.cs_pin, 1); - else - gpio_direction_output(spi_slave->plat_slave.cs_pin, 0); - SPI_DisableSlaveen(spi_obj, 0); + if(spi_slave->plat_slave.actice_level == ACTIVE_LOW) + gpio_direction_output(spi_slave->plat_slave.cs_pin, 1); + else + gpio_direction_output(spi_slave->plat_slave.cs_pin, 0); + SPI_DisableSlaveen(spi_obj, 0); } rt_sem_release(&spi_control->xfer_lock); @@ -479,73 +479,73 @@ static void fh_spi_interrupt(int irq, void *param) // - if(spi_control->current_message == RT_NULL){ - rt_kprintf("ERROR: %s, current_message is incorrect\n", __func__); - } + if(spi_control->current_message == RT_NULL){ + rt_kprintf("ERROR: %s, current_message is incorrect\n", __func__); + } - status = SPI_InterruptStatus(spi_obj); - PRINT_SPI_DBG("status: 0x%x\n", status); - //fixme: ??recv overflow, underflow; tran overflow?? - if(status & SPI_ISR_ERROR){ - rt_kprintf("ERROR: %s, status=%d\n", __func__, status); - SPI_ClearInterrupt(spi_obj); - //fixme: handle error - return; - } + status = SPI_InterruptStatus(spi_obj); + PRINT_SPI_DBG("status: 0x%x\n", status); + //fixme: ??recv overflow, underflow; tran overflow?? + if(status & SPI_ISR_ERROR){ + rt_kprintf("ERROR: %s, status=%d\n", __func__, status); + SPI_ClearInterrupt(spi_obj); + //fixme: handle error + return; + } - rx_fifo_capability = SPI_ReadRxFifoLevel(spi_obj); - tx_fifo_capability = MIN( - (SPI_FIFO_DEPTH - SPI_ReadTxFifoLevel(spi_obj)) / 2, - (spi_control->current_message->length - spi_control->transfered_len)); + rx_fifo_capability = SPI_ReadRxFifoLevel(spi_obj); + tx_fifo_capability = MIN( + (SPI_FIFO_DEPTH - SPI_ReadTxFifoLevel(spi_obj)) / 2, + (spi_control->current_message->length - spi_control->transfered_len)); - PRINT_SPI_DBG("rx_fifo_capability=%d\n", rx_fifo_capability); + PRINT_SPI_DBG("rx_fifo_capability=%d\n", rx_fifo_capability); - //rx - spi_control->received_len += rx_fifo_capability; - while(rx_fifo_capability) - { - data = SPI_ReadData(spi_obj); - if(spi_control->current_message->recv_buf){ - *(rt_uint8_t *)spi_control->current_message->recv_buf++ = data; - } - PRINT_SPI_DBG("rx, data: 0x%x\n", data); - //rt_kprintf("rx, data: 0x%x\n", data); - rx_fifo_capability--; - } + //rx + spi_control->received_len += rx_fifo_capability; + while(rx_fifo_capability) + { + data = SPI_ReadData(spi_obj); + if(spi_control->current_message->recv_buf){ + *(rt_uint8_t *)spi_control->current_message->recv_buf++ = data; + } + PRINT_SPI_DBG("rx, data: 0x%x\n", data); + //rt_kprintf("rx, data: 0x%x\n", data); + rx_fifo_capability--; + } - if(spi_control->received_len == spi_control->current_message->length) - { + if(spi_control->received_len == spi_control->current_message->length) + { - //rt_kprintf("asdasdq4902834908dklfkldjsdhgkljshfgljkhsgfkljhsdfkljghklj"); - SPI_DisableInterrupt(spi_obj, SPI_ISR_FLAG); - PRINT_SPI_DBG("finished, length=%d, received_len=%d\n", spi_control->current_message->length, spi_control->received_len); - rt_completion_done(&spi_control->transfer_completion); + //rt_kprintf("asdasdq4902834908dklfkldjsdhgkljshfgljkhsgfkljhsdfkljghklj"); + SPI_DisableInterrupt(spi_obj, SPI_ISR_FLAG); + PRINT_SPI_DBG("finished, length=%d, received_len=%d\n", spi_control->current_message->length, spi_control->received_len); + rt_completion_done(&spi_control->transfer_completion); - return; - } + return; + } - //tx + //tx - spi_control->transfered_len +=tx_fifo_capability; - if(spi_control->current_message->send_buf){ - p = (rt_uint8_t *)spi_control->current_message->send_buf; - while(tx_fifo_capability){ - PRINT_SPI_DBG("tx, data: 0x%x\n", *p); - //rt_kprintf("tx, data: 0x%x\n", *p); - SPI_WriteData(spi_obj, *p++); - tx_fifo_capability--; - } - spi_control->current_message->send_buf = p; - } - else{ - while(tx_fifo_capability){ + spi_control->transfered_len +=tx_fifo_capability; + if(spi_control->current_message->send_buf){ + p = (rt_uint8_t *)spi_control->current_message->send_buf; + while(tx_fifo_capability){ + PRINT_SPI_DBG("tx, data: 0x%x\n", *p); + //rt_kprintf("tx, data: 0x%x\n", *p); + SPI_WriteData(spi_obj, *p++); + tx_fifo_capability--; + } + spi_control->current_message->send_buf = p; + } + else{ + while(tx_fifo_capability){ - SPI_WriteData(spi_obj, 0xff); - tx_fifo_capability--; - } - } + SPI_WriteData(spi_obj, 0xff); + tx_fifo_capability--; + } + } @@ -568,28 +568,28 @@ int fh_spi_probe(void *priv_data) struct spi_control_platform_data *plat_data; int i,ret; - struct rt_dma_device * rt_dma_dev; - struct dma_transfer *tx_trans; - struct dma_transfer *rx_trans; + struct rt_dma_device * rt_dma_dev; + struct dma_transfer *tx_trans; + struct dma_transfer *rx_trans; //check data... plat_data = (struct spi_control_platform_data *)priv_data; if(!plat_data){ - rt_kprintf("ERROR:platform data null...\n"); - return -RT_ENOMEM; + rt_kprintf("ERROR:platform data null...\n"); + return -RT_ENOMEM; } if(plat_data->slave_no > FH_SPI_SLAVE_MAX_NO){ - rt_kprintf("ERROR:spi controller not support %d slave..\n",plat_data->slave_no); - return -RT_ENOMEM; + rt_kprintf("ERROR:spi controller not support %d slave..\n",plat_data->slave_no); + return -RT_ENOMEM; } //malloc data spi_control = (struct spi_controller*)rt_malloc(sizeof(struct spi_controller)); if(!spi_control){ - rt_kprintf("ERROR:no mem for malloc the spi controller..\n"); - goto error_malloc_bus; + rt_kprintf("ERROR:no mem for malloc the spi controller..\n"); + goto error_malloc_bus; } rt_memset(spi_control, 0, sizeof(struct spi_controller)); @@ -624,77 +624,77 @@ int fh_spi_probe(void *priv_data) if(plat_data->transfer_mode == USE_DMA_TRANSFER){ spi_control->dma.dma_dev = (struct rt_dma_device *)rt_device_find(plat_data->dma_name); - if(spi_control->dma.dma_dev == RT_NULL){ - rt_kprintf("can't find dma dev\n"); - //goto error_malloc_slave; - //spi_control->dma_xfer_flag = USE_ISR_TRANSFER; -// spi_control->dma.dma_flag = DMA_BIND_ERROR; -// spi_control->xfer_mode = XFER_USE_ISR; - goto BIND_DMA_ERROR; - } - else{ + if(spi_control->dma.dma_dev == RT_NULL){ + rt_kprintf("can't find dma dev\n"); + //goto error_malloc_slave; + //spi_control->dma_xfer_flag = USE_ISR_TRANSFER; +// spi_control->dma.dma_flag = DMA_BIND_ERROR; +// spi_control->xfer_mode = XFER_USE_ISR; + goto BIND_DMA_ERROR; + } + else{ - spi_control->dma.control = spi_control; - spi_control->dma.rx_hs = plat_data->rx_hs_no; - spi_control->dma.tx_hs = plat_data->tx_hs_no; - spi_control->dma.dma_name = plat_data->dma_name; + spi_control->dma.control = spi_control; + spi_control->dma.rx_hs = plat_data->rx_hs_no; + spi_control->dma.tx_hs = plat_data->tx_hs_no; + spi_control->dma.dma_name = plat_data->dma_name; - spi_control->dma.rx_dummy_buff = fh_dma_mem_malloc(MALLOC_DMA_MEM_SIZE); - if(!spi_control->dma.rx_dummy_buff){ - rt_kprintf("malloc rx dma buff failed...\n"); - //spi_control->xfer_mode = XFER_USE_ISR; - goto BIND_DMA_ERROR; - } + spi_control->dma.rx_dummy_buff = fh_dma_mem_malloc(MALLOC_DMA_MEM_SIZE); + if(!spi_control->dma.rx_dummy_buff){ + rt_kprintf("malloc rx dma buff failed...\n"); + //spi_control->xfer_mode = XFER_USE_ISR; + goto BIND_DMA_ERROR; + } - spi_control->dma.tx_dummy_buff = fh_dma_mem_malloc(MALLOC_DMA_MEM_SIZE); - if(!spi_control->dma.tx_dummy_buff){ - rt_kprintf("malloc tx dma buff failed...\n"); - fh_dma_mem_free(spi_control->dma.rx_dummy_buff); - //spi_control->xfer_mode = XFER_USE_ISR; - goto BIND_DMA_ERROR; - } + spi_control->dma.tx_dummy_buff = fh_dma_mem_malloc(MALLOC_DMA_MEM_SIZE); + if(!spi_control->dma.tx_dummy_buff){ + rt_kprintf("malloc tx dma buff failed...\n"); + fh_dma_mem_free(spi_control->dma.rx_dummy_buff); + //spi_control->xfer_mode = XFER_USE_ISR; + goto BIND_DMA_ERROR; + } - if(((rt_uint32_t)spi_control->dma.tx_dummy_buff % 4)||((rt_uint32_t)spi_control->dma.rx_dummy_buff % 4)){ - rt_kprintf("dma malloc buff not allign..\n"); - fh_dma_mem_free(spi_control->dma.rx_dummy_buff); - fh_dma_mem_free(spi_control->dma.tx_dummy_buff); - goto BIND_DMA_ERROR; - } + if(((rt_uint32_t)spi_control->dma.tx_dummy_buff % 4)||((rt_uint32_t)spi_control->dma.rx_dummy_buff % 4)){ + rt_kprintf("dma malloc buff not allign..\n"); + fh_dma_mem_free(spi_control->dma.rx_dummy_buff); + fh_dma_mem_free(spi_control->dma.tx_dummy_buff); + goto BIND_DMA_ERROR; + } - //open dma dev. - spi_control->dma.dma_dev->ops->control(spi_control->dma.dma_dev,RT_DEVICE_CTRL_DMA_OPEN,RT_NULL); + //open dma dev. + spi_control->dma.dma_dev->ops->control(spi_control->dma.dma_dev,RT_DEVICE_CTRL_DMA_OPEN,RT_NULL); - //request channel - rt_dma_dev = spi_control->dma.dma_dev; - //first request channel - tx_trans = &spi_control->dma.tx_trans; - rx_trans = &spi_control->dma.rx_trans; - tx_trans->channel_number = TX_DMA_CHANNEL; - rx_trans->channel_number = RX_DMA_CHANNEL; + //request channel + rt_dma_dev = spi_control->dma.dma_dev; + //first request channel + tx_trans = &spi_control->dma.tx_trans; + rx_trans = &spi_control->dma.rx_trans; + tx_trans->channel_number = TX_DMA_CHANNEL; + rx_trans->channel_number = RX_DMA_CHANNEL; - ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)tx_trans); - if(ret != RT_EOK){ - goto BIND_DMA_ERROR; - } + ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)tx_trans); + if(ret != RT_EOK){ + goto BIND_DMA_ERROR; + } - ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)rx_trans); - if(ret != RT_EOK){ - //release tx channel... - rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&tx_trans); - goto BIND_DMA_ERROR; - } + ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)rx_trans); + if(ret != RT_EOK){ + //release tx channel... + rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&tx_trans); + goto BIND_DMA_ERROR; + } - //spi_control->xfer_mode = XFER_USE_DMA; - spi_control->dma.dma_flag = DMA_BIND_OK; - } + //spi_control->xfer_mode = XFER_USE_DMA; + spi_control->dma.dma_flag = DMA_BIND_OK; + } } else{ BIND_DMA_ERROR: - spi_control->dma.dma_flag = DMA_BIND_ERROR; - //spi_control->xfer_mode = XFER_USE_ISR; + spi_control->dma.dma_flag = DMA_BIND_ERROR; + //spi_control->xfer_mode = XFER_USE_ISR; } @@ -702,80 +702,80 @@ BIND_DMA_ERROR: control_slave = &spi_control->spi_slave; for(i=0;islave_no;i++){ - spi_slave = (struct spi_slave_info*)rt_malloc(sizeof(struct spi_slave_info)); - if(!spi_slave){ - rt_kprintf("ERROR:no mem for malloc the spi_slave%d..\n",i); - goto error_malloc_slave; - } - rt_memset(spi_slave, 0, sizeof(struct spi_slave_info)); + spi_slave = (struct spi_slave_info*)rt_malloc(sizeof(struct spi_slave_info)); + if(!spi_slave){ + rt_kprintf("ERROR:no mem for malloc the spi_slave%d..\n",i); + goto error_malloc_slave; + } + rt_memset(spi_slave, 0, sizeof(struct spi_slave_info)); - //parse platform data... - spi_slave->id = i; - //bind to the spi control....will easy to find all the data... - spi_slave->control = spi_control; - spi_slave->plat_slave.cs_pin = plat_data->plat_slave[i].cs_pin; - spi_slave->plat_slave.actice_level = plat_data->plat_slave[i].actice_level; - rt_sprintf(spi_dev_name, "%s%d%s%d", "ssi", spi_control->id,"_",spi_slave->id); + //parse platform data... + spi_slave->id = i; + //bind to the spi control....will easy to find all the data... + spi_slave->control = spi_control; + spi_slave->plat_slave.cs_pin = plat_data->plat_slave[i].cs_pin; + spi_slave->plat_slave.actice_level = plat_data->plat_slave[i].actice_level; + rt_sprintf(spi_dev_name, "%s%d%s%d", "ssi", spi_control->id,"_",spi_slave->id); - *control_slave = spi_slave; - control_slave = &spi_slave->next; + *control_slave = spi_slave; + control_slave = &spi_slave->next; - //register slave dev... - ret = rt_spi_bus_attach_device(&spi_slave->spi_device,spi_dev_name,spi_bus_name,spi_slave); - if(ret != RT_EOK){ - rt_kprintf("register dev to bus failed...\n"); - goto error_malloc_slave; - } + //register slave dev... + ret = rt_spi_bus_attach_device(&spi_slave->spi_device,spi_dev_name,spi_bus_name,spi_slave); + if(ret != RT_EOK){ + rt_kprintf("register dev to bus failed...\n"); + goto error_malloc_slave; + } } //request gpio... - spi_slave = spi_control->spi_slave; - while(spi_slave != RT_NULL) - { - next_slave = spi_slave->next; + spi_slave = spi_control->spi_slave; + while(spi_slave != RT_NULL) + { + next_slave = spi_slave->next; - ret = gpio_request(spi_slave->plat_slave.cs_pin); - if(ret!=0){ - rt_kprintf("request gpio_%d failed...\n",spi_slave->plat_slave.cs_pin); - goto error_malloc_slave; - } + ret = gpio_request(spi_slave->plat_slave.cs_pin); + if(ret!=0){ + rt_kprintf("request gpio_%d failed...\n",spi_slave->plat_slave.cs_pin); + goto error_malloc_slave; + } - PRINT_SPI_DBG("spi_slave info addr:%x,id:%d,cs:%d,active:%d\n",(rt_uint32_t)spi_slave, spi_slave->id, - spi_slave->plat_slave.cs_pin, - spi_slave->plat_slave.actice_level); - spi_slave = next_slave; - } + PRINT_SPI_DBG("spi_slave info addr:%x,id:%d,cs:%d,active:%d\n",(rt_uint32_t)spi_slave, spi_slave->id, + spi_slave->plat_slave.cs_pin, + spi_slave->plat_slave.actice_level); + spi_slave = next_slave; + } - //this will be used in platform exit.. - plat_data->control = spi_control; + //this will be used in platform exit.. + plat_data->control = spi_control; return RT_EOK; error_malloc_slave: - //free the slaveinfo already malloc - spi_slave = spi_control->spi_slave; - while(spi_slave != RT_NULL) - { - next_slave = spi_slave->next; - gpio_release(spi_slave->plat_slave.cs_pin); - rt_free(spi_slave); - spi_slave = next_slave; - } - //mask isr - rt_hw_interrupt_mask(spi_control->irq); - //release sem .. - rt_sem_detach(&spi_control->xfer_lock); + //free the slaveinfo already malloc + spi_slave = spi_control->spi_slave; + while(spi_slave != RT_NULL) + { + next_slave = spi_slave->next; + gpio_release(spi_slave->plat_slave.cs_pin); + rt_free(spi_slave); + spi_slave = next_slave; + } + //mask isr + rt_hw_interrupt_mask(spi_control->irq); + //release sem .. + rt_sem_detach(&spi_control->xfer_lock); - //free the control malloc . - rt_free(spi_control); + //free the control malloc . + rt_free(spi_control); - //fixme:unregister spi_bus... + //fixme:unregister spi_bus... error_malloc_bus: - return -RT_ENOMEM; + return -RT_ENOMEM; @@ -793,22 +793,22 @@ int fh_spi_exit(void *priv_data) plat_data = (struct spi_control_platform_data *)priv_data; spi_control = plat_data->control; - spi_slave = spi_control->spi_slave; + spi_slave = spi_control->spi_slave; - while(spi_slave != RT_NULL) - { - next_slave = spi_slave->next; - gpio_release(spi_slave->plat_slave.cs_pin); - rt_free(spi_slave); - spi_slave = next_slave; - } - //mask isr - rt_hw_interrupt_mask(spi_control->irq); - //release sem .. - rt_sem_detach(&spi_control->xfer_lock); + while(spi_slave != RT_NULL) + { + next_slave = spi_slave->next; + gpio_release(spi_slave->plat_slave.cs_pin); + rt_free(spi_slave); + spi_slave = next_slave; + } + //mask isr + rt_hw_interrupt_mask(spi_control->irq); + //release sem .. + rt_sem_detach(&spi_control->xfer_lock); - //free the control malloc . - rt_free(spi_control); + //free the control malloc . + rt_free(spi_control); //fixme free all the malloc data ... return 0; @@ -835,20 +835,20 @@ void rt_hw_spi_init(void) } #if(0) -#define TEST_SPI_BUFF_SIZE 0x100 +#define TEST_SPI_BUFF_SIZE 0x100 static rt_uint8_t tx_buf[TEST_SPI_BUFF_SIZE] = {0}; static rt_uint8_t rx_buf[TEST_SPI_BUFF_SIZE] = {0}; int ssi_test(void){ - struct rt_spi_device * rt_spi_device; + struct rt_spi_device * rt_spi_device; - int ret; - rt_spi_device = (struct rt_spi_device *)rt_device_find("ssi1_0"); + int ret; + rt_spi_device = (struct rt_spi_device *)rt_device_find("ssi1_0"); - if(rt_spi_device == RT_NULL) - { - rt_kprintf("%s spi device %s not found!\r\n",__func__ ,"ssi1_0"); - return -RT_ENOSYS; - } + if(rt_spi_device == RT_NULL) + { + rt_kprintf("%s spi device %s not found!\r\n",__func__ ,"ssi1_0"); + return -RT_ENOSYS; + } /* config spi */ { @@ -865,7 +865,7 @@ int ssi_test(void){ ret = rt_memcmp(tx_buf,rx_buf,TEST_SPI_BUFF_SIZE); if(ret != 0){ - rt_kprintf("compare error ..error data %x\n",ret); + rt_kprintf("compare error ..error data %x\n",ret); } rt_kprintf("test done \n"); return 0; diff --git a/bsp/fh8620/drivers/ssi.h b/bsp/fh8620/drivers/ssi.h index 3559729ca3..bad2df8381 100644 --- a/bsp/fh8620/drivers/ssi.h +++ b/bsp/fh8620/drivers/ssi.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef SSI_H_ #define SSI_H_ #include "libraries/inc/fh_driverlib.h" @@ -32,37 +32,37 @@ #include "fh_dma.h" #define SPI_PRIV(drv) ( (struct fh_spi_obj)(drv->priv) ) -#define FH_SPI_SLAVE_MAX_NO 2 +#define FH_SPI_SLAVE_MAX_NO 2 struct spi_controller; //platform use below struct spi_slave_platform_data{ - rt_uint32_t cs_pin; -#define ACTIVE_LOW 1 -#define ACTIVE_HIGH 2 - rt_uint32_t actice_level; + rt_uint32_t cs_pin; +#define ACTIVE_LOW 1 +#define ACTIVE_HIGH 2 + rt_uint32_t actice_level; }; struct spi_control_platform_data{ - rt_uint32_t id; - rt_uint32_t irq; - rt_uint32_t base; - rt_uint32_t max_hz; - rt_uint32_t slave_no; - rt_uint32_t clk_in; - //handshake no... - rt_uint32_t rx_hs_no; - rt_uint32_t tx_hs_no; + rt_uint32_t id; + rt_uint32_t irq; + rt_uint32_t base; + rt_uint32_t max_hz; + rt_uint32_t slave_no; + rt_uint32_t clk_in; + //handshake no... + rt_uint32_t rx_hs_no; + rt_uint32_t tx_hs_no; - char *dma_name; - //isr will be the default... -#define USE_ISR_TRANSFER 0 -#define USE_DMA_TRANSFER 1 - rt_uint32_t transfer_mode; - struct spi_controller *control; - struct spi_slave_platform_data plat_slave[FH_SPI_SLAVE_MAX_NO]; + char *dma_name; + //isr will be the default... +#define USE_ISR_TRANSFER 0 +#define USE_DMA_TRANSFER 1 + rt_uint32_t transfer_mode; + struct spi_controller *control; + struct spi_slave_platform_data plat_slave[FH_SPI_SLAVE_MAX_NO]; }; @@ -81,15 +81,15 @@ struct spi_slave_info struct spi_dma { - char *dma_name; -#define DMA_BIND_OK 0 -#define DMA_BIND_ERROR 1 - rt_uint32_t dma_flag; + char *dma_name; +#define DMA_BIND_OK 0 +#define DMA_BIND_ERROR 1 + rt_uint32_t dma_flag; //bind to the dma dev.. - rt_uint32_t rx_hs; - rt_uint32_t tx_hs; - rt_uint8_t *rx_dummy_buff; - rt_uint8_t *tx_dummy_buff; + rt_uint32_t rx_hs; + rt_uint32_t tx_hs; + rt_uint8_t *rx_dummy_buff; + rt_uint8_t *tx_dummy_buff; struct rt_dma_device *dma_dev; struct dma_transfer tx_trans; struct dma_transfer rx_trans; @@ -98,28 +98,28 @@ struct spi_dma struct spi_controller { - rt_uint32_t id; - rt_uint32_t irq; - rt_uint32_t base; - rt_uint32_t max_hz; - rt_uint32_t slave_no; - rt_uint32_t clk_in; - //bind to the platform data.... - struct spi_control_platform_data *plat_data; + rt_uint32_t id; + rt_uint32_t irq; + rt_uint32_t base; + rt_uint32_t max_hz; + rt_uint32_t slave_no; + rt_uint32_t clk_in; + //bind to the platform data.... + struct spi_control_platform_data *plat_data; - //rt_uint32_t dma_xfer_flag; + //rt_uint32_t dma_xfer_flag; -#define XFER_USE_ISR 0 -#define XFER_USE_DMA 1 - rt_uint32_t xfer_mode; +#define XFER_USE_ISR 0 +#define XFER_USE_DMA 1 + rt_uint32_t xfer_mode; - struct spi_dma dma; - rt_uint32_t dma_complete_times; + struct spi_dma dma; + rt_uint32_t dma_complete_times; struct rt_spi_bus spi_bus; struct spi_slave_info *spi_slave; struct rt_spi_message* current_message; struct rt_completion transfer_completion; - struct rt_semaphore xfer_lock; + struct rt_semaphore xfer_lock; struct fh_spi_obj obj; rt_uint32_t received_len; rt_uint32_t transfered_len; diff --git a/bsp/fh8620/drivers/trap.c b/bsp/fh8620/drivers/trap.c index 7d81057956..b12004918a 100644 --- a/bsp/fh8620/drivers/trap.c +++ b/bsp/fh8620/drivers/trap.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include #include #include "fh_arch.h" @@ -47,13 +47,13 @@ extern long list_thread(void); void rt_hw_show_register (struct rt_hw_register *regs) { - rt_kprintf("Execption:\n"); - rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3); - rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7); - rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10); - rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip); - rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc); - rt_kprintf("cpsr:0x%08x\n", regs->cpsr); + rt_kprintf("Execption:\n"); + rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3); + rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7); + rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10); + rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip); + rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc); + rt_kprintf("cpsr:0x%08x\n", regs->cpsr); } /** @@ -66,15 +66,15 @@ void rt_hw_show_register (struct rt_hw_register *regs) */ void rt_hw_trap_udef(struct rt_hw_register *regs) { - rt_hw_show_register(regs); + rt_hw_show_register(regs); - rt_kprintf("undefined instruction\n"); - rt_kprintf("thread - %s stack:\n", rt_current_thread->name); + rt_kprintf("undefined instruction\n"); + rt_kprintf("thread - %s stack:\n", rt_current_thread->name); #ifdef RT_USING_FINSH - list_thread(); + list_thread(); #endif - rt_hw_cpu_shutdown(); + rt_hw_cpu_shutdown(); } /** @@ -88,10 +88,10 @@ void rt_hw_trap_udef(struct rt_hw_register *regs) */ void rt_hw_trap_swi(struct rt_hw_register *regs) { - rt_hw_show_register(regs); + rt_hw_show_register(regs); - rt_kprintf("software interrupt\n"); - rt_hw_cpu_shutdown(); + rt_kprintf("software interrupt\n"); + rt_hw_cpu_shutdown(); } /** @@ -104,15 +104,15 @@ void rt_hw_trap_swi(struct rt_hw_register *regs) */ void rt_hw_trap_pabt(struct rt_hw_register *regs) { - rt_hw_show_register(regs); + rt_hw_show_register(regs); - rt_kprintf("prefetch abort\n"); - rt_kprintf("thread - %s stack:\n", rt_current_thread->name); + rt_kprintf("prefetch abort\n"); + rt_kprintf("thread - %s stack:\n", rt_current_thread->name); #ifdef RT_USING_FINSH - list_thread(); + list_thread(); #endif - rt_hw_cpu_shutdown(); + rt_hw_cpu_shutdown(); } /** @@ -125,15 +125,15 @@ void rt_hw_trap_pabt(struct rt_hw_register *regs) */ void rt_hw_trap_dabt(struct rt_hw_register *regs) { - rt_hw_show_register(regs); + rt_hw_show_register(regs); - rt_kprintf("data abort\n"); - rt_kprintf("thread - %s stack:\n", rt_current_thread->name); + rt_kprintf("data abort\n"); + rt_kprintf("thread - %s stack:\n", rt_current_thread->name); #ifdef RT_USING_FINSH - list_thread(); + list_thread(); #endif - rt_hw_cpu_shutdown(); + rt_hw_cpu_shutdown(); } /** @@ -145,45 +145,45 @@ void rt_hw_trap_dabt(struct rt_hw_register *regs) */ void rt_hw_trap_resv(struct rt_hw_register *regs) { - rt_kprintf("not used\n"); - rt_hw_show_register(regs); - rt_hw_cpu_shutdown(); + rt_kprintf("not used\n"); + rt_hw_show_register(regs); + rt_hw_cpu_shutdown(); } extern struct rt_irq_desc irq_desc[]; void rt_hw_trap_irq() { - rt_isr_handler_t isr_func; - rt_uint32_t irqstat_l, irqstat_h, irq; - void *param; + rt_isr_handler_t isr_func; + rt_uint32_t irqstat_l, irqstat_h, irq; + void *param; - fh_intc *p = (fh_intc *)INTC_REG_BASE; + fh_intc *p = (fh_intc *)INTC_REG_BASE; - irqstat_l = p->IRQ_FINALSTATUS_L; - irqstat_h = p->IRQ_FINALSTATUS_H; - if (irqstat_l) - { - irq = __rt_ffs(irqstat_l) - 1; - } - else if(irqstat_h) - { - irq = __rt_ffs(irqstat_h) - 1 + 32; - } - else - { - rt_kprintf("No interrupt occur\n"); - return; - } + irqstat_l = p->IRQ_FINALSTATUS_L; + irqstat_h = p->IRQ_FINALSTATUS_H; + if (irqstat_l) + { + irq = __rt_ffs(irqstat_l) - 1; + } + else if(irqstat_h) + { + irq = __rt_ffs(irqstat_h) - 1 + 32; + } + else + { + rt_kprintf("No interrupt occur\n"); + return; + } - /* get interrupt service routine */ - isr_func = irq_desc[irq].handler; - param = irq_desc[irq].param; + /* get interrupt service routine */ + isr_func = irq_desc[irq].handler; + param = irq_desc[irq].param; - /* turn to interrupt service routine */ - if(isr_func){ - isr_func(irq, param); - } + /* turn to interrupt service routine */ + if(isr_func){ + isr_func(irq, param); + } #ifdef RT_USING_INTERRUPT_INFO irq_desc[irq].counter ++; #endif @@ -191,7 +191,7 @@ void rt_hw_trap_irq() void rt_hw_trap_fiq() { - rt_kprintf("fast interrupt request\n"); + rt_kprintf("fast interrupt request\n"); } /*@}*/ diff --git a/bsp/fh8620/drivers/uart.c b/bsp/fh8620/drivers/uart.c index 4b264d9206..89df32d753 100644 --- a/bsp/fh8620/drivers/uart.c +++ b/bsp/fh8620/drivers/uart.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include #include #include "fh_arch.h" @@ -32,35 +32,35 @@ void rt_fh_uart_handler(int vector, void *param) { - int status; - unsigned int ret; - struct fh_uart *uart; - unsigned int reg_status; - rt_device_t dev = (rt_device_t)param; - uart = (struct fh_uart *)dev->user_data; - status = uart_get_iir_status(uart->uart_port); - if (status & UART_IIR_NOINT) - { - return; - } - if(status & UART_IIR_THREMPTY){ - //first close tx isr - uart_disable_irq(uart->uart_port,UART_IER_ETBEI); + int status; + unsigned int ret; + struct fh_uart *uart; + unsigned int reg_status; + rt_device_t dev = (rt_device_t)param; + uart = (struct fh_uart *)dev->user_data; + status = uart_get_iir_status(uart->uart_port); + if (status & UART_IIR_NOINT) + { + return; + } + if(status & UART_IIR_THREMPTY){ + //first close tx isr + uart_disable_irq(uart->uart_port,UART_IER_ETBEI); - rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_TX_DONE); - } - else if((status & UART_IIR_CHRTOUT)==UART_IIR_CHRTOUT){ - //bug.... - //if no data in rx fifo - reg_status = uart_get_status(uart->uart_port); - if((reg_status & 1<<3) == 0) - ret = uart_getc(uart->uart_port); - } - else{ - rt_interrupt_enter(); - rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_RX_IND); - rt_interrupt_leave(); - } + rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_TX_DONE); + } + else if((status & UART_IIR_CHRTOUT)==UART_IIR_CHRTOUT){ + //bug.... + //if no data in rx fifo + reg_status = uart_get_status(uart->uart_port); + if((reg_status & 1<<3) == 0) + ret = uart_getc(uart->uart_port); + } + else{ + rt_interrupt_enter(); + rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_RX_IND); + rt_interrupt_leave(); + } } /** @@ -69,67 +69,67 @@ void rt_fh_uart_handler(int vector, void *param) static rt_err_t fh_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg) { - int div; - enum data_bits data_mode; - enum stop_bits stop_mode; - enum parity parity_mode; - struct fh_uart *uart; + int div; + enum data_bits data_mode; + enum stop_bits stop_mode; + enum parity parity_mode; + struct fh_uart *uart; - RT_ASSERT(serial != RT_NULL); + RT_ASSERT(serial != RT_NULL); RT_ASSERT(cfg != RT_NULL); - uart = (struct fh_uart *)serial->parent.user_data; + uart = (struct fh_uart *)serial->parent.user_data; - switch (cfg->data_bits) - { - case DATA_BITS_8: - data_mode = UART_DATA_BIT8; - break; - case DATA_BITS_7: - data_mode = UART_DATA_BIT7; - break; - case DATA_BITS_6: - data_mode = UART_DATA_BIT6; - break; - case DATA_BITS_5: - data_mode = UART_DATA_BIT5; - break; - default: - data_mode = UART_DATA_BIT8; - break; - } + switch (cfg->data_bits) + { + case DATA_BITS_8: + data_mode = UART_DATA_BIT8; + break; + case DATA_BITS_7: + data_mode = UART_DATA_BIT7; + break; + case DATA_BITS_6: + data_mode = UART_DATA_BIT6; + break; + case DATA_BITS_5: + data_mode = UART_DATA_BIT5; + break; + default: + data_mode = UART_DATA_BIT8; + break; + } - switch (cfg->stop_bits) - { - case STOP_BITS_2: - stop_mode = UART_STOP_BIT2; - break; - case STOP_BITS_1: - default: - stop_mode = UART_STOP_BIT1; - break; - } + switch (cfg->stop_bits) + { + case STOP_BITS_2: + stop_mode = UART_STOP_BIT2; + break; + case STOP_BITS_1: + default: + stop_mode = UART_STOP_BIT1; + break; + } - switch (cfg->parity) - { - case PARITY_ODD: - parity_mode = UART_PARITY_ODD; - break; - case PARITY_EVEN: - parity_mode = UART_PARITY_EVEN; - break; - case PARITY_NONE: - default: - parity_mode = UART_PARITY_NONE; - break; - } + switch (cfg->parity) + { + case PARITY_ODD: + parity_mode = UART_PARITY_ODD; + break; + case PARITY_EVEN: + parity_mode = UART_PARITY_EVEN; + break; + case PARITY_NONE: + default: + parity_mode = UART_PARITY_NONE; + break; + } uart_disable_irq(uart->uart_port, UART_IER_ERBFI); - uart_configure(uart->uart_port, data_mode, - stop_mode, parity_mode, - cfg->baud_rate, UART_CLOCK_FREQ); + uart_configure(uart->uart_port, data_mode, + stop_mode, parity_mode, + cfg->baud_rate, UART_CLOCK_FREQ); - uart_enable_irq(uart->uart_port, UART_IER_ERBFI); + uart_enable_irq(uart->uart_port, UART_IER_ERBFI); return RT_EOK; } @@ -146,13 +146,13 @@ static rt_err_t fh_uart_control(struct rt_serial_device *serial, { case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */ - rt_hw_interrupt_mask(uart->irq); - uart_disable_irq(uart->uart_port,UART_IER_ERBFI); + rt_hw_interrupt_mask(uart->irq); + uart_disable_irq(uart->uart_port,UART_IER_ERBFI); break; case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */ - rt_hw_interrupt_umask(uart->irq); - uart_enable_irq(uart->uart_port,UART_IER_ERBFI); + rt_hw_interrupt_umask(uart->irq); + uart_enable_irq(uart->uart_port,UART_IER_ERBFI); break; } @@ -161,33 +161,33 @@ static rt_err_t fh_uart_control(struct rt_serial_device *serial, static int fh_uart_putc(struct rt_serial_device *serial, char c) { - struct fh_uart *uart = serial->parent.user_data; - unsigned int ret; - ret = uart_get_status(uart->uart_port); - if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX){ - //RT_DEVICE_FLAG_INT_TX + struct fh_uart *uart = serial->parent.user_data; + unsigned int ret; + ret = uart_get_status(uart->uart_port); + if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX){ + //RT_DEVICE_FLAG_INT_TX - if(c == '\n'){ - fh_uart_putc(serial,'\r'); - } - if(ret & UART_USR_TFNF){ - uart_putc(uart->uart_port, c); - return 1; - } - //open tx isr here.. - uart_enable_irq(uart->uart_port,UART_IER_ETBEI); - return -1; - } - //poll mode - else{ + if(c == '\n'){ + fh_uart_putc(serial,'\r'); + } + if(ret & UART_USR_TFNF){ + uart_putc(uart->uart_port, c); + return 1; + } + //open tx isr here.. + uart_enable_irq(uart->uart_port,UART_IER_ETBEI); + return -1; + } + //poll mode + else{ - while(!(uart_get_status(uart->uart_port) & UART_USR_TFNF)) - ; - uart_putc(uart->uart_port, c); - return 1; + while(!(uart_get_status(uart->uart_port) & UART_USR_TFNF)) + ; + uart_putc(uart->uart_port, c); + return 1; - } + } @@ -196,16 +196,16 @@ static int fh_uart_putc(struct rt_serial_device *serial, char c) static int fh_uart_getc(struct rt_serial_device *serial) { int result; - struct fh_uart *uart = serial->parent.user_data; + struct fh_uart *uart = serial->parent.user_data; - if (uart_is_rx_ready(uart->uart_port)) - { - result = uart_getc(uart->uart_port); - } - else - { - result = -1; - } + if (uart_is_rx_ready(uart->uart_port)) + { + result = uart_getc(uart->uart_port); + } + else + { + result = -1; + } return result; } @@ -222,8 +222,8 @@ static const struct rt_uart_ops fh_uart_ops = #if defined(RT_USING_UART0) static struct rt_serial_device serial0; struct fh_uart uart0 = { - (uart *)UART0_REG_BASE, - UART0_IRQn + (uart *)UART0_REG_BASE, + UART0_IRQn }; #endif @@ -231,8 +231,8 @@ struct fh_uart uart0 = { #if defined(RT_USING_UART1) static struct rt_serial_device serial1; struct fh_uart uart1 = { - (uart *)UART1_REG_BASE, - UART1_IRQn + (uart *)UART1_REG_BASE, + UART1_IRQn }; #endif @@ -245,45 +245,45 @@ struct fh_uart uart1 = { */ void rt_hw_uart_init(void) { - struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; + struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; #if defined(RT_USING_UART0) #if(0) - serial0.ops = &fh_uart_ops; - serial0.config = config; + serial0.ops = &fh_uart_ops; + serial0.config = config; - /* register vcom device */ - rt_hw_serial_register(&serial0, "uart0", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_STANDALONE, - &uart0); - rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler, - (void *)&(serial0.parent), "UART0"); - rt_hw_interrupt_umask(uart0.irq); + /* register vcom device */ + rt_hw_serial_register(&serial0, "uart0", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_STANDALONE, + &uart0); + rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler, + (void *)&(serial0.parent), "UART0"); + rt_hw_interrupt_umask(uart0.irq); #endif - serial0.ops = &fh_uart_ops; - serial0.config = config; + serial0.ops = &fh_uart_ops; + serial0.config = config; - /* register vcom device */ - rt_hw_serial_register(&serial0, "uart0", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM , - &uart0); - rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler, - (void *)&(serial0.parent), "UART0"); - rt_hw_interrupt_umask(uart0.irq); + /* register vcom device */ + rt_hw_serial_register(&serial0, "uart0", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM , + &uart0); + rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler, + (void *)&(serial0.parent), "UART0"); + rt_hw_interrupt_umask(uart0.irq); #endif #if defined(RT_USING_UART1) - serial1.ops = &fh_uart_ops; - serial1.config = config; + serial1.ops = &fh_uart_ops; + serial1.config = config; - /* register vcom device */ - rt_hw_serial_register(&serial1, "uart1", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM , - &uart1); - rt_hw_interrupt_install(uart1.irq, rt_fh_uart_handler, - (void *)&(serial1.parent), "UART1"); - rt_hw_interrupt_umask(uart1.irq); + /* register vcom device */ + rt_hw_serial_register(&serial1, "uart1", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM , + &uart1); + rt_hw_interrupt_install(uart1.irq, rt_fh_uart_handler, + (void *)&(serial1.parent), "UART1"); + rt_hw_interrupt_umask(uart1.irq); #endif diff --git a/bsp/fh8620/drivers/uart.h b/bsp/fh8620/drivers/uart.h index d4459f02f8..c7af24523b 100644 --- a/bsp/fh8620/drivers/uart.h +++ b/bsp/fh8620/drivers/uart.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef UART_H_ #define UART_H_ diff --git a/bsp/fh8620/drivers/wdt.c b/bsp/fh8620/drivers/wdt.c index 1d67007a6a..f7f292df86 100644 --- a/bsp/fh8620/drivers/wdt.c +++ b/bsp/fh8620/drivers/wdt.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include "fh_def.h" #include "wdt.h" #include "interrupt.h" diff --git a/bsp/fh8620/drivers/wdt.h b/bsp/fh8620/drivers/wdt.h index 768a2e0739..71673d24aa 100644 --- a/bsp/fh8620/drivers/wdt.h +++ b/bsp/fh8620/drivers/wdt.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef WDT_H_ #define WDT_H_ diff --git a/bsp/fh8620/libraries/driverlib/fh_gpio.c b/bsp/fh8620/libraries/driverlib/fh_gpio.c index e3e58f9a1f..7c39386968 100644 --- a/bsp/fh8620/libraries/driverlib/fh_gpio.c +++ b/bsp/fh8620/libraries/driverlib/fh_gpio.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,10 +18,10 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - - \ No newline at end of file + + diff --git a/bsp/fh8620/libraries/driverlib/fh_i2c.c b/bsp/fh8620/libraries/driverlib/fh_i2c.c index 661703e71c..cc91561b9f 100644 --- a/bsp/fh8620/libraries/driverlib/fh_i2c.c +++ b/bsp/fh8620/libraries/driverlib/fh_i2c.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include "inc/fh_driverlib.h" int I2C_WaitMasterIdle(struct fh_i2c_obj *i2c_obj) diff --git a/bsp/fh8620/libraries/driverlib/fh_ictl.c b/bsp/fh8620/libraries/driverlib/fh_ictl.c index a53c8dba34..10edbb27ff 100644 --- a/bsp/fh8620/libraries/driverlib/fh_ictl.c +++ b/bsp/fh8620/libraries/driverlib/fh_ictl.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,25 +18,25 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include "inc/fh_driverlib.h" void ictl_close_all_isr(fh_intc *p){ - if(p){ - //enable all interrupts - p->IRQ_EN_L = 0xffffffff; - p->IRQ_EN_H = 0xffffffff; - //mask all interrupts - p->IRQ_MASK_L = 0xffffffff; - p->IRQ_MASK_H = 0xffffffff; - } + if(p){ + //enable all interrupts + p->IRQ_EN_L = 0xffffffff; + p->IRQ_EN_H = 0xffffffff; + //mask all interrupts + p->IRQ_MASK_L = 0xffffffff; + p->IRQ_MASK_H = 0xffffffff; + } } @@ -44,13 +44,13 @@ void ictl_close_all_isr(fh_intc *p){ void ictl_mask_isr(fh_intc *p,int irq){ - if(p){ + if(p){ - if (irq < 32) - p->IRQ_MASK_L |= (1 << irq); - else - p->IRQ_MASK_H |= (1 << (irq - 32)); - } + if (irq < 32) + p->IRQ_MASK_L |= (1 << irq); + else + p->IRQ_MASK_H |= (1 << (irq - 32)); + } } @@ -58,12 +58,12 @@ void ictl_mask_isr(fh_intc *p,int irq){ void ictl_unmask_isr(fh_intc *p,int irq){ - if(p){ - if (irq < 32) - p->IRQ_MASK_L &= ~(1 << irq); - else - p->IRQ_MASK_H &= ~(1 << (irq - 32)); + if(p){ + if (irq < 32) + p->IRQ_MASK_L &= ~(1 << irq); + else + p->IRQ_MASK_H &= ~(1 << (irq - 32)); - } + } } diff --git a/bsp/fh8620/libraries/driverlib/fh_mmc.c b/bsp/fh8620/libraries/driverlib/fh_mmc.c index 5995e634fa..0b644d29e5 100644 --- a/bsp/fh8620/libraries/driverlib/fh_mmc.c +++ b/bsp/fh8620/libraries/driverlib/fh_mmc.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes diff --git a/bsp/fh8620/libraries/driverlib/fh_pwm.c b/bsp/fh8620/libraries/driverlib/fh_pwm.c index af19110a46..7b71e78f2b 100644 --- a/bsp/fh8620/libraries/driverlib/fh_pwm.c +++ b/bsp/fh8620/libraries/driverlib/fh_pwm.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes diff --git a/bsp/fh8620/libraries/driverlib/fh_sdio.c b/bsp/fh8620/libraries/driverlib/fh_sdio.c index 8c9e69e07d..edc4151068 100644 --- a/bsp/fh8620/libraries/driverlib/fh_sdio.c +++ b/bsp/fh8620/libraries/driverlib/fh_sdio.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -34,15 +34,15 @@ #define SDC_USE_IDMA #define INSTRUCTIONS_PER_USEC 1000 -#define CMD_TIMEOUT_USEC 100000 -#define DATA_READY_TIMEOUT_USEC 200000 +#define CMD_TIMEOUT_USEC 100000 +#define DATA_READY_TIMEOUT_USEC 200000 #define DMA_TRANSFER_TIMEOUT_TICKS 300 #define DATA_TRANSFER_OVER_TIMEOUT_USEC 1000 #define ACMD41_RETRY_COUNT 1000//100000 -#define CIU_CLK 50000//25000//25000 //27MHz -#define MMC_FOD_VALUE 125 /* 125 KHz */ -#define NORM_FOD_VALUE 25000//5000//25000 /* 25 MHz */ +#define CIU_CLK 50000//25000//25000 //27MHz +#define MMC_FOD_VALUE 125 /* 125 KHz */ +#define NORM_FOD_VALUE 25000//5000//25000 /* 25 MHz */ #define MMC_FOD_DIVIDER_VALUE (((CIU_CLK+MMC_FOD_VALUE*2-1)/(MMC_FOD_VALUE*2))) #ifdef SDCARD_CLK_DIVIDER #define ONE_BIT_BUS_FREQ SDCARD_CLK_DIVIDER @@ -56,1118 +56,1118 @@ static sdc_t sdc_array[2]; static void plat_loop(unsigned int macrosecond) { - unsigned int clk; - - while (macrosecond-- > 0) { - for(clk=INSTRUCTIONS_PER_USEC; clk>0; clk--); - } + unsigned int clk; + + while (macrosecond-- > 0) { + for(clk=INSTRUCTIONS_PER_USEC; clk>0; clk--); + } } static int synopmob_execute_command(unsigned int base, unsigned int cmd_register, unsigned int arg_register) { - unsigned int retries = CMD_TIMEOUT_USEC; + unsigned int retries = CMD_TIMEOUT_USEC; - synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts, FIXME - synopmob_set_register(base+CMDARG, arg_register); - synopmob_set_register(base+CMD, cmd_register | (0x80000000|0x20000000/*fixed to use hold*/)); + synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts, FIXME + synopmob_set_register(base+CMDARG, arg_register); + synopmob_set_register(base+CMD, cmd_register | (0x80000000|0x20000000/*fixed to use hold*/)); - while (retries-- > 0) { - if (!(synopmob_read_register(base+CMD) & 0x80000000/*CMD done bit*/)) - return 0; - plat_loop(1); - } - - return ERRCMDRETRIESOVER; + while (retries-- > 0) { + if (!(synopmob_read_register(base+CMD) & 0x80000000/*CMD done bit*/)) + return 0; + plat_loop(1); + } + + return ERRCMDRETRIESOVER; } static int synopmob_wait_command_done(unsigned int base, unsigned int* inst, unsigned int flag) { - unsigned int retries = CMD_TIMEOUT_USEC; - unsigned int sts; + unsigned int retries = CMD_TIMEOUT_USEC; + unsigned int sts; - while (retries-- > 0) { - sts = synopmob_read_register(base+RINTSTS); - if (sts && ((sts & flag) == flag) ) { - *inst = sts; - return 0; - } - plat_loop(1); - } - return ERRCMDRETRIESOVER; + while (retries-- > 0) { + sts = synopmob_read_register(base+RINTSTS); + if (sts && ((sts & flag) == flag) ) { + *inst = sts; + return 0; + } + plat_loop(1); + } + return ERRCMDRETRIESOVER; } static int synopmob_wait_data_ready(unsigned int base) { - unsigned int retries = DATA_READY_TIMEOUT_USEC; + unsigned int retries = DATA_READY_TIMEOUT_USEC; - while (retries-- > 0) { - if (!((synopmob_read_register(base+STATUS)) & 0x00000200)) { - return 0; - } - - plat_loop(1); - } - return ERRDATANOTREADY; + while (retries-- > 0) { + if (!((synopmob_read_register(base+STATUS)) & 0x00000200)) { + return 0; + } + + plat_loop(1); + } + return ERRDATANOTREADY; } static int synopmob_handle_standard_rinsts(unsigned int raw_int_stat) { - int error_status = 0; - - if ( raw_int_stat & INTMASK_ERROR) { - if (raw_int_stat & INTMSK_RESP_ERR) { - error_status = ERRRESPRECEP; - } - if (raw_int_stat & INTMSK_RCRC) { - error_status = ERRRESPCRC; - } - if (raw_int_stat & INTMSK_DCRC) { - error_status = ERRDCRC; - } - if (raw_int_stat & INTMSK_RTO) { - error_status = ERRRESPTIMEOUT; - } - if (raw_int_stat & INTMSK_DTO) { - error_status = ERRDRTIMEOUT; - } - if (raw_int_stat & INTMSK_HTO) { - error_status = ERRUNDERWRITE; - } - if (raw_int_stat & INTMSK_FRUN) { - error_status = ERROVERREAD; - } - if (raw_int_stat & INTMSK_HLE) { - error_status = ERRHLE; - } - if (raw_int_stat & INTMSK_SBE) { - error_status = ERRSTARTBIT; - } - if (raw_int_stat & INTMSK_EBE) { - error_status = ERRENDBITERR; - } - } + int error_status = 0; + + if ( raw_int_stat & INTMASK_ERROR) { + if (raw_int_stat & INTMSK_RESP_ERR) { + error_status = ERRRESPRECEP; + } + if (raw_int_stat & INTMSK_RCRC) { + error_status = ERRRESPCRC; + } + if (raw_int_stat & INTMSK_DCRC) { + error_status = ERRDCRC; + } + if (raw_int_stat & INTMSK_RTO) { + error_status = ERRRESPTIMEOUT; + } + if (raw_int_stat & INTMSK_DTO) { + error_status = ERRDRTIMEOUT; + } + if (raw_int_stat & INTMSK_HTO) { + error_status = ERRUNDERWRITE; + } + if (raw_int_stat & INTMSK_FRUN) { + error_status = ERROVERREAD; + } + if (raw_int_stat & INTMSK_HLE) { + error_status = ERRHLE; + } + if (raw_int_stat & INTMSK_SBE) { + error_status = ERRSTARTBIT; + } + if (raw_int_stat & INTMSK_EBE) { + error_status = ERRENDBITERR; + } + } //SDIO_PRINTF("------- %s, line %d raw_int_stat = %08x-------\n", __FUNCTION__, __LINE__, raw_int_stat); - return error_status; + return error_status; } static int synopmob_check_r1_resp(unsigned int the_response) { - int retval = 0; - - if (the_response & R1CS_ERROR_OCCURED_MAP) { - if (the_response & R1CS_ADDRESS_OUT_OF_RANGE) { - retval = ERRADDRESSRANGE; - } else if (the_response & R1CS_ADDRESS_MISALIGN) { - retval = ERRADDRESSMISALIGN; - } else if (the_response & R1CS_BLOCK_LEN_ERR) { - retval = ERRBLOCKLEN; - } else if (the_response & R1CS_ERASE_SEQ_ERR) { - retval = ERRERASESEQERR; - } else if (the_response & R1CS_ERASE_PARAM) { - retval = ERRERASEPARAM; - } else if (the_response & R1CS_WP_VIOLATION) { - retval = ERRPROT; - } else if (the_response & R1CS_CARD_IS_LOCKED) { - retval = ERRCARDLOCKED; - } else if (the_response & R1CS_LCK_UNLCK_FAILED) { - retval = ERRCARDLOCKED; - } else if (the_response & R1CS_COM_CRC_ERROR) { - retval = ERRCRC; - } else if (the_response & R1CS_ILLEGAL_COMMAND) { - retval = ERRILLEGALCOMMAND; - } else if (the_response & R1CS_CARD_ECC_FAILED) { - retval = ERRECCFAILED; - } else if (the_response & R1CS_CC_ERROR) { - retval = ERRCCERR; - } else if (the_response & R1CS_ERROR) { - retval = ERRUNKNOWN; - } else if (the_response & R1CS_UNDERRUN) { - retval = ERRUNDERRUN; - } else if (the_response & R1CS_OVERRUN) { - retval = ERROVERRUN; - } else if (the_response & R1CS_CSD_OVERWRITE) { - retval = ERRCSDOVERWRITE; - } else if (the_response & R1CS_WP_ERASE_SKIP) { - retval = ERRPROT; - } else if (the_response & R1CS_ERASE_RESET) { - retval = ERRERASERESET; - } else if (the_response & R1CS_SWITCH_ERROR) { - retval = ERRFSMSTATE; - } - } - - return retval; + int retval = 0; + + if (the_response & R1CS_ERROR_OCCURED_MAP) { + if (the_response & R1CS_ADDRESS_OUT_OF_RANGE) { + retval = ERRADDRESSRANGE; + } else if (the_response & R1CS_ADDRESS_MISALIGN) { + retval = ERRADDRESSMISALIGN; + } else if (the_response & R1CS_BLOCK_LEN_ERR) { + retval = ERRBLOCKLEN; + } else if (the_response & R1CS_ERASE_SEQ_ERR) { + retval = ERRERASESEQERR; + } else if (the_response & R1CS_ERASE_PARAM) { + retval = ERRERASEPARAM; + } else if (the_response & R1CS_WP_VIOLATION) { + retval = ERRPROT; + } else if (the_response & R1CS_CARD_IS_LOCKED) { + retval = ERRCARDLOCKED; + } else if (the_response & R1CS_LCK_UNLCK_FAILED) { + retval = ERRCARDLOCKED; + } else if (the_response & R1CS_COM_CRC_ERROR) { + retval = ERRCRC; + } else if (the_response & R1CS_ILLEGAL_COMMAND) { + retval = ERRILLEGALCOMMAND; + } else if (the_response & R1CS_CARD_ECC_FAILED) { + retval = ERRECCFAILED; + } else if (the_response & R1CS_CC_ERROR) { + retval = ERRCCERR; + } else if (the_response & R1CS_ERROR) { + retval = ERRUNKNOWN; + } else if (the_response & R1CS_UNDERRUN) { + retval = ERRUNDERRUN; + } else if (the_response & R1CS_OVERRUN) { + retval = ERROVERRUN; + } else if (the_response & R1CS_CSD_OVERWRITE) { + retval = ERRCSDOVERWRITE; + } else if (the_response & R1CS_WP_ERASE_SKIP) { + retval = ERRPROT; + } else if (the_response & R1CS_ERASE_RESET) { + retval = ERRERASERESET; + } else if (the_response & R1CS_SWITCH_ERROR) { + retval = ERRFSMSTATE; + } + } + + return retval; } static int synopmob_check_r5_resp(unsigned int the_resp) { - int ret = 0; - - if (the_resp & R5_IO_ERR_BITS) { - if (the_resp & R5_IO_CRC_ERR) { - ret = ERRDCRC; - } else if (the_resp & R5_IO_BAD_CMD) { - ret = ERRILLEGALCOMMAND; - } else if (the_resp & R5_IO_GEN_ERR) { - ret = ERRUNKNOWN; - } else if (the_resp & R5_IO_FUNC_ERR) { - ret = ERRBADFUNC; - } else if (the_resp & R5_IO_OUT_RANGE) { - ret = ERRADDRESSRANGE; - } - } - - return ret; + int ret = 0; + + if (the_resp & R5_IO_ERR_BITS) { + if (the_resp & R5_IO_CRC_ERR) { + ret = ERRDCRC; + } else if (the_resp & R5_IO_BAD_CMD) { + ret = ERRILLEGALCOMMAND; + } else if (the_resp & R5_IO_GEN_ERR) { + ret = ERRUNKNOWN; + } else if (the_resp & R5_IO_FUNC_ERR) { + ret = ERRBADFUNC; + } else if (the_resp & R5_IO_OUT_RANGE) { + ret = ERRADDRESSRANGE; + } + } + + return ret; } static int sd_send_cmd0(sdc_t* sdc) { - int ret; - unsigned int intst; - unsigned int base = sdc->ip_base; + int ret; + unsigned int intst; + unsigned int base = sdc->ip_base; - ret = synopmob_execute_command(base, 0x4000, 0); - if (!ret) { - ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); - if (!ret) { - synopmob_set_register(base+RINTSTS, intst); - return synopmob_handle_standard_rinsts(intst); - } - } + ret = synopmob_execute_command(base, 0x4000, 0); + if (!ret) { + ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); + if (!ret) { + synopmob_set_register(base+RINTSTS, intst); + return synopmob_handle_standard_rinsts(intst); + } + } - return ret; + return ret; } static int sd_send_cmd2(sdc_t* sdc) { - int ret; - unsigned int intst; - unsigned int base = sdc->ip_base; + int ret; + unsigned int intst; + unsigned int base = sdc->ip_base; - ret = synopmob_execute_command(base, 0xC2, 0); - if (!ret) { - ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); - if (!ret) { - synopmob_set_register(base+RINTSTS, intst); - return synopmob_handle_standard_rinsts(intst); - } - } + ret = synopmob_execute_command(base, 0xC2, 0); + if (!ret) { + ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); + if (!ret) { + synopmob_set_register(base+RINTSTS, intst); + return synopmob_handle_standard_rinsts(intst); + } + } - return ret; + return ret; } static int sd_send_cmd3(sdc_t* sdc) { - int ret; - unsigned int intst; - unsigned int resp; - unsigned int base = sdc->ip_base; + int ret; + unsigned int intst; + unsigned int resp; + unsigned int base = sdc->ip_base; - ret = synopmob_execute_command(base, 0x43, 0); - if (!ret) { - ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); - if (!ret) { - synopmob_set_register(base+RINTSTS, intst); - ret = synopmob_handle_standard_rinsts(intst); - if (!ret) { - resp = synopmob_read_register(base+RESP0); - sdc->rca = resp >> 16; - resp = (resp & 0x1fff) | (((resp>>13)&1)<<19) | (((resp>>14)&3)<<22); - return synopmob_check_r1_resp(resp); - } - } - } + ret = synopmob_execute_command(base, 0x43, 0); + if (!ret) { + ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); + if (!ret) { + synopmob_set_register(base+RINTSTS, intst); + ret = synopmob_handle_standard_rinsts(intst); + if (!ret) { + resp = synopmob_read_register(base+RESP0); + sdc->rca = resp >> 16; + resp = (resp & 0x1fff) | (((resp>>13)&1)<<19) | (((resp>>14)&3)<<22); + return synopmob_check_r1_resp(resp); + } + } + } - return ret; + return ret; } static int sd_send_cmd_r1(sdc_t* sdc, unsigned int cmd, unsigned int arg, unsigned int buzy) { - int ret; - unsigned int intst; - unsigned int resp; - unsigned int base = sdc->ip_base; - - ret = synopmob_execute_command(base, cmd, arg); - if (!ret) { - ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); - if (!ret) { - synopmob_set_register(base+RINTSTS, intst); - ret = synopmob_handle_standard_rinsts(intst); - if (!ret) { - resp = synopmob_read_register(base+RESP0); - ret = synopmob_check_r1_resp(resp); - if (buzy && !ret) { - ret = synopmob_wait_data_ready(base); - } - } - } - } + int ret; + unsigned int intst; + unsigned int resp; + unsigned int base = sdc->ip_base; - return ret; + ret = synopmob_execute_command(base, cmd, arg); + if (!ret) { + ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); + if (!ret) { + synopmob_set_register(base+RINTSTS, intst); + ret = synopmob_handle_standard_rinsts(intst); + if (!ret) { + resp = synopmob_read_register(base+RESP0); + ret = synopmob_check_r1_resp(resp); + if (buzy && !ret) { + ret = synopmob_wait_data_ready(base); + } + } + } + } + + return ret; } static int sd_send_cmd7(sdc_t* sdc) { - return sd_send_cmd_r1(sdc, 0x47, sdc->rca<<16, 1); + return sd_send_cmd_r1(sdc, 0x47, sdc->rca<<16, 1); } static int sd_send_uncmd7(sdc_t* sdc) { - int ret; - unsigned int intst; - unsigned int base = sdc->ip_base; + int ret; + unsigned int intst; + unsigned int base = sdc->ip_base; - ret = synopmob_execute_command(base, 0x7, 0); - if (!ret) { - ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); - if (!ret) { - synopmob_set_register(base+RINTSTS, intst); - ret = synopmob_handle_standard_rinsts(intst); - } - } + ret = synopmob_execute_command(base, 0x7, 0); + if (!ret) { + ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); + if (!ret) { + synopmob_set_register(base+RINTSTS, intst); + ret = synopmob_handle_standard_rinsts(intst); + } + } - return ret; + return ret; } static int sd_send_cmd16(sdc_t* sdc) { - return sd_send_cmd_r1(sdc, 0x50, 512, 0); + return sd_send_cmd_r1(sdc, 0x50, 512, 0); } static int sd_send_cmd55(sdc_t* sdc) { - return sd_send_cmd_r1(sdc, 0x77, sdc->rca<<16, 0); + return sd_send_cmd_r1(sdc, 0x77, sdc->rca<<16, 0); } static int sd_send_acmd6(sdc_t* sdc, unsigned int bitwidth) { - unsigned int cmd_arg; - int ret; - unsigned int base = sdc->ip_base; + unsigned int cmd_arg; + int ret; + unsigned int base = sdc->ip_base; - ret = sd_send_cmd55(sdc); - if (!ret) { - cmd_arg = 0; //default to 1bit mode - if (bitwidth == 4) { - cmd_arg = 2; // 4bit mode - } - ret = sd_send_cmd_r1(sdc, 0x2046, cmd_arg, 0); - if (!ret) { - if (bitwidth == 4) { - synopmob_set_register(base+CTYPE, FOUR_BIT_MODE); - } - else { - synopmob_set_register(base+CTYPE, ONE_BIT_MODE); - } - } - } + ret = sd_send_cmd55(sdc); + if (!ret) { + cmd_arg = 0; //default to 1bit mode + if (bitwidth == 4) { + cmd_arg = 2; // 4bit mode + } + ret = sd_send_cmd_r1(sdc, 0x2046, cmd_arg, 0); + if (!ret) { + if (bitwidth == 4) { + synopmob_set_register(base+CTYPE, FOUR_BIT_MODE); + } + else { + synopmob_set_register(base+CTYPE, ONE_BIT_MODE); + } + } + } - return ret; + return ret; } #ifdef SDC_USE_IDMA static int sdc_read_write_block(HSDC handle, unsigned int rw, unsigned int blk, unsigned int num, unsigned char* buffer) { - sdc_t* sdc = (sdc_t*)handle; - volatile DmaDesc *pDmaDesc = sdc->pDmaDesc; - int ret; - unsigned int intsts = 0; - unsigned int cmd; - unsigned int multi = 0; - unsigned int base = sdc->ip_base; - int loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC; - rt_err_t err; + sdc_t* sdc = (sdc_t*)handle; + volatile DmaDesc *pDmaDesc = sdc->pDmaDesc; + int ret; + unsigned int intsts = 0; + unsigned int cmd; + unsigned int multi = 0; + unsigned int base = sdc->ip_base; + int loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC; + rt_err_t err; - // valid check - if (synopmob_read_register(base+CDETECT) & 1) { - return ERRCARDNOTCONN; - } - if (!num || num > 16) { - return ERRNOTSUPPORTED; - } - if (blk + num > sdc->sectors) { - return ERRADDRESSRANGE; - } - - if ( rw ) { - flush_dcache_range((unsigned long)buffer, num << 9); - } - else { - // to avoid memset bug? - inv_dcache_range((unsigned long)buffer, num << 9); + // valid check + if (synopmob_read_register(base+CDETECT) & 1) { + return ERRCARDNOTCONN; + } + if (!num || num > 16) { + return ERRNOTSUPPORTED; + } + if (blk + num > sdc->sectors) { + return ERRADDRESSRANGE; } - err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); - if (err != RT_EOK) { - return ERRNORES; - } + if ( rw ) { + flush_dcache_range((unsigned long)buffer, num << 9); + } + else { + // to avoid memset bug? + inv_dcache_range((unsigned long)buffer, num << 9); + } - // reset - synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO - while (synopmob_read_register(base+CTRL) & FIFO_RESET); - synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts + err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); + if (err != RT_EOK) { + return ERRNORES; + } - cmd = 0x2658; // write - if ( !rw ) { - cmd = 0x2251; //read - } - //if (num > 1) { - if (num >= 1) { // some card fail on sigle-block mode, so use multi-block instead of sigle-block mode. - cmd++; - multi++; - } - if (sdc->card_type == SD_TYPE) { - blk <<= 9; //SD stadand capability card use 512 unit. - } - num <<= 9; - - pDmaDesc->desc0 |= DescOwnByDma | DescFirstDesc | DescLastDesc; - pDmaDesc->desc1 = ((num << DescBuf1SizeShift) & DescBuf1SizMsk); - pDmaDesc->desc2 = (unsigned int)buffer; - flush_dcache_range((unsigned long)pDmaDesc, sizeof(DmaDesc)); // add SZ_ADJUST - synopmob_set_register(base + DBADDR, (unsigned int)(pDmaDesc)); // add SZ_ADJUST - synopmob_set_register(base+BLKSIZ, 512); - synopmob_set_register(base+BYTCNT, num); - synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC); - synopmob_set_bits(base + BMOD,BMOD_DE); - - ret = synopmob_execute_command(base, cmd, blk); - if ( !ret ) { - ret = ERRIDMA; - synopmob_set_bits(base+CTRL, INT_ENABLE); - err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS); - if ( !err ) { - while (--loop_for_command_done_check > 0) { - intsts = synopmob_read_register(base+RINTSTS); - if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) { - break; - } - plat_loop(1); - } - ret = synopmob_handle_standard_rinsts(intsts); - if (!ret ) { - if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt - ret = ERRIDMA; - } - } - } - } + // reset + synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO + while (synopmob_read_register(base+CTRL) & FIFO_RESET); + synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts - if (ret) { - char* op = "read"; - if (rw) - op = "write"; - - SDIO_PRINTF("sdc_read_write_block(%s) fail:, ret = %d\n", op, ret); - } + cmd = 0x2658; // write + if ( !rw ) { + cmd = 0x2251; //read + } + //if (num > 1) { + if (num >= 1) { // some card fail on sigle-block mode, so use multi-block instead of sigle-block mode. + cmd++; + multi++; + } + if (sdc->card_type == SD_TYPE) { + blk <<= 9; //SD stadand capability card use 512 unit. + } + num <<= 9; - synopmob_clear_bits(base+CTRL, INT_ENABLE); - synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC); - synopmob_clear_bits(base + BMOD,BMOD_DE); + pDmaDesc->desc0 |= DescOwnByDma | DescFirstDesc | DescLastDesc; + pDmaDesc->desc1 = ((num << DescBuf1SizeShift) & DescBuf1SizMsk); + pDmaDesc->desc2 = (unsigned int)buffer; + flush_dcache_range((unsigned long)pDmaDesc, sizeof(DmaDesc)); // add SZ_ADJUST + synopmob_set_register(base + DBADDR, (unsigned int)(pDmaDesc)); // add SZ_ADJUST + synopmob_set_register(base+BLKSIZ, 512); + synopmob_set_register(base+BYTCNT, num); + synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC); + synopmob_set_bits(base + BMOD,BMOD_DE); - synopmob_set_register(base+BLKSIZ, 512); - synopmob_set_register(base+BYTCNT, 512); + ret = synopmob_execute_command(base, cmd, blk); + if ( !ret ) { + ret = ERRIDMA; + synopmob_set_bits(base+CTRL, INT_ENABLE); + err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS); + if ( !err ) { + while (--loop_for_command_done_check > 0) { + intsts = synopmob_read_register(base+RINTSTS); + if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) { + break; + } + plat_loop(1); + } + ret = synopmob_handle_standard_rinsts(intsts); + if (!ret ) { + if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt + ret = ERRIDMA; + } + } + } + } - synopmob_set_register(base + RINTSTS, 0xfffe); + if (ret) { + char* op = "read"; + if (rw) + op = "write"; - if ( !ret && rw) { - ret = synopmob_wait_data_ready(base); - } + SDIO_PRINTF("sdc_read_write_block(%s) fail:, ret = %d\n", op, ret); + } - if (!ret && multi ) { //send STOP_TRANSACTION command - ret = sd_send_cmd_r1(sdc, 0x404c, 0, 1); - } + synopmob_clear_bits(base+CTRL, INT_ENABLE); + synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC); + synopmob_clear_bits(base + BMOD,BMOD_DE); - rt_sem_release(sdc->mutex); - - if ( !rw && !ret ) { //read - inv_dcache_range((unsigned long)buffer, num); - } - - return ret; + synopmob_set_register(base+BLKSIZ, 512); + synopmob_set_register(base+BYTCNT, 512); + + synopmob_set_register(base + RINTSTS, 0xfffe); + + if ( !ret && rw) { + ret = synopmob_wait_data_ready(base); + } + + if (!ret && multi ) { //send STOP_TRANSACTION command + ret = sd_send_cmd_r1(sdc, 0x404c, 0, 1); + } + + rt_sem_release(sdc->mutex); + + if ( !rw && !ret ) { //read + inv_dcache_range((unsigned long)buffer, num); + } + + return ret; } #else //no IDMA static int sdc_read_write_block(HSDC handle, unsigned int rw, unsigned int blk, unsigned int num, unsigned char* buffer) { - sdc_t* sdc = (sdc_t*)handle; - volatile DmaDesc *pDmaDesc = sdc->pDmaDesc; - int ret; - unsigned int intsts = 0; - unsigned int entries; - unsigned int cmd; - unsigned int multi = 0; - unsigned int base = sdc->ip_base; - int loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC; - rt_err_t err; + sdc_t* sdc = (sdc_t*)handle; + volatile DmaDesc *pDmaDesc = sdc->pDmaDesc; + int ret; + unsigned int intsts = 0; + unsigned int entries; + unsigned int cmd; + unsigned int multi = 0; + unsigned int base = sdc->ip_base; + int loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC; + rt_err_t err; - // valid check - if (synopmob_read_register(base+CDETECT) & 1) { - return ERRCARDNOTCONN; - } - if (!num || num > 16) { - return ERRNOTSUPPORTED; - } - if (blk + num > sdc->sectors) { - return ERRADDRESSRANGE; - } - - if ( rw ) { - flush_dcache_range((unsigned long)buffer, num << 9); - } - else { - // to avoid memset bug? - inv_dcache_range((unsigned long)buffer, num << 9); + // valid check + if (synopmob_read_register(base+CDETECT) & 1) { + return ERRCARDNOTCONN; + } + if (!num || num > 16) { + return ERRNOTSUPPORTED; + } + if (blk + num > sdc->sectors) { + return ERRADDRESSRANGE; } - err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); - if (err != RT_EOK) { - return ERRNORES; - } + if ( rw ) { + flush_dcache_range((unsigned long)buffer, num << 9); + } + else { + // to avoid memset bug? + inv_dcache_range((unsigned long)buffer, num << 9); + } - // reset - synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO - while (synopmob_read_register(base+CTRL) & FIFO_RESET); - synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts + err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); + if (err != RT_EOK) { + return ERRNORES; + } - cmd = 0x2658; // write - if ( !rw ) { - cmd = 0x2251; //read - } - if (num > 1) { - cmd++; - multi++; - } - if (sdc->card_type == SD_TYPE) { - blk <<= 9; //SD stadand capability card use 512 unit. - } - num <<= 9; - - synopmob_set_register(base+BLKSIZ, 512); - synopmob_set_register(base+BYTCNT, num); - - ret = synopmob_execute_command(base, cmd, blk); - if ( !ret ) { - while (1) { - ret = synopmob_wait_command_done(base, &intsts, 0); - if (ret) - break; + // reset + synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO + while (synopmob_read_register(base+CTRL) & FIFO_RESET); + synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts - ret = synopmob_handle_standard_rinsts(intsts); - if (ret) - break; + cmd = 0x2658; // write + if ( !rw ) { + cmd = 0x2251; //read + } + if (num > 1) { + cmd++; + multi++; + } + if (sdc->card_type == SD_TYPE) { + blk <<= 9; //SD stadand capability card use 512 unit. + } + num <<= 9; - if (!rw && (intsts & (INTMSK_RXDR|INTMSK_DAT_OVER)) ){ - while (num > 0 ) { - entries = synopmob_read_register(base + STATUS); - if (!GET_FIFO_COUNT(entries)) - break; - *((volatile unsigned int*)buffer) = synopmob_read_register(base + FIFODAT); - buffer += 4; - num -= 4; - } - } - - if (rw && ( intsts & INTMSK_TXDR ) ) { - while (num > 0) { - entries = synopmob_read_register(base+STATUS); - if ( entries & 8 ) { //FIFO is full - break; - } - synopmob_set_register(base+FIFODAT, *((volatile unsigned int*)buffer)); - buffer += 4; - num -= 4; - } - } - - if ( intsts & INTMSK_DAT_OVER ) { - break; - } + synopmob_set_register(base+BLKSIZ, 512); + synopmob_set_register(base+BYTCNT, num); - if (intsts & INTMSK_CMD_DONE) { - entries = synopmob_read_register(base+RESP0); - ret = synopmob_check_r1_resp(entries); - if (ret) { - break; - } - } + ret = synopmob_execute_command(base, cmd, blk); + if ( !ret ) { + while (1) { + ret = synopmob_wait_command_done(base, &intsts, 0); + if (ret) + break; - synopmob_set_register(base+RINTSTS, intsts); //write to clear - intsts = 0; - } - - if (intsts) { - synopmob_set_register(base+RINTSTS, intsts); //write to clear - } - } + ret = synopmob_handle_standard_rinsts(intsts); + if (ret) + break; - synopmob_set_register(base+BLKSIZ, 512); - synopmob_set_register(base+BYTCNT, 512); - synopmob_set_register(base + RINTSTS, 0xfffe); + if (!rw && (intsts & (INTMSK_RXDR|INTMSK_DAT_OVER)) ){ + while (num > 0 ) { + entries = synopmob_read_register(base + STATUS); + if (!GET_FIFO_COUNT(entries)) + break; + *((volatile unsigned int*)buffer) = synopmob_read_register(base + FIFODAT); + buffer += 4; + num -= 4; + } + } - if ( !ret && rw) { - ret = synopmob_wait_data_ready(base); - } + if (rw && ( intsts & INTMSK_TXDR ) ) { + while (num > 0) { + entries = synopmob_read_register(base+STATUS); + if ( entries & 8 ) { //FIFO is full + break; + } + synopmob_set_register(base+FIFODAT, *((volatile unsigned int*)buffer)); + buffer += 4; + num -= 4; + } + } - if (!ret && multi ) { //send STOP_TRANSACTION command - ret = sd_send_cmd_r1(sdc, 0x404c, 0, 1); - } + if ( intsts & INTMSK_DAT_OVER ) { + break; + } - rt_sem_release(sdc->mutex); - - if ( !rw && !ret ) { //read - inv_dcache_range((unsigned long)buffer, num); - } - - return ret; + if (intsts & INTMSK_CMD_DONE) { + entries = synopmob_read_register(base+RESP0); + ret = synopmob_check_r1_resp(entries); + if (ret) { + break; + } + } + + synopmob_set_register(base+RINTSTS, intsts); //write to clear + intsts = 0; + } + + if (intsts) { + synopmob_set_register(base+RINTSTS, intsts); //write to clear + } + } + + synopmob_set_register(base+BLKSIZ, 512); + synopmob_set_register(base+BYTCNT, 512); + synopmob_set_register(base + RINTSTS, 0xfffe); + + if ( !ret && rw) { + ret = synopmob_wait_data_ready(base); + } + + if (!ret && multi ) { //send STOP_TRANSACTION command + ret = sd_send_cmd_r1(sdc, 0x404c, 0, 1); + } + + rt_sem_release(sdc->mutex); + + if ( !rw && !ret ) { //read + inv_dcache_range((unsigned long)buffer, num); + } + + return ret; } #endif //SDC_USE_IDMA int sdc_write_block(HSDC handle, unsigned int blk, unsigned int num, unsigned char* buffer) { - return sdc_read_write_block(handle, 1, blk, num, buffer); + return sdc_read_write_block(handle, 1, blk, num, buffer); } int sdc_read_block(HSDC handle, unsigned int blk, unsigned int num, unsigned char* buffer) { - return sdc_read_write_block(handle, 0, blk, num, buffer); + return sdc_read_write_block(handle, 0, blk, num, buffer); } int sdc_erase_block(HSDC handle, unsigned int blk, unsigned int num) { - int ret; - sdc_t* sdc = (sdc_t*)handle; - - if (sdc->card_type == SD_TYPE) { - blk <<= 9; //SD stadand capability card use 512 unit. - num = ((num-1)<<9) + blk; - } - else { - num = blk + num - 1; - } - - ret = sd_send_cmd_r1(sdc, 0x40|32, blk, 0); // cmd32 - if (!ret) { - ret = sd_send_cmd_r1(sdc, 0x40|33, num, 0); // cmd33 - if (!ret) { - ret = sd_send_cmd_r1(sdc, 0x40|38, 0, 1); // cmd38 - } - } + int ret; + sdc_t* sdc = (sdc_t*)handle; - return ret; + if (sdc->card_type == SD_TYPE) { + blk <<= 9; //SD stadand capability card use 512 unit. + num = ((num-1)<<9) + blk; + } + else { + num = blk + num - 1; + } + + ret = sd_send_cmd_r1(sdc, 0x40|32, blk, 0); // cmd32 + if (!ret) { + ret = sd_send_cmd_r1(sdc, 0x40|33, num, 0); // cmd33 + if (!ret) { + ret = sd_send_cmd_r1(sdc, 0x40|38, 0, 1); // cmd38 + } + } + + return ret; } int sdc_get_sector_num(HSDC handle) { - return ((sdc_t*)handle)->sectors; + return ((sdc_t*)handle)->sectors; } static int sd_send_cmd9(sdc_t* sdc) { - int ret; - unsigned int intst; - unsigned int resp0; - unsigned int resp1; - unsigned int resp2; - unsigned int resp3; - unsigned int base = sdc->ip_base; - unsigned int C_SIZE; - unsigned int C_SIZE_MULT; - unsigned int READ_BL_LEN; + int ret; + unsigned int intst; + unsigned int resp0; + unsigned int resp1; + unsigned int resp2; + unsigned int resp3; + unsigned int base = sdc->ip_base; + unsigned int C_SIZE; + unsigned int C_SIZE_MULT; + unsigned int READ_BL_LEN; - ret = synopmob_execute_command(base, 0xC9, sdc->rca<<16); - if (!ret) { - ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); - if (!ret) { - synopmob_set_register(base+RINTSTS, intst); - ret = synopmob_handle_standard_rinsts(intst); - if (!ret) { - sdc->csd[0] = resp0 = synopmob_read_register(base+RESP0); - sdc->csd[1] = resp1 = synopmob_read_register(base+RESP1); - sdc->csd[2] = resp2 = synopmob_read_register(base+RESP2); - sdc->csd[3] = resp3 = synopmob_read_register(base+RESP3); - - if ((resp3>>30) == 0) { //CSD version 1.0 - C_SIZE = (resp1 >> 30) | ((resp2 & 0x3ff)<<2); - C_SIZE_MULT = ((resp1 >> 15) & 0x07); - READ_BL_LEN = ((resp2 >> 16) & 0xf); - sdc->sectors = ((((C_SIZE+1)<<(C_SIZE_MULT+2))<<(READ_BL_LEN))>>9); - } - else { //CSD version 2.0 - sdc->sectors = (((resp1 >> 16)+1)<<10); - } - } - } - } + ret = synopmob_execute_command(base, 0xC9, sdc->rca<<16); + if (!ret) { + ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); + if (!ret) { + synopmob_set_register(base+RINTSTS, intst); + ret = synopmob_handle_standard_rinsts(intst); + if (!ret) { + sdc->csd[0] = resp0 = synopmob_read_register(base+RESP0); + sdc->csd[1] = resp1 = synopmob_read_register(base+RESP1); + sdc->csd[2] = resp2 = synopmob_read_register(base+RESP2); + sdc->csd[3] = resp3 = synopmob_read_register(base+RESP3); - return ret; + if ((resp3>>30) == 0) { //CSD version 1.0 + C_SIZE = (resp1 >> 30) | ((resp2 & 0x3ff)<<2); + C_SIZE_MULT = ((resp1 >> 15) & 0x07); + READ_BL_LEN = ((resp2 >> 16) & 0xf); + sdc->sectors = ((((C_SIZE+1)<<(C_SIZE_MULT+2))<<(READ_BL_LEN))>>9); + } + else { //CSD version 2.0 + sdc->sectors = (((resp1 >> 16)+1)<<10); + } + } + } + } + + return ret; } static int sd_send_cmd5(sdc_t* sdc, unsigned int arg, unsigned int* resp) { - unsigned int cmd_reg = 0x45; - unsigned int intst; - int ret; - unsigned int base = sdc->ip_base; + unsigned int cmd_reg = 0x45; + unsigned int intst; + int ret; + unsigned int base = sdc->ip_base; - ret = synopmob_execute_command(base, cmd_reg, arg); - if (!ret) { - ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); - if (!ret) { - synopmob_set_register(base+RINTSTS, intst); - ret = synopmob_handle_standard_rinsts(intst); - if (!ret) { - *resp = synopmob_read_register(base+RESP0); - } - } - } - - return ret; + ret = synopmob_execute_command(base, cmd_reg, arg); + if (!ret) { + ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); + if (!ret) { + synopmob_set_register(base+RINTSTS, intst); + ret = synopmob_handle_standard_rinsts(intst); + if (!ret) { + *resp = synopmob_read_register(base+RESP0); + } + } + } + + return ret; } static int sd_send_cmd8(sdc_t* sdc) { - int ret; - unsigned int cmd_reg = 0x48; - unsigned int intst; - unsigned int err = 0; - unsigned int base = sdc->ip_base; - - ret = synopmob_execute_command(base, cmd_reg, 0x000001A5); - if (!ret) { - while (1) { - ret = synopmob_wait_command_done(base, &intst, 0); - if (!ret) { - synopmob_set_register(base+RINTSTS, intst); - err |= synopmob_handle_standard_rinsts(intst); - if (intst & INTMSK_CMD_DONE) { - break; - } - } - } - } + int ret; + unsigned int cmd_reg = 0x48; + unsigned int intst; + unsigned int err = 0; + unsigned int base = sdc->ip_base; - return err; + ret = synopmob_execute_command(base, cmd_reg, 0x000001A5); + if (!ret) { + while (1) { + ret = synopmob_wait_command_done(base, &intst, 0); + if (!ret) { + synopmob_set_register(base+RINTSTS, intst); + err |= synopmob_handle_standard_rinsts(intst); + if (intst & INTMSK_CMD_DONE) { + break; + } + } + } + } + + return err; } static int sd_send_acmd41(sdc_t* sdc, int* hcs) { - unsigned int cmd_reg = 0x69; - unsigned int resp; - int ret = 0; - unsigned int count = ACMD41_RETRY_COUNT; - unsigned int cmd_arg = 0xff8000; - unsigned int base = sdc->ip_base; + unsigned int cmd_reg = 0x69; + unsigned int resp; + int ret = 0; + unsigned int count = ACMD41_RETRY_COUNT; + unsigned int cmd_arg = 0xff8000; + unsigned int base = sdc->ip_base; - if (*hcs) { - cmd_arg |= (1<<30); - } - while ( count > 0) { - SDC_WHERE(); - ret = sd_send_cmd55(sdc); - if (ret) - break; + if (*hcs) { + cmd_arg |= (1<<30); + } + while ( count > 0) { + SDC_WHERE(); + ret = sd_send_cmd55(sdc); + if (ret) + break; - SDC_WHERE(); - ret = synopmob_execute_command(base, cmd_reg, cmd_arg); - if (ret) - break; + SDC_WHERE(); + ret = synopmob_execute_command(base, cmd_reg, cmd_arg); + if (ret) + break; - SDC_WHERE(); - ret = synopmob_wait_command_done(base, &resp, INTMSK_CMD_DONE); - if ( ret ) - break; + SDC_WHERE(); + ret = synopmob_wait_command_done(base, &resp, INTMSK_CMD_DONE); + if ( ret ) + break; - SDC_WHERE(); - synopmob_set_register(base+RINTSTS, resp); - ret = synopmob_handle_standard_rinsts(resp); - if (!ret) { - SDC_WHERE(); - resp = synopmob_read_register(base+RESP0); - if (resp & 0x80000000) { //card is ready. - SDC_WHERE(); - if ( !(resp & (1<<30)) ) { - SDC_WHERE(); - *hcs = 0; - } - if ( (resp & 0x00ff8000) != 0x00ff8000 ) { //not supported voltage - ret = ERRHARDWARE; - } - break; - } - } + SDC_WHERE(); + synopmob_set_register(base+RINTSTS, resp); + ret = synopmob_handle_standard_rinsts(resp); + if (!ret) { + SDC_WHERE(); + resp = synopmob_read_register(base+RESP0); + if (resp & 0x80000000) { //card is ready. + SDC_WHERE(); + if ( !(resp & (1<<30)) ) { + SDC_WHERE(); + *hcs = 0; + } + if ( (resp & 0x00ff8000) != 0x00ff8000 ) { //not supported voltage + ret = ERRHARDWARE; + } + break; + } + } - --count; - plat_loop(1); - } + --count; + plat_loop(1); + } - if (!count) - ret = ERRACMD41TIMEOUT; - - return ret; + if (!count) + ret = ERRACMD41TIMEOUT; + + return ret; } static int sd_send_acmd51(sdc_t* sdc) //Send SCR { - unsigned int cmd_reg = 0x2273; - unsigned int resp; - int ret; - unsigned int intst = 0; - unsigned int entries; - int count = 1; - unsigned int base = sdc->ip_base; + unsigned int cmd_reg = 0x2273; + unsigned int resp; + int ret; + unsigned int intst = 0; + unsigned int entries; + int count = 1; + unsigned int base = sdc->ip_base; - ret = sd_send_cmd55(sdc); - if (!ret) { - synopmob_set_register(base+BLKSIZ, 8); - synopmob_set_register(base+BYTCNT, 8); - ret = synopmob_execute_command(base, cmd_reg, 0); - if (!ret) { - while (1) { - ret = synopmob_wait_command_done(base, &intst, 0); - if (ret) { - break; - } + ret = sd_send_cmd55(sdc); + if (!ret) { + synopmob_set_register(base+BLKSIZ, 8); + synopmob_set_register(base+BYTCNT, 8); + ret = synopmob_execute_command(base, cmd_reg, 0); + if (!ret) { + while (1) { + ret = synopmob_wait_command_done(base, &intst, 0); + if (ret) { + break; + } - ret = synopmob_handle_standard_rinsts(intst); - if (ret) { - break; - } - - if (intst & INTMSK_CMD_DONE) { - resp = synopmob_read_register(base+RESP0); - ret = synopmob_check_r1_resp(resp); - if (ret) - break; - } + ret = synopmob_handle_standard_rinsts(intst); + if (ret) { + break; + } - if (intst & INTMSK_DAT_OVER) { - entries = synopmob_read_register(base + STATUS); - if (GET_FIFO_COUNT(entries) == 2) { - while (count >= 0) { - entries = synopmob_read_register(base + FIFODAT); - sdc->scr[count--] = BE32_TO_CPU(entries); - } - } - break; - } + if (intst & INTMSK_CMD_DONE) { + resp = synopmob_read_register(base+RESP0); + ret = synopmob_check_r1_resp(resp); + if (ret) + break; + } - synopmob_set_register(base+RINTSTS, intst); - intst = 0; - } + if (intst & INTMSK_DAT_OVER) { + entries = synopmob_read_register(base + STATUS); + if (GET_FIFO_COUNT(entries) == 2) { + while (count >= 0) { + entries = synopmob_read_register(base + FIFODAT); + sdc->scr[count--] = BE32_TO_CPU(entries); + } + } + break; + } - if (intst) { - synopmob_set_register(base+RINTSTS, intst); - } - } + synopmob_set_register(base+RINTSTS, intst); + intst = 0; + } - synopmob_set_register(base+BLKSIZ, 512); - synopmob_set_register(base+BYTCNT, 512); - } + if (intst) { + synopmob_set_register(base+RINTSTS, intst); + } + } - return ret; + synopmob_set_register(base+BLKSIZ, 512); + synopmob_set_register(base+BYTCNT, 512); + } + + return ret; } -static int sd_send_cmd6(sdc_t* sdc, unsigned int cmd_arg, unsigned int* data_buff) +static int sd_send_cmd6(sdc_t* sdc, unsigned int cmd_arg, unsigned int* data_buff) { - unsigned int cmd_reg = 0x2246; - unsigned int resp; - int ret; - unsigned int intst = 0; - unsigned int entries; - int count = 64; - unsigned int base = sdc->ip_base; + unsigned int cmd_reg = 0x2246; + unsigned int resp; + int ret; + unsigned int intst = 0; + unsigned int entries; + int count = 64; + unsigned int base = sdc->ip_base; - synopmob_set_register(base+BLKSIZ, 64); - synopmob_set_register(base+BYTCNT, 64); - ret = synopmob_execute_command(base, cmd_reg, cmd_arg); - if (!ret) { - while (1) { - ret = synopmob_wait_command_done(base, &intst, 0); - if (ret) { - break; - } + synopmob_set_register(base+BLKSIZ, 64); + synopmob_set_register(base+BYTCNT, 64); + ret = synopmob_execute_command(base, cmd_reg, cmd_arg); + if (!ret) { + while (1) { + ret = synopmob_wait_command_done(base, &intst, 0); + if (ret) { + break; + } - ret = synopmob_handle_standard_rinsts(intst); - if (ret) { - break; - } - - if (intst & INTMSK_CMD_DONE) { - resp = synopmob_read_register(base+RESP0); - ret = synopmob_check_r1_resp(resp); - if (ret) - break; - } + ret = synopmob_handle_standard_rinsts(intst); + if (ret) { + break; + } - while (count > 0) { - entries = synopmob_read_register(base + STATUS); - if ( !GET_FIFO_COUNT(entries) ) { - break; - } - *(data_buff++) = synopmob_read_register(base + FIFODAT); - count -= 4; - } + if (intst & INTMSK_CMD_DONE) { + resp = synopmob_read_register(base+RESP0); + ret = synopmob_check_r1_resp(resp); + if (ret) + break; + } - if (intst & INTMSK_DAT_OVER) { - break; - } + while (count > 0) { + entries = synopmob_read_register(base + STATUS); + if ( !GET_FIFO_COUNT(entries) ) { + break; + } + *(data_buff++) = synopmob_read_register(base + FIFODAT); + count -= 4; + } - synopmob_set_register(base+RINTSTS, intst); //write to clear - intst = 0; - } + if (intst & INTMSK_DAT_OVER) { + break; + } - if (intst) { - synopmob_set_register(base+RINTSTS, intst); //write to clear - } - } + synopmob_set_register(base+RINTSTS, intst); //write to clear + intst = 0; + } - synopmob_set_register(base+BLKSIZ, 512); - synopmob_set_register(base+BYTCNT, 512); + if (intst) { + synopmob_set_register(base+RINTSTS, intst); //write to clear + } + } - return ret; + synopmob_set_register(base+BLKSIZ, 512); + synopmob_set_register(base+BYTCNT, 512); + + return ret; } static int synopmob_send_clock_only_cmd(unsigned int base) { - return synopmob_execute_command(base, 0x202000, 0); + return synopmob_execute_command(base, 0x202000, 0); } static int synopmob_disable_all_clocks(unsigned int base) { - synopmob_set_register(base+CLKENA, 0); - return synopmob_send_clock_only_cmd(base); + synopmob_set_register(base+CLKENA, 0); + return synopmob_send_clock_only_cmd(base); } static int synopmob_enable_clocks_with_val(unsigned int base, unsigned int val) { - synopmob_set_register(base+CLKENA, val); - return synopmob_send_clock_only_cmd(base); + synopmob_set_register(base+CLKENA, val); + return synopmob_send_clock_only_cmd(base); } static int synopmob_set_clk_freq(sdc_t* sdc, unsigned int divider) { - #define MAX_DIVIDER_VALUE 0xff - - unsigned int orig_clkena; - int retval; - unsigned int base = sdc->ip_base; + #define MAX_DIVIDER_VALUE 0xff - if (divider > MAX_DIVIDER_VALUE) { - return 0xffffffff; - } + unsigned int orig_clkena; + int retval; + unsigned int base = sdc->ip_base; - /* To make sure we dont disturb enable/disable settings of the cards*/ - orig_clkena = synopmob_read_register(base+CLKENA); + if (divider > MAX_DIVIDER_VALUE) { + return 0xffffffff; + } - /* Disable all clocks before changing frequency the of card clocks */ - if ((retval = synopmob_disable_all_clocks(base)) != 0) { - return retval; - } - /* Program the clock divider in our case it is divider 0 */ - synopmob_clear_bits(base+CLKDIV, MAX_DIVIDER_VALUE); - synopmob_set_bits(base+CLKDIV, divider); - - /*Send the command to CIU using synopmob_send_clock_only_cmd and enable the clocks in CLKENA register */ - if ((retval = synopmob_send_clock_only_cmd(base)) != 0) { - synopmob_enable_clocks_with_val(base, orig_clkena); - return retval; - } + /* To make sure we dont disturb enable/disable settings of the cards*/ + orig_clkena = synopmob_read_register(base+CLKENA); - return synopmob_enable_clocks_with_val(base, orig_clkena); + /* Disable all clocks before changing frequency the of card clocks */ + if ((retval = synopmob_disable_all_clocks(base)) != 0) { + return retval; + } + /* Program the clock divider in our case it is divider 0 */ + synopmob_clear_bits(base+CLKDIV, MAX_DIVIDER_VALUE); + synopmob_set_bits(base+CLKDIV, divider); + + /*Send the command to CIU using synopmob_send_clock_only_cmd and enable the clocks in CLKENA register */ + if ((retval = synopmob_send_clock_only_cmd(base)) != 0) { + synopmob_enable_clocks_with_val(base, orig_clkena); + return retval; + } + + return synopmob_enable_clocks_with_val(base, orig_clkena); } static int enum_sd_card(sdc_t* sdc) { - int ret; - int count = 1000; - int hcs = 0; - unsigned int buffer[16]; - unsigned int base = sdc->ip_base; + int ret; + int count = 1000; + int hcs = 0; + unsigned int buffer[16]; + unsigned int base = sdc->ip_base; - if (synopmob_read_register(base+CDETECT) & 1) { - return ERRCARDNOTCONN; - } - - #if 0 - synopmob_set_bits(0x98500004, (1<<24)); //set to output mode - synopmob_set_bits(0x98500000, (1<<24)); //power off - plat_loop(1000000/5); //Lets give some ramp down period - synopmob_clear_bits(0x98500000, (1<<24)); //power on - plat_loop(1000000/5);//Lets give some ramp down period - #endif - - synopmob_set_register(base+CTYPE, ONE_BIT_MODE); + if (synopmob_read_register(base+CDETECT) & 1) { + return ERRCARDNOTCONN; + } - synopmob_set_register(base+CLKENA, 0x00000001); /*enable clock, non-low-power mode*/ - ret = synopmob_set_clk_freq(sdc, MMC_FOD_DIVIDER_VALUE); - - if ( !ret ) { - plat_loop(1000); //enough for 74 clock. - SDC_WHERE(); - ret = sd_send_cmd0(sdc); //CMD0 has no response - } - - if ( !ret ) { - SDC_WHERE(); - ret = sd_send_cmd8(sdc); //even if CMD8 get response, it may be V1.0 card. - if (!ret) { - hcs = 1; - } - SDC_WHERE(); - ret = sd_send_acmd41(sdc, &hcs); - } + #if 0 + synopmob_set_bits(0x98500004, (1<<24)); //set to output mode + synopmob_set_bits(0x98500000, (1<<24)); //power off + plat_loop(1000000/5); //Lets give some ramp down period + synopmob_clear_bits(0x98500000, (1<<24)); //power on + plat_loop(1000000/5);//Lets give some ramp down period + #endif - if (!ret) { - SDC_WHERE(); - ret = sd_send_cmd2(sdc); //CID - } + synopmob_set_register(base+CTYPE, ONE_BIT_MODE); - if (!ret) { - SDC_WHERE(); - ret = sd_send_cmd3(sdc); //get RCA - } + synopmob_set_register(base+CLKENA, 0x00000001); /*enable clock, non-low-power mode*/ + ret = synopmob_set_clk_freq(sdc, MMC_FOD_DIVIDER_VALUE); - if (!ret) { - SDC_WHERE(); - ret = sd_send_cmd9(sdc); //CSD - } + if ( !ret ) { + plat_loop(1000); //enough for 74 clock. + SDC_WHERE(); + ret = sd_send_cmd0(sdc); //CMD0 has no response + } - if (!ret) { - SDC_WHERE(); - ret = sd_send_cmd7(sdc); //select the card - } + if ( !ret ) { + SDC_WHERE(); + ret = sd_send_cmd8(sdc); //even if CMD8 get response, it may be V1.0 card. + if (!ret) { + hcs = 1; + } + SDC_WHERE(); + ret = sd_send_acmd41(sdc, &hcs); + } - if (!ret && (sdc->wkmod & SDC_WKMOD_4WIRE) ) { - SDC_WHERE(); - ret = sd_send_acmd51(sdc); //SCR - if (!ret && (sdc->scr[1] & 0x00040000)) { // 4bit mode supported? - ret = sd_send_acmd6(sdc, 4); //switch to 4bit mode - } - } - - if (!ret && (sdc->wkmod & SDC_WKMOD_50M_HI_SPEED) && (sdc->csd[2] & 0x40000000) ) { //judge whether class10 is supported? CMD6 is belonging to class10. - SDC_WHERE(); - ret = sd_send_cmd6(sdc, 0x00fffff1, buffer); //switch to high speed mode. - if ( !ret && (*(((unsigned char*)buffer)+13)&0x02) ) { //the card support high speed mode? - SDC_WHERE(); - ret = sd_send_cmd6(sdc, 0x80fffff1, buffer); //switch to high speed mode. - if (!ret && ((*(((unsigned char*)buffer)+16) & 0xf) == 1) ) { - //switch to high speed mode sucess. - sd_send_uncmd7(sdc); //deselect the card - sd_send_cmd9(sdc); //CSD - ret = sd_send_cmd7(sdc); //select the card - } - } - } - - if (!ret && (sdc->wkmod & (SDC_WKMOD_50M_HI_SPEED|SDC_WKMOD_25M_STAND_SPEED))) { - if ( (sdc->csd[3] & 0xff) == 0x5A ) { //50MHz high speed mode. - SDC_WHERE(); - ret = synopmob_set_clk_freq(sdc, (((CIU_CLK)/(50000*2)))); - } - else if ( (sdc->csd[3] & 0xff) == 0x32 ) { - SDC_WHERE(); //25MHz standard speed mode. - ret = synopmob_set_clk_freq(sdc, sdc_clk_divider/*ONE_BIT_BUS_FREQ*/); - } - } + if (!ret) { + SDC_WHERE(); + ret = sd_send_cmd2(sdc); //CID + } - if (!ret) { - sdc->card_type = SD_TYPE; - if (hcs) { - sdc->card_type = SD_2_0_TYPE; - } - } + if (!ret) { + SDC_WHERE(); + ret = sd_send_cmd3(sdc); //get RCA + } - return ret; + if (!ret) { + SDC_WHERE(); + ret = sd_send_cmd9(sdc); //CSD + } + + if (!ret) { + SDC_WHERE(); + ret = sd_send_cmd7(sdc); //select the card + } + + if (!ret && (sdc->wkmod & SDC_WKMOD_4WIRE) ) { + SDC_WHERE(); + ret = sd_send_acmd51(sdc); //SCR + if (!ret && (sdc->scr[1] & 0x00040000)) { // 4bit mode supported? + ret = sd_send_acmd6(sdc, 4); //switch to 4bit mode + } + } + + if (!ret && (sdc->wkmod & SDC_WKMOD_50M_HI_SPEED) && (sdc->csd[2] & 0x40000000) ) { //judge whether class10 is supported? CMD6 is belonging to class10. + SDC_WHERE(); + ret = sd_send_cmd6(sdc, 0x00fffff1, buffer); //switch to high speed mode. + if ( !ret && (*(((unsigned char*)buffer)+13)&0x02) ) { //the card support high speed mode? + SDC_WHERE(); + ret = sd_send_cmd6(sdc, 0x80fffff1, buffer); //switch to high speed mode. + if (!ret && ((*(((unsigned char*)buffer)+16) & 0xf) == 1) ) { + //switch to high speed mode sucess. + sd_send_uncmd7(sdc); //deselect the card + sd_send_cmd9(sdc); //CSD + ret = sd_send_cmd7(sdc); //select the card + } + } + } + + if (!ret && (sdc->wkmod & (SDC_WKMOD_50M_HI_SPEED|SDC_WKMOD_25M_STAND_SPEED))) { + if ( (sdc->csd[3] & 0xff) == 0x5A ) { //50MHz high speed mode. + SDC_WHERE(); + ret = synopmob_set_clk_freq(sdc, (((CIU_CLK)/(50000*2)))); + } + else if ( (sdc->csd[3] & 0xff) == 0x32 ) { + SDC_WHERE(); //25MHz standard speed mode. + ret = synopmob_set_clk_freq(sdc, sdc_clk_divider/*ONE_BIT_BUS_FREQ*/); + } + } + + if (!ret) { + sdc->card_type = SD_TYPE; + if (hcs) { + sdc->card_type = SD_2_0_TYPE; + } + } + + return ret; } int sdio_drv_creg_read(HSDC handle, int addr, int fn, unsigned int *resp) { - sdc_t* sdc = (sdc_t*)handle; - unsigned int arg; - unsigned int cmd_reg = 0x74; - unsigned int intst; - int ret; - unsigned int base = sdc->ip_base; - rt_err_t err; + sdc_t* sdc = (sdc_t*)handle; + unsigned int arg; + unsigned int cmd_reg = 0x74; + unsigned int intst; + int ret; + unsigned int base = sdc->ip_base; + rt_err_t err; if(resp) { *resp = 0; } - - err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); - if (err != RT_EOK) { - return ERRNORES; - } - arg = (fn << 28) | (addr << 9); - ret = synopmob_execute_command(base, cmd_reg, arg); - if (!ret) { - ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); - if (!ret) { - synopmob_set_register(base+RINTSTS, intst); //write to clear - ret = synopmob_handle_standard_rinsts(intst); - if (!ret) { - *resp = synopmob_read_register(base+RESP0); - ret = synopmob_check_r5_resp(*resp); - } - } - } + err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); + if (err != RT_EOK) { + return ERRNORES; + } - rt_sem_release(sdc->mutex); - - if (ret) { - ret++; - ret--; - SDIO_PRINTF("sdio_drv_creg_read fail:, ret = %d\n", ret); - } - - return ret; + arg = (fn << 28) | (addr << 9); + ret = synopmob_execute_command(base, cmd_reg, arg); + if (!ret) { + ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); + if (!ret) { + synopmob_set_register(base+RINTSTS, intst); //write to clear + ret = synopmob_handle_standard_rinsts(intst); + if (!ret) { + *resp = synopmob_read_register(base+RESP0); + ret = synopmob_check_r5_resp(*resp); + } + } + } + + rt_sem_release(sdc->mutex); + + if (ret) { + ret++; + ret--; + SDIO_PRINTF("sdio_drv_creg_read fail:, ret = %d\n", ret); + } + + return ret; } int sdio_drv_creg_write(HSDC handle, int addr, int fn, unsigned char data, unsigned int *resp) { - sdc_t* sdc = (sdc_t*)handle; - unsigned int arg; - unsigned int cmd_reg = 0x74; - unsigned int intst; - int ret; - unsigned int base = sdc->ip_base; - rt_err_t err; + sdc_t* sdc = (sdc_t*)handle; + unsigned int arg; + unsigned int cmd_reg = 0x74; + unsigned int intst; + int ret; + unsigned int base = sdc->ip_base; + rt_err_t err; - err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); - if (err != RT_EOK) { - return ERRNORES; - } - - arg = (1 << 31) | (fn << 28) | (1 << 27) | (addr << 9) | data; - ret = synopmob_execute_command(base, cmd_reg, arg); - if (!ret) { - ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); - if (!ret) { - synopmob_set_register(base+RINTSTS, intst); //write to clear - ret = synopmob_handle_standard_rinsts(intst); - if (!ret) { - *resp = synopmob_read_register(base+RESP0); - ret = synopmob_check_r5_resp(*resp); - } - } - } + err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); + if (err != RT_EOK) { + return ERRNORES; + } - rt_sem_release(sdc->mutex); - if (ret) { - ret++; - ret--; - SDIO_PRINTF("sdio_drv_creg_write fail:, ret = %d\n", ret); - } - - return ret; + arg = (1 << 31) | (fn << 28) | (1 << 27) | (addr << 9) | data; + ret = synopmob_execute_command(base, cmd_reg, arg); + if (!ret) { + ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE); + if (!ret) { + synopmob_set_register(base+RINTSTS, intst); //write to clear + ret = synopmob_handle_standard_rinsts(intst); + if (!ret) { + *resp = synopmob_read_register(base+RESP0); + ret = synopmob_check_r5_resp(*resp); + } + } + } + + rt_sem_release(sdc->mutex); + if (ret) { + ret++; + ret--; + SDIO_PRINTF("sdio_drv_creg_write fail:, ret = %d\n", ret); + } + + return ret; } #define ARC_REG_DC_IVDL 0x4A @@ -1184,153 +1184,153 @@ extern void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size); extern void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size); void inv_dcache_range(unsigned long start, unsigned long len) { - mmu_invalidate_dcache(start, len); + mmu_invalidate_dcache(start, len); } void flush_dcache_range(unsigned long start, unsigned long len) { - mmu_clean_dcache(start, len); + mmu_clean_dcache(start, len); } int g_use_bcm43362 = 0; static int sdio_drv_read_write(sdc_t* sdc, unsigned int rw, unsigned int addr, unsigned int fn, unsigned int bcnt, - unsigned int bsize, unsigned char *buf) + unsigned int bsize, unsigned char *buf) { - volatile DmaDesc *pDmaDesc = sdc->pDmaDesc; - int ret; - unsigned int intsts = 0; - unsigned int cmd = 0x2275; - unsigned int base = sdc->ip_base; - unsigned int arg; - unsigned int num; - int loop_for_command_done_check = 10000;//DATA_TRANSFER_OVER_TIMEOUT_USEC; - rt_err_t err; + volatile DmaDesc *pDmaDesc = sdc->pDmaDesc; + int ret; + unsigned int intsts = 0; + unsigned int cmd = 0x2275; + unsigned int base = sdc->ip_base; + unsigned int arg; + unsigned int num; + int loop_for_command_done_check = 10000;//DATA_TRANSFER_OVER_TIMEOUT_USEC; + rt_err_t err; //SDIO_PRINTF("------- %s, line %d buf = %08x size = %d -------\n", __FUNCTION__, __LINE__, buf, bsize); - arg = (fn << 28) | (addr << 9); + arg = (fn << 28) | (addr << 9); - if (g_use_bcm43362) { - arg |= (1 << 26); //OPcode = 1............, for AP6181. - } - - if (bcnt == 1 && bsize <= 512) - arg |= (bsize & 0x1ff); - else - arg |= ((1 << 27) | bcnt); - if ( rw ) { - cmd |= 0x400; - arg |= (1 << 31); - } - num = bsize*bcnt; - - if ( rw ) { - flush_dcache_range((unsigned long)buf, num); - } - else { - inv_dcache_range((unsigned long)buf, num); + if (g_use_bcm43362) { + arg |= (1 << 26); //OPcode = 1............, for AP6181. } - err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); - if (err != RT_EOK) { - return ERRNORES; - } + if (bcnt == 1 && bsize <= 512) + arg |= (bsize & 0x1ff); + else + arg |= ((1 << 27) | bcnt); + if ( rw ) { + cmd |= 0x400; + arg |= (1 << 31); + } + num = bsize*bcnt; + + if ( rw ) { + flush_dcache_range((unsigned long)buf, num); + } + else { + inv_dcache_range((unsigned long)buf, num); + } + + err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); + if (err != RT_EOK) { + return ERRNORES; + } //synopmob_set_bits(base+FIFOTH, 0x2 << 28); - // reset - synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO - while (synopmob_read_register(base+CTRL) & FIFO_RESET); - synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts + // reset + synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO + while (synopmob_read_register(base+CTRL) & FIFO_RESET); + synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts - //pDmaDesc->desc0 = 0; - pDmaDesc->desc0 |= DescOwnByDma | DescFirstDesc | DescLastDesc; - pDmaDesc->desc1 = ((num << DescBuf1SizeShift) & DescBuf1SizMsk); - pDmaDesc->desc2 = (unsigned int)buf; - //pDmaDesc->desc3 = 0; - flush_dcache_range((unsigned int)pDmaDesc, sizeof(DmaDesc)); - synopmob_set_register(base+DBADDR, (unsigned int)pDmaDesc); - synopmob_set_register(base+BLKSIZ, bsize); - synopmob_set_register(base+BYTCNT, num); - synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC); - synopmob_set_bits(base + BMOD,BMOD_DE); + //pDmaDesc->desc0 = 0; + pDmaDesc->desc0 |= DescOwnByDma | DescFirstDesc | DescLastDesc; + pDmaDesc->desc1 = ((num << DescBuf1SizeShift) & DescBuf1SizMsk); + pDmaDesc->desc2 = (unsigned int)buf; + //pDmaDesc->desc3 = 0; + flush_dcache_range((unsigned int)pDmaDesc, sizeof(DmaDesc)); + synopmob_set_register(base+DBADDR, (unsigned int)pDmaDesc); + synopmob_set_register(base+BLKSIZ, bsize); + synopmob_set_register(base+BYTCNT, num); + synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC); + synopmob_set_bits(base + BMOD,BMOD_DE); //SDIO_PRINTF("pDmaDesc = %08x, %08x / %08x / %08x / %08x\n", pDmaDesc, pDmaDesc->desc0, pDmaDesc->desc1, pDmaDesc->desc2, pDmaDesc->desc3); - ret = synopmob_execute_command(base, cmd, arg); - if ( !ret ) { - ret = ERRIDMA; - err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS); - if ( !err ) { - while (--loop_for_command_done_check > 0) { - intsts = synopmob_read_register(base+RINTSTS); - if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) { - break; - } - plat_loop(1); - } - ret = synopmob_handle_standard_rinsts(intsts); - if (!ret ) { - if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt + ret = synopmob_execute_command(base, cmd, arg); + if ( !ret ) { + ret = ERRIDMA; + err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS); + if ( !err ) { + while (--loop_for_command_done_check > 0) { + intsts = synopmob_read_register(base+RINTSTS); + if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) { + break; + } + plat_loop(1); + } + ret = synopmob_handle_standard_rinsts(intsts); + if (!ret ) { + if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt SDIO_PRINTF("------- %s, line %d idsts = %08x check = %d -------\n", __FUNCTION__, __LINE__, sdc->idsts, loop_for_command_done_check); - ret = ERRIDMA; - } - } - else + ret = ERRIDMA; + } + } + else SDIO_PRINTF("------- %s, line %d intsts = %08x buf = %08x -------\n", __FUNCTION__, __LINE__, intsts, buf); - } - } + } + } + + if (!ret) { + synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts + synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC); + synopmob_clear_bits(base + BMOD,BMOD_DE); + synopmob_set_register(base+BLKSIZ, 512); + synopmob_set_register(base+BYTCNT, 512); + } + else { + char* op = "read"; + if (rw) + op = "write"; - if (!ret) { - synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts - synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC); - synopmob_clear_bits(base + BMOD,BMOD_DE); - synopmob_set_register(base+BLKSIZ, 512); - synopmob_set_register(base+BYTCNT, 512); - } - else { - char* op = "read"; - if (rw) - op = "write"; - SDIO_PRINTF("sdio_drv_read_write1(%s) fail:, ret = %d\n", op, ret); - } - - if ( rw && !ret ) { //write - ret = synopmob_wait_data_ready(base); - } + } - rt_sem_release(sdc->mutex); + if ( rw && !ret ) { //write + ret = synopmob_wait_data_ready(base); + } + + rt_sem_release(sdc->mutex); + + if ( !rw && !ret ) { //read + inv_dcache_range((unsigned long)buf, num); + } - if ( !rw && !ret ) { //read - inv_dcache_range((unsigned long)buf, num); - } - if (ret) { - char* op = "read"; - if (rw) - op = "write"; - - SDIO_PRINTF("sdio_drv_read_write2(%s) fail:, ret = %d\n", op, ret); + char* op = "read"; + if (rw) + op = "write"; + + SDIO_PRINTF("sdio_drv_read_write2(%s) fail:, ret = %d\n", op, ret); } - return ret; - //return ret ? 0/*false*/ : 1/*true*/; + return ret; + //return ret ? 0/*false*/ : 1/*true*/; } int sdio_drv_read(HSDC handle, unsigned int addr, unsigned int fn, unsigned int bcnt, - unsigned int bsize, unsigned char *buf) + unsigned int bsize, unsigned char *buf) { - return sdio_drv_read_write((sdc_t*)handle, 0, addr, fn, bcnt, bsize, buf); + return sdio_drv_read_write((sdc_t*)handle, 0, addr, fn, bcnt, bsize, buf); } int sdio_drv_write(HSDC handle, unsigned int addr, unsigned int fn, unsigned int bcnt, - unsigned int bsize, unsigned char *buf) + unsigned int bsize, unsigned char *buf) { - return sdio_drv_read_write((sdc_t*)handle, 1, addr, fn, bcnt, bsize, buf); + return sdio_drv_read_write((sdc_t*)handle, 1, addr, fn, bcnt, bsize, buf); } static void dumpchain(DmaDesc *pChain) { int i = 0; DmaDesc *tmp_pChain = pChain; - + while(tmp_pChain && i < 10) { SDIO_PRINTF("[%d]: chain =%p, buf = %p, size = %d, csi = %08x, next = %p\n", i, tmp_pChain, (DmaDesc *)tmp_pChain->desc2, tmp_pChain->desc1, tmp_pChain->desc0, (DmaDesc *)tmp_pChain->desc3); @@ -1346,711 +1346,711 @@ static void dumpchain(DmaDesc *pChain) #if 1 int sdio_drv_chain_write(sdc_t* sdc, unsigned int addr, unsigned int fn, unsigned int bcnt, unsigned int bsize, buf_chain_t *chain) { - int ret; - unsigned int intsts = 0; - unsigned int cmd = 0x2275; - unsigned int base = sdc->ip_base; - unsigned int arg; - unsigned int num; - unsigned int chain_len = 0; - int loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC; - rt_err_t err; - unsigned int rw = 1; - DmaDesc *tmpDesc = (DmaDesc *)chain; - DmaDesc *lastDesc = (void*)0; + int ret; + unsigned int intsts = 0; + unsigned int cmd = 0x2275; + unsigned int base = sdc->ip_base; + unsigned int arg; + unsigned int num; + unsigned int chain_len = 0; + int loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC; + rt_err_t err; + unsigned int rw = 1; + DmaDesc *tmpDesc = (DmaDesc *)chain; + DmaDesc *lastDesc = (void*)0; - arg = (fn << 28) | (addr << 9); - if (bcnt == 1 && bsize <= 512) - arg |= (bsize & 0x1ff); - else - arg |= ((1 << 27) | bcnt); - if ( rw ) { - cmd |= 0x400; - arg |= (1 << 31); - } - num = bsize*bcnt; + arg = (fn << 28) | (addr << 9); + if (bcnt == 1 && bsize <= 512) + arg |= (bsize & 0x1ff); + else + arg |= ((1 << 27) | bcnt); + if ( rw ) { + cmd |= 0x400; + arg |= (1 << 31); + } + num = bsize*bcnt; + + err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); + if (err != RT_EOK) { + return ERRNORES; + } + + // reset + synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO + while (synopmob_read_register(base+CTRL) & FIFO_RESET); + synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts - err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); - if (err != RT_EOK) { - return ERRNORES; - } - - // reset - synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO - while (synopmob_read_register(base+CTRL) & FIFO_RESET); - synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts - while(tmpDesc != 0) { // make sure size is little than DescBuf1SizMsk if(tmpDesc->desc1 > (DescBuf1SizMsk >> DescBuf1SizeShift)) { - // TBD... fix me + // TBD... fix me rt_sem_release(sdc->mutex); return 0; } // TBD... fix me, we must align tmpDesc->desc2 to 4 ? - + tmpDesc->desc0 = DescOwnByDma | DescSecAddrChained; - + // is it last node? if(tmpDesc->desc3 == 0 || tmpDesc->desc3 == (unsigned int)chain) { - tmpDesc->desc0 |= DescLastDesc; - lastDesc = tmpDesc; + tmpDesc->desc0 |= DescLastDesc; + lastDesc = tmpDesc; } else { - tmpDesc->desc0 |= DescDisInt; //disable interrupt... + tmpDesc->desc0 |= DescDisInt; //disable interrupt... } - + // is it first node? if((char *)tmpDesc == (char *)chain) { - tmpDesc->desc0 |= DescFirstDesc; - } + tmpDesc->desc0 |= DescFirstDesc; + } flush_dcache_range(tmpDesc->desc2, tmpDesc->desc1); - + tmpDesc = (DmaDesc *)tmpDesc->desc3; chain_len += sizeof(buf_chain_t); if((char *)tmpDesc == (char *)chain) { - break; + break; } } lastDesc->desc3 = (unsigned int)chain; - //FIXME, chain must be continuous arrry. - flush_dcache_range((unsigned long)chain, chain_len); + //FIXME, chain must be continuous arrry. + flush_dcache_range((unsigned long)chain, chain_len); - synopmob_set_register(base+DBADDR, (unsigned int)(chain)); - - synopmob_set_register(base+BLKSIZ, bsize); - synopmob_set_register(base+BYTCNT, num); - synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC); - synopmob_set_bits(base + BMOD,BMOD_DE); - - ret = synopmob_execute_command(base, cmd, arg); - if ( !ret ) { - ret = ERRIDMA; - err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS); - if ( !err ) { - while (--loop_for_command_done_check > 0) { - intsts = synopmob_read_register(base+RINTSTS); - if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) { - break; - } - plat_loop(1); - } - ret = synopmob_handle_standard_rinsts(intsts); - if (!ret ) { - if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt - ret = ERRIDMA; - } - } - } - } + synopmob_set_register(base+DBADDR, (unsigned int)(chain)); - if (!ret) { - synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts - synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC); - synopmob_clear_bits(base + BMOD,BMOD_DE); - synopmob_set_register(base+BLKSIZ, 512); - synopmob_set_register(base+BYTCNT, 512); - } - else { - char* op = "read"; - if (rw) - op = "write"; - - SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d, bsize = %d * %d\n", op, ret, bsize, bcnt); - dumpchain((DmaDesc *)chain); - } + synopmob_set_register(base+BLKSIZ, bsize); + synopmob_set_register(base+BYTCNT, num); + synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC); + synopmob_set_bits(base + BMOD,BMOD_DE); - if ( rw && !ret ) { - ret = synopmob_wait_data_ready(base); - } + ret = synopmob_execute_command(base, cmd, arg); + if ( !ret ) { + ret = ERRIDMA; + err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS); + if ( !err ) { + while (--loop_for_command_done_check > 0) { + intsts = synopmob_read_register(base+RINTSTS); + if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) { + break; + } + plat_loop(1); + } + ret = synopmob_handle_standard_rinsts(intsts); + if (!ret ) { + if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt + ret = ERRIDMA; + } + } + } + } - rt_sem_release(sdc->mutex); + if (!ret) { + synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts + synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC); + synopmob_clear_bits(base + BMOD,BMOD_DE); + synopmob_set_register(base+BLKSIZ, 512); + synopmob_set_register(base+BYTCNT, 512); + } + else { + char* op = "read"; + if (rw) + op = "write"; - if (ret) { - ret++; - ret--; - SDIO_PRINTF("sdio_drv_chain_write2, fail:, ret = %d\n", ret); - } + SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d, bsize = %d * %d\n", op, ret, bsize, bcnt); + dumpchain((DmaDesc *)chain); + } - return ret; - //return ret ? 0/*false*/ : 1/*true*/; + if ( rw && !ret ) { + ret = synopmob_wait_data_ready(base); + } + + rt_sem_release(sdc->mutex); + + if (ret) { + ret++; + ret--; + SDIO_PRINTF("sdio_drv_chain_write2, fail:, ret = %d\n", ret); + } + + return ret; + //return ret ? 0/*false*/ : 1/*true*/; } #elif 0 int sdio_drv_chain_write(sdc_t* sdc, unsigned int addr, unsigned int fn, unsigned int bcnt, unsigned int bsize, buf_chain_t *chain) { - //static volatile DmaDesc __attribute__ ((aligned(32))) st_pchain[4]; - volatile DmaDesc *st_pchain = (DmaDesc *)0x9a700000; - - int ret; - unsigned int intsts = 0; - unsigned int cmd = 0x2275; - unsigned int base = sdc->ip_base; - unsigned int arg; - unsigned int num; - unsigned int chain_len = 0; - int loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC; - char err; - unsigned int rw = 1; + //static volatile DmaDesc __attribute__ ((aligned(32))) st_pchain[4]; + volatile DmaDesc *st_pchain = (DmaDesc *)0x9a700000; - buf_chain_t *usrchain; - unsigned int desc0; - unsigned int length = 0; + int ret; + unsigned int intsts = 0; + unsigned int cmd = 0x2275; + unsigned int base = sdc->ip_base; + unsigned int arg; + unsigned int num; + unsigned int chain_len = 0; + int loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC; + char err; + unsigned int rw = 1; - if (!chain) { - return 0; - } + buf_chain_t *usrchain; + unsigned int desc0; + unsigned int length = 0; - arg = (fn << 28) | (addr << 9); - if (bcnt == 1 && bsize <= 512) - arg |= (bsize & 0x1ff); - else - arg |= ((1 << 27) | bcnt); - if ( rw ) { - cmd |= 0x400; - arg |= (1 << 31); - } - num = bsize*bcnt; + if (!chain) { + return 0; + } - OSSemPend(sdc->mutex, 0, &err); - if (err != OS_NO_ERR) { - return ERRNORES; - } - - // reset - synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO - while (synopmob_read_register(base+CTRL) & FIFO_RESET); - synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts + arg = (fn << 28) | (addr << 9); + if (bcnt == 1 && bsize <= 512) + arg |= (bsize & 0x1ff); + else + arg |= ((1 << 27) | bcnt); + if ( rw ) { + cmd |= 0x400; + arg |= (1 << 31); + } + num = bsize*bcnt; - usrchain = chain; - while (1) { - if(usrchain->size > (DescBuf1SizMsk >> DescBuf1SizeShift)) { - // TBD... fix me - OSSemPost (sdc->mutex); - return 0; - } - length += usrchain->size; - desc0 = DescOwnByDma | DescSecAddrChained; - if (!usrchain->next || usrchain->next == chain) { - desc0 |= DescLastDesc; - } - else { - desc0 |= DescDisInt; //disable interrupt... - } + OSSemPend(sdc->mutex, 0, &err); + if (err != OS_NO_ERR) { + return ERRNORES; + } - if(usrchain == chain) { - desc0 |= DescFirstDesc; - } + // reset + synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO + while (synopmob_read_register(base+CTRL) & FIFO_RESET); + synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts - st_pchain[chain_len].desc0 = desc0; - st_pchain[chain_len].desc1 = (unsigned int)usrchain->size; - st_pchain[chain_len].desc2 = (unsigned int)usrchain->buf; - st_pchain[chain_len].desc3 = (unsigned int)(&st_pchain[chain_len+1]); - flush_dcache_range((unsigned int)usrchain->buf, usrchain->size); - - usrchain = usrchain->next; - if( !usrchain || usrchain == chain) { - break; - } - if (++chain_len >= 4) { - while(1) SDIO_PRINTF("sdio_drv_chain_write:long chain!\n"); - } - } - st_pchain[chain_len].desc3 = (unsigned int)(&st_pchain[0]); + usrchain = chain; + while (1) { + if(usrchain->size > (DescBuf1SizMsk >> DescBuf1SizeShift)) { + // TBD... fix me + OSSemPost (sdc->mutex); + return 0; + } + length += usrchain->size; + desc0 = DescOwnByDma | DescSecAddrChained; + if (!usrchain->next || usrchain->next == chain) { + desc0 |= DescLastDesc; + } + else { + desc0 |= DescDisInt; //disable interrupt... + } - if (length != num) { - while (1) SDIO_PRINTF("sdio_drv_chain_write:too long packet!\n"); - } + if(usrchain == chain) { + desc0 |= DescFirstDesc; + } - synopmob_set_register(base+DBADDR, (unsigned int)(st_pchain)); - - synopmob_set_register(base+BLKSIZ, bsize); - synopmob_set_register(base+BYTCNT, num); - synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC); - synopmob_set_bits(base + BMOD,BMOD_DE); - - ret = synopmob_execute_command(base, cmd, arg); - if ( !ret ) { - ret = ERRIDMA; - OSSemPend(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS, &err); - if ( !err ) { - while (--loop_for_command_done_check > 0) { - intsts = synopmob_read_register(base+RINTSTS); - if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) { - break; - } - plat_loop(1); - } - ret = synopmob_handle_standard_rinsts(intsts); - if (!ret ) { - if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt - ret = ERRIDMA; - } - } - } - } + st_pchain[chain_len].desc0 = desc0; + st_pchain[chain_len].desc1 = (unsigned int)usrchain->size; + st_pchain[chain_len].desc2 = (unsigned int)usrchain->buf; + st_pchain[chain_len].desc3 = (unsigned int)(&st_pchain[chain_len+1]); + flush_dcache_range((unsigned int)usrchain->buf, usrchain->size); - if (!ret) { - synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts - synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC); - synopmob_clear_bits(base + BMOD,BMOD_DE); - synopmob_set_register(base+BLKSIZ, 512); - synopmob_set_register(base+BYTCNT, 512); - } - else { - char* op = "read"; - if (rw) - op = "write"; - - SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d\n", op, ret); - } + usrchain = usrchain->next; + if( !usrchain || usrchain == chain) { + break; + } + if (++chain_len >= 4) { + while(1) SDIO_PRINTF("sdio_drv_chain_write:long chain!\n"); + } + } + st_pchain[chain_len].desc3 = (unsigned int)(&st_pchain[0]); - if ( rw && !ret ) { - ret = synopmob_wait_data_ready(base); - } + if (length != num) { + while (1) SDIO_PRINTF("sdio_drv_chain_write:too long packet!\n"); + } - OSSemPost (sdc->mutex); + synopmob_set_register(base+DBADDR, (unsigned int)(st_pchain)); - return ret; - //return ret ? 0/*false*/ : 1/*true*/; + synopmob_set_register(base+BLKSIZ, bsize); + synopmob_set_register(base+BYTCNT, num); + synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC); + synopmob_set_bits(base + BMOD,BMOD_DE); + + ret = synopmob_execute_command(base, cmd, arg); + if ( !ret ) { + ret = ERRIDMA; + OSSemPend(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS, &err); + if ( !err ) { + while (--loop_for_command_done_check > 0) { + intsts = synopmob_read_register(base+RINTSTS); + if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) { + break; + } + plat_loop(1); + } + ret = synopmob_handle_standard_rinsts(intsts); + if (!ret ) { + if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt + ret = ERRIDMA; + } + } + } + } + + if (!ret) { + synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts + synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC); + synopmob_clear_bits(base + BMOD,BMOD_DE); + synopmob_set_register(base+BLKSIZ, 512); + synopmob_set_register(base+BYTCNT, 512); + } + else { + char* op = "read"; + if (rw) + op = "write"; + + SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d\n", op, ret); + } + + if ( rw && !ret ) { + ret = synopmob_wait_data_ready(base); + } + + OSSemPost (sdc->mutex); + + return ret; + //return ret ? 0/*false*/ : 1/*true*/; } #else static unsigned char __attribute__ ((aligned(32))) st_net_buf[2*1024]; int sdio_drv_chain_write(sdc_t* sdc, unsigned int addr, unsigned int fn, unsigned int bcnt, unsigned int bsize, buf_chain_t *chain) { - static volatile DmaDesc __attribute__ ((aligned(32))) st_pchain; - - int ret; - unsigned int intsts = 0; - unsigned int cmd = 0x2275; - unsigned int base = sdc->ip_base; - unsigned int arg; - unsigned int num; - int loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC; - rt_err_t err; - unsigned int rw = 1; + static volatile DmaDesc __attribute__ ((aligned(32))) st_pchain; - buf_chain_t *usrchain; - unsigned int length = 0; + int ret; + unsigned int intsts = 0; + unsigned int cmd = 0x2275; + unsigned int base = sdc->ip_base; + unsigned int arg; + unsigned int num; + int loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC; + rt_err_t err; + unsigned int rw = 1; - if (!chain) { - return 0; - } + buf_chain_t *usrchain; + unsigned int length = 0; - arg = (fn << 28) | (addr << 9); - if (bcnt == 1 && bsize <= 512) - arg |= (bsize & 0x1ff); - else - arg |= ((1 << 27) | bcnt); - if ( rw ) { - cmd |= 0x400; - arg |= (1 << 31); - } - num = bsize*bcnt; + if (!chain) { + return 0; + } - err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); - if (err != RT_EOK) { - return ERRNORES; - } - - - // reset - synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO - while (synopmob_read_register(base+CTRL) & FIFO_RESET); - synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts + arg = (fn << 28) | (addr << 9); + if (bcnt == 1 && bsize <= 512) + arg |= (bsize & 0x1ff); + else + arg |= ((1 << 27) | bcnt); + if ( rw ) { + cmd |= 0x400; + arg |= (1 << 31); + } + num = bsize*bcnt; - usrchain = chain; - while (1) { - if (length + usrchain->size >= sizeof(st_net_buf)) { - while(1) SDIO_PRINTF("too long net pkt\n"); - } - - memcpy(st_net_buf + length, usrchain->buf, usrchain->size); - length += usrchain->size; - usrchain = usrchain->next; - if (!usrchain || usrchain->next == chain) { - break; - } - } - - st_pchain.desc0 = DescOwnByDma | DescSecAddrChained | DescLastDesc | DescFirstDesc; - st_pchain.desc1 = length; - st_pchain.desc2 = (unsigned int)st_net_buf; - st_pchain.desc3 = (unsigned int)&st_pchain; - flush_dcache_range((unsigned long)st_net_buf, length); - - if (length != num) { - while (1) SDIO_PRINTF("sdio_drv_chain_write:too long packet!\n"); - } + err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER); + if (err != RT_EOK) { + return ERRNORES; + } - synopmob_set_register(base+DBADDR, (unsigned int)(&st_pchain)); - - synopmob_set_register(base+BLKSIZ, bsize); - synopmob_set_register(base+BYTCNT, num); - synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC); - synopmob_set_bits(base + BMOD,BMOD_DE); - - ret = synopmob_execute_command(base, cmd, arg); - if ( !ret ) { - ret = ERRIDMA; - err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS); - if ( !err ) { - while (--loop_for_command_done_check > 0) { - intsts = synopmob_read_register(base+RINTSTS); - if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) { - break; - } - plat_loop(1); - } - ret = synopmob_handle_standard_rinsts(intsts); - if (!ret ) { - if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt - ret = ERRIDMA; - } - } - } - } - if (!ret) { - synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts - synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC); - synopmob_clear_bits(base + BMOD,BMOD_DE); - synopmob_set_register(base+BLKSIZ, 512); - synopmob_set_register(base+BYTCNT, 512); - } - else { - char* op = "read"; - if (rw) - op = "write"; - - SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d\n", op, ret); - } + // reset + synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO + while (synopmob_read_register(base+CTRL) & FIFO_RESET); + synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts - if ( rw && !ret ) { - ret = synopmob_wait_data_ready(base); - } + usrchain = chain; + while (1) { + if (length + usrchain->size >= sizeof(st_net_buf)) { + while(1) SDIO_PRINTF("too long net pkt\n"); + } - rt_sem_release(sdc->mutex); + memcpy(st_net_buf + length, usrchain->buf, usrchain->size); + length += usrchain->size; + usrchain = usrchain->next; + if (!usrchain || usrchain->next == chain) { + break; + } + } - return ret; - //return ret ? 0/*false*/ : 1/*true*/; + st_pchain.desc0 = DescOwnByDma | DescSecAddrChained | DescLastDesc | DescFirstDesc; + st_pchain.desc1 = length; + st_pchain.desc2 = (unsigned int)st_net_buf; + st_pchain.desc3 = (unsigned int)&st_pchain; + flush_dcache_range((unsigned long)st_net_buf, length); + + if (length != num) { + while (1) SDIO_PRINTF("sdio_drv_chain_write:too long packet!\n"); + } + + synopmob_set_register(base+DBADDR, (unsigned int)(&st_pchain)); + + synopmob_set_register(base+BLKSIZ, bsize); + synopmob_set_register(base+BYTCNT, num); + synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC); + synopmob_set_bits(base + BMOD,BMOD_DE); + + ret = synopmob_execute_command(base, cmd, arg); + if ( !ret ) { + ret = ERRIDMA; + err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS); + if ( !err ) { + while (--loop_for_command_done_check > 0) { + intsts = synopmob_read_register(base+RINTSTS); + if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) { + break; + } + plat_loop(1); + } + ret = synopmob_handle_standard_rinsts(intsts); + if (!ret ) { + if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt + ret = ERRIDMA; + } + } + } + } + + if (!ret) { + synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts + synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC); + synopmob_clear_bits(base + BMOD,BMOD_DE); + synopmob_set_register(base+BLKSIZ, 512); + synopmob_set_register(base+BYTCNT, 512); + } + else { + char* op = "read"; + if (rw) + op = "write"; + + SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d\n", op, ret); + } + + if ( rw && !ret ) { + ret = synopmob_wait_data_ready(base); + } + + rt_sem_release(sdc->mutex); + + return ret; + //return ret ? 0/*false*/ : 1/*true*/; } #endif #endif static int sdio_card_reset(sdc_t* sdc) { - unsigned int resp; - int ret; + unsigned int resp; + int ret; - /* Soft Reset card */ + /* Soft Reset card */ sdio_drv_creg_write(sdc, 0x6, 0, 0x8, &resp); - return 0; + return 0; } static int enum_sdio_card(sdc_t* sdc) { - int ret; - unsigned int resp; - unsigned int base = sdc->ip_base; + int ret; + unsigned int resp; + unsigned int base = sdc->ip_base; - #if 0 - synopmob_set_bits(0x98500004, (1<<24)); //set to output mode - synopmob_set_bits(0x98500000, (1<<24)); //power off - plat_loop(1000000/5); //Lets give some ramp down period - synopmob_clear_bits(0x98500000, (1<<24)); //power on - plat_loop(1000000/5);//Lets give some ramp down period - #endif + #if 0 + synopmob_set_bits(0x98500004, (1<<24)); //set to output mode + synopmob_set_bits(0x98500000, (1<<24)); //power off + plat_loop(1000000/5); //Lets give some ramp down period + synopmob_clear_bits(0x98500000, (1<<24)); //power on + plat_loop(1000000/5);//Lets give some ramp down period + #endif - synopmob_set_register(base+CTYPE, ONE_BIT_MODE); + synopmob_set_register(base+CTYPE, ONE_BIT_MODE); - synopmob_set_register(base+CLKENA, 0x00000001); /*enable clock, non-low-power mode*/ - ret = synopmob_set_clk_freq(sdc, MMC_FOD_DIVIDER_VALUE); - - if ( !ret ) { - plat_loop(100); //enough for 74 clock. - #if 0 - sdio_card_reset(sdc); - plat_loop(100000); - #endif - ret = sd_send_cmd5(sdc, 0, &resp); - if (!ret) { - resp &= 0x00ffffff; - ret = sd_send_cmd5(sdc, resp, &resp); - } - } + synopmob_set_register(base+CLKENA, 0x00000001); /*enable clock, non-low-power mode*/ + ret = synopmob_set_clk_freq(sdc, MMC_FOD_DIVIDER_VALUE); - if (!ret) { - ret = sd_send_cmd3(sdc); //get RCA - } - - if (!ret) { - ret = sd_send_cmd7(sdc); //select the card - } + if ( !ret ) { + plat_loop(100); //enough for 74 clock. + #if 0 + sdio_card_reset(sdc); + plat_loop(100000); + #endif + ret = sd_send_cmd5(sdc, 0, &resp); + if (!ret) { + resp &= 0x00ffffff; + ret = sd_send_cmd5(sdc, resp, &resp); + } + } + + if (!ret) { + ret = sd_send_cmd3(sdc); //get RCA + } + + if (!ret) { + ret = sd_send_cmd7(sdc); //select the card + } - if (!g_use_bcm43362) - { - sdio_drv_creg_read(sdc, 0x13, 0, &resp); - if ((resp & 1) && (sdc->wkmod & (SDC_WKMOD_4WIRE|SDC_WKMOD_25M_STAND_SPEED|SDC_WKMOD_50M_HI_SPEED))){ //high speed support? - if (sdc->wkmod & SDC_WKMOD_4WIRE) { - sdio_drv_creg_read(sdc, 0x7, 0, &resp); - resp &= 0xfc; - resp |= (1 << 1); - sdio_drv_creg_write(sdc, 0x7, 0, resp, &resp); //switch to 4bit mode - sdio_drv_creg_read(sdc, 0x7, 0, &resp); - if ((resp & 0x3) != 0x2) { - return ERRCARDINTERNAL; // 4bit mode failed - } - synopmob_set_register(base+CTYPE, FOUR_BIT_MODE); - } - if (sdc->wkmod & (SDC_WKMOD_25M_STAND_SPEED|SDC_WKMOD_50M_HI_SPEED)) { - ret = synopmob_set_clk_freq(sdc, ONE_BIT_BUS_FREQ); - //ret = synopmob_set_clk_freq(sdc, 0); - } - } + if (!g_use_bcm43362) + { + sdio_drv_creg_read(sdc, 0x13, 0, &resp); + if ((resp & 1) && (sdc->wkmod & (SDC_WKMOD_4WIRE|SDC_WKMOD_25M_STAND_SPEED|SDC_WKMOD_50M_HI_SPEED))){ //high speed support? + if (sdc->wkmod & SDC_WKMOD_4WIRE) { + sdio_drv_creg_read(sdc, 0x7, 0, &resp); + resp &= 0xfc; + resp |= (1 << 1); + sdio_drv_creg_write(sdc, 0x7, 0, resp, &resp); //switch to 4bit mode + sdio_drv_creg_read(sdc, 0x7, 0, &resp); + if ((resp & 0x3) != 0x2) { + return ERRCARDINTERNAL; // 4bit mode failed + } + synopmob_set_register(base+CTYPE, FOUR_BIT_MODE); + } + if (sdc->wkmod & (SDC_WKMOD_25M_STAND_SPEED|SDC_WKMOD_50M_HI_SPEED)) { + ret = synopmob_set_clk_freq(sdc, ONE_BIT_BUS_FREQ); + //ret = synopmob_set_clk_freq(sdc, 0); + } + } - sdio_drv_creg_read(sdc, 0x3, 0, &resp); - if (!ret) { - sdio_drv_creg_read(sdc, 0x0, 0, &resp); //card version - sdio_drv_creg_write(sdc, 0x4, 0, 0x3, &resp); //enable interrupts in card - sdio_drv_creg_write(sdc, 0x2, 0, 0x2, &resp); //Eable IO in card - do { - sdio_drv_creg_read(sdc, 0x3, 0, &resp); - } while (!(resp & 2)); - } - } //g_use_bcm43362 + sdio_drv_creg_read(sdc, 0x3, 0, &resp); + if (!ret) { + sdio_drv_creg_read(sdc, 0x0, 0, &resp); //card version + sdio_drv_creg_write(sdc, 0x4, 0, 0x3, &resp); //enable interrupts in card + sdio_drv_creg_write(sdc, 0x2, 0, 0x2, &resp); //Eable IO in card + do { + sdio_drv_creg_read(sdc, 0x3, 0, &resp); + } while (!(resp & 2)); + } + } //g_use_bcm43362 - sdc->card_type = SDIO_TYPE; + sdc->card_type = SDIO_TYPE; - synopmob_set_bits(base+CTRL, INT_ENABLE); - - return ret; + synopmob_set_bits(base+CTRL, INT_ENABLE); + + return ret; } int sdio_high_speed_mode(HSDC handle, int bitwidth, int freq) { - int ret; - sdc_t* sdc = (sdc_t*)handle; + int ret; + sdc_t* sdc = (sdc_t*)handle; - if (bitwidth == 4) - { - synopmob_set_register(sdc->ip_base+CTYPE, FOUR_BIT_MODE); - } + if (bitwidth == 4) + { + synopmob_set_register(sdc->ip_base+CTYPE, FOUR_BIT_MODE); + } - ret = synopmob_set_clk_freq(sdc, /*ONE_BIT_BUS_FREQ*/1); - if (ret != 0) - { - SDIO_PRINTF("sdio_high_speed_mode fail:, ret = %d\n", ret); - } + ret = synopmob_set_clk_freq(sdc, /*ONE_BIT_BUS_FREQ*/1); + if (ret != 0) + { + SDIO_PRINTF("sdio_high_speed_mode fail:, ret = %d\n", ret); + } - return ret; + return ret; } static int common_init(unsigned int which, unsigned int sdio, unsigned int wkmod, unsigned int* dma_desc, HSDC* phandle) { - int ret = ERRNORES; - sdc_t* sdc; - unsigned int base; - unsigned int temp; - unsigned int fifo_thresh; - volatile DmaDesc *pDmaDesc; - rt_sem_t sem; - rt_sem_t mutex; - - base = SDC0_REG_BASE; - temp = PMU_SDC0_RST_BIT; - if (which > 0) { - base = SDC1_REG_BASE; - temp = PMU_SDC1_RST_BIT; - } - + int ret = ERRNORES; + sdc_t* sdc; + unsigned int base; + unsigned int temp; + unsigned int fifo_thresh; + volatile DmaDesc *pDmaDesc; + rt_sem_t sem; + rt_sem_t mutex; + + base = SDC0_REG_BASE; + temp = PMU_SDC0_RST_BIT; + if (which > 0) { + base = SDC1_REG_BASE; + temp = PMU_SDC1_RST_BIT; + } + #if 0 - //PMU_RST_MODULE(temp); plat_loop(1); - temp = synopmob_read_register(PMU_REG_CLK_DIV3); - temp &= (~(0x0f<<8)); - temp |= (0xf<<8); - synopmob_set_register(PMU_REG_CLK_DIV3, temp); + //PMU_RST_MODULE(temp); plat_loop(1); + temp = synopmob_read_register(PMU_REG_CLK_DIV3); + temp &= (~(0x0f<<8)); + temp |= (0xf<<8); + synopmob_set_register(PMU_REG_CLK_DIV3, temp); #endif - *phandle = (HSDC)0; - - sdc = &sdc_array[which]; - sem = sdc->sem; - mutex = sdc->mutex; - memset((void *)sdc, 0, sizeof(*sdc)); - sdc->wkmod = wkmod; - sdc->idma_support = 0; - sdc->ip_base = base; - sdc->rca = 0; - sdc->card_type = NONE_TYPE; - if (!sem) { - sem = rt_sem_create("fh_sdio_sem", 0, RT_IPC_FLAG_PRIO);//OSSemCreate (0); - if ( !sem ) { - return ret; - } - } - sdc->sem = sem; + *phandle = (HSDC)0; - if (!mutex) { - mutex = rt_sem_create("fh_sdio_mutex", 1, RT_IPC_FLAG_PRIO);//OSSemCreate (1); - if ( !mutex ) { - return ret; - } - } - sdc->mutex = mutex; - - synopmob_set_bits(base + CTRL, CTRL_RESET); //reset host controller - plat_loop(100); + sdc = &sdc_array[which]; + sem = sdc->sem; + mutex = sdc->mutex; + memset((void *)sdc, 0, sizeof(*sdc)); + sdc->wkmod = wkmod; + sdc->idma_support = 0; + sdc->ip_base = base; + sdc->rca = 0; + sdc->card_type = NONE_TYPE; + if (!sem) { + sem = rt_sem_create("fh_sdio_sem", 0, RT_IPC_FLAG_PRIO);//OSSemCreate (0); + if ( !sem ) { + return ret; + } + } + sdc->sem = sem; - synopmob_clear_bits(base + CTRL,CTRL_USE_IDMAC); - sdc->idma_support = 1; //fixed to support IDMA + if (!mutex) { + mutex = rt_sem_create("fh_sdio_mutex", 1, RT_IPC_FLAG_PRIO);//OSSemCreate (1); + if ( !mutex ) { + return ret; + } + } + sdc->mutex = mutex; - pDmaDesc = (volatile DmaDesc *)dma_desc; - sdc->pDmaDesc = pDmaDesc; - if (sdc->idma_support) { - synopmob_set_bits(base + CTRL, DMA_RESET); - plat_loop(100); - synopmob_set_bits(base + CTRL, FIFO_RESET); - plat_loop(100); - synopmob_set_bits(base + BMOD, BMOD_SWR); - plat_loop(100); - - //synopmob_set_bits(base + BMOD,BMOD_DE); - pDmaDesc->desc0 = DescSecAddrChained; - pDmaDesc->desc1 = 0; - pDmaDesc->desc2 = 0; - pDmaDesc->desc3 = (unsigned int)(pDmaDesc); - synopmob_set_register(base + DBADDR, (unsigned int)(pDmaDesc)); - } + synopmob_set_bits(base + CTRL, CTRL_RESET); //reset host controller + plat_loop(100); - synopmob_set_register(base+CTYPE, ONE_BIT_MODE); + synopmob_clear_bits(base + CTRL,CTRL_USE_IDMAC); + sdc->idma_support = 1; //fixed to support IDMA - synopmob_set_register(base+RINTSTS, 0xffffffff);//clear interrupt. - synopmob_clear_bits(base+CTRL, INT_ENABLE); - synopmob_set_register(base+INTMSK, 0); // mask all INTR - synopmob_set_register(base+IDINTEN, IDMAINTBITS); //Enable DMA INTR + pDmaDesc = (volatile DmaDesc *)dma_desc; + sdc->pDmaDesc = pDmaDesc; + if (sdc->idma_support) { + synopmob_set_bits(base + CTRL, DMA_RESET); + plat_loop(100); + synopmob_set_bits(base + CTRL, FIFO_RESET); + plat_loop(100); + synopmob_set_bits(base + BMOD, BMOD_SWR); + plat_loop(100); + + //synopmob_set_bits(base + BMOD,BMOD_DE); + pDmaDesc->desc0 = DescSecAddrChained; + pDmaDesc->desc1 = 0; + pDmaDesc->desc2 = 0; + pDmaDesc->desc3 = (unsigned int)(pDmaDesc); + synopmob_set_register(base + DBADDR, (unsigned int)(pDmaDesc)); + } + + synopmob_set_register(base+CTYPE, ONE_BIT_MODE); + + synopmob_set_register(base+RINTSTS, 0xffffffff);//clear interrupt. + synopmob_clear_bits(base+CTRL, INT_ENABLE); + synopmob_set_register(base+INTMSK, 0); // mask all INTR + synopmob_set_register(base+IDINTEN, IDMAINTBITS); //Enable DMA INTR - synopmob_set_register(base+TMOUT, 0xffffffff); /* Set Data and Response timeout to Maximum Value*/ + synopmob_set_register(base+TMOUT, 0xffffffff); /* Set Data and Response timeout to Maximum Value*/ - /* Set the card Debounce to allow the CDETECT fluctuations to settle down*/ - synopmob_set_register(base+DEBNCE, 0x0FFFFF); + /* Set the card Debounce to allow the CDETECT fluctuations to settle down*/ + synopmob_set_register(base+DEBNCE, 0x0FFFFF); - fifo_thresh = synopmob_read_register(base+FIFOTH); - //fifo_thresh = GET_FIFO_DEPTH(fifo_thresh) / 2; - fifo_thresh = (GET_FIFO_DEPTH(fifo_thresh) + 1) / 2; - sdc->fifo_depth = fifo_thresh * 2; - sdc->fifo_threth = fifo_thresh; - /* Tx Watermark */ - synopmob_clear_bits(base+FIFOTH, 0xfff); - synopmob_set_bits(base+FIFOTH, fifo_thresh); - /* Rx Watermark */ - synopmob_clear_bits(base+FIFOTH, 0x0fff0000); - synopmob_set_bits(base+FIFOTH, (fifo_thresh-1) << 16); - //synopmob_set_bits(base+FIFOTH, 2<< 28); + fifo_thresh = synopmob_read_register(base+FIFOTH); + //fifo_thresh = GET_FIFO_DEPTH(fifo_thresh) / 2; + fifo_thresh = (GET_FIFO_DEPTH(fifo_thresh) + 1) / 2; + sdc->fifo_depth = fifo_thresh * 2; + sdc->fifo_threth = fifo_thresh; + /* Tx Watermark */ + synopmob_clear_bits(base+FIFOTH, 0xfff); + synopmob_set_bits(base+FIFOTH, fifo_thresh); + /* Rx Watermark */ + synopmob_clear_bits(base+FIFOTH, 0x0fff0000); + synopmob_set_bits(base+FIFOTH, (fifo_thresh-1) << 16); + //synopmob_set_bits(base+FIFOTH, 2<< 28); - if (!sdio) { - ret = enum_sd_card(sdc); - } - else { - ret = enum_sdio_card(sdc); - } + if (!sdio) { + ret = enum_sd_card(sdc); + } + else { + ret = enum_sdio_card(sdc); + } - if (!ret) { - *phandle = (HSDC)sdc; - } + if (!ret) { + *phandle = (HSDC)sdc; + } - return ret; + return ret; } int sdc_is_connected(unsigned int which) { - unsigned int base = SDC0_REG_BASE; - - if (which > 0) - base = SDC1_REG_BASE; + unsigned int base = SDC0_REG_BASE; - return !(synopmob_read_register(base+CDETECT) & 1); + if (which > 0) + base = SDC1_REG_BASE; + + return !(synopmob_read_register(base+CDETECT) & 1); } int sdc_init(unsigned int which, unsigned int wkmod, unsigned int* dma_desc, HSDC* phandle) { - return common_init(which, 0, wkmod, dma_desc, phandle); + return common_init(which, 0, wkmod, dma_desc, phandle); } int sdio_init(unsigned int which, unsigned int wkmod, unsigned int* dma_desc, HSDC* phandle) { - return common_init(which, 1, wkmod, dma_desc, phandle); + return common_init(which, 1, wkmod, dma_desc, phandle); } int sdio_enable_card_int(HSDC handle, int enable) { - unsigned int base = ((sdc_t*)handle)->ip_base; + unsigned int base = ((sdc_t*)handle)->ip_base; - if (enable) { - //synopmob_set_register(base+INTMSK, INTMSK_SDIO); - synopmob_set_register(base+INTMSK, (synopmob_read_register(base+INTMSK) | INTMSK_SDIO )); - } - else { - //synopmob_set_register(base+INTMSK, 0); - synopmob_set_register(base+INTMSK, (synopmob_read_register(base+INTMSK) & ~INTMSK_SDIO )); - } + if (enable) { + //synopmob_set_register(base+INTMSK, INTMSK_SDIO); + synopmob_set_register(base+INTMSK, (synopmob_read_register(base+INTMSK) | INTMSK_SDIO )); + } + else { + //synopmob_set_register(base+INTMSK, 0); + synopmob_set_register(base+INTMSK, (synopmob_read_register(base+INTMSK) & ~INTMSK_SDIO )); + } - return 0; + return 0; } int sdio_set_card_int_cb(HSDC handle, void (*cb)(void)) { - ((sdc_t*)handle)->cb = cb; + ((sdc_t*)handle)->cb = cb; - return 0; + return 0; } static void OSSDCISR(sdc_t* sdc) { - unsigned int sts; - unsigned int base; + unsigned int sts; + unsigned int base; - base = sdc->ip_base; - sts = synopmob_read_register(base+IDSTS); - if ( sts ) { - synopmob_set_register(base+IDSTS, sts); - sdc->idsts = sts; - rt_sem_release(sdc->sem); - } + base = sdc->ip_base; + sts = synopmob_read_register(base+IDSTS); + if ( sts ) { + synopmob_set_register(base+IDSTS, sts); + sdc->idsts = sts; + rt_sem_release(sdc->sem); + } - //sts = synopmob_read_register(base+RINTSTS); - sts = synopmob_read_register(base+MINTSTS); - sts &= INTMSK_SDIO; - if ( sts ) { //interrupt from WIFI card. - //synopmob_set_register(base+INTMSK, 0); //mask all the interrupt - synopmob_set_register(base+INTMSK, synopmob_read_register(base+INTMSK) & ~INTMSK_SDIO ); //mask sdio interrupt - synopmob_set_register(base+RINTSTS, sts); - synopmob_set_register(base+MINTSTS, sts); - if (sdc->cb) { - sdc->cb(); - } - } + //sts = synopmob_read_register(base+RINTSTS); + sts = synopmob_read_register(base+MINTSTS); + sts &= INTMSK_SDIO; + if ( sts ) { //interrupt from WIFI card. + //synopmob_set_register(base+INTMSK, 0); //mask all the interrupt + synopmob_set_register(base+INTMSK, synopmob_read_register(base+INTMSK) & ~INTMSK_SDIO ); //mask sdio interrupt + synopmob_set_register(base+RINTSTS, sts); + synopmob_set_register(base+MINTSTS, sts); + if (sdc->cb) { + sdc->cb(); + } + } } void OSSDCINTR_0(int vector, void *param) { - OSSDCISR(&sdc_array[0]); + OSSDCISR(&sdc_array[0]); } void OSSDCINTR_1(int vector, void *param) { - OSSDCISR(&sdc_array[1]); + OSSDCISR(&sdc_array[1]); } void fh_sdio0_init(void) { int sd0_irq = SDC0_IRQn; - + rt_hw_interrupt_install(sd0_irq, OSSDCINTR_0, NULL, NULL); rt_hw_interrupt_umask(sd0_irq); } @@ -2058,7 +2058,7 @@ void fh_sdio0_init(void) void fh_sdio1_init(void) { int sd1_irq = SDC1_IRQn; - + rt_hw_interrupt_install(sd1_irq, OSSDCINTR_1, NULL, NULL); rt_hw_interrupt_umask(sd1_irq); } @@ -2071,14 +2071,14 @@ void fh_sdio_init(void) int sdc_deinit(HSDC handle) { - return -1; // TBD... fix me + return -1; // TBD... fix me } int sdc_set_clk_divider(unsigned int divider) { if(divider > 255) return -1; - + sdc_clk_divider = divider; return 0; } diff --git a/bsp/fh8620/libraries/driverlib/fh_spi.c b/bsp/fh8620/libraries/driverlib/fh_spi.c index 14d8039732..14e47ad73b 100644 --- a/bsp/fh8620/libraries/driverlib/fh_spi.c +++ b/bsp/fh8620/libraries/driverlib/fh_spi.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes diff --git a/bsp/fh8620/libraries/driverlib/fh_timer.c b/bsp/fh8620/libraries/driverlib/fh_timer.c index f3034adeaa..eab30888a5 100644 --- a/bsp/fh8620/libraries/driverlib/fh_timer.c +++ b/bsp/fh8620/libraries/driverlib/fh_timer.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + /***************************************************************************** * Include Section * add all #include here @@ -79,66 +79,66 @@ *****************************************************************************/ int timer_init(timer *tim) { - tim->TIMER_CTRL_REG = 0; + tim->TIMER_CTRL_REG = 0; } int timer_set_mode(timer *tim, enum timer_mode mode) { - switch (mode) - { - case TIMER_MODE_PERIODIC: - tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE; - break; - case TIMER_MODE_ONESHOT: - tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE; - break; - default: - rt_kprintf("Not support TIMER mode\n"); - return -1; - break; - } + switch (mode) + { + case TIMER_MODE_PERIODIC: + tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE; + break; + case TIMER_MODE_ONESHOT: + tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE; + break; + default: + rt_kprintf("Not support TIMER mode\n"); + return -1; + break; + } - return 0; + return 0; } void timer_set_period(timer *tim, UINT32 period, UINT32 clock) { - tim->TIMER_LOAD_COUNT = clock/period; + tim->TIMER_LOAD_COUNT = clock/period; } void timer_enable(timer *tim) { - tim->TIMER_CTRL_REG |= TIMER_CTRL_ENABLE; + tim->TIMER_CTRL_REG |= TIMER_CTRL_ENABLE; } void timer_disable(timer *tim) { - tim->TIMER_CTRL_REG &= ~TIMER_CTRL_ENABLE; + tim->TIMER_CTRL_REG &= ~TIMER_CTRL_ENABLE; } void timer_enable_irq(timer *tim) { - tim->TIMER_CTRL_REG &= ~TIMER_CTRL_INTMASK; + tim->TIMER_CTRL_REG &= ~TIMER_CTRL_INTMASK; } void timer_disable_irq(timer *tim) { - tim->TIMER_CTRL_REG |= TIMER_CTRL_INTMASK; + tim->TIMER_CTRL_REG |= TIMER_CTRL_INTMASK; } UINT32 timer_get_status(timer *tim) { - return tim->TIMER_INT_STATUS; + return tim->TIMER_INT_STATUS; } UINT32 timer_get_eoi(timer *tim) { - return tim->TIMER_EOI; + return tim->TIMER_EOI; } UINT32 timer_get_value(timer *tim) { - return tim->TIMER_LOAD_COUNT - tim->TIMER_CURRENT_VALUE; + return tim->TIMER_LOAD_COUNT - tim->TIMER_CURRENT_VALUE; } diff --git a/bsp/fh8620/libraries/driverlib/fh_uart.c b/bsp/fh8620/libraries/driverlib/fh_uart.c index 0d9ad1f35d..75b453c9fb 100644 --- a/bsp/fh8620/libraries/driverlib/fh_uart.c +++ b/bsp/fh8620/libraries/driverlib/fh_uart.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + /***************************************************************************** * Include Section * add all #include here @@ -79,33 +79,33 @@ int uart_init(uart *port) { - port->UART_IER = 0; - port->UART_LCR = 0; - //port->UART_DLL = 0; - //port->UART_DLH = 0; + port->UART_IER = 0; + port->UART_LCR = 0; + //port->UART_DLL = 0; + //port->UART_DLH = 0; } UINT32 uart_get_status(uart *port) { - return port->UART_USR; + return port->UART_USR; } void uart_configure(uart *port, enum data_bits data_bit, - enum stop_bits stop_bit, enum parity parity, - UINT32 buard_rate, UINT32 uart_clk) + enum stop_bits stop_bit, enum parity parity, + UINT32 buard_rate, UINT32 uart_clk) { - UINT32 divisor; - UINT32 freq; - UINT32 baud_div; - UINT32 lcr_reg = 0; - UINT32 ret; + UINT32 divisor; + UINT32 freq; + UINT32 baud_div; + UINT32 lcr_reg = 0; + UINT32 ret; - /*divisor = DIV(buard_rate); - port->UART_LCR |= UART_LCR_DLAB; - port->UART_DLL = divisor & 0xFF; - port->UART_DLH = (divisor >> 8) & 0xFF; - port->UART_LCR &= ~UART_LCR_DLAB;*/ + /*divisor = DIV(buard_rate); + port->UART_LCR |= UART_LCR_DLAB; + port->UART_DLL = divisor & 0xFF; + port->UART_DLH = (divisor >> 8) & 0xFF; + port->UART_LCR &= ~UART_LCR_DLAB;*/ do{ //clear fifo... @@ -113,141 +113,141 @@ void uart_configure(uart *port, enum data_bits data_bit, //read status.. ret = uart_get_status(port); }while(ret & UART_USR_BUSY); - switch (data_bit) { - case UART_DATA_BIT5: - lcr_reg |= UART_LCR_DLS5; - break; - case UART_DATA_BIT6: - lcr_reg |= UART_LCR_DLS6; - break; - case UART_DATA_BIT7: - lcr_reg |= UART_LCR_DLS7; - break; - case UART_DATA_BIT8: - lcr_reg |= UART_LCR_DLS8; - break; - default: - lcr_reg |= UART_LCR_DLS8; - break; - } + switch (data_bit) { + case UART_DATA_BIT5: + lcr_reg |= UART_LCR_DLS5; + break; + case UART_DATA_BIT6: + lcr_reg |= UART_LCR_DLS6; + break; + case UART_DATA_BIT7: + lcr_reg |= UART_LCR_DLS7; + break; + case UART_DATA_BIT8: + lcr_reg |= UART_LCR_DLS8; + break; + default: + lcr_reg |= UART_LCR_DLS8; + break; + } - switch (stop_bit) { - case UART_STOP_BIT1: - lcr_reg |= UART_LCR_STOP1; - break; - case UART_STOP_BIT2: - lcr_reg |= UART_LCR_STOP2; - break; - default: - lcr_reg |= UART_LCR_STOP1; - break; - } + switch (stop_bit) { + case UART_STOP_BIT1: + lcr_reg |= UART_LCR_STOP1; + break; + case UART_STOP_BIT2: + lcr_reg |= UART_LCR_STOP2; + break; + default: + lcr_reg |= UART_LCR_STOP1; + break; + } - switch (parity) { - case UART_PARITY_EVEN: - lcr_reg |= UART_LCR_EVEN | UART_LCR_PEN; - break; - case UART_PARITY_ODD: - lcr_reg |= UART_LCR_PEN; - break; - case UART_PARITY_ST: - lcr_reg |= UART_LCR_SP; - break; - case UART_PARITY_NONE: - default: - break; - } + switch (parity) { + case UART_PARITY_EVEN: + lcr_reg |= UART_LCR_EVEN | UART_LCR_PEN; + break; + case UART_PARITY_ODD: + lcr_reg |= UART_LCR_PEN; + break; + case UART_PARITY_ST: + lcr_reg |= UART_LCR_SP; + break; + case UART_PARITY_NONE: + default: + break; + } - switch (buard_rate) { - case 115200: - baud_div = BAUDRATE_115200; - break; - case 57600: - baud_div = BAUDRATE_57600; - break; - case 38400: - baud_div = BAUDRATE_38400; - break; - case 19200: - baud_div = BAUDRATE_19200; - break; - case 9600: - baud_div = BAUDRATE_9600; - break; - default: - baud_div = BAUDRATE_115200; - break; - } + switch (buard_rate) { + case 115200: + baud_div = BAUDRATE_115200; + break; + case 57600: + baud_div = BAUDRATE_57600; + break; + case 38400: + baud_div = BAUDRATE_38400; + break; + case 19200: + baud_div = BAUDRATE_19200; + break; + case 9600: + baud_div = BAUDRATE_9600; + break; + default: + baud_div = BAUDRATE_115200; + break; + } - //clear fifo - port->UART_FCR = UART_FCR_RFIFOR | UART_FCR_XFIFOR; + //clear fifo + port->UART_FCR = UART_FCR_RFIFOR | UART_FCR_XFIFOR; - //div - ret = port->UART_LCR; - ret |= UART_LCR_DLAB; - port->UART_LCR = ret; - port->RBRTHRDLL = baud_div & 0x00ff; - port->DLHIER = (baud_div & 0x00ff)>>8; - /* clear DLAB */ - ret = ret & 0x7f; - port->UART_LCR = ret; + //div + ret = port->UART_LCR; + ret |= UART_LCR_DLAB; + port->UART_LCR = ret; + port->RBRTHRDLL = baud_div & 0x00ff; + port->DLHIER = (baud_div & 0x00ff)>>8; + /* clear DLAB */ + ret = ret & 0x7f; + port->UART_LCR = ret; - //line control - port->UART_LCR = lcr_reg; - //fifo control - port->UART_FCR = UART_FCR_FIFOE | UART_FCR_RFIFOR | UART_FCR_XFIFOR | UART_FCR_TET_1_4 | UART_FCR_RT_ONE; + //line control + port->UART_LCR = lcr_reg; + //fifo control + port->UART_FCR = UART_FCR_FIFOE | UART_FCR_RFIFOR | UART_FCR_XFIFOR | UART_FCR_TET_1_4 | UART_FCR_RT_ONE; } int uart_enable_irq(uart *port, UINT32 mode) { - unsigned int ret; - ret = port->UART_IER; - ret |= mode; - port->UART_IER = ret; + unsigned int ret; + ret = port->UART_IER; + ret |= mode; + port->UART_IER = ret; } int uart_disable_irq(uart *port, UINT32 mode) { - unsigned int ret; - ret = port->UART_IER; - ret &= ~mode; + unsigned int ret; + ret = port->UART_IER; + ret &= ~mode; - port->UART_IER = ret; + port->UART_IER = ret; } UINT32 uart_get_iir_status(uart *port) { - return port->UART_IIR; + return port->UART_IIR; } UINT32 uart_get_line_status(uart *port) { - return port->UART_LSR; + return port->UART_LSR; } UINT32 uart_is_rx_ready(uart *port) { - return port->UART_LSR & UART_LSR_DR; + return port->UART_LSR & UART_LSR_DR; } UINT8 uart_getc(uart *port) { - return port->UART_RBR & 0xFF; + return port->UART_RBR & 0xFF; } void uart_putc(uart *port, UINT8 c) { - //while(!(port->UART_USR & UART_USR_TFNF)); - port->UART_THR = c; + //while(!(port->UART_USR & UART_USR_TFNF)); + port->UART_THR = c; } void uart_set_fifo_mode(uart *port, UINT32 fifo_mode) { - port->UART_FCR = fifo_mode; + port->UART_FCR = fifo_mode; } diff --git a/bsp/fh8620/libraries/driverlib/fh_wdt.c b/bsp/fh8620/libraries/driverlib/fh_wdt.c index 002a929bba..33e3defa1e 100644 --- a/bsp/fh8620/libraries/driverlib/fh_wdt.c +++ b/bsp/fh8620/libraries/driverlib/fh_wdt.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes diff --git a/bsp/fh8620/libraries/inc/fh_driverlib.h b/bsp/fh8620/libraries/inc/fh_driverlib.h index 9bb6b8c75d..9f45eb836f 100644 --- a/bsp/fh8620/libraries/inc/fh_driverlib.h +++ b/bsp/fh8620/libraries/inc/fh_driverlib.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include #include #include "fh_def.h" diff --git a/bsp/fh8620/libraries/inc/fh_gpio.h b/bsp/fh8620/libraries/inc/fh_gpio.h index 62d1823eba..3d98a44be3 100644 --- a/bsp/fh8620/libraries/inc/fh_gpio.h +++ b/bsp/fh8620/libraries/inc/fh_gpio.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef FH_GPIO_H_ #define FH_GPIO_H_ diff --git a/bsp/fh8620/libraries/inc/fh_i2c.h b/bsp/fh8620/libraries/inc/fh_i2c.h index 4debd9926d..069aa8f275 100644 --- a/bsp/fh8620/libraries/inc/fh_i2c.h +++ b/bsp/fh8620/libraries/inc/fh_i2c.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef FH_I2C_H_ #define FH_I2C_H_ diff --git a/bsp/fh8620/libraries/inc/fh_ictl.h b/bsp/fh8620/libraries/inc/fh_ictl.h index 9796c99afc..6959715377 100644 --- a/bsp/fh8620/libraries/inc/fh_ictl.h +++ b/bsp/fh8620/libraries/inc/fh_ictl.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -30,21 +30,21 @@ #include "fh_def.h" typedef struct { - RwReg IRQ_EN_L; - RwReg IRQ_EN_H; - RwReg IRQ_MASK_L; - RwReg IRQ_MASK_H; - RwReg IRQ_FORCE_L; - RwReg IRQ_FORCE_H; - RwReg IRQ_RAWSTARUS_L; - RwReg IRQ_RAWSTARUS_H; - RwReg IRQ_STATUS_L; - RwReg IRQ_STATUS_H; - RwReg IRQ_MASKSTATUS_L; - RwReg IRQ_MASKSTATUS_H; - RwReg IRQ_FINALSTATUS_L; - RwReg IRQ_FINALSTATUS_H; - RwReg IRQ_VECTOR; + RwReg IRQ_EN_L; + RwReg IRQ_EN_H; + RwReg IRQ_MASK_L; + RwReg IRQ_MASK_H; + RwReg IRQ_FORCE_L; + RwReg IRQ_FORCE_H; + RwReg IRQ_RAWSTARUS_L; + RwReg IRQ_RAWSTARUS_H; + RwReg IRQ_STATUS_L; + RwReg IRQ_STATUS_H; + RwReg IRQ_MASKSTATUS_L; + RwReg IRQ_MASKSTATUS_H; + RwReg IRQ_FINALSTATUS_L; + RwReg IRQ_FINALSTATUS_H; + RwReg IRQ_VECTOR; }fh_intc; diff --git a/bsp/fh8620/libraries/inc/fh_mmc.h b/bsp/fh8620/libraries/inc/fh_mmc.h index 4aaf416ce6..d999ecf7dd 100644 --- a/bsp/fh8620/libraries/inc/fh_mmc.h +++ b/bsp/fh8620/libraries/inc/fh_mmc.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes diff --git a/bsp/fh8620/libraries/inc/fh_pwm.h b/bsp/fh8620/libraries/inc/fh_pwm.h index 011da43905..6281a5f128 100644 --- a/bsp/fh8620/libraries/inc/fh_pwm.h +++ b/bsp/fh8620/libraries/inc/fh_pwm.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes diff --git a/bsp/fh8620/libraries/inc/fh_sdio.h b/bsp/fh8620/libraries/inc/fh_sdio.h index b268dbd322..f4791605e1 100644 --- a/bsp/fh8620/libraries/inc/fh_sdio.h +++ b/bsp/fh8620/libraries/inc/fh_sdio.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -32,53 +32,53 @@ //#define __ASIC_BRANCH__ enum { - CTRL = 0x0, /** Control */ - PWREN = 0x4, /** Power-enable */ - CLKDIV = 0x8, /** Clock divider */ - CLKSRC = 0xC, /** Clock source */ - CLKENA = 0x10, /** Clock enable */ - TMOUT = 0x14, /** Timeout */ - CTYPE = 0x18, /** Card type */ - BLKSIZ = 0x1C, /** Block Size */ - BYTCNT = 0x20, /** Byte count */ - INTMSK = 0x24, /** Interrupt Mask */ - CMDARG = 0x28, /** Command Argument */ - CMD = 0x2C, /** Command */ - RESP0 = 0x30, /** Response 0 */ - RESP1 = 0x34, /** Response 1 */ - RESP2 = 0x38, /** Response 2 */ - RESP3 = 0x3C, /** Response 3 */ - MINTSTS = 0x40, /** Masked interrupt status */ - RINTSTS = 0x44, /** Raw interrupt status */ - STATUS = 0x48, /** Status */ - FIFOTH = 0x4C, /** FIFO threshold */ - CDETECT = 0x50, /** Card detect */ - WRTPRT = 0x54, /** Write protect */ - GPIO = 0x58, /** General Purpose IO */ - TCBCNT = 0x5C, /** Transferred CIU byte count */ - TBBCNT = 0x60, /** Transferred host/DMA to/from byte count */ - DEBNCE = 0x64, /** Card detect debounce */ - USRID = 0x68, /** User ID */ - VERID = 0x6C, /** Version ID */ - HCON = 0x70, /** Hardware Configuration */ - UHSREG = 0x74, /** Reserved */ - BMOD = 0x80, /** Bus mode Register */ - PLDMND = 0x84, /** Poll Demand */ - DBADDR = 0x88, /** Descriptor Base Address */ - IDSTS = 0x8C, /** Internal DMAC Status */ - IDINTEN = 0x90, /** Internal DMAC Interrupt Enable */ - DSCADDR = 0x94, /** Current Host Descriptor Address */ - BUFADDR = 0x98, /** Current Host Buffer Address */ - FIFODAT = 0x200, /** FIFO data read write */ + CTRL = 0x0, /** Control */ + PWREN = 0x4, /** Power-enable */ + CLKDIV = 0x8, /** Clock divider */ + CLKSRC = 0xC, /** Clock source */ + CLKENA = 0x10, /** Clock enable */ + TMOUT = 0x14, /** Timeout */ + CTYPE = 0x18, /** Card type */ + BLKSIZ = 0x1C, /** Block Size */ + BYTCNT = 0x20, /** Byte count */ + INTMSK = 0x24, /** Interrupt Mask */ + CMDARG = 0x28, /** Command Argument */ + CMD = 0x2C, /** Command */ + RESP0 = 0x30, /** Response 0 */ + RESP1 = 0x34, /** Response 1 */ + RESP2 = 0x38, /** Response 2 */ + RESP3 = 0x3C, /** Response 3 */ + MINTSTS = 0x40, /** Masked interrupt status */ + RINTSTS = 0x44, /** Raw interrupt status */ + STATUS = 0x48, /** Status */ + FIFOTH = 0x4C, /** FIFO threshold */ + CDETECT = 0x50, /** Card detect */ + WRTPRT = 0x54, /** Write protect */ + GPIO = 0x58, /** General Purpose IO */ + TCBCNT = 0x5C, /** Transferred CIU byte count */ + TBBCNT = 0x60, /** Transferred host/DMA to/from byte count */ + DEBNCE = 0x64, /** Card detect debounce */ + USRID = 0x68, /** User ID */ + VERID = 0x6C, /** Version ID */ + HCON = 0x70, /** Hardware Configuration */ + UHSREG = 0x74, /** Reserved */ + BMOD = 0x80, /** Bus mode Register */ + PLDMND = 0x84, /** Poll Demand */ + DBADDR = 0x88, /** Descriptor Base Address */ + IDSTS = 0x8C, /** Internal DMAC Status */ + IDINTEN = 0x90, /** Internal DMAC Interrupt Enable */ + DSCADDR = 0x94, /** Current Host Descriptor Address */ + BUFADDR = 0x98, /** Current Host Buffer Address */ + FIFODAT = 0x200, /** FIFO data read write */ }; /* Control register definitions */ -#define CTRL_RESET 0x00000001 +#define CTRL_RESET 0x00000001 #define FIFO_RESET 0x00000002 -#define DMA_RESET 0x00000004 -#define INT_ENABLE 0x00000010 -#define READ_WAIT 0x00000040 -#define CTRL_USE_IDMAC 0x02000000 +#define DMA_RESET 0x00000004 +#define INT_ENABLE 0x00000010 +#define READ_WAIT 0x00000040 +#define CTRL_USE_IDMAC 0x02000000 /* Interrupt mask defines */ #define INTMSK_CDETECT 0x00000001 @@ -102,11 +102,11 @@ enum { #define INTMASK_ERROR (INTMSK_RESP_ERR|INTMSK_RCRC|INTMSK_DCRC|INTMSK_RTO|INTMSK_DTO|INTMSK_HTO|INTMSK_FRUN|INTMSK_HLE|INTMSK_SBE|INTMSK_EBE) /*BMOD register define */ -#define BMOD_SWR 0x00000001 -#define BMOD_DE 0x00000080 +#define BMOD_SWR 0x00000001 +#define BMOD_DE 0x00000080 /* for STATUS register */ -#define GET_FIFO_COUNT(x) (((x)&0x3ffe0000)>>17) +#define GET_FIFO_COUNT(x) (((x)&0x3ffe0000)>>17) #define GET_FIFO_DEPTH(x) ((((x)&0x0FFF0000)>>16)+1) /* for IDMA intr register */ @@ -122,62 +122,62 @@ enum { /* Define Card status bits (R1 response) */ #define R1CS_ADDRESS_OUT_OF_RANGE 0x80000000 -#define R1CS_ADDRESS_MISALIGN 0x40000000 -#define R1CS_BLOCK_LEN_ERR 0x20000000 -#define R1CS_ERASE_SEQ_ERR 0x10000000 -#define R1CS_ERASE_PARAM 0x08000000 -#define R1CS_WP_VIOLATION 0x04000000 -#define R1CS_CARD_IS_LOCKED 0x02000000 -#define R1CS_LCK_UNLCK_FAILED 0x01000000 -#define R1CS_COM_CRC_ERROR 0x00800000 -#define R1CS_ILLEGAL_COMMAND 0x00400000 -#define R1CS_CARD_ECC_FAILED 0x00200000 -#define R1CS_CC_ERROR 0x00100000 -#define R1CS_ERROR 0x00080000 -#define R1CS_UNDERRUN 0x00040000 -#define R1CS_OVERRUN 0x00020000 -#define R1CS_CSD_OVERWRITE 0x00010000 -#define R1CS_WP_ERASE_SKIP 0x00008000 -#define R1CS_RESERVED_0 0x00004000 -#define R1CS_ERASE_RESET 0x00002000 -#define R1CS_CURRENT_STATE_MASK 0x00001e00 -#define R1CS_READY_FOR_DATA 0x00000100 -#define R1CS_SWITCH_ERROR 0x00000080 -#define R1CS_RESERVED_1 0x00000040 -#define R1CS_APP_CMD 0x00000020 -#define R1CS_RESERVED_2 0x00000010 -#define R1CS_APP_SPECIFIC_MASK 0x0000000c -#define R1CS_MANUFAC_TEST_MASK 0x00000003 -#define R1CS_ERROR_OCCURED_MAP 0xfdffa080 -#define R1CS_CURRENT_STATE(x) (((x)&R1CS_CURRENT_STATE_MASK)>>9) +#define R1CS_ADDRESS_MISALIGN 0x40000000 +#define R1CS_BLOCK_LEN_ERR 0x20000000 +#define R1CS_ERASE_SEQ_ERR 0x10000000 +#define R1CS_ERASE_PARAM 0x08000000 +#define R1CS_WP_VIOLATION 0x04000000 +#define R1CS_CARD_IS_LOCKED 0x02000000 +#define R1CS_LCK_UNLCK_FAILED 0x01000000 +#define R1CS_COM_CRC_ERROR 0x00800000 +#define R1CS_ILLEGAL_COMMAND 0x00400000 +#define R1CS_CARD_ECC_FAILED 0x00200000 +#define R1CS_CC_ERROR 0x00100000 +#define R1CS_ERROR 0x00080000 +#define R1CS_UNDERRUN 0x00040000 +#define R1CS_OVERRUN 0x00020000 +#define R1CS_CSD_OVERWRITE 0x00010000 +#define R1CS_WP_ERASE_SKIP 0x00008000 +#define R1CS_RESERVED_0 0x00004000 +#define R1CS_ERASE_RESET 0x00002000 +#define R1CS_CURRENT_STATE_MASK 0x00001e00 +#define R1CS_READY_FOR_DATA 0x00000100 +#define R1CS_SWITCH_ERROR 0x00000080 +#define R1CS_RESERVED_1 0x00000040 +#define R1CS_APP_CMD 0x00000020 +#define R1CS_RESERVED_2 0x00000010 +#define R1CS_APP_SPECIFIC_MASK 0x0000000c +#define R1CS_MANUFAC_TEST_MASK 0x00000003 +#define R1CS_ERROR_OCCURED_MAP 0xfdffa080 +#define R1CS_CURRENT_STATE(x) (((x)&R1CS_CURRENT_STATE_MASK)>>9) /* R5 response */ -#define R5_IO_CRC_ERR 0x00008000 -#define R5_IO_BAD_CMD 0x00004000 -#define R5_IO_GEN_ERR 0x00000800 -#define R5_IO_FUNC_ERR 0x00000200 +#define R5_IO_CRC_ERR 0x00008000 +#define R5_IO_BAD_CMD 0x00004000 +#define R5_IO_GEN_ERR 0x00000800 +#define R5_IO_FUNC_ERR 0x00000200 #define R5_IO_OUT_RANGE 0x00000100 -#define R5_IO_ERR_BITS 0x0000cb00 +#define R5_IO_ERR_BITS 0x0000cb00 enum { - NONE_TYPE = 0, - SD_TYPE, - SD_2_0_TYPE, - SDIO_TYPE, + NONE_TYPE = 0, + SD_TYPE, + SD_2_0_TYPE, + SDIO_TYPE, }; enum { - CARD_STATE_EMPTY = -1, - CARD_STATE_IDLE = 0, - CARD_STATE_READY = 1, - CARD_STATE_IDENT = 2, - CARD_STATE_STBY = 3, - CARD_STATE_TRAN = 4, - CARD_STATE_DATA = 5, - CARD_STATE_RCV = 6, - CARD_STATE_PRG = 7, - CARD_STATE_DIS = 8, - CARD_STATE_INA = 9 + CARD_STATE_EMPTY = -1, + CARD_STATE_IDLE = 0, + CARD_STATE_READY = 1, + CARD_STATE_IDENT = 2, + CARD_STATE_STBY = 3, + CARD_STATE_TRAN = 4, + CARD_STATE_DATA = 5, + CARD_STATE_RCV = 6, + CARD_STATE_PRG = 7, + CARD_STATE_DIS = 8, + CARD_STATE_INA = 9 }; enum DmaDescriptorDES1 // Buffer's size field of Descriptor @@ -204,28 +204,28 @@ enum DmaDescriptorDES0 // Control and status word of DMA descriptor DES0 }; typedef struct DmaDescStruct { - unsigned int desc0; /* control and status information of descriptor */ - unsigned int desc1; /* buffer sizes */ - unsigned int desc2; /* physical address of the buffer 1 */ - unsigned int desc3; /* physical address of the buffer 2 */ + unsigned int desc0; /* control and status information of descriptor */ + unsigned int desc1; /* buffer sizes */ + unsigned int desc2; /* physical address of the buffer 1 */ + unsigned int desc3; /* physical address of the buffer 2 */ }DmaDesc; typedef struct { - unsigned int wkmod; - volatile DmaDesc *pDmaDesc; - unsigned int idma_support; - unsigned int rca; - unsigned int ip_base; - unsigned int card_type; - unsigned int fifo_depth; - unsigned int fifo_threth; - unsigned int sectors; - unsigned int scr[2]; - unsigned int csd[4]; - unsigned int idsts; - rt_sem_t sem; - rt_sem_t mutex; - void (*cb)(void); + unsigned int wkmod; + volatile DmaDesc *pDmaDesc; + unsigned int idma_support; + unsigned int rca; + unsigned int ip_base; + unsigned int card_type; + unsigned int fifo_depth; + unsigned int fifo_threth; + unsigned int sectors; + unsigned int scr[2]; + unsigned int csd[4]; + unsigned int idsts; + rt_sem_t sem; + rt_sem_t mutex; + void (*cb)(void); } sdc_t; #define ONE_BIT_MODE (0) @@ -244,55 +244,55 @@ typedef struct { enum { - ERRNOERROR = 0, - - // for raw interrupt status error - ERRRESPRECEP, // 1 - ERRRESPCRC, - ERRDCRC, - ERRRESPTIMEOUT, - ERRDRTIMEOUT, - ERRUNDERWRITE, - ERROVERREAD, - ERRHLE, - ERRSTARTBIT, - ERRENDBITERR, // 10 + ERRNOERROR = 0, - // for R1 response - ERRADDRESSRANGE, // 11 - ERRADDRESSMISALIGN, - ERRBLOCKLEN, - ERRERASESEQERR, - ERRERASEPARAM, - ERRPROT, - ERRCARDLOCKED, - ERRCRC, - ERRILLEGALCOMMAND, - ERRECCFAILED, - ERRCCERR, - ERRUNKNOWN, - ERRUNDERRUN, - ERROVERRUN, - ERRCSDOVERWRITE, - ERRERASERESET, - ERRFSMSTATE, // 27 + // for raw interrupt status error + ERRRESPRECEP, // 1 + ERRRESPCRC, + ERRDCRC, + ERRRESPTIMEOUT, + ERRDRTIMEOUT, + ERRUNDERWRITE, + ERROVERREAD, + ERRHLE, + ERRSTARTBIT, + ERRENDBITERR, // 10 - // for R5 response - ERRBADFUNC, // 28 + // for R1 response + ERRADDRESSRANGE, // 11 + ERRADDRESSMISALIGN, + ERRBLOCKLEN, + ERRERASESEQERR, + ERRERASEPARAM, + ERRPROT, + ERRCARDLOCKED, + ERRCRC, + ERRILLEGALCOMMAND, + ERRECCFAILED, + ERRCCERR, + ERRUNKNOWN, + ERRUNDERRUN, + ERROVERRUN, + ERRCSDOVERWRITE, + ERRERASERESET, + ERRFSMSTATE, // 27 - // others - ERRCARDNOTCONN, // 29 - ERRCARDWPROTECT, - ERRCMDRETRIESOVER, - ERRNOTSUPPORTED, - ERRHARDWARE, - ERRDATANOTREADY, - ERRCARDINTERNAL, - ERRACMD41TIMEOUT, - ERRIDMA, - ERRNORES, + // for R5 response + ERRBADFUNC, // 28 - ERRNOTEQUAL, + // others + ERRCARDNOTCONN, // 29 + ERRCARDWPROTECT, + ERRCMDRETRIESOVER, + ERRNOTSUPPORTED, + ERRHARDWARE, + ERRDATANOTREADY, + ERRCARDINTERNAL, + ERRACMD41TIMEOUT, + ERRIDMA, + ERRNORES, + + ERRNOTEQUAL, }; #ifdef __ASIC_BRANCH__ @@ -352,5 +352,5 @@ extern int sdio_drv_creg_write(HSDC handle, int addr, int fn, unsigned char data extern void inv_dcache_range(unsigned long start, unsigned long len); extern void flush_dcache_range(unsigned long start, unsigned long len); - + #endif //__sdcard_h__ diff --git a/bsp/fh8620/libraries/inc/fh_spi.h b/bsp/fh8620/libraries/inc/fh_spi.h index d81c2428bc..689a85b3f4 100644 --- a/bsp/fh8620/libraries/inc/fh_spi.h +++ b/bsp/fh8620/libraries/inc/fh_spi.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef FH_SPI_H_ #define FH_SPI_H_ @@ -97,8 +97,8 @@ #define SPI_STATUS_BUSY (1) -#define SPI_TX_DMA (1<<1) -#define SPI_RX_DMA (1<<0) +#define SPI_TX_DMA (1<<1) +#define SPI_RX_DMA (1<<0) struct spi_config diff --git a/bsp/fh8620/libraries/inc/fh_timer.h b/bsp/fh8620/libraries/inc/fh_timer.h index 715a73b252..9f88bff22e 100644 --- a/bsp/fh8620/libraries/inc/fh_timer.h +++ b/bsp/fh8620/libraries/inc/fh_timer.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -29,7 +29,7 @@ /**************************************************************************** * #include section - * add #include here if any + * add #include here if any ***************************************************************************/ #include "fh_def.h" @@ -38,7 +38,7 @@ /**************************************************************************** * #define section - * add constant #define here if any + * add constant #define here if any ***************************************************************************/ #define TIMER_CTRL_ENABLE (1u << 0) #define TIMER_CTRL_MODE (1u << 1) @@ -49,19 +49,19 @@ /**************************************************************************** * ADT section - * add Abstract Data Type definition here + * add Abstract Data Type definition here ***************************************************************************/ typedef struct { - RwReg TIMER_LOAD_COUNT; - RwReg TIMER_CURRENT_VALUE; - RwReg TIMER_CTRL_REG; - RwReg TIMER_EOI; - RwReg TIMER_INT_STATUS; + RwReg TIMER_LOAD_COUNT; + RwReg TIMER_CURRENT_VALUE; + RwReg TIMER_CTRL_REG; + RwReg TIMER_EOI; + RwReg TIMER_INT_STATUS; }timer; enum timer_mode { - TIMER_MODE_PERIODIC = 0, - TIMER_MODE_ONESHOT = 1, + TIMER_MODE_PERIODIC = 0, + TIMER_MODE_ONESHOT = 1, }; @@ -73,7 +73,7 @@ typedef struct { /**************************************************************************** * section -* add function prototype here if any +* add function prototype here if any ***************************************************************************/ diff --git a/bsp/fh8620/libraries/inc/fh_uart.h b/bsp/fh8620/libraries/inc/fh_uart.h index 87da9ee2f7..34d2a9bb9a 100644 --- a/bsp/fh8620/libraries/inc/fh_uart.h +++ b/bsp/fh8620/libraries/inc/fh_uart.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -29,13 +29,13 @@ /**************************************************************************** * #include section - * add #include here if any + * add #include here if any ***************************************************************************/ #include "fh_def.h" /**************************************************************************** * #define section - * add constant #define here if any + * add constant #define here if any ***************************************************************************/ #define UART_RBR RBRTHRDLL @@ -120,53 +120,53 @@ #define UART_IIR_FIFOSE (0x03 << 6) //uart baudrate cofig -//#define UART_CLOCK_FREQ (27000000) //27MHZ +//#define UART_CLOCK_FREQ (27000000) //27MHZ // -//#define DIV(n) (((UART_CLOCK_FREQ/(n))+8)/16) +//#define DIV(n) (((UART_CLOCK_FREQ/(n))+8)/16) /**************************************************************************** * ADT section - * add Abstract Data Type definition here + * add Abstract Data Type definition here ***************************************************************************/ typedef struct { - RwReg RBRTHRDLL; /* UART_RBR, UART_THR, UART_DLL */ - RwReg DLHIER; /* UART_DLH, UART_IER */ - RwReg IIRFCR; /* UART_IIR, UART_FCR */ - RwReg UART_LCR; /*(0x000c) */ - RwReg UART_MCR; /*(0x0010) */ - RwReg UART_LSR; /*(0x0014) */ - RwReg UART_MSR; /*(0x0018) */ - RwReg UART_SCR; /*(0x001c) */ - RwReg reserved[20]; - RwReg UART_FAR; /* (0x0070) */ - RwReg UART_TFR; /* (0x0074) */ - RwReg UART_RFW; /* (0x0078) */ - RwReg UART_USR; /* (0x007c) */ - RwReg UART_TFL; /* (0x0080) */ - RwReg UART_RFL; /* (0x0084) */ - RwReg UART_SRR; /* (0x0088) */ - RwReg reserved1[3]; - RwReg UART_SFE; /* (0x0098) */ - RwReg UART_SRT; /* (0x009c) */ - RwReg UART_STET; /* (0x00a0) */ - RwReg UART_HTX; /* (0x00a4) */ - RwReg UART_DMASA; /* (0x00a8) */ - RwReg reserved2[18]; - RwReg UART_CPR; /* (0x00f4) */ - RwReg UART_UCV; /* (0x00f8) */ - RwReg UART_CTR; /* (0x00fc) */ + RwReg RBRTHRDLL; /* UART_RBR, UART_THR, UART_DLL */ + RwReg DLHIER; /* UART_DLH, UART_IER */ + RwReg IIRFCR; /* UART_IIR, UART_FCR */ + RwReg UART_LCR; /*(0x000c) */ + RwReg UART_MCR; /*(0x0010) */ + RwReg UART_LSR; /*(0x0014) */ + RwReg UART_MSR; /*(0x0018) */ + RwReg UART_SCR; /*(0x001c) */ + RwReg reserved[20]; + RwReg UART_FAR; /* (0x0070) */ + RwReg UART_TFR; /* (0x0074) */ + RwReg UART_RFW; /* (0x0078) */ + RwReg UART_USR; /* (0x007c) */ + RwReg UART_TFL; /* (0x0080) */ + RwReg UART_RFL; /* (0x0084) */ + RwReg UART_SRR; /* (0x0088) */ + RwReg reserved1[3]; + RwReg UART_SFE; /* (0x0098) */ + RwReg UART_SRT; /* (0x009c) */ + RwReg UART_STET; /* (0x00a0) */ + RwReg UART_HTX; /* (0x00a4) */ + RwReg UART_DMASA; /* (0x00a8) */ + RwReg reserved2[18]; + RwReg UART_CPR; /* (0x00f4) */ + RwReg UART_UCV; /* (0x00f8) */ + RwReg UART_CTR; /* (0x00fc) */ }uart; struct fh_uart { - uart *uart_port; - int irq; + uart *uart_port; + int irq; }; @@ -174,34 +174,34 @@ struct fh_uart { enum data_bits { - UART_DATA_BIT5 = 0, - UART_DATA_BIT6 = 1, - UART_DATA_BIT7 = 2, - UART_DATA_BIT8 = 3 + UART_DATA_BIT5 = 0, + UART_DATA_BIT6 = 1, + UART_DATA_BIT7 = 2, + UART_DATA_BIT8 = 3 }; enum stop_bits { - UART_STOP_BIT1 = 0, - UART_STOP_BIT1_5 = 1, - UART_STOP_BIT2 = 2 + UART_STOP_BIT1 = 0, + UART_STOP_BIT1_5 = 1, + UART_STOP_BIT2 = 2 }; enum parity { - UART_PARITY_NONE = 0, - UART_PARITY_EVEN = 1, - UART_PARITY_ODD = 2, - UART_PARITY_ST = 3 /* Stick Parity */ + UART_PARITY_NONE = 0, + UART_PARITY_EVEN = 1, + UART_PARITY_ODD = 2, + UART_PARITY_ST = 3 /* Stick Parity */ }; -#define UART_CLOCK_FREQ (30000000) //30MHZ +#define UART_CLOCK_FREQ (30000000) //30MHZ typedef enum enum_uart_baudrate{ - BAUDRATE_9600 = (((UART_CLOCK_FREQ/9600)+8)/16), - BAUDRATE_19200 = (((UART_CLOCK_FREQ/19200)+8)/16), - BAUDRATE_38400 = (((UART_CLOCK_FREQ/38400)+8)/16), - BAUDRATE_57600 = (((UART_CLOCK_FREQ/57600)+8)/16), - BAUDRATE_115200 = (((UART_CLOCK_FREQ/115200)+8)/16), - BAUDRATE_194000 = (((UART_CLOCK_FREQ/194000)+8)/16), + BAUDRATE_9600 = (((UART_CLOCK_FREQ/9600)+8)/16), + BAUDRATE_19200 = (((UART_CLOCK_FREQ/19200)+8)/16), + BAUDRATE_38400 = (((UART_CLOCK_FREQ/38400)+8)/16), + BAUDRATE_57600 = (((UART_CLOCK_FREQ/57600)+8)/16), + BAUDRATE_115200 = (((UART_CLOCK_FREQ/115200)+8)/16), + BAUDRATE_194000 = (((UART_CLOCK_FREQ/194000)+8)/16), }uart_baudrate_e; /**************************************************************************** @@ -213,8 +213,8 @@ extern int uart_init(uart *port); extern UINT32 uart_get_status(uart *port); extern void uart_configure(uart *port, enum data_bits data_bit, - enum stop_bits stop_bit, enum parity parity, - UINT32 buard_rate, UINT32 uart_clk); + enum stop_bits stop_bit, enum parity parity, + UINT32 buard_rate, UINT32 uart_clk); extern int uart_enable_irq(uart *port, UINT32 mode); @@ -235,7 +235,7 @@ extern void uart_set_fifo_mode(uart *port, UINT32 fifo_mode); /**************************************************************************** * section -* add function prototype here if any +* add function prototype here if any ***************************************************************************/ diff --git a/bsp/fh8620/libraries/inc/fh_wdt.h b/bsp/fh8620/libraries/inc/fh_wdt.h index a90331dbd5..7804a3a536 100644 --- a/bsp/fh8620/libraries/inc/fh_wdt.h +++ b/bsp/fh8620/libraries/inc/fh_wdt.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef FH_WDT_H_ #define FH_WDT_H_ diff --git a/bsp/fh8620/platform/board.h b/bsp/fh8620/platform/board.h index 46b276b052..ac8708ec9e 100644 --- a/bsp/fh8620/platform/board.h +++ b/bsp/fh8620/platform/board.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef __BOARD_H__ #define __BOARD_H__ #include "platform_def.h" diff --git a/bsp/fh8620/platform/board_info.h b/bsp/fh8620/platform/board_info.h index 71f8d3c19e..d86907621f 100644 --- a/bsp/fh8620/platform/board_info.h +++ b/bsp/fh8620/platform/board_info.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef __BOARD_INFO_H__ #define __BOARD_INFO_H__ @@ -33,32 +33,32 @@ extern "C" { /**************************************************************************** * #include section - * add #include here if any + * add #include here if any ***************************************************************************/ /**************************************************************************** * #define section - * add constant #define here if any + * add constant #define here if any ***************************************************************************/ /**************************************************************************** * ADT section - * add Abstract Data Type definition here + * add Abstract Data Type definition here ***************************************************************************/ typedef int (*probe_p)(void *); typedef int (*exit_p)(void *); struct fh_board_ops { - //void *ops_data; - probe_p probe; - probe_p exit; + //void *ops_data; + probe_p probe; + probe_p exit; }; struct fh_board_info { - char *name; - void *data; - struct fh_board_ops *ops; + char *name; + void *data; + struct fh_board_ops *ops; }; @@ -73,7 +73,7 @@ void fh_print_all_board_info(void); void fh_free_all_info(void); /**************************************************************************** * section - * add function prototype here if any + * add function prototype here if any ***************************************************************************/ #ifdef __cplusplus diff --git a/bsp/fh8620/platform/common/board_info.c b/bsp/fh8620/platform/common/board_info.c index aa56cbac62..6bb95bfaa9 100644 --- a/bsp/fh8620/platform/common/board_info.c +++ b/bsp/fh8620/platform/common/board_info.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + /***************************************************************************** * Include Section * add all #include here @@ -36,27 +36,27 @@ * add all #define here *****************************************************************************/ struct fh_board_info_list_node { - struct fh_board_info obj; - rt_list_t list; + struct fh_board_info obj; + rt_list_t list; }; -#define CHECK_TEST_LIST_EMPTY \ - if(rt_list_isempty(&board_info_head.list)) \ - rt_kprintf("board info is null...please register first..\n") +#define CHECK_TEST_LIST_EMPTY \ + if(rt_list_isempty(&board_info_head.list)) \ + rt_kprintf("board info is null...please register first..\n") /**************************************************************************** * ADT section * add definition of user defined Data Type that only be used in this file here ***************************************************************************/ -#define list_for_each_entry_safe(pos, n, head, member) \ - for (pos = rt_list_entry((head)->next, typeof(*pos), member), \ - n = rt_list_entry(pos->member.next, typeof(*pos), member); \ - &pos->member != (head); \ - pos = n, n = rt_list_entry(n->member.next, typeof(*n), member)) +#define list_for_each_entry_safe(pos, n, head, member) \ + for (pos = rt_list_entry((head)->next, typeof(*pos), member), \ + n = rt_list_entry(pos->member.next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = n, n = rt_list_entry(n->member.next, typeof(*n), member)) -#define PARA_ERROR (-1) -#define PROBE_FUNC_MISS (-2) +#define PARA_ERROR (-1) +#define PROBE_FUNC_MISS (-2) /****************************************************************************** * Function prototype section @@ -104,45 +104,45 @@ static struct fh_board_info_list_node board_info_head; int fh_board_info_init(void) { - memset(&board_info_head, 0x0, sizeof(struct fh_board_info_list_node)); - rt_list_init(&board_info_head.list); - board_info_head.obj.name = "NO INFO"; - return 0; + memset(&board_info_head, 0x0, sizeof(struct fh_board_info_list_node)); + rt_list_init(&board_info_head.list); + board_info_head.obj.name = "NO INFO"; + return 0; } void fh_free_all_info(void) { - rt_list_t *p_list; - struct fh_board_info_list_node *info_node; - struct fh_board_info_list_node *_info_node; - p_list = &board_info_head.list; + rt_list_t *p_list; + struct fh_board_info_list_node *info_node; + struct fh_board_info_list_node *_info_node; + p_list = &board_info_head.list; - CHECK_TEST_LIST_EMPTY; + CHECK_TEST_LIST_EMPTY; - list_for_each_entry_safe(info_node, _info_node, p_list, list) - { + list_for_each_entry_safe(info_node, _info_node, p_list, list) + { - if (info_node->obj.ops->exit) { - info_node->obj.ops->exit(info_node->obj.data); - } - rt_kprintf("soc free list name:(%s)\n", info_node->obj.name); - rt_free(info_node); - } - fh_board_info_init(); + if (info_node->obj.ops->exit) { + info_node->obj.ops->exit(info_node->obj.data); + } + rt_kprintf("soc free list name:(%s)\n", info_node->obj.name); + rt_free(info_node); + } + fh_board_info_init(); } void fh_print_all_board_info(void) { - rt_list_t *p_list; + rt_list_t *p_list; - struct fh_board_info_list_node *info_node; - struct fh_board_info_list_node *_info_node; - p_list = &board_info_head.list; + struct fh_board_info_list_node *info_node; + struct fh_board_info_list_node *_info_node; + p_list = &board_info_head.list; - CHECK_TEST_LIST_EMPTY; + CHECK_TEST_LIST_EMPTY; - list_for_each_entry_safe(info_node, _info_node, p_list, list) - { - rt_kprintf("%s\n", info_node->obj.name); - } + list_for_each_entry_safe(info_node, _info_node, p_list, list) + { + rt_kprintf("%s\n", info_node->obj.name); + } } /***************************************************************************** @@ -157,94 +157,94 @@ void fh_print_all_board_info(void) { //register the platform info such as base add,isr no.. //caution:do not free the name and data because of here not copy struct fh_board_info *fh_board_info_register(char *info_name, void *data) { - rt_list_t *p_list; - struct fh_board_info_list_node *new_node; - struct fh_board_info_list_node *info_node; - struct fh_board_info_list_node *_info_node; - p_list = &board_info_head.list; + rt_list_t *p_list; + struct fh_board_info_list_node *new_node; + struct fh_board_info_list_node *info_node; + struct fh_board_info_list_node *_info_node; + p_list = &board_info_head.list; - if (RT_NULL == info_name || RT_NULL == data) { - rt_kprintf("info name or info data is NULL!\n"); - return RT_NULL; - } + if (RT_NULL == info_name || RT_NULL == data) { + rt_kprintf("info name or info data is NULL!\n"); + return RT_NULL; + } - //check if the func is already in the test list.... + //check if the func is already in the test list.... #if(0) - list_for_each_entry_safe(info_node, _info_node, p_list, list) { - if (!memcmp(info_node->obj.name, info_name, strlen(info_name))) { - rt_kprintf("info_name(%s) is already registered\n", info_name); - return RT_NULL; - } - } + list_for_each_entry_safe(info_node, _info_node, p_list, list) { + if (!memcmp(info_node->obj.name, info_name, strlen(info_name))) { + rt_kprintf("info_name(%s) is already registered\n", info_name); + return RT_NULL; + } + } #endif - new_node = (struct fh_board_info_list_node *) rt_malloc( - sizeof(struct fh_board_info_list_node)); - if (!new_node) { - rt_kprintf("malloc new_list_node failed~\n"); - return RT_NULL; - } + new_node = (struct fh_board_info_list_node *) rt_malloc( + sizeof(struct fh_board_info_list_node)); + if (!new_node) { + rt_kprintf("malloc new_list_node failed~\n"); + return RT_NULL; + } - new_node->obj.name = info_name; - new_node->obj.data = data; - //here insert "before" and test is "after" will make the list like a fifo... - rt_list_insert_before(&board_info_head.list, &new_node->list); - return &new_node->obj; + new_node->obj.name = info_name; + new_node->obj.data = data; + //here insert "before" and test is "after" will make the list like a fifo... + rt_list_insert_before(&board_info_head.list, &new_node->list); + return &new_node->obj; } //back the platform info static void *fh_get_board_info_data(char *info_name) { - rt_list_t *p_list; - struct fh_board_info_list_node *info_node; - struct fh_board_info_list_node *_info_node; - p_list = &board_info_head.list; + rt_list_t *p_list; + struct fh_board_info_list_node *info_node; + struct fh_board_info_list_node *_info_node; + p_list = &board_info_head.list; - //check info name - if (RT_NULL == info_name) { - rt_kprintf("info name is NULL!\n"); - return RT_NULL; - } + //check info name + if (RT_NULL == info_name) { + rt_kprintf("info name is NULL!\n"); + return RT_NULL; + } - CHECK_TEST_LIST_EMPTY; + CHECK_TEST_LIST_EMPTY; - list_for_each_entry_safe(info_node, _info_node, p_list, list) - { - if (!strcmp(info_node->obj.name, info_name)) { - return info_node->obj.data; - } - } + list_for_each_entry_safe(info_node, _info_node, p_list, list) + { + if (!strcmp(info_node->obj.name, info_name)) { + return info_node->obj.data; + } + } - rt_kprintf("Can't find the board info name:%s\n", info_name); + rt_kprintf("Can't find the board info name:%s\n", info_name); } int fh_board_driver_register(char *info_name, struct fh_board_ops *ops) { - rt_list_t *p_list; - struct fh_board_info_list_node *new_node; - struct fh_board_info_list_node *info_node; - struct fh_board_info_list_node *_info_node; - p_list = &board_info_head.list; + rt_list_t *p_list; + struct fh_board_info_list_node *new_node; + struct fh_board_info_list_node *info_node; + struct fh_board_info_list_node *_info_node; + p_list = &board_info_head.list; - if (RT_NULL == info_name || RT_NULL == ops) { - rt_kprintf("info name or ops func is NULL!\n"); - return PARA_ERROR; - } + if (RT_NULL == info_name || RT_NULL == ops) { + rt_kprintf("info name or ops func is NULL!\n"); + return PARA_ERROR; + } - list_for_each_entry_safe(info_node, _info_node, p_list, list) - { - if (!strcmp(info_node->obj.name, info_name)) { + list_for_each_entry_safe(info_node, _info_node, p_list, list) + { + if (!strcmp(info_node->obj.name, info_name)) { - info_node->obj.ops = ops; - if (info_node->obj.ops->probe) { - info_node->obj.ops->probe(info_node->obj.data); - } + info_node->obj.ops = ops; + if (info_node->obj.ops->probe) { + info_node->obj.ops->probe(info_node->obj.data); + } - //return info_node->obj.data; - } - } + //return info_node->obj.data; + } + } - //rt_kprintf("Can't find the board info name:%s\n",info_name); + //rt_kprintf("Can't find the board info name:%s\n",info_name); - return 0; + return 0; } diff --git a/bsp/fh8620/platform/common/chkenv.c b/bsp/fh8620/platform/common/chkenv.c index 563b5bb55a..e2d8f18b22 100644 --- a/bsp/fh8620/platform/common/chkenv.c +++ b/bsp/fh8620/platform/common/chkenv.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + /***************************************************************************** * Include Section * add all #include here @@ -47,11 +47,11 @@ * * **************************/ -#if RT_NAME_MAX != 16 +#if RT_NAME_MAX != 16 #error "define RT_NAME_MAX 16" #endif -#if RT_TICK_PER_SECOND != 100 +#if RT_TICK_PER_SECOND != 100 #warning "RT_TICK_PER_SECOND = 100" #endif diff --git a/bsp/fh8620/platform/fh8620/arch.h b/bsp/fh8620/platform/fh8620/arch.h index df0e7f1965..306c1239e8 100644 --- a/bsp/fh8620/platform/fh8620/arch.h +++ b/bsp/fh8620/platform/fh8620/arch.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef ARCH_H_ #define ARCH_H_ @@ -31,37 +31,37 @@ /*****************************/ /* BSP CONTROLLER BASE */ /*****************************/ -#define INTC_REG_BASE (0xE0200000) -#define SDC0_REG_BASE (0xE2000000) -#define SDC1_REG_BASE (0xE2100000) -#define TVE_REG_BASE (0xE8000000) -#define VOU_REG_BASE (0xE8100000) -#define AES_REG_BASE (0xE8200000) -#define JPEG_REG_BASE (0xE8300000) -#define ISPB_REG_BASE (0xEA000000) -#define ISPF_REG_BASE (0xEA100000) -#define VPU_REG_BASE (0xEC000000) -#define VCU_REG_BASE (0xEC100000) -#define DDRC_REG_BASE (0xED000000) -#define DMAC_REG_BASE (0xEE000000) -#define GMAC_REG_BASE (0xEF000000) -#define PMU_REG_BASE (0xF0000000) -#define I2C0_REG_BASE (0xF0200000) -#define GPIO0_REG_BASE (0xF0300000) +#define INTC_REG_BASE (0xE0200000) +#define SDC0_REG_BASE (0xE2000000) +#define SDC1_REG_BASE (0xE2100000) +#define TVE_REG_BASE (0xE8000000) +#define VOU_REG_BASE (0xE8100000) +#define AES_REG_BASE (0xE8200000) +#define JPEG_REG_BASE (0xE8300000) +#define ISPB_REG_BASE (0xEA000000) +#define ISPF_REG_BASE (0xEA100000) +#define VPU_REG_BASE (0xEC000000) +#define VCU_REG_BASE (0xEC100000) +#define DDRC_REG_BASE (0xED000000) +#define DMAC_REG_BASE (0xEE000000) +#define GMAC_REG_BASE (0xEF000000) +#define PMU_REG_BASE (0xF0000000) +#define I2C0_REG_BASE (0xF0200000) +#define GPIO0_REG_BASE (0xF0300000) #define GPIO1_REG_BASE (0xf4000000) -#define PWM_REG_BASE (0xF0400000) -#define SPI0_REG_BASE (0xF0500000) -#define SPI1_REG_BASE (0xF0600000) -#define UART0_REG_BASE (0xF0700000) -#define UART1_REG_BASE (0xF0800000) -#define I2S_REG_BASE (0xF0900000) -#define ACODEC_REG_BASE (0xF0A00000) -#define I2C1_REG_BASE (0xF0B00000) -#define TMR_REG_BASE (0xF0C00000) -#define WDT_REG_BASE (0xF0D00000) -#define DPHY_REG_BASE (0xF1000000) -#define MIPIC_REG_BASE (0xF1100000) -#define SADC_REG_BASE (0xF1200000) +#define PWM_REG_BASE (0xF0400000) +#define SPI0_REG_BASE (0xF0500000) +#define SPI1_REG_BASE (0xF0600000) +#define UART0_REG_BASE (0xF0700000) +#define UART1_REG_BASE (0xF0800000) +#define I2S_REG_BASE (0xF0900000) +#define ACODEC_REG_BASE (0xF0A00000) +#define I2C1_REG_BASE (0xF0B00000) +#define TMR_REG_BASE (0xF0C00000) +#define WDT_REG_BASE (0xF0D00000) +#define DPHY_REG_BASE (0xF1000000) +#define MIPIC_REG_BASE (0xF1100000) +#define SADC_REG_BASE (0xF1200000) diff --git a/bsp/fh8620/platform/fh8620/iot_cam/board.c b/bsp/fh8620/platform/fh8620/iot_cam/board.c index 8e45b9be90..a726ce5efe 100644 --- a/bsp/fh8620/platform/fh8620/iot_cam/board.c +++ b/bsp/fh8620/platform/fh8620/iot_cam/board.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + /***************************************************************************** * Include Section * add all #include here @@ -67,15 +67,15 @@ #ifndef HW_SDCARD_POWER_GPIO - #define HW_SDCARD_POWER_GPIO 63 //not used + #define HW_SDCARD_POWER_GPIO 63 //not used #endif /**************************************************************************** * ADT section * add definition of user defined Data Type that only be used in this file here ***************************************************************************/ struct st_platform_info { - char *name; - void *private_data; + char *name; + void *private_data; }; /****************************************************************************** @@ -101,14 +101,14 @@ struct st_platform_info { void fh_mmc_reset(struct fh_mmc_obj *mmc_obj) { - rt_uint32_t value; - if (mmc_obj->id) - fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffd); - else - fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffb); - do { - fh_pmu_read(REG_PMU_SWRST_AHB_CTRL, &value); - } while (value != 0xffffffff); + rt_uint32_t value; + if (mmc_obj->id) + fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffd); + else + fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffb); + do { + fh_pmu_read(REG_PMU_SWRST_AHB_CTRL, &value); + } while (value != 0xffffffff); } static struct fh_mmc_obj mmc0_obj = @@ -130,8 +130,8 @@ static struct fh_mmc_obj mmc1_obj = }; #ifdef RT_USING_SPI -#define SPI0_CLK_IN (50000000) -#define SPI0_MAX_BAUD (SPI0_CLK_IN/2) +#define SPI0_CLK_IN (50000000) +#define SPI0_MAX_BAUD (SPI0_CLK_IN/2) static struct spi_control_platform_data spi0_platform_data = { @@ -152,8 +152,8 @@ static struct spi_control_platform_data spi0_platform_data = }; -#define SPI1_CLK_IN (50000000) -#define SPI1_MAX_BAUD (SPI1_CLK_IN/2) +#define SPI1_CLK_IN (50000000) +#define SPI1_MAX_BAUD (SPI1_CLK_IN/2) static struct spi_control_platform_data spi1_platform_data = { @@ -217,10 +217,10 @@ static struct fh_wdt_obj wdt_obj = #ifdef RT_USING_SADC static struct wrap_sadc_obj sadc_obj = { - .id = 0, - .regs = (void *)SADC_REG_BASE, - .irq_no = SADC_IRQn, - .sample_mode = ISR_MODE, + .id = 0, + .regs = (void *)SADC_REG_BASE, + .irq_no = SADC_IRQn, + .sample_mode = ISR_MODE, }; #endif @@ -366,8 +366,8 @@ struct st_platform_info plat_sadc = #endif const static struct st_platform_info *platform_info[] = { - &plat_mmc0, - //&plat_mmc1,//by PeterJiang, wifi don't use SDIO framework... + &plat_mmc0, + //&plat_mmc1,//by PeterJiang, wifi don't use SDIO framework... #ifdef RT_USING_SPI &plat_spi0, #endif @@ -400,168 +400,168 @@ const static struct st_platform_info *platform_info[] = { void clock_init(void) { - //UINT32 reg; - //gate enable, spi0, gmac, uart0, timer0, wdt, pts + //UINT32 reg; + //gate enable, spi0, gmac, uart0, timer0, wdt, pts #ifdef YG_TEK - fh_pmu_write_mask(REG_PMU_PAD_MAC_TXER_CFG, 0x100000, 0x100000); + fh_pmu_write_mask(REG_PMU_PAD_MAC_TXER_CFG, 0x100000, 0x100000); #endif - //SPI0 - fh_pmu_write_mask(REG_PMU_CLK_DIV3, 0xb, 0xff); + //SPI0 + fh_pmu_write_mask(REG_PMU_CLK_DIV3, 0xb, 0xff); - //GMAC - fh_pmu_write_mask(REG_PMU_CLK_DIV6, 0x5000000, 0xf000000); + //GMAC + fh_pmu_write_mask(REG_PMU_CLK_DIV6, 0x5000000, 0xf000000); - //UART0 - fh_pmu_write_mask(REG_PMU_CLK_DIV4, 0x1, 0xf); + //UART0 + fh_pmu_write_mask(REG_PMU_CLK_DIV4, 0x1, 0xf); - //TIMER0 - fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d0000, 0x3f0000); + //TIMER0 + fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d0000, 0x3f0000); - //PTS - fh_pmu_write_mask(REG_PMU_CLK_DIV2, 0x23, 0x3f); + //PTS + fh_pmu_write_mask(REG_PMU_CLK_DIV2, 0x23, 0x3f); - //WDT - //fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d00, 0x3f00); - fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x3500, 0x3f00); + //WDT + //fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d00, 0x3f00); + fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x3500, 0x3f00); - //clock enable - fh_pmu_write_mask(REG_PMU_CLK_GATE, 0, 0x720ba080); + //clock enable + fh_pmu_write_mask(REG_PMU_CLK_GATE, 0, 0x720ba080); //sd0_drv_sel - fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x200000, 0x300000); + fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x200000, 0x300000); //sd0_sample_sel - fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x00000, 0x30000); + fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x00000, 0x30000); - //sd1_drv_sel - fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x2000, 0x3000); - //sd1_sample_sel - fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x000, 0x300); + //sd1_drv_sel + fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x2000, 0x3000); + //sd1_sample_sel + fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x000, 0x300); } void fh_platform_info_register(void){ - struct fh_board_info *test_info; - int i; + struct fh_board_info *test_info; + int i; - for(i=0;iname,platform_info[i]->private_data); - if(!test_info){ - rt_kprintf("info_name(%s) failed registered\n", platform_info[i]->name); - } - } + for(i=0;iname,platform_info[i]->private_data); + if(!test_info){ + rt_kprintf("info_name(%s) failed registered\n", platform_info[i]->name); + } + } } void rt_hw_board_init() { - /* initialize the system clock */ - rt_hw_clock_init(); - //add iomux init 2015-3-11 by yu.zhang for fh81(fullhan) - //iomux_init(); + /* initialize the system clock */ + rt_hw_clock_init(); + //add iomux init 2015-3-11 by yu.zhang for fh81(fullhan) + //iomux_init(); fh_iomux_init(PMU_REG_BASE + 0x5c); - //add clk init 2015-3-11 by yu.zhang for fh81(fullhan) - clock_init(); - /* initialize uart */ - rt_hw_uart_init(); - rt_console_set_device(RT_CONSOLE_DEVICE_NAME); - /* initialize timer1 */ - rt_hw_timer_init(); - //board data info init... - fh_board_info_init(); - fh_platform_info_register(); + //add clk init 2015-3-11 by yu.zhang for fh81(fullhan) + clock_init(); + /* initialize uart */ + rt_hw_uart_init(); + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); + /* initialize timer1 */ + rt_hw_timer_init(); + //board data info init... + fh_board_info_init(); + fh_platform_info_register(); } void rt_board_driver_init(){ - //add board init lock here... - /*rt_show_version();*/ - int ret; + //add board init lock here... + /*rt_show_version();*/ + int ret; /* Filesystem Initialization */ #ifdef RT_USING_DFS - { - /* init the device filesystem */ - dfs_init(); - rt_kprintf("DFS initialized!\n"); + { + /* init the device filesystem */ + dfs_init(); + rt_kprintf("DFS initialized!\n"); #if defined(RT_USING_DFS_ELMFAT) - /* init the elm chan FatFs filesystam*/ - elm_init(); - rt_kprintf("ELM initialized!\n"); + /* init the elm chan FatFs filesystam*/ + elm_init(); + rt_kprintf("ELM initialized!\n"); #endif #if defined(RT_USING_DFS_ROMFS) - dfs_romfs_init(); - if (dfs_mount(RT_NULL, "/rom", "rom", 0, &romfs_root) == 0) - { - rt_kprintf("ROM File System initialized!\n"); - } - else - rt_kprintf("ROM File System initialzation failed!\n"); + dfs_romfs_init(); + if (dfs_mount(RT_NULL, "/rom", "rom", 0, &romfs_root) == 0) + { + rt_kprintf("ROM File System initialized!\n"); + } + else + rt_kprintf("ROM File System initialzation failed!\n"); #endif #if defined(RT_USING_DFS_DEVFS) - devfs_init(); - if (dfs_mount(RT_NULL, "/dev", "devfs", 0, 0) == 0) - rt_kprintf("Device File System initialized!\n"); - else - rt_kprintf("Device File System initialzation failed!\n"); + devfs_init(); + if (dfs_mount(RT_NULL, "/dev", "devfs", 0, 0) == 0) + rt_kprintf("Device File System initialized!\n"); + else + rt_kprintf("Device File System initialzation failed!\n"); - #ifdef RT_USING_NEWLIB - /* init libc */ - libc_system_init(RT_CONSOLE_DEVICE_NAME); - #endif + #ifdef RT_USING_NEWLIB + /* init libc */ + libc_system_init(RT_CONSOLE_DEVICE_NAME); + #endif #endif #if defined(RT_USING_DFS_UFFS) - { - /* init the uffs filesystem */ - dfs_uffs_init(); + { + /* init the uffs filesystem */ + dfs_uffs_init(); - /* mount flash device as flash directory */ - if(dfs_mount("nand0", "/nand0", "uffs", 0, 0) == 0) - rt_kprintf("UFFS File System initialized!\n"); - else - rt_kprintf("UFFS File System initialzation failed!\n"); - } + /* mount flash device as flash directory */ + if(dfs_mount("nand0", "/nand0", "uffs", 0, 0) == 0) + rt_kprintf("UFFS File System initialized!\n"); + else + rt_kprintf("UFFS File System initialzation failed!\n"); + } #endif #ifdef RT_USING_DFS_RAMFS - dfs_ramfs_init(); - { - rt_uint8_t *ramfs_pool = RT_NULL; - struct dfs_ramfs* ramfs; - ramfs_pool = rt_malloc(0x800000); - if(ramfs_pool) - { - ramfs =(struct dfs_ramfs*) dfs_ramfs_create((rt_uint8_t*)ramfs_pool, 0x800000); - if (ramfs != RT_NULL) - { - if (dfs_mount(RT_NULL, "/", "ram", 0, ramfs) == 0) - { - rt_kprintf("Mount RAMDisk done!\n"); - } - else - { - rt_kprintf("Mount RAMDisk failed.\n"); - } - } - } - else - { - rt_kprintf("alloc ramfs poll failed\n"); - } - } + dfs_ramfs_init(); + { + rt_uint8_t *ramfs_pool = RT_NULL; + struct dfs_ramfs* ramfs; + ramfs_pool = rt_malloc(0x800000); + if(ramfs_pool) + { + ramfs =(struct dfs_ramfs*) dfs_ramfs_create((rt_uint8_t*)ramfs_pool, 0x800000); + if (ramfs != RT_NULL) + { + if (dfs_mount(RT_NULL, "/", "ram", 0, ramfs) == 0) + { + rt_kprintf("Mount RAMDisk done!\n"); + } + else + { + rt_kprintf("Mount RAMDisk failed.\n"); + } + } + } + else + { + rt_kprintf("alloc ramfs poll failed\n"); + } + } #endif - } + } #endif /* Filesystem Initialization end*/ #ifdef RT_USING_GPIO { rt_hw_gpio_init(); - rt_kprintf("GPIO initialized!\n"); + rt_kprintf("GPIO initialized!\n"); #ifdef RT_USING_SDIO //wifi @@ -572,7 +572,7 @@ void rt_board_driver_init(){ //micro sd gpio_request(HW_SDCARD_POWER_GPIO); gpio_direction_output(HW_SDCARD_POWER_GPIO, 0); - rt_kprintf("SDIO initialized!\n"); + rt_kprintf("SDIO initialized!\n"); #endif //sensor gpio_request(HW_CIS_RST_GPIO); @@ -585,7 +585,7 @@ void rt_board_driver_init(){ #ifdef RT_USING_SDIO #ifndef RT_USING_WIFI_MARVEL rt_hw_mmc_init(); - rt_kprintf("MMC initialized!\n"); + rt_kprintf("MMC initialized!\n"); rt_thread_delay(RT_TICK_PER_SECOND*2); /* mount sd card fat partition 1 as root directory */ #ifdef RT_USING_DFS_ELMFAT @@ -601,56 +601,56 @@ void rt_board_driver_init(){ #ifdef RT_USING_FH_DMA - { + { rt_fh_dma_init(); - rt_kprintf("DMA initialized!\n"); - } + rt_kprintf("DMA initialized!\n"); + } #endif #ifdef RT_USING_FH_ACW - { - fh_audio_init(); - rt_kprintf("AUDIO initialized!\n"); - } + { + fh_audio_init(); + rt_kprintf("AUDIO initialized!\n"); + } #endif #ifdef RT_USING_LWIP - { - /* init lwip system */ - lwip_sys_init(); - rt_kprintf("LWIP SYS initialized!\n"); - eth_system_device_init(); - rt_kprintf("ETH initialized!\n"); - } + { + /* init lwip system */ + lwip_sys_init(); + rt_kprintf("LWIP SYS initialized!\n"); + eth_system_device_init(); + rt_kprintf("ETH initialized!\n"); + } #endif #ifdef RT_USING_GMAC /* register ethernetif device */ rt_app_fh_gmac_init(); - rt_kprintf("GMAC initialized!\n"); + rt_kprintf("GMAC initialized!\n"); #endif #ifdef RT_USING_I2C - { - rt_hw_i2c_init(); - rt_kprintf("I2C initialized!\n"); - } + { + rt_hw_i2c_init(); + rt_kprintf("I2C initialized!\n"); + } #endif #ifdef RT_USING_PWM { rt_hw_pwm_init(); - rt_kprintf("PWM initialized!\n"); + rt_kprintf("PWM initialized!\n"); } #endif #ifdef RT_USING_WDT { rt_hw_wdt_init(); - rt_kprintf("WDT initialized!\n"); + rt_kprintf("WDT initialized!\n"); } #endif @@ -658,7 +658,7 @@ void rt_board_driver_init(){ #ifdef RT_USING_SPI { rt_hw_spi_init(); - rt_kprintf("SPI initialized!\n"); + rt_kprintf("SPI initialized!\n"); } #endif @@ -668,21 +668,21 @@ void rt_board_driver_init(){ rt_kprintf("FLASH initialized!\n"); #endif - rt_kprintf("init done\n"); + rt_kprintf("init done\n"); #ifdef RT_USING_SADC rt_hw_sadc_init(); - rt_kprintf("SADC initialized!\n"); + rt_kprintf("SADC initialized!\n"); #endif #ifdef RT_USING_ENC28J60 - gpio_request(ENC28J60_INT); - gpio_direction_input(ENC28J60_INT); - gpio_set_irq_type(ENC28J60_INT, IRQ_TYPE_EDGE_FALLING); - rt_hw_interrupt_install(gpio_to_irq(ENC28J60_INT), (void *)enc28j60_isr, RT_NULL, RT_NULL); - gpio_irq_enable(gpio_to_irq(ENC28J60_INT)); - gpio_release(ENC28J60_INT); + gpio_request(ENC28J60_INT); + gpio_direction_input(ENC28J60_INT); + gpio_set_irq_type(ENC28J60_INT, IRQ_TYPE_EDGE_FALLING); + rt_hw_interrupt_install(gpio_to_irq(ENC28J60_INT), (void *)enc28j60_isr, RT_NULL, RT_NULL); + gpio_irq_enable(gpio_to_irq(ENC28J60_INT)); + gpio_release(ENC28J60_INT); - enc28j60_attach(ENC28J60_SPI_DEV); + enc28j60_attach(ENC28J60_SPI_DEV); #endif } diff --git a/bsp/fh8620/platform/fh8620/iot_cam/board_def.h b/bsp/fh8620/platform/fh8620/iot_cam/board_def.h index 48551b7095..902375f429 100644 --- a/bsp/fh8620/platform/fh8620/iot_cam/board_def.h +++ b/bsp/fh8620/platform/fh8620/iot_cam/board_def.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,18 +18,18 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef BOARD_DEF_H_ #define BOARD_DEF_H_ /* *********************** - * SECTION: DRIVE + * SECTION: DRIVE * ***********************/ // Basic drive.. #define RT_USING_UART1 @@ -49,22 +49,22 @@ #define CONFIG_PLAT_V2 #ifndef FH_DDR_START -#define FH_DDR_START 0xA0000000 -#define FH_DDR_END 0xA1000000 +#define FH_DDR_START 0xA0000000 +#define FH_DDR_END 0xA1000000 -#define FH_RTT_OS_MEM_SIZE 0x00600000 -#define FH_DMA_MEM_SIZE 0x20000 /* 128k */ +#define FH_RTT_OS_MEM_SIZE 0x00600000 +#define FH_DMA_MEM_SIZE 0x20000 /* 128k */ -#define FH_RTT_OS_MEM_END (FH_DDR_START + FH_RTT_OS_MEM_SIZE) -#define FH_SDK_MEM_START (FH_RTT_OS_MEM_END + FH_DMA_MEM_SIZE) -#define FH_RTT_OS_HEAP_END FH_SDK_MEM_START -#define FH_SDK_MEM_SIZE (FH_DDR_END - FH_SDK_MEM_START) +#define FH_RTT_OS_MEM_END (FH_DDR_START + FH_RTT_OS_MEM_SIZE) +#define FH_SDK_MEM_START (FH_RTT_OS_MEM_END + FH_DMA_MEM_SIZE) +#define FH_RTT_OS_HEAP_END FH_SDK_MEM_START +#define FH_SDK_MEM_SIZE (FH_DDR_END - FH_SDK_MEM_START) #endif /* end of FH_DDR_START*/ - + /* *********************** - * SECTION: DRIVE COMPONENT + * SECTION: DRIVE COMPONENT * ***********************/ -#define UART_NAME "uart1" +#define UART_NAME "uart1" #define RT_USING_DMA_MEM #define RT_USING_MCI0 diff --git a/bsp/fh8620/platform/fh8620/iot_cam/iomux.c b/bsp/fh8620/platform/fh8620/iot_cam/iomux.c index ee0bb63260..dc699c4450 100644 --- a/bsp/fh8620/platform/fh8620/iot_cam/iomux.c +++ b/bsp/fh8620/platform/fh8620/iot_cam/iomux.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,650 +18,650 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include "rtdef.h" #include "iomux.h" #include "rtconfig.h" Iomux_Pad fh_iomux_cfg[] = { - { - .func_name = { "RESETN", "", "", "", }, - .reg_type = 9, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = -1, - }, - { - .func_name = { "TEST", "", "", "", }, - .reg_type = 9, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = -1, - }, - { - .func_name = { "CIS_CLK", "", "", "", }, - .reg_type = 5, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "CIS_HSYNC", "GPIO20", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_VSYNC", "GPIO21", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_PCLK", "", "", "", }, - .reg_type = 9, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 0, - }, - { - .func_name = { "CIS_D0", "GPIO22", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_D1", "GPIO23", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_D2", "GPIO24", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_D3", "GPIO25", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_D4", "GPIO26", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_D5", "GPIO27", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_D6", "GPIO28", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_D7", "GPIO29", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_D8", "GPIO30", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_D9", "GPIO31", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_D10", "GPIO32", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_D11", "GPIO33", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_REF_CLK", "", "", "", }, - .reg_type = 17, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 3, - }, - { - .func_name = { "MAC_MDC", "GPIO34", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 0, - }, - { - .func_name = { "MAC_MDIO", "", "", "", }, - .reg_type = 17, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_COL", "GPIO35", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_CRS", "GPIO36", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_RXCK", "", "", "", }, - .reg_type = 9, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = -1, - }, - { - .func_name = { "MAC_RXD0", "", "", "", }, - .reg_type = 17, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = -1, - }, + { + .func_name = { "RESETN", "", "", "", }, + .reg_type = 9, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = -1, + }, + { + .func_name = { "TEST", "", "", "", }, + .reg_type = 9, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = -1, + }, + { + .func_name = { "CIS_CLK", "", "", "", }, + .reg_type = 5, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "CIS_HSYNC", "GPIO20", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_VSYNC", "GPIO21", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_PCLK", "", "", "", }, + .reg_type = 9, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 0, + }, + { + .func_name = { "CIS_D0", "GPIO22", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_D1", "GPIO23", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_D2", "GPIO24", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_D3", "GPIO25", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_D4", "GPIO26", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_D5", "GPIO27", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_D6", "GPIO28", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_D7", "GPIO29", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_D8", "GPIO30", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_D9", "GPIO31", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_D10", "GPIO32", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_D11", "GPIO33", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_REF_CLK", "", "", "", }, + .reg_type = 17, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 3, + }, + { + .func_name = { "MAC_MDC", "GPIO34", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 0, + }, + { + .func_name = { "MAC_MDIO", "", "", "", }, + .reg_type = 17, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_COL", "GPIO35", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_CRS", "GPIO36", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_RXCK", "", "", "", }, + .reg_type = 9, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = -1, + }, + { + .func_name = { "MAC_RXD0", "", "", "", }, + .reg_type = 17, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = -1, + }, - { - .func_name = { "MAC_RXD1", "GPIO38", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_RXD2", "GPIO39", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_RXD3", "GPIO40", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_RXDV", "GPIO41", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_TXCK", "", "", "", }, - .reg_type = 9, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = -1, - }, - { - .func_name = { "MAC_TXD0", "GPIO42", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_TXD1", "GPIO43", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_TXD2", "GPIO44", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_TXD3", "GPIO45", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_TXEN", "GPIO46", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "MAC_RXER", "GPIO47", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "GPIO0", "ARC_JTAG_TCK", "GPIO0", "CIS_SSI0_CSN1", }, - .reg_type = 21, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "GPIO1", "ARC_JTAG_TRSTN", "GPIO1", "CIS_SSI0_RXD", }, - .reg_type = 21, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "GPIO2", "ARC_JTAG_TMS", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "GPIO3", "ARC_JTAG_TDI", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "GPIO4", "ARC_JTAG_TDO", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "JTAG_TCK", "GPIO5", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "JTAG_TRSTN", "GPIO6", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "JTAG_TMS", "GPIO7", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "JTAG_TDI", "GPIO8", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "JTAG_TDO", "GPIO9", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "GPIO10", "UART1_OUT", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 1, - }, - { - .func_name = { "GPIO11", "UART1_IN", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 1, - }, - { - .func_name = { "GPIO12", "PWM_OUT0", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "GPIO13", "PWM_OUT1", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "GPIO14", "PWM_OUT2", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "RESERVED", "", "", "", }, - .reg_type = 20, - .func_sel = 0, - }, - { - .func_name = { "RESERVED", "", "", "", }, - .reg_type = 20, - .func_sel = 0, - }, - { - .func_name = { "RESERVED", "", "", "", }, - .reg_type = 20, - .func_sel = 0, - }, - { - .func_name = { "RESERVED", "", "", "", }, - .reg_type = 20, - .func_sel = 0, - }, - { - .func_name = { "RESERVED", "", "", "", }, - .reg_type = 20, - .func_sel = 0, - }, - { - .func_name = { "UART0_IN", "GPIO48", "UART0_IN", " I2S_WS", }, - .reg_type = 21, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 1, - }, - { - .func_name = { "UART0_OUT", "GPIO49", "UART0_OUT", "I2S_CLK", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "CIS_SCL", "GPIO56", "CIS_SCL", "CIS_SSI0_CLK", }, - .reg_type = 13, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "CIS_SDA", "GPIO57", "CIS_SDA", "CIS_SSI0_TXD", }, - .reg_type = 13, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "SCL1", "GPIO50", "SCL1", "I2S_DI", }, - .reg_type = 21, - .func_sel = 1, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "SDA1", "GPIO51", "I2S_DO", "", }, - .reg_type = 21, - .func_sel = 1, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "SSI0_CLK", "", "", "", }, - .reg_type = 5, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "SSI0_TXD", "", "", "", }, - .reg_type = 5, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "SSI0_CSN0", "GPIO54", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "SSI0_CSN1", "GPIO55", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "SSI0_RXD", "", "", "", }, - .reg_type = 17, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = -1, - }, - { - .func_name = { "SD0_CD", "GPIO52", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "SD0_WP", "GPIO53", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "SD0_CLK", "", "", "", }, - .reg_type = 5, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 3, - }, - { - .func_name = { "SD0_CMD_RSP", "", "", "", }, - .reg_type = 17, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 3, - }, - { - .func_name = { "SD0_DATA0", "", "", "", }, - .reg_type = 17, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 3, - }, - { - .func_name = { "SD0_DATA1", "", "", "", }, - .reg_type = 17, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 2, - }, - { - .func_name = { "SD0_DATA2", "", "", "", }, - .reg_type = 17, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 3, - }, - { - .func_name = { "SD0_DATA3", "", "", "", }, - .reg_type = 17, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 3, - }, - { - .func_name = { "SD1_CLK", "SSI1_CLK", "", "", }, - .reg_type = 8, - .func_sel = 0, - .pupd = IOMUX_PUPD_NONE, - .drv_cur = 1, - }, - { - .func_name = { "SD1_CD", "GPIO_58", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "SD1_WP", "GPIO_59", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, - { - .func_name = { "SD1_DATA0", "SSI1_TXD", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 3, - }, - { - .func_name = { "SD1_DATA1", "SSI1_CSN0", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 3, - }, - { - .func_name = { "SD1_DATA2", "SSI1_CSN1", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 3, - }, - { - .func_name = { "SD1_DATA3", "", "", "", }, - .reg_type = 17, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 3, - }, - { - .func_name = { "SD1_CMD_RSP", "SSI1_RXD", "", "", }, - .reg_type = 20, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = 3, - }, - { - .func_name = { "RESERVED", "", "", "", }, - .reg_type = 20, - .func_sel = 0, - }, - { - .func_name = { "RESERVED", "", "", "", }, - .reg_type = 20, - .func_sel = 0, - }, - { - .func_name = { "RESERVED", "", "", "", }, - .reg_type = 20, - .func_sel = 0, - }, - { - .func_name = { "RESERVED", "", "", "", }, - .reg_type = 20, - .func_sel = 0, - }, - { - .func_name = { "CLK_SW0", "", "", "", }, - .reg_type = 9, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = -1, - }, - { - .func_name = { "CLK_SW1", "", "", "", }, - .reg_type = 9, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = -1, - }, - { - .func_name = { "CLK_SW2", "", "", "", }, - .reg_type = 9, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = -1, - }, - { - .func_name = { "CLK_SW3", "", "", "", }, - .reg_type = 9, - .func_sel = 0, - .pupd = IOMUX_PUPD_UP, - .drv_cur = -1, - }, - { - .func_name = { "RESERVED", "", "", "", }, - .reg_type = 20, - .func_sel = 0, - }, - { - .func_name = { "MAC_TXER", "GPIO37", "", "", }, - .reg_type = 20, - .func_sel = 1, - .pupd = IOMUX_PUPD_DOWN, - .drv_cur = 1, - }, + { + .func_name = { "MAC_RXD1", "GPIO38", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_RXD2", "GPIO39", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_RXD3", "GPIO40", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_RXDV", "GPIO41", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_TXCK", "", "", "", }, + .reg_type = 9, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = -1, + }, + { + .func_name = { "MAC_TXD0", "GPIO42", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_TXD1", "GPIO43", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_TXD2", "GPIO44", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_TXD3", "GPIO45", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_TXEN", "GPIO46", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "MAC_RXER", "GPIO47", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "GPIO0", "ARC_JTAG_TCK", "GPIO0", "CIS_SSI0_CSN1", }, + .reg_type = 21, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "GPIO1", "ARC_JTAG_TRSTN", "GPIO1", "CIS_SSI0_RXD", }, + .reg_type = 21, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "GPIO2", "ARC_JTAG_TMS", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "GPIO3", "ARC_JTAG_TDI", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "GPIO4", "ARC_JTAG_TDO", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "JTAG_TCK", "GPIO5", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "JTAG_TRSTN", "GPIO6", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "JTAG_TMS", "GPIO7", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "JTAG_TDI", "GPIO8", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "JTAG_TDO", "GPIO9", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "GPIO10", "UART1_OUT", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 1, + }, + { + .func_name = { "GPIO11", "UART1_IN", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 1, + }, + { + .func_name = { "GPIO12", "PWM_OUT0", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "GPIO13", "PWM_OUT1", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "GPIO14", "PWM_OUT2", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "RESERVED", "", "", "", }, + .reg_type = 20, + .func_sel = 0, + }, + { + .func_name = { "RESERVED", "", "", "", }, + .reg_type = 20, + .func_sel = 0, + }, + { + .func_name = { "RESERVED", "", "", "", }, + .reg_type = 20, + .func_sel = 0, + }, + { + .func_name = { "RESERVED", "", "", "", }, + .reg_type = 20, + .func_sel = 0, + }, + { + .func_name = { "RESERVED", "", "", "", }, + .reg_type = 20, + .func_sel = 0, + }, + { + .func_name = { "UART0_IN", "GPIO48", "UART0_IN", " I2S_WS", }, + .reg_type = 21, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 1, + }, + { + .func_name = { "UART0_OUT", "GPIO49", "UART0_OUT", "I2S_CLK", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "CIS_SCL", "GPIO56", "CIS_SCL", "CIS_SSI0_CLK", }, + .reg_type = 13, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "CIS_SDA", "GPIO57", "CIS_SDA", "CIS_SSI0_TXD", }, + .reg_type = 13, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "SCL1", "GPIO50", "SCL1", "I2S_DI", }, + .reg_type = 21, + .func_sel = 1, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "SDA1", "GPIO51", "I2S_DO", "", }, + .reg_type = 21, + .func_sel = 1, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "SSI0_CLK", "", "", "", }, + .reg_type = 5, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "SSI0_TXD", "", "", "", }, + .reg_type = 5, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "SSI0_CSN0", "GPIO54", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "SSI0_CSN1", "GPIO55", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "SSI0_RXD", "", "", "", }, + .reg_type = 17, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = -1, + }, + { + .func_name = { "SD0_CD", "GPIO52", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "SD0_WP", "GPIO53", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "SD0_CLK", "", "", "", }, + .reg_type = 5, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 3, + }, + { + .func_name = { "SD0_CMD_RSP", "", "", "", }, + .reg_type = 17, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 3, + }, + { + .func_name = { "SD0_DATA0", "", "", "", }, + .reg_type = 17, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 3, + }, + { + .func_name = { "SD0_DATA1", "", "", "", }, + .reg_type = 17, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 2, + }, + { + .func_name = { "SD0_DATA2", "", "", "", }, + .reg_type = 17, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 3, + }, + { + .func_name = { "SD0_DATA3", "", "", "", }, + .reg_type = 17, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 3, + }, + { + .func_name = { "SD1_CLK", "SSI1_CLK", "", "", }, + .reg_type = 8, + .func_sel = 0, + .pupd = IOMUX_PUPD_NONE, + .drv_cur = 1, + }, + { + .func_name = { "SD1_CD", "GPIO_58", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "SD1_WP", "GPIO_59", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, + { + .func_name = { "SD1_DATA0", "SSI1_TXD", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 3, + }, + { + .func_name = { "SD1_DATA1", "SSI1_CSN0", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 3, + }, + { + .func_name = { "SD1_DATA2", "SSI1_CSN1", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 3, + }, + { + .func_name = { "SD1_DATA3", "", "", "", }, + .reg_type = 17, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 3, + }, + { + .func_name = { "SD1_CMD_RSP", "SSI1_RXD", "", "", }, + .reg_type = 20, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = 3, + }, + { + .func_name = { "RESERVED", "", "", "", }, + .reg_type = 20, + .func_sel = 0, + }, + { + .func_name = { "RESERVED", "", "", "", }, + .reg_type = 20, + .func_sel = 0, + }, + { + .func_name = { "RESERVED", "", "", "", }, + .reg_type = 20, + .func_sel = 0, + }, + { + .func_name = { "RESERVED", "", "", "", }, + .reg_type = 20, + .func_sel = 0, + }, + { + .func_name = { "CLK_SW0", "", "", "", }, + .reg_type = 9, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = -1, + }, + { + .func_name = { "CLK_SW1", "", "", "", }, + .reg_type = 9, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = -1, + }, + { + .func_name = { "CLK_SW2", "", "", "", }, + .reg_type = 9, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = -1, + }, + { + .func_name = { "CLK_SW3", "", "", "", }, + .reg_type = 9, + .func_sel = 0, + .pupd = IOMUX_PUPD_UP, + .drv_cur = -1, + }, + { + .func_name = { "RESERVED", "", "", "", }, + .reg_type = 20, + .func_sel = 0, + }, + { + .func_name = { "MAC_TXER", "GPIO37", "", "", }, + .reg_type = 20, + .func_sel = 1, + .pupd = IOMUX_PUPD_DOWN, + .drv_cur = 1, + }, }; diff --git a/bsp/fh8620/platform/fh8620/iot_cam/startup.c b/bsp/fh8620/platform/fh8620/iot_cam/startup.c index ebadf0677b..6787dc7f37 100644 --- a/bsp/fh8620/platform/fh8620/iot_cam/startup.c +++ b/bsp/fh8620/platform/fh8620/iot_cam/startup.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include #include #include @@ -50,13 +50,13 @@ extern void rt_system_heap_init(void*, void*); extern void rt_hw_finsh_init(void); extern void rt_application_init(void); -static struct mem_desc fh_mem_desc[] = +static struct mem_desc fh_mem_desc[] = { - { 0xA0000000, FH_RTT_OS_MEM_END-1, 0xA0000000, SECT_RWX_CB, 0, SECT_MAPPED }, - { FH_RTT_OS_MEM_END, FH_DDR_END-1, FH_RTT_OS_MEM_END, SECT_RWNX_NCNB, 0, SECT_MAPPED }, - { 0xFFFF0000, 0xFFFF1000-1, 0xA0000000, SECT_TO_PAGE, PAGE_ROX_CB, PAGE_MAPPED }, /* isr vector table */ - { 0xE0000000, 0xF1300000-1, 0xE0000000, SECT_RWNX_NCNB, 0, SECT_MAPPED }, /* io table */ - { 0xF4000000, 0xF4100000-1, 0xF4000000, SECT_RWNX_NCNB, 0, SECT_MAPPED }, /* GPIO#1 io table */ + { 0xA0000000, FH_RTT_OS_MEM_END-1, 0xA0000000, SECT_RWX_CB, 0, SECT_MAPPED }, + { FH_RTT_OS_MEM_END, FH_DDR_END-1, FH_RTT_OS_MEM_END, SECT_RWNX_NCNB, 0, SECT_MAPPED }, + { 0xFFFF0000, 0xFFFF1000-1, 0xA0000000, SECT_TO_PAGE, PAGE_ROX_CB, PAGE_MAPPED }, /* isr vector table */ + { 0xE0000000, 0xF1300000-1, 0xE0000000, SECT_RWNX_NCNB, 0, SECT_MAPPED }, /* io table */ + { 0xF4000000, 0xF4100000-1, 0xF4000000, SECT_RWNX_NCNB, 0, SECT_MAPPED }, /* GPIO#1 io table */ }; rt_uint8_t _irq_stack_start[1024]; @@ -72,46 +72,46 @@ extern unsigned char __bss_end; */ void rtthread_startup(void) { - /* disable interrupt first */ - rt_hw_interrupt_disable(); - /* initialize hardware interrupt */ - rt_hw_interrupt_init(); + /* disable interrupt first */ + rt_hw_interrupt_disable(); + /* initialize hardware interrupt */ + rt_hw_interrupt_init(); - /* initialize mmu */ - rt_hw_mmu_init(fh_mem_desc, sizeof(fh_mem_desc)/sizeof(fh_mem_desc[0])); + /* initialize mmu */ + rt_hw_mmu_init(fh_mem_desc, sizeof(fh_mem_desc)/sizeof(fh_mem_desc[0])); - rt_system_heap_init((void*)&__bss_end, (void*)FH_RTT_OS_MEM_END); + rt_system_heap_init((void*)&__bss_end, (void*)FH_RTT_OS_MEM_END); #ifdef RT_USING_DMA_MEM - //just use the last 100KB - fh_dma_mem_init((rt_uint32_t *)FH_RTT_OS_MEM_END, FH_DMA_MEM_SIZE); + //just use the last 100KB + fh_dma_mem_init((rt_uint32_t *)FH_RTT_OS_MEM_END, FH_DMA_MEM_SIZE); #endif - /* initialize board */ - rt_hw_board_init(); + /* initialize board */ + rt_hw_board_init(); - /* show version */ - rt_show_version(); + /* show version */ + rt_show_version(); - /* initialize timer system */ - rt_system_timer_init(); + /* initialize timer system */ + rt_system_timer_init(); - /* initialize scheduler system */ - rt_system_scheduler_init(); + /* initialize scheduler system */ + rt_system_scheduler_init(); - /* initialize application */ - rt_application_init(); + /* initialize application */ + rt_application_init(); - /* initialize system timer thread */ - rt_system_timer_thread_init(); + /* initialize system timer thread */ + rt_system_timer_thread_init(); - /* initialize idle thread */ - rt_thread_idle_init(); + /* initialize idle thread */ + rt_thread_idle_init(); - /* start scheduler */ - rt_system_scheduler_start(); + /* start scheduler */ + rt_system_scheduler_start(); - /* never reach here */ + /* never reach here */ - return ; + return ; } diff --git a/bsp/fh8620/platform/fh_arch.h b/bsp/fh8620/platform/fh_arch.h index 2cbe36718a..a8360cda54 100644 --- a/bsp/fh8620/platform/fh_arch.h +++ b/bsp/fh8620/platform/fh_arch.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef FH_ARCH_H_ #define FH_ARCH_H_ diff --git a/bsp/fh8620/platform/fh_def.h b/bsp/fh8620/platform/fh_def.h index 57bedcb9e7..4a97709d54 100644 --- a/bsp/fh8620/platform/fh_def.h +++ b/bsp/fh8620/platform/fh_def.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef FH_DEF_H_ #define FH_DEF_H_ @@ -32,29 +32,29 @@ #define MIN(a,b) ((a) < (b) ? (a) : (b)) #define MAX(a,b) ((a) > (b) ? (a) : (b)) -typedef char SINT8; -typedef short SINT16; -typedef int SINT32; -typedef long long SINT64; -typedef unsigned char UINT8; -typedef unsigned short UINT16; -typedef unsigned int UINT32; -typedef unsigned long long UINT64; +typedef char SINT8; +typedef short SINT16; +typedef int SINT32; +typedef long long SINT64; +typedef unsigned char UINT8; +typedef unsigned short UINT16; +typedef unsigned int UINT32; +typedef unsigned long long UINT64; #ifndef TYPE_DEFINED -typedef unsigned char uchar; -typedef signed char int8; -typedef unsigned char uint8; -typedef signed short int16; -typedef unsigned short uint16; -typedef signed int int32; -typedef unsigned int uint32; -typedef signed long long int64; -typedef unsigned long long uint64; -typedef float ieee_single; -typedef double ieee_double; +typedef unsigned char uchar; +typedef signed char int8; +typedef unsigned char uint8; +typedef signed short int16; +typedef unsigned short uint16; +typedef signed int int32; +typedef unsigned int uint32; +typedef signed long long int64; +typedef unsigned long long uint64; +typedef float ieee_single; +typedef double ieee_double; -typedef unsigned long boolean; +typedef unsigned long boolean; #define TYPE_DEFINED diff --git a/bsp/fh8620/platform/plat-v2/arch.h b/bsp/fh8620/platform/plat-v2/arch.h index bb32d96ea4..c8d23c0163 100644 --- a/bsp/fh8620/platform/plat-v2/arch.h +++ b/bsp/fh8620/platform/plat-v2/arch.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,53 +18,53 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef ARCH_H_ #define ARCH_H_ /*****************************/ /* BSP CONTROLLER BASE */ /*****************************/ -#define INTC_REG_BASE (0xE0200000) -#define SDC0_REG_BASE (0xE2000000) -#define SDC1_REG_BASE (0xE2100000) -#define TVE_REG_BASE (0xE8000000) -#define VOU_REG_BASE (0xE8100000) -#define AES_REG_BASE (0xE8200000) +#define INTC_REG_BASE (0xE0200000) +#define SDC0_REG_BASE (0xE2000000) +#define SDC1_REG_BASE (0xE2100000) +#define TVE_REG_BASE (0xE8000000) +#define VOU_REG_BASE (0xE8100000) +#define AES_REG_BASE (0xE8200000) /* -#define JPEG_REG_BASE (0xE8300000) -#define ISPB_REG_BASE (0xEA000000) -#define ISPF_REG_BASE (0xEA100000) -#define VPU_REG_BASE (0xEC000000) -#define VCU_REG_BASE (0xEC100000) -#define DDRC_REG_BASE (0xED000000) +#define JPEG_REG_BASE (0xE8300000) +#define ISPB_REG_BASE (0xEA000000) +#define ISPF_REG_BASE (0xEA100000) +#define VPU_REG_BASE (0xEC000000) +#define VCU_REG_BASE (0xEC100000) +#define DDRC_REG_BASE (0xED000000) */ -#define DMAC_REG_BASE (0xEE000000) -#define GMAC_REG_BASE (0xEF000000) -#define PMU_REG_BASE (0xF0000000) -#define I2C0_REG_BASE (0xF0200000) -#define GPIO0_REG_BASE (0xF0300000) +#define DMAC_REG_BASE (0xEE000000) +#define GMAC_REG_BASE (0xEF000000) +#define PMU_REG_BASE (0xF0000000) +#define I2C0_REG_BASE (0xF0200000) +#define GPIO0_REG_BASE (0xF0300000) #define GPIO1_REG_BASE (0xf4000000) -#define PWM_REG_BASE (0xF0400000) -#define SPI0_REG_BASE (0xF0500000) -#define SPI1_REG_BASE (0xF0600000) -#define UART0_REG_BASE (0xF0700000) -#define UART1_REG_BASE (0xF0800000) -/*#define I2S_REG_BASE (0xF0900000)*/ -#define ACODEC_REG_BASE (0xF0A00000) -#define I2C1_REG_BASE (0xF0B00000) -#define TMR_REG_BASE (0xF0C00000) -#define WDT_REG_BASE (0xF0D00000) +#define PWM_REG_BASE (0xF0400000) +#define SPI0_REG_BASE (0xF0500000) +#define SPI1_REG_BASE (0xF0600000) +#define UART0_REG_BASE (0xF0700000) +#define UART1_REG_BASE (0xF0800000) +/*#define I2S_REG_BASE (0xF0900000)*/ +#define ACODEC_REG_BASE (0xF0A00000) +#define I2C1_REG_BASE (0xF0B00000) +#define TMR_REG_BASE (0xF0C00000) +#define WDT_REG_BASE (0xF0D00000) /* -#define DPHY_REG_BASE (0xF1000000) -#define MIPIC_REG_BASE (0xF1100000) +#define DPHY_REG_BASE (0xF1000000) +#define MIPIC_REG_BASE (0xF1100000) */ -#define SADC_REG_BASE (0xF1200000) +#define SADC_REG_BASE (0xF1200000) typedef enum IRQn { diff --git a/bsp/fh8620/platform/plat-v2/clock.c b/bsp/fh8620/platform/plat-v2/clock.c index 1c82348c7f..335b4c3ce9 100644 --- a/bsp/fh8620/platform/plat-v2/clock.c +++ b/bsp/fh8620/platform/plat-v2/clock.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include "clock.h" #include #include "fh_arch.h" @@ -40,8 +40,8 @@ //#define FH_DBG_CLK -#define FH_CLK_DIV_DEFAULT_VALUE 0x55aaaa55 -#define FH_CLK_GATE_DEFAULT_VALUE 0xaa5555aa +#define FH_CLK_DIV_DEFAULT_VALUE 0x55aaaa55 +#define FH_CLK_GATE_DEFAULT_VALUE 0xaa5555aa #define CONFIG_PAE_PTS_CLOCK (1000000) #define TICKS_PER_USEC (CONFIG_PAE_PTS_CLOCK / 1000000) @@ -50,15 +50,15 @@ #define fh_clk_err(p,fmt,args...)\ - rt_kprintf("clk_err: %s->\t"fmt,p->name, ##args) + rt_kprintf("clk_err: %s->\t"fmt,p->name, ##args) #ifdef FH_CLK_DEBUG #define fh_clk_debug(p,fmt,args...)\ - rt_kprintf("%s:\t\t"fmt,p->name, ##args) + rt_kprintf("%s:\t\t"fmt,p->name, ##args) #define fh_clk_debug_no_handle(fmt,args...)\ - rt_kprintf(fmt, ##args) + rt_kprintf(fmt, ##args) #else //#define fh_clk_err(p,fmt,args...) #define fh_clk_debug(p,fmt,args...) @@ -77,48 +77,48 @@ static struct fh_clk_tree fh_clk_tree; -#define FH_TIMER_WRITEL(offset,value) __raw_writel(value,(fh_clk_tree.c_base_addr + offset)) -#define FH_TIMER_READL(offset) __raw_readl((fh_clk_tree.c_base_addr + offset)) +#define FH_TIMER_WRITEL(offset,value) __raw_writel(value,(fh_clk_tree.c_base_addr + offset)) +#define FH_TIMER_READL(offset) __raw_readl((fh_clk_tree.c_base_addr + offset)) enum clk_gate_enum{ -#define CLK_GATE (1) -#define CLK_UNGATE (0) - ISP_ACLK_GATE = (1<<0), - HCLK_GATE = (1<<1), - CPU_FCLK0_GATE = (1<<3), - VCU_CLK_GATE = (1<<4), - VOU_CLK_GATE = (1<<5), - MCLK_GATE = (1<<6), - SPI0_CLK_GATE = (1<<7), - SPI1_CLK_GATE = (1<<8), - SDC0_CLK_GATE = (1<<9), - SDC1_CLK_GATE = (1<<10), - AC_MCLK_GATE = (1<<11), ///// - I2C0_CLK_GATE = (1<<12), - UART0_CLK_GATE = (1<<13), - UART1_CLK_GATE = (1<<14), - //can't change - WDT_CLK_GATE = (1<<15), +#define CLK_GATE (1) +#define CLK_UNGATE (0) + ISP_ACLK_GATE = (1<<0), + HCLK_GATE = (1<<1), + CPU_FCLK0_GATE = (1<<3), + VCU_CLK_GATE = (1<<4), + VOU_CLK_GATE = (1<<5), + MCLK_GATE = (1<<6), + SPI0_CLK_GATE = (1<<7), + SPI1_CLK_GATE = (1<<8), + SDC0_CLK_GATE = (1<<9), + SDC1_CLK_GATE = (1<<10), + AC_MCLK_GATE = (1<<11), ///// + I2C0_CLK_GATE = (1<<12), + UART0_CLK_GATE = (1<<13), + UART1_CLK_GATE = (1<<14), + //can't change + WDT_CLK_GATE = (1<<15), - PWM_CLK_GATE = (1<<16), - TMR0_CLK_GATE = (1<<17), - TMR1_CLK_GATE = (1<<18), - PTS_CLK_GATE = (1<<19), - MIPI_DPHY_CLK20M_GATE = (1<<20), - MIPI_P32_CLK_GATE = (1<<21), - PIX_CLK_GATE = (1<<22), //// - CIS_CLK_OUT_GATE = (1<<23), - I2S_SCLK_GATE = (1<<24), ////// - ETH_REF_CLK_GATE = (1<<25), - SADC_CLK_GATE = (1<<26), - I2C1_CLK_GATE = (1<<27), - ETH_RX_CLK_GATE = (1<<28), ///// - ETH_TX_CLK_GATE = (1<<29), ///// - ETH_RMII_CLK_GATE = (1<<30),//// + PWM_CLK_GATE = (1<<16), + TMR0_CLK_GATE = (1<<17), + TMR1_CLK_GATE = (1<<18), + PTS_CLK_GATE = (1<<19), + MIPI_DPHY_CLK20M_GATE = (1<<20), + MIPI_P32_CLK_GATE = (1<<21), + PIX_CLK_GATE = (1<<22), //// + CIS_CLK_OUT_GATE = (1<<23), + I2S_SCLK_GATE = (1<<24), ////// + ETH_REF_CLK_GATE = (1<<25), + SADC_CLK_GATE = (1<<26), + I2C1_CLK_GATE = (1<<27), + ETH_RX_CLK_GATE = (1<<28), ///// + ETH_TX_CLK_GATE = (1<<29), ///// + ETH_RMII_CLK_GATE = (1<<30),//// }; @@ -130,96 +130,96 @@ enum clk_gate_enum{ typedef void (*clk_update)(struct fh_clk* p_clk); //update func... -void clk_in_update(struct fh_clk* p_clk); -void pll1_clk_update(struct fh_clk* p_clk); -void pll0_clk_update(struct fh_clk* p_clk); +void clk_in_update(struct fh_clk* p_clk); +void pll1_clk_update(struct fh_clk* p_clk); +void pll0_clk_update(struct fh_clk* p_clk); void cis_pclk_update(struct fh_clk* p_clk); -void ddr_clk_update(struct fh_clk* p_clk); -void ddr_clk_update(struct fh_clk* p_clk); -void fclk_update(struct fh_clk* p_clk); -void aclk_update(struct fh_clk* p_clk); -void hclk_update(struct fh_clk* p_clk); -void pclk_update(struct fh_clk* p_clk); -void isp_aclk_update(struct fh_clk* p_clk); -void vcu_clk_update(struct fh_clk* p_clk); -void vou_clk_update(struct fh_clk* p_clk); -void mipi_p32_clk_update(struct fh_clk* p_clk); -void cis_clk_out_update(struct fh_clk* p_clk); -void pts_update(struct fh_clk* p_clk); -void mipi_pix_clk_update(struct fh_clk* p_clk); -void spi0_clk_update(struct fh_clk* p_clk); -void spi1_clk_update(struct fh_clk* p_clk); -void mipi_dphy_clk20m_update(struct fh_clk* p_clk); -void i2c0_clk_update(struct fh_clk* p_clk); -void i2c1_clk_update(struct fh_clk* p_clk); -void uart0_clk_update(struct fh_clk* p_clk); -void uart1_clk_update(struct fh_clk* p_clk); -void pwm_clk_update(struct fh_clk* p_clk); -void time0_clk_update(struct fh_clk* p_clk); -void time1_clk_update(struct fh_clk* p_clk); -void sadc_clk_update(struct fh_clk* p_clk); -void sdc0_clk2x_update(struct fh_clk* p_clk); -void sdc0_clk_update(struct fh_clk* p_clk); -void sdc0_clk_out_update(struct fh_clk* p_clk); -void sdc0_clk_sample_update(struct fh_clk* p_clk); -void sdc0_clk_drv_update(struct fh_clk* p_clk); -void sdc1_clk2x_update(struct fh_clk* p_clk); -void sdc1_clk_update(struct fh_clk* p_clk); -void sdc1_clk_out_update(struct fh_clk* p_clkt); -void sdc1_clk_sample_update(struct fh_clk* p_clk); -void sdc1_clk_drv_update(struct fh_clk* p_clk); -void eth_ref_clk_update(struct fh_clk* p_clk); -void wdt_clk_update(struct fh_clk* p_clk); +void ddr_clk_update(struct fh_clk* p_clk); +void ddr_clk_update(struct fh_clk* p_clk); +void fclk_update(struct fh_clk* p_clk); +void aclk_update(struct fh_clk* p_clk); +void hclk_update(struct fh_clk* p_clk); +void pclk_update(struct fh_clk* p_clk); +void isp_aclk_update(struct fh_clk* p_clk); +void vcu_clk_update(struct fh_clk* p_clk); +void vou_clk_update(struct fh_clk* p_clk); +void mipi_p32_clk_update(struct fh_clk* p_clk); +void cis_clk_out_update(struct fh_clk* p_clk); +void pts_update(struct fh_clk* p_clk); +void mipi_pix_clk_update(struct fh_clk* p_clk); +void spi0_clk_update(struct fh_clk* p_clk); +void spi1_clk_update(struct fh_clk* p_clk); +void mipi_dphy_clk20m_update(struct fh_clk* p_clk); +void i2c0_clk_update(struct fh_clk* p_clk); +void i2c1_clk_update(struct fh_clk* p_clk); +void uart0_clk_update(struct fh_clk* p_clk); +void uart1_clk_update(struct fh_clk* p_clk); +void pwm_clk_update(struct fh_clk* p_clk); +void time0_clk_update(struct fh_clk* p_clk); +void time1_clk_update(struct fh_clk* p_clk); +void sadc_clk_update(struct fh_clk* p_clk); +void sdc0_clk2x_update(struct fh_clk* p_clk); +void sdc0_clk_update(struct fh_clk* p_clk); +void sdc0_clk_out_update(struct fh_clk* p_clk); +void sdc0_clk_sample_update(struct fh_clk* p_clk); +void sdc0_clk_drv_update(struct fh_clk* p_clk); +void sdc1_clk2x_update(struct fh_clk* p_clk); +void sdc1_clk_update(struct fh_clk* p_clk); +void sdc1_clk_out_update(struct fh_clk* p_clkt); +void sdc1_clk_sample_update(struct fh_clk* p_clk); +void sdc1_clk_drv_update(struct fh_clk* p_clk); +void eth_ref_clk_update(struct fh_clk* p_clk); +void wdt_clk_update(struct fh_clk* p_clk); rt_int32_t check_pix_clk_source(rt_uint32_t offset,rt_uint32_t mask,rt_uint32_t *value); -void pix_update(struct fh_clk* p_clk); +void pix_update(struct fh_clk* p_clk); struct fh_clk_div{ //some has prediv.... //this two could have or...... -#define PRE_DIV_CAL_ALREADY (0x80000000) -#define PRE_DIV_ENABLE (0x01) -#define DIV_ENABLE (0x10) - rt_uint32_t div_flag; +#define PRE_DIV_CAL_ALREADY (0x80000000) +#define PRE_DIV_ENABLE (0x01) +#define DIV_ENABLE (0x10) + rt_uint32_t div_flag; - rt_uint32_t pdiv_value; + rt_uint32_t pdiv_value; - //rt_uint32_t hw_div_value; - rt_uint32_t sw_div_value; - rt_uint32_t sw_div_multi; - //rt_uint32_t clk_in_hz; - rt_uint32_t reg_offset; - rt_uint32_t reg_mask; - //rt_uint32_t rate; + //rt_uint32_t hw_div_value; + rt_uint32_t sw_div_value; + rt_uint32_t sw_div_multi; + //rt_uint32_t clk_in_hz; + rt_uint32_t reg_offset; + rt_uint32_t reg_mask; + //rt_uint32_t rate; }; struct fh_clk_mux{ -//#define MUX_LEVEL_1 (1) -//#define MUX_LEVEL_2 (2) -//#define MAX_MUX_LEVEL MUX_LEVEL_2 -// rt_uint32_t lev; -#define HAS_MUX (0) -#define HAS_NO_MUX (1) - rt_uint32_t mux_flag; - rt_uint32_t hw_mux_value; - rt_uint32_t sw_mux_value; - rt_uint32_t reg_offset; - rt_uint32_t reg_mask; +//#define MUX_LEVEL_1 (1) +//#define MUX_LEVEL_2 (2) +//#define MAX_MUX_LEVEL MUX_LEVEL_2 +// rt_uint32_t lev; +#define HAS_MUX (0) +#define HAS_NO_MUX (1) + rt_uint32_t mux_flag; + rt_uint32_t hw_mux_value; + rt_uint32_t sw_mux_value; + rt_uint32_t reg_offset; + rt_uint32_t reg_mask; }; struct fh_clk_gate{ -#define HAS_GATE (0) -#define HAS_NO_GATE (1) - rt_uint32_t gate_flag; -#define CLK_UNGATE (0) -#define CLK_GATE (1) - //rt_uint32_t hw_status; - rt_uint32_t sw_status; - //rt_uint32_t value; +#define HAS_GATE (0) +#define HAS_NO_GATE (1) + rt_uint32_t gate_flag; +#define CLK_UNGATE (0) +#define CLK_GATE (1) + //rt_uint32_t hw_status; + rt_uint32_t sw_status; + //rt_uint32_t value; - rt_uint32_t reg_offset; - rt_uint32_t reg_mask; + rt_uint32_t reg_offset; + rt_uint32_t reg_mask; }; @@ -234,7 +234,7 @@ struct fh_clk_gate{ * ***************/ struct fh_clk_level_1{ - rt_uint32_t clk_in_out; + rt_uint32_t clk_in_out; }; @@ -244,7 +244,7 @@ struct fh_clk_level_1{ * ***************/ struct fh_clk_level_2{ - rt_uint32_t clk_in_out; + rt_uint32_t clk_in_out; }; /*************** @@ -253,19 +253,19 @@ struct fh_clk_level_2{ * ***************/ struct fh_clk_level_3_ddr{ - //rt_uint32_t mux_level; + //rt_uint32_t mux_level; - struct fh_clk_mux mux[2]; - struct fh_clk_gate gate; - struct fh_clk_div div; + struct fh_clk_mux mux[2]; + struct fh_clk_gate gate; + struct fh_clk_div div; }; struct fh_clk_level_3_sdc{ -#define DIFF_REFERENCE (0x80000000) +#define DIFF_REFERENCE (0x80000000) - rt_uint32_t phase_diff; - rt_uint32_t reg_offset; - rt_uint32_t reg_mask; + rt_uint32_t phase_diff; + rt_uint32_t reg_offset; + rt_uint32_t reg_mask; }; @@ -274,26 +274,26 @@ struct fh_clk_level_3_gmac{ }; struct fh_clk_level_3_normal{ - struct fh_clk_mux mux; - struct fh_clk_gate gate; - struct fh_clk_div div; + struct fh_clk_mux mux; + struct fh_clk_gate gate; + struct fh_clk_div div; }; struct fh_clk_level_3 { -#define LEVEL_PERI_NORMAL (0x301) -#define LEVEL_PERI_DDR (0x302) -#define LEVEL_PERI_SDC (0x303) -#define LEVEL_PERI_GMAC (0x304) - rt_uint32_t peri_flag; - union - { - struct fh_clk_level_3_ddr ddr; - struct fh_clk_level_3_sdc sdc; - struct fh_clk_level_3_gmac gmac; - struct fh_clk_level_3_normal normal; - }obj; +#define LEVEL_PERI_NORMAL (0x301) +#define LEVEL_PERI_DDR (0x302) +#define LEVEL_PERI_SDC (0x303) +#define LEVEL_PERI_GMAC (0x304) + rt_uint32_t peri_flag; + union + { + struct fh_clk_level_3_ddr ddr; + struct fh_clk_level_3_sdc sdc; + struct fh_clk_level_3_gmac gmac; + struct fh_clk_level_3_normal normal; + }obj; }; @@ -301,34 +301,34 @@ struct fh_clk_level_3 { struct fh_clk { - char *name; -#define LEVEL_CRYSTAL (0x100) -#define LEVEL_PLL (0x200) -#define LEVEL_PERIPHERAL (0x300) - rt_uint32_t level; + char *name; +#define LEVEL_CRYSTAL (0x100) +#define LEVEL_PLL (0x200) +#define LEVEL_PERIPHERAL (0x300) + rt_uint32_t level; -#define ROOT_NODE (RT_NULL) - struct fh_clk *parent; +#define ROOT_NODE (RT_NULL) + struct fh_clk *parent; - union - { - struct fh_clk_level_1 crystal; - struct fh_clk_level_2 pll; - struct fh_clk_level_3 peri; - }clk; + union + { + struct fh_clk_level_1 crystal; + struct fh_clk_level_2 pll; + struct fh_clk_level_3 peri; + }clk; - rt_uint32_t clk_out_rate; -#define CLK_HAS_NO_GATE (0x80000000) - rt_uint32_t gate; + rt_uint32_t clk_out_rate; +#define CLK_HAS_NO_GATE (0x80000000) + rt_uint32_t gate; - clk_update update_func; + clk_update update_func; - //struct fh_clk_tree *p_tree; + //struct fh_clk_tree *p_tree; }; struct fh_clk_tree{ - rt_uint32_t c_base_addr; - struct fh_clk **clk_head; + rt_uint32_t c_base_addr; + struct fh_clk **clk_head; }; @@ -340,105 +340,105 @@ struct fh_clk_tree{ * * ********/ -#define CRYSTAL_HZ (24000000) +#define CRYSTAL_HZ (24000000) struct fh_clk clk_in = { - .name = "clk_in", - .level = LEVEL_CRYSTAL, - .parent = ROOT_NODE, - .clk.crystal.clk_in_out = CRYSTAL_HZ, - //.clk_out_rate = clk_in.clk.crystal.clk_in_out, - .clk_out_rate = CRYSTAL_HZ, - .update_func = clk_in_update, + .name = "clk_in", + .level = LEVEL_CRYSTAL, + .parent = ROOT_NODE, + .clk.crystal.clk_in_out = CRYSTAL_HZ, + //.clk_out_rate = clk_in.clk.crystal.clk_in_out, + .clk_out_rate = CRYSTAL_HZ, + .update_func = clk_in_update, }; -#define CIS_PCLK_HZ (108000000) +#define CIS_PCLK_HZ (108000000) struct fh_clk cis_pclk = { - .name = "cis_pclk", - .level = LEVEL_CRYSTAL, - .parent = ROOT_NODE, - .clk.crystal.clk_in_out = CIS_PCLK_HZ, - //.clk_out_rate = clk_in.clk.crystal.clk_in_out, - .clk_out_rate = CIS_PCLK_HZ, - .update_func = cis_pclk_update, + .name = "cis_pclk", + .level = LEVEL_CRYSTAL, + .parent = ROOT_NODE, + .clk.crystal.clk_in_out = CIS_PCLK_HZ, + //.clk_out_rate = clk_in.clk.crystal.clk_in_out, + .clk_out_rate = CIS_PCLK_HZ, + .update_func = cis_pclk_update, }; -#define PLL0_HZ (864000000) +#define PLL0_HZ (864000000) struct fh_clk pll0 = { - .name = "pll0", - .level = LEVEL_PLL, - .parent = &clk_in, - .clk.crystal.clk_in_out = PLL0_HZ, - //.clk_out_rate = pll0.clk.crystal.clk_in_out, - .clk_out_rate = PLL0_HZ, - .update_func = pll0_clk_update, + .name = "pll0", + .level = LEVEL_PLL, + .parent = &clk_in, + .clk.crystal.clk_in_out = PLL0_HZ, + //.clk_out_rate = pll0.clk.crystal.clk_in_out, + .clk_out_rate = PLL0_HZ, + .update_func = pll0_clk_update, }; -#define PLL1_HZ (600000000) +#define PLL1_HZ (600000000) struct fh_clk pll1 = { - .name = "pll1", - .level = LEVEL_PLL, - .parent = &clk_in, - .clk.crystal.clk_in_out = PLL1_HZ, - .clk_out_rate = PLL1_HZ, - .update_func = pll1_clk_update, + .name = "pll1", + .level = LEVEL_PLL, + .parent = &clk_in, + .clk.crystal.clk_in_out = PLL1_HZ, + .clk_out_rate = PLL1_HZ, + .update_func = pll1_clk_update, }; //NEED_CAUTION parent not fix... static struct fh_clk ddr_clk_normal = { - .name = "ddr_normal", - .level = LEVEL_PERIPHERAL, - //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_DDR, - //0:xtal_clk - //1:pll0_clk -#define MUX0_XTAL_CLK (0) -#define MUX0_PLL0_CLK (1) + .name = "ddr_normal", + .level = LEVEL_PERIPHERAL, + //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_DDR, + //0:xtal_clk + //1:pll0_clk +#define MUX0_XTAL_CLK (0) +#define MUX0_PLL0_CLK (1) - .clk.peri.obj.ddr.mux[0].reg_offset = REG_PMU_SYS_CTRL, - .clk.peri.obj.ddr.mux[0].reg_mask = 1<<0, + .clk.peri.obj.ddr.mux[0].reg_offset = REG_PMU_SYS_CTRL, + .clk.peri.obj.ddr.mux[0].reg_mask = 1<<0, - //0:pll0 clk default 864/2M - //1:pll1 clk default 600M -#define MUX1_PLL0_CLK (0) -#define MUX1_PLL1_CLK (1) - .clk.peri.obj.ddr.mux[1].reg_offset = REG_PMU_CLK_SEL, - .clk.peri.obj.ddr.mux[1].reg_mask = 1<<24, + //0:pll0 clk default 864/2M + //1:pll1 clk default 600M +#define MUX1_PLL0_CLK (0) +#define MUX1_PLL1_CLK (1) + .clk.peri.obj.ddr.mux[1].reg_offset = REG_PMU_CLK_SEL, + .clk.peri.obj.ddr.mux[1].reg_mask = 1<<24, - //gate - //.clk.peri.obj.ddr.gate.enable_status = CLK_ENABLE, + //gate + //.clk.peri.obj.ddr.gate.enable_status = CLK_ENABLE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.ddr.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.ddr.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.ddr.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.ddr.gate.sw_status = CLK_UNGATE, #endif - .clk.peri.obj.ddr.gate.gate_flag = HAS_GATE, - .clk.peri.obj.ddr.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.ddr.gate.reg_mask = MCLK_GATE, + .clk.peri.obj.ddr.gate.gate_flag = HAS_GATE, + .clk.peri.obj.ddr.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.ddr.gate.reg_mask = MCLK_GATE, - //div - //clk in maybe cry or pll - .clk.peri.obj.ddr.div.div_flag = DIV_ENABLE, - //.clk.peri.obj.ddr.div.pdiv_value = 2, + //div + //clk in maybe cry or pll + .clk.peri.obj.ddr.div.div_flag = DIV_ENABLE, + //.clk.peri.obj.ddr.div.pdiv_value = 2, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.ddr.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.ddr.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.ddr.div.sw_div_value = 1, + .clk.peri.obj.ddr.div.sw_div_value = 1, #endif - .clk.peri.obj.ddr.div.sw_div_multi =1, - .clk.peri.obj.ddr.div.reg_offset = REG_PMU_CLK_DIV1, - .clk.peri.obj.ddr.div.reg_mask = 0xff <<0, + .clk.peri.obj.ddr.div.sw_div_multi =1, + .clk.peri.obj.ddr.div.reg_offset = REG_PMU_CLK_DIV1, + .clk.peri.obj.ddr.div.reg_mask = 0xff <<0, - .update_func = ddr_clk_update, + .update_func = ddr_clk_update, }; @@ -450,121 +450,121 @@ static struct fh_clk ddr_clk_normal = { //NEED_CAUTION parent not fix... static struct fh_clk ddr_clk_div2 = { - .name = "ddr_div2", - .level = LEVEL_PERIPHERAL, - //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_DDR, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.ddr.mux[0].reg_offset = REG_PMU_SYS_CTRL, - .clk.peri.obj.ddr.mux[0].reg_mask = 1<<0, + .name = "ddr_div2", + .level = LEVEL_PERIPHERAL, + //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_DDR, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.ddr.mux[0].reg_offset = REG_PMU_SYS_CTRL, + .clk.peri.obj.ddr.mux[0].reg_mask = 1<<0, - //0:pll0 clk default 864/2M - //1:pll1 clk default 600M - .clk.peri.obj.ddr.mux[1].reg_offset = REG_PMU_CLK_SEL, - .clk.peri.obj.ddr.mux[1].reg_mask = 1<<24, + //0:pll0 clk default 864/2M + //1:pll1 clk default 600M + .clk.peri.obj.ddr.mux[1].reg_offset = REG_PMU_CLK_SEL, + .clk.peri.obj.ddr.mux[1].reg_mask = 1<<24, - //gate - //.clk.peri.obj.ddr.gate.enable_status = CLK_ENABLE, + //gate + //.clk.peri.obj.ddr.gate.enable_status = CLK_ENABLE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.ddr.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.ddr.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.ddr.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.ddr.gate.sw_status = CLK_UNGATE, #endif - .clk.peri.obj.ddr.gate.gate_flag = HAS_GATE, - .clk.peri.obj.ddr.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.ddr.gate.reg_mask = MCLK_GATE, + .clk.peri.obj.ddr.gate.gate_flag = HAS_GATE, + .clk.peri.obj.ddr.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.ddr.gate.reg_mask = MCLK_GATE, - //div - //clk in maybe cry or pll - .clk.peri.obj.ddr.div.div_flag = PRE_DIV_ENABLE | DIV_ENABLE, - .clk.peri.obj.ddr.div.pdiv_value = 2, + //div + //clk in maybe cry or pll + .clk.peri.obj.ddr.div.div_flag = PRE_DIV_ENABLE | DIV_ENABLE, + .clk.peri.obj.ddr.div.pdiv_value = 2, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.ddr.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.ddr.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.ddr.div.sw_div_value = 1, + .clk.peri.obj.ddr.div.sw_div_value = 1, #endif - .clk.peri.obj.ddr.div.sw_div_multi =1, - .clk.peri.obj.ddr.div.reg_offset = REG_PMU_CLK_DIV1, - .clk.peri.obj.ddr.div.reg_mask = 0xff <<0, + .clk.peri.obj.ddr.div.sw_div_multi =1, + .clk.peri.obj.ddr.div.reg_offset = REG_PMU_CLK_DIV1, + .clk.peri.obj.ddr.div.reg_mask = 0xff <<0, - .update_func = ddr_clk_update, + .update_func = ddr_clk_update, }; static struct fh_clk cpu_fclk = { - .name = "cpu_fclk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "cpu_fclk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, - .clk.peri.obj.normal.mux.reg_mask = 1<<0, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, + .clk.peri.obj.normal.mux.reg_mask = 1<<0, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE, - //.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - //.clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE, + //.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + //.clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE, - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 0, + .clk.peri.obj.normal.div.sw_div_value = 0, #endif - .clk.peri.obj.normal.div.sw_div_multi =1, - .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0, - .clk.peri.obj.normal.div.reg_mask = 0xff << 0, + .clk.peri.obj.normal.div.sw_div_multi =1, + .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0, + .clk.peri.obj.normal.div.reg_mask = 0xff << 0, - .update_func = fclk_update, + .update_func = fclk_update, }; //NEED_CAUTION parent not fix... static struct fh_clk cpu_aclk = { - .name = "cpu_aclk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "cpu_aclk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, -// .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, -// .clk.peri.obj.normal.mux.reg_mask = 1<<0, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, +// .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, +// .clk.peri.obj.normal.mux.reg_mask = 1<<0, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE, - //div - .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.pdiv_value = 2, -// .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0, -// .clk.peri.obj.normal.div.reg_mask = 0xff << 0, + //div + .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.pdiv_value = 2, +// .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0, +// .clk.peri.obj.normal.div.reg_mask = 0xff << 0, - .update_func = aclk_update, + .update_func = aclk_update, }; @@ -572,282 +572,282 @@ static struct fh_clk cpu_aclk = { static struct fh_clk cpu_hclk = { - .name = "cpu_hclk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "cpu_hclk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, - .clk.peri.obj.normal.mux.reg_mask = 1<<0, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, + .clk.peri.obj.normal.mux.reg_mask = 1<<0, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE, - //.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - //.clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE, + //.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + //.clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE, - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 1, + .clk.peri.obj.normal.div.sw_div_value = 1, #endif - .clk.peri.obj.normal.div.sw_div_multi =1, - .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0, - .clk.peri.obj.normal.div.reg_mask = 0xff << 16, + .clk.peri.obj.normal.div.sw_div_multi =1, + .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0, + .clk.peri.obj.normal.div.reg_mask = 0xff << 16, - .update_func = hclk_update, + .update_func = hclk_update, }; //NEED_CAUTION parent not fix... static struct fh_clk cpu_pclk = { - .name = "cpu_pclk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "cpu_pclk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = HCLK_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = HCLK_GATE, - //div - .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.pdiv_value = 2, -// .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0, -// .clk.peri.obj.normal.div.reg_mask = 0xff << 0, + //div + .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.pdiv_value = 2, +// .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0, +// .clk.peri.obj.normal.div.reg_mask = 0xff << 0, - .update_func = pclk_update, + .update_func = pclk_update, }; //NEED_CAUTION parent not fix... static struct fh_clk isp_aclk = { - .name = "isp_aclk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "isp_aclk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, - .clk.peri.obj.normal.mux.reg_mask = 1<<0, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, + .clk.peri.obj.normal.mux.reg_mask = 1<<0, - //gate - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = ISP_ACLK_GATE, - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + //gate + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = ISP_ACLK_GATE, + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV0, - .clk.peri.obj.normal.div.reg_mask = 0x03 << 8, - .clk.peri.obj.normal.div.sw_div_multi =1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV0, + .clk.peri.obj.normal.div.reg_mask = 0x03 << 8, + .clk.peri.obj.normal.div.sw_div_multi =1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 1, + .clk.peri.obj.normal.div.sw_div_value = 1, #endif - .update_func = isp_aclk_update, + .update_func = isp_aclk_update, }; // ////NEED_CAUTION parent not fix... static struct fh_clk vcu_clk = { - .name = "vcu_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "vcu_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, - .clk.peri.obj.normal.mux.reg_mask = 1<<0, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, + .clk.peri.obj.normal.mux.reg_mask = 1<<0, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = VCU_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = VCU_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV0, - .clk.peri.obj.normal.div.reg_mask = 0x03 << 24, - .clk.peri.obj.normal.div.sw_div_multi =1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV0, + .clk.peri.obj.normal.div.reg_mask = 0x03 << 24, + .clk.peri.obj.normal.div.sw_div_multi =1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 1, + .clk.peri.obj.normal.div.sw_div_value = 1, #endif - .update_func = vcu_clk_update, + .update_func = vcu_clk_update, }; static struct fh_clk vou_clk = { - .name = "vou_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "vou_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, - .clk.peri.obj.normal.mux.reg_mask = 1<<0, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, + .clk.peri.obj.normal.mux.reg_mask = 1<<0, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = VOU_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = VOU_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV1, - .clk.peri.obj.normal.div.reg_mask = 0x3f << 8, - .clk.peri.obj.normal.div.sw_div_multi =1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV1, + .clk.peri.obj.normal.div.reg_mask = 0x3f << 8, + .clk.peri.obj.normal.div.sw_div_multi =1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 1, + .clk.peri.obj.normal.div.sw_div_value = 1, #endif - .update_func = vou_clk_update, + .update_func = vou_clk_update, }; static struct fh_clk mipi_p32_clk = { - .name = "mipi_p32_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "mipi_p32_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, - .clk.peri.obj.normal.mux.reg_mask = 1<<0, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, + .clk.peri.obj.normal.mux.reg_mask = 1<<0, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = MIPI_P32_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = MIPI_P32_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2, - .clk.peri.obj.normal.div.reg_mask = 0x0f << 16, - .clk.peri.obj.normal.div.sw_div_multi =1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2, + .clk.peri.obj.normal.div.reg_mask = 0x0f << 16, + .clk.peri.obj.normal.div.sw_div_multi =1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 1, + .clk.peri.obj.normal.div.sw_div_value = 1, #endif - .update_func = mipi_p32_clk_update, + .update_func = mipi_p32_clk_update, }; static struct fh_clk cis_clk_out = { - .name = "cis_clk_out", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "cis_clk_out", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, - .clk.peri.obj.normal.mux.reg_mask = 1<<0, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, + .clk.peri.obj.normal.mux.reg_mask = 1<<0, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = CIS_CLK_OUT_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = CIS_CLK_OUT_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV1, - .clk.peri.obj.normal.div.reg_mask = 0xff << 16, - .clk.peri.obj.normal.div.sw_div_multi =1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV1, + .clk.peri.obj.normal.div.reg_mask = 0xff << 16, + .clk.peri.obj.normal.div.sw_div_multi =1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 3, + .clk.peri.obj.normal.div.sw_div_value = 3, #endif - .update_func = cis_clk_out_update, + .update_func = cis_clk_out_update, }; @@ -855,43 +855,43 @@ static struct fh_clk cis_clk_out = { static struct fh_clk pts_clk = { - .name = "pts_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "pts_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, - .clk.peri.obj.normal.mux.reg_mask = 1<<0, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, + .clk.peri.obj.normal.mux.reg_mask = 1<<0, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = PTS_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = PTS_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2, - .clk.peri.obj.normal.div.reg_mask = 0xff << 0, - .clk.peri.obj.normal.div.sw_div_multi =1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2, + .clk.peri.obj.normal.div.reg_mask = 0xff << 0, + .clk.peri.obj.normal.div.sw_div_multi =1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 35, + .clk.peri.obj.normal.div.sw_div_value = 35, #endif - .clk.peri.obj.normal.div.pdiv_value = 12, + .clk.peri.obj.normal.div.pdiv_value = 12, - .update_func = pts_update, + .update_func = pts_update, }; @@ -899,31 +899,31 @@ static struct fh_clk pts_clk = { static struct fh_clk mipi_pix_clk = { - .name = "mipi_pix_clk_i", - .level = LEVEL_PERIPHERAL, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "mipi_pix_clk_i", + .level = LEVEL_PERIPHERAL, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk - .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, - .clk.peri.obj.normal.mux.reg_mask = 1<<0, + //0:xtal_clk + //1:pll0_clk + .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL, + .clk.peri.obj.normal.mux.reg_mask = 1<<0, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE, - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2, - .clk.peri.obj.normal.div.reg_mask = 0x0f << 24, - .clk.peri.obj.normal.div.sw_div_multi =1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2, + .clk.peri.obj.normal.div.reg_mask = 0x0f << 24, + .clk.peri.obj.normal.div.sw_div_multi =1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 3, + .clk.peri.obj.normal.div.sw_div_value = 3, #endif - .update_func = mipi_pix_clk_update, + .update_func = mipi_pix_clk_update, }; @@ -931,37 +931,37 @@ static struct fh_clk mipi_pix_clk = { static struct fh_clk pix_clk = { - .name = "pix_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "pix_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - //0:xtal_clk - //1:pll0_clk -#define CIS_PIX_CLK (0) -#define CIS_PIX_CLK_OPPOSITE (1) -#define MIPI_PIX_CLK (2) + //0:xtal_clk + //1:pll0_clk +#define CIS_PIX_CLK (0) +#define CIS_PIX_CLK_OPPOSITE (1) +#define MIPI_PIX_CLK (2) - .clk.peri.obj.normal.mux.reg_offset = REG_PMU_CLK_SEL, - .clk.peri.obj.normal.mux.reg_mask = 3<<4, + .clk.peri.obj.normal.mux.reg_offset = REG_PMU_CLK_SEL, + .clk.peri.obj.normal.mux.reg_mask = 3<<4, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = PIX_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = PIX_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = 0, + //div + .clk.peri.obj.normal.div.div_flag = 0, - .update_func = pix_update, + .update_func = pix_update, }; @@ -971,41 +971,41 @@ static struct fh_clk pix_clk = { static struct fh_clk spi0_clk = { - .name = "spi0_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "spi0_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = SPI0_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = SPI0_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3, - .clk.peri.obj.normal.div.reg_mask = 0xff << 0, - .clk.peri.obj.normal.div.sw_div_multi =1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3, + .clk.peri.obj.normal.div.reg_mask = 0xff << 0, + .clk.peri.obj.normal.div.sw_div_multi =1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 11, + .clk.peri.obj.normal.div.sw_div_value = 11, #endif - .update_func = spi0_clk_update, + .update_func = spi0_clk_update, }; @@ -1013,46 +1013,46 @@ static struct fh_clk spi0_clk = { static struct fh_clk spi1_clk = { - .name = "spi1_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "spi1_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = SPI1_CLK_GATE, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = SPI1_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3, - .clk.peri.obj.normal.div.reg_mask = 0xff << 16, - .clk.peri.obj.normal.div.sw_div_multi =1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3, + .clk.peri.obj.normal.div.reg_mask = 0xff << 16, + .clk.peri.obj.normal.div.sw_div_multi =1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 11, + .clk.peri.obj.normal.div.sw_div_value = 11, #endif #ifdef RT_USING_SPI1 - .clk.peri.obj.normal.div.sw_div_value = 11, + .clk.peri.obj.normal.div.sw_div_value = 11, #endif - .update_func = spi1_clk_update, + .update_func = spi1_clk_update, }; @@ -1060,200 +1060,200 @@ static struct fh_clk spi1_clk = { static struct fh_clk mipi_dphy_clk20m = { - .name = "mipi_dphy_clk20m", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "mipi_dphy_clk20m", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = MIPI_DPHY_CLK20M_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = MIPI_DPHY_CLK20M_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE, -// .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3, -// .clk.peri.obj.normal.div.reg_mask = 0xff << 16, - .clk.peri.obj.normal.div.sw_div_multi =1, - .clk.peri.obj.normal.div.pdiv_value = 30, -// .clk.peri.obj.normal.div.sw_div_value = 11, + //div + .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE, +// .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3, +// .clk.peri.obj.normal.div.reg_mask = 0xff << 16, + .clk.peri.obj.normal.div.sw_div_multi =1, + .clk.peri.obj.normal.div.pdiv_value = 30, +// .clk.peri.obj.normal.div.sw_div_value = 11, - .update_func = mipi_dphy_clk20m_update, + .update_func = mipi_dphy_clk20m_update, }; static struct fh_clk i2c0_clk = { - .name = "i2c0_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "i2c0_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = I2C0_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = I2C0_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4, - .clk.peri.obj.normal.div.reg_mask = 0x3f << 16, - .clk.peri.obj.normal.div.sw_div_multi = 1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4, + .clk.peri.obj.normal.div.reg_mask = 0x3f << 16, + .clk.peri.obj.normal.div.sw_div_multi = 1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 1, + .clk.peri.obj.normal.div.sw_div_value = 1, #endif - .clk.peri.obj.normal.div.pdiv_value = 20, + .clk.peri.obj.normal.div.pdiv_value = 20, - .update_func = i2c0_clk_update, + .update_func = i2c0_clk_update, }; static struct fh_clk i2c1_clk = { - .name = "i2c1_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "i2c1_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = I2C1_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = I2C1_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4, - .clk.peri.obj.normal.div.reg_mask = 0x3f << 24, - .clk.peri.obj.normal.div.sw_div_multi = 1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4, + .clk.peri.obj.normal.div.reg_mask = 0x3f << 24, + .clk.peri.obj.normal.div.sw_div_multi = 1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 1, + .clk.peri.obj.normal.div.sw_div_value = 1, #endif - .clk.peri.obj.normal.div.pdiv_value = 20, + .clk.peri.obj.normal.div.pdiv_value = 20, - .update_func = i2c1_clk_update, + .update_func = i2c1_clk_update, }; static struct fh_clk uart0_clk = { - .name = "uart0_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "uart0_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = UART0_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = UART0_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4, - .clk.peri.obj.normal.div.reg_mask = 0x1f << 0, - .clk.peri.obj.normal.div.sw_div_multi = 1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4, + .clk.peri.obj.normal.div.reg_mask = 0x1f << 0, + .clk.peri.obj.normal.div.sw_div_multi = 1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 1, + .clk.peri.obj.normal.div.sw_div_value = 1, #endif - .clk.peri.obj.normal.div.pdiv_value = 10, + .clk.peri.obj.normal.div.pdiv_value = 10, - .update_func = uart0_clk_update, + .update_func = uart0_clk_update, }; static struct fh_clk uart1_clk = { - .name = "uart1_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "uart1_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = UART1_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = UART1_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4, - .clk.peri.obj.normal.div.reg_mask = 0x1f << 8, - .clk.peri.obj.normal.div.sw_div_multi = 1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4, + .clk.peri.obj.normal.div.reg_mask = 0x1f << 8, + .clk.peri.obj.normal.div.sw_div_multi = 1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 1, + .clk.peri.obj.normal.div.sw_div_value = 1, #endif - .clk.peri.obj.normal.div.pdiv_value = 10, + .clk.peri.obj.normal.div.pdiv_value = 10, - .update_func = uart1_clk_update, + .update_func = uart1_clk_update, }; @@ -1261,131 +1261,131 @@ static struct fh_clk uart1_clk = { static struct fh_clk pwm_clk = { - .name = "pwm_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "pwm_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = PWM_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = PWM_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5, - .clk.peri.obj.normal.div.reg_mask = 0x3f << 0, - .clk.peri.obj.normal.div.sw_div_multi = 1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5, + .clk.peri.obj.normal.div.reg_mask = 0x3f << 0, + .clk.peri.obj.normal.div.sw_div_multi = 1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 29, + .clk.peri.obj.normal.div.sw_div_value = 29, #endif - .clk.peri.obj.normal.div.pdiv_value = 20, + .clk.peri.obj.normal.div.pdiv_value = 20, - .update_func = pwm_clk_update, + .update_func = pwm_clk_update, }; static struct fh_clk time0_clk = { - .name = "time0_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "time0_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = TMR0_CLK_GATE, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = TMR0_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5, - .clk.peri.obj.normal.div.reg_mask = 0x3f << 16, - .clk.peri.obj.normal.div.sw_div_multi = 1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5, + .clk.peri.obj.normal.div.reg_mask = 0x3f << 16, + .clk.peri.obj.normal.div.sw_div_multi = 1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 29, + .clk.peri.obj.normal.div.sw_div_value = 29, #endif - .clk.peri.obj.normal.div.pdiv_value = 20, + .clk.peri.obj.normal.div.pdiv_value = 20, - .update_func = time0_clk_update, + .update_func = time0_clk_update, }; static struct fh_clk time1_clk = { - .name = "time1_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, + .name = "time1_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = TMR1_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = TMR1_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5, - .clk.peri.obj.normal.div.reg_mask = 0x3f << 24, - .clk.peri.obj.normal.div.sw_div_multi = 1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5, + .clk.peri.obj.normal.div.reg_mask = 0x3f << 24, + .clk.peri.obj.normal.div.sw_div_multi = 1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 29, + .clk.peri.obj.normal.div.sw_div_value = 29, #endif - .clk.peri.obj.normal.div.pdiv_value = 20, + .clk.peri.obj.normal.div.pdiv_value = 20, - .update_func = time1_clk_update, + .update_func = time1_clk_update, }; @@ -1393,227 +1393,227 @@ static struct fh_clk time1_clk = { static struct fh_clk sadc_clk = { - .name = "sadc_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "sadc_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = SADC_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = SADC_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.sw_div_multi = 1, - .clk.peri.obj.normal.div.pdiv_value = 120, + //div + .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.sw_div_multi = 1, + .clk.peri.obj.normal.div.pdiv_value = 120, - .update_func = sadc_clk_update, + .update_func = sadc_clk_update, }; static struct fh_clk sdc0_clk2x = { - .name = "sdc0_clk2x", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "sdc0_clk2x", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = SDC0_CLK_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = SDC0_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3, - .clk.peri.obj.normal.div.reg_mask = 0x0f << 8, - .clk.peri.obj.normal.div.sw_div_multi = 1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3, + .clk.peri.obj.normal.div.reg_mask = 0x0f << 8, + .clk.peri.obj.normal.div.sw_div_multi = 1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 5, + .clk.peri.obj.normal.div.sw_div_value = 5, #endif - .clk.peri.obj.normal.div.pdiv_value = 2, + .clk.peri.obj.normal.div.pdiv_value = 2, - .update_func = sdc0_clk2x_update, + .update_func = sdc0_clk2x_update, }; static struct fh_clk sdc0_clk = { - .name = "sdc0_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_SDC, - .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0 | DIFF_REFERENCE, -// .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, -// .clk.peri.obj.sdc.reg_mask = 0x0, + .name = "sdc0_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_SDC, + .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0 | DIFF_REFERENCE, +// .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, +// .clk.peri.obj.sdc.reg_mask = 0x0, - .update_func = sdc0_clk_update, + .update_func = sdc0_clk_update, }; static struct fh_clk sdc0_clk_out = { - .name = "sdc0_clk_out", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_SDC, - .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, -// .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, -// .clk.peri.obj.sdc.reg_mask = 0x0, + .name = "sdc0_clk_out", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_SDC, + .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, +// .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, +// .clk.peri.obj.sdc.reg_mask = 0x0, - .update_func = sdc0_clk_out_update, + .update_func = sdc0_clk_out_update, }; static struct fh_clk sdc0_clk_sample = { - .name = "sdc0_clk_sample", - .level = LEVEL_PERIPHERAL, + .name = "sdc0_clk_sample", + .level = LEVEL_PERIPHERAL, - .clk.peri.peri_flag = LEVEL_PERI_SDC, - .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, - .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, - .clk.peri.obj.sdc.reg_mask = 3<16, + .clk.peri.peri_flag = LEVEL_PERI_SDC, + .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, + .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, + .clk.peri.obj.sdc.reg_mask = 3<16, - .update_func = sdc0_clk_sample_update, + .update_func = sdc0_clk_sample_update, }; static struct fh_clk sdc0_clk_drive = { - .name = "sdc0_clk_drive", - .level = LEVEL_PERIPHERAL, + .name = "sdc0_clk_drive", + .level = LEVEL_PERIPHERAL, - .clk.peri.peri_flag = LEVEL_PERI_SDC, - .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, - .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, - .clk.peri.obj.sdc.reg_mask = 3<20, + .clk.peri.peri_flag = LEVEL_PERI_SDC, + .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, + .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, + .clk.peri.obj.sdc.reg_mask = 3<20, - .update_func = sdc0_clk_drv_update, + .update_func = sdc0_clk_drv_update, }; static struct fh_clk sdc1_clk2x = { - .name = "sdc1_clk2x", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "sdc1_clk2x", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = SDC1_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = SDC1_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3, - .clk.peri.obj.normal.div.reg_mask = 0x0f << 24, - .clk.peri.obj.normal.div.sw_div_multi = 1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3, + .clk.peri.obj.normal.div.reg_mask = 0x0f << 24, + .clk.peri.obj.normal.div.sw_div_multi = 1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 5, + .clk.peri.obj.normal.div.sw_div_value = 5, #endif - .clk.peri.obj.normal.div.pdiv_value = 2, + .clk.peri.obj.normal.div.pdiv_value = 2, - .update_func = sdc1_clk2x_update, + .update_func = sdc1_clk2x_update, }; static struct fh_clk sdc1_clk = { - .name = "sdc1_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_SDC, - .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0 | DIFF_REFERENCE, -// .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, -// .clk.peri.obj.sdc.reg_mask = 0x0, + .name = "sdc1_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_SDC, + .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0 | DIFF_REFERENCE, +// .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, +// .clk.peri.obj.sdc.reg_mask = 0x0, - .update_func = sdc1_clk_update, + .update_func = sdc1_clk_update, }; static struct fh_clk sdc1_clk_out = { - .name = "sdc1_clk_out", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_SDC, - .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, -// .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, -// .clk.peri.obj.sdc.reg_mask = 0x0, + .name = "sdc1_clk_out", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_SDC, + .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, +// .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, +// .clk.peri.obj.sdc.reg_mask = 0x0, - .update_func = sdc1_clk_out_update, + .update_func = sdc1_clk_out_update, }; static struct fh_clk sdc1_clk_sample = { - .name = "sdc1_clk_sample", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_SDC, - .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, - .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, - .clk.peri.obj.sdc.reg_mask = 3<8, + .name = "sdc1_clk_sample", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_SDC, + .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, + .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, + .clk.peri.obj.sdc.reg_mask = 3<8, - .update_func = sdc1_clk_sample_update, + .update_func = sdc1_clk_sample_update, }; static struct fh_clk sdc1_clk_drive = { - .name = "sdc1_clk_drive", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_SDC, - .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, - .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, - .clk.peri.obj.sdc.reg_mask = 3<12, + .name = "sdc1_clk_drive", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_SDC, + .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0, + .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL, + .clk.peri.obj.sdc.reg_mask = 3<12, - .update_func = sdc1_clk_drv_update, + .update_func = sdc1_clk_drv_update, }; @@ -1621,826 +1621,826 @@ static struct fh_clk sdc1_clk_drive = { static struct fh_clk eth_ref_clk = { - .name = "eth_ref_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .name = "eth_ref_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, - .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, - .clk.peri.obj.normal.gate.reg_mask = ETH_REF_CLK_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_GATE, + .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE, + .clk.peri.obj.normal.gate.reg_mask = ETH_REF_CLK_GATE, #ifdef FH_CLK_GATE_DEFAULT - .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, + .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE, #else - .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, + .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE, #endif - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV6, - .clk.peri.obj.normal.div.reg_mask = 0x0f << 24, - .clk.peri.obj.normal.div.sw_div_multi = 1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV6, + .clk.peri.obj.normal.div.reg_mask = 0x0f << 24, + .clk.peri.obj.normal.div.sw_div_multi = 1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 5, + .clk.peri.obj.normal.div.sw_div_value = 5, #endif - .clk.peri.obj.normal.div.pdiv_value = 2, + .clk.peri.obj.normal.div.pdiv_value = 2, - .update_func = eth_ref_clk_update, + .update_func = eth_ref_clk_update, }; static struct fh_clk wdt_clk = { - .name = "wdt_clk", - .level = LEVEL_PERIPHERAL, -// //.parent = &clk_in, - .clk.peri.peri_flag = LEVEL_PERI_NORMAL, - .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, + .name = "wdt_clk", + .level = LEVEL_PERIPHERAL, +// //.parent = &clk_in, + .clk.peri.peri_flag = LEVEL_PERI_NORMAL, + .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX, - //gate - .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE, + //gate + .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE, - //div - .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, - .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5, - .clk.peri.obj.normal.div.reg_mask = 0x3f << 8, - .clk.peri.obj.normal.div.sw_div_multi = 1, + //div + .clk.peri.obj.normal.div.div_flag = DIV_ENABLE, + .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5, + .clk.peri.obj.normal.div.reg_mask = 0x3f << 8, + .clk.peri.obj.normal.div.sw_div_multi = 1, #ifdef FH_CLK_DIV_DEFAULT - .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, + .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE, #else - .clk.peri.obj.normal.div.sw_div_value = 29, + .clk.peri.obj.normal.div.sw_div_value = 29, #endif - .update_func = wdt_clk_update, + .update_func = wdt_clk_update, }; struct fh_clk *fh_clk_array[] = { - &clk_in, - &cis_pclk, - &pll0, - &pll1, - &ddr_clk_normal, - &ddr_clk_div2, - &cpu_fclk, - &cpu_aclk, - &cpu_hclk, - &cpu_pclk, - &isp_aclk, - &vcu_clk, - &vou_clk, - &mipi_p32_clk, - &cis_clk_out, - &pts_clk, - &mipi_pix_clk, - &pix_clk, + &clk_in, + &cis_pclk, + &pll0, + &pll1, + &ddr_clk_normal, + &ddr_clk_div2, + &cpu_fclk, + &cpu_aclk, + &cpu_hclk, + &cpu_pclk, + &isp_aclk, + &vcu_clk, + &vou_clk, + &mipi_p32_clk, + &cis_clk_out, + &pts_clk, + &mipi_pix_clk, + &pix_clk, - //pll1 - &sdc0_clk2x, - &sdc0_clk, - &sdc0_clk_out, - &sdc0_clk_sample, - &sdc0_clk_drive, + //pll1 + &sdc0_clk2x, + &sdc0_clk, + &sdc0_clk_out, + &sdc0_clk_sample, + &sdc0_clk_drive, - &sdc1_clk2x, - &sdc1_clk, - &sdc1_clk_out, - &sdc1_clk_sample, - &sdc1_clk_drive, + &sdc1_clk2x, + &sdc1_clk, + &sdc1_clk_out, + &sdc1_clk_sample, + &sdc1_clk_drive, - &spi0_clk, - &spi1_clk, - &mipi_dphy_clk20m, - &i2c0_clk, - &i2c1_clk, - &uart0_clk, - &uart1_clk, - &pwm_clk, - &time0_clk, - &time1_clk, - &sadc_clk, - ð_ref_clk, + &spi0_clk, + &spi1_clk, + &mipi_dphy_clk20m, + &i2c0_clk, + &i2c1_clk, + &uart0_clk, + &uart1_clk, + &pwm_clk, + &time0_clk, + &time1_clk, + &sadc_clk, + ð_ref_clk, - &wdt_clk, + &wdt_clk, }; static inline rt_int32_t wrap_read_reg(rt_uint32_t offset, rt_uint32_t mask, - rt_uint32_t *value) + rt_uint32_t *value) { - rt_uint32_t temp_v, temp_shift; + rt_uint32_t temp_v, temp_shift; - /* if(fh_pmu_status() == PMU_STATUS_CLOSE) - return -1;*/ - temp_v = FH_TIMER_READL(offset); - temp_v &= mask; - temp_shift = __rt_ffs(mask); - temp_v = temp_v >> (temp_shift - 1); - *value = temp_v; - return 0; + /* if(fh_pmu_status() == PMU_STATUS_CLOSE) + return -1;*/ + temp_v = FH_TIMER_READL(offset); + temp_v &= mask; + temp_shift = __rt_ffs(mask); + temp_v = temp_v >> (temp_shift - 1); + *value = temp_v; + return 0; } static inline rt_int32_t wrap_write_reg(rt_uint32_t offset, rt_uint32_t mask, - rt_uint32_t value) + rt_uint32_t value) { - rt_uint32_t temp_v, temp_shift; + rt_uint32_t temp_v, temp_shift; - /* - if(fh_pmu_status() == PMU_STATUS_CLOSE) - return -1; - */ + /* + if(fh_pmu_status() == PMU_STATUS_CLOSE) + return -1; + */ - temp_v = FH_TIMER_READL(offset); - temp_v &= ~mask; - temp_shift = __rt_ffs(mask); - temp_v |= value << (temp_shift - 1); - FH_TIMER_WRITEL(offset, temp_v); - return 0; + temp_v = FH_TIMER_READL(offset); + temp_v &= ~mask; + temp_shift = __rt_ffs(mask); + temp_v |= value << (temp_shift - 1); + FH_TIMER_WRITEL(offset, temp_v); + return 0; } rt_int32_t check_pix_clk_source(rt_uint32_t offset, rt_uint32_t mask, - rt_uint32_t *value) + rt_uint32_t *value) { - rt_uint32_t mux0; - rt_int32_t ret; - ret = wrap_read_reg(offset, mask, &mux0); + rt_uint32_t mux0; + rt_int32_t ret; + ret = wrap_read_reg(offset, mask, &mux0); - if (ret != 0) { - return ret; - } + if (ret != 0) { + return ret; + } - *value = mux0; - return 0; + *value = mux0; + return 0; } rt_int32_t check_xtal_pll0(rt_uint32_t offset, rt_uint32_t mask, - rt_uint32_t *value) + rt_uint32_t *value) { - rt_uint32_t mux0; - rt_int32_t ret; - ret = wrap_read_reg(offset, mask, &mux0); + rt_uint32_t mux0; + rt_int32_t ret; + ret = wrap_read_reg(offset, mask, &mux0); - if (ret != 0) { - return ret; - } - if (mux0 == MUX0_PLL0_CLK) - *value = MUX0_PLL0_CLK; - else - *value = MUX0_XTAL_CLK; + if (ret != 0) { + return ret; + } + if (mux0 == MUX0_PLL0_CLK) + *value = MUX0_PLL0_CLK; + else + *value = MUX0_XTAL_CLK; - return 0; + return 0; } void cal_pll0_prediv(rt_uint32_t *div_flag, rt_uint32_t *pre_value) { - if (!(*div_flag & PRE_DIV_CAL_ALREADY)) { - //before has got the prediv value.. - if (*div_flag & PRE_DIV_ENABLE) { + if (!(*div_flag & PRE_DIV_CAL_ALREADY)) { + //before has got the prediv value.. + if (*div_flag & PRE_DIV_ENABLE) { - *pre_value *= 2; - } else { - *pre_value = 2; - } - *div_flag |= PRE_DIV_ENABLE | PRE_DIV_CAL_ALREADY; - } + *pre_value *= 2; + } else { + *pre_value = 2; + } + *div_flag |= PRE_DIV_ENABLE | PRE_DIV_CAL_ALREADY; + } } rt_int32_t sw_div_process(rt_uint32_t div_flag, rt_uint32_t offset, - rt_uint32_t mask, rt_uint32_t *div_value) + rt_uint32_t mask, rt_uint32_t *div_value) { - //rt_kprintf("----------div go----------\n"); - rt_uint32_t div; - rt_int32_t ret; - if (div_flag & DIV_ENABLE) { - ret = wrap_read_reg(offset, mask, &div); - if (ret != 0) { - return ret; - } + //rt_kprintf("----------div go----------\n"); + rt_uint32_t div; + rt_int32_t ret; + if (div_flag & DIV_ENABLE) { + ret = wrap_read_reg(offset, mask, &div); + if (ret != 0) { + return ret; + } // -// rt_kprintf("hw value is %x\n",div); -// rt_kprintf("sw value is %x\n",div_value); +// rt_kprintf("hw value is %x\n",div); +// rt_kprintf("sw value is %x\n",div_value); // -// rt_kprintf("offset is %x,value :%x\n",offset + 0xf0000000,*(rt_uint32_t*)(offset + 0xf0000000)); -// rt_kprintf("mask is %x\n",mask); +// rt_kprintf("offset is %x,value :%x\n",offset + 0xf0000000,*(rt_uint32_t*)(offset + 0xf0000000)); +// rt_kprintf("mask is %x\n",mask); - //if use the hw default value.... + //if use the hw default value.... - if (*div_value == FH_CLK_DIV_DEFAULT_VALUE) { - *div_value = div; - return 0; - } + if (*div_value == FH_CLK_DIV_DEFAULT_VALUE) { + *div_value = div; + return 0; + } - if (div != *div_value) { - ret = wrap_write_reg(offset, mask, *div_value); - if (ret != 0) { - return ret; - } - } - } - //rt_kprintf("----------div done----------\n"); - return 0; - //*div_flag |= PRE_DIV_ENABLE; + if (div != *div_value) { + ret = wrap_write_reg(offset, mask, *div_value); + if (ret != 0) { + return ret; + } + } + } + //rt_kprintf("----------div done----------\n"); + return 0; + //*div_flag |= PRE_DIV_ENABLE; } void cal_baud_hz(rt_uint32_t clk_in, rt_uint32_t div_flag, rt_uint32_t pre_div, - rt_uint32_t div, rt_uint32_t div_multi, rt_uint32_t *baud_out) + rt_uint32_t div, rt_uint32_t div_multi, rt_uint32_t *baud_out) { - //div += 1; - if (div_flag & PRE_DIV_ENABLE) { - *baud_out = (clk_in / pre_div); - } else { - *baud_out = clk_in; - } + //div += 1; + if (div_flag & PRE_DIV_ENABLE) { + *baud_out = (clk_in / pre_div); + } else { + *baud_out = clk_in; + } - if (div_flag & DIV_ENABLE) { - *baud_out /= ((div + 1) * div_multi); - } + if (div_flag & DIV_ENABLE) { + *baud_out /= ((div + 1) * div_multi); + } } void cal_baud_div(rt_uint32_t clk_in, rt_uint32_t div_flag, rt_uint32_t pre_div, - rt_uint32_t *div, rt_uint32_t div_multi, rt_uint32_t baud_out) + rt_uint32_t *div, rt_uint32_t div_multi, rt_uint32_t baud_out) { - //div += 1; - rt_uint32_t temp_baud_hz, temp_baud_div; + //div += 1; + rt_uint32_t temp_baud_hz, temp_baud_div; - if (div_flag & DIV_ENABLE) { - if (div_flag & PRE_DIV_ENABLE) { - temp_baud_hz = (clk_in / pre_div); - } else { - temp_baud_hz = clk_in; - } - temp_baud_div = temp_baud_hz / baud_out; - *div = temp_baud_div - 1; - } + if (div_flag & DIV_ENABLE) { + if (div_flag & PRE_DIV_ENABLE) { + temp_baud_hz = (clk_in / pre_div); + } else { + temp_baud_hz = clk_in; + } + temp_baud_div = temp_baud_hz / baud_out; + *div = temp_baud_div - 1; + } } rt_int32_t process_gate(rt_uint32_t gate_flag, rt_uint32_t reg_offset, - rt_uint32_t reg_mask, rt_uint32_t *sw_status, - rt_uint32_t *pclk_status) + rt_uint32_t reg_mask, rt_uint32_t *sw_status, + rt_uint32_t *pclk_status) { - //rt_kprintf("----------gate go----------\n"); - rt_uint32_t hw_gate; - rt_int32_t ret; - if (gate_flag == HAS_GATE) { - ret = wrap_read_reg(reg_offset, reg_mask, &hw_gate); - if (ret != 0) { - return ret; - } + //rt_kprintf("----------gate go----------\n"); + rt_uint32_t hw_gate; + rt_int32_t ret; + if (gate_flag == HAS_GATE) { + ret = wrap_read_reg(reg_offset, reg_mask, &hw_gate); + if (ret != 0) { + return ret; + } - if (*sw_status == FH_CLK_GATE_DEFAULT_VALUE) { - *sw_status = hw_gate; - *pclk_status = *sw_status; - return 0; - } + if (*sw_status == FH_CLK_GATE_DEFAULT_VALUE) { + *sw_status = hw_gate; + *pclk_status = *sw_status; + return 0; + } -// rt_kprintf("gate hw is :%x\n",hw_gate); -// rt_kprintf("gate sw is :%x\n",sw_status); - if (hw_gate != *sw_status) { - //update the gate.. -// rt_kprintf("gate reg offset is :%x\n",reg_offset); -// rt_kprintf("gate reg mask is :%x\n",reg_mask); -// rt_kprintf("gate reg write is :%x\n",sw_status); - ret = wrap_write_reg(reg_offset, reg_mask, *sw_status); - if (ret != 0) { - return ret; - } - } +// rt_kprintf("gate hw is :%x\n",hw_gate); +// rt_kprintf("gate sw is :%x\n",sw_status); + if (hw_gate != *sw_status) { + //update the gate.. +// rt_kprintf("gate reg offset is :%x\n",reg_offset); +// rt_kprintf("gate reg mask is :%x\n",reg_mask); +// rt_kprintf("gate reg write is :%x\n",sw_status); + ret = wrap_write_reg(reg_offset, reg_mask, *sw_status); + if (ret != 0) { + return ret; + } + } - *pclk_status = *sw_status; - } + *pclk_status = *sw_status; + } - else { - *pclk_status |= CLK_HAS_NO_GATE; - } - //rt_kprintf("---------gate done---------\n"); - return 0; + else { + *pclk_status |= CLK_HAS_NO_GATE; + } + //rt_kprintf("---------gate done---------\n"); + return 0; } void clk_handle(struct fh_clk* p_clk, struct fh_clk *parent) { - //rt_uint32_t div; - //rt_uint32_t sw_gate; - rt_uint32_t phase; - rt_int32_t ret; - p_clk->parent = parent; -// switch - //fh_clk_debug(p_clk,"----parent----\t ----clk out rate----\n "); - if (p_clk->parent) - //rt_kprintf("%-8.*s 0x%02x", RT_NAME_MAX, thread->name, thread->current_priority); - fh_clk_debug(p_clk, "parent:'%s'\n", p_clk->parent->name); - else - fh_clk_debug(p_clk, "'root node'\n"); + //rt_uint32_t div; + //rt_uint32_t sw_gate; + rt_uint32_t phase; + rt_int32_t ret; + p_clk->parent = parent; +// switch + //fh_clk_debug(p_clk,"----parent----\t ----clk out rate----\n "); + if (p_clk->parent) + //rt_kprintf("%-8.*s 0x%02x", RT_NAME_MAX, thread->name, thread->current_priority); + fh_clk_debug(p_clk, "parent:'%s'\n", p_clk->parent->name); + else + fh_clk_debug(p_clk, "'root node'\n"); - switch (p_clk->level) { + switch (p_clk->level) { - case LEVEL_CRYSTAL: - //fh_clk_debug(p_clk,"clk out:%d\n",p_clk->clk_out_rate); - break; - case LEVEL_PLL: - //fh_clk_debug(p_clk,"%d\n",p_clk->clk_out_rate); - break; - case LEVEL_PERIPHERAL: + case LEVEL_CRYSTAL: + //fh_clk_debug(p_clk,"clk out:%d\n",p_clk->clk_out_rate); + break; + case LEVEL_PLL: + //fh_clk_debug(p_clk,"%d\n",p_clk->clk_out_rate); + break; + case LEVEL_PERIPHERAL: - switch (p_clk->clk.peri.peri_flag) { + switch (p_clk->clk.peri.peri_flag) { - case LEVEL_PERI_NORMAL: - //div = p_clk->clk.peri.obj.normal.div.sw_div_value; - ret = - sw_div_process( - p_clk->clk.peri.obj.normal.div.div_flag, - p_clk->clk.peri.obj.normal.div.reg_offset, - p_clk->clk.peri.obj.normal.div.reg_mask, - &p_clk->clk.peri.obj.normal.div.sw_div_value); + case LEVEL_PERI_NORMAL: + //div = p_clk->clk.peri.obj.normal.div.sw_div_value; + ret = + sw_div_process( + p_clk->clk.peri.obj.normal.div.div_flag, + p_clk->clk.peri.obj.normal.div.reg_offset, + p_clk->clk.peri.obj.normal.div.reg_mask, + &p_clk->clk.peri.obj.normal.div.sw_div_value); - if (ret != 0) { - fh_clk_err(p_clk, - "div process failed.error no:%x\n", - ret); - break; - } + if (ret != 0) { + fh_clk_err(p_clk, + "div process failed.error no:%x\n", + ret); + break; + } - //fh_clk_debug(p_clk,"hw div is %d\n",p_clk->clk.peri.obj.ddr.div.hw_div_value); -// fh_clk_debug(p_clk,"sw div is %d\n",p_clk->clk.peri.obj.normal.div.sw_div_value); -// fh_clk_debug(p_clk,"pre div is %d\n",p_clk->clk.peri.obj.normal.div.pdiv_value); -// fh_clk_debug(p_clk,"clk in is %d\n",p_clk->parent->clk_out_rate); -// fh_clk_debug(p_clk,"peri flag is %x\n",p_clk->clk.peri.obj.normal.div.div_flag); - //hw will self add 1.. + //fh_clk_debug(p_clk,"hw div is %d\n",p_clk->clk.peri.obj.ddr.div.hw_div_value); +// fh_clk_debug(p_clk,"sw div is %d\n",p_clk->clk.peri.obj.normal.div.sw_div_value); +// fh_clk_debug(p_clk,"pre div is %d\n",p_clk->clk.peri.obj.normal.div.pdiv_value); +// fh_clk_debug(p_clk,"clk in is %d\n",p_clk->parent->clk_out_rate); +// fh_clk_debug(p_clk,"peri flag is %x\n",p_clk->clk.peri.obj.normal.div.div_flag); + //hw will self add 1.. - cal_baud_hz(p_clk->parent->clk_out_rate, - p_clk->clk.peri.obj.normal.div.div_flag, - p_clk->clk.peri.obj.normal.div.pdiv_value, - p_clk->clk.peri.obj.normal.div.sw_div_value, - p_clk->clk.peri.obj.normal.div.sw_div_multi, - &p_clk->clk_out_rate); + cal_baud_hz(p_clk->parent->clk_out_rate, + p_clk->clk.peri.obj.normal.div.div_flag, + p_clk->clk.peri.obj.normal.div.pdiv_value, + p_clk->clk.peri.obj.normal.div.sw_div_value, + p_clk->clk.peri.obj.normal.div.sw_div_multi, + &p_clk->clk_out_rate); - //fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate); - //fix the gate.. - //sw_gate = p_clk->clk.peri.obj.normal.gate.sw_status; - ret = - process_gate( - p_clk->clk.peri.obj.normal.gate.gate_flag, - p_clk->clk.peri.obj.normal.gate.reg_offset, - p_clk->clk.peri.obj.normal.gate.reg_mask, - &p_clk->clk.peri.obj.normal.gate.sw_status, - &p_clk->gate); + //fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate); + //fix the gate.. + //sw_gate = p_clk->clk.peri.obj.normal.gate.sw_status; + ret = + process_gate( + p_clk->clk.peri.obj.normal.gate.gate_flag, + p_clk->clk.peri.obj.normal.gate.reg_offset, + p_clk->clk.peri.obj.normal.gate.reg_mask, + &p_clk->clk.peri.obj.normal.gate.sw_status, + &p_clk->gate); - if (ret != 0) { - fh_clk_err(p_clk, - "gate process failed.error no:%x\n", - ret); - break; - } + if (ret != 0) { + fh_clk_err(p_clk, + "gate process failed.error no:%x\n", + ret); + break; + } - break; - case LEVEL_PERI_DDR: - //rt_uint32_t mux0,mux1; - //div = p_clk->clk.peri.obj.ddr.div.sw_div_value; + break; + case LEVEL_PERI_DDR: + //rt_uint32_t mux0,mux1; + //div = p_clk->clk.peri.obj.ddr.div.sw_div_value; - ret = - sw_div_process( - p_clk->clk.peri.obj.ddr.div.div_flag, - p_clk->clk.peri.obj.ddr.div.reg_offset, - p_clk->clk.peri.obj.ddr.div.reg_mask, - &p_clk->clk.peri.obj.ddr.div.sw_div_value); + ret = + sw_div_process( + p_clk->clk.peri.obj.ddr.div.div_flag, + p_clk->clk.peri.obj.ddr.div.reg_offset, + p_clk->clk.peri.obj.ddr.div.reg_mask, + &p_clk->clk.peri.obj.ddr.div.sw_div_value); - if (ret != 0) { - fh_clk_err(p_clk, - "div process failed.error no:%x\n", - ret); - break; - } + if (ret != 0) { + fh_clk_err(p_clk, + "div process failed.error no:%x\n", + ret); + break; + } -// fh_clk_debug(p_clk,"sw div is %d\n",p_clk->clk.peri.obj.ddr.div.sw_div_value); -// fh_clk_debug(p_clk,"pre div is %d\n",p_clk->clk.peri.obj.ddr.div.pdiv_value); -// fh_clk_debug(p_clk,"clk in is %d\n",p_clk->parent->clk_out_rate); -// fh_clk_debug(p_clk,"peri flag is %x\n",p_clk->clk.peri.obj.ddr.div.div_flag); +// fh_clk_debug(p_clk,"sw div is %d\n",p_clk->clk.peri.obj.ddr.div.sw_div_value); +// fh_clk_debug(p_clk,"pre div is %d\n",p_clk->clk.peri.obj.ddr.div.pdiv_value); +// fh_clk_debug(p_clk,"clk in is %d\n",p_clk->parent->clk_out_rate); +// fh_clk_debug(p_clk,"peri flag is %x\n",p_clk->clk.peri.obj.ddr.div.div_flag); - cal_baud_hz(p_clk->parent->clk_out_rate, - p_clk->clk.peri.obj.ddr.div.div_flag, - p_clk->clk.peri.obj.ddr.div.pdiv_value, - p_clk->clk.peri.obj.ddr.div.sw_div_value, - p_clk->clk.peri.obj.ddr.div.sw_div_multi, - &p_clk->clk_out_rate); + cal_baud_hz(p_clk->parent->clk_out_rate, + p_clk->clk.peri.obj.ddr.div.div_flag, + p_clk->clk.peri.obj.ddr.div.pdiv_value, + p_clk->clk.peri.obj.ddr.div.sw_div_value, + p_clk->clk.peri.obj.ddr.div.sw_div_multi, + &p_clk->clk_out_rate); - //fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate); - //fix the gate.. - //fh_clk_debug(p_clk,"gate reg add is:%x\t mask is:%x\n",p_clk->clk.peri.obj.ddr.gate.reg_offset,p_clk->clk.peri.obj.ddr.gate.reg_mask); - //sw_gate = p_clk->clk.peri.obj.ddr.gate.sw_status; + //fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate); + //fix the gate.. + //fh_clk_debug(p_clk,"gate reg add is:%x\t mask is:%x\n",p_clk->clk.peri.obj.ddr.gate.reg_offset,p_clk->clk.peri.obj.ddr.gate.reg_mask); + //sw_gate = p_clk->clk.peri.obj.ddr.gate.sw_status; - ret = process_gate( - p_clk->clk.peri.obj.ddr.gate.gate_flag, - p_clk->clk.peri.obj.ddr.gate.reg_offset, - p_clk->clk.peri.obj.ddr.gate.reg_mask, - &p_clk->clk.peri.obj.ddr.gate.sw_status, - &p_clk->gate); + ret = process_gate( + p_clk->clk.peri.obj.ddr.gate.gate_flag, + p_clk->clk.peri.obj.ddr.gate.reg_offset, + p_clk->clk.peri.obj.ddr.gate.reg_mask, + &p_clk->clk.peri.obj.ddr.gate.sw_status, + &p_clk->gate); - if (ret != 0) { - fh_clk_err(p_clk, - "gate process failed.error no:%x\n", - ret); - break; - } + if (ret != 0) { + fh_clk_err(p_clk, + "gate process failed.error no:%x\n", + ret); + break; + } - break; - case LEVEL_PERI_SDC: - //just need to handle the phase.... - p_clk->clk_out_rate = p_clk->parent->clk_out_rate; - if (p_clk->clk.peri.obj.sdc.phase_diff & DIFF_REFERENCE) { - //fh_clk_debug(p_clk,"this is the reference..no need to process..\n"); - break; - } + break; + case LEVEL_PERI_SDC: + //just need to handle the phase.... + p_clk->clk_out_rate = p_clk->parent->clk_out_rate; + if (p_clk->clk.peri.obj.sdc.phase_diff & DIFF_REFERENCE) { + //fh_clk_debug(p_clk,"this is the reference..no need to process..\n"); + break; + } - //baud ... + //baud ... - //phase.. - //fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate); - //hw status.. - ret = wrap_read_reg(p_clk->clk.peri.obj.sdc.reg_offset, - p_clk->clk.peri.obj.sdc.reg_mask, - &phase); + //phase.. + //fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate); + //hw status.. + ret = wrap_read_reg(p_clk->clk.peri.obj.sdc.reg_offset, + p_clk->clk.peri.obj.sdc.reg_mask, + &phase); - if (ret != 0) { - fh_clk_err(p_clk, - "read pmu failed.error no:%x\n", - ret); - break; - } + if (ret != 0) { + fh_clk_err(p_clk, + "read pmu failed.error no:%x\n", + ret); + break; + } -// fh_clk_debug(p_clk,"hw phase is :%x\n",phase); -// fh_clk_debug(p_clk,"sw phase is :%x\n",p_clk->clk.peri.obj.sdc.phase_diff); - if (phase != p_clk->clk.peri.obj.sdc.phase_diff) { - //update the hw para.. - ret = - wrap_write_reg( - p_clk->clk.peri.obj.sdc.reg_offset, - p_clk->clk.peri.obj.sdc.reg_mask, - p_clk->clk.peri.obj.sdc.phase_diff); - if (ret != 0) { - fh_clk_err(p_clk, - "write pmu failed.error no:%x\n", - ret); - break; - } - } +// fh_clk_debug(p_clk,"hw phase is :%x\n",phase); +// fh_clk_debug(p_clk,"sw phase is :%x\n",p_clk->clk.peri.obj.sdc.phase_diff); + if (phase != p_clk->clk.peri.obj.sdc.phase_diff) { + //update the hw para.. + ret = + wrap_write_reg( + p_clk->clk.peri.obj.sdc.reg_offset, + p_clk->clk.peri.obj.sdc.reg_mask, + p_clk->clk.peri.obj.sdc.phase_diff); + if (ret != 0) { + fh_clk_err(p_clk, + "write pmu failed.error no:%x\n", + ret); + break; + } + } - break; - case LEVEL_PERI_GMAC: - break; - default: - break; + break; + case LEVEL_PERI_GMAC: + break; + default: + break; - } - } + } + } - fh_clk_debug(p_clk, "clk out:%d\n", p_clk->clk_out_rate); + fh_clk_debug(p_clk, "clk out:%d\n", p_clk->clk_out_rate); } // void clk_in_update(struct fh_clk* p_clk) { - clk_handle(p_clk, RT_NULL); + clk_handle(p_clk, RT_NULL); } void cis_pclk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, RT_NULL); + clk_handle(p_clk, RT_NULL); } void pll1_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &clk_in); + clk_handle(p_clk, &clk_in); } void pll0_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &clk_in); + clk_handle(p_clk, &clk_in); } void ddr_clk_update(struct fh_clk* p_clk) { - //check if pll0 or pll1 - rt_uint32_t mux0, mux1; - rt_int32_t ret; - struct fh_clk* parent; - //1 step: fix the parent.. - ret = wrap_read_reg(p_clk->clk.peri.obj.ddr.mux[1].reg_offset, - p_clk->clk.peri.obj.ddr.mux[1].reg_mask, &mux1); - if (ret != 0) { - fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret); - return; - } + //check if pll0 or pll1 + rt_uint32_t mux0, mux1; + rt_int32_t ret; + struct fh_clk* parent; + //1 step: fix the parent.. + ret = wrap_read_reg(p_clk->clk.peri.obj.ddr.mux[1].reg_offset, + p_clk->clk.peri.obj.ddr.mux[1].reg_mask, &mux1); + if (ret != 0) { + fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret); + return; + } - if (mux1 == MUX1_PLL0_CLK) { - ret = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset, - p_clk->clk.peri.obj.ddr.mux[0].reg_mask, &mux0); - if (ret != 0) { - fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret); - return; - } - if (mux0 == MUX0_PLL0_CLK) { - //ddr normal parent is pll0 - parent = &pll0; - } else { - //ddr normal parent is xtal - parent = &clk_in; - } - } else { - //ddr normal parent is pll1 - parent = &pll1; - } - p_clk->clk.peri.obj.ddr.mux[0].mux_flag = HAS_MUX; - p_clk->clk.peri.obj.ddr.mux[1].mux_flag = HAS_MUX; - clk_handle(p_clk, parent); + if (mux1 == MUX1_PLL0_CLK) { + ret = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset, + p_clk->clk.peri.obj.ddr.mux[0].reg_mask, &mux0); + if (ret != 0) { + fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret); + return; + } + if (mux0 == MUX0_PLL0_CLK) { + //ddr normal parent is pll0 + parent = &pll0; + } else { + //ddr normal parent is xtal + parent = &clk_in; + } + } else { + //ddr normal parent is pll1 + parent = &pll1; + } + p_clk->clk.peri.obj.ddr.mux[0].mux_flag = HAS_MUX; + p_clk->clk.peri.obj.ddr.mux[1].mux_flag = HAS_MUX; + clk_handle(p_clk, parent); } void fclk_update(struct fh_clk* p_clk) { - //check if pll0 or xtal - rt_uint32_t mux0; - rt_int32_t ret; - struct fh_clk* parent; //1 step: fix the parent.. + //check if pll0 or xtal + rt_uint32_t mux0; + rt_int32_t ret; + struct fh_clk* parent; //1 step: fix the parent.. - //mux0 = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset,p_clk->clk.peri.obj.ddr.mux[0].reg_mask); - ret = check_xtal_pll0(p_clk->clk.peri.obj.normal.mux.reg_offset, - p_clk->clk.peri.obj.normal.mux.reg_mask, &mux0); - if (ret != 0) { - fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret); - return; - } + //mux0 = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset,p_clk->clk.peri.obj.ddr.mux[0].reg_mask); + ret = check_xtal_pll0(p_clk->clk.peri.obj.normal.mux.reg_offset, + p_clk->clk.peri.obj.normal.mux.reg_mask, &mux0); + if (ret != 0) { + fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret); + return; + } - //fh_clk_debug(p_clk,"mux0 wrap value is %x\n",mux0); - if (mux0 == MUX0_PLL0_CLK) { - //ddr normal parent is pll0 - parent = &pll0; - } else { - //ddr normal parent is xtal - parent = &clk_in; - } - p_clk->clk.peri.obj.normal.mux.mux_flag = HAS_MUX; - //2 step:fix the div... - if (mux0 == MUX0_PLL0_CLK) { - //cal_pll0_prediv(&p_clk->clk.peri.obj.ddr.div.div_flag,&p_clk->clk.peri.obj.ddr.div.pdiv_value); - cal_pll0_prediv(&p_clk->clk.peri.obj.normal.div.div_flag, - &p_clk->clk.peri.obj.normal.div.pdiv_value); - } - clk_handle(p_clk, parent); + //fh_clk_debug(p_clk,"mux0 wrap value is %x\n",mux0); + if (mux0 == MUX0_PLL0_CLK) { + //ddr normal parent is pll0 + parent = &pll0; + } else { + //ddr normal parent is xtal + parent = &clk_in; + } + p_clk->clk.peri.obj.normal.mux.mux_flag = HAS_MUX; + //2 step:fix the div... + if (mux0 == MUX0_PLL0_CLK) { + //cal_pll0_prediv(&p_clk->clk.peri.obj.ddr.div.div_flag,&p_clk->clk.peri.obj.ddr.div.pdiv_value); + cal_pll0_prediv(&p_clk->clk.peri.obj.normal.div.div_flag, + &p_clk->clk.peri.obj.normal.div.pdiv_value); + } + clk_handle(p_clk, parent); } void pix_update(struct fh_clk* p_clk) { - //check if pll0 or xtal - rt_uint32_t mux0; - rt_int32_t ret; - struct fh_clk* parent; //1 step: fix the parent.. + //check if pll0 or xtal + rt_uint32_t mux0; + rt_int32_t ret; + struct fh_clk* parent; //1 step: fix the parent.. #if(1) - //mux0 = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset,p_clk->clk.peri.obj.ddr.mux[0].reg_mask); - ret = check_pix_clk_source(p_clk->clk.peri.obj.normal.mux.reg_offset, - p_clk->clk.peri.obj.normal.mux.reg_mask, &mux0); - if (ret != 0) { - fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret); - return; - } -//#define CIS_PIX_CLK (0) -//#define CIS_PIX_CLK_OPPOSITE (1) -//#define MIPI_PIX_CLK (2) + //mux0 = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset,p_clk->clk.peri.obj.ddr.mux[0].reg_mask); + ret = check_pix_clk_source(p_clk->clk.peri.obj.normal.mux.reg_offset, + p_clk->clk.peri.obj.normal.mux.reg_mask, &mux0); + if (ret != 0) { + fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret); + return; + } +//#define CIS_PIX_CLK (0) +//#define CIS_PIX_CLK_OPPOSITE (1) +//#define MIPI_PIX_CLK (2) - //fh_clk_debug(p_clk,"mux0 wrap value is %x\n",mux0); - if (mux0 == CIS_PIX_CLK || mux0 == CIS_PIX_CLK_OPPOSITE) { - //ddr normal parent is pll0 - parent = &cis_pclk; - } else { - parent = &mipi_pix_clk; - } - p_clk->clk.peri.obj.normal.mux.mux_flag = HAS_MUX; + //fh_clk_debug(p_clk,"mux0 wrap value is %x\n",mux0); + if (mux0 == CIS_PIX_CLK || mux0 == CIS_PIX_CLK_OPPOSITE) { + //ddr normal parent is pll0 + parent = &cis_pclk; + } else { + parent = &mipi_pix_clk; + } + p_clk->clk.peri.obj.normal.mux.mux_flag = HAS_MUX; #endif - clk_handle(p_clk, parent); + clk_handle(p_clk, parent); } void aclk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &cpu_fclk); + clk_handle(p_clk, &cpu_fclk); } void hclk_update(struct fh_clk* p_clk) { - fclk_update(p_clk); + fclk_update(p_clk); } void pclk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &cpu_hclk); + clk_handle(p_clk, &cpu_hclk); } void isp_aclk_update(struct fh_clk* p_clk) { - fclk_update(p_clk); + fclk_update(p_clk); } void vcu_clk_update(struct fh_clk* p_clk) { - fclk_update(p_clk); + fclk_update(p_clk); } void vou_clk_update(struct fh_clk* p_clk) { - fclk_update(p_clk); + fclk_update(p_clk); } void mipi_p32_clk_update(struct fh_clk* p_clk) { - fclk_update(p_clk); + fclk_update(p_clk); } void cis_clk_out_update(struct fh_clk* p_clk) { - fclk_update(p_clk); + fclk_update(p_clk); } void pts_update(struct fh_clk* p_clk) { - fclk_update(p_clk); + fclk_update(p_clk); } void mipi_pix_clk_update(struct fh_clk* p_clk) { - fclk_update(p_clk); + fclk_update(p_clk); } void spi0_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void spi1_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void mipi_dphy_clk20m_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void i2c0_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void i2c1_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void uart0_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void pwm_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void time0_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void time1_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void uart1_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void sadc_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } //sdc0... void sdc0_clk2x_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void sdc0_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &sdc0_clk2x); + clk_handle(p_clk, &sdc0_clk2x); } void sdc0_clk_out_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &sdc0_clk); + clk_handle(p_clk, &sdc0_clk); } void sdc0_clk_sample_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &sdc0_clk2x); + clk_handle(p_clk, &sdc0_clk2x); } void sdc0_clk_drv_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &sdc0_clk2x); + clk_handle(p_clk, &sdc0_clk2x); } void sdc1_clk2x_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void sdc1_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &sdc1_clk2x); + clk_handle(p_clk, &sdc1_clk2x); } void sdc1_clk_out_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &sdc1_clk); + clk_handle(p_clk, &sdc1_clk); } void sdc1_clk_sample_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &sdc1_clk2x); + clk_handle(p_clk, &sdc1_clk2x); } void sdc1_clk_drv_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &sdc1_clk2x); + clk_handle(p_clk, &sdc1_clk2x); } void eth_ref_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &pll1); + clk_handle(p_clk, &pll1); } void wdt_clk_update(struct fh_clk* p_clk) { - clk_handle(p_clk, &cpu_pclk); + clk_handle(p_clk, &cpu_pclk); } /** * @brief System Clock Configuration */ -#define CLK_CONTROL_BASE PMU_REG_BASE +#define CLK_CONTROL_BASE PMU_REG_BASE void rt_hw_clock_init(void) { - struct fh_clk *p; - int i; - fh_clk_tree.c_base_addr = CLK_CONTROL_BASE; - fh_clk_tree.clk_head = fh_clk_array; + struct fh_clk *p; + int i; + fh_clk_tree.c_base_addr = CLK_CONTROL_BASE; + fh_clk_tree.clk_head = fh_clk_array; - //first open all the clock.. - FH_TIMER_WRITEL(REG_PMU_CLK_GATE, 0x0); - for (i = 0; i < sizeof(fh_clk_array) / sizeof(struct fh_clk *); i++) { - p = fh_clk_tree.clk_head[i]; - if (p->update_func) - p->update_func(p); - } + //first open all the clock.. + FH_TIMER_WRITEL(REG_PMU_CLK_GATE, 0x0); + for (i = 0; i < sizeof(fh_clk_array) / sizeof(struct fh_clk *); i++) { + p = fh_clk_tree.clk_head[i]; + if (p->update_func) + p->update_func(p); + } } /*************** @@ -2453,196 +2453,196 @@ void rt_hw_clock_init(void) struct fh_clk *clk_get(const char *name) { - struct fh_clk *p; - int i; + struct fh_clk *p; + int i; - for (i = 0; i < sizeof(fh_clk_array) / sizeof(struct fh_clk *); i++) { - p = fh_clk_tree.clk_head[i]; - if (!strcmp(p->name, name)) { - return p; - } - } + for (i = 0; i < sizeof(fh_clk_array) / sizeof(struct fh_clk *); i++) { + p = fh_clk_tree.clk_head[i]; + if (!strcmp(p->name, name)) { + return p; + } + } - return RT_NULL; + return RT_NULL; } // -//#define HAS_GATE (0) -//#define HAS_NO_GATE (1) -// rt_uint32_t gate_flag; -//#define CLK_UNGATE (0) -//#define CLK_GATE (1) +//#define HAS_GATE (0) +//#define HAS_NO_GATE (1) +// rt_uint32_t gate_flag; +//#define CLK_UNGATE (0) +//#define CLK_GATE (1) void clk_gate_control(struct fh_clk *p_clk, rt_uint32_t status) { - if (status > CLK_GATE) - return; + if (status > CLK_GATE) + return; - if (p_clk->level == LEVEL_PERIPHERAL) { + if (p_clk->level == LEVEL_PERIPHERAL) { - switch (p_clk->clk.peri.peri_flag) { - case LEVEL_PERI_NORMAL: + switch (p_clk->clk.peri.peri_flag) { + case LEVEL_PERI_NORMAL: - if (p_clk->clk.peri.obj.normal.gate.gate_flag - == HAS_GATE) { - p_clk->clk.peri.obj.normal.gate.sw_status = - status; - } else { - rt_kprintf("[%-16.15s]: no gate...\t\n", - p_clk->name); - } + if (p_clk->clk.peri.obj.normal.gate.gate_flag + == HAS_GATE) { + p_clk->clk.peri.obj.normal.gate.sw_status = + status; + } else { + rt_kprintf("[%-16.15s]: no gate...\t\n", + p_clk->name); + } - break; - case LEVEL_PERI_DDR: - if (p_clk->clk.peri.obj.ddr.gate.gate_flag == HAS_GATE) { - p_clk->clk.peri.obj.ddr.gate.sw_status = status; - } else { - rt_kprintf("[%-16.15s]: no gate...\t\n", - p_clk->name); - } + break; + case LEVEL_PERI_DDR: + if (p_clk->clk.peri.obj.ddr.gate.gate_flag == HAS_GATE) { + p_clk->clk.peri.obj.ddr.gate.sw_status = status; + } else { + rt_kprintf("[%-16.15s]: no gate...\t\n", + p_clk->name); + } - break; + break; - default: - break; - } + default: + break; + } - p_clk->update_func(p_clk); + p_clk->update_func(p_clk); - } + } } void clk_gate(struct fh_clk *p_clk) { - clk_gate_control(p_clk, CLK_GATE); + clk_gate_control(p_clk, CLK_GATE); } void clk_ungate(struct fh_clk *p_clk) { - clk_gate_control(p_clk, CLK_UNGATE); + clk_gate_control(p_clk, CLK_UNGATE); } rt_uint32_t clk_get_rate(struct fh_clk *p_clk) { - rt_uint32_t rate; - //first update the status - p_clk->update_func(p_clk); - rate = p_clk->clk_out_rate; - return rate; + rt_uint32_t rate; + //first update the status + p_clk->update_func(p_clk); + rate = p_clk->clk_out_rate; + return rate; } void clk_set_rate(struct fh_clk *p_clk, rt_uint32_t rate_value) { - rt_uint32_t clk_in, div_flag, pre_div, div_multi, baud_out; + rt_uint32_t clk_in, div_flag, pre_div, div_multi, baud_out; - if (p_clk->level == LEVEL_PERIPHERAL) { + if (p_clk->level == LEVEL_PERIPHERAL) { - switch (p_clk->clk.peri.peri_flag) { - case LEVEL_PERI_NORMAL: + switch (p_clk->clk.peri.peri_flag) { + case LEVEL_PERI_NORMAL: - clk_in = p_clk->parent->clk_out_rate; - div_flag = p_clk->clk.peri.obj.normal.div.div_flag; - pre_div = p_clk->clk.peri.obj.normal.div.pdiv_value; - div_multi = p_clk->clk.peri.obj.normal.div.sw_div_multi; - baud_out = rate_value; + clk_in = p_clk->parent->clk_out_rate; + div_flag = p_clk->clk.peri.obj.normal.div.div_flag; + pre_div = p_clk->clk.peri.obj.normal.div.pdiv_value; + div_multi = p_clk->clk.peri.obj.normal.div.sw_div_multi; + baud_out = rate_value; - cal_baud_div(clk_in, div_flag, pre_div, - &p_clk->clk.peri.obj.normal.div.sw_div_value, - div_multi, baud_out); + cal_baud_div(clk_in, div_flag, pre_div, + &p_clk->clk.peri.obj.normal.div.sw_div_value, + div_multi, baud_out); - break; - case LEVEL_PERI_DDR: - //rt_uint32_t mux0,mux1; - clk_in = p_clk->parent->clk_out_rate; - div_flag = p_clk->clk.peri.obj.ddr.div.div_flag; - pre_div = p_clk->clk.peri.obj.ddr.div.pdiv_value; - div_multi = p_clk->clk.peri.obj.ddr.div.sw_div_multi; - baud_out = rate_value; + break; + case LEVEL_PERI_DDR: + //rt_uint32_t mux0,mux1; + clk_in = p_clk->parent->clk_out_rate; + div_flag = p_clk->clk.peri.obj.ddr.div.div_flag; + pre_div = p_clk->clk.peri.obj.ddr.div.pdiv_value; + div_multi = p_clk->clk.peri.obj.ddr.div.sw_div_multi; + baud_out = rate_value; - cal_baud_div(clk_in, div_flag, pre_div, - &p_clk->clk.peri.obj.ddr.div.sw_div_value, - div_multi, baud_out); - break; - case LEVEL_PERI_SDC: - fh_clk_debug(p_clk, - "sdc can't set baud,please set the 'sdcx_clk2x'\n"); - break; - case LEVEL_PERI_GMAC: - fh_clk_debug(p_clk, "gmac not support set baud\n"); - break; - default: - break; - } - p_clk->update_func(p_clk); + cal_baud_div(clk_in, div_flag, pre_div, + &p_clk->clk.peri.obj.ddr.div.sw_div_value, + div_multi, baud_out); + break; + case LEVEL_PERI_SDC: + fh_clk_debug(p_clk, + "sdc can't set baud,please set the 'sdcx_clk2x'\n"); + break; + case LEVEL_PERI_GMAC: + fh_clk_debug(p_clk, "gmac not support set baud\n"); + break; + default: + break; + } + p_clk->update_func(p_clk); - } + } } rt_uint32_t sdc_get_phase(struct fh_clk *p_clk) { - if (p_clk->level == LEVEL_PERIPHERAL) { - if (p_clk->clk.peri.peri_flag == LEVEL_PERI_SDC) { + if (p_clk->level == LEVEL_PERIPHERAL) { + if (p_clk->clk.peri.peri_flag == LEVEL_PERI_SDC) { - p_clk->update_func(p_clk); - return p_clk->clk.peri.obj.sdc.phase_diff; - } - } - return SDC_CLK_PARA_ERROR; + p_clk->update_func(p_clk); + return p_clk->clk.peri.obj.sdc.phase_diff; + } + } + return SDC_CLK_PARA_ERROR; } rt_uint32_t sdc_set_phase(struct fh_clk *p_clk, rt_uint32_t phase) { - if (phase > DIFF_SDC_REFCLK_270) - return SDC_CLK_PARA_ERROR; + if (phase > DIFF_SDC_REFCLK_270) + return SDC_CLK_PARA_ERROR; - if (p_clk->level == LEVEL_PERIPHERAL) { - if (p_clk->clk.peri.peri_flag == LEVEL_PERI_SDC) { - p_clk->clk.peri.obj.sdc.phase_diff = phase; - p_clk->update_func(p_clk); - return SDC_CLK_PARA_OK; - } - } - return SDC_CLK_PARA_ERROR; + if (p_clk->level == LEVEL_PERIPHERAL) { + if (p_clk->clk.peri.peri_flag == LEVEL_PERI_SDC) { + p_clk->clk.peri.obj.sdc.phase_diff = phase; + p_clk->update_func(p_clk); + return SDC_CLK_PARA_OK; + } + } + return SDC_CLK_PARA_ERROR; } #ifdef FH_DBG_CLK int fh_clk_nlist() { - struct fh_clk *p; - int i; + struct fh_clk *p; + int i; - for(i = 0;iupdate_func(p); - rt_kprintf("[%-16.15s]:\t\t[baud]:%d\t\n",p->name,p->clk_out_rate); - } + for(i = 0;iupdate_func(p); + rt_kprintf("[%-16.15s]:\t\t[baud]:%d\t\n",p->name,p->clk_out_rate); + } - return 0; + return 0; } int fh_clk_glist() { - struct fh_clk *p; - int i; - rt_kprintf("first bit set means has no gate..\n"); - for(i = 0;iupdate_func(p); - if(!(p->gate & CLK_HAS_NO_GATE)) - rt_kprintf("[%-16.15s]:\t\t[gate]:%d\t\n",p->name,p->gate); - else - rt_kprintf("[%-16.15s]:\t\t[gate]:no gate..\t\n",p->name); - } + struct fh_clk *p; + int i; + rt_kprintf("first bit set means has no gate..\n"); + for(i = 0;iupdate_func(p); + if(!(p->gate & CLK_HAS_NO_GATE)) + rt_kprintf("[%-16.15s]:\t\t[gate]:%d\t\n",p->name,p->gate); + else + rt_kprintf("[%-16.15s]:\t\t[gate]:no gate..\t\n",p->name); + } - return 0; + return 0; } #endif diff --git a/bsp/fh8620/platform/plat-v2/clock.h b/bsp/fh8620/platform/plat-v2/clock.h index 60b0ed6538..cdf94b017a 100644 --- a/bsp/fh8620/platform/plat-v2/clock.h +++ b/bsp/fh8620/platform/plat-v2/clock.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef TIMER_H_ #define TIMER_H_ @@ -43,12 +43,12 @@ void fh_pmu_open(void); void fh_pmu_close(void); */ -#define DIFF_SDC_REFCLK_0 (0) -#define DIFF_SDC_REFCLK_90 (1) -#define DIFF_SDC_REFCLK_180 (2) -#define DIFF_SDC_REFCLK_270 (3) -#define SDC_CLK_PARA_ERROR (0xffff0000) -#define SDC_CLK_PARA_OK (0) +#define DIFF_SDC_REFCLK_0 (0) +#define DIFF_SDC_REFCLK_90 (1) +#define DIFF_SDC_REFCLK_180 (2) +#define DIFF_SDC_REFCLK_270 (3) +#define SDC_CLK_PARA_ERROR (0xffff0000) +#define SDC_CLK_PARA_OK (0) void clk_gate(struct fh_clk *p_clk); diff --git a/bsp/fh8620/platform/plat-v2/fh_pmu.c b/bsp/fh8620/platform/plat-v2/fh_pmu.c index 8f518efd94..d17f215a17 100644 --- a/bsp/fh8620/platform/plat-v2/fh_pmu.c +++ b/bsp/fh8620/platform/plat-v2/fh_pmu.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,45 +18,45 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include "rtdebug.h" #include "arch.h" #include "fh_pmu.h" #include "fh_def.h" -#define FH_PMU_WRITEL(offset,value) SET_REG((PMU_REG_BASE + offset),value) -#define FH_PMU_WRITEL_MASK(offset,value, mask) SET_REG_M((PMU_REG_BASE + offset), value, mask) -#define FH_PMU_READL(offset) GET_REG((PMU_REG_BASE + offset)) +#define FH_PMU_WRITEL(offset,value) SET_REG((PMU_REG_BASE + offset),value) +#define FH_PMU_WRITEL_MASK(offset,value, mask) SET_REG_M((PMU_REG_BASE + offset), value, mask) +#define FH_PMU_READL(offset) GET_REG((PMU_REG_BASE + offset)) -#define PMU_OFFSET_MAX 0x1d0 +#define PMU_OFFSET_MAX 0x1d0 int fh_pmu_read(rt_uint32_t offset, rt_uint32_t *value) { - RT_ASSERT(offset < PMU_OFFSET_MAX); + RT_ASSERT(offset < PMU_OFFSET_MAX); - *value = FH_PMU_READL(offset); - return 0; + *value = FH_PMU_READL(offset); + return 0; } int fh_pmu_write(rt_uint32_t offset, const rt_uint32_t value) { - RT_ASSERT(offset < PMU_OFFSET_MAX); + RT_ASSERT(offset < PMU_OFFSET_MAX); - FH_PMU_WRITEL(offset, value); - return 0; + FH_PMU_WRITEL(offset, value); + return 0; } int fh_pmu_write_mask(rt_uint32_t offset, const rt_uint32_t value, - const rt_uint32_t mask) + const rt_uint32_t mask) { - RT_ASSERT(offset < PMU_OFFSET_MAX); + RT_ASSERT(offset < PMU_OFFSET_MAX); - FH_PMU_WRITEL_MASK(offset, value, mask); - return 0; + FH_PMU_WRITEL_MASK(offset, value, mask); + return 0; } diff --git a/bsp/fh8620/platform/plat-v2/fh_pmu.h b/bsp/fh8620/platform/plat-v2/fh_pmu.h index 19a6279d1a..4ecedd2fd4 100644 --- a/bsp/fh8620/platform/plat-v2/fh_pmu.h +++ b/bsp/fh8620/platform/plat-v2/fh_pmu.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef FH_PMU_H_ #define FH_PMU_H_ @@ -36,7 +36,7 @@ #define REG_PMU_PLL0_CTRL (0x010) #define REG_PMU_PLL1_CTRL (0x014) #define REG_PMU_ARC_CLK_GATE (0x018) -#define REG_PMU_CLK_GATE (0x01c) +#define REG_PMU_CLK_GATE (0x01c) #define REG_PMU_CLK_SEL (0x020) #define REG_PMU_CLK_DIV0 (0x024) #define REG_PMU_CLK_DIV1 (0x028) diff --git a/bsp/fh8620/platform/plat-v2/iomux.c b/bsp/fh8620/platform/plat-v2/iomux.c index 67acf6ca75..51b14f5937 100644 --- a/bsp/fh8620/platform/plat-v2/iomux.c +++ b/bsp/fh8620/platform/plat-v2/iomux.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,34 +18,34 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include "rtdebug.h" #include "iomux.h" static void fh_iomux_setmfs(Iomux_Pad *pad) { - switch (pad->reg_type) { - case 8: - (IOMUX_PADTYPE(8)pad->reg)->bit.mfs = pad->func_sel; - break; - case 13: - (IOMUX_PADTYPE(13)pad->reg)->bit.mfs = pad->func_sel; - break; - case 20: - (IOMUX_PADTYPE(20)pad->reg)->bit.mfs = pad->func_sel; - break; - case 21: - (IOMUX_PADTYPE(21)pad->reg)->bit.mfs = pad->func_sel; - break; - default: - break; - } + switch (pad->reg_type) { + case 8: + (IOMUX_PADTYPE(8)pad->reg)->bit.mfs = pad->func_sel; + break; + case 13: + (IOMUX_PADTYPE(13)pad->reg)->bit.mfs = pad->func_sel; + break; + case 20: + (IOMUX_PADTYPE(20)pad->reg)->bit.mfs = pad->func_sel; + break; + case 21: + (IOMUX_PADTYPE(21)pad->reg)->bit.mfs = pad->func_sel; + break; + default: + break; + } } @@ -53,50 +53,50 @@ static void fh_iomux_setmfs(Iomux_Pad *pad) static int fh_iomux_getmfs(Iomux_Pad *pad) { - int mfs; + int mfs; - switch (pad->reg_type) { - case 8: - mfs = (IOMUX_PADTYPE(8)pad->reg)->bit.mfs; - break; - case 13: - mfs = (IOMUX_PADTYPE(13)pad->reg)->bit.mfs; - break; - case 20: - mfs = (IOMUX_PADTYPE(20)pad->reg)->bit.mfs; - break; - case 21: - mfs = (IOMUX_PADTYPE(21)pad->reg)->bit.mfs; - break; - default: - mfs = -1; - break; + switch (pad->reg_type) { + case 8: + mfs = (IOMUX_PADTYPE(8)pad->reg)->bit.mfs; + break; + case 13: + mfs = (IOMUX_PADTYPE(13)pad->reg)->bit.mfs; + break; + case 20: + mfs = (IOMUX_PADTYPE(20)pad->reg)->bit.mfs; + break; + case 21: + mfs = (IOMUX_PADTYPE(21)pad->reg)->bit.mfs; + break; + default: + mfs = -1; + break; - } - return mfs; + } + return mfs; } static void fh_iomux_print() { - int i; - UINT32 reg; + int i; + UINT32 reg; - for (i = 0; i < ARRAY_SIZE(fh81_iomux_cfg); i++) { - int curr_func; + for (i = 0; i < ARRAY_SIZE(fh81_iomux_cfg); i++) { + int curr_func; - curr_func = fh81_iomux_getmfs(iomux_obj, &iomux_obj.pads[i]); - reg = readl((UINT32)iomux_obj.pads[i].reg); + curr_func = fh81_iomux_getmfs(iomux_obj, &iomux_obj.pads[i]); + reg = readl((UINT32)iomux_obj.pads[i].reg); - if (curr_func < 0) - rt_kprintf("\t%d\t\t%-8s(no mfs)\t0x%08x\n", i, iomux_obj.pads[i].func_name[0], - reg); - else - rt_kprintf("\t%d\t\t%-16s\t0x%08x\n", i, iomux_obj.pads[i].func_name[curr_func], - reg); + if (curr_func < 0) + rt_kprintf("\t%d\t\t%-8s(no mfs)\t0x%08x\n", i, iomux_obj.pads[i].func_name[0], + reg); + else + rt_kprintf("\t%d\t\t%-16s\t0x%08x\n", i, iomux_obj.pads[i].func_name[curr_func], + reg); - } + } } @@ -105,90 +105,90 @@ static void fh_iomux_print() static void fh_iomux_setcur(Iomux_Pad *pad) { - switch (pad->reg_type) { - case 5: - (IOMUX_PADTYPE(5)pad->reg)->bit.e8_e4 = pad->drv_cur; - break; - case 8: - (IOMUX_PADTYPE(8)pad->reg)->bit.e8_e4 = pad->drv_cur; - break; - case 13: - (IOMUX_PADTYPE(13)pad->reg)->bit.e4_e2 = pad->drv_cur; - break; - case 17: - (IOMUX_PADTYPE(17)pad->reg)->bit.e8_e4 = pad->drv_cur; - break; - case 20: - (IOMUX_PADTYPE(20)pad->reg)->bit.e4_e2 = pad->drv_cur; - break; - case 21: - (IOMUX_PADTYPE(21)pad->reg)->bit.e4_e2 = pad->drv_cur; - break; - default: - break; - } + switch (pad->reg_type) { + case 5: + (IOMUX_PADTYPE(5)pad->reg)->bit.e8_e4 = pad->drv_cur; + break; + case 8: + (IOMUX_PADTYPE(8)pad->reg)->bit.e8_e4 = pad->drv_cur; + break; + case 13: + (IOMUX_PADTYPE(13)pad->reg)->bit.e4_e2 = pad->drv_cur; + break; + case 17: + (IOMUX_PADTYPE(17)pad->reg)->bit.e8_e4 = pad->drv_cur; + break; + case 20: + (IOMUX_PADTYPE(20)pad->reg)->bit.e4_e2 = pad->drv_cur; + break; + case 21: + (IOMUX_PADTYPE(21)pad->reg)->bit.e4_e2 = pad->drv_cur; + break; + default: + break; + } } static void fh_iomux_setpupd(Iomux_Pad *pad) { - switch (pad->reg_type) { - case 9: - (IOMUX_PADTYPE(9)pad->reg)->bit.pu_pd = pad->pupd; - break; - case 17: - (IOMUX_PADTYPE(17)pad->reg)->bit.pu_pd = pad->pupd; - break; - case 20: - (IOMUX_PADTYPE(20)pad->reg)->bit.pu_pd = pad->pupd; - break; - case 21: - (IOMUX_PADTYPE(21)pad->reg)->bit.pu_pd = pad->pupd; - break; - default: - break; - } + switch (pad->reg_type) { + case 9: + (IOMUX_PADTYPE(9)pad->reg)->bit.pu_pd = pad->pupd; + break; + case 17: + (IOMUX_PADTYPE(17)pad->reg)->bit.pu_pd = pad->pupd; + break; + case 20: + (IOMUX_PADTYPE(20)pad->reg)->bit.pu_pd = pad->pupd; + break; + case 21: + (IOMUX_PADTYPE(21)pad->reg)->bit.pu_pd = pad->pupd; + break; + default: + break; + } } static void fh_iomux_setrest(Iomux_Pad *pad) { - switch (pad->reg_type) { - case 5: - (IOMUX_PADTYPE(5)pad->reg)->bit.sr = 0; - break; - case 8: - (IOMUX_PADTYPE(8)pad->reg)->bit.sr = 0; - break; - case 9: - (IOMUX_PADTYPE(9)pad->reg)->bit.ie = 1; - (IOMUX_PADTYPE(9)pad->reg)->bit.smt = 1; - break; - case 13: - (IOMUX_PADTYPE(13)pad->reg)->bit.ie = 1; - (IOMUX_PADTYPE(13)pad->reg)->bit.smt = 1; - break; - case 17: - (IOMUX_PADTYPE(17)pad->reg)->bit.sr = 0; - (IOMUX_PADTYPE(17)pad->reg)->bit.ie = 1; - (IOMUX_PADTYPE(17)pad->reg)->bit.e = 1; - (IOMUX_PADTYPE(17)pad->reg)->bit.smt = 1; - break; - case 20: - (IOMUX_PADTYPE(20)pad->reg)->bit.sr = 0; - (IOMUX_PADTYPE(20)pad->reg)->bit.ie = 1; - (IOMUX_PADTYPE(20)pad->reg)->bit.smt = 1; - break; - case 21: - (IOMUX_PADTYPE(21)pad->reg)->bit.sr = 0; - (IOMUX_PADTYPE(21)pad->reg)->bit.ie = 1; - (IOMUX_PADTYPE(21)pad->reg)->bit.smt = 1; - break; - default: - break; - } + switch (pad->reg_type) { + case 5: + (IOMUX_PADTYPE(5)pad->reg)->bit.sr = 0; + break; + case 8: + (IOMUX_PADTYPE(8)pad->reg)->bit.sr = 0; + break; + case 9: + (IOMUX_PADTYPE(9)pad->reg)->bit.ie = 1; + (IOMUX_PADTYPE(9)pad->reg)->bit.smt = 1; + break; + case 13: + (IOMUX_PADTYPE(13)pad->reg)->bit.ie = 1; + (IOMUX_PADTYPE(13)pad->reg)->bit.smt = 1; + break; + case 17: + (IOMUX_PADTYPE(17)pad->reg)->bit.sr = 0; + (IOMUX_PADTYPE(17)pad->reg)->bit.ie = 1; + (IOMUX_PADTYPE(17)pad->reg)->bit.e = 1; + (IOMUX_PADTYPE(17)pad->reg)->bit.smt = 1; + break; + case 20: + (IOMUX_PADTYPE(20)pad->reg)->bit.sr = 0; + (IOMUX_PADTYPE(20)pad->reg)->bit.ie = 1; + (IOMUX_PADTYPE(20)pad->reg)->bit.smt = 1; + break; + case 21: + (IOMUX_PADTYPE(21)pad->reg)->bit.sr = 0; + (IOMUX_PADTYPE(21)pad->reg)->bit.ie = 1; + (IOMUX_PADTYPE(21)pad->reg)->bit.smt = 1; + break; + default: + break; + } } @@ -198,13 +198,13 @@ extern const int fh_iomux_cfg_count; void __fh_setiomux(Iomux_Pad *pad, void *iobase) { - UINT32 regvalue = 0; - pad->reg = ®value; - fh_iomux_setmfs(pad); - fh_iomux_setcur(pad); - fh_iomux_setpupd(pad); - fh_iomux_setrest(pad); - SET_REG(iobase, regvalue); + UINT32 regvalue = 0; + pad->reg = ®value; + fh_iomux_setmfs(pad); + fh_iomux_setcur(pad); + fh_iomux_setpupd(pad); + fh_iomux_setrest(pad); + SET_REG(iobase, regvalue); } static UINT32 g_iomux_base; @@ -212,73 +212,73 @@ static UINT32 g_iomux_base; void fh_iomux_init(UINT32 base) { -// return; - int i; -// int test_cnt = 0; - UINT32 reg; - g_iomux_base = base; +// return; + int i; +// int test_cnt = 0; + UINT32 reg; + g_iomux_base = base; - iomux_obj.pbase = (void *)base; + iomux_obj.pbase = (void *)base; -// iomux_obj.vbase = (UINT32 *)rt_malloc(1024); - iomux_obj.pads = fh_iomux_cfg; +// iomux_obj.vbase = (UINT32 *)rt_malloc(1024); + iomux_obj.pads = fh_iomux_cfg; - for (i = 0; i < fh_iomux_cfg_count; i++) { + for (i = 0; i < fh_iomux_cfg_count; i++) { #if (1) - iomux_obj.pads[i].id = i; - iomux_obj.pads[i].reg_offset = i * 4; - iomux_obj.pads[i].reg = ®//(UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset); - fh_iomux_setmfs(&fh_iomux_cfg[i]); - fh_iomux_setcur(&fh_iomux_cfg[i]); - fh_iomux_setpupd(&fh_iomux_cfg[i]); - fh_iomux_setrest(&fh_iomux_cfg[i]); - SET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset, reg); -// *((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset))); - //rt_kprintf("addr: 0x%x, pmu data: 0x%x\n", iomux_obj.pbase + iomux_obj.pads[i].reg_offset, GET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset)); -// test_cnt++; + iomux_obj.pads[i].id = i; + iomux_obj.pads[i].reg_offset = i * 4; + iomux_obj.pads[i].reg = ®//(UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset); + fh_iomux_setmfs(&fh_iomux_cfg[i]); + fh_iomux_setcur(&fh_iomux_cfg[i]); + fh_iomux_setpupd(&fh_iomux_cfg[i]); + fh_iomux_setrest(&fh_iomux_cfg[i]); + SET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset, reg); +// *((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset))); + //rt_kprintf("addr: 0x%x, pmu data: 0x%x\n", iomux_obj.pbase + iomux_obj.pads[i].reg_offset, GET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset)); +// test_cnt++; #else #ifdef FH_USING_JTAG - if (strncmp(fh_iomux_cfg[i].func_name[0], "JTAG", 4) == 0) - continue; + if (strncmp(fh_iomux_cfg[i].func_name[0], "JTAG", 4) == 0) + continue; #endif /* - if (strncmp(fh_iomux_cfg[i].func_name[1], "UART1", 5) == 0) - break; + if (strncmp(fh_iomux_cfg[i].func_name[1], "UART1", 5) == 0) + break; */ - __fh_setiomux(&fh_iomux_cfg[i], (void *) base + i * 4); + __fh_setiomux(&fh_iomux_cfg[i], (void *) base + i * 4); #endif - } + } #ifdef CONFIG_RMII - //(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 1; - reg = GET_REG(0xf00000a4); - reg |= (1 << 13); - SET_REG(0xf00000a4, reg); + //(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 1; + reg = GET_REG(0xf00000a4); + reg |= (1 << 13); + SET_REG(0xf00000a4, reg); #else - //(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 0; - reg = GET_REG(0xf00000a4); - reg &= ~(1 << 13); - SET_REG(0xf00000a4, reg); + //(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 0; + reg = GET_REG(0xf00000a4); + reg &= ~(1 << 13); + SET_REG(0xf00000a4, reg); #endif #ifdef IOMUX_DEBUG - fh_iomux_print(iomux_obj); + fh_iomux_print(iomux_obj); #endif - //rt_free(iomux_obj.vbase); - //iomux_obj.vbase = 0; + //rt_free(iomux_obj.vbase); + //iomux_obj.vbase = 0; } void fh_iomux_pin_switch(int pin_num, int func_num) { - RT_ASSERT(pin_num < fh_iomux_cfg_count); - __fh_setiomux(&fh_iomux_cfg[pin_num], (void *)g_iomux_base + pin_num * 4); - /* - fh_iomux_cfg[pin_num].func_sel = func_num; - fh_iomux_setmfs(&fh_iomux_cfg[pin_num]); - SET_REG(iomux_obj.pbase + iomux_obj.pads[pin_num].reg_offset, *((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[pin_num].reg_offset))); - */ + RT_ASSERT(pin_num < fh_iomux_cfg_count); + __fh_setiomux(&fh_iomux_cfg[pin_num], (void *)g_iomux_base + pin_num * 4); + /* + fh_iomux_cfg[pin_num].func_sel = func_num; + fh_iomux_setmfs(&fh_iomux_cfg[pin_num]); + SET_REG(iomux_obj.pbase + iomux_obj.pads[pin_num].reg_offset, *((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[pin_num].reg_offset))); + */ } diff --git a/bsp/fh8620/platform/plat-v2/iomux.h b/bsp/fh8620/platform/plat-v2/iomux.h index e03273b2b8..a0aa8d338e 100644 --- a/bsp/fh8620/platform/plat-v2/iomux.h +++ b/bsp/fh8620/platform/plat-v2/iomux.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef IOMUX_H_ #define IOMUX_H_ @@ -126,179 +126,179 @@ #define PMU_PAD_MAC_TXER (92) -#define IOMUX_PADTYPE(n) (Iomux_PadType##n *) -#define IOMUX_PUPD_NONE 0 -#define IOMUX_PUPD_DOWN 1 -#define IOMUX_PUPD_UP 2 -#define IOMUX_PUPD_KEEPER 3 +#define IOMUX_PADTYPE(n) (Iomux_PadType##n *) +#define IOMUX_PUPD_NONE 0 +#define IOMUX_PUPD_DOWN 1 +#define IOMUX_PUPD_UP 2 +#define IOMUX_PUPD_KEEPER 3 //#define IOMUX_DEBUG typedef union { - struct - { - UINT32 sr :1; - UINT32 reserved_3_1 :3; + struct + { + UINT32 sr :1; + UINT32 reserved_3_1 :3; - UINT32 e8_e4 :2; - UINT32 reserved_31_6 :24; + UINT32 e8_e4 :2; + UINT32 reserved_31_6 :24; - }bit; - UINT32 dw; + }bit; + UINT32 dw; }Iomux_PadType5; typedef union { - struct - { - UINT32 sr :1; - UINT32 reserved_3_1 :3; + struct + { + UINT32 sr :1; + UINT32 reserved_3_1 :3; - UINT32 e8_e4 :2; - UINT32 reserved_7_6 :2; + UINT32 e8_e4 :2; + UINT32 reserved_7_6 :2; - UINT32 mfs :1; - UINT32 reserved_31_9 :23; + UINT32 mfs :1; + UINT32 reserved_31_9 :23; - }bit; - UINT32 dw; + }bit; + UINT32 dw; }Iomux_PadType8; typedef union { - struct - { - UINT32 smt :1; - UINT32 reserved_3_1 :3; + struct + { + UINT32 smt :1; + UINT32 reserved_3_1 :3; - UINT32 ie :1; - UINT32 reserved_7_5 :3; + UINT32 ie :1; + UINT32 reserved_7_5 :3; - UINT32 pu_pd :2; - UINT32 reserved_31_10 :22; + UINT32 pu_pd :2; + UINT32 reserved_31_10 :22; - }bit; - UINT32 dw; + }bit; + UINT32 dw; }Iomux_PadType9; typedef union { - struct - { - UINT32 e4_e2 :2; - UINT32 reserved_3_2 :2; + struct + { + UINT32 e4_e2 :2; + UINT32 reserved_3_2 :2; - UINT32 smt :1; - UINT32 reserved_7_5 :3; + UINT32 smt :1; + UINT32 reserved_7_5 :3; - UINT32 ie :1; - UINT32 reserved_11_9 :3; + UINT32 ie :1; + UINT32 reserved_11_9 :3; - UINT32 mfs :2; - UINT32 reserved_31_14 :18; + UINT32 mfs :2; + UINT32 reserved_31_14 :18; - }bit; - UINT32 dw; + }bit; + UINT32 dw; }Iomux_PadType13; typedef union { - struct - { - UINT32 sr :1; - UINT32 reserved_3_1 :3; + struct + { + UINT32 sr :1; + UINT32 reserved_3_1 :3; - UINT32 e8_e4 :2; - UINT32 reserved_7_6 :2; + UINT32 e8_e4 :2; + UINT32 reserved_7_6 :2; - UINT32 smt :1; - UINT32 reserved_11_9 :3; + UINT32 smt :1; + UINT32 reserved_11_9 :3; - UINT32 ie :1; - UINT32 e :1; //only for PAD_MAC_REF_CLK_CFG (0x00a4) - UINT32 reserved_15_12 :2; + UINT32 ie :1; + UINT32 e :1; //only for PAD_MAC_REF_CLK_CFG (0x00a4) + UINT32 reserved_15_12 :2; - UINT32 pu_pd :2; - UINT32 reserved_31_18 :14; + UINT32 pu_pd :2; + UINT32 reserved_31_18 :14; - }bit; - UINT32 dw; + }bit; + UINT32 dw; }Iomux_PadType17; typedef union { - struct - { - UINT32 sr :1; - UINT32 reserved_3_1 :3; + struct + { + UINT32 sr :1; + UINT32 reserved_3_1 :3; - UINT32 e4_e2 :2; - UINT32 reserved_7_6 :2; + UINT32 e4_e2 :2; + UINT32 reserved_7_6 :2; - UINT32 smt :1; - UINT32 reserved_11_9 :3; + UINT32 smt :1; + UINT32 reserved_11_9 :3; - UINT32 ie :1; - UINT32 reserved_15_13 :3; + UINT32 ie :1; + UINT32 reserved_15_13 :3; - UINT32 pu_pd :2; - UINT32 reserved_19_18 :2; + UINT32 pu_pd :2; + UINT32 reserved_19_18 :2; - UINT32 mfs :1; - UINT32 reserved_31_21 :11; + UINT32 mfs :1; + UINT32 reserved_31_21 :11; - }bit; - UINT32 dw; + }bit; + UINT32 dw; }Iomux_PadType20; typedef union { - struct - { - UINT32 sr :1; - UINT32 reserved_3_1 :3; + struct + { + UINT32 sr :1; + UINT32 reserved_3_1 :3; - UINT32 e4_e2 :2; - UINT32 reserved_7_6 :2; + UINT32 e4_e2 :2; + UINT32 reserved_7_6 :2; - UINT32 smt :1; - UINT32 reserved_11_9 :3; + UINT32 smt :1; + UINT32 reserved_11_9 :3; - UINT32 ie :1; - UINT32 reserved_15_13 :3; + UINT32 ie :1; + UINT32 reserved_15_13 :3; - UINT32 pu_pd :2; - UINT32 reserved_19_18 :2; + UINT32 pu_pd :2; + UINT32 reserved_19_18 :2; - UINT32 mfs :2; - UINT32 reserved_31_21 :10; + UINT32 mfs :2; + UINT32 reserved_31_21 :10; - }bit; - UINT32 dw; + }bit; + UINT32 dw; }Iomux_PadType21; typedef struct { int id; - UINT32* reg; - UINT32 reg_offset; - char* func_name[4]; - int reg_type; - int func_sel; - int drv_cur; - int pupd; - //UINT32 value; + UINT32* reg; + UINT32 reg_offset; + char* func_name[4]; + int reg_type; + int func_sel; + int drv_cur; + int pupd; + //UINT32 value; }Iomux_Pad; typedef struct { - void *vbase; - void *pbase; - Iomux_Pad *pads; + void *vbase; + void *pbase; + Iomux_Pad *pads; }Iomux_Object; diff --git a/bsp/fh8620/platform/plat-v2/reset.c b/bsp/fh8620/platform/plat-v2/reset.c index 654a0745e9..aa7024169f 100644 --- a/bsp/fh8620/platform/plat-v2/reset.c +++ b/bsp/fh8620/platform/plat-v2/reset.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #include #include #include "fh_pmu.h" @@ -32,13 +32,13 @@ void machine_reset(void) { - fh_pmu_write(REG_PMU_SWRST_MAIN_CTRL, 0x7fffffff); + fh_pmu_write(REG_PMU_SWRST_MAIN_CTRL, 0x7fffffff); } void machine_shutdown(void) { - while(1) - ; + while(1) + ; } diff --git a/bsp/fh8620/platform/plat-v2/timer.c b/bsp/fh8620/platform/plat-v2/timer.c index de831db3c6..96bcc6f39d 100644 --- a/bsp/fh8620/platform/plat-v2/timer.c +++ b/bsp/fh8620/platform/plat-v2/timer.c @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,7 +18,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes @@ -43,48 +43,48 @@ static unsigned long long timestamp; rt_uint32_t read_pts(void) { - return GET_REG(REG_PAE_PTS_REG); + return GET_REG(REG_PAE_PTS_REG); } unsigned long long get_ticks(void) { - rt_uint32_t now = read_pts(); - if (now >= lastdec) { - /* normal mode */ - timestamp += now - lastdec; - } else { - now = read_pts(); - if (now >= lastdec) - timestamp += now - lastdec; - else { - /* we have an overflow ... */ - timestamp += now + 0xffffffff - lastdec; - } - } - lastdec = now; - return timestamp / (TICKS_PER_USEC * 10); + rt_uint32_t now = read_pts(); + if (now >= lastdec) { + /* normal mode */ + timestamp += now - lastdec; + } else { + now = read_pts(); + if (now >= lastdec) + timestamp += now - lastdec; + else { + /* we have an overflow ... */ + timestamp += now + 0xffffffff - lastdec; + } + } + lastdec = now; + return timestamp / (TICKS_PER_USEC * 10); } void udelay(unsigned long usec) { - unsigned long long tmp; - rt_uint32_t tmo; - tmo = (usec + 9) / 10; - tmp = get_ticks() + tmo; /* get current timestamp */ + unsigned long long tmp; + rt_uint32_t tmo; + tmo = (usec + 9) / 10; + tmp = get_ticks() + tmo; /* get current timestamp */ - while (get_ticks() < tmp) - /* loop till event */ - /*NOP*/; + while (get_ticks() < tmp) + /* loop till event */ + /*NOP*/; } void rt_timer_handler(int vector, void *param) { - timer *tim = param; + timer *tim = param; - rt_interrupt_enter(); - timer_get_eoi(tim); - rt_tick_increase(); - rt_interrupt_leave(); + rt_interrupt_enter(); + timer_get_eoi(tim); + rt_tick_increase(); + rt_interrupt_leave(); } /** @@ -92,18 +92,18 @@ void rt_timer_handler(int vector, void *param) */ void rt_hw_timer_init() { - timer *tim = (timer *) TMR_REG_BASE; - timer_init(tim); - /* install interrupt handler */ - rt_hw_interrupt_install(TMR0_IRQn, rt_timer_handler, (void *) tim, - "sys_tick"); - rt_hw_interrupt_umask(TMR0_IRQn); + timer *tim = (timer *) TMR_REG_BASE; + timer_init(tim); + /* install interrupt handler */ + rt_hw_interrupt_install(TMR0_IRQn, rt_timer_handler, (void *) tim, + "sys_tick"); + rt_hw_interrupt_umask(TMR0_IRQn); - timer_set_mode(tim, TIMER_MODE_PERIODIC); - timer_set_period(tim, RT_TICK_PER_SECOND, TIMER_CLOCK); - //timer_set_period(tim, RT_TIMER_TICK_PER_SECOND, TIMER_CLOCK); - timer_enable_irq(tim); - timer_enable(tim); + timer_set_mode(tim, TIMER_MODE_PERIODIC); + timer_set_period(tim, RT_TICK_PER_SECOND, TIMER_CLOCK); + //timer_set_period(tim, RT_TIMER_TICK_PER_SECOND, TIMER_CLOCK); + timer_enable_irq(tim); + timer_enable(tim); } diff --git a/bsp/fh8620/platform/plat-v2/timer.h b/bsp/fh8620/platform/plat-v2/timer.h index 5ee024a094..bbccdfa826 100644 --- a/bsp/fh8620/platform/plat-v2/timer.h +++ b/bsp/fh8620/platform/plat-v2/timer.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef TIMER_H_ #define TIMER_H_ diff --git a/bsp/fh8620/platform/platform_def.h b/bsp/fh8620/platform/platform_def.h index b511863981..a576220f3e 100644 --- a/bsp/fh8620/platform/platform_def.h +++ b/bsp/fh8620/platform/platform_def.h @@ -1,8 +1,8 @@ /* * This file is part of FH8620 BSP for RT-Thread distribution. * - * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. - * All rights reserved + * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. + * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,12 +18,12 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - * Visit http://www.fullhan.com to get contact with Fullhan. + * Visit http://www.fullhan.com to get contact with Fullhan. * * Change Logs: * Date Author Notes */ - + #ifndef PLATFORM_DEF_H_ #define PLATFORM_DEF_H_ diff --git a/bsp/fh8620/rtconfig.h b/bsp/fh8620/rtconfig.h index 8b7ce31be1..78749abdfa 100644 --- a/bsp/fh8620/rtconfig.h +++ b/bsp/fh8620/rtconfig.h @@ -5,19 +5,19 @@ // // -#define RT_NAME_MAX 16 +#define RT_NAME_MAX 16 // -#define RT_ALIGN_SIZE 4 +#define RT_ALIGN_SIZE 4 // // 8 // 32 // 256 // -#define RT_THREAD_PRIORITY_MAX 256 +#define RT_THREAD_PRIORITY_MAX 256 // -#define RT_TICK_PER_SECOND 100 +#define RT_TICK_PER_SECOND 100 // -#define IDLE_THREAD_STACK_SIZE 512 +#define IDLE_THREAD_STACK_SIZE 512 // // #define RT_USING_MODULE // @@ -36,11 +36,11 @@ //
// #define RT_USING_TIMER_SOFT // -#define RT_TIMER_THREAD_PRIO 4 +#define RT_TIMER_THREAD_PRIO 4 // -#define RT_TIMER_THREAD_STACK_SIZE 512 +#define RT_TIMER_THREAD_STACK_SIZE 512 // -#define RT_TIMER_TICK_PER_SECOND 100 +#define RT_TIMER_TICK_PER_SECOND 100 //
//
@@ -86,13 +86,13 @@ // //#define RT_USING_RTC // -#define RT_MMCSD_THREAD_PREORITY 15 +#define RT_MMCSD_THREAD_PREORITY 15 //
#define RT_USING_CONSOLE // -#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLEBUF_SIZE 128 // -#define RT_CONSOLE_DEVICE_NAME "uart1" +#define RT_CONSOLE_DEVICE_NAME "uart1" //
// @@ -105,7 +105,7 @@ // #define FINSH_USING_DESCRIPTION // -#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_THREAD_STACK_SIZE 4096 //
//
@@ -124,9 +124,9 @@ // #define DFS_USING_WORKDIR // -#define DFS_FILESYSTEMS_MAX 2 +#define DFS_FILESYSTEMS_MAX 2 // -#define DFS_FD_MAX 16 +#define DFS_FD_MAX 16 // #define RT_USING_DFS_ELMFAT // @@ -138,13 +138,13 @@ // 2 // 3 // -#define RT_DFS_ELM_USE_LFN 3 +#define RT_DFS_ELM_USE_LFN 3 // -#define RT_DFS_ELM_CODE_PAGE 936 +#define RT_DFS_ELM_CODE_PAGE 936 // #define RT_DFS_ELM_CODE_PAGE_FILE // -#define RT_DFS_ELM_MAX_LFN 255 +#define RT_DFS_ELM_MAX_LFN 255 // #define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 // @@ -174,19 +174,19 @@ // #define RT_LWIP_DHCP // -#define RT_LWIP_TCPTHREAD_PRIORITY 12 +#define RT_LWIP_TCPTHREAD_PRIORITY 12 // -#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8 +#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8 // -#define RT_LWIP_TCPTHREAD_STACKSIZE 4096 +#define RT_LWIP_TCPTHREAD_STACKSIZE 4096 // -#define RT_LWIP_ETHTHREAD_PRIORITY 14 +#define RT_LWIP_ETHTHREAD_PRIORITY 14 // -#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8 +#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8 // -#define RT_LWIP_ETHTHREAD_STACKSIZE 512 +#define RT_LWIP_ETHTHREAD_STACKSIZE 512 // -#define RT_LWIP_IPADDR "192.168.1.30" +#define RT_LWIP_IPADDR "192.168.1.30" // #define RT_LWIP_GWADDR "192.168.1.1" // diff --git a/bsp/nuvoton/libraries/m2354/rtt_port/SConscript b/bsp/nuvoton/libraries/m2354/rtt_port/SConscript index 549b75901b..0822565fbb 100644 --- a/bsp/nuvoton/libraries/m2354/rtt_port/SConscript +++ b/bsp/nuvoton/libraries/m2354/rtt_port/SConscript @@ -10,12 +10,12 @@ group = [] # USB driver constrain if GetDepend('BOARD_USING_USBD') and ( GetDepend('BSP_USING_OTG') or GetDepend('BSP_USING_USBH') ): - print 'Sorry, wrong selection.' - print '[Hint] You already select BOARD_USING_USBD. Please de-select BSP_USING_OTG and BSP_USING_USBH.' + print ('Sorry, wrong selection.') + print ('[Hint] You already select BOARD_USING_USBD. Please de-select BSP_USING_OTG and BSP_USING_USBH.') sys.exit(1) elif GetDepend('BOARD_USING_USBH') and ( GetDepend('BSP_USING_OTG') or GetDepend('BSP_USING_USBD') ): - print 'Sorry, wrong selection.' - print '[Hint] You already select BOARD_USING_USBH. Please de-select BSP_USING_OTG and BSP_USING_USBD options.' + print ('Sorry, wrong selection.') + print ('[Hint] You already select BOARD_USING_USBH. Please de-select BSP_USING_OTG and BSP_USING_USBD options.') sys.exit(1) else: group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) diff --git a/bsp/nuvoton/libraries/m480/rtt_port/SConscript b/bsp/nuvoton/libraries/m480/rtt_port/SConscript index 77bd290714..2e80314127 100644 --- a/bsp/nuvoton/libraries/m480/rtt_port/SConscript +++ b/bsp/nuvoton/libraries/m480/rtt_port/SConscript @@ -10,24 +10,24 @@ group = [] # USB driver constrain if GetDepend('BOARD_USING_HSUSBD') and ( GetDepend('BSP_USING_USBD') or GetDepend('BSP_USING_HSUSBH') or GetDepend('BSP_USING_HSOTG') ): - print 'Sorry, wrong selection.' - print '[Hint] You already select BOARD_USING_HSUSBD. Please de-select BSP_USING_USBD, BSP_USING_HSUSBH and BSP_USING_HSOTG options.' + print ('Sorry, wrong selection.') + print ('[Hint] You already select BOARD_USING_HSUSBD. Please de-select BSP_USING_USBD, BSP_USING_HSUSBH and BSP_USING_HSOTG options.') sys.exit(1) elif GetDepend('BOARD_USING_HSUSBD_USBH') and ( GetDepend('BSP_USING_USBD') or GetDepend('BSP_USING_HSUSBH') or GetDepend('BSP_USING_HSOTG') ): - print 'Sorry, wrong selection.' - print '[Hint] You already select BOARD_USING_HSUSBD_USBH. Please de-select BSP_USING_USBD, BSP_USING_HSUSBH and BSP_USING_HSOTG options.' + print ('Sorry, wrong selection.') + print ('[Hint] You already select BOARD_USING_HSUSBD_USBH. Please de-select BSP_USING_USBD, BSP_USING_HSUSBH and BSP_USING_HSOTG options.') sys.exit(1) elif GetDepend('BOARD_USING_HSUSBH') and ( GetDepend('BSP_USING_USBH') or GetDepend('BSP_USING_HSUSBD') or GetDepend('BSP_USING_HSOTG') ): - print 'Sorry, wrong selection.' - print '[Hint] You already select BOARD_USING_HSUSBH. Please de-select BSP_USING_USBH, BSP_USING_HSUSBD and BSP_USING_HSOTG options.' + print ('Sorry, wrong selection.') + print ('[Hint] You already select BOARD_USING_HSUSBH. Please de-select BSP_USING_USBH, BSP_USING_HSUSBD and BSP_USING_HSOTG options.') sys.exit(1) elif GetDepend('BOARD_USING_HSUSBH_USBD') and ( GetDepend('BSP_USING_USBH') or GetDepend('BSP_USING_HSUSBD') or GetDepend('BSP_USING_HSOTG') ): - print 'Sorry, wrong selection.' - print '[Hint] You already select BOARD_USING_HSUSBH_USBD. Please de-select BSP_USING_USBH, BSP_USING_HSUSBD and BSP_USING_HSOTG options.' + print ('Sorry, wrong selection.') + print ('[Hint] You already select BOARD_USING_HSUSBH_USBD. Please de-select BSP_USING_USBH, BSP_USING_HSUSBD and BSP_USING_HSOTG options.') sys.exit(1) elif GetDepend('BOARD_USING_HSOTG') and ( GetDepend('BSP_USING_USBD') or GetDepend('BSP_USING_USBH') ): - print 'Sorry, wrong selection.' - print '[Hint] You already select BOARD_USING_HSOTG. Please de-select BSP_USING_USBD and BSP_USING_USBH options.' + print ('Sorry, wrong selection.') + print ('[Hint] You already select BOARD_USING_HSOTG. Please de-select BSP_USING_USBD and BSP_USING_USBH options.') sys.exit(1) else: group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) diff --git a/bsp/raspberry-pico/README.md b/bsp/raspberry-pico/README.md index c238850b9b..eaac07017b 100644 --- a/bsp/raspberry-pico/README.md +++ b/bsp/raspberry-pico/README.md @@ -64,14 +64,14 @@ msh > ## Peripheral Condition -| Drive | Support | Remark | -| ----- | ------- | ------ | -| UART | Support | UART0 | -| GPIO | Support | 0-29 | -| I2C | - | - | -| RTC | - | - | -| SDIO | - | - | -| SPI | - | - | -| TIMER | - | - | -| WDT | - | - | +| Drive | Support | Remark | +| ----- | ------- | ------- | +| UART | Support | UART0/1 | +| GPIO | Support | 0-29 | +| I2C | - | - | +| RTC | - | - | +| SDIO | - | - | +| SPI | - | - | +| TIMER | - | - | +| WDT | - | - | diff --git a/bsp/raspberry-pico/drivers/board.c b/bsp/raspberry-pico/drivers/board.c index af8bcb4f80..ff99bbfe86 100644 --- a/bsp/raspberry-pico/drivers/board.c +++ b/bsp/raspberry-pico/drivers/board.c @@ -16,8 +16,6 @@ #include "board.h" #include "hardware/structs/systick.h" -uint8_t heap[1024 * 80]; - void isr_systick(void) { /* enter interrupt */ @@ -45,11 +43,25 @@ uint32_t systick_config(uint32_t ticks) void rt_hw_board_init() { + rt_system_heap_init(HEAP_BEGIN, HEAP_END); + + alarm_pool_init_default(); + + // Start and end points of the constructor list, + // defined by the linker script. + extern void (*__init_array_start)(); + extern void (*__init_array_end)(); + + // Call each function in the list. + // We have to take the address of the symbols, as __init_array_start *is* + // the first function pointer, not the address of it. + for (void (**p)() = &__init_array_start; p < &__init_array_end; ++p) { + (*p)(); + } + /* Configure the SysTick */ systick_config(frequency_count_khz(CLOCKS_FC0_SRC_VALUE_ROSC_CLKSRC)*10000/RT_TICK_PER_SECOND); - rt_system_heap_init(heap, (uint8_t *)heap + sizeof(heap)); - stdio_init_all(); rt_hw_uart_init(); diff --git a/bsp/raspberry-pico/drivers/board.h b/bsp/raspberry-pico/drivers/board.h index e762b479f8..0c418d5c4e 100644 --- a/bsp/raspberry-pico/drivers/board.h +++ b/bsp/raspberry-pico/drivers/board.h @@ -20,9 +20,9 @@ #define PICO_SRAM_SIZE 256 #define PICO_SRAM_END (0x20000000 + PICO_SRAM_SIZE * 1024) -extern int __bss_end; -#define HEAP_BEGIN (&__bss_end) -#define HEAP_END PICO_SRAM_END +extern int __bss_end__; +#define HEAP_BEGIN (&__bss_end__) +#define HEAP_END ((void *)PICO_SRAM_END) int rt_hw_uart_init(void); diff --git a/bsp/raspberry-pico/drivers/drv_uart.c b/bsp/raspberry-pico/drivers/drv_uart.c index 925968f6d7..6077b60f92 100644 --- a/bsp/raspberry-pico/drivers/drv_uart.c +++ b/bsp/raspberry-pico/drivers/drv_uart.c @@ -153,3 +153,130 @@ int rt_hw_uart_init(void) return ret; } // INIT_DEVICE_EXPORT(rt_hw_uart_init); + +// We are using pins 0 and 1, but see the GPIO function select table in the +// datasheet for information on which other pins can be used. +#define UART1_TX_PIN 4 +#define UART1_RX_PIN 5 + +static struct pico_uart1_dev uart1_dev; + +struct pico_uart1_dev +{ + struct rt_serial_device parent; + rt_uint32_t uart_periph; + rt_uint32_t irqno; +}; + +void pico_uart1_isr(void) +{ + rt_interrupt_enter(); + /* read interrupt status and clear it */ + if (uart_is_readable(uart1)) /* rx ind */ + { + rt_hw_serial_isr(&uart1_dev.parent, RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} + +/* + * UART interface + */ +static rt_err_t pico_uart1_configure(struct rt_serial_device *serial, struct serial_configure *cfg) +{ + return RT_EOK; +} + +static rt_err_t pico_uart1_control(struct rt_serial_device *serial, int cmd, void *arg) +{ + switch (cmd) + { + /* enable interrupt */ + case RT_DEVICE_CTRL_SET_INT: + // Set up a RX interrupt + // We need to set up the handler first + // And set up and enable the interrupt handlers + irq_set_exclusive_handler(UART1_IRQ, pico_uart1_isr); + irq_set_enabled(UART1_IRQ, true); + + // Now enable the UART to send interrupts - RX only + uart_set_irq_enables(uart1, true, false); + break; + } + return RT_EOK; +} + +static int pico_uart1_putc(struct rt_serial_device *serial, char c) +{ + uart_putc_raw(uart1, c); + + return 1; +} + +static int pico_uart1_getc(struct rt_serial_device *serial) +{ + int ch; + + if (uart_is_readable(uart1)) + { + ch = uart_get_hw(uart1)->dr; + } + else + { + ch =-1; + } + + return ch; +} + +const static struct rt_uart_ops _uart1_ops = +{ + pico_uart1_configure, + pico_uart1_control, + pico_uart1_putc, + pico_uart1_getc, + RT_NULL, +}; + +/* + * UART Initiation + */ +int rt_hw_uart1_init(void) +{ + rt_err_t ret = RT_EOK; + + struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; + + uart_init(uart1, 115200); + + // Set the TX and RX pins by using the function select on the GPIO + // Set datasheet for more information on function select + gpio_set_function(UART1_TX_PIN, GPIO_FUNC_UART); + gpio_set_function(UART1_RX_PIN, GPIO_FUNC_UART); + + // Actually, we want a different speed + // The call will return the actual baud rate selected, which will be as close as + // possible to that requested + uart_set_baudrate(uart1, BAUD_RATE); + + // Set UART flow control CTS/RTS, we don't want these, so turn them off + uart_set_hw_flow(uart1, false, false); + + // Set our data format + uart_set_format(uart1, DATA_BITS, STOP_BITS, PARITY); + + // Turn off FIFO's - we want to do this character by character + uart_set_fifo_enabled(uart1, false); + + uart1_dev.parent.ops = &_uart1_ops; + uart1_dev.parent.config = config; + + ret = rt_hw_serial_register(&uart1_dev.parent, + "uart1", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + &uart1_dev); + + return ret; +} +INIT_DEVICE_EXPORT(rt_hw_uart1_init); diff --git a/bsp/raspberry-pico/libraries/pico-sdk/src/rp2_common/pico_runtime/runtime.c b/bsp/raspberry-pico/libraries/pico-sdk/src/rp2_common/pico_runtime/runtime.c index 98104db73a..98f124f0a3 100644 --- a/bsp/raspberry-pico/libraries/pico-sdk/src/rp2_common/pico_runtime/runtime.c +++ b/bsp/raspberry-pico/libraries/pico-sdk/src/rp2_common/pico_runtime/runtime.c @@ -27,6 +27,7 @@ #endif extern char __StackLimit; /* Set by linker. */ +extern void _exit(int status); uint32_t __attribute__((section(".ram_vector_table"))) ram_vector_table[48]; @@ -136,57 +137,6 @@ void runtime_init(void) { spin_locks_reset(); irq_init_priorities(); - alarm_pool_init_default(); - - // Start and end points of the constructor list, - // defined by the linker script. - extern void (*__init_array_start)(); - extern void (*__init_array_end)(); - - // Call each function in the list. - // We have to take the address of the symbols, as __init_array_start *is* - // the first function pointer, not the address of it. - for (void (**p)() = &__init_array_start; p < &__init_array_end; ++p) { - (*p)(); - } - -} - -void _exit(int status) { -#if PICO_ENTER_USB_BOOT_ON_EXIT - reset_usb_boot(0,0); -#else - while (1) { - __breakpoint(); - } -#endif -} - -void *_sbrk(int incr) { - extern char end; /* Set by linker. */ - static char *heap_end; - char *prev_heap_end; - - if (heap_end == 0) - heap_end = &end; - - prev_heap_end = heap_end; - char *next_heap_end = heap_end + incr; - - if (__builtin_expect(next_heap_end >= (&__StackLimit), false)) { -#if PICO_USE_OPTIMISTIC_SBRK - if (next_heap_end == &__StackLimit) { -// errno = ENOMEM; - return (char *) -1; - } - next_heap_end = &__StackLimit; -#else - return (char *) -1; -#endif - } - - heap_end = next_heap_end; - return (void *) prev_heap_end; } // exit is not useful... no desire to pull in __call_exitprocs diff --git a/bsp/raspberry-pico/link.ld b/bsp/raspberry-pico/link.ld index 898139432f..ae2889b0fd 100644 --- a/bsp/raspberry-pico/link.ld +++ b/bsp/raspberry-pico/link.ld @@ -224,13 +224,6 @@ SECTIONS __bss_end__ = .; } > RAM - .heap (COPY): - { - __end__ = .; - end = __end__; - *(.heap*) - __HeapLimit = .; - } > RAM /* .stack*_dummy section doesn't contains any symbols. It is only * used for linker to calculate size of stack sections, and assign @@ -263,7 +256,7 @@ SECTIONS PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed") + ASSERT(__StackLimit >= __bss_end__, "region RAM overflowed") /* todo assert on extra code */ } diff --git a/bsp/stm32f20x/.config b/bsp/stm32f20x/.config index a568b7e0ae..5f3bc12590 100644 --- a/bsp/stm32f20x/.config +++ b/bsp/stm32f20x/.config @@ -7,6 +7,7 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set # CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set @@ -20,18 +21,7 @@ CONFIG_RT_USING_IDLE_HOOK=y CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set -CONFIG_RT_DEBUG=y -CONFIG_RT_DEBUG_COLOR=y -# CONFIG_RT_DEBUG_INIT_CONFIG is not set -# CONFIG_RT_DEBUG_THREAD_CONFIG is not set -# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set -# CONFIG_RT_DEBUG_IPC_CONFIG is not set -# CONFIG_RT_DEBUG_TIMER_CONFIG is not set -# CONFIG_RT_DEBUG_IRQ_CONFIG is not set -# CONFIG_RT_DEBUG_MEM_CONFIG is not set -# CONFIG_RT_DEBUG_SLAB_CONFIG is not set -# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set -# CONFIG_RT_DEBUG_MODULE_CONFIG is not set +# CONFIG_RT_DEBUG is not set # # Inter-Thread communication @@ -51,6 +41,7 @@ CONFIG_RT_USING_MEMPOOL=y # CONFIG_RT_USING_NOHEAP is not set CONFIG_RT_USING_SMALL_MEM=y # CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_USERHEAP is not set # CONFIG_RT_USING_MEMTRACE is not set CONFIG_RT_USING_HEAP=y @@ -63,8 +54,9 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -CONFIG_RT_VER_NUM=0x40001 +CONFIG_RT_VER_NUM=0x40003 CONFIG_ARCH_ARM=y +CONFIG_RT_USING_CPU_FFS=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_M3=y # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set @@ -73,6 +65,7 @@ CONFIG_ARCH_ARM_CORTEX_M3=y # RT-Thread Components # # CONFIG_RT_USING_COMPONENTS_INIT is not set +# CONFIG_RT_USING_USER_MAIN is not set # # C++ features @@ -101,51 +94,34 @@ CONFIG_FINSH_ARG_MAX=10 # # Device virtual file system # -CONFIG_RT_USING_DFS=y -CONFIG_DFS_USING_WORKDIR=y -CONFIG_DFS_FILESYSTEMS_MAX=2 -CONFIG_DFS_FILESYSTEM_TYPES_MAX=2 -CONFIG_DFS_FD_MAX=4 -# CONFIG_RT_USING_DFS_MNTTABLE is not set -CONFIG_RT_USING_DFS_ELMFAT=y - -# -# elm-chan's FatFs, Generic FAT Filesystem Module -# -CONFIG_RT_DFS_ELM_CODE_PAGE=437 -CONFIG_RT_DFS_ELM_WORD_ACCESS=y -CONFIG_RT_DFS_ELM_USE_LFN_0=y +# CONFIG_RT_USING_DFS is not set +# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set # CONFIG_RT_DFS_ELM_USE_LFN_1 is not set # CONFIG_RT_DFS_ELM_USE_LFN_2 is not set # CONFIG_RT_DFS_ELM_USE_LFN_3 is not set -CONFIG_RT_DFS_ELM_USE_LFN=0 -CONFIG_RT_DFS_ELM_MAX_LFN=255 -CONFIG_RT_DFS_ELM_DRIVES=1 -CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512 -# CONFIG_RT_DFS_ELM_USE_ERASE is not set -CONFIG_RT_DFS_ELM_REENTRANT=y -CONFIG_RT_USING_DFS_DEVFS=y -# CONFIG_RT_USING_DFS_ROMFS is not set -# CONFIG_RT_USING_DFS_RAMFS is not set -# CONFIG_RT_USING_DFS_UFFS is not set -# CONFIG_RT_USING_DFS_JFFS2 is not set +# CONFIG_RT_DFS_ELM_LFN_UNICODE_0 is not set +# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set +# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set +# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set # # Device Drivers # CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_PIPE_BUFSZ=512 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set # CONFIG_RT_USING_SERIAL is not set # CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_CPUTIME is not set # CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set # CONFIG_RT_USING_PWM is not set # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set -# CONFIG_RT_USING_MTD is not set # CONFIG_RT_USING_PM is not set CONFIG_RT_USING_RTC=y # CONFIG_RT_USING_ALARM is not set @@ -155,10 +131,10 @@ CONFIG_RT_USING_RTC=y # CONFIG_RT_USING_WDT is not set # CONFIG_RT_USING_AUDIO is not set # CONFIG_RT_USING_SENSOR is not set - -# -# Using WiFi -# +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set # CONFIG_RT_USING_WIFI is not set # @@ -170,13 +146,9 @@ CONFIG_RT_USING_RTC=y # # POSIX layer and C standard library # -CONFIG_RT_USING_LIBC=y +# CONFIG_RT_USING_LIBC is not set # CONFIG_RT_USING_PTHREADS is not set -CONFIG_RT_USING_POSIX=y -# CONFIG_RT_USING_POSIX_MMAP is not set -# CONFIG_RT_USING_POSIX_TERMIOS is not set -# CONFIG_RT_USING_POSIX_AIO is not set -# CONFIG_RT_USING_MODULE is not set +CONFIG_RT_LIBC_USING_TIME=y # # Network @@ -187,16 +159,16 @@ CONFIG_RT_USING_POSIX=y # # CONFIG_RT_USING_SAL is not set +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + # # light weight TCP/IP stack # # CONFIG_RT_USING_LWIP is not set -# -# Modbus master and slave stack -# -# CONFIG_RT_USING_MODBUS is not set - # # AT commands # @@ -210,16 +182,9 @@ CONFIG_RT_USING_POSIX=y # # Utilities # -# CONFIG_RT_USING_LOGTRACE is not set # CONFIG_RT_USING_RYM is not set # CONFIG_RT_USING_ULOG is not set # CONFIG_RT_USING_UTEST is not set - -# -# ARM CMSIS -# -# CONFIG_RT_USING_CMSIS_OS is not set -# CONFIG_RT_USING_RTT_CMSIS is not set # CONFIG_RT_USING_LWP is not set # @@ -229,14 +194,20 @@ CONFIG_RT_USING_POSIX=y # # IoT - internet of things # +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set # CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set # CONFIG_PKG_USING_WEBCLIENT is not set # CONFIG_PKG_USING_WEBNET is not set # CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_CJSON is not set # CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set # CONFIG_PKG_USING_LJSON is not set # CONFIG_PKG_USING_EZXML is not set # CONFIG_PKG_USING_NANOPB is not set @@ -258,7 +229,10 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set # CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set # CONFIG_PKG_USING_WIZNET is not set # @@ -268,9 +242,34 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_GAGENT_CLOUD is not set # CONFIG_PKG_USING_ALI_IOTKIT is not set # CONFIG_PKG_USING_AZURE is not set -# CONFIG_PKG_USING_TENCENT_IOTKIT is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set # CONFIG_PKG_USING_NIMBLE is not set # CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set # # security packages @@ -278,6 +277,8 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_MBEDTLS is not set # CONFIG_PKG_USING_libsodium is not set # CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set # # language packages @@ -292,6 +293,11 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set # # tools packages @@ -303,7 +309,31 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set +# CONFIG_PKG_USING_LOGMGR is not set # CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set # # system packages @@ -314,12 +344,40 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_LWEXT4 is not set # CONFIG_PKG_USING_PARTITION is not set # CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FLASHDB is not set # CONFIG_PKG_USING_SQLITE is not set # CONFIG_PKG_USING_RTI is not set # CONFIG_PKG_USING_LITTLEVGL2RTT is not set # CONFIG_PKG_USING_CMSIS is not set # CONFIG_PKG_USING_DFS_YAFFS is not set # CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set +# CONFIG_PKG_USING_LPM is not set # # peripheral libraries and drivers @@ -327,17 +385,61 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_SENSORS_DRIVERS is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_SHT2X is not set -# CONFIG_PKG_USING_AHT10 is not set -# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AS7341 is not set # CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_U8G2 is not set # CONFIG_PKG_USING_BUTTON is not set -# CONFIG_PKG_USING_MPU6XXX is not set # CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_SX12XX is not set # CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set # CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set # # miscellaneous packages @@ -347,12 +449,17 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_FASTLZ is not set # CONFIG_PKG_USING_MINILZO is not set # CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set # CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set # CONFIG_PKG_USING_CANFESTIVAL is not set # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set # CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set # # samples: kernel and components samples @@ -363,7 +470,29 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_HELLO is not set # CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set + +# +# games: games run on RT-Thread console +# +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_COWSAY is not set CONFIG_SOC_STM32F2=y CONFIG_RT_USING_UART1=y # CONFIG_RT_USING_UART6 is not set +CONFIG_SOC_STM32F20X=y diff --git a/bsp/stm32f20x/Drivers/24LCxx.c b/bsp/stm32f20x/Drivers/24LCxx.c index 1903a85b82..1fdbc9b8d1 100644 --- a/bsp/stm32f20x/Drivers/24LCxx.c +++ b/bsp/stm32f20x/Drivers/24LCxx.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,171 +16,171 @@ #define EE24LC024H /* - Note: If eeprom size lager then EE_MEM_SIZE byte, you must define EE_ADDR_SIZE == I2C_MEM_2Bytes + Note: If eeprom size lager then EE_MEM_SIZE byte, you must define EE_ADDR_SIZE == I2C_MEM_2Bytes */ #ifdef EE24LC024H #define EE_ADDR_SIZE I2C_MEM_1Byte -#define EE_MEM_SIZE 256 -#define EE_PageSize 16 +#define EE_MEM_SIZE 256 +#define EE_PageSize 16 #endif static struct rt_device ee_dev; uint32_t EE_ReadBuffer(void *pBuffer, rt_off_t ReadAddr, rt_size_t NumByteToRead) { - return I2C_IORW(I2C1, (uint8_t *)pBuffer, (uint16_t)NumByteToRead, (uint16_t)ReadAddr, EE_Address | 0x01, I2C_MEM_1Byte ); + return I2C_IORW(I2C1, (uint8_t *)pBuffer, (uint16_t)NumByteToRead, (uint16_t)ReadAddr, EE_Address | 0x01, I2C_MEM_1Byte ); } uint32_t EE_WritePage(void *pBuffer, uint16_t WriteAddr) -{ - I2C_IORW(I2C1, (uint8_t *)pBuffer, EE_PageSize , WriteAddr, EE_Address , EE_ADDR_SIZE ); +{ + I2C_IORW(I2C1, (uint8_t *)pBuffer, EE_PageSize , WriteAddr, EE_Address , EE_ADDR_SIZE ); - /*if( I2C_AcknowledgePolling(I2C1 , EE_Address) == Error ) - rt_kprintf("EE ACK failed\n");*/ - rt_thread_delay(50); + /*if( I2C_AcknowledgePolling(I2C1 , EE_Address) == Error ) + rt_kprintf("EE ACK failed\n");*/ + rt_thread_delay(50); - return 0; + return 0; } uint32_t EE_WriteByte(void *pBuffer, uint16_t WriteAddr) { - I2C_IORW(I2C1, (uint8_t *)pBuffer, 1 , WriteAddr, EE_Address, EE_ADDR_SIZE ); + I2C_IORW(I2C1, (uint8_t *)pBuffer, 1 , WriteAddr, EE_Address, EE_ADDR_SIZE ); - /*if( I2C_AcknowledgePolling(I2C1 , EE_Address) == Error ) - rt_kprintf("EE ACK failed\n");*/ - rt_thread_delay(50); + /*if( I2C_AcknowledgePolling(I2C1 , EE_Address) == Error ) + rt_kprintf("EE ACK failed\n");*/ + rt_thread_delay(50); - return 0; + return 0; } Status EE_WriteBuffer(const void *pBuffer, rt_off_t WriteAddr, rt_size_t NumByteToWrite) { - uint8_t NumOfPage = 0, NumOfSingle = 0; - uint16_t Addr = 0,count = 0; - uint8_t *ptr = (uint8_t *)pBuffer; - - Addr = (uint16_t)(WriteAddr&0xFFFF); + uint8_t NumOfPage = 0, NumOfSingle = 0; + uint16_t Addr = 0,count = 0; + uint8_t *ptr = (uint8_t *)pBuffer; - count = (uint16_t)(NumByteToWrite&0xFFFF); - - if ((WriteAddr + NumByteToWrite) > EE_MEM_SIZE) - return Error; + Addr = (uint16_t)(WriteAddr&0xFFFF); - while (count >= EE_PageSize) - { - EE_WritePage(ptr, Addr); - Addr += EE_PageSize; - count -= EE_PageSize; - ptr += EE_PageSize; - } - - while (count) - { - EE_WriteByte(ptr++, Addr++); - count--; - } - - return Success; + count = (uint16_t)(NumByteToWrite&0xFFFF); + + if ((WriteAddr + NumByteToWrite) > EE_MEM_SIZE) + return Error; + + while (count >= EE_PageSize) + { + EE_WritePage(ptr, Addr); + Addr += EE_PageSize; + count -= EE_PageSize; + ptr += EE_PageSize; + } + + while (count) + { + EE_WriteByte(ptr++, Addr++); + count--; + } + + return Success; } static rt_err_t ee24LCxx_init(rt_device_t dev) { - return RT_EOK; + return RT_EOK; } static rt_size_t ee24LCxx_read(rt_device_t dev, rt_off_t pos, void *buf, rt_size_t size) { - if (EE_ReadBuffer(buf, pos, size) == Success) - return size; - else - return -1; + if (EE_ReadBuffer(buf, pos, size) == Success) + return size; + else + return -1; } static rt_size_t ee24LCxx_write(rt_device_t dev, rt_off_t pos, const void *buf, rt_size_t size) { - if (EE_WriteBuffer(buf, pos, size) == Success) - return size; - else - return -1; + if (EE_WriteBuffer(buf, pos, size) == Success) + return size; + else + return -1; } static rt_err_t ee24LCxx_open(rt_device_t dev, rt_uint16_t oflag) { - return RT_EOK; + return RT_EOK; } static rt_err_t ee24LCxx_close(rt_device_t dev) { - return RT_EOK; + return RT_EOK; } static rt_err_t ee24LCxx_control(rt_device_t dev, int cmd, void *args) { - return RT_EOK; + return RT_EOK; } void ee24LCxx_hw_init(void) { - uint32_t delay, i; - I2C1_INIT(); + uint32_t delay, i; + I2C1_INIT(); - for (i =0; i < 4; i++) - { - delay = 0xFFFFF; - while (delay--); - } + for (i =0; i < 4; i++) + { + delay = 0xFFFFF; + while (delay--); + } - ee_dev.init = ee24LCxx_init; - ee_dev.open = ee24LCxx_open; - ee_dev.close = ee24LCxx_close; - ee_dev.read = ee24LCxx_read; - ee_dev.write = ee24LCxx_write; - ee_dev.control = ee24LCxx_control; - ee_dev.type = RT_Device_Class_Unknown; + ee_dev.init = ee24LCxx_init; + ee_dev.open = ee24LCxx_open; + ee_dev.close = ee24LCxx_close; + ee_dev.read = ee24LCxx_read; + ee_dev.write = ee24LCxx_write; + ee_dev.control = ee24LCxx_control; + ee_dev.type = RT_Device_Class_Unknown; - rt_device_register(&ee_dev, "eeprom", RT_DEVICE_FLAG_RDWR); + rt_device_register(&ee_dev, "eeprom", RT_DEVICE_FLAG_RDWR); } void dump_ee(void) { - rt_device_t dev; - char buf[EE_MEM_SIZE]; - int i, j; + rt_device_t dev; + char buf[EE_MEM_SIZE]; + int i, j; - dev = rt_device_find("eeprom"); - rt_device_read(dev, 0, buf, EE_MEM_SIZE ); + dev = rt_device_find("eeprom"); + rt_device_read(dev, 0, buf, EE_MEM_SIZE ); - for (i = 0; i < 16; i++) - { - for (j = 0; j < 16; j++) - { - rt_kprintf("0x%02X ", buf[ i*16+ j]); - } - rt_kprintf("\n"); - } + for (i = 0; i < 16; i++) + { + for (j = 0; j < 16; j++) + { + rt_kprintf("0x%02X ", buf[ i*16+ j]); + } + rt_kprintf("\n"); + } } void ee_reset(void) { - char buf[EE_MEM_SIZE], read[EE_MEM_SIZE]; - int i; - rt_device_t dev = rt_device_find("eeprom"); + char buf[EE_MEM_SIZE], read[EE_MEM_SIZE]; + int i; + rt_device_t dev = rt_device_find("eeprom"); - for (i = 0; i < EE_MEM_SIZE; i++) - { - buf[i] = 0xFF; - read[i] = 0; - } - if (rt_device_write(dev, 0, buf, EE_MEM_SIZE ) == EE_MEM_SIZE) - rt_kprintf("Write Success\n"); + for (i = 0; i < EE_MEM_SIZE; i++) + { + buf[i] = 0xFF; + read[i] = 0; + } + if (rt_device_write(dev, 0, buf, EE_MEM_SIZE ) == EE_MEM_SIZE) + rt_kprintf("Write Success\n"); - rt_device_read(dev, 0, read, EE_MEM_SIZE ); + rt_device_read(dev, 0, read, EE_MEM_SIZE ); - for (i = 0; i < EE_MEM_SIZE; i++) - { - if (buf[i] != read[i]) - rt_kprintf("EE Failed %X != %X at %d\n", buf[i], read[i], i); - } + for (i = 0; i < EE_MEM_SIZE; i++) + { + if (buf[i] != read[i]) + rt_kprintf("EE Failed %X != %X at %d\n", buf[i], read[i], i); + } } #ifdef RT_USING_FINSH diff --git a/bsp/stm32f20x/Drivers/FM25Lx.c b/bsp/stm32f20x/Drivers/FM25Lx.c index b1437d7707..e59af25fd4 100644 --- a/bsp/stm32f20x/Drivers/FM25Lx.c +++ b/bsp/stm32f20x/Drivers/FM25Lx.c @@ -26,7 +26,7 @@ void rt_hw_spi2_baud_rate(uint16_t SPI_BaudRatePrescaler) /* FM25L256 using SPI2 */ void fm25_spi_cfg() { - GPIO_InitTypeDef GPIO_InitStructure; + GPIO_InitTypeDef GPIO_InitStructure; SPI_InitTypeDef SPI_InitStructure; /* Enable SPI Periph clock */ @@ -36,24 +36,24 @@ void fm25_spi_cfg() //Setup GPIO GPIO_InitStructure.GPIO_Pin = FM25_SPI_SCK | FM25_SPI_MISO | FM25_SPI_MOSI; - /*Connect Pin to AF*/ - GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource3, GPIO_AF_SPI3); - GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource4, GPIO_AF_SPI3); - GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource5, GPIO_AF_SPI3); + /*Connect Pin to AF*/ + GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource3, GPIO_AF_SPI3); + GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource4, GPIO_AF_SPI3); + GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource5, GPIO_AF_SPI3); - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; - GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; - GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; - GPIO_Init(FM25_SPI_GPIO, &GPIO_InitStructure); + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(FM25_SPI_GPIO, &GPIO_InitStructure); - /* CS pin: PB12 */ + /* CS pin: PB12 */ GPIO_InitStructure.GPIO_Pin = FM25_SPI_NSS_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_Init(FM25_SPI_NSS_GPIO, &GPIO_InitStructure); - CS_HIGH(); + CS_HIGH(); - SPI_Cmd(FM25_SPI, DISABLE); + SPI_Cmd(FM25_SPI, DISABLE); /*------------------------ SPI configuration ------------------------*/ SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx; SPI_InitStructure.SPI_Mode = SPI_Mode_Master; @@ -72,23 +72,23 @@ void fm25_spi_cfg() SPI_Cmd(FM25_SPI, ENABLE); //SPI_CalculateCRC(FM25_SPI, DISABLE); - fram_lock = rt_sem_create("framlock", 1, RT_IPC_FLAG_FIFO); + fram_lock = rt_sem_create("framlock", 1, RT_IPC_FLAG_FIFO); } static uint8_t spi_readwrite(uint8_t data) { int32_t timeout = 0xFFFFF; - //rt_kprintf("State 0x%X\n", SPI_I2S_GetFlagStatus(FM25_SPI, SPI_I2S_FLAG_TXE)); - //Wait until the transmit buffer is empty + //rt_kprintf("State 0x%X\n", SPI_I2S_GetFlagStatus(FM25_SPI, SPI_I2S_FLAG_TXE)); + //Wait until the transmit buffer is empty while (SPI_I2S_GetFlagStatus(FM25_SPI, SPI_I2S_FLAG_TXE) == RESET && --timeout >0); - if( timeout <= 0 ){ spi_timeout_cnt++; return 0;} + if( timeout <= 0 ){ spi_timeout_cnt++; return 0;} // Send the byte SPI_I2S_SendData(FM25_SPI, data); - timeout = 0xFFFFF; + timeout = 0xFFFFF; //Wait until a data is received while (SPI_I2S_GetFlagStatus(FM25_SPI, SPI_I2S_FLAG_RXNE) == RESET && --timeout >0); - if( timeout <= 0 ){ spi_timeout_cnt++; return 0;} + if( timeout <= 0 ){ spi_timeout_cnt++; return 0;} // Get the received data data = SPI_I2S_ReceiveData(FM25_SPI); @@ -110,29 +110,29 @@ rt_size_t fm25_read(rt_device_t dev, rt_off_t offset, void * buf, rt_size_t size { uint32_t index; - uint8_t *buffer = (uint8_t*) buf; + uint8_t *buffer = (uint8_t*) buf; fram_lock(); //spi_config(); - //rt_kprintf("READ: %d, size=%d\n", offset, size); + //rt_kprintf("READ: %d, size=%d\n", offset, size); CS_LOW(); - spi_readwrite( FM25_READ); - spi_readwrite( (offset >> 8)&0xFF ); - spi_readwrite( offset & 0xFF ); + spi_readwrite( FM25_READ); + spi_readwrite( (offset >> 8)&0xFF ); + spi_readwrite( offset & 0xFF ); for(index=0; index 0 ) - { - fram_unlock(); - spi_timeout_cnt = 0; - rt_kprintf("Read time out\n"); - return -1; - } + if( spi_timeout_cnt > 0 ) + { + fram_unlock(); + spi_timeout_cnt = 0; + rt_kprintf("Read time out\n"); + return -1; + } - offset++; + offset++; } CS_HIGH(); @@ -145,33 +145,33 @@ rt_size_t fm25_write(rt_device_t dev, rt_off_t offset, const void * buf, rt_size { uint32_t index = size; - uint8_t *buffer = (uint8_t*) buf; + uint8_t *buffer = (uint8_t*) buf; fram_lock(); //spi_config(); - //rt_kprintf("WRITE: %d, size=%d\n", offset, size); - CS_LOW(); + //rt_kprintf("WRITE: %d, size=%d\n", offset, size); + CS_LOW(); spi_readwrite( FM25_WREN ); - CS_HIGH(); - CS_LOW(); - spi_readwrite( FM25_WRITE); - spi_readwrite( (offset >> 8)&0xFF ); - spi_readwrite( offset & 0xFF ); - while( index > 0 ) - { - spi_readwrite( *buffer++ ); - - if( spi_timeout_cnt > 0 ) - { - fram_unlock(); - rt_kprintf("Write time out\n"); - spi_timeout_cnt = 0; - return -1; - } - index--; - offset++; - } CS_HIGH(); - //rt_thread_delay(100); + CS_LOW(); + spi_readwrite( FM25_WRITE); + spi_readwrite( (offset >> 8)&0xFF ); + spi_readwrite( offset & 0xFF ); + while( index > 0 ) + { + spi_readwrite( *buffer++ ); + + if( spi_timeout_cnt > 0 ) + { + fram_unlock(); + rt_kprintf("Write time out\n"); + spi_timeout_cnt = 0; + return -1; + } + index--; + offset++; + } + CS_HIGH(); + //rt_thread_delay(100); fram_unlock(); @@ -179,36 +179,36 @@ rt_size_t fm25_write(rt_device_t dev, rt_off_t offset, const void * buf, rt_size } static rt_err_t fm25_init(rt_device_t dev) { - return RT_EOK; + return RT_EOK; } static rt_err_t fm25_open(rt_device_t dev, rt_uint16_t oflag) { - char i; - SPI_Cmd(FM25_SPI, ENABLE); + char i; + SPI_Cmd(FM25_SPI, ENABLE); - if( oflag != RT_DEVICE_FLAG_RDONLY ) - { - CS_LOW(); - spi_readwrite( FM25_WRSR ); - spi_readwrite( FM25_WPEN ); - CS_HIGH(); - //rt_kprintf("RDSR=0x%X\n", fm25_read_status()); + if( oflag != RT_DEVICE_FLAG_RDONLY ) + { + CS_LOW(); + spi_readwrite( FM25_WRSR ); + spi_readwrite( FM25_WPEN ); + CS_HIGH(); + //rt_kprintf("RDSR=0x%X\n", fm25_read_status()); - } - return RT_EOK; + } + return RT_EOK; } static rt_err_t fm25_close(rt_device_t dev) { - CS_LOW(); + CS_LOW(); spi_readwrite( FM25_WRDI ); CS_HIGH(); - SPI_Cmd(FM25_SPI, DISABLE); + SPI_Cmd(FM25_SPI, DISABLE); - return RT_EOK; + return RT_EOK; } static rt_err_t fm25_control(rt_device_t dev, int cmd, void *args) { - RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev != RT_NULL); if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME) { @@ -219,30 +219,30 @@ static rt_err_t fm25_control(rt_device_t dev, int cmd, void *args) geometry->bytes_per_sector = 1; geometry->block_size = 1; - geometry->sector_count = 8192; - + geometry->sector_count = 8192; + } - return RT_EOK; + return RT_EOK; } -static struct rt_device spi_flash_device; +static struct rt_device spi_flash_device; void fm25_hw_init() { - int i = 0xFFFFF; - fm25_spi_cfg(); + int i = 0xFFFFF; + fm25_spi_cfg(); - while(i--); - //spi_config(); - CS_LOW(); + while(i--); + //spi_config(); + CS_LOW(); spi_readwrite( FM25_WRDI ); CS_HIGH(); - spi_flash_device.type = RT_Device_Class_Block; + spi_flash_device.type = RT_Device_Class_Block; spi_flash_device.init = fm25_init; spi_flash_device.open = fm25_open; spi_flash_device.close = fm25_close; - spi_flash_device.read = fm25_read; + spi_flash_device.read = fm25_read; spi_flash_device.write = fm25_write; spi_flash_device.control = fm25_control; /* no private */ @@ -255,17 +255,17 @@ void fm25_hw_init() int fram_test(int x) { - //rt_kprintf("SR=0x%X\nCR1=0x%X\nCR2=0x%X\n", FM25_SPI->SR, FM25_SPI->CR1,FM25_SPI->CR2); - rt_device_t device = RT_NULL; - char buf[256]; - char read[256]; - int i, j; + //rt_kprintf("SR=0x%X\nCR1=0x%X\nCR2=0x%X\n", FM25_SPI->SR, FM25_SPI->CR1,FM25_SPI->CR2); + rt_device_t device = RT_NULL; + char buf[256]; + char read[256]; + int i, j; - for(i =0; i< 256; i++ ) - { - buf[i] = i; - read[i] = 0; - } + for(i =0; i< 256; i++ ) + { + buf[i] = i; + read[i] = 0; + } // step 1:find device device = rt_device_find("fram0"); if( device == RT_NULL) @@ -273,22 +273,22 @@ int fram_test(int x) rt_kprintf("device %s: not found!\r\n"); return RT_ERROR; } - device->open(device,RT_DEVICE_FLAG_RDWR); + device->open(device,RT_DEVICE_FLAG_RDWR); - for( j = 0; j < FM25_MAXSIZE; j+= 256 ) - //j = 256*x; - { - //rt_kprintf("RDSR=0x%X\n", fm25_read_status()); - device->write(device,j, buf,256); - device->read(device,j, read,256); - for(i =0; i< 256; i++ ) - { - if( buf[i] != read[i] ) - rt_kprintf("error at %d: %d!=%d\n", i, buf[i], read[i]); - } - } - device->close(device); - rt_kprintf("Finsh test\n"); + for( j = 0; j < FM25_MAXSIZE; j+= 256 ) + //j = 256*x; + { + //rt_kprintf("RDSR=0x%X\n", fm25_read_status()); + device->write(device,j, buf,256); + device->read(device,j, read,256); + for(i =0; i< 256; i++ ) + { + if( buf[i] != read[i] ) + rt_kprintf("error at %d: %d!=%d\n", i, buf[i], read[i]); + } + } + device->close(device); + rt_kprintf("Finsh test\n"); } #ifdef RT_USING_FINSH #include diff --git a/bsp/stm32f20x/Drivers/FM25Lx.h b/bsp/stm32f20x/Drivers/FM25Lx.h index 3f714ac8da..6d7e9ec08a 100644 --- a/bsp/stm32f20x/Drivers/FM25Lx.h +++ b/bsp/stm32f20x/Drivers/FM25Lx.h @@ -1,14 +1,14 @@ #ifndef FM25LX_H #define FM25LX_H -#define FM25_WREN 0x06 -#define FM25_WRDI 0x04 -#define FM25_RDSR 0x05 -#define FM25_WRSR 0x01 -#define FM25_READ 0x03 -#define FM25_WRITE 0x02 -#define FM25_WEL 0x02 -#define FM25_WPEN 0x80 +#define FM25_WREN 0x06 +#define FM25_WRDI 0x04 +#define FM25_RDSR 0x05 +#define FM25_WRSR 0x01 +#define FM25_READ 0x03 +#define FM25_WRITE 0x02 +#define FM25_WEL 0x02 +#define FM25_WPEN 0x80 #define FM25CL64B //#define FM25LC256 @@ -19,25 +19,25 @@ #define FM25_MAXSIZE 32768 #endif -#define FM25_SPI SPI3 -#define FM25_SPI_GPIO GPIOB -#define FM25_SPI_MOSI GPIO_Pin_5 -#define FM25_SPI_MISO GPIO_Pin_4 -#define FM25_SPI_SCK GPIO_Pin_3 -#define FM25_SPI_NSS_GPIO GPIOD -#define FM25_SPI_NSS_PIN GPIO_Pin_10 -#define FM25_SPI_CLK RCC_APB1Periph_SPI3 -#define FM25_SPI_GPIO_CLK RCC_AHB1Periph_GPIOB -#define FM25_SPI_NSS_GPIO_CLK RCC_AHB1Periph_GPIOD +#define FM25_SPI SPI3 +#define FM25_SPI_GPIO GPIOB +#define FM25_SPI_MOSI GPIO_Pin_5 +#define FM25_SPI_MISO GPIO_Pin_4 +#define FM25_SPI_SCK GPIO_Pin_3 +#define FM25_SPI_NSS_GPIO GPIOD +#define FM25_SPI_NSS_PIN GPIO_Pin_10 +#define FM25_SPI_CLK RCC_APB1Periph_SPI3 +#define FM25_SPI_GPIO_CLK RCC_AHB1Periph_GPIOB +#define FM25_SPI_NSS_GPIO_CLK RCC_AHB1Periph_GPIOD -#define FM25_SPI_DMA_CLK RCC_AHB1Periph_DMA1 -#define FM25_SPI_DMA_Channel DMA_Channel_0 -#define FM25_SPI_RX_DMA_Stream DMA1_Stream0 -#define FM25_SPI_RX_DMA_IRQ DMA1_Stream0_IRQn +#define FM25_SPI_DMA_CLK RCC_AHB1Periph_DMA1 +#define FM25_SPI_DMA_Channel DMA_Channel_0 +#define FM25_SPI_RX_DMA_Stream DMA1_Stream0 +#define FM25_SPI_RX_DMA_IRQ DMA1_Stream0_IRQn #define FM25_SPI_RX_DMA_FLAG DMA_IT_TCIF0 -#define FM25_SPI_TX_DMA_Stream DMA1_Stream5 -#define FM25_SPI_TX_DMA_IRQ DMA1_Stream5_IRQn +#define FM25_SPI_TX_DMA_Stream DMA1_Stream5 +#define FM25_SPI_TX_DMA_IRQ DMA1_Stream5_IRQn #define FM25_SPI_TX_DMA_FLAG DMA_IT_TCIF5 -#define FM25_SPI_DR_Base 0x4003C00C +#define FM25_SPI_DR_Base 0x4003C00C -#endif \ No newline at end of file +#endif diff --git a/bsp/stm32f20x/Drivers/board.c b/bsp/stm32f20x/Drivers/board.c index e3cfdbbc12..0b2d214540 100644 --- a/bsp/stm32f20x/Drivers/board.c +++ b/bsp/stm32f20x/Drivers/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -30,16 +30,16 @@ void SD_LowLevel_DeInit(void) { GPIO_InitTypeDef GPIO_InitStructure; - + /*!< Disable SDIO Clock */ SDIO_ClockCmd(DISABLE); - + /*!< Set Power State to OFF */ SDIO_SetPowerState(SDIO_PowerState_OFF); /*!< DeInitializes the SDIO peripheral */ SDIO_DeInit(); - + /* Disable the SDIO APB2 Clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, DISABLE); @@ -66,7 +66,7 @@ void SD_LowLevel_DeInit(void) } /** - * @brief Initializes the SD Card and put it into StandBy State (Ready for + * @brief Initializes the SD Card and put it into StandBy State (Ready for * data transfer). * @param None * @retval None @@ -101,7 +101,7 @@ void SD_LowLevel_Init(void) GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(GPIOC, &GPIO_InitStructure); - + /*!< Configure SD_SPI_DETECT_PIN pin: SD Card detect pin */ GPIO_InitStructure.GPIO_Pin = SD_DETECT_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; @@ -154,7 +154,7 @@ void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize) /* DMA2 Stream3 or Stream6 enable */ DMA_Cmd(SD_SDIO_DMA_STREAM, ENABLE); - + } /** @@ -219,11 +219,11 @@ uint32_t SD_DMAEndOfTransferStatus(void) void NVIC_Configuration(void) { #ifdef VECT_TAB_RAM - /* Set the Vector Table base location at 0x20000000 */ - NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); + /* Set the Vector Table base location at 0x20000000 */ + NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); #else /* VECT_TAB_FLASH */ - /* Set the Vector Table base location at 0x08000000 */ - NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); + /* Set the Vector Table base location at 0x08000000 */ + NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); #endif } @@ -236,15 +236,15 @@ void NVIC_Configuration(void) *******************************************************************************/ void SysTick_Configuration(void) { - RCC_ClocksTypeDef rcc_clocks; - rt_uint32_t cnts; + RCC_ClocksTypeDef rcc_clocks; + rt_uint32_t cnts; - RCC_GetClocksFreq(&rcc_clocks); + RCC_GetClocksFreq(&rcc_clocks); - cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND; + cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND; - SysTick_Config(cnts); - SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK); + SysTick_Config(cnts); + SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK); } /** @@ -253,13 +253,13 @@ void SysTick_Configuration(void) */ void SysTick_Handler(void) { - /* enter interrupt */ - rt_interrupt_enter(); + /* enter interrupt */ + rt_interrupt_enter(); - rt_tick_increase(); + rt_tick_increase(); - /* leave interrupt */ - rt_interrupt_leave(); + /* leave interrupt */ + rt_interrupt_leave(); } /** @@ -267,15 +267,15 @@ void SysTick_Handler(void) */ void rt_hw_board_init() { - /* NVIC Configuration */ - NVIC_Configuration(); + /* NVIC Configuration */ + NVIC_Configuration(); - /* Configure the SysTick */ - SysTick_Configuration(); + /* Configure the SysTick */ + SysTick_Configuration(); - rt_hw_usart_init(); + rt_hw_usart_init(); #ifdef RT_USING_CONSOLE - rt_console_set_device(CONSOLE_DEVICE); + rt_console_set_device(CONSOLE_DEVICE); #endif } diff --git a/bsp/stm32f20x/Drivers/board.h b/bsp/stm32f20x/Drivers/board.h index 63a97b6b1c..9b58dd81c7 100644 --- a/bsp/stm32f20x/Drivers/board.h +++ b/bsp/stm32f20x/Drivers/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,32 +16,32 @@ /* board configuration */ // SDCard Driver <1=>SDIO sdcard <0=>SPI MMC card -// Default: 1 -#define STM32_USE_SDIO 1 +// Default: 1 +#define STM32_USE_SDIO 1 /* whether use board external SRAM memory */ // Use external SRAM memory on the board -// Enable External SRAM memory +// Enable External SRAM memory #define STM32_EXT_SRAM 0 -// Begin Address of External SRAM -// Default: 0x68000000 +// Begin Address of External SRAM +// Default: 0x68000000 #define STM32_EXT_SRAM_BEGIN 0x68000000 /* the begining address of external SRAM */ -// End Address of External SRAM -// Default: 0x68080000 +// End Address of External SRAM +// Default: 0x68080000 #define STM32_EXT_SRAM_END 0x68080000 /* the end address of external SRAM */ // // Internal SRAM memory size[Kbytes] <8-128> -// Default: 64 +// Default: 64 #define STM32_SRAM_SIZE 128 #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) // Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3 -// Default: 1 -#define STM32_CONSOLE_USART 1 +// Default: 1 +#define STM32_CONSOLE_USART 1 // Ethernet Interface: <0=> Microchip ENC28J60 -#define STM32_ETH_IF 0 +#define STM32_ETH_IF 0 void rt_hw_board_led_on(int n); void rt_hw_board_led_off(int n); @@ -64,21 +64,21 @@ void rt_hw_board_init(void); #define SD_DETECT_PIN GPIO_Pin_0 /* PB.0 */ #define SD_DETECT_GPIO_PORT GPIOB /* GPIOB */ #define SD_DETECT_GPIO_CLK RCC_AHB1Periph_GPIOB - + #define SDIO_FIFO_ADDRESS ((uint32_t)0x40012C80) -/** +/** * @brief SDIO Intialization Frequency (400KHz max) */ #define SDIO_INIT_CLK_DIV ((uint8_t)0x76) -/** - * @brief SDIO Data Transfer Frequency (25MHz max) +/** + * @brief SDIO Data Transfer Frequency (25MHz max) */ -#define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x0) +#define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x0) #define SD_SDIO_DMA DMA2 #define SD_SDIO_DMA_CLK RCC_AHB1Periph_DMA2 - -#define SD_SDIO_DMA_STREAM3 3 + +#define SD_SDIO_DMA_STREAM3 3 //#define SD_SDIO_DMA_STREAM6 6 #ifdef SD_SDIO_DMA_STREAM3 @@ -88,7 +88,7 @@ void rt_hw_board_init(void); #define SD_SDIO_DMA_FLAG_DMEIF DMA_FLAG_DMEIF3 #define SD_SDIO_DMA_FLAG_TEIF DMA_FLAG_TEIF3 #define SD_SDIO_DMA_FLAG_HTIF DMA_FLAG_HTIF3 - #define SD_SDIO_DMA_FLAG_TCIF DMA_FLAG_TCIF3 + #define SD_SDIO_DMA_FLAG_TCIF DMA_FLAG_TCIF3 #elif defined SD_SDIO_DMA_STREAM6 #define SD_SDIO_DMA_STREAM DMA2_Stream6 #define SD_SDIO_DMA_CHANNEL DMA_Channel_4 @@ -96,11 +96,11 @@ void rt_hw_board_init(void); #define SD_SDIO_DMA_FLAG_DMEIF DMA_FLAG_DMEIF6 #define SD_SDIO_DMA_FLAG_TEIF DMA_FLAG_TEIF6 #define SD_SDIO_DMA_FLAG_HTIF DMA_FLAG_HTIF6 - #define SD_SDIO_DMA_FLAG_TCIF DMA_FLAG_TCIF6 + #define SD_SDIO_DMA_FLAG_TCIF DMA_FLAG_TCIF6 #endif /* SD_SDIO_DMA_STREAM3 */ void SD_LowLevel_DeInit(void); -void SD_LowLevel_Init(void); +void SD_LowLevel_Init(void); void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize); void SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize); diff --git a/bsp/stm32f20x/Drivers/drv_rtc.c b/bsp/stm32f20x/Drivers/drv_rtc.c index 6078a15249..4e5093ee53 100644 --- a/bsp/stm32f20x/Drivers/drv_rtc.c +++ b/bsp/stm32f20x/Drivers/drv_rtc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -43,20 +43,20 @@ static struct rt_device rtc; static time_t rt_mktime(struct tm *tm) { - long res; - int year; - year = tm->tm_year - 70; + long res; + int year; + year = tm->tm_year - 70; - res = YEAR * year + DAY * ((year + 1) / 4); - res += month[tm->tm_mon]; + res = YEAR * year + DAY * ((year + 1) / 4); + res += month[tm->tm_mon]; - if (tm->tm_mon > 1 && ((year + 2) % 4)) - res -= DAY; - res += DAY * (tm->tm_mday - 1); - res += HOUR * tm->tm_hour; - res += MINUTE * tm->tm_min; - res += tm->tm_sec; - return res; + if (tm->tm_mon > 1 && ((year + 2) % 4)) + res -= DAY; + res += DAY * (tm->tm_mday - 1); + res += HOUR * tm->tm_hour; + res += MINUTE * tm->tm_min; + res += tm->tm_sec; + return res; } static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag) { @@ -76,7 +76,7 @@ static rt_size_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_siz static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args) { time_t *time; - struct tm ti,*to; + struct tm ti,*to; RT_ASSERT(dev != RT_NULL); switch (cmd) @@ -84,17 +84,17 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args) case RT_DEVICE_CTRL_RTC_GET_TIME: time = (time_t *)args; /* read device */ - //RTC_GetTimeStamp(RTC_Format_BIN, &RTC_TimeStructure, &RTC_DateStructure); - RTC_GetTime(RTC_Format_BIN, &RTC_TimeStructure); - RTC_GetDate(RTC_Format_BIN, &RTC_DateStructure); - ti.tm_sec = RTC_TimeStructure.RTC_Seconds; - ti.tm_min = RTC_TimeStructure.RTC_Minutes; - ti.tm_hour = RTC_TimeStructure.RTC_Hours; - //ti.tm_wday = (RTC_DateStructure.RTC_WeekDay==7)?0:RTC_DateStructure.RTC_WeekDay; - ti.tm_mon = RTC_DateStructure.RTC_Month -1; - ti.tm_mday = RTC_DateStructure.RTC_Date; - ti.tm_year = RTC_DateStructure.RTC_Year + 70; - *time = rt_mktime(&ti); + //RTC_GetTimeStamp(RTC_Format_BIN, &RTC_TimeStructure, &RTC_DateStructure); + RTC_GetTime(RTC_Format_BIN, &RTC_TimeStructure); + RTC_GetDate(RTC_Format_BIN, &RTC_DateStructure); + ti.tm_sec = RTC_TimeStructure.RTC_Seconds; + ti.tm_min = RTC_TimeStructure.RTC_Minutes; + ti.tm_hour = RTC_TimeStructure.RTC_Hours; + //ti.tm_wday = (RTC_DateStructure.RTC_WeekDay==7)?0:RTC_DateStructure.RTC_WeekDay; + ti.tm_mon = RTC_DateStructure.RTC_Month -1; + ti.tm_mday = RTC_DateStructure.RTC_Date; + ti.tm_year = RTC_DateStructure.RTC_Year + 70; + *time = rt_mktime(&ti); //*time = RTC_GetCounter(); break; @@ -104,10 +104,10 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args) time = (time_t *)args; /* Enable the PWR clock */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); + RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); - /* Allow access to RTC */ - PWR_BackupAccessCmd(ENABLE); + /* Allow access to RTC */ + PWR_BackupAccessCmd(ENABLE); /* Wait until last write operation on RTC registers has finished */ //RTC_WaitForLastTask(); @@ -115,22 +115,22 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args) /* Change the current time */ //RTC_SetCounter(*time); - to = gmtime(time); - RTC_TimeStructure.RTC_Seconds = to->tm_sec; - RTC_TimeStructure.RTC_Minutes = to->tm_min; - RTC_TimeStructure.RTC_Hours = to->tm_hour; - //RTC_DateStructure.RTC_WeekDay =(ti->tm_wday==0)?7:ti->tm_wday; - RTC_DateStructure.RTC_Month = to->tm_mon + 1; - RTC_DateStructure.RTC_Date = to->tm_mday; - RTC_DateStructure.RTC_Year = to->tm_year - 70; - RTC_SetTime(RTC_Format_BIN, &RTC_TimeStructure); - RTC_SetDate(RTC_Format_BIN, &RTC_DateStructure); + to = gmtime(time); + RTC_TimeStructure.RTC_Seconds = to->tm_sec; + RTC_TimeStructure.RTC_Minutes = to->tm_min; + RTC_TimeStructure.RTC_Hours = to->tm_hour; + //RTC_DateStructure.RTC_WeekDay =(ti->tm_wday==0)?7:ti->tm_wday; + RTC_DateStructure.RTC_Month = to->tm_mon + 1; + RTC_DateStructure.RTC_Date = to->tm_mday; + RTC_DateStructure.RTC_Year = to->tm_year - 70; + RTC_SetTime(RTC_Format_BIN, &RTC_TimeStructure); + RTC_SetDate(RTC_Format_BIN, &RTC_DateStructure); /* Wait until last write operation on RTC registers has finished */ //RTC_WaitForLastTask(); RTC_WriteBackupRegister(RTC_BKP_DR1, 0xA5A5); - //BKP_WriteBackupRegister(BKP_DR1, 0xA5A5); + //BKP_WriteBackupRegister(BKP_DR1, 0xA5A5); } break; } @@ -147,75 +147,75 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args) *******************************************************************************/ int RTC_Config(void) { - u32 count=0x200000; - /* Enable the PWR clock */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); + u32 count=0x200000; + /* Enable the PWR clock */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); - /* Allow access to RTC */ - PWR_BackupAccessCmd(ENABLE); + /* Allow access to RTC */ + PWR_BackupAccessCmd(ENABLE); - RCC_LSEConfig(RCC_LSE_ON); + RCC_LSEConfig(RCC_LSE_ON); - /* Wait till LSE is ready */ - while ( (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) && (--count) ); + /* Wait till LSE is ready */ + while ( (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) && (--count) ); if ( count == 0 ) { return -1; } - /* Select the RTC Clock Source */ - RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); + /* Select the RTC Clock Source */ + RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); - SynchPrediv = 0xFF; - AsynchPrediv = 0x7F; + SynchPrediv = 0xFF; + AsynchPrediv = 0x7F; - /* Enable the RTC Clock */ - RCC_RTCCLKCmd(ENABLE); + /* Enable the RTC Clock */ + RCC_RTCCLKCmd(ENABLE); - /* Wait for RTC APB registers synchronisation */ - RTC_WaitForSynchro(); + /* Wait for RTC APB registers synchronisation */ + RTC_WaitForSynchro(); - /* Enable The TimeStamp */ - //RTC_TimeStampCmd(RTC_TimeStampEdge_Falling, ENABLE); + /* Enable The TimeStamp */ + //RTC_TimeStampCmd(RTC_TimeStampEdge_Falling, ENABLE); - return 0; + return 0; } int RTC_Configuration(void) { - if(RTC_Config() < 0 ) - return -1; + if(RTC_Config() < 0 ) + return -1; - /* Set the Time */ - RTC_TimeStructure.RTC_Hours = 0; - RTC_TimeStructure.RTC_Minutes = 0; - RTC_TimeStructure.RTC_Seconds = 0; + /* Set the Time */ + RTC_TimeStructure.RTC_Hours = 0; + RTC_TimeStructure.RTC_Minutes = 0; + RTC_TimeStructure.RTC_Seconds = 0; - /* Set the Date */ - RTC_DateStructure.RTC_Month = 1; - RTC_DateStructure.RTC_Date = 1; - RTC_DateStructure.RTC_Year = 0; - RTC_DateStructure.RTC_WeekDay = 4; + /* Set the Date */ + RTC_DateStructure.RTC_Month = 1; + RTC_DateStructure.RTC_Date = 1; + RTC_DateStructure.RTC_Year = 0; + RTC_DateStructure.RTC_WeekDay = 4; - /* Calendar Configuration */ - RTC_InitStructure.RTC_AsynchPrediv = AsynchPrediv; - RTC_InitStructure.RTC_SynchPrediv = SynchPrediv; - RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24; - RTC_Init(&RTC_InitStructure); + /* Calendar Configuration */ + RTC_InitStructure.RTC_AsynchPrediv = AsynchPrediv; + RTC_InitStructure.RTC_SynchPrediv = SynchPrediv; + RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24; + RTC_Init(&RTC_InitStructure); - /* Set Current Time and Date */ - RTC_SetTime(RTC_Format_BCD, &RTC_TimeStructure); - RTC_SetDate(RTC_Format_BCD, &RTC_DateStructure); - if (RTC_Init(&RTC_InitStructure) == ERROR) - return -1; + /* Set Current Time and Date */ + RTC_SetTime(RTC_Format_BCD, &RTC_TimeStructure); + RTC_SetDate(RTC_Format_BCD, &RTC_DateStructure); + if (RTC_Init(&RTC_InitStructure) == ERROR) + return -1; return 0; } void rt_hw_rtc_init(void) { - rtc.type = RT_Device_Class_RTC; + rtc.type = RT_Device_Class_RTC; if (RTC_ReadBackupRegister(RTC_BKP_DR1) != 0xA5A5) { @@ -234,11 +234,11 @@ void rt_hw_rtc_init(void) } /* register rtc device */ - rtc.init = RT_NULL; - rtc.open = rt_rtc_open; - rtc.close = RT_NULL; - rtc.read = rt_rtc_read; - rtc.write = RT_NULL; + rtc.init = RT_NULL; + rtc.open = rt_rtc_open; + rtc.close = RT_NULL; + rtc.read = rt_rtc_read; + rtc.write = RT_NULL; rtc.control = rt_rtc_control; /* no private */ diff --git a/bsp/stm32f20x/Drivers/drv_rtc.h b/bsp/stm32f20x/Drivers/drv_rtc.h index 8f6c9a00a0..0d0ad288fc 100644 --- a/bsp/stm32f20x/Drivers/drv_rtc.h +++ b/bsp/stm32f20x/Drivers/drv_rtc.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32f20x/Drivers/i2c.c b/bsp/stm32f20x/Drivers/i2c.c index e1b4b02ffa..9b2f4ed866 100644 --- a/bsp/stm32f20x/Drivers/i2c.c +++ b/bsp/stm32f20x/Drivers/i2c.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -14,15 +14,15 @@ #include "stm32f2xx_i2c.h" #include "stm32f2xx_dma.h" -#define EV_SB 1 -#define EV_ADDR (1<<1) -#define EV_STOPF (1<<2) -#define EV_BTF (1<<3) -#define ERR_ARLO (1<<4) -#define ERR_AF (1<<5) -#define ERR_OVR (1<<6) -#define ERR_PECERR (1<<7) -#define ERR_BERR (1<<8) +#define EV_SB 1 +#define EV_ADDR (1<<1) +#define EV_STOPF (1<<2) +#define EV_BTF (1<<3) +#define ERR_ARLO (1<<4) +#define ERR_AF (1<<5) +#define ERR_OVR (1<<6) +#define ERR_PECERR (1<<7) +#define ERR_BERR (1<<8) #define I2C_COMPLETE (1<<9) #define I2C_BUSY 1 @@ -66,7 +66,7 @@ void dump_i2c_register(I2C_TypeDef* I2Cx) else I2C_TRACE("======I2C2======\n"); I2C_TRACE("CR1: 0x%x\tCR2: 0x%x\n", I2Cx->CR1, I2Cx->CR2); - I2C_TRACE("SR1: 0x%x\tSR2: 0x%x\n", I2Cx->SR1, I2Cx->SR2); + I2C_TRACE("SR1: 0x%x\tSR2: 0x%x\n", I2Cx->SR1, I2Cx->SR2); } @@ -75,532 +75,532 @@ Status I2C_AcknowledgePolling(I2C_TypeDef* I2Cx ,uint8_t Addr) { uint32_t timeout = 0xFFFF, ret; uint16_t tmp; - ret = rt_mutex_take(i2c_mux, RT_WAITING_FOREVER ); - - if( ret == RT_EOK ) - { - do{ - if( timeout-- <= 0 ) - { - I2C_ClearFlag(I2Cx,I2C_FLAG_AF); - I2Cx->CR1 |= CR1_STOP_Set; - rt_mutex_release(i2c_mux); - return Error; - } - - I2Cx->CR1 |= CR1_START_Set; - tmp = I2Cx->SR1;//MSB - I2Cx->DR = Addr; - - }while((I2Cx->SR1&0x0002) != 0x0002); - - I2C_ClearFlag(I2Cx,I2C_FLAG_AF); - I2Cx->CR1 |= CR1_STOP_Set; - while ((I2Cx->CR1&0x200) == 0x200); - rt_kprintf( "AcknowledgePolling OK\n"); - rt_mutex_release(i2c_mux); - return Success; - } - else - return Error; -} + ret = rt_mutex_take(i2c_mux, RT_WAITING_FOREVER ); -/* - Only 1 byte READ using Interrupt or Polling otherwise using DMA + if( ret == RT_EOK ) + { + do{ + if( timeout-- <= 0 ) + { + I2C_ClearFlag(I2Cx,I2C_FLAG_AF); + I2Cx->CR1 |= CR1_STOP_Set; + rt_mutex_release(i2c_mux); + return Error; + } + + I2Cx->CR1 |= CR1_START_Set; + tmp = I2Cx->SR1;//MSB + I2Cx->DR = Addr; + + }while((I2Cx->SR1&0x0002) != 0x0002); + + I2C_ClearFlag(I2Cx,I2C_FLAG_AF); + I2Cx->CR1 |= CR1_STOP_Set; + while ((I2Cx->CR1&0x200) == 0x200); + rt_kprintf( "AcknowledgePolling OK\n"); + rt_mutex_release(i2c_mux); + return Success; + } + else + return Error; +} + +/* + Only 1 byte READ using Interrupt or Polling otherwise using DMA */ void I2C1_EV_IRQHandler() { - __IO uint16_t regSR1, regSR2; - __IO uint32_t regSR; - int i=10; + __IO uint16_t regSR1, regSR2; + __IO uint32_t regSR; + int i=10; - rt_interrupt_enter(); - //rt_hw_led_on(10); - regSR1 = I2C1->SR1; - regSR2 = I2C1->SR2; - regSR = (regSR2 << 16) | regSR1; - //rt_kprintf("EV=> SR1: 0x%x\tSR2: 0x%x\tSR: 0x%x status: %d\n", regSR1, regSR2, regSR, i2cStatus); - - if( (regSR & I2C_EVENT_MASTER_MODE_SELECT) == I2C_EVENT_MASTER_MODE_SELECT) //EV5 - { + rt_interrupt_enter(); + //rt_hw_led_on(10); + regSR1 = I2C1->SR1; + regSR2 = I2C1->SR2; + regSR = (regSR2 << 16) | regSR1; + //rt_kprintf("EV=> SR1: 0x%x\tSR2: 0x%x\tSR: 0x%x status: %d\n", regSR1, regSR2, regSR, i2cStatus); - if( i2cStatus == S1 ) //Send TX Command - { - I2C1->DR = DevAddr & 0xFE; - i2cStatus = S2; - } - else if( i2cStatus == S4 ) //Send RX Command - { - I2C1->DR = DevAddr | 0x01; - i2cStatus = S5; - } + if( (regSR & I2C_EVENT_MASTER_MODE_SELECT) == I2C_EVENT_MASTER_MODE_SELECT) //EV5 + { + + if( i2cStatus == S1 ) //Send TX Command + { + I2C1->DR = DevAddr & 0xFE; + i2cStatus = S2; + } + else if( i2cStatus == S4 ) //Send RX Command + { + I2C1->DR = DevAddr | 0x01; + i2cStatus = S5; + } - regSR1 = 0; - regSR2 = 0; + regSR1 = 0; + regSR2 = 0; - } - if( (regSR & I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)== I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ) //EV6 - { - switch( i2cStatus ) - { - case S2: //Send 1st memory address phase - { - //I2C_DMACmd(I2C1, ENABLE); - I2C1->DR = MemAddr[0]; - if( memtype == I2C_MEM_1Byte ) - i2cStatus = S2_2; - else if( memtype == I2C_MEM_2Bytes ) - i2cStatus = S2_1; - } - break; - case S5: //Set RX buffer phase - { - if( i2cFlag == I2C_READ_DMA ) - { - I2C_DMAConfig(I2C1, i2c_buf, BufSize, I2C_DIRECTION_RX); - I2C1->CR2 |= CR2_LAST_Set | CR2_DMAEN_Set; - DMA_ITConfig( I2C1_DMA_CHANNEL_RX, DMA_IT_TC, ENABLE); - } - else if( i2cFlag == I2C_READ_INTERRUPT ) - { - I2C1->CR2 |= I2C_IT_BUF; - I2C1->CR1 &= CR1_ACK_Reset; - /* Program the STOP */ - I2C1->CR1 |= CR1_STOP_Set; - } - i2cStatus = S6; - } - break; - } - - regSR1 = 0; - regSR2 = 0; - //dump_i2c_register(I2C1); - } - if((regSR & I2C_EVENT_MASTER_BYTE_RECEIVED) == I2C_EVENT_MASTER_BYTE_RECEIVED) //EV7 - { - //Interrupt RX complete phase - if( i2cStatus == S6 && i2cFlag == I2C_READ_INTERRUPT ) - { - *i2c_buf = I2C1->DR; - i2cStatus = S_STOP; - rt_event_send(&i2c_event, I2C_COMPLETE); - } - } - if( (regSR & I2C_EVENT_MASTER_BYTE_TRANSMITTED) == I2C_EVENT_MASTER_BYTE_TRANSMITTED ) //EV8_2 - { - //Start TX/RX phase - if(i2cStatus == S3) - { - DMA_ClearFlag(I2C1_DMA_CHANNEL_TX, DMA_FLAG_TCIF6 ); - DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE); - switch (i2cFlag) - { - case I2C_WRITE: - i2cStatus = S_STOP; - I2C1->CR1 |= CR1_STOP_Set; - rt_event_send(&i2c_event, I2C_COMPLETE); - break; + } + if( (regSR & I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)== I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ) //EV6 + { + switch( i2cStatus ) + { + case S2: //Send 1st memory address phase + { + //I2C_DMACmd(I2C1, ENABLE); + I2C1->DR = MemAddr[0]; + if( memtype == I2C_MEM_1Byte ) + i2cStatus = S2_2; + else if( memtype == I2C_MEM_2Bytes ) + i2cStatus = S2_1; + } + break; + case S5: //Set RX buffer phase + { + if( i2cFlag == I2C_READ_DMA ) + { + I2C_DMAConfig(I2C1, i2c_buf, BufSize, I2C_DIRECTION_RX); + I2C1->CR2 |= CR2_LAST_Set | CR2_DMAEN_Set; + DMA_ITConfig( I2C1_DMA_CHANNEL_RX, DMA_IT_TC, ENABLE); + } + else if( i2cFlag == I2C_READ_INTERRUPT ) + { + I2C1->CR2 |= I2C_IT_BUF; + I2C1->CR1 &= CR1_ACK_Reset; + /* Program the STOP */ + I2C1->CR1 |= CR1_STOP_Set; + } + i2cStatus = S6; + } + break; + } - case I2C_READ_DMA: - i2cStatus = S4; - I2C1->CR1 |= CR1_START_Set; - break; + regSR1 = 0; + regSR2 = 0; + //dump_i2c_register(I2C1); + } + if((regSR & I2C_EVENT_MASTER_BYTE_RECEIVED) == I2C_EVENT_MASTER_BYTE_RECEIVED) //EV7 + { + //Interrupt RX complete phase + if( i2cStatus == S6 && i2cFlag == I2C_READ_INTERRUPT ) + { + *i2c_buf = I2C1->DR; + i2cStatus = S_STOP; + rt_event_send(&i2c_event, I2C_COMPLETE); + } + } + if( (regSR & I2C_EVENT_MASTER_BYTE_TRANSMITTED) == I2C_EVENT_MASTER_BYTE_TRANSMITTED ) //EV8_2 + { + //Start TX/RX phase + if(i2cStatus == S3) + { + DMA_ClearFlag(I2C1_DMA_CHANNEL_TX, DMA_FLAG_TCIF6 ); + DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE); + switch (i2cFlag) + { + case I2C_WRITE: + i2cStatus = S_STOP; + I2C1->CR1 |= CR1_STOP_Set; + rt_event_send(&i2c_event, I2C_COMPLETE); + break; - case I2C_READ_POLLING: - i2cStatus = S_STOP; - rt_event_send(&i2c_event, I2C_COMPLETE); - I2C1->CR2 &= ~(CR2_LAST_Set | I2C_IT_EVT | CR2_DMAEN_Set); - I2C1->CR1 |= CR1_START_Set; - break; + case I2C_READ_DMA: + i2cStatus = S4; + I2C1->CR1 |= CR1_START_Set; + break; - case I2C_READ_INTERRUPT: - i2cStatus = S4; - I2C1->CR1 |= CR1_START_Set; - break; - } - } - if( i2cStatus == S2_1 ) //Send 2nd memory address - { - if( memtype == I2C_MEM_2Bytes ) //memory address has 2 bytes - { - I2C1->DR = MemAddr[1]; - i2cStatus = S2_2; - } - if( i2cFlag == I2C_READ_POLLING || i2cFlag == I2C_READ_DMA || i2cFlag == I2C_READ_INTERRUPT) - { - i2cStatus = S3; - } - } - if( i2cStatus == S2_2 ) //Set TX DAM phase - { - I2C_DMAConfig(I2C1, i2c_buf, BufSize, I2C_DIRECTION_TX); - I2C1->CR2 |= CR2_DMAEN_Set; - i2cStatus = S3; - } - } + case I2C_READ_POLLING: + i2cStatus = S_STOP; + rt_event_send(&i2c_event, I2C_COMPLETE); + I2C1->CR2 &= ~(CR2_LAST_Set | I2C_IT_EVT | CR2_DMAEN_Set); + I2C1->CR1 |= CR1_START_Set; + break; - rt_interrupt_leave(); + case I2C_READ_INTERRUPT: + i2cStatus = S4; + I2C1->CR1 |= CR1_START_Set; + break; + } + } + if( i2cStatus == S2_1 ) //Send 2nd memory address + { + if( memtype == I2C_MEM_2Bytes ) //memory address has 2 bytes + { + I2C1->DR = MemAddr[1]; + i2cStatus = S2_2; + } + if( i2cFlag == I2C_READ_POLLING || i2cFlag == I2C_READ_DMA || i2cFlag == I2C_READ_INTERRUPT) + { + i2cStatus = S3; + } + } + if( i2cStatus == S2_2 ) //Set TX DAM phase + { + I2C_DMAConfig(I2C1, i2c_buf, BufSize, I2C_DIRECTION_TX); + I2C1->CR2 |= CR2_DMAEN_Set; + i2cStatus = S3; + } + } + + rt_interrupt_leave(); } void DMA1_Stream6_IRQHandler(void) //I2C1 TX { - rt_interrupt_enter(); - if (DMA_GetITStatus(I2C1_DMA_CHANNEL_TX, DMA_IT_TCIF6)) + rt_interrupt_enter(); + if (DMA_GetITStatus(I2C1_DMA_CHANNEL_TX, DMA_IT_TCIF6)) { - I2C_TRACE("TXTC\n"); - DMA_ClearFlag(I2C1_DMA_CHANNEL_TX, DMA_FLAG_TCIF6 ); - + I2C_TRACE("TXTC\n"); + DMA_ClearFlag(I2C1_DMA_CHANNEL_TX, DMA_FLAG_TCIF6 ); + } - rt_interrupt_leave(); + rt_interrupt_leave(); } void DMA1_Stream0_IRQHandler(void) //I2C1 RX { - rt_interrupt_enter(); + rt_interrupt_enter(); - if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_TCIF0)) + if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_TCIF0)) { - I2C_TRACE("RXTC\n"); - /* clear DMA flag */ - DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_TCIF0 ); - DMA_ITConfig( I2C1_DMA_CHANNEL_RX, DMA_IT_TC, DISABLE); - DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE); - if( i2cStatus == S6 ) - { - i2cStatus = S_STOP; - I2C1->CR1 |= CR1_STOP_Set; - rt_event_send(&i2c_event, I2C_COMPLETE); - } + I2C_TRACE("RXTC\n"); + /* clear DMA flag */ + DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_TCIF0 ); + DMA_ITConfig( I2C1_DMA_CHANNEL_RX, DMA_IT_TC, DISABLE); + DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE); + if( i2cStatus == S6 ) + { + i2cStatus = S_STOP; + I2C1->CR1 |= CR1_STOP_Set; + rt_event_send(&i2c_event, I2C_COMPLETE); + } + } + if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_HTIF0)) + { + I2C_TRACE("RXHT\n"); + DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_HTIF0 ); + } + if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_TEIF0)) + { + I2C_TRACE("RXTE\n"); + DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_TEIF0 ); + } + if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_FEIF0)) + { + I2C_TRACE("RXFE\n"); + DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_FEIF0 ); + } + if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_DMEIF0)) + { + I2C_TRACE("RXDME\n"); + DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_DMEIF0 ); } - if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_HTIF0)) - { - I2C_TRACE("RXHT\n"); - DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_HTIF0 ); - } - if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_TEIF0)) - { - I2C_TRACE("RXTE\n"); - DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_TEIF0 ); - } - if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_FEIF0)) - { - I2C_TRACE("RXFE\n"); - DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_FEIF0 ); - } - if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_DMEIF0)) - { - I2C_TRACE("RXDME\n"); - DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_DMEIF0 ); - } - rt_interrupt_leave(); + rt_interrupt_leave(); } void I2C1_ER_IRQHandler() { - __IO uint16_t regSR1, regSR2; - - i2cErrorNo = 0; - regSR1 = I2C1->SR1; - I2C_TRACE("I2C Error SR1= 0x%X CR1 = 0x%X\n" , regSR1, I2C1->CR1); - if( (regSR1 & SR1_AF_Set) == SR1_AF_Set) - { - I2C1->SR1 &= ~SR1_AF_Set; - i2cErrorNo |= ERR_AF; - I2C_TRACE("ACK failure\n"); - } - if( (regSR1 & SR1_BERR_Set) == SR1_BERR_Set) - { - I2C1->SR1 &= ~SR1_BERR_Set; - i2cErrorNo |= ERR_BERR; - I2C_TRACE("Bus Error\n"); - } - if( (regSR1 & SR1_ARLO_Set) == SR1_ARLO_Set) - { - I2C1->SR1 &= ~SR1_ARLO_Set; - i2cErrorNo |= ERR_ARLO; - I2C_TRACE("Arblitation lost\n"); - } - //dump_i2c_register(I2C1); + __IO uint16_t regSR1, regSR2; + + i2cErrorNo = 0; + regSR1 = I2C1->SR1; + I2C_TRACE("I2C Error SR1= 0x%X CR1 = 0x%X\n" , regSR1, I2C1->CR1); + if( (regSR1 & SR1_AF_Set) == SR1_AF_Set) + { + I2C1->SR1 &= ~SR1_AF_Set; + i2cErrorNo |= ERR_AF; + I2C_TRACE("ACK failure\n"); + } + if( (regSR1 & SR1_BERR_Set) == SR1_BERR_Set) + { + I2C1->SR1 &= ~SR1_BERR_Set; + i2cErrorNo |= ERR_BERR; + I2C_TRACE("Bus Error\n"); + } + if( (regSR1 & SR1_ARLO_Set) == SR1_ARLO_Set) + { + I2C1->SR1 &= ~SR1_ARLO_Set; + i2cErrorNo |= ERR_ARLO; + I2C_TRACE("Arblitation lost\n"); + } + //dump_i2c_register(I2C1); } Status I2C_Free_Bus(I2C_TypeDef* I2Cx, u32 timeout ) { - /*u32 i = 0; - u16 tmp = 0; - GPIO_InitTypeDef GPIO_InitStructure; + /*u32 i = 0; + u16 tmp = 0; + GPIO_InitTypeDef GPIO_InitStructure; - tmp = I2Cx->SR2; + tmp = I2Cx->SR2; - while( tmp & SR2_BUSY ) - { - if( i++ < timeout ) - { - if( I2Cx == I2C1 ) - { - //rt_kprintf("Free Bus!\n"); - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; - GPIO_Init(GPIOB, &GPIO_InitStructure); + while( tmp & SR2_BUSY ) + { + if( i++ < timeout ) + { + if( I2Cx == I2C1 ) + { + //rt_kprintf("Free Bus!\n"); + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; + GPIO_Init(GPIOB, &GPIO_InitStructure); - GPIO_SetBits(GPIOB, GPIO_Pin_6); - GPIO_SetBits(GPIOB, GPIO_Pin_7); - - } - else if( I2Cx == I2C2 ) - { - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; - GPIO_Init(GPIOB, &GPIO_InitStructure); + GPIO_SetBits(GPIOB, GPIO_Pin_6); + GPIO_SetBits(GPIOB, GPIO_Pin_7); - GPIO_ResetBits(GPIOB, GPIO_Pin_10); - } - rt_thread_delay(10); - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD; - GPIO_Init(GPIOB, &GPIO_InitStructure); - I2C_Cmd(I2Cx, DISABLE); - I2C_Cmd(I2Cx, ENABLE); - } - else - return Error; - tmp = I2Cx->SR2; - } */ - return Success; + } + else if( I2Cx == I2C2 ) + { + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; + GPIO_Init(GPIOB, &GPIO_InitStructure); + + GPIO_ResetBits(GPIOB, GPIO_Pin_10); + } + rt_thread_delay(10); + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD; + GPIO_Init(GPIOB, &GPIO_InitStructure); + I2C_Cmd(I2Cx, DISABLE); + I2C_Cmd(I2Cx, ENABLE); + } + else + return Error; + tmp = I2Cx->SR2; + } */ + return Success; } /* - I2Cx: I2C1 or I2C2 (Now it only support I2C1) - pBuffer: Buffer point - NumByteToRW: Number of bytes read/write + I2Cx: I2C1 or I2C2 (Now it only support I2C1) + pBuffer: Buffer point + NumByteToRW: Number of bytes read/write memAddr: 1-2 bytes memory address - SlaveAddress: device address - MemType: 1 = memory address size 1 bytes, 2 = memory address size 2 bytes + SlaveAddress: device address + MemType: 1 = memory address size 1 bytes, 2 = memory address size 2 bytes */ Status I2C_IORW(I2C_TypeDef* I2Cx, uint8_t* pBuffer, uint32_t NumByteToRW, uint16_t memAddr, uint8_t SlaveAddress, uint8_t MemType ) { - uint32_t ev, Timeout=0xFFFF; + uint32_t ev, Timeout=0xFFFF; uint16_t temp, temp2; - static uint32_t call_cnt = 0, i; - Status ret; + static uint32_t call_cnt = 0, i; + Status ret; - ret = rt_mutex_take(i2c_mux, RT_WAITING_FOREVER ); - if( ret == RT_EOK ) - { - ret = Success; - DevAddr = SlaveAddress; - BufSize = NumByteToRW; - i2c_buf = pBuffer; - memtype = MemType; + ret = rt_mutex_take(i2c_mux, RT_WAITING_FOREVER ); + if( ret == RT_EOK ) + { + ret = Success; + DevAddr = SlaveAddress; + BufSize = NumByteToRW; + i2c_buf = pBuffer; + memtype = MemType; - MemAddr = (uint8_t*)&memAddr; - I2CDirection = I2C_DIRECTION_TX; - - I2CMode = DMA; - - i2cStatus = S1; - if( SlaveAddress & 0x01 ) - { - if( BufSize == 1 ) - i2cFlag = I2C_READ_INTERRUPT; //I2C_READ_POLLING; - else - i2cFlag = I2C_READ_DMA; - } - else - i2cFlag = I2C_WRITE; - I2Cx->CR2 |= I2C_IT_ERR | I2C_IT_EVT;// | CR2_DMAEN_Set; - - I2Cx->CR1 |= CR1_START_Set; + MemAddr = (uint8_t*)&memAddr; + I2CDirection = I2C_DIRECTION_TX; - Timeout = 0xFFFF; - if( rt_event_recv( &i2c_event, I2C_COMPLETE, RT_EVENT_FLAG_AND | RT_EVENT_FLAG_CLEAR, RT_WAITING_FOREVER, &ev ) != RT_EOK ) {ret = Error; goto i2cError;} - - if( i2cFlag == I2C_READ_POLLING ) - { - while ((I2Cx->SR1&0x0001) != 0x0001) - if (Timeout-- == 0) {ret = Error; goto i2cError;} - Timeout = 0xFFFF; - I2Cx->DR = DevAddr; - /* Wait until ADDR is set: EV6 */ - while ((I2Cx->SR1&0x0002) != 0x0002) - { - if (Timeout-- == 0){ret = Error; goto i2cError;} - } - /* Clear ACK bit */ - I2Cx->CR1 &= CR1_ACK_Reset; - /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 - software sequence must complete before the current byte end of transfer */ - __disable_irq(); - /* Clear ADDR flag */ - temp = I2Cx->SR2; - /* Program the STOP */ - I2Cx->CR1 |= CR1_STOP_Set; - /* Re-enable IRQs */ - __enable_irq(); - /* Wait until a data is received in DR register (RXNE = 1) EV7 */ - while ((I2Cx->SR1 & 0x00040) != 0x000040)if (Timeout-- == 0){ret = Error; goto i2cError;} - /* Read the data */ - *i2c_buf = I2Cx->DR; - /* Make sure that the STOP bit is cleared by Hardware before CR1 write access */ - while ((I2Cx->CR1&0x200) == 0x200)if (Timeout-- == 0){ret = Error; goto i2cError;} - /* Enable Acknowledgement to be ready for another reception */ - I2Cx->CR1 |= CR1_ACK_Set; - } - else - { - while ((I2Cx->CR1&0x200) == 0x200) - { - if (Timeout-- == 0) {ret = Error; break;} - } - if( i2cFlag == I2C_READ_INTERRUPT ) - I2Cx->CR1 |= CR1_ACK_Set; - } - i2cError: - if( ret == Error ) - { - /* TODO: i2c error handler */ - /* Need check i2cErrorNo and Reset I2C bus */ - } - I2Cx->CR2 &= ~CR2_FREQ_Reset; - //dump_i2c_register(I2C1); - rt_mutex_release(i2c_mux); - return ret; - } - else - return Error; + I2CMode = DMA; + + i2cStatus = S1; + if( SlaveAddress & 0x01 ) + { + if( BufSize == 1 ) + i2cFlag = I2C_READ_INTERRUPT; //I2C_READ_POLLING; + else + i2cFlag = I2C_READ_DMA; + } + else + i2cFlag = I2C_WRITE; + I2Cx->CR2 |= I2C_IT_ERR | I2C_IT_EVT;// | CR2_DMAEN_Set; + + I2Cx->CR1 |= CR1_START_Set; + + Timeout = 0xFFFF; + if( rt_event_recv( &i2c_event, I2C_COMPLETE, RT_EVENT_FLAG_AND | RT_EVENT_FLAG_CLEAR, RT_WAITING_FOREVER, &ev ) != RT_EOK ) {ret = Error; goto i2cError;} + + if( i2cFlag == I2C_READ_POLLING ) + { + while ((I2Cx->SR1&0x0001) != 0x0001) + if (Timeout-- == 0) {ret = Error; goto i2cError;} + Timeout = 0xFFFF; + I2Cx->DR = DevAddr; + /* Wait until ADDR is set: EV6 */ + while ((I2Cx->SR1&0x0002) != 0x0002) + { + if (Timeout-- == 0){ret = Error; goto i2cError;} + } + /* Clear ACK bit */ + I2Cx->CR1 &= CR1_ACK_Reset; + /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 + software sequence must complete before the current byte end of transfer */ + __disable_irq(); + /* Clear ADDR flag */ + temp = I2Cx->SR2; + /* Program the STOP */ + I2Cx->CR1 |= CR1_STOP_Set; + /* Re-enable IRQs */ + __enable_irq(); + /* Wait until a data is received in DR register (RXNE = 1) EV7 */ + while ((I2Cx->SR1 & 0x00040) != 0x000040)if (Timeout-- == 0){ret = Error; goto i2cError;} + /* Read the data */ + *i2c_buf = I2Cx->DR; + /* Make sure that the STOP bit is cleared by Hardware before CR1 write access */ + while ((I2Cx->CR1&0x200) == 0x200)if (Timeout-- == 0){ret = Error; goto i2cError;} + /* Enable Acknowledgement to be ready for another reception */ + I2Cx->CR1 |= CR1_ACK_Set; + } + else + { + while ((I2Cx->CR1&0x200) == 0x200) + { + if (Timeout-- == 0) {ret = Error; break;} + } + if( i2cFlag == I2C_READ_INTERRUPT ) + I2Cx->CR1 |= CR1_ACK_Set; + } + i2cError: + if( ret == Error ) + { + /* TODO: i2c error handler */ + /* Need check i2cErrorNo and Reset I2C bus */ + } + I2Cx->CR2 &= ~CR2_FREQ_Reset; + //dump_i2c_register(I2C1); + rt_mutex_release(i2c_mux); + return ret; + } + else + return Error; } void I2C1_INIT() { - GPIO_InitTypeDef GPIO_InitStructure; + GPIO_InitTypeDef GPIO_InitStructure; I2C_InitTypeDef I2C_InitStructure; - NVIC_InitTypeDef NVIC_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; - if( i2c1_init_flag == 0 ) - { - /* Enable the I2C clock */ - RCC_APB1PeriphClockCmd(I2C1_CLK, ENABLE); - /* GPIOB clock enable */ - RCC_AHB1PeriphClockCmd(I2C1_GPIO_CLK, ENABLE); - /* Enable the DMA1 clock */ - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); - - //Reset GPIO - GPIO_InitStructure.GPIO_Pin = I2C1_SDA_PIN | I2C1_SCL_PIN; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; - GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; - GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; - GPIO_Init(I2C1_GPIO_PORT, &GPIO_InitStructure); - - /* Connect PXx to I2C_SCL*/ - GPIO_PinAFConfig(I2C1_GPIO_PORT, I2C1_SDA_SOURCE, GPIO_AF_I2C1); - - /* Connect PXx to I2C_SDA*/ - GPIO_PinAFConfig(I2C1_GPIO_PORT, I2C1_SCL_SOURCE, GPIO_AF_I2C1); - - /* Enable I2C1 reset state */ - RCC_APB1PeriphResetCmd(I2C1_CLK, ENABLE); - /* Release I2C1 from reset state */ - RCC_APB1PeriphResetCmd(I2C1_CLK, DISABLE); - - I2C_DeInit(I2C1); - I2C_InitStructure.I2C_Mode = I2C_Mode_I2C; - I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2; - I2C_InitStructure.I2C_OwnAddress1 = OwnAddress1; - I2C_InitStructure.I2C_Ack = I2C_Ack_Enable; - I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; - I2C_InitStructure.I2C_ClockSpeed = ClockSpeed; - I2C_Init(I2C1, &I2C_InitStructure); - - I2C_Cmd(I2C1, ENABLE); - - /* Configure and enable I2C1 event interrupt -------------------------------*/ - NVIC_InitStructure.NVIC_IRQChannel = I2C1_EV_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - /* Configure and enable I2C1 DMA interrupt -------------------------------*/ - NVIC_InitStructure.NVIC_IRQChannel = I2C1_DMA_TX_IRQn; - NVIC_Init(&NVIC_InitStructure); - - NVIC_InitStructure.NVIC_IRQChannel = I2C1_DMA_RX_IRQn; - NVIC_Init(&NVIC_InitStructure); - - /* Configure and enable I2C1 error interrupt -------------------------------*/ - NVIC_InitStructure.NVIC_IRQChannel = I2C1_ER_IRQn; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2; - NVIC_Init(&NVIC_InitStructure); - - /* I2C1 TX DMA Channel configuration */ - DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE); - DMA_DeInit(I2C1_DMA_CHANNEL_TX); - I2CDMA_InitStructure.DMA_Channel = DMA_Channel_1; - I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C1_DR_Address; - I2CDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0; /* This parameter will be configured durig communication */ - I2CDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; /* This parameter will be configured durig communication */ - I2CDMA_InitStructure.DMA_BufferSize = 0xFFFF; /* This parameter will be configured durig communication */ - I2CDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; - I2CDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; - I2CDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; - I2CDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; - I2CDMA_InitStructure.DMA_Mode = DMA_Mode_Normal; - I2CDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; - //I2CDMA_InitStructure.DMA_M2M = DMA_M2M_Disable; - I2CDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; - I2CDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; - I2CDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; - I2CDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; - DMA_Init(I2C1_DMA_CHANNEL_TX, &I2CDMA_InitStructure); - - /* I2C1 RX DMA Channel configuration */ - DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE); - DMA_DeInit(I2C1_DMA_CHANNEL_RX); - DMA_Init(I2C1_DMA_CHANNEL_RX, &I2CDMA_InitStructure); - - //I2C_AcknowledgePolling(I2C1, 0x70); - - rt_event_init(&i2c_event, "i2c_event", RT_IPC_FLAG_FIFO ); - i2c_mux = rt_mutex_create("i2c_mux", RT_IPC_FLAG_FIFO ); - i2c1_init_flag = 1; - } + if( i2c1_init_flag == 0 ) + { + /* Enable the I2C clock */ + RCC_APB1PeriphClockCmd(I2C1_CLK, ENABLE); + /* GPIOB clock enable */ + RCC_AHB1PeriphClockCmd(I2C1_GPIO_CLK, ENABLE); + /* Enable the DMA1 clock */ + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); + + //Reset GPIO + GPIO_InitStructure.GPIO_Pin = I2C1_SDA_PIN | I2C1_SCL_PIN; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(I2C1_GPIO_PORT, &GPIO_InitStructure); + + /* Connect PXx to I2C_SCL*/ + GPIO_PinAFConfig(I2C1_GPIO_PORT, I2C1_SDA_SOURCE, GPIO_AF_I2C1); + + /* Connect PXx to I2C_SDA*/ + GPIO_PinAFConfig(I2C1_GPIO_PORT, I2C1_SCL_SOURCE, GPIO_AF_I2C1); + + /* Enable I2C1 reset state */ + RCC_APB1PeriphResetCmd(I2C1_CLK, ENABLE); + /* Release I2C1 from reset state */ + RCC_APB1PeriphResetCmd(I2C1_CLK, DISABLE); + + I2C_DeInit(I2C1); + I2C_InitStructure.I2C_Mode = I2C_Mode_I2C; + I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2; + I2C_InitStructure.I2C_OwnAddress1 = OwnAddress1; + I2C_InitStructure.I2C_Ack = I2C_Ack_Enable; + I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; + I2C_InitStructure.I2C_ClockSpeed = ClockSpeed; + I2C_Init(I2C1, &I2C_InitStructure); + + I2C_Cmd(I2C1, ENABLE); + + /* Configure and enable I2C1 event interrupt -------------------------------*/ + NVIC_InitStructure.NVIC_IRQChannel = I2C1_EV_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + /* Configure and enable I2C1 DMA interrupt -------------------------------*/ + NVIC_InitStructure.NVIC_IRQChannel = I2C1_DMA_TX_IRQn; + NVIC_Init(&NVIC_InitStructure); + + NVIC_InitStructure.NVIC_IRQChannel = I2C1_DMA_RX_IRQn; + NVIC_Init(&NVIC_InitStructure); + + /* Configure and enable I2C1 error interrupt -------------------------------*/ + NVIC_InitStructure.NVIC_IRQChannel = I2C1_ER_IRQn; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2; + NVIC_Init(&NVIC_InitStructure); + + /* I2C1 TX DMA Channel configuration */ + DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE); + DMA_DeInit(I2C1_DMA_CHANNEL_TX); + I2CDMA_InitStructure.DMA_Channel = DMA_Channel_1; + I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C1_DR_Address; + I2CDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0; /* This parameter will be configured durig communication */ + I2CDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; /* This parameter will be configured durig communication */ + I2CDMA_InitStructure.DMA_BufferSize = 0xFFFF; /* This parameter will be configured durig communication */ + I2CDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + I2CDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + I2CDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; + I2CDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; + I2CDMA_InitStructure.DMA_Mode = DMA_Mode_Normal; + I2CDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; + //I2CDMA_InitStructure.DMA_M2M = DMA_M2M_Disable; + I2CDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; + I2CDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; + I2CDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; + I2CDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; + DMA_Init(I2C1_DMA_CHANNEL_TX, &I2CDMA_InitStructure); + + /* I2C1 RX DMA Channel configuration */ + DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE); + DMA_DeInit(I2C1_DMA_CHANNEL_RX); + DMA_Init(I2C1_DMA_CHANNEL_RX, &I2CDMA_InitStructure); + + //I2C_AcknowledgePolling(I2C1, 0x70); + + rt_event_init(&i2c_event, "i2c_event", RT_IPC_FLAG_FIFO ); + i2c_mux = rt_mutex_create("i2c_mux", RT_IPC_FLAG_FIFO ); + i2c1_init_flag = 1; + } } void I2C_DMAConfig(I2C_TypeDef* I2Cx, uint8_t* pBuffer, uint32_t BufferSize, uint32_t Direction) { - - I2CDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)pBuffer; - I2CDMA_InitStructure.DMA_BufferSize = (uint32_t)BufferSize; - /* Initialize the DMA with the new parameters */ + + I2CDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)pBuffer; + I2CDMA_InitStructure.DMA_BufferSize = (uint32_t)BufferSize; + /* Initialize the DMA with the new parameters */ if (Direction == I2C_DIRECTION_TX) { /* Configure the DMA Tx Channel with the buffer address and the buffer size */ I2CDMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; if (I2Cx == I2C1) - { + { I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C1_DR_Address; - //DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE); - DMA_Init(I2C1_DMA_CHANNEL_TX, &I2CDMA_InitStructure); - DMA_Cmd(I2C1_DMA_CHANNEL_TX, ENABLE); - } + //DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE); + DMA_Init(I2C1_DMA_CHANNEL_TX, &I2CDMA_InitStructure); + DMA_Cmd(I2C1_DMA_CHANNEL_TX, ENABLE); + } else - { + { I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C2_DR_Address; - //DMA_Cmd(I2C2_DMA_CHANNEL_TX, DISABLE); - DMA_Init(I2C2_DMA_CHANNEL_TX, &I2CDMA_InitStructure); - DMA_Cmd(I2C2_DMA_CHANNEL_TX, ENABLE); - } + //DMA_Cmd(I2C2_DMA_CHANNEL_TX, DISABLE); + DMA_Init(I2C2_DMA_CHANNEL_TX, &I2CDMA_InitStructure); + DMA_Cmd(I2C2_DMA_CHANNEL_TX, ENABLE); + } } else /* Reception */ @@ -609,19 +609,19 @@ void I2C_DMAConfig(I2C_TypeDef* I2Cx, uint8_t* pBuffer, uint32_t BufferSize, uin I2CDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; if (I2Cx == I2C1) - { + { I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C1_DR_Address; - //DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE); - DMA_Init(I2C1_DMA_CHANNEL_RX, &I2CDMA_InitStructure); - DMA_Cmd(I2C1_DMA_CHANNEL_RX, ENABLE); - } - else - { + //DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE); + DMA_Init(I2C1_DMA_CHANNEL_RX, &I2CDMA_InitStructure); + DMA_Cmd(I2C1_DMA_CHANNEL_RX, ENABLE); + } + else + { I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C2_DR_Address; - // DMA_Cmd(I2C2_DMA_CHANNEL_RX, DISABLE); - DMA_Init(I2C2_DMA_CHANNEL_RX, &I2CDMA_InitStructure); - DMA_Cmd(I2C2_DMA_CHANNEL_RX, ENABLE); - } + // DMA_Cmd(I2C2_DMA_CHANNEL_RX, DISABLE); + DMA_Init(I2C2_DMA_CHANNEL_RX, &I2CDMA_InitStructure); + DMA_Cmd(I2C2_DMA_CHANNEL_RX, ENABLE); + } } } diff --git a/bsp/stm32f20x/Drivers/i2c.h b/bsp/stm32f20x/Drivers/i2c.h index 3d2c9d871f..e1a6b57427 100644 --- a/bsp/stm32f20x/Drivers/i2c.h +++ b/bsp/stm32f20x/Drivers/i2c.h @@ -5,17 +5,17 @@ /* Exported constants --------------------------------------------------------*/ -#define SR1_AF_Set ((uint16_t)0x0400) -#define SR1_ARLO_Set ((uint16_t)0x0200) -#define SR1_BERR_Set ((uint16_t)0x0100) -#define SR1_ADDR_Set ((uint16_t)0x0002) -#define SR1_SB_Set ((uint16_t)0x0001) +#define SR1_AF_Set ((uint16_t)0x0400) +#define SR1_ARLO_Set ((uint16_t)0x0200) +#define SR1_BERR_Set ((uint16_t)0x0100) +#define SR1_ADDR_Set ((uint16_t)0x0002) +#define SR1_SB_Set ((uint16_t)0x0001) -#define SR2_BUSY ((uint16_t)0x0002) -#define SR2_MSL ((uint16_t)0x0001) +#define SR2_BUSY ((uint16_t)0x0002) +#define SR2_MSL ((uint16_t)0x0001) -#define CR1_SWRST_Set ((uint16_t)0x8000) +#define CR1_SWRST_Set ((uint16_t)0x8000) /* I2C SPE mask */ #define CR1_PE_Set ((uint16_t)0x0001) #define CR1_PE_Reset ((uint16_t)0xFFFE) @@ -97,12 +97,12 @@ #define I2C1_DMA_CHANNEL_TX DMA1_Stream6 #define I2C1_DMA_CHANNEL_RX DMA1_Stream0 -#define I2C1_DMA_TX_IRQn DMA1_Stream6_IRQn +#define I2C1_DMA_TX_IRQn DMA1_Stream6_IRQn #define I2C1_DMA_RX_IRQn DMA1_Stream0_IRQn - + #define I2C2_DMA_CHANNEL_TX DMA1_Stream2 #define I2C2_DMA_CHANNEL_RX DMA1_Stream7 -#define I2C2_DMA_TX_IRQn DMA1_Stream2_IRQn +#define I2C2_DMA_TX_IRQn DMA1_Stream2_IRQn #define I2C2_DMA_RX_IRQn DMA1_Stream7_IRQn #define I2C1_DR_Address 0x40005410 @@ -112,20 +112,20 @@ #define I2C1_SCL_PIN GPIO_Pin_6 #define I2C1_SDA_SOURCE GPIO_PinSource7 #define I2C1_SCL_SOURCE GPIO_PinSource6 -#define I2C1_GPIO_PORT GPIOB -#define I2C1_GPIO_CLK RCC_AHB1Periph_GPIOB +#define I2C1_GPIO_PORT GPIOB +#define I2C1_GPIO_CLK RCC_AHB1Periph_GPIOB #define I2C1_CLK RCC_APB1Periph_I2C1 #define I2C2_SDA_PIN GPIO_Pin_11 #define I2C2_SCL_PIN GPIO_Pin_10 #define I2C2_SDA_SOURCE GPIO_PinSource11 #define I2C2_SCL_SOURCE GPIO_PinSource10 -#define I2C2_GPIO_PORT GPIOB -#define I2C2_GPIO_CLK RCC_AHB1Periph_GPIOB +#define I2C2_GPIO_PORT GPIOB +#define I2C2_GPIO_CLK RCC_AHB1Periph_GPIOB #define I2C2_CLK RCC_APB1Periph_I2C1 -#define I2C_MEM_1Byte 1 -#define I2C_MEM_2Bytes 2 +#define I2C_MEM_1Byte 1 +#define I2C_MEM_2Bytes 2 typedef enum { @@ -144,4 +144,4 @@ void I2C1_INIT(); Status I2C_AcknowledgePolling(I2C_TypeDef* I2Cx ,uint8_t Addr); Status I2C_IORW(I2C_TypeDef* I2Cx, uint8_t* pBuffer, uint32_t NumByteToRead, uint16_t memAddr, uint8_t SlaveAddress , uint8_t MemType ); -#endif \ No newline at end of file +#endif diff --git a/bsp/stm32f20x/Drivers/sdio_sd.c b/bsp/stm32f20x/Drivers/sdio_sd.c index 4c0689768b..9eab300e0f 100644 --- a/bsp/stm32f20x/Drivers/sdio_sd.c +++ b/bsp/stm32f20x/Drivers/sdio_sd.c @@ -4,160 +4,160 @@ * @author MCD Application Team * @version V4.6.1 * @date 18-April-2011 - * @brief This file provides a set of functions needed to manage the SDIO SD + * @brief This file provides a set of functions needed to manage the SDIO SD * Card memory mounted on STM32xx-EVAL board (refer to stm32_eval.h - * to know about the boards supporting this memory). - * - * + * to know about the boards supporting this memory). + * + * * @verbatim * * =================================================================== * How to use this driver * =================================================================== - * It implements a high level communication layer for read and write - * from/to this memory. The needed STM32 hardware resources (SDIO and - * GPIO) are defined in stm32xx_eval.h file, and the initialization is - * performed in SD_LowLevel_Init() function declared in stm32xx_eval.c + * It implements a high level communication layer for read and write + * from/to this memory. The needed STM32 hardware resources (SDIO and + * GPIO) are defined in stm32xx_eval.h file, and the initialization is + * performed in SD_LowLevel_Init() function declared in stm32xx_eval.c * file. - * You can easily tailor this driver to any other development board, - * by just adapting the defines for hardware resources and + * You can easily tailor this driver to any other development board, + * by just adapting the defines for hardware resources and * SD_LowLevel_Init() function. - * + * * A - SD Card Initialization and configuration - * ============================================ - * - To initialize the SD Card, use the SD_Init() function. It - * Initializes the SD Card and put it into StandBy State (Ready + * ============================================ + * - To initialize the SD Card, use the SD_Init() function. It + * Initializes the SD Card and put it into StandBy State (Ready * for data transfer). This function provide the following operations: - * + * * 1 - Apply the SD Card initialization process at 400KHz and check - * the SD Card type (Standard Capacity or High Capacity). You - * can change or adapt this frequency by adjusting the - * "SDIO_INIT_CLK_DIV" define inside the stm32xx_eval.h file. + * the SD Card type (Standard Capacity or High Capacity). You + * can change or adapt this frequency by adjusting the + * "SDIO_INIT_CLK_DIV" define inside the stm32xx_eval.h file. * The SD Card frequency (SDIO_CK) is computed as follows: - * - * +---------------------------------------------+ + * + * +---------------------------------------------+ * | SDIO_CK = SDIOCLK / (SDIO_INIT_CLK_DIV + 2) | - * +---------------------------------------------+ - * - * In initialization mode and according to the SD Card standard, - * make sure that the SDIO_CK frequency don't exceed 400KHz. - * + * +---------------------------------------------+ + * + * In initialization mode and according to the SD Card standard, + * make sure that the SDIO_CK frequency don't exceed 400KHz. + * * 2 - Get the SD CID and CSD data. All these information are * managed by the SDCardInfo structure. This structure provide - * also ready computed SD Card capacity and Block size. + * also ready computed SD Card capacity and Block size. * * 3 - Configure the SD Card Data transfer frequency. By Default, * the card transfer frequency is set to 24MHz. You can change - * or adapt this frequency by adjusting the "SDIO_TRANSFER_CLK_DIV" + * or adapt this frequency by adjusting the "SDIO_TRANSFER_CLK_DIV" * define inside the stm32xx_eval.h file. * The SD Card frequency (SDIO_CK) is computed as follows: - * - * +---------------------------------------------+ + * + * +---------------------------------------------+ * | SDIO_CK = SDIOCLK / (SDIO_INIT_CLK_DIV + 2) | - * +---------------------------------------------+ - * - * In transfer mode and according to the SD Card standard, + * +---------------------------------------------+ + * + * In transfer mode and according to the SD Card standard, * make sure that the SDIO_CK frequency don't exceed 25MHz * and 50MHz in High-speed mode switch. * To be able to use a frequency higher than 24MHz, you should - * use the SDIO peripheral in bypass mode. Refer to the + * use the SDIO peripheral in bypass mode. Refer to the * corresponding reference manual for more details. - * + * * 4 - Select the corresponding SD Card according to the address * read with the step 2. - * - * 5 - Configure the SD Card in wide bus mode: 4-bits data. + * + * 5 - Configure the SD Card in wide bus mode: 4-bits data. * * B - SD Card Read operation - * ========================== + * ========================== * - You can read SD card by using two function: SD_ReadBlock() and * SD_ReadMultiBlocks() functions. These functions support only * 512-byte block length. * - The SD_ReadBlock() function read only one block (512-byte). This - * function can transfer the data using DMA controller or using - * polling mode. To select between DMA or polling mode refer to + * function can transfer the data using DMA controller or using + * polling mode. To select between DMA or polling mode refer to * "SD_DMA_MODE" or "SD_POLLING_MODE" inside the stm32_eval_sdio_sd.h * file and uncomment the corresponding line. By default the SD DMA - * mode is selected - * - The SD_ReadMultiBlocks() function read only mutli blocks (multiple - * of 512-byte). + * mode is selected + * - The SD_ReadMultiBlocks() function read only mutli blocks (multiple + * of 512-byte). * - Any read operation should be followed by two functions to check * if the DMA Controller and SD Card status. * - SD_ReadWaitOperation(): this function insure that the DMA * controller has finished all data transfer. - * - SD_GetStatus(): to check that the SD Card has finished the + * - SD_GetStatus(): to check that the SD Card has finished the * data transfer and it is ready for data. - * + * * - The DMA transfer is finished by the SDIO Data End interrupt. User * has to call the SD_ProcessIRQ() function inside the SDIO_IRQHandler(). - * Don't forget to enable the SDIO_IRQn interrupt using the NVIC controller. - * + * Don't forget to enable the SDIO_IRQn interrupt using the NVIC controller. + * * C - SD Card Write operation - * =========================== + * =========================== * - You can write SD card by using two function: SD_WriteBlock() and * SD_WriteMultiBlocks() functions. These functions support only - * 512-byte block length. + * 512-byte block length. * - The SD_WriteBlock() function write only one block (512-byte). This - * function can transfer the data using DMA controller or using - * polling mode. To select between DMA or polling mode refer to + * function can transfer the data using DMA controller or using + * polling mode. To select between DMA or polling mode refer to * "SD_DMA_MODE" or "SD_POLLING_MODE" inside the stm32_eval_sdio_sd.h * file and uncomment the corresponding line. By default the SD DMA - * mode is selected - * - The SD_WriteMultiBlocks() function write only mutli blocks (multiple - * of 512-byte). + * mode is selected + * - The SD_WriteMultiBlocks() function write only mutli blocks (multiple + * of 512-byte). * - Any write operation should be followed by two functions to check * if the DMA Controller and SD Card status. * - SD_ReadWaitOperation(): this function insure that the DMA * controller has finished all data transfer. - * - SD_GetStatus(): to check that the SD Card has finished the - * data transfer and it is ready for data. - * + * - SD_GetStatus(): to check that the SD Card has finished the + * data transfer and it is ready for data. + * * - The DMA transfer is finished by the SDIO Data End interrupt. User * has to call the SD_ProcessIRQ() function inside the SDIO_IRQHandler(). - * Don't forget to enable the SDIO_IRQn interrupt using the NVIC controller. - - * + * Don't forget to enable the SDIO_IRQn interrupt using the NVIC controller. + + * * D - SD card status - * ================== + * ================== * - At any time, you can check the SD Card status and get the SD card * state by using the SD_GetStatus() function. This function checks * first if the SD card is still connected and then get the internal - * SD Card transfer state. - * - You can also get the SD card SD Status register by using the - * SD_SendSDStatus() function. - * + * SD Card transfer state. + * - You can also get the SD card SD Status register by using the + * SD_SendSDStatus() function. + * * E - Programming Model - * ===================== + * ===================== * Status = SD_Init(); // Initialization Step as described in section A - * + * * // SDIO Interrupt ENABLE * NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn; * NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; * NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; * NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; * NVIC_Init(&NVIC_InitStructure); - * + * * // Write operation as described in Section C * Status = SD_WriteBlock(buffer, address, 512); * Status = SD_WaitWriteOperation(); - * while(SD_GetStatus() != SD_TRANSFER_OK); - * + * while(SD_GetStatus() != SD_TRANSFER_OK); + * * Status = SD_WriteMultiBlocks(buffer, address, 512, NUMBEROFBLOCKS); * Status = SD_WaitWriteOperation(); - * while(SD_GetStatus() != SD_TRANSFER_OK); - * + * while(SD_GetStatus() != SD_TRANSFER_OK); + * * // Read operation as described in Section B * Status = SD_ReadBlock(buffer, address, 512); * Status = SD_WaitReadOperation(); * while(SD_GetStatus() != SD_TRANSFER_OK); - * + * * Status = SD_ReadMultiBlocks(buffer, address, 512, NUMBEROFBLOCKS); * Status = SD_WaitReadOperation(); - * while(SD_GetStatus() != SD_TRANSFER_OK); - * - * + * while(SD_GetStatus() != SD_TRANSFER_OK); + * + * * STM32 SDIO Pin assignment - * ========================= + * ========================= * +-----------------------------------------------------------+ * | Pin assignment | * +-----------------------------+---------------+-------------+ @@ -170,11 +170,11 @@ * | SDIO CLK | CLK | 5 | * | | GND | 6 (0 V) | * | SDIO D0 | D0 | 7 | - * | SDIO D1 | D1 | 8 | - * +-----------------------------+---------------+-------------+ - * - * @endverbatim - * + * | SDIO D1 | D1 | 8 | + * +-----------------------------+---------------+-------------+ + * + * @endverbatim + * ****************************************************************************** * @attention * @@ -186,8 +186,8 @@ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ + ****************************************************************************** + */ /* Includes ------------------------------------------------------------------*/ #include "sdio_sd.h" @@ -195,40 +195,40 @@ /** @addtogroup Utilities * @{ */ - + /** @addtogroup STM32_EVAL * @{ - */ + */ /** @addtogroup Common * @{ */ - + /** @addtogroup STM32_EVAL_SDIO_SD * @brief This file provides all the SD Card driver firmware functions. * @{ - */ + */ /** @defgroup STM32_EVAL_SDIO_SD_Private_Types * @{ - */ + */ /** * @} - */ + */ /** @defgroup STM32_EVAL_SDIO_SD_Private_Defines * @{ - */ -/** - * @brief SDIO Static flags, TimeOut, FIFO Address + */ +/** + * @brief SDIO Static flags, TimeOut, FIFO Address */ #define NULL 0 #define SDIO_STATIC_FLAGS ((uint32_t)0x000005FF) #define SDIO_CMD0TIMEOUT ((uint32_t)0x00010000) -/** - * @brief Mask for errors Card Status R1 (OCR Register) +/** + * @brief Mask for errors Card Status R1 (OCR Register) */ #define SD_OCR_ADDR_OUT_OF_RANGE ((uint32_t)0x80000000) #define SD_OCR_ADDR_MISALIGNED ((uint32_t)0x40000000) @@ -251,8 +251,8 @@ #define SD_OCR_AKE_SEQ_ERROR ((uint32_t)0x00000008) #define SD_OCR_ERRORBITS ((uint32_t)0xFDFFE008) -/** - * @brief Masks for R6 Response +/** + * @brief Masks for R6 Response */ #define SD_R6_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00002000) #define SD_R6_ILLEGAL_CMD ((uint32_t)0x00004000) @@ -280,22 +280,22 @@ #define SD_HALFFIFO ((uint32_t)0x00000008) #define SD_HALFFIFOBYTES ((uint32_t)0x00000020) -/** - * @brief Command Class Supported +/** + * @brief Command Class Supported */ #define SD_CCCC_LOCK_UNLOCK ((uint32_t)0x00000080) #define SD_CCCC_WRITE_PROT ((uint32_t)0x00000040) #define SD_CCCC_ERASE ((uint32_t)0x00000020) -/** +/** * @brief Following commands are SD Card Specific commands. - * SDIO_APP_CMD should be sent before sending these commands. + * SDIO_APP_CMD should be sent before sending these commands. */ #define SDIO_SEND_IF_COND ((uint32_t)0x00000008) /** * @} - */ + */ /** @defgroup STM32_EVAL_SDIO_SD_Private_Macros @@ -303,8 +303,8 @@ */ /** * @} - */ - + */ + /** @defgroup STM32_EVAL_SDIO_SD_Private_Variables * @{ @@ -319,10 +319,10 @@ SD_CardInfo SDCardInfo; SDIO_InitTypeDef SDIO_InitStructure; SDIO_CmdInitTypeDef SDIO_CmdInitStructure; -SDIO_DataInitTypeDef SDIO_DataInitStructure; +SDIO_DataInitTypeDef SDIO_DataInitStructure; /** - * @} - */ + * @} + */ /** @defgroup STM32_EVAL_SDIO_SD_Private_Function_Prototypes @@ -338,15 +338,15 @@ static SD_Error SDEnWideBus(FunctionalState NewState); static SD_Error IsCardProgramming(uint8_t *pstatus); static SD_Error FindSCR(uint16_t rca, uint32_t *pscr); uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes); - + /** * @} - */ + */ /** @defgroup STM32_EVAL_SDIO_SD_Private_Functions * @{ - */ + */ /** * @brief DeInitializes the SDIO interface. @@ -354,12 +354,12 @@ uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes); * @retval None */ void SD_DeInit(void) -{ +{ SD_LowLevel_DeInit(); } /** - * @brief Initializes the SD Card and put it into StandBy State (Ready for data + * @brief Initializes the SD Card and put it into StandBy State (Ready for data * transfer). * @param None * @retval SD_Error: SD Card Error code. @@ -367,7 +367,7 @@ void SD_DeInit(void) SD_Error SD_Init(void) { __IO SD_Error errorstatus = SD_OK; - + /* SDIO Peripheral Low Level Init */ SD_LowLevel_Init(); @@ -391,15 +391,15 @@ SD_Error SD_Init(void) /*!< Configure the SDIO peripheral */ /*!< SDIOCLK = HCLK, SDIO_CK = HCLK/(2 + SDIO_TRANSFER_CLK_DIV) */ - /*!< on STM32F2xx devices, SDIOCLK is fixed to 48MHz */ - SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; + /*!< on STM32F2xx devices, SDIOCLK is fixed to 48MHz */ + SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; SDIO_Init(&SDIO_InitStructure); - + /*----------------- Read CSD/CID MSD registers ------------------*/ errorstatus = SD_GetCardInfo(&SDCardInfo); @@ -412,7 +412,7 @@ SD_Error SD_Init(void) if (errorstatus == SD_OK) { errorstatus = SD_EnableWideBusOperation(SDIO_BusWide_4b); - } + } return(errorstatus); } @@ -421,7 +421,7 @@ SD_Error SD_Init(void) * @brief Gets the cuurent sd card data transfer status. * @param None * @retval SDTransferState: Data Transfer state. - * This value can be: + * This value can be: * - SD_TRANSFER_OK: No data transfer is acting * - SD_TRANSFER_BUSY: Data transfer is acting */ @@ -430,7 +430,7 @@ SDTransferState SD_GetStatus(void) SDCardState cardstate = SD_CARD_TRANSFER; cardstate = SD_GetState(); - + if (cardstate == SD_CARD_TRANSFER) { return(SD_TRANSFER_OK); @@ -453,7 +453,7 @@ SDTransferState SD_GetStatus(void) SDCardState SD_GetState(void) { uint32_t resp1 = 0; - + if(SD_Detect()== SD_PRESENT) { if (SD_SendStatus(&resp1) != SD_OK) @@ -484,12 +484,12 @@ uint8_t SD_Detect(void) /*if (GPIO_ReadInputDataBit(SD_DETECT_GPIO_PORT, SD_DETECT_PIN) != Bit_RESET) { status = SD_NOT_PRESENT; - } */ + } */ return status; } /** - * @brief Enquires cards about their operating voltage and configures + * @brief Enquires cards about their operating voltage and configures * clock controls. * @param None * @retval SD_Error: SD Card Error code. @@ -504,7 +504,7 @@ SD_Error SD_PowerON(void) /*!< Configure the SDIO peripheral */ /*!< SDIOCLK = HCLK, SDIO_CK = HCLK/(2 + SDIO_INIT_CLK_DIV) */ /*!< on STM32F2xx devices, SDIOCLK is fixed to 48MHz */ - /*!< SDIO_CK for initialization should not exceed 400 KHz */ + /*!< SDIO_CK for initialization should not exceed 400 KHz */ SDIO_InitStructure.SDIO_ClockDiv = SDIO_INIT_CLK_DIV; SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; @@ -649,7 +649,7 @@ SD_Error SD_PowerOFF(void) } /** - * @brief Intialises all cards or single card as the case may be Card(s) come + * @brief Intialises all cards or single card as the case may be Card(s) come * into standby state. * @param None * @retval SD_Error: SD Card Error code. @@ -739,7 +739,7 @@ SD_Error SD_InitializeCards(void) /** * @brief Returns information about specific card. - * @param cardinfo: pointer to a SD_CardInfo structure that contains all SD card + * @param cardinfo: pointer to a SD_CardInfo structure that contains all SD card * information. * @retval SD_Error: SD Card Error code. */ @@ -809,7 +809,7 @@ SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo) /*!< Byte 10 */ tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8); cardinfo->SD_csd.DeviceSizeMul |= (tmp & 0x80) >> 7; - + cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) ; cardinfo->CardCapacity *= (1 << (cardinfo->SD_csd.DeviceSizeMul + 2)); cardinfo->CardBlockSize = 1 << (cardinfo->SD_csd.RdBlockLen); @@ -833,9 +833,9 @@ SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo) /*!< Byte 10 */ tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8); - + cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) * 512 * 1024; - cardinfo->CardBlockSize = 512; + cardinfo->CardBlockSize = 512; } @@ -941,14 +941,14 @@ SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo) tmp = (uint8_t)(CID_Tab[3] & 0x000000FF); cardinfo->SD_cid.CID_CRC = (tmp & 0xFE) >> 1; cardinfo->SD_cid.Reserved2 = 1; - + return(errorstatus); } /** - * @brief Enables wide bus opeartion for the requeseted card if supported by + * @brief Enables wide bus opeartion for the requeseted card if supported by * card. - * @param WideMode: Specifies the SD card wide bus mode. + * @param WideMode: Specifies the SD card wide bus mode. * This parameter can be one of the following values: * @arg SDIO_BusWide_8b: 8-bit data transfer (Only for MMC) * @arg SDIO_BusWide_4b: 4-bit data transfer @@ -1026,14 +1026,14 @@ SD_Error SD_GetCardStatus(SD_CardStatus *cardstatus) /*!< Byte 13 */ tmp = (uint8_t)((SDSTATUS_Tab[13] & 0x3)); cardstatus->ERASE_OFFSET = tmp; - + return(errorstatus); } /** - * @brief Enables wide bus opeartion for the requeseted card if supported by + * @brief Enables wide bus opeartion for the requeseted card if supported by * card. - * @param WideMode: Specifies the SD card wide bus mode. + * @param WideMode: Specifies the SD card wide bus mode. * This parameter can be one of the following values: * @arg SDIO_BusWide_8b: 8-bit data transfer (Only for MMC) * @arg SDIO_BusWide_4b: 4-bit data transfer @@ -1064,7 +1064,7 @@ SD_Error SD_EnableWideBusOperation(uint32_t WideMode) if (SD_OK == errorstatus) { /*!< Configure the SDIO peripheral */ - SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; + SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; @@ -1080,7 +1080,7 @@ SD_Error SD_EnableWideBusOperation(uint32_t WideMode) if (SD_OK == errorstatus) { /*!< Configure the SDIO peripheral */ - SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; + SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; @@ -1118,32 +1118,32 @@ SD_Error SD_SelectDeselect(uint32_t addr) /** * @brief Allows to read one block from a specified address in a card. The Data - * transfer can be managed by DMA mode or Polling mode. - * @note This operation should be followed by two functions to check if the + * transfer can be managed by DMA mode or Polling mode. + * @note This operation should be followed by two functions to check if the * DMA Controller and SD Card status. * - SD_ReadWaitOperation(): this function insure that the DMA * controller has finished all data transfer. - * - SD_GetStatus(): to check that the SD Card has finished the - * data transfer and it is ready for data. + * - SD_GetStatus(): to check that the SD Card has finished the + * data transfer and it is ready for data. * @param readbuff: pointer to the buffer that will contain the received data - * @param ReadAddr: Address from where data are to be read. + * @param ReadAddr: Address from where data are to be read. * @param BlockSize: the SD card Data block size. The Block size should be 512. * @retval SD_Error: SD Card Error code. */ SD_Error SD_ReadBlock(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize) { SD_Error errorstatus = SD_OK; -#if defined (SD_POLLING_MODE) +#if defined (SD_POLLING_MODE) uint32_t count = 0, *tempbuff = (uint32_t *)readbuff; #endif TransferError = SD_OK; TransferEnd = 0; StopCondition = 0; - + SDIO->DCTRL = 0x0; - + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) { BlockSize = 512; @@ -1173,7 +1173,7 @@ SD_Error SD_ReadBlock(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize) return(errorstatus); } -#if defined (SD_POLLING_MODE) +#if defined (SD_POLLING_MODE) /*!< In case of single block transfer, no need of stop transfer at all.*/ /*!< Polling mode */ while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) @@ -1217,7 +1217,7 @@ SD_Error SD_ReadBlock(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize) *tempbuff = SDIO_ReadData(); tempbuff++; } - + /*!< Clear all the static flags */ SDIO_ClearFlag(SDIO_STATIC_FLAGS); @@ -1232,13 +1232,13 @@ SD_Error SD_ReadBlock(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize) /** * @brief Allows to read blocks from a specified address in a card. The Data - * transfer can be managed by DMA mode or Polling mode. - * @note This operation should be followed by two functions to check if the + * transfer can be managed by DMA mode or Polling mode. + * @note This operation should be followed by two functions to check if the * DMA Controller and SD Card status. * - SD_ReadWaitOperation(): this function insure that the DMA * controller has finished all data transfer. - * - SD_GetStatus(): to check that the SD Card has finished the - * data transfer and it is ready for data. + * - SD_GetStatus(): to check that the SD Card has finished the + * data transfer and it is ready for data. * @param readbuff: pointer to the buffer that will contain the received data. * @param ReadAddr: Address from where data are to be read. * @param BlockSize: the SD card Data block size. The Block size should be 512. @@ -1251,7 +1251,7 @@ SD_Error SD_ReadMultiBlocks(uint32_t ReadAddr, uint8_t *readbuff, uint16_t Block TransferError = SD_OK; TransferEnd = 0; StopCondition = 1; - + SDIO->DCTRL = 0x0; if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) @@ -1274,7 +1274,7 @@ SD_Error SD_ReadMultiBlocks(uint32_t ReadAddr, uint8_t *readbuff, uint16_t Block { return(errorstatus); } - + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize; SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) 9 << 4; @@ -1306,10 +1306,10 @@ SD_Error SD_ReadMultiBlocks(uint32_t ReadAddr, uint8_t *readbuff, uint16_t Block } /** - * @brief This function waits until the SDIO DMA data transfer is finished. + * @brief This function waits until the SDIO DMA data transfer is finished. * This function should be called after SDIO_ReadMultiBlocks() function - * to insure that all data sent by the card are already transferred by - * the DMA controller. + * to insure that all data sent by the card are already transferred by + * the DMA controller. * @param None. * @retval SD_Error: SD Card Error code. */ @@ -1331,14 +1331,14 @@ SD_Error SD_WaitReadOperation(void) /** * @brief Allows to write one block starting from a specified address in a card. * The Data transfer can be managed by DMA mode or Polling mode. - * @note This operation should be followed by two functions to check if the + * @note This operation should be followed by two functions to check if the * DMA Controller and SD Card status. * - SD_ReadWaitOperation(): this function insure that the DMA * controller has finished all data transfer. - * - SD_GetStatus(): to check that the SD Card has finished the - * data transfer and it is ready for data. + * - SD_GetStatus(): to check that the SD Card has finished the + * data transfer and it is ready for data. * @param writebuff: pointer to the buffer that contain the data to be transferred. - * @param WriteAddr: Address from where data are to be read. + * @param WriteAddr: Address from where data are to be read. * @param BlockSize: the SD card Data block size. The Block size should be 512. * @retval SD_Error: SD Card Error code. */ @@ -1354,7 +1354,7 @@ SD_Error SD_WriteBlock(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSiz TransferError = SD_OK; TransferEnd = 0; StopCondition = 0; - + SDIO->DCTRL = 0x0; @@ -1363,7 +1363,7 @@ SD_Error SD_WriteBlock(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSiz BlockSize = 512; //WriteAddr /= 512; } - + /*!< Send CMD24 WRITE_SINGLE_BLOCK */ SDIO_CmdInitStructure.SDIO_Argument = WriteAddr; SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_WRITE_SINGLE_BLOCK; @@ -1388,7 +1388,7 @@ SD_Error SD_WriteBlock(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSiz SDIO_DataConfig(&SDIO_DataInitStructure); /*!< In case of single data block transfer no need of stop command at all */ -#if defined (SD_POLLING_MODE) +#if defined (SD_POLLING_MODE) while (!(SDIO->STA & (SDIO_FLAG_DBCKEND | SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR))) { if (SDIO_GetFlagStatus(SDIO_FLAG_TXFIFOHE) != RESET) @@ -1447,13 +1447,13 @@ SD_Error SD_WriteBlock(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSiz /** * @brief Allows to write blocks starting from a specified address in a card. - * The Data transfer can be managed by DMA mode only. - * @note This operation should be followed by two functions to check if the + * The Data transfer can be managed by DMA mode only. + * @note This operation should be followed by two functions to check if the * DMA Controller and SD Card status. * - SD_ReadWaitOperation(): this function insure that the DMA * controller has finished all data transfer. - * - SD_GetStatus(): to check that the SD Card has finished the - * data transfer and it is ready for data. + * - SD_GetStatus(): to check that the SD Card has finished the + * data transfer and it is ready for data. * @param WriteAddr: Address from where data are to be read. * @param writebuff: pointer to the buffer that contain the data to be transferred. * @param BlockSize: the SD card Data block size. The Block size should be 512. @@ -1467,7 +1467,7 @@ SD_Error SD_WriteMultiBlocks(uint32_t WriteAddr, uint8_t *writebuff, uint16_t Bl TransferError = SD_OK; TransferEnd = 0; StopCondition = 1; - + SDIO->DCTRL = 0x0; if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) @@ -1531,17 +1531,17 @@ SD_Error SD_WriteMultiBlocks(uint32_t WriteAddr, uint8_t *writebuff, uint16_t Bl SDIO_DataConfig(&SDIO_DataInitStructure); SDIO_ITConfig(SDIO_IT_DATAEND, ENABLE); - SDIO_DMACmd(ENABLE); + SDIO_DMACmd(ENABLE); SD_LowLevel_DMA_TxConfig((uint32_t *)writebuff, (NumberOfBlocks * BlockSize)); return(errorstatus); } /** - * @brief This function waits until the SDIO DMA data transfer is finished. + * @brief This function waits until the SDIO DMA data transfer is finished. * This function should be called after SDIO_WriteBlock() and - * SDIO_WriteMultiBlocks() function to insure that all data sent by the - * card are already transferred by the DMA controller. + * SDIO_WriteMultiBlocks() function to insure that all data sent by the + * card are already transferred by the DMA controller. * @param None. * @retval SD_Error: SD Card Error code. */ @@ -1567,7 +1567,7 @@ SD_Error SD_WaitWriteOperation(void) * @brief Gets the cuurent data transfer state. * @param None * @retval SDTransferState: Data Transfer state. - * This value can be: + * This value can be: * - SD_TRANSFER_OK: No data transfer is acting * - SD_TRANSFER_BUSY: Data transfer is acting */ @@ -1633,7 +1633,7 @@ SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr) startaddr /= 512; endaddr /= 512; } - + /*!< According to sd-card spec 1.0 ERASE_GROUP_START (CMD32) and erase_group_end(CMD33) */ if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) { @@ -1697,7 +1697,7 @@ SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr) /** * @brief Returns the current card's status. - * @param pcardstatus: pointer to the buffer that will contain the SD card + * @param pcardstatus: pointer to the buffer that will contain the SD card * status (Card Status register). * @retval SD_Error: SD Card Error code. */ @@ -1707,7 +1707,7 @@ SD_Error SD_SendStatus(uint32_t *pcardstatus) SDIO->ARG = (uint32_t) RCA << 16; SDIO->CMD = 0x44D; - + errorstatus = CmdResp1Error(SD_CMD_SEND_STATUS); if (errorstatus != SD_OK) @@ -1721,7 +1721,7 @@ SD_Error SD_SendStatus(uint32_t *pcardstatus) /** * @brief Returns the current SD card's status. - * @param psdstatus: pointer to the buffer that will contain the SD card status + * @param psdstatus: pointer to the buffer that will contain the SD card status * (SD Status register). * @retval SD_Error: SD Card Error code. */ @@ -2008,8 +2008,8 @@ static SD_Error CmdResp2Error(void) /** * @brief Checks for error conditions for R6 (RCA) response. * @param cmd: The sent command index. - * @param prca: pointer to the variable that will contain the SD card relative - * address RCA. + * @param prca: pointer to the variable that will contain the SD card relative + * address RCA. * @retval SD_Error: SD Card Error code. */ static SD_Error CmdResp6Error(uint8_t cmd, uint16_t *prca) @@ -2493,7 +2493,7 @@ uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes) /** * @} - */ + */ /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ @@ -2506,7 +2506,7 @@ uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes) #include /* set sector size to 512 */ -#define SECTOR_SIZE 512 +#define SECTOR_SIZE 512 static struct rt_device sdcard_device; //static SD_CardInfo SDCardInfo; @@ -2516,44 +2516,44 @@ static rt_uint8_t _sdcard_buffer[SECTOR_SIZE]; /* RT-Thread Device Driver Interface */ static rt_err_t rt_sdcard_init(rt_device_t dev) { -/* NVIC_InitTypeDef NVIC_InitStructure; +/* NVIC_InitTypeDef NVIC_InitStructure; - NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); */ + NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); */ - if (rt_sem_init(&sd_lock, "sdlock", 1, RT_IPC_FLAG_FIFO) != RT_EOK) - { - rt_kprintf("init sd lock semaphore failed\n"); - } - else - rt_kprintf("SD Card init OK\n"); + if (rt_sem_init(&sd_lock, "sdlock", 1, RT_IPC_FLAG_FIFO) != RT_EOK) + { + rt_kprintf("init sd lock semaphore failed\n"); + } + else + rt_kprintf("SD Card init OK\n"); - return RT_EOK; + return RT_EOK; } static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag) { - return RT_EOK; + return RT_EOK; } static rt_err_t rt_sdcard_close(rt_device_t dev) { - return RT_EOK; + return RT_EOK; } static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) { - SD_Error status; - rt_uint32_t retry; - rt_uint32_t factor; + SD_Error status; + rt_uint32_t retry; + rt_uint32_t factor; - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1; - else factor = SECTOR_SIZE; - //rt_kprintf("sd: read 0x%X, sector 0x%X, 0x%X\n", (uint32_t)buffer ,pos, size); - rt_sem_take(&sd_lock, RT_WAITING_FOREVER); + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1; + else factor = SECTOR_SIZE; + //rt_kprintf("sd: read 0x%X, sector 0x%X, 0x%X\n", (uint32_t)buffer ,pos, size); + rt_sem_take(&sd_lock, RT_WAITING_FOREVER); retry = 3; while(retry) @@ -2571,8 +2571,8 @@ static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_ (uint8_t*)_sdcard_buffer, SECTOR_SIZE); status = SD_WaitReadOperation(); - while(SD_GetStatus() != SD_TRANSFER_OK); - if (status != SD_OK) break; + while(SD_GetStatus() != SD_TRANSFER_OK); + if (status != SD_OK) break; /* copy to the buffer */ rt_memcpy(((rt_uint8_t*)buffer + index * SECTOR_SIZE), _sdcard_buffer, SECTOR_SIZE); @@ -2590,49 +2590,49 @@ static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_ status = SD_ReadMultiBlocks((part.offset + pos) * factor, (uint8_t*)buffer, SECTOR_SIZE, size); } - status = SD_WaitReadOperation(); - while(SD_GetStatus() != SD_TRANSFER_OK); - /*rt_kprintf("===DUMP SECTOR %d===\n",pos); - { - int i, j; - char* tmp = (char*)buffer; - for(i =0; i < 32;i++) - { - rt_kprintf("%2d: ",i); - for(j= 0; j < 16;j++) - rt_kprintf("%02X ",tmp[i*16+j]); - rt_kprintf("\n"); - } - } */ + status = SD_WaitReadOperation(); + while(SD_GetStatus() != SD_TRANSFER_OK); + /*rt_kprintf("===DUMP SECTOR %d===\n",pos); + { + int i, j; + char* tmp = (char*)buffer; + for(i =0; i < 32;i++) + { + rt_kprintf("%2d: ",i); + for(j= 0; j < 16;j++) + rt_kprintf("%02X ",tmp[i*16+j]); + rt_kprintf("\n"); + } + } */ } if (status == SD_OK) break; retry --; } - rt_sem_release(&sd_lock); - if (status == SD_OK) return size; + rt_sem_release(&sd_lock); + if (status == SD_OK) return size; - rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer); - return 0; + rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer); + return 0; } static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) { - SD_Error status; - rt_uint32_t factor; + SD_Error status; + rt_uint32_t factor; - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1; - else factor = SECTOR_SIZE; + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1; + else factor = SECTOR_SIZE; - //rt_kprintf("sd: write 0x%X, sector 0x%X, 0x%X\n", (uint32_t)buffer , pos, size); - rt_sem_take(&sd_lock, RT_WAITING_FOREVER); - - /* read all sectors */ - if (((rt_uint32_t)buffer % 4 != 0) || + //rt_kprintf("sd: write 0x%X, sector 0x%X, 0x%X\n", (uint32_t)buffer , pos, size); + rt_sem_take(&sd_lock, RT_WAITING_FOREVER); + + /* read all sectors */ + if (((rt_uint32_t)buffer % 4 != 0) || ((rt_uint32_t)buffer > 0x20080000)) - { - rt_uint32_t index; + { + rt_uint32_t index; /* which is not alignment with 4 or not chip SRAM */ for (index = 0; index < size; index ++) @@ -2643,14 +2643,14 @@ static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buf status = SD_WriteBlock((part.offset + index + pos) * factor, (uint8_t*)_sdcard_buffer, SECTOR_SIZE); - status = SD_WaitWriteOperation(); - while(SD_GetStatus() != SD_TRANSFER_OK); + status = SD_WaitWriteOperation(); + while(SD_GetStatus() != SD_TRANSFER_OK); if (status != SD_OK) break; } - } - else - { + } + else + { if (size == 1) { status = SD_WriteBlock((part.offset + pos) * factor, @@ -2662,15 +2662,15 @@ static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buf (uint8_t*)buffer, SECTOR_SIZE, size); } - status = SD_WaitWriteOperation(); + status = SD_WaitWriteOperation(); while(SD_GetStatus() != SD_TRANSFER_OK); - } - rt_sem_release(&sd_lock); + } + rt_sem_release(&sd_lock); - if (status == SD_OK) return size; + if (status == SD_OK) return size; - rt_kprintf("write failed: %d, buffer 0x%08x\n", status, buffer); - return 0; + rt_kprintf("write failed: %d, buffer 0x%08x\n", status, buffer); + return 0; } static rt_err_t rt_sdcard_control(rt_device_t dev, int cmd, void *args) @@ -2686,89 +2686,89 @@ static rt_err_t rt_sdcard_control(rt_device_t dev, int cmd, void *args) geometry->bytes_per_sector = 512; geometry->block_size = SDCardInfo.CardBlockSize; - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - geometry->sector_count = (SDCardInfo.SD_csd.DeviceSize + 1) * 1024; - else - geometry->sector_count = SDCardInfo.CardCapacity/SDCardInfo.CardBlockSize; + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + geometry->sector_count = (SDCardInfo.SD_csd.DeviceSize + 1) * 1024; + else + geometry->sector_count = SDCardInfo.CardCapacity/SDCardInfo.CardBlockSize; } - return RT_EOK; + return RT_EOK; } void rt_hw_sdcard_init() { NVIC_InitTypeDef NVIC_InitStructure; - if (SD_Init() == SD_OK) - { - SD_Error status; - rt_uint8_t *sector; + if (SD_Init() == SD_OK) + { + SD_Error status; + rt_uint8_t *sector; - /*status = SD_GetCardInfo(&SDCardInfo); - if (status != SD_OK) goto __return; + /*status = SD_GetCardInfo(&SDCardInfo); + if (status != SD_OK) goto __return; - status = SD_SelectDeselect((u32) (SDCardInfo.RCA << 16)); - if (status != SD_OK) goto __return; + status = SD_SelectDeselect((u32) (SDCardInfo.RCA << 16)); + if (status != SD_OK) goto __return; - SD_EnableWideBusOperation(SDIO_BusWide_4b); - SD_SetDeviceMode(SD_DMA_MODE); */ + SD_EnableWideBusOperation(SDIO_BusWide_4b); + SD_SetDeviceMode(SD_DMA_MODE); */ - // SDIO Interrupt ENABLE - NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); + // SDIO Interrupt ENABLE + NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); - /* get the first sector to read partition table */ - sector = (rt_uint8_t*) rt_malloc (512); - if (sector == RT_NULL) - { - rt_kprintf("allocate partition sector buffer failed\n"); - return; - } - status = SD_ReadBlock(0, (uint8_t*)sector, 512); - status = SD_WaitReadOperation(); + /* get the first sector to read partition table */ + sector = (rt_uint8_t*) rt_malloc (512); + if (sector == RT_NULL) + { + rt_kprintf("allocate partition sector buffer failed\n"); + return; + } + status = SD_ReadBlock(0, (uint8_t*)sector, 512); + status = SD_WaitReadOperation(); while(SD_GetStatus() != SD_TRANSFER_OK); - if (status == SD_OK) - { - /* get the first partition */ - if (dfs_filesystem_get_partition(&part, sector, 0) != 0) + if (status == SD_OK) + { + /* get the first partition */ + if (dfs_filesystem_get_partition(&part, sector, 0) != 0) { /* there is no partition */ part.offset = 0; part.size = 0; } - } - else - { - /* there is no partition table */ - part.offset = 0; - part.size = 0; - } + } + else + { + /* there is no partition table */ + part.offset = 0; + part.size = 0; + } - /* release sector buffer */ - rt_free(sector); + /* release sector buffer */ + rt_free(sector); - /* register sdcard device */ - sdcard_device.type = RT_Device_Class_Block; - sdcard_device.init = rt_sdcard_init; - sdcard_device.open = rt_sdcard_open; - sdcard_device.close = rt_sdcard_close; - sdcard_device.read = rt_sdcard_read; - sdcard_device.write = rt_sdcard_write; - sdcard_device.control = rt_sdcard_control; + /* register sdcard device */ + sdcard_device.type = RT_Device_Class_Block; + sdcard_device.init = rt_sdcard_init; + sdcard_device.open = rt_sdcard_open; + sdcard_device.close = rt_sdcard_close; + sdcard_device.read = rt_sdcard_read; + sdcard_device.write = rt_sdcard_write; + sdcard_device.control = rt_sdcard_control; - /* no private */ - sdcard_device.user_data = &SDCardInfo; + /* no private */ + sdcard_device.user_data = &SDCardInfo; - rt_device_register(&sdcard_device, "sd0", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE); + rt_device_register(&sdcard_device, "sd0", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE); - return; - } + return; + } __return: - rt_kprintf("sdcard init failed\n"); + rt_kprintf("sdcard init failed\n"); } diff --git a/bsp/stm32f20x/Drivers/sdio_sd.h b/bsp/stm32f20x/Drivers/sdio_sd.h index c4ee35eb07..6a732a5e52 100644 --- a/bsp/stm32f20x/Drivers/sdio_sd.h +++ b/bsp/stm32f20x/Drivers/sdio_sd.h @@ -4,7 +4,7 @@ * @author MCD Application Team * @version V4.6.1 * @date 18-April-2011 - * @brief This file contains all the functions prototypes for the SD Card + * @brief This file contains all the functions prototypes for the SD Card * stm32_eval_sdio_sd driver firmware library. ****************************************************************************** * @attention @@ -17,8 +17,8 @@ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ + ****************************************************************************** + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32_EVAL_SDIO_SD_H @@ -34,27 +34,27 @@ /** @addtogroup Utilities * @{ */ - + /** @addtogroup STM32_EVAL * @{ - */ + */ /** @addtogroup Common * @{ */ - + /** @addtogroup STM32_EVAL_SDIO_SD * @{ - */ + */ /** @defgroup STM32_EVAL_SDIO_SD_Exported_Types * @{ - */ + */ typedef enum { -/** - * @brief SDIO specific error defines - */ +/** + * @brief SDIO specific error defines + */ SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */ SD_DATA_CRC_FAIL = (2), /*!< Data bock sent/received (CRC check Failed) */ SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */ @@ -89,23 +89,23 @@ typedef enum SD_SDIO_FUNCTION_FAILED = (32), SD_SDIO_UNKNOWN_FUNCTION = (33), -/** - * @brief Standard error defines - */ - SD_INTERNAL_ERROR, +/** + * @brief Standard error defines + */ + SD_INTERNAL_ERROR, SD_NOT_CONFIGURED, - SD_REQUEST_PENDING, - SD_REQUEST_NOT_APPLICABLE, - SD_INVALID_PARAMETER, - SD_UNSUPPORTED_FEATURE, - SD_UNSUPPORTED_HW, - SD_ERROR, - SD_OK = 0 + SD_REQUEST_PENDING, + SD_REQUEST_NOT_APPLICABLE, + SD_INVALID_PARAMETER, + SD_UNSUPPORTED_FEATURE, + SD_UNSUPPORTED_HW, + SD_ERROR, + SD_OK = 0 } SD_Error; -/** - * @brief SDIO Transfer state - */ +/** + * @brief SDIO Transfer state + */ typedef enum { SD_TRANSFER_OK = 0, @@ -113,9 +113,9 @@ typedef enum SD_TRANSFER_ERROR } SDTransferState; -/** - * @brief SD Card States - */ +/** + * @brief SD Card States + */ typedef enum { SD_CARD_READY = ((uint32_t)0x00000001), @@ -130,9 +130,9 @@ typedef enum }SDCardState; -/** - * @brief Card Specific Data: CSD Register - */ +/** + * @brief Card Specific Data: CSD Register + */ typedef struct { __IO uint8_t CSDStruct; /*!< CSD structure */ @@ -174,8 +174,8 @@ typedef struct __IO uint8_t Reserved4; /*!< always 1*/ } SD_CSD; -/** - * @brief Card Identification Data: CID Register +/** + * @brief Card Identification Data: CID Register */ typedef struct { @@ -191,8 +191,8 @@ typedef struct __IO uint8_t Reserved2; /*!< always 1 */ } SD_CID; -/** - * @brief SD Card Status +/** + * @brief SD Card Status */ typedef struct { @@ -209,8 +209,8 @@ typedef struct } SD_CardStatus; -/** - * @brief SD Card information +/** + * @brief SD Card information */ typedef struct { @@ -225,13 +225,13 @@ typedef struct /** * @} */ - + /** @defgroup STM32_EVAL_SDIO_SD_Exported_Constants * @{ - */ + */ -/** - * @brief SDIO Commands Index +/** + * @brief SDIO Commands Index */ #define SD_CMD_GO_IDLE_STATE ((uint8_t)0) #define SD_CMD_SEND_OP_COND ((uint8_t)1) @@ -280,9 +280,9 @@ typedef struct #define SD_CMD_GEN_CMD ((uint8_t)56) #define SD_CMD_NO_CMD ((uint8_t)64) -/** +/** * @brief Following commands are SD Card Specific commands. - * SDIO_APP_CMD should be sent before sending these commands. + * SDIO_APP_CMD should be sent before sending these commands. */ #define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< For SD Card only */ #define SD_CMD_SD_APP_STAUS ((uint8_t)13) /*!< For SD Card only */ @@ -293,9 +293,9 @@ typedef struct #define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O Card only */ #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O Card only */ -/** +/** * @brief Following commands are SD Card Specific security commands. - * SDIO_APP_CMD should be sent before sending these commands. + * SDIO_APP_CMD should be sent before sending these commands. */ #define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD Card only */ #define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD Card only */ @@ -308,8 +308,8 @@ typedef struct #define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD Card only */ #define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD Card only */ #define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD Card only */ - -/* Uncomment the following line to select the SDIO Data transfer mode */ + +/* Uncomment the following line to select the SDIO Data transfer mode */ #define SD_DMA_MODE ((uint32_t)0x00000000) /*#define SD_POLLING_MODE ((uint32_t)0x00000002)*/ @@ -319,8 +319,8 @@ typedef struct #define SD_PRESENT ((uint8_t)0x01) #define SD_NOT_PRESENT ((uint8_t)0x00) -/** - * @brief Supported SD Memory Cards +/** + * @brief Supported SD Memory Cards */ #define SDIO_STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000) #define SDIO_STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001) @@ -333,18 +333,18 @@ typedef struct /** * @} - */ - + */ + /** @defgroup STM32_EVAL_SDIO_SD_Exported_Macros * @{ - */ + */ /** * @} - */ + */ /** @defgroup STM32_EVAL_SDIO_SD_Exported_Functions * @{ - */ + */ void SD_DeInit(void); SD_Error SD_Init(void); SDTransferState SD_GetStatus(void); @@ -388,10 +388,10 @@ SD_Error SD_WaitWriteOperation(void); /** * @} - */ + */ /** * @} - */ + */ /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32f20x/Drivers/serial.c b/bsp/stm32f20x/Drivers/serial.c index 4ccc041689..cafde1a3e1 100644 --- a/bsp/stm32f20x/Drivers/serial.c +++ b/bsp/stm32f20x/Drivers/serial.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,7 +16,7 @@ #include static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, - rt_uint32_t address, rt_uint32_t size); + rt_uint32_t address, rt_uint32_t size); /** * @addtogroup STM32 @@ -26,252 +26,252 @@ static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, /* RT-Thread Device Interface */ static rt_err_t rt_serial_init (rt_device_t dev) { - struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data; + struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data; - if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) - { - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - rt_memset(uart->int_rx->rx_buffer, 0, - sizeof(uart->int_rx->rx_buffer)); - uart->int_rx->read_index = 0; - uart->int_rx->save_index = 0; - } + if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) + { + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + rt_memset(uart->int_rx->rx_buffer, 0, + sizeof(uart->int_rx->rx_buffer)); + uart->int_rx->read_index = 0; + uart->int_rx->save_index = 0; + } - if (dev->flag & RT_DEVICE_FLAG_DMA_TX) - { - RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL); - uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL; + if (dev->flag & RT_DEVICE_FLAG_DMA_TX) + { + RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL); + uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL; - /* init data node memory pool */ - rt_mp_init(&(uart->dma_tx->data_node_mp), "dn", - uart->dma_tx->data_node_mem_pool, - sizeof(uart->dma_tx->data_node_mem_pool), - sizeof(struct stm32_serial_data_node)); - } + /* init data node memory pool */ + rt_mp_init(&(uart->dma_tx->data_node_mp), "dn", + uart->dma_tx->data_node_mem_pool, + sizeof(uart->dma_tx->data_node_mem_pool), + sizeof(struct stm32_serial_data_node)); + } - /* Enable USART */ - USART_Cmd(uart->uart_device, ENABLE); + /* Enable USART */ + USART_Cmd(uart->uart_device, ENABLE); - dev->flag |= RT_DEVICE_FLAG_ACTIVATED; - } + dev->flag |= RT_DEVICE_FLAG_ACTIVATED; + } - return RT_EOK; + return RT_EOK; } static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag) { - return RT_EOK; + return RT_EOK; } static rt_err_t rt_serial_close(rt_device_t dev) { - return RT_EOK; + return RT_EOK; } static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) { - rt_uint8_t* ptr; - rt_err_t err_code; - struct stm32_serial_device* uart; + rt_uint8_t* ptr; + rt_err_t err_code; + struct stm32_serial_device* uart; - ptr = buffer; - err_code = RT_EOK; - uart = (struct stm32_serial_device*)dev->user_data; + ptr = buffer; + err_code = RT_EOK; + uart = (struct stm32_serial_device*)dev->user_data; - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - /* interrupt mode Rx */ - while (size) - { - rt_base_t level; + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* interrupt mode Rx */ + while (size) + { + rt_base_t level; - /* disable interrupt */ - level = rt_hw_interrupt_disable(); + /* disable interrupt */ + level = rt_hw_interrupt_disable(); - if (uart->int_rx->read_index != uart->int_rx->save_index) - { - /* read a character */ - *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index]; - size--; + if (uart->int_rx->read_index != uart->int_rx->save_index) + { + /* read a character */ + *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index]; + size--; - /* move to next position */ - uart->int_rx->read_index ++; - if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->read_index = 0; - } - else - { - /* set error code */ - err_code = -RT_EEMPTY; + /* move to next position */ + uart->int_rx->read_index ++; + if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) + uart->int_rx->read_index = 0; + } + else + { + /* set error code */ + err_code = -RT_EEMPTY; - /* enable interrupt */ - rt_hw_interrupt_enable(level); - break; - } + /* enable interrupt */ + rt_hw_interrupt_enable(level); + break; + } - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - } - else - { - /* polling mode */ - while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) - { - while (uart->uart_device->SR & USART_FLAG_RXNE) - { - *ptr = uart->uart_device->DR & 0xff; - ptr ++; - } - } - } + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + } + else + { + /* polling mode */ + while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) + { + while (uart->uart_device->SR & USART_FLAG_RXNE) + { + *ptr = uart->uart_device->DR & 0xff; + ptr ++; + } + } + } - /* set error code */ - rt_set_errno(err_code); - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; + /* set error code */ + rt_set_errno(err_code); + return (rt_uint32_t)ptr - (rt_uint32_t)buffer; } static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, - rt_uint32_t address, rt_uint32_t size) + rt_uint32_t address, rt_uint32_t size) { - RT_ASSERT(dma_channel != RT_NULL); + RT_ASSERT(dma_channel != RT_NULL); - /* disable DMA */ - DMA_Cmd(dma_channel, DISABLE); + /* disable DMA */ + DMA_Cmd(dma_channel, DISABLE); - /* set buffer address */ - dma_channel->M0AR = address; - /* set size */ - dma_channel->NDTR = size; + /* set buffer address */ + dma_channel->M0AR = address; + /* set size */ + dma_channel->NDTR = size; - /* enable DMA */ - DMA_Cmd(dma_channel, ENABLE); + /* enable DMA */ + DMA_Cmd(dma_channel, ENABLE); } static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) { - rt_uint8_t* ptr; - rt_err_t err_code; - struct stm32_serial_device* uart; + rt_uint8_t* ptr; + rt_err_t err_code; + struct stm32_serial_device* uart; - err_code = RT_EOK; - ptr = (rt_uint8_t*)buffer; - uart = (struct stm32_serial_device*)dev->user_data; + err_code = RT_EOK; + ptr = (rt_uint8_t*)buffer; + uart = (struct stm32_serial_device*)dev->user_data; - if (dev->flag & RT_DEVICE_FLAG_INT_TX) - { - /* interrupt mode Tx, does not support */ - RT_ASSERT(0); - } - else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) - { - /* DMA mode Tx */ + if (dev->flag & RT_DEVICE_FLAG_INT_TX) + { + /* interrupt mode Tx, does not support */ + RT_ASSERT(0); + } + else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) + { + /* DMA mode Tx */ - /* allocate a data node */ - struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*) - rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER); - if (data_node == RT_NULL) - { - /* set error code */ - err_code = -RT_ENOMEM; - } - else - { - rt_uint32_t level; + /* allocate a data node */ + struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*) + rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER); + if (data_node == RT_NULL) + { + /* set error code */ + err_code = -RT_ENOMEM; + } + else + { + rt_uint32_t level; - /* fill data node */ - data_node->data_ptr = ptr; - data_node->data_size = size; + /* fill data node */ + data_node->data_ptr = ptr; + data_node->data_size = size; - /* insert to data link */ - data_node->next = RT_NULL; + /* insert to data link */ + data_node->next = RT_NULL; - /* disable interrupt */ - level = rt_hw_interrupt_disable(); + /* disable interrupt */ + level = rt_hw_interrupt_disable(); - data_node->prev = uart->dma_tx->list_tail; - if (uart->dma_tx->list_tail != RT_NULL) - uart->dma_tx->list_tail->next = data_node; - uart->dma_tx->list_tail = data_node; + data_node->prev = uart->dma_tx->list_tail; + if (uart->dma_tx->list_tail != RT_NULL) + uart->dma_tx->list_tail->next = data_node; + uart->dma_tx->list_tail = data_node; - if (uart->dma_tx->list_head == RT_NULL) - { - /* start DMA to transmit data */ - uart->dma_tx->list_head = data_node; + if (uart->dma_tx->list_head == RT_NULL) + { + /* start DMA to transmit data */ + uart->dma_tx->list_head = data_node; - /* Enable DMA Channel */ - rt_serial_enable_dma(uart->dma_tx->dma_channel, - (rt_uint32_t)uart->dma_tx->list_head->data_ptr, - uart->dma_tx->list_head->data_size); - } + /* Enable DMA Channel */ + rt_serial_enable_dma(uart->dma_tx->dma_channel, + (rt_uint32_t)uart->dma_tx->list_head->data_ptr, + uart->dma_tx->list_head->data_size); + } - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - } - else - { - /* polling mode */ - if (dev->flag & RT_DEVICE_FLAG_STREAM) - { - /* stream mode */ - while (size) - { - if (*ptr == '\n') - { - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = '\r'; - } + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + } + else + { + /* polling mode */ + if (dev->flag & RT_DEVICE_FLAG_STREAM) + { + /* stream mode */ + while (size) + { + if (*ptr == '\n') + { + while (!(uart->uart_device->SR & USART_FLAG_TXE)); + uart->uart_device->DR = '\r'; + } - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = (*ptr & 0x1FF); + while (!(uart->uart_device->SR & USART_FLAG_TXE)); + uart->uart_device->DR = (*ptr & 0x1FF); - ++ptr; --size; - } - } - else - { - /* write data directly */ - while (size) - { - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = (*ptr & 0x1FF); + ++ptr; --size; + } + } + else + { + /* write data directly */ + while (size) + { + while (!(uart->uart_device->SR & USART_FLAG_TXE)); + uart->uart_device->DR = (*ptr & 0x1FF); - ++ptr; --size; - } - } - } + ++ptr; --size; + } + } + } - /* set error code */ - rt_set_errno(err_code); + /* set error code */ + rt_set_errno(err_code); - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; + return (rt_uint32_t)ptr - (rt_uint32_t)buffer; } static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args) { - struct stm32_serial_device* uart; + struct stm32_serial_device* uart; - RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev != RT_NULL); - uart = (struct stm32_serial_device*)dev->user_data; - switch (cmd) - { - case RT_DEVICE_CTRL_SUSPEND: - /* suspend device */ - dev->flag |= RT_DEVICE_FLAG_SUSPENDED; - USART_Cmd(uart->uart_device, DISABLE); - break; + uart = (struct stm32_serial_device*)dev->user_data; + switch (cmd) + { + case RT_DEVICE_CTRL_SUSPEND: + /* suspend device */ + dev->flag |= RT_DEVICE_FLAG_SUSPENDED; + USART_Cmd(uart->uart_device, DISABLE); + break; - case RT_DEVICE_CTRL_RESUME: - /* resume device */ - dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; - USART_Cmd(uart->uart_device, ENABLE); - break; - } + case RT_DEVICE_CTRL_RESUME: + /* resume device */ + dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; + USART_Cmd(uart->uart_device, ENABLE); + break; + } - return RT_EOK; + return RT_EOK; } /* @@ -280,87 +280,87 @@ static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args) */ rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial) { - RT_ASSERT(device != RT_NULL); + RT_ASSERT(device != RT_NULL); - if ((flag & RT_DEVICE_FLAG_DMA_RX) || - (flag & RT_DEVICE_FLAG_INT_TX)) - { - RT_ASSERT(0); - } + if ((flag & RT_DEVICE_FLAG_DMA_RX) || + (flag & RT_DEVICE_FLAG_INT_TX)) + { + RT_ASSERT(0); + } - device->type = RT_Device_Class_Char; - device->rx_indicate = RT_NULL; - device->tx_complete = RT_NULL; - device->init = rt_serial_init; - device->open = rt_serial_open; - device->close = rt_serial_close; - device->read = rt_serial_read; - device->write = rt_serial_write; - device->control = rt_serial_control; - device->user_data = serial; + device->type = RT_Device_Class_Char; + device->rx_indicate = RT_NULL; + device->tx_complete = RT_NULL; + device->init = rt_serial_init; + device->open = rt_serial_open; + device->close = rt_serial_close; + device->read = rt_serial_read; + device->write = rt_serial_write; + device->control = rt_serial_control; + device->user_data = serial; - /* register a character device */ - return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); + /* register a character device */ + return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); } /* ISR for serial interrupt */ void rt_hw_serial_isr(rt_device_t device) { - struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; + struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; - if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) - { - /* interrupt mode receive */ - RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX); + if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + { + /* interrupt mode receive */ + RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX); - /* save on rx buffer */ - while (uart->uart_device->SR & USART_FLAG_RXNE) - { - rt_base_t level; + /* save on rx buffer */ + while (uart->uart_device->SR & USART_FLAG_RXNE) + { + rt_base_t level; - /* disable interrupt */ - level = rt_hw_interrupt_disable(); + /* disable interrupt */ + level = rt_hw_interrupt_disable(); - /* save character */ - uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff; - uart->int_rx->save_index ++; - if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->save_index = 0; + /* save character */ + uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff; + uart->int_rx->save_index ++; + if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE) + uart->int_rx->save_index = 0; - /* if the next position is read index, discard this 'read char' */ - if (uart->int_rx->save_index == uart->int_rx->read_index) - { - uart->int_rx->read_index ++; - if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->read_index = 0; - } + /* if the next position is read index, discard this 'read char' */ + if (uart->int_rx->save_index == uart->int_rx->read_index) + { + uart->int_rx->read_index ++; + if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) + uart->int_rx->read_index = 0; + } - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); - /* invoke callback */ - if (device->rx_indicate != RT_NULL) - { - rt_size_t rx_length; + /* invoke callback */ + if (device->rx_indicate != RT_NULL) + { + rt_size_t rx_length; - /* get rx length */ - rx_length = uart->int_rx->read_index > uart->int_rx->save_index ? - UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index : - uart->int_rx->save_index - uart->int_rx->read_index; + /* get rx length */ + rx_length = uart->int_rx->read_index > uart->int_rx->save_index ? + UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index : + uart->int_rx->save_index - uart->int_rx->read_index; - device->rx_indicate(device, rx_length); - } - } + device->rx_indicate(device, rx_length); + } + } - if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) - { - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); - } + if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) + { + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); + } } /* @@ -368,47 +368,47 @@ void rt_hw_serial_isr(rt_device_t device) */ void rt_hw_serial_dma_tx_isr(rt_device_t device) { - rt_uint32_t level; - struct stm32_serial_data_node* data_node; - struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; + rt_uint32_t level; + struct stm32_serial_data_node* data_node; + struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; - /* DMA mode receive */ - RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX); + /* DMA mode receive */ + RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX); - /* get the first data node */ - data_node = uart->dma_tx->list_head; - RT_ASSERT(data_node != RT_NULL); + /* get the first data node */ + data_node = uart->dma_tx->list_head; + RT_ASSERT(data_node != RT_NULL); - /* invoke call to notify tx complete */ - if (device->tx_complete != RT_NULL) - device->tx_complete(device, data_node->data_ptr); + /* invoke call to notify tx complete */ + if (device->tx_complete != RT_NULL) + device->tx_complete(device, data_node->data_ptr); - /* disable interrupt */ - level = rt_hw_interrupt_disable(); + /* disable interrupt */ + level = rt_hw_interrupt_disable(); - /* remove list head */ - uart->dma_tx->list_head = data_node->next; - if (uart->dma_tx->list_head == RT_NULL) /* data link empty */ - uart->dma_tx->list_tail = RT_NULL; + /* remove list head */ + uart->dma_tx->list_head = data_node->next; + if (uart->dma_tx->list_head == RT_NULL) /* data link empty */ + uart->dma_tx->list_tail = RT_NULL; - /* enable interrupt */ - rt_hw_interrupt_enable(level); + /* enable interrupt */ + rt_hw_interrupt_enable(level); - /* release data node memory */ - rt_mp_free(data_node); + /* release data node memory */ + rt_mp_free(data_node); - if (uart->dma_tx->list_head != RT_NULL) - { - /* transmit next data node */ - rt_serial_enable_dma(uart->dma_tx->dma_channel, - (rt_uint32_t)uart->dma_tx->list_head->data_ptr, - uart->dma_tx->list_head->data_size); - } - else - { - /* no data to be transmitted, disable DMA */ - DMA_Cmd(uart->dma_tx->dma_channel, DISABLE); - } + if (uart->dma_tx->list_head != RT_NULL) + { + /* transmit next data node */ + rt_serial_enable_dma(uart->dma_tx->dma_channel, + (rt_uint32_t)uart->dma_tx->list_head->data_ptr, + uart->dma_tx->list_head->data_size); + } + else + { + /* no data to be transmitted, disable DMA */ + DMA_Cmd(uart->dma_tx->dma_channel, DISABLE); + } } /*@}*/ diff --git a/bsp/stm32f20x/Drivers/serial.h b/bsp/stm32f20x/Drivers/serial.h index 8ab56b4839..4df341a0e3 100644 --- a/bsp/stm32f20x/Drivers/serial.h +++ b/bsp/stm32f20x/Drivers/serial.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -17,45 +17,45 @@ /* STM32F10x library definitions */ #include -#define UART_RX_BUFFER_SIZE 64 -#define UART_TX_DMA_NODE_SIZE 4 +#define UART_RX_BUFFER_SIZE 64 +#define UART_TX_DMA_NODE_SIZE 4 /* data node for Tx Mode */ struct stm32_serial_data_node { - rt_uint8_t *data_ptr; - rt_size_t data_size; - struct stm32_serial_data_node *next, *prev; + rt_uint8_t *data_ptr; + rt_size_t data_size; + struct stm32_serial_data_node *next, *prev; }; struct stm32_serial_dma_tx { - /* DMA Channel */ - DMA_Stream_TypeDef* dma_channel; + /* DMA Channel */ + DMA_Stream_TypeDef* dma_channel; - /* data list head and tail */ - struct stm32_serial_data_node *list_head, *list_tail; + /* data list head and tail */ + struct stm32_serial_data_node *list_head, *list_tail; - /* data node memory pool */ - struct rt_mempool data_node_mp; - rt_uint8_t data_node_mem_pool[UART_TX_DMA_NODE_SIZE * - (sizeof(struct stm32_serial_data_node) + sizeof(void*))]; + /* data node memory pool */ + struct rt_mempool data_node_mp; + rt_uint8_t data_node_mem_pool[UART_TX_DMA_NODE_SIZE * + (sizeof(struct stm32_serial_data_node) + sizeof(void*))]; }; struct stm32_serial_int_rx { - rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE]; - rt_uint32_t read_index, save_index; + rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE]; + rt_uint32_t read_index, save_index; }; struct stm32_serial_device { - USART_TypeDef* uart_device; + USART_TypeDef* uart_device; - /* rx structure */ - struct stm32_serial_int_rx* int_rx; + /* rx structure */ + struct stm32_serial_int_rx* int_rx; - /* tx structure */ - struct stm32_serial_dma_tx* dma_tx; + /* tx structure */ + struct stm32_serial_dma_tx* dma_tx; }; rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial); diff --git a/bsp/stm32f20x/Drivers/stm32f2_eth.c b/bsp/stm32f20x/Drivers/stm32f2_eth.c index 1876c5bcaa..c774e16ed2 100644 --- a/bsp/stm32f20x/Drivers/stm32f2_eth.c +++ b/bsp/stm32f20x/Drivers/stm32f2_eth.c @@ -10,14 +10,14 @@ #include "stm32f2x7_eth.h" #include "stm32f2x7_eth_conf.h" -#define STM32_ETH_DEBUG 0 +#define STM32_ETH_DEBUG 0 //#define CHECKSUM_BY_HARDWARE /* don't ues hardware checksum. */ /* MII and RMII mode selection, for STM322xG-EVAL Board(MB786) RevB ***********/ -//#define MII_MODE +//#define MII_MODE #define RMII_MODE // In this case the System clock frequency is configured - // to 100 MHz, for more details refer to system_stm32f2xx.c + // to 100 MHz, for more details refer to system_stm32f2xx.c #define DP83848_PHY_ADDRESS 0x01 /* Relative to STM322xG-EVAL Board */ @@ -27,10 +27,10 @@ extern ETH_DMADESCTypeDef DMARxDscrTab[ETH_RXBUFNB], DMATxDscrTab[ETH_TXBUFNB]; /* Ethernet Receive buffers */ -extern uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE]; +extern uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE]; /* Ethernet Transmit buffers */ -extern uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE]; +extern uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE]; /* Global pointers to track current transmit and receive descriptors */ extern ETH_DMADESCTypeDef *DMATxDescToSet; @@ -42,11 +42,11 @@ extern ETH_DMA_Rx_Frame_infos *DMA_RX_FRAME_infos; #define MAX_ADDR_LEN 6 struct rt_stm32_eth { - /* inherit from ethernet device */ - struct eth_device parent; + /* inherit from ethernet device */ + struct eth_device parent; - /* interface address info. */ - rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */ + /* interface address info. */ + rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */ }; static struct rt_stm32_eth stm32_eth_device; static struct rt_semaphore tx_wait; @@ -61,29 +61,29 @@ void ETH_IRQHandler(void) { rt_uint32_t status; - status = ETH->DMASR; + status = ETH->DMASR; - /* Frame received */ - if ( ETH_GetDMAFlagStatus(ETH_DMA_FLAG_R) == SET) - { - rt_err_t result; - //rt_kprintf("Frame comming\n"); - /* Clear the interrupt flags. */ - /* Clear the Eth DMA Rx IT pending bits */ - ETH_DMAClearITPendingBit(ETH_DMA_IT_R); + /* Frame received */ + if ( ETH_GetDMAFlagStatus(ETH_DMA_FLAG_R) == SET) + { + rt_err_t result; + //rt_kprintf("Frame comming\n"); + /* Clear the interrupt flags. */ + /* Clear the Eth DMA Rx IT pending bits */ + ETH_DMAClearITPendingBit(ETH_DMA_IT_R); - /* a frame has been received */ - result = eth_device_ready(&(stm32_eth_device.parent)); - if( result != RT_EOK ) rt_kprintf("RX err =%d\n", result ); - //RT_ASSERT(result == RT_EOK); - } - if (ETH_GetDMAITStatus(ETH_DMA_IT_T) == SET) /* packet transmission */ - { - ETH_DMAClearITPendingBit(ETH_DMA_IT_T); - } - - ETH_DMAClearITPendingBit(ETH_DMA_IT_NIS); -// + /* a frame has been received */ + result = eth_device_ready(&(stm32_eth_device.parent)); + if( result != RT_EOK ) rt_kprintf("RX err =%d\n", result ); + //RT_ASSERT(result == RT_EOK); + } + if (ETH_GetDMAITStatus(ETH_DMA_IT_T) == SET) /* packet transmission */ + { + ETH_DMAClearITPendingBit(ETH_DMA_IT_T); + } + + ETH_DMAClearITPendingBit(ETH_DMA_IT_NIS); +// } @@ -91,244 +91,244 @@ void ETH_IRQHandler(void) /* initialize the interface */ static rt_err_t rt_stm32_eth_init(rt_device_t dev) { - int i; + int i; - /* MAC address configuration */ - ETH_MACAddressConfig(ETH_MAC_Address0, (u8*)&stm32_eth_device.dev_addr[0]); - - /* Initialize Tx Descriptors list: Chain Mode */ - ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB); - /* Initialize Rx Descriptors list: Chain Mode */ - ETH_DMARxDescChainInit(DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB); + /* MAC address configuration */ + ETH_MACAddressConfig(ETH_MAC_Address0, (u8*)&stm32_eth_device.dev_addr[0]); - /* Enable Ethernet Rx interrrupt */ - { - for(i=0; iDMASR ); -// rt_kprintf("ETH Init\n"); + //rt_kprintf("DMASR = 0x%X\n", ETH->DMASR ); +// rt_kprintf("ETH Init\n"); return RT_EOK; } static rt_err_t rt_stm32_eth_open(rt_device_t dev, rt_uint16_t oflag) { - return RT_EOK; + return RT_EOK; } static rt_err_t rt_stm32_eth_close(rt_device_t dev) { - return RT_EOK; + return RT_EOK; } static rt_size_t rt_stm32_eth_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) { - rt_set_errno(-RT_ENOSYS); - return 0; + rt_set_errno(-RT_ENOSYS); + return 0; } static rt_size_t rt_stm32_eth_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) { - rt_set_errno(-RT_ENOSYS); - return 0; + rt_set_errno(-RT_ENOSYS); + return 0; } static rt_err_t rt_stm32_eth_control(rt_device_t dev, int cmd, void *args) { - switch(cmd) - { - case NIOCTL_GADDR: - /* get mac address */ - if(args) rt_memcpy(args, stm32_eth_device.dev_addr, 6); - else return -RT_ERROR; - break; + switch(cmd) + { + case NIOCTL_GADDR: + /* get mac address */ + if(args) rt_memcpy(args, stm32_eth_device.dev_addr, 6); + else return -RT_ERROR; + break; - default : - break; - } + default : + break; + } - return RT_EOK; + return RT_EOK; } void show_frame(struct pbuf *q) { - int i = 0; - int j = 0; - char *ptr = q->payload; + int i = 0; + int j = 0; + char *ptr = q->payload; - for( i = 0; i < q->len; i++ ) - rt_kprintf("0x%02X ", *(ptr++)); - rt_kprintf("\n"); + for( i = 0; i < q->len; i++ ) + rt_kprintf("0x%02X ", *(ptr++)); + rt_kprintf("\n"); } /* ethernet device interface */ /* transmit packet. */ rt_err_t rt_stm32_eth_tx( rt_device_t dev, struct pbuf* p) { - rt_err_t ret; - struct pbuf *q; - uint32_t l = 0; - u8 *buffer ; - - if (( ret = rt_sem_take(&tx_wait, netifGUARD_BLOCK_TIME) ) == RT_EOK) - { - buffer = (u8 *)(DMATxDescToSet->Buffer1Addr); - for(q = p; q != NULL; q = q->next) - { - //show_frame(q); - rt_memcpy((u8_t*)&buffer[l], q->payload, q->len); - l = l + q->len; - } - if( ETH_Prepare_Transmit_Descriptors(l) == ETH_ERROR ) - rt_kprintf("Tx Error\n"); - //rt_sem_release(xTxSemaphore); - rt_sem_release(&tx_wait); - //rt_kprintf("Tx packet, len = %d\n", l); - } - else - { - rt_kprintf("Tx Timeout\n"); - return ret; - } + rt_err_t ret; + struct pbuf *q; + uint32_t l = 0; + u8 *buffer ; - /* Return SUCCESS */ - return RT_EOK; + if (( ret = rt_sem_take(&tx_wait, netifGUARD_BLOCK_TIME) ) == RT_EOK) + { + buffer = (u8 *)(DMATxDescToSet->Buffer1Addr); + for(q = p; q != NULL; q = q->next) + { + //show_frame(q); + rt_memcpy((u8_t*)&buffer[l], q->payload, q->len); + l = l + q->len; + } + if( ETH_Prepare_Transmit_Descriptors(l) == ETH_ERROR ) + rt_kprintf("Tx Error\n"); + //rt_sem_release(xTxSemaphore); + rt_sem_release(&tx_wait); + //rt_kprintf("Tx packet, len = %d\n", l); + } + else + { + rt_kprintf("Tx Timeout\n"); + return ret; + } + + /* Return SUCCESS */ + return RT_EOK; } /* reception packet. */ struct pbuf *rt_stm32_eth_rx(rt_device_t dev) { - struct pbuf *p, *q; - u16_t len; - uint32_t l=0,i =0; - FrameTypeDef frame; - static framecnt = 1; - u8 *buffer; - __IO ETH_DMADESCTypeDef *DMARxNextDesc; - - p = RT_NULL; - -// rt_kprintf("ETH rx\n"); - /* Get received frame */ - frame = ETH_Get_Received_Frame_interrupt(); - - if( frame.length > 0 ) - { - /* check that frame has no error */ - if ((frame.descriptor->Status & ETH_DMARxDesc_ES) == (uint32_t)RESET) - { - //rt_kprintf("Get a frame %d buf = 0x%X, len= %d\n", framecnt++, frame.buffer, frame.length); - /* Obtain the size of the packet and put it into the "len" variable. */ - len = frame.length; - buffer = (u8 *)frame.buffer; - - /* We allocate a pbuf chain of pbufs from the pool. */ - p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL); - //p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM); + struct pbuf *p, *q; + u16_t len; + uint32_t l=0,i =0; + FrameTypeDef frame; + static framecnt = 1; + u8 *buffer; + __IO ETH_DMADESCTypeDef *DMARxNextDesc; - /* Copy received frame from ethernet driver buffer to stack buffer */ - if (p != NULL) - { - for (q = p; q != NULL; q = q->next) - { - rt_memcpy((u8_t*)q->payload, (u8_t*)&buffer[l], q->len); - l = l + q->len; - } - } - } - - /* Release descriptors to DMA */ - /* Check if received frame with multiple DMA buffer segments */ - if (DMA_RX_FRAME_infos->Seg_Count > 1) - { - DMARxNextDesc = DMA_RX_FRAME_infos->FS_Rx_Desc; - } - else - { - DMARxNextDesc = frame.descriptor; - } - - /* Set Own bit in Rx descriptors: gives the buffers back to DMA */ - for (i=0; iSeg_Count; i++) - { - DMARxNextDesc->Status = ETH_DMARxDesc_OWN; - DMARxNextDesc = (ETH_DMADESCTypeDef *)(DMARxNextDesc->Buffer2NextDescAddr); - } - - /* Clear Segment_Count */ - DMA_RX_FRAME_infos->Seg_Count =0; - - - /* When Rx Buffer unavailable flag is set: clear it and resume reception */ - if ((ETH->DMASR & ETH_DMASR_RBUS) != (u32)RESET) - { - /* Clear RBUS ETHERNET DMA flag */ - ETH->DMASR = ETH_DMASR_RBUS; - - /* Resume DMA reception */ - ETH->DMARPDR = 0; - } - } - return p; + p = RT_NULL; + +// rt_kprintf("ETH rx\n"); + /* Get received frame */ + frame = ETH_Get_Received_Frame_interrupt(); + + if( frame.length > 0 ) + { + /* check that frame has no error */ + if ((frame.descriptor->Status & ETH_DMARxDesc_ES) == (uint32_t)RESET) + { + //rt_kprintf("Get a frame %d buf = 0x%X, len= %d\n", framecnt++, frame.buffer, frame.length); + /* Obtain the size of the packet and put it into the "len" variable. */ + len = frame.length; + buffer = (u8 *)frame.buffer; + + /* We allocate a pbuf chain of pbufs from the pool. */ + p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL); + //p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM); + + /* Copy received frame from ethernet driver buffer to stack buffer */ + if (p != NULL) + { + for (q = p; q != NULL; q = q->next) + { + rt_memcpy((u8_t*)q->payload, (u8_t*)&buffer[l], q->len); + l = l + q->len; + } + } + } + + /* Release descriptors to DMA */ + /* Check if received frame with multiple DMA buffer segments */ + if (DMA_RX_FRAME_infos->Seg_Count > 1) + { + DMARxNextDesc = DMA_RX_FRAME_infos->FS_Rx_Desc; + } + else + { + DMARxNextDesc = frame.descriptor; + } + + /* Set Own bit in Rx descriptors: gives the buffers back to DMA */ + for (i=0; iSeg_Count; i++) + { + DMARxNextDesc->Status = ETH_DMARxDesc_OWN; + DMARxNextDesc = (ETH_DMADESCTypeDef *)(DMARxNextDesc->Buffer2NextDescAddr); + } + + /* Clear Segment_Count */ + DMA_RX_FRAME_infos->Seg_Count =0; + + + /* When Rx Buffer unavailable flag is set: clear it and resume reception */ + if ((ETH->DMASR & ETH_DMASR_RBUS) != (u32)RESET) + { + /* Clear RBUS ETHERNET DMA flag */ + ETH->DMASR = ETH_DMASR_RBUS; + + /* Resume DMA reception */ + ETH->DMARPDR = 0; + } + } + return p; } static void NVIC_Configuration(void) { - NVIC_InitTypeDef NVIC_InitStructure; - - /* 2 bit for pre-emption priority, 2 bits for subpriority */ - NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); - /* Enable the Ethernet global Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); + NVIC_InitTypeDef NVIC_InitStructure; + + /* 2 bit for pre-emption priority, 2 bits for subpriority */ + NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); + /* Enable the Ethernet global Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); } /* @@ -383,15 +383,15 @@ static void GPIO_Configuration(void) ETH_MII_TXD0/ETH_RMII_TXD0 -------> PB12 ETH_MII_TXD1/ETH_RMII_TXD1 -------> PB13 - **** Just for MII Mode **** - ETH_MII_CRS ----------------------> PA0 - ETH_MII_COL ----------------------> PA3 - ETH_MII_TX_CLK -------------------> PC3 - ETH_MII_RX_ER --------------------> PB10 - ETH_MII_RXD2 ---------------------> PB0 - ETH_MII_RXD3 ---------------------> PB1 - ETH_MII_TXD2 ---------------------> PC2 - ETH_MII_TXD3 ---------------------> PB8 + **** Just for MII Mode **** + ETH_MII_CRS ----------------------> PA0 + ETH_MII_COL ----------------------> PA3 + ETH_MII_TX_CLK -------------------> PC3 + ETH_MII_RX_ER --------------------> PB10 + ETH_MII_RXD2 ---------------------> PB0 + ETH_MII_RXD3 ---------------------> PB1 + ETH_MII_TXD2 ---------------------> PC2 + ETH_MII_TXD3 ---------------------> PB8 */ /* Configure PC1, PC4 and PC5 */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 |GPIO_Pin_4 | GPIO_Pin_5; @@ -450,7 +450,7 @@ static void ETH_MACDMA_Config(void) /* Enable ETHERNET clock */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_ETH_MAC | RCC_AHB1Periph_ETH_MAC_Tx | - RCC_AHB1Periph_ETH_MAC_Rx, ENABLE); + RCC_AHB1Periph_ETH_MAC_Rx, ENABLE); /* Reset ETHERNET on AHB Bus */ ETH_DeInit(); @@ -468,9 +468,9 @@ static void ETH_MACDMA_Config(void) /* Fill ETH_InitStructure parametrs */ /*------------------------ MAC -----------------------------------*/ ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable; - //ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Disable; + //ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Disable; // ETH_InitStructure.ETH_Speed = ETH_Speed_10M; - // ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex; + // ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex; ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable; ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable; @@ -484,95 +484,95 @@ static void ETH_MACDMA_Config(void) ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable; #endif - /*------------------------ DMA -----------------------------------*/ - - /* When we use the Checksum offload feature, we need to enable the Store and Forward mode: - the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum, + /*------------------------ DMA -----------------------------------*/ + + /* When we use the Checksum offload feature, we need to enable the Store and Forward mode: + the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum, if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */ - ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable; - ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable; - ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable; - - ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable; - ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable; + ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable; + ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable; + ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable; + + ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable; + ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable; ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable; - ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable; - ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable; - ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat; + ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable; + ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable; + ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat; ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat; ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1; /* Configure Ethernet */ if( ETH_Init(Ð_InitStructure, DP83848_PHY_ADDRESS) == ETH_ERROR ) - rt_kprintf("ETH init error, may be no link\n"); + rt_kprintf("ETH init error, may be no link\n"); /* Enable the Ethernet Rx Interrupt */ ETH_DMAITConfig(ETH_DMA_IT_NIS | ETH_DMA_IT_R , ENABLE); } -#define DevID_SNo0 (*((rt_uint32_t *)0x1FFF7A10)); -#define DevID_SNo1 (*((rt_uint32_t *)0x1FFF7A10+32)); +#define DevID_SNo0 (*((rt_uint32_t *)0x1FFF7A10)); +#define DevID_SNo1 (*((rt_uint32_t *)0x1FFF7A10+32)); #define DevID_SNo2 (*((rt_uint32_t *)0x1FFF7A10+64)); void rt_hw_stm32_eth_init(void) { - GPIO_Configuration(); - NVIC_Configuration(); - ETH_MACDMA_Config(); + GPIO_Configuration(); + NVIC_Configuration(); + ETH_MACDMA_Config(); stm32_eth_device.dev_addr[0] = 0x00; stm32_eth_device.dev_addr[1] = 0x60; stm32_eth_device.dev_addr[2] = 0x6e; - { - uint32_t cpu_id[3] = {0}; - cpu_id[2] = DevID_SNo2; cpu_id[1] = DevID_SNo1; cpu_id[0] = DevID_SNo0; - - // generate MAC addr from 96bit unique ID (only for test) - stm32_eth_device.dev_addr[3] = (uint8_t)((cpu_id[0]>>16)&0xFF); - stm32_eth_device.dev_addr[4] = (uint8_t)((cpu_id[0]>>8)&0xFF); - stm32_eth_device.dev_addr[5] = (uint8_t)(cpu_id[0]&0xFF); + { + uint32_t cpu_id[3] = {0}; + cpu_id[2] = DevID_SNo2; cpu_id[1] = DevID_SNo1; cpu_id[0] = DevID_SNo0; -// stm32_eth_device.dev_addr[3] = *(rt_uint8_t*)(0x1FFF7A10+7); -// stm32_eth_device.dev_addr[4] = *(rt_uint8_t*)(0x1FFF7A10+8); -// stm32_eth_device.dev_addr[5] = *(rt_uint8_t*)(0x1FFF7A10+9); - } + // generate MAC addr from 96bit unique ID (only for test) + stm32_eth_device.dev_addr[3] = (uint8_t)((cpu_id[0]>>16)&0xFF); + stm32_eth_device.dev_addr[4] = (uint8_t)((cpu_id[0]>>8)&0xFF); + stm32_eth_device.dev_addr[5] = (uint8_t)(cpu_id[0]&0xFF); - stm32_eth_device.parent.parent.init = rt_stm32_eth_init; - stm32_eth_device.parent.parent.open = rt_stm32_eth_open; - stm32_eth_device.parent.parent.close = rt_stm32_eth_close; - stm32_eth_device.parent.parent.read = rt_stm32_eth_read; - stm32_eth_device.parent.parent.write = rt_stm32_eth_write; - stm32_eth_device.parent.parent.control = rt_stm32_eth_control; - stm32_eth_device.parent.parent.user_data = RT_NULL; +// stm32_eth_device.dev_addr[3] = *(rt_uint8_t*)(0x1FFF7A10+7); +// stm32_eth_device.dev_addr[4] = *(rt_uint8_t*)(0x1FFF7A10+8); +// stm32_eth_device.dev_addr[5] = *(rt_uint8_t*)(0x1FFF7A10+9); + } - stm32_eth_device.parent.eth_rx = rt_stm32_eth_rx; - stm32_eth_device.parent.eth_tx = rt_stm32_eth_tx; + stm32_eth_device.parent.parent.init = rt_stm32_eth_init; + stm32_eth_device.parent.parent.open = rt_stm32_eth_open; + stm32_eth_device.parent.parent.close = rt_stm32_eth_close; + stm32_eth_device.parent.parent.read = rt_stm32_eth_read; + stm32_eth_device.parent.parent.write = rt_stm32_eth_write; + stm32_eth_device.parent.parent.control = rt_stm32_eth_control; + stm32_eth_device.parent.parent.user_data = RT_NULL; - /* init tx semaphore */ - rt_sem_init(&tx_wait, "tx_wait", 1, RT_IPC_FLAG_FIFO); + stm32_eth_device.parent.eth_rx = rt_stm32_eth_rx; + stm32_eth_device.parent.eth_tx = rt_stm32_eth_tx; - /* register eth device */ - eth_device_init(&(stm32_eth_device.parent), "e0"); + /* init tx semaphore */ + rt_sem_init(&tx_wait, "tx_wait", 1, RT_IPC_FLAG_FIFO); + + /* register eth device */ + eth_device_init(&(stm32_eth_device.parent), "e0"); } static char led = 0; void dp83483() { - uint16_t bsr,sts, bcr, phycr; + uint16_t bsr,sts, bcr, phycr; - bsr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_BSR); - sts = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_SR); - bcr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_BCR); - phycr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_CR); + bsr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_BSR); + sts = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_SR); + bcr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_BCR); + phycr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_CR); - rt_kprintf("BCR = 0x%X\tBSR = 0x%X\tPHY_STS = 0x%X\tPHY_CR = 0x%X\n", bcr,bsr,sts, phycr); + rt_kprintf("BCR = 0x%X\tBSR = 0x%X\tPHY_STS = 0x%X\tPHY_CR = 0x%X\n", bcr,bsr,sts, phycr); - rt_kprintf("PHY_FCSCR = 0x%X\n", ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_FCSCR ) ); - rt_kprintf("PHY_MISR = 0x%X\n", ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_MISR ) ); + rt_kprintf("PHY_FCSCR = 0x%X\n", ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_FCSCR ) ); + rt_kprintf("PHY_MISR = 0x%X\n", ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_MISR ) ); - rt_kprintf("DMASR = 0x%X\n", ETH->DMASR ); + rt_kprintf("DMASR = 0x%X\n", ETH->DMASR ); - //ETH_WritePHYRegister(DP83848_PHY_ADDRESS, PHY_LEDCR, (uint16_t)(0x38 | led)); - led = (led==7)?0:7; + //ETH_WritePHYRegister(DP83848_PHY_ADDRESS, PHY_LEDCR, (uint16_t)(0x38 | led)); + led = (led==7)?0:7; } #ifdef RT_USING_FINSH diff --git a/bsp/stm32f20x/Drivers/stm32f2xx_it.c b/bsp/stm32f20x/Drivers/stm32f2xx_it.c index 6126d7173d..3a482fa747 100644 --- a/bsp/stm32f20x/Drivers/stm32f2xx_it.c +++ b/bsp/stm32f20x/Drivers/stm32f2xx_it.c @@ -1,11 +1,11 @@ /** ****************************************************************************** - * @file Project/STM32F2xx_StdPeriph_Template/stm32f2xx_it.c + * @file Project/STM32F2xx_StdPeriph_Template/stm32f2xx_it.c * @author MCD Application Team * @version V1.0.0 * @date 18-April-2011 * @brief Main Interrupt Service Routines. - * This file provides template for all exceptions handler and + * This file provides template for all exceptions handler and * peripherals interrupt service routine. ****************************************************************************** * @attention @@ -19,7 +19,7 @@ * *

© COPYRIGHT 2011 STMicroelectronics

****************************************************************************** - */ + */ /* Includes ------------------------------------------------------------------*/ #include "stm32f2xx.h" @@ -126,7 +126,7 @@ void DebugMon_Handler(void) /** * @} - */ + */ #if defined(RT_USING_DFS) && STM32_USE_SDIO /******************************************************************************* @@ -145,7 +145,7 @@ void SDIO_IRQHandler(void) /* Process All SDIO Interrupt Sources */ if( SD_ProcessIRQSrc() == 2) - rt_kprintf("SD Error\n"); + rt_kprintf("SD Error\n"); /* leave interrupt */ rt_interrupt_leave(); diff --git a/bsp/stm32f20x/Drivers/usart.c b/bsp/stm32f20x/Drivers/usart.c index ff82ab9f8a..876b187940 100644 --- a/bsp/stm32f20x/Drivers/usart.c +++ b/bsp/stm32f20x/Drivers/usart.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -34,9 +34,9 @@ struct stm32_serial_int_rx uart1_int_rx; struct stm32_serial_device uart1 = { - USART1, - &uart1_int_rx, - RT_NULL + USART1, + &uart1_int_rx, + RT_NULL }; struct rt_device uart1_device; #endif @@ -45,9 +45,9 @@ struct rt_device uart1_device; struct stm32_serial_int_rx uart6_int_rx; struct stm32_serial_device uart6 = { - USART6, - &uart6_int_rx, - RT_NULL + USART6, + &uart6_int_rx, + RT_NULL }; struct rt_device uart6_device; #endif @@ -56,9 +56,9 @@ struct rt_device uart6_device; struct stm32_serial_int_rx uart2_int_rx; struct stm32_serial_device uart2 = { - USART2, - &uart2_int_rx, - RT_NULL + USART2, + &uart2_int_rx, + RT_NULL }; struct rt_device uart2_device; #endif @@ -68,9 +68,9 @@ struct stm32_serial_int_rx uart3_int_rx; struct stm32_serial_dma_tx uart3_dma_tx; struct stm32_serial_device uart3 = { - USART3, - &uart3_int_rx, - &uart3_dma_tx + USART3, + &uart3_int_rx, + &uart3_dma_tx }; struct rt_device uart3_device; #endif @@ -80,110 +80,110 @@ struct rt_device uart3_device; #define USART3_DR_Base 0x40004804 /* USART1_REMAP = 0 */ -#define UART1_GPIO_TX GPIO_Pin_9 -#define UART1_GPIO_RX GPIO_Pin_10 -#define UART1_GPIO GPIOA -#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 -#define UART1_TX_DMA DMA1_Channel4 -#define UART1_RX_DMA DMA1_Channel5 +#define UART1_GPIO_TX GPIO_Pin_9 +#define UART1_GPIO_RX GPIO_Pin_10 +#define UART1_GPIO GPIOA +#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 +#define UART1_TX_DMA DMA1_Channel4 +#define UART1_RX_DMA DMA1_Channel5 #if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL) -#define UART2_GPIO_TX GPIO_Pin_5 -#define UART2_GPIO_RX GPIO_Pin_6 -#define UART2_GPIO GPIOD -#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 +#define UART2_GPIO_TX GPIO_Pin_5 +#define UART2_GPIO_RX GPIO_Pin_6 +#define UART2_GPIO GPIOD +#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 #else /* for STM32F10X_HD */ /* USART2_REMAP = 0 */ -#define UART2_GPIO_TX GPIO_Pin_2 -#define UART2_GPIO_RX GPIO_Pin_3 -#define UART2_GPIO GPIOA -#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 -#define UART2_TX_DMA DMA1_Channel7 -#define UART2_RX_DMA DMA1_Channel6 +#define UART2_GPIO_TX GPIO_Pin_2 +#define UART2_GPIO_RX GPIO_Pin_3 +#define UART2_GPIO GPIOA +#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 +#define UART2_TX_DMA DMA1_Channel7 +#define UART2_RX_DMA DMA1_Channel6 #endif /* USART3_REMAP[1:0] = 00 */ -#define UART3_GPIO_RX GPIO_Pin_11 -#define UART3_GPIO_TX GPIO_Pin_10 -#define UART3_GPIO GPIOB -#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3 -#define UART3_TX_DMA DMA1_Channel2 -#define UART3_RX_DMA DMA1_Channel3 +#define UART3_GPIO_RX GPIO_Pin_11 +#define UART3_GPIO_TX GPIO_Pin_10 +#define UART3_GPIO GPIOB +#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3 +#define UART3_TX_DMA DMA1_Channel2 +#define UART3_RX_DMA DMA1_Channel3 /* USART6_REMAP = 0 */ -#define UART6_GPIO_TX GPIO_Pin_6 -#define UART6_GPIO_RX GPIO_Pin_7 -#define UART6_GPIO GPIOC -#define RCC_APBPeriph_UART6 RCC_APB2Periph_USART6 -//#define UART1_TX_DMA DMA1_Channel? -//#define UART1_RX_DMA DMA1_Channel? +#define UART6_GPIO_TX GPIO_Pin_6 +#define UART6_GPIO_RX GPIO_Pin_7 +#define UART6_GPIO GPIOC +#define RCC_APBPeriph_UART6 RCC_APB2Periph_USART6 +//#define UART1_TX_DMA DMA1_Channel? +//#define UART1_RX_DMA DMA1_Channel? static void RCC_Configuration(void) { #ifdef RT_USING_UART1 - /* Enable USART1 and GPIOA clocks */ - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); - RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); + /* Enable USART1 and GPIOA clocks */ + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); #endif #ifdef RT_USING_UART6 - /* Enable USART6 and GPIOC clocks */ - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); - RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART6, ENABLE); + /* Enable USART6 and GPIOC clocks */ + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART6, ENABLE); #endif } static void GPIO_Configuration(void) { - GPIO_InitTypeDef GPIO_InitStruct; + GPIO_InitTypeDef GPIO_InitStruct; #ifdef RT_USING_UART1 - GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF; - GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz; - GPIO_InitStruct.GPIO_OType=GPIO_OType_PP; - GPIO_InitStruct.GPIO_PuPd=GPIO_PuPd_UP; + GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF; + GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz; + GPIO_InitStruct.GPIO_OType=GPIO_OType_PP; + GPIO_InitStruct.GPIO_PuPd=GPIO_PuPd_UP; - GPIO_InitStruct.GPIO_Pin=GPIO_Pin_9|GPIO_Pin_10; - GPIO_Init(GPIOA,&GPIO_InitStruct); + GPIO_InitStruct.GPIO_Pin=GPIO_Pin_9|GPIO_Pin_10; + GPIO_Init(GPIOA,&GPIO_InitStruct); - GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1); - GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1); + GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1); + GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1); #endif #ifdef RT_USING_UART6 - GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF; - GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz; - GPIO_InitStruct.GPIO_OType=GPIO_OType_PP; - GPIO_InitStruct.GPIO_PuPd=GPIO_PuPd_UP; + GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF; + GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz; + GPIO_InitStruct.GPIO_OType=GPIO_OType_PP; + GPIO_InitStruct.GPIO_PuPd=GPIO_PuPd_UP; - GPIO_InitStruct.GPIO_Pin=UART6_GPIO_TX|UART6_GPIO_RX; - GPIO_Init(UART6_GPIO,&GPIO_InitStruct); + GPIO_InitStruct.GPIO_Pin=UART6_GPIO_TX|UART6_GPIO_RX; + GPIO_Init(UART6_GPIO,&GPIO_InitStruct); - GPIO_PinAFConfig(UART6_GPIO, GPIO_PinSource6, GPIO_AF_USART6); - GPIO_PinAFConfig(UART6_GPIO, GPIO_PinSource7, GPIO_AF_USART6); + GPIO_PinAFConfig(UART6_GPIO, GPIO_PinSource6, GPIO_AF_USART6); + GPIO_PinAFConfig(UART6_GPIO, GPIO_PinSource7, GPIO_AF_USART6); #endif } static void NVIC_Configuration(void) { - NVIC_InitTypeDef NVIC_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; #ifdef RT_USING_UART1 - /* Enable the USART1 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); + /* Enable the USART1 Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); #endif #ifdef RT_USING_UART6 - /* Enable the USART1 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART6_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); + /* Enable the USART1 Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = USART6_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); #endif } @@ -193,60 +193,60 @@ static void NVIC_Configuration(void) */ void rt_hw_usart_init() { - USART_InitTypeDef USART_InitStructure; + USART_InitTypeDef USART_InitStructure; - RCC_Configuration(); + RCC_Configuration(); - GPIO_Configuration(); + GPIO_Configuration(); - NVIC_Configuration(); + NVIC_Configuration(); - /* uart init */ + /* uart init */ #ifdef RT_USING_UART1 - USART_DeInit(USART1); - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No ; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_DeInit(USART1); + USART_InitStructure.USART_BaudRate = 115200; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No ; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART1, &USART_InitStructure); + USART_Init(USART1, &USART_InitStructure); - /* register uart1 */ - rt_hw_serial_register(&uart1_device, "uart1", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart1); + /* register uart1 */ + rt_hw_serial_register(&uart1_device, "uart1", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart1); - /* enable interrupt */ - USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); - /* Enable USART1 */ - USART_Cmd(USART1, ENABLE); - USART_ClearFlag(USART1,USART_FLAG_TXE); + /* enable interrupt */ + USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); + /* Enable USART1 */ + USART_Cmd(USART1, ENABLE); + USART_ClearFlag(USART1,USART_FLAG_TXE); #endif - /* uart init */ + /* uart init */ #ifdef RT_USING_UART6 - USART_DeInit(USART6); - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No ; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_DeInit(USART6); + USART_InitStructure.USART_BaudRate = 115200; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No ; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART6, &USART_InitStructure); + USART_Init(USART6, &USART_InitStructure); - /* register uart1 */ - rt_hw_serial_register(&uart6_device, "uart6", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart6); + /* register uart1 */ + rt_hw_serial_register(&uart6_device, "uart6", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart6); - /* enable interrupt */ - USART_ITConfig(USART6, USART_IT_RXNE, ENABLE); - /* Enable USART6 */ - USART_Cmd(USART6, ENABLE); - USART_ClearFlag(USART6,USART_FLAG_TXE); + /* enable interrupt */ + USART_ITConfig(USART6, USART_IT_RXNE, ENABLE); + /* Enable USART6 */ + USART_Cmd(USART6, ENABLE); + USART_ClearFlag(USART6,USART_FLAG_TXE); #endif } diff --git a/bsp/stm32f20x/Drivers/usart.h b/bsp/stm32f20x/Drivers/usart.h index 176c179e5b..76b64f96f8 100644 --- a/bsp/stm32f20x/Drivers/usart.h +++ b/bsp/stm32f20x/Drivers/usart.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32f20x/applications/application.c b/bsp/stm32f20x/applications/application.c index 4f37de7b30..04258d0ffd 100644 --- a/bsp/stm32f20x/applications/application.c +++ b/bsp/stm32f20x/applications/application.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32f20x/applications/startup.c b/bsp/stm32f20x/applications/startup.c index 92be9bd2ce..709a4bfb6d 100644 --- a/bsp/stm32f20x/applications/startup.c +++ b/bsp/stm32f20x/applications/startup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -42,11 +42,11 @@ extern int __bss_end; *******************************************************************************/ void assert_failed(u8* file, u32 line) { - rt_kprintf("\n\r Wrong parameter value detected on\r\n"); - rt_kprintf(" file %s\r\n", file); - rt_kprintf(" line %d\r\n", line); + rt_kprintf("\n\r Wrong parameter value detected on\r\n"); + rt_kprintf(" file %s\r\n", file); + rt_kprintf(" line %d\r\n", line); - while (1) ; + while (1) ; } #endif @@ -55,58 +55,58 @@ void assert_failed(u8* file, u32 line) */ void rtthread_startup(void) { - /* init board */ - rt_hw_board_init(); + /* init board */ + rt_hw_board_init(); - /* show version */ - rt_show_version(); + /* show version */ + rt_show_version(); - /* init timer system */ - rt_system_timer_init(); + /* init timer system */ + rt_system_timer_init(); #ifdef RT_USING_HEAP #if STM32_EXT_SRAM - rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END); + rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END); #else - #if defined(__CC_ARM) || defined(__CLANG_ARM) - rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END); - #elif __ICCARM__ - rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END); - #else - /* init memory system */ - rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END); - #endif + #if defined(__CC_ARM) || defined(__CLANG_ARM) + rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END); + #elif __ICCARM__ + rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END); + #else + /* init memory system */ + rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END); + #endif #endif #endif - /* init scheduler system */ - rt_system_scheduler_init(); + /* init scheduler system */ + rt_system_scheduler_init(); - /* init application */ - rt_application_init(); + /* init application */ + rt_application_init(); /* init timer thread */ rt_system_timer_thread_init(); - /* init idle thread */ - rt_thread_idle_init(); + /* init idle thread */ + rt_thread_idle_init(); - /* start scheduler */ - rt_system_scheduler_start(); + /* start scheduler */ + rt_system_scheduler_start(); - /* never reach here */ - return ; + /* never reach here */ + return ; } int main(void) { - /* disable interrupt first */ - rt_hw_interrupt_disable(); + /* disable interrupt first */ + rt_hw_interrupt_disable(); - /* startup RT-Thread RTOS */ - rtthread_startup(); + /* startup RT-Thread RTOS */ + rtthread_startup(); - return 0; + return 0; } /*@}*/ diff --git a/bsp/stm32f20x/project.ewp b/bsp/stm32f20x/project.ewp index 9bdc55d5c8..930a998d2b 100644 --- a/bsp/stm32f20x/project.ewp +++ b/bsp/stm32f20x/project.ewp @@ -145,10 +145,8 @@