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[bsp][stm32] add f0 config files

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This commit is contained in:
SummerGift 2018-12-26 10:13:55 +08:00
parent 864ae989c4
commit 663baf89cc
5 changed files with 241 additions and 0 deletions
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38
bsp/stm32/libraries/HAL_Drivers/config/f0/adc_config.h Normal file
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-24 zylx first version
*/
#ifndef __ADC_CONFIG_H__
#define __ADC_CONFIG_H__
#include <rtthread.h>
#ifdef BSP_USING_ADC1
#ifndef ADC1_CONFIG
#define ADC1_CONFIG \
{ \
.Instance = ADC1, \
.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1, \
.Init.Resolution = ADC_RESOLUTION_12B, \
.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD, \
.Init.EOCSelection = ADC_EOC_SINGLE_CONV, \
.Init.LowPowerAutoWait = DISABLE, \
.Init.LowPowerAutoPowerOff = DISABLE, \
.Init.ContinuousConvMode = DISABLE, \
.Init.DiscontinuousConvMode = ENABLE, \
.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE, \
.Init.DMAContinuousRequests = ENABLE, \
.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN, \
}
#endif /* ADC1_CONFIG */
#endif /* BSP_USING_ADC1 */
#endif /* __ADC_CONFIG_H__ */

60
bsp/stm32/libraries/HAL_Drivers/config/f0/pwm_config.h Normal file
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-24 zylx first version
*/
#ifndef __PWM_CONFIG_H__
#define __PWM_CONFIG_H__
#include <rtthread.h>
#ifdef BSP_USING_PWM2
#ifndef PWM2_CONFIG
#define PWM2_CONFIG \
{ \
.tim_handle.Instance = TIM2, \
.name = "pwm2", \
.channel = 0 \
}
#endif /* PWM2_CONFIG */
#endif /* BSP_USING_PWM2 */
#ifdef BSP_USING_PWM3
#ifndef PWM3_CONFIG
#define PWM3_CONFIG \
{ \
.tim_handle.Instance = TIM3, \
.name = "pwm3", \
.channel = 0 \
}
#endif /* PWM3_CONFIG */
#endif /* BSP_USING_PWM3 */
#ifdef BSP_USING_PWM4
#ifndef PWM4_CONFIG
#define PWM4_CONFIG \
{ \
.tim_handle.Instance = TIM4, \
.name = "pwm4", \
.channel = 0 \
}
#endif /* PWM4_CONFIG */
#endif /* BSP_USING_PWM4 */
#ifdef BSP_USING_PWM5
#ifndef PWM5_CONFIG
#define PWM5_CONFIG \
{ \
.tim_handle.Instance = TIM5, \
.name = "pwm5", \
.channel = 0 \
}
#endif /* PWM5_CONFIG */
#endif /* BSP_USING_PWM5 */
#endif /* __PWM_CONFIG_H__ */

36
bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h Normal file
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-06 SummerGift change to new framework
*/
#ifndef __SPI_CONFIG_H__
#define __SPI_CONFIG_H__
#include <rtthread.h>
#ifdef BSP_USING_SPI1
#define SPI1_BUS_CONFIG \
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.dma_rx.dma_rcc = RCC_AHBENR_DMA1EN, \
.dma_tx.dma_rcc = RCC_AHBENR_DMA1EN, \
.dma_rx.Instance = DMA1_Channel2, \
.dma_rx.dma_irq = DMA1_Ch2_3_DMA2_Ch1_2_IRQn, \
.dma_tx.Instance = DMA1_Channel3, \
.dma_tx.dma_irq = DMA1_Ch2_3_DMA2_Ch1_2_IRQn, \
}
#define SPI1_DMA_RX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#define SPI1_DMA_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#endif
#endif /*__SPI_CONFIG_H__ */

59
bsp/stm32/libraries/HAL_Drivers/config/f0/tim_config.h Normal file
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-24 zylx first version
*/
#ifndef __TIM_CONFIG_H__
#define __TIM_CONFIG_H__
#include <rtthread.h>
#ifndef TIM_DEV_INFO_CONFIG
#define TIM_DEV_INFO_CONFIG \
{ \
.maxfreq = 1000000, \
.minfreq = 2000, \
.maxcnt = 0xFFFF, \
.cntmode = HWTIMER_CNTMODE_UP, \
}
#endif /* TIM_DEV_INFO_CONFIG */
#ifdef BSP_USING_TIM14
#ifndef TIM14_CONFIG
#define TIM14_CONFIG \
{ \
.tim_handle.Instance = TIM14, \
.tim_irqn = TIM14_IRQn, \
.name = "timer14", \
}
#endif /* TIM14_CONFIG */
#endif /* BSP_USING_TIM14 */
#ifdef BSP_USING_TIM16
#ifndef TIM16_CONFIG
#define TIM16_CONFIG \
{ \
.tim_handle.Instance = TIM16, \
.tim_irqn = TIM16_IRQn, \
.name = "timer16", \
}
#endif /* TIM16_CONFIG */
#endif /* BSP_USING_TIM16 */
#ifdef BSP_USING_TIM17
#ifndef TIM17_CONFIG
#define TIM17_CONFIG \
{ \
.tim_handle.Instance = TIM17, \
.tim_irqn = TIM17_IRQn, \
.name = "timer17", \
}
#endif /* TIM17_CONFIG */
#endif /* BSP_USING_TIM17 */
#endif /* __TIM_CONFIG_H__ */

48
bsp/stm32/libraries/HAL_Drivers/config/f0/uart_config.h Normal file
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-10-30 zylx first version
*/
#ifndef __UART_CONFIG_H__
#define __UART_CONFIG_H__
#include <rtthread.h>
#if defined(BSP_USING_UART1)
#ifndef UART1_CONFIG
#define UART1_CONFIG \
{ \
.name = "uart1", \
.Instance = USART1, \
.irq_type = USART1_IRQn, \
.dma.Instance = DMA1_Channel3, \
.dma_rcc = RCC_AHBENR_DMA1EN, \
.dma_irq = DMA1_Ch2_3_DMA2_Ch1_2_IRQn, \
}
#define USART1_RX_DMA_ISR DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#endif /* UART1_CONFIG */
#endif /* BSP_USING_UART1 */
#if defined(BSP_USING_UART2)
#ifndef UART2_CONFIG
#define UART2_CONFIG \
{ \
.name = "uart2", \
.Instance = USART2, \
.irq_type = USART2_IRQn, \
.dma.Instance = DMA1_Channel3, \
.dma_rcc = RCC_AHBENR_DMA1EN, \
.dma_irq = DMA1_Ch2_3_DMA2_Ch1_2_IRQn, \
}
#define USART2_RX_DMA_ISR DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#endif /* UART2_CONFIG */
#endif /* BSP_USING_UART2 */
#endif /* __UART_CONFIG_H__ */