新增CH32V307的硬件定时器功能 (#6545)
新增CH32V307的硬件定时器功能,并在CH32V307V-R1-1V0板卡上进行了测试。
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642ba3bc93
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@ -35,6 +35,9 @@ if GetDepend('SOC_RISCV_FAMILY_CH32'):
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if GetDepend('BSP_USING_PWM'):
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src += ['drv_pwm.c']
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if GetDepend('BSP_USING_HWTIMER'):
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src += ['drv_hwtimer.c']
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
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@ -0,0 +1,486 @@
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-09-10 MXH the first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#ifdef BSP_USING_HWTIMER
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#define DBG_TAG "TIM"
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#define DBG_LVL DBG_LOG
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#include <rtdbg.h>
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#include "drv_hwtimer.h"
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#include "board.h"
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#ifdef RT_USING_HWTIMER
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enum
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{
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#ifdef BSP_USING_TIM1
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TIM1_INDEX,
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#endif
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#ifdef BSP_USING_TIM2
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TIM2_INDEX,
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#endif
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#ifdef BSP_USING_TIM3
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TIM3_INDEX,
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#endif
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#ifdef BSP_USING_TIM4
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TIM4_INDEX,
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#endif
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#ifdef BSP_USING_TIM5
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TIM5_INDEX,
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#endif
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#ifdef BSP_USING_TIM6
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TIM6_INDEX,
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#endif
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#ifdef BSP_USING_TIM7
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TIM7_INDEX,
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#endif
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#ifdef BSP_USING_TIM8
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TIM8_INDEX,
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#endif
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#ifdef BSP_USING_TIM9
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TIM9_INDEX,
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#endif
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#ifdef BSP_USING_TIM10
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TIM10_INDEX,
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#endif
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};
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static struct ch32_hwtimer ch32_hwtimer_obj[] =
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{
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#ifdef BSP_USING_TIM1
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TIM1_CONFIG,
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#endif
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#ifdef BSP_USING_TIM2
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TIM2_CONFIG,
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#endif
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#ifdef BSP_USING_TIM3
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TIM3_CONFIG,
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#endif
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#ifdef BSP_USING_TIM4
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TIM4_CONFIG,
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#endif
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#ifdef BSP_USING_TIM5
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TIM5_CONFIG,
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#endif
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#ifdef BSP_USING_TIM6
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TIM6_CONFIG,
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#endif
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#ifdef BSP_USING_TIM7
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TIM7_CONFIG,
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#endif
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#ifdef BSP_USING_TIM8
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TIM8_CONFIG,
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#endif
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#ifdef BSP_USING_TIM9
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TIM9_CONFIG,
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#endif
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#ifdef BSP_USING_TIM10
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TIM10_CONFIG,
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#endif
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};
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/* APBx timer clocks frequency doubler state related to APB1CLKDivider value */
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void ch32_get_pclk_doubler(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_doubler)
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{
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RT_ASSERT(pclk1_doubler != RT_NULL);
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RT_ASSERT(pclk2_doubler != RT_NULL);
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*pclk1_doubler = 1;
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*pclk2_doubler = 1;
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if((RCC->CFGR0 & RCC_PPRE1) == RCC_PPRE1_DIV1)
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{
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*pclk1_doubler = 1;
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}
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else
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{
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*pclk1_doubler = 2;
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}
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if((RCC->CFGR0 & RCC_PPRE2) == RCC_PPRE2_DIV1)
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{
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*pclk2_doubler = 1;
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}
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else
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{
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*pclk2_doubler = 2;
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}
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}
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static void ch32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
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{
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RT_ASSERT(timer != RT_NULL);
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TIM_HandleTypeDef *tim = RT_NULL;
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RCC_ClocksTypeDef RCC_ClockStruct;
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NVIC_InitTypeDef NVIC_InitStruct;
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struct ch32_hwtimer *tim_device = RT_NULL;
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rt_uint32_t prescaler_value = 0;
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rt_uint32_t pclk1_doubler, pclk2_doubler;
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RCC_GetClocksFreq(&RCC_ClockStruct);
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ch32_get_pclk_doubler(&pclk1_doubler, &pclk2_doubler);
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if(state)
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{
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tim = (TIM_HandleTypeDef *)timer->parent.user_data;
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tim_device = (struct ch32_hwtimer *)timer;
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if(tim->instance == TIM1 || tim->instance == TIM8 ||
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tim->instance == TIM9 || tim->instance == TIM10)
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{
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RCC_APB2PeriphClockCmd(tim->rcc, ENABLE);
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prescaler_value = (RCC_ClockStruct.PCLK2_Frequency * pclk2_doubler / 10000) - 1;
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}
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else
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{
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RCC_APB1PeriphClockCmd(tim->rcc, ENABLE);
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prescaler_value = (RCC_ClockStruct.PCLK1_Frequency * pclk1_doubler / 10000) - 1;
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}
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tim->init.TIM_Prescaler = prescaler_value;
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tim->init.TIM_ClockDivision = TIM_CKD_DIV1;
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tim->init.TIM_Period = 10000 - 1;
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tim->init.TIM_RepetitionCounter = 0;
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if(timer->info->cntmode == HWTIMER_CNTMODE_UP)
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{
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tim->init.TIM_CounterMode = TIM_CounterMode_Up;
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}
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else
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{
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tim->init.TIM_CounterMode = TIM_CounterMode_Down;
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}
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/* TIM6 and TIM7 only support counter up mode */
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if(tim->instance == TIM6 || tim->instance == TIM7)
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{
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tim->init.TIM_CounterMode = TIM_CounterMode_Up;
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}
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TIM_TimeBaseInit(tim->instance, &tim->init);
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NVIC_InitStruct.NVIC_IRQChannel = tim_device->irqn;
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NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStruct);
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TIM_ClearITPendingBit(tim->instance, TIM_IT_Update);
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TIM_ITConfig(tim->instance, TIM_IT_Update, ENABLE);
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}
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}
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static rt_err_t ch32_hwtimer_start(struct rt_hwtimer_device *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
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{
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RT_ASSERT(timer != RT_NULL);
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TIM_HandleTypeDef *tim = RT_NULL;
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tim = (TIM_HandleTypeDef *)timer->parent.user_data;
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/* set tim cnt */
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tim->instance->CNT = 0;
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/* set tim arr */
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tim->instance->ATRLR = cnt - 1;
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tim->init.TIM_Period = cnt - 1;
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if (mode == HWTIMER_MODE_ONESHOT)
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{
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/* set timer to single mode */
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tim->instance->CTLR1 &= (uint16_t) ~((uint16_t)TIM_OPM);
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tim->instance->CTLR1 |= TIM_OPMode_Single;
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}
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else
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{
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tim->instance->CTLR1 &= (uint16_t) ~((uint16_t)TIM_OPM);
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tim->instance->CTLR1 |= TIM_OPMode_Repetitive;
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}
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/* start timer */
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TIM_Cmd(tim->instance, ENABLE);
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return RT_EOK;
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}
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static void ch32_hwtimer_stop(struct rt_hwtimer_device *timer)
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{
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RT_ASSERT(timer != RT_NULL);
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TIM_HandleTypeDef *tim = RT_NULL;
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tim = (TIM_HandleTypeDef *)timer->parent.user_data;
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/* stop timer */
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TIM_Cmd(tim->instance, DISABLE);
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/* set tim cnt */
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tim->instance->CNT = 0;
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}
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static rt_uint32_t ch32_hwtimer_count_get(struct rt_hwtimer_device *timer)
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{
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RT_ASSERT(timer != RT_NULL);
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TIM_HandleTypeDef *tim = RT_NULL;
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tim = (TIM_HandleTypeDef *)timer->parent.user_data;
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return tim->instance->CNT;
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}
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static rt_err_t ch32_hwtimer_control(struct rt_hwtimer_device *timer, rt_uint32_t cmd, void *args)
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{
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RT_ASSERT(timer != RT_NULL);
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RT_ASSERT(args != RT_NULL);
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TIM_HandleTypeDef *tim = RT_NULL;
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rt_err_t result = RT_EOK;
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rt_uint32_t pclk1_doubler, pclk2_doubler;
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tim = (TIM_HandleTypeDef *)timer->parent.user_data;
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switch (cmd)
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{
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case HWTIMER_CTRL_FREQ_SET:
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{
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rt_uint32_t freq;
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rt_uint16_t val;
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RCC_ClocksTypeDef RCC_ClockStruct;
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/* set timer frequence */
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freq = *((rt_uint32_t *)args);
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ch32_get_pclk_doubler(&pclk1_doubler, &pclk2_doubler);
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RCC_GetClocksFreq(&RCC_ClockStruct);
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if(tim->instance == TIM1 || tim->instance == TIM8 ||
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tim->instance == TIM9 || tim->instance == TIM10)
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{
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val = RCC_ClockStruct.PCLK2_Frequency * pclk2_doubler / freq;
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}
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else
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{
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val = RCC_ClockStruct.PCLK1_Frequency * pclk1_doubler / freq;
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}
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/* Update frequency value */
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TIM_PrescalerConfig(tim->instance, val - 1, TIM_PSCReloadMode_Immediate);
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result = RT_EOK;
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break;
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}
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case HWTIMER_CTRL_MODE_SET:
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{
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if (*(rt_hwtimer_mode_t *)args == HWTIMER_MODE_ONESHOT)
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{
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/* set timer to single mode */
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tim->instance->CTLR1 &= (uint16_t) ~((uint16_t)TIM_OPM);
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tim->instance->CTLR1 |= TIM_OPMode_Single;
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}
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else
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{
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tim->instance->CTLR1 &= (uint16_t) ~((uint16_t)TIM_OPM);
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tim->instance->CTLR1 |= TIM_OPMode_Repetitive;
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}
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break;
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}
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case HWTIMER_CTRL_INFO_GET:
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{
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*(rt_hwtimer_mode_t *)args = tim->instance->CNT;
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break;
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}
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case HWTIMER_CTRL_STOP:
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{
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ch32_hwtimer_stop(timer);
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break;
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}
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default:
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{
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result = -RT_EINVAL;
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break;
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}
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}
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return result;
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}
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static const struct rt_hwtimer_info ch32_hwtimer_info = TIM_DEV_INFO_CONFIG;
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static const struct rt_hwtimer_ops ch32_hwtimer_ops =
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{
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ch32_hwtimer_init,
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ch32_hwtimer_start,
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ch32_hwtimer_stop,
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ch32_hwtimer_count_get,
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ch32_hwtimer_control
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};
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static void ch32_hwtimer_isr(struct rt_hwtimer_device *device)
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{
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RT_ASSERT(device != RT_NULL);
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struct ch32_hwtimer *hwtimer = RT_NULL;
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hwtimer = rt_container_of(device, struct ch32_hwtimer, device);
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if(TIM_GetITStatus(hwtimer->handle.instance, TIM_IT_Update) != RESET)
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{
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rt_device_hwtimer_isr(device);
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TIM_ClearITPendingBit(hwtimer->handle.instance, TIM_IT_Update);
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}
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}
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#ifdef BSP_USING_TIM1
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void TIM1_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void TIM1_UP_IRQHandler(void)
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{
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GET_INT_SP();
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rt_interrupt_enter();
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ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM1_INDEX].device));
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rt_interrupt_leave();
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FREE_INT_SP();
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}
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#endif /* BSP_USING_TIM1 */
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#ifdef BSP_USING_TIM2
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void TIM2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void TIM2_IRQHandler(void)
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{
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GET_INT_SP();
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rt_interrupt_enter();
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ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM2_INDEX].device));
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rt_interrupt_leave();
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FREE_INT_SP();
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}
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#endif /* BSP_USING_TIM2 */
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#ifdef BSP_USING_TIM3
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void TIM3_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void TIM3_IRQHandler(void)
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{
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GET_INT_SP();
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rt_interrupt_enter();
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ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM3_INDEX].device));
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rt_interrupt_leave();
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FREE_INT_SP();
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}
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#endif /* BSP_USING_TIM3 */
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#ifdef BSP_USING_TIM4
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void TIM4_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void TIM4_IRQHandler(void)
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{
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GET_INT_SP();
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rt_interrupt_enter();
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ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM4_INDEX].device));
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rt_interrupt_leave();
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FREE_INT_SP();
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}
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#endif /* BSP_USING_TIM4 */
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#ifdef BSP_USING_TIM5
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void TIM5_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void TIM5_IRQHandler(void)
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{
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GET_INT_SP();
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rt_interrupt_enter();
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ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM5_INDEX].device));
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rt_interrupt_leave();
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FREE_INT_SP();
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}
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#endif /* BSP_USING_TIM5 */
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#ifdef BSP_USING_TIM6
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void TIM6_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void TIM6_IRQHandler(void)
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{
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GET_INT_SP();
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rt_interrupt_enter();
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ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM6_INDEX].device));
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rt_interrupt_leave();
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FREE_INT_SP();
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}
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#endif /* BSP_USING_TIM6 */
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#ifdef BSP_USING_TIM7
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void TIM7_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void TIM7_IRQHandler(void)
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{
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GET_INT_SP();
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rt_interrupt_enter();
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ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM7_INDEX].device));
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rt_interrupt_leave();
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FREE_INT_SP();
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}
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#endif /* BSP_USING_TIM7 */
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#ifdef BSP_USING_TIM8
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void TIM8_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void TIM8_UP_IRQHandler(void)
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{
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GET_INT_SP();
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rt_interrupt_enter();
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ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM8_INDEX].device));
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rt_interrupt_leave();
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FREE_INT_SP();
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}
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#endif /* BSP_USING_TIM8 */
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#ifdef BSP_USING_TIM9
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void TIM9_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void TIM9_UP_IRQHandler(void)
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{
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GET_INT_SP();
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rt_interrupt_enter();
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ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM9_INDEX].device));
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rt_interrupt_leave();
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FREE_INT_SP();
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}
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#endif /* BSP_USING_TIM9 */
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#ifdef BSP_USING_TIM10
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void TIM10_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void TIM10_UP_IRQHandler(void)
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{
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GET_INT_SP();
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rt_interrupt_enter();
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ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM10_INDEX].device));
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rt_interrupt_leave();
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FREE_INT_SP();
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}
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#endif /* BSP_USING_TIM10 */
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static int rt_hw_timer_init(void)
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{
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int i = 0;
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int result = RT_EOK;
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for (i = 0; i < sizeof(ch32_hwtimer_obj) / sizeof(ch32_hwtimer_obj[0]); i++)
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{
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ch32_hwtimer_obj[i].device.info = &ch32_hwtimer_info;
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ch32_hwtimer_obj[i].device.ops = &ch32_hwtimer_ops;
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result = rt_device_hwtimer_register(&ch32_hwtimer_obj[i].device,
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||||
ch32_hwtimer_obj[i].name, (void *)&ch32_hwtimer_obj[i].handle);
|
||||
RT_ASSERT(result == RT_EOK);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_timer_init);
|
||||
|
||||
#endif /* RT_USING_HWTIMER */
|
||||
#endif /* BSP_USING_HWTIMER */
|
|
@ -0,0 +1,148 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-09-10 MXH the first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_HWTIMER_H__
|
||||
#define __DRV_HWTIMER_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "ch32v30x_tim.h"
|
||||
|
||||
#ifdef BSP_USING_HWTIMER
|
||||
|
||||
typedef struct
|
||||
{
|
||||
TIM_TypeDef *instance;
|
||||
TIM_TimeBaseInitTypeDef init;
|
||||
rt_uint32_t rcc;
|
||||
|
||||
}TIM_HandleTypeDef;
|
||||
|
||||
struct ch32_hwtimer
|
||||
{
|
||||
rt_hwtimer_t device;
|
||||
TIM_HandleTypeDef handle;
|
||||
IRQn_Type irqn;
|
||||
char *name;
|
||||
};
|
||||
|
||||
/* TIM CONFIG */
|
||||
#ifndef TIM_DEV_INFO_CONFIG
|
||||
#define TIM_DEV_INFO_CONFIG \
|
||||
{ \
|
||||
.maxfreq = 1000000, \
|
||||
.minfreq = 3000, \
|
||||
.maxcnt = 0xFFFF, \
|
||||
.cntmode = HWTIMER_CNTMODE_UP, \
|
||||
}
|
||||
#endif /* TIM_DEV_INFO_CONFIG */
|
||||
|
||||
#ifdef BSP_USING_TIM1
|
||||
#define TIM1_CONFIG \
|
||||
{ \
|
||||
.handle.instance = TIM1, \
|
||||
.handle.rcc = RCC_APB2Periph_TIM1, \
|
||||
.irqn = TIM1_UP_IRQn, \
|
||||
.name = "timer1", \
|
||||
}
|
||||
#endif /* BSP_USING_TIM1 */
|
||||
|
||||
#ifdef BSP_USING_TIM2
|
||||
#define TIM2_CONFIG \
|
||||
{ \
|
||||
.handle.instance = TIM2, \
|
||||
.handle.rcc = RCC_APB1Periph_TIM2, \
|
||||
.irqn = TIM2_IRQn, \
|
||||
.name = "timer2", \
|
||||
}
|
||||
#endif /* BSP_USING_TIM2 */
|
||||
|
||||
#ifdef BSP_USING_TIM3
|
||||
#define TIM3_CONFIG \
|
||||
{ \
|
||||
.handle.instance = TIM3, \
|
||||
.handle.rcc = RCC_APB1Periph_TIM3, \
|
||||
.irqn = TIM3_IRQn, \
|
||||
.name = "timer3", \
|
||||
}
|
||||
#endif /* BSP_USING_TIM3 */
|
||||
|
||||
#ifdef BSP_USING_TIM4
|
||||
#define TIM4_CONFIG \
|
||||
{ \
|
||||
.handle.instance = TIM4, \
|
||||
.handle.rcc = RCC_APB1Periph_TIM4, \
|
||||
.irqn = TIM4_IRQn, \
|
||||
.name = "timer4", \
|
||||
}
|
||||
#endif /* BSP_USING_TIM4 */
|
||||
|
||||
#ifdef BSP_USING_TIM5
|
||||
#define TIM5_CONFIG \
|
||||
{ \
|
||||
.handle.instance = TIM5, \
|
||||
.handle.rcc = RCC_APB1Periph_TIM5, \
|
||||
.irqn = TIM5_IRQn, \
|
||||
.name = "timer5", \
|
||||
}
|
||||
#endif /* BSP_USING_TIM5 */
|
||||
|
||||
#ifdef BSP_USING_TIM6
|
||||
#define TIM6_CONFIG \
|
||||
{ \
|
||||
.handle.instance = TIM6, \
|
||||
.handle.rcc = RCC_APB1Periph_TIM6, \
|
||||
.irqn = TIM6_IRQn, \
|
||||
.name = "timer6", \
|
||||
}
|
||||
#endif /* BSP_USING_TIM6 */
|
||||
|
||||
#ifdef BSP_USING_TIM7
|
||||
#define TIM7_CONFIG \
|
||||
{ \
|
||||
.handle.instance = TIM7, \
|
||||
.handle.rcc = RCC_APB1Periph_TIM7, \
|
||||
.irqn = TIM7_IRQn, \
|
||||
.name = "timer7", \
|
||||
}
|
||||
#endif /* BSP_USING_TIM7 */
|
||||
|
||||
#ifdef BSP_USING_TIM8
|
||||
#define TIM8_CONFIG \
|
||||
{ \
|
||||
.handle.instance = TIM8, \
|
||||
.handle.rcc = RCC_APB2Periph_TIM8, \
|
||||
.irqn = TIM8_UP_IRQn, \
|
||||
.name = "timer8", \
|
||||
}
|
||||
#endif /* BSP_USING_TIM8 */
|
||||
|
||||
#ifdef BSP_USING_TIM9
|
||||
#define TIM9_CONFIG \
|
||||
{ \
|
||||
.handle.instance = TIM9, \
|
||||
.handle.rcc = RCC_APB2Periph_TIM9, \
|
||||
.irqn = TIM9_UP_IRQn, \
|
||||
.name = "timer9", \
|
||||
}
|
||||
#endif /* BSP_USING_TIM9 */
|
||||
|
||||
#ifdef BSP_USING_TIM10
|
||||
#define TIM10_CONFIG \
|
||||
{ \
|
||||
.handle.instance = TIM10, \
|
||||
.handle.rcc = RCC_APB2Periph_TIM10, \
|
||||
.irqn = TIM10_UP_IRQn, \
|
||||
.name = "timer10", \
|
||||
}
|
||||
#endif /* BSP_USING_TIM10 */
|
||||
|
||||
#endif /* BSP_USING_HWTIMER */
|
||||
#endif /* __DRV_HWTIMER_H__ */
|
|
@ -201,7 +201,7 @@ menu "On-chip Peripheral Drivers"
|
|||
|
||||
if BSP_USING_RTC
|
||||
config BSP_USING_RTC_LSI
|
||||
bool "using LSI clock for rtc, if not, LSE default"
|
||||
bool "Using LSI clock for rtc, if not, LSE default"
|
||||
select LSI_VALUE
|
||||
default n
|
||||
endif
|
||||
|
@ -211,7 +211,7 @@ menu "On-chip Peripheral Drivers"
|
|||
default 40000
|
||||
|
||||
config BSP_USING_IWDT
|
||||
bool "using onchip iwdt"
|
||||
bool "Enable IWDT"
|
||||
select RT_USING_WDT
|
||||
select LSI_VALUE
|
||||
default n
|
||||
|
@ -222,15 +222,15 @@ menu "On-chip Peripheral Drivers"
|
|||
select RT_USING_CAN
|
||||
if BSP_USING_CAN
|
||||
config BSP_USING_CAN1
|
||||
bool "using CAN1"
|
||||
bool "Using CAN1"
|
||||
default n
|
||||
config BSP_USING_CAN2
|
||||
bool "using CAN2"
|
||||
bool "Using CAN2"
|
||||
default n
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM
|
||||
bool "using TIMx"
|
||||
bool "Using TIMx"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM
|
||||
|
@ -250,144 +250,320 @@ menu "On-chip Peripheral Drivers"
|
|||
|
||||
if BSP_USING_TIM1
|
||||
choice
|
||||
prompt "using TIM1 as hwtimer or PWM mode"
|
||||
prompt "Using TIM1 as hwtimer or PWM mode"
|
||||
default BSP_USING_TIM1_HWTIMER
|
||||
|
||||
config BSP_USING_TIM1_HWTIMER
|
||||
bool "using TIM1 as hwtimer mode"
|
||||
bool "Using TIM1 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM1_PWM
|
||||
bool "using TIM1 as PWM mode"
|
||||
bool "Using TIM1 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
endchoice
|
||||
|
||||
if BSP_USING_TIM1_PWM
|
||||
config BSP_USING_TIM1_PWM_CH1
|
||||
bool "using TIM1 channel 1"
|
||||
bool "Using TIM1 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM1_PWM_CH2
|
||||
bool "using TIM1 channel 2"
|
||||
bool "Using TIM1 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM1_PWM_CH3
|
||||
bool "using TIM1 channel 3"
|
||||
bool "Using TIM1 channel 3"
|
||||
|
||||
config BSP_USING_TIM1_PWM_CH4
|
||||
bool "using TIM1 channel 4"
|
||||
bool "Using TIM1 channel 4"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM2
|
||||
bool "using TIM2"
|
||||
bool "Using TIM2"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM2
|
||||
choice
|
||||
prompt "using TIM2 as hwtimer or PWM mode"
|
||||
prompt "Using TIM2 as hwtimer or PWM mode"
|
||||
default BSP_USING_TIM2_HWTIMER
|
||||
|
||||
config BSP_USING_TIM2_HWTIMER
|
||||
bool "using TIM2 as hwtimer mode"
|
||||
bool "Using TIM2 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM2_PWM
|
||||
bool "using TIM2 as PWM mode"
|
||||
bool "Using TIM2 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
endchoice
|
||||
|
||||
if BSP_USING_TIM2_PWM
|
||||
config BSP_USING_TIM2_PWM_CH1
|
||||
bool "using TIM2 channel 1"
|
||||
bool "Using TIM2 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM2_PWM_CH2
|
||||
bool "using TIM2 channel 2"
|
||||
bool "Using TIM2 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM2_PWM_CH3
|
||||
bool "using TIM2 channel 3"
|
||||
bool "Using TIM2 channel 3"
|
||||
|
||||
config BSP_USING_TIM2_PWM_CH4
|
||||
bool "using TIM2 channel 4"
|
||||
bool "Using TIM2 channel 4"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM3
|
||||
bool "using TIM3"
|
||||
bool "Using TIM3"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM3
|
||||
choice
|
||||
prompt "using TIM3 as hwtimer or PWM mode"
|
||||
prompt "Using TIM3 as hwtimer or PWM mode"
|
||||
default BSP_USING_TIM3_HWTIMER
|
||||
|
||||
config BSP_USING_TIM3_HWTIMER
|
||||
bool "using TIM3 as hwtimer mode"
|
||||
bool "Using TIM3 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM3_PWM
|
||||
bool "using TIM3 as PWM mode"
|
||||
bool "Using TIM3 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
endchoice
|
||||
|
||||
if BSP_USING_TIM3_PWM
|
||||
config BSP_USING_TIM3_PWM_CH1
|
||||
bool "using TIM3 channel 1"
|
||||
bool "Using TIM3 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM3_PWM_CH2
|
||||
bool "using TIM3 channel 2"
|
||||
bool "Using TIM3 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM3_PWM_CH3
|
||||
bool "using TIM3 channel 3"
|
||||
bool "Using TIM3 channel 3"
|
||||
|
||||
config BSP_USING_TIM3_PWM_CH4
|
||||
bool "using TIM3 channel 4"
|
||||
bool "Using TIM3 channel 4"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM4
|
||||
bool "using TIM4"
|
||||
bool "Using TIM4"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM4
|
||||
choice
|
||||
prompt "using TIM4 as hwtimer or PWM mode"
|
||||
prompt "Using TIM4 as hwtimer or PWM mode"
|
||||
default BSP_USING_TIM4_HWTIMER
|
||||
|
||||
config BSP_USING_TIM4_HWTIMER
|
||||
bool "using TIM4 as hwtimer mode"
|
||||
bool "Using TIM4 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM4_PWM
|
||||
bool "using TIM4 as PWM mode"
|
||||
bool "Using TIM4 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
endchoice
|
||||
|
||||
if BSP_USING_TIM4_PWM
|
||||
config BSP_USING_TIM4_PWM_CH1
|
||||
bool "using TIM4 channel 1"
|
||||
bool "Using TIM4 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM4_PWM_CH2
|
||||
bool "using TIM4 channel 2"
|
||||
bool "Using TIM4 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM4_PWM_CH3
|
||||
bool "using TIM4 channel 3"
|
||||
bool "Using TIM4 channel 3"
|
||||
|
||||
config BSP_USING_TIM4_PWM_CH4
|
||||
bool "using TIM4 channel 4"
|
||||
bool "Using TIM4 channel 4"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM5
|
||||
bool "Using TIM5"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM5
|
||||
choice
|
||||
prompt "Using TIM5 as hwtimer or PWM mode"
|
||||
default BSP_USING_TIM5_HWTIMER
|
||||
|
||||
config BSP_USING_TIM5_HWTIMER
|
||||
bool "Using TIM5 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM5_PWM
|
||||
bool "Using TIM5 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
endchoice
|
||||
|
||||
if BSP_USING_TIM5_PWM
|
||||
config BSP_USING_TIM5_PWM_CH1
|
||||
bool "Using TIM5 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM5_PWM_CH2
|
||||
bool "Using TIM5 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM5_PWM_CH3
|
||||
bool "Using TIM5 channel 3"
|
||||
|
||||
config BSP_USING_TIM5_PWM_CH4
|
||||
bool "Using TIM5 channel 4"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM6
|
||||
bool "Using TIM6"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM6
|
||||
choice
|
||||
prompt "Using TIM5 as hwtimer (PWM mode not supported)"
|
||||
default BSP_USING_TIM6_HWTIMER
|
||||
|
||||
config BSP_USING_TIM6_HWTIMER
|
||||
bool "Using TIM6 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
endchoice
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM7
|
||||
bool "Using TIM7"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM7
|
||||
choice
|
||||
prompt "Using TIM7 as hwtimer (PWM mode not supported)"
|
||||
default BSP_USING_TIM7_HWTIMER
|
||||
|
||||
config BSP_USING_TIM7_HWTIMER
|
||||
bool "Using TIM7 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
endchoice
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM8
|
||||
bool "Using TIM8"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM8
|
||||
choice
|
||||
prompt "Using TIM8 as hwtimer or PWM mode"
|
||||
default BSP_USING_TIM8_HWTIMER
|
||||
|
||||
config BSP_USING_TIM8_HWTIMER
|
||||
bool "Using TIM8 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM8_PWM
|
||||
bool "Using TIM8 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
endchoice
|
||||
|
||||
if BSP_USING_TIM8_PWM
|
||||
config BSP_USING_TIM8_PWM_CH1
|
||||
bool "Using TIM8 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM8_PWM_CH2
|
||||
bool "Using TIM8 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM8_PWM_CH3
|
||||
bool "Using TIM8 channel 3"
|
||||
|
||||
config BSP_USING_TIM8_PWM_CH4
|
||||
bool "Using TIM8 channel 4"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM9
|
||||
bool "Using TIM9"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM9
|
||||
choice
|
||||
prompt "Using TIM9 as hwtimer or PWM mode"
|
||||
default BSP_USING_TIM9_HWTIMER
|
||||
|
||||
config BSP_USING_TIM9_HWTIMER
|
||||
bool "Using TIM9 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM9_PWM
|
||||
bool "Using TIM9 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
endchoice
|
||||
|
||||
if BSP_USING_TIM9_PWM
|
||||
config BSP_USING_TIM9_PWM_CH1
|
||||
bool "Using TIM9 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM9_PWM_CH2
|
||||
bool "Using TIM9 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM9_PWM_CH3
|
||||
bool "Using TIM9 channel 3"
|
||||
|
||||
config BSP_USING_TIM9_PWM_CH4
|
||||
bool "Using TIM9 channel 4"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM10
|
||||
bool "Using TIM10"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM10
|
||||
choice
|
||||
prompt "Using TIM10 as hwtimer or PWM mode"
|
||||
default BSP_USING_TIM10_HWTIMER
|
||||
|
||||
config BSP_USING_TIM10_HWTIMER
|
||||
bool "Using TIM10 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM10_PWM
|
||||
bool "Using TIM10 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
endchoice
|
||||
|
||||
if BSP_USING_TIM10_PWM
|
||||
config BSP_USING_TIM10_PWM_CH1
|
||||
bool "Using TIM10 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM10_PWM_CH2
|
||||
bool "Using TIM10 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM10_PWM_CH3
|
||||
bool "Using TIM10 channel 3"
|
||||
|
||||
config BSP_USING_TIM10_PWM_CH4
|
||||
bool "Using TIM10 channel 4"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
|
Loading…
Reference in New Issue