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added bsp/evb4020 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1129 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wangjiyang 2010-11-28 08:18:36 +00:00
parent 08668dc481
commit 61f7e58f7a
21 changed files with 12456 additions and 0 deletions
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2
bsp/evb4020/ExtDll.iex Executable file
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[EXTDLL]
Count=0

25
bsp/evb4020/Ext_SDRAM.ini Executable file
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/******************************************************************************/
/* MEMORY.INI: Memory Debug Initialization File */
/******************************************************************************/
/* This file is part of the uVision/ARM development tools. */
/* Copyright (c) 2005-2006 Keil Software. All rights reserved. */
/* This software may only be used under the terms of a valid, current, */
/* end user licence from KEIL for a compatible version of KEIL software */
/* development tools. Nothing else gives you the right to use this software. */
/******************************************************************************/
RESET
FUNC void InitEmi(void)
{
_WWORD(0x11000000,0x08a6a6a1);
_WWORD(0x11000010,0x8cfffff1);
_WWORD(0x11000018,0x1e104177);
_WWORD(0x1100001C,0x80001860);
_WWORD(0x11000020,0x0000000b);
}
InitEmi();
Load %L INCREMENTAL;
PC = 0x30000000;

14
bsp/evb4020/JLinkArm_EVB4020.ini Executable file
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[FLASH]
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 0
Device="ADUC7020X62"
[BREAKPOINTS]
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CPU]
OverrideMemMap = 0
AllowSimulation = 1

0
bsp/evb4020/divsi3.lst Executable file
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25
bsp/evb4020/evb4020.sct Executable file
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; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
; *************************************************************
; *** Scatter-Loadig Description File generated by uVision ***n
; *************************************************************
LR_ROM1 0x30000000 0x0FFD00 ; load region size_region
{
ER_ROM1 0x30000000 0x0FFD00 ; load address = execution address
{
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_RAM1 0x30100000 0x100000 ; RW data
{
.ANY (+RW +ZI)
}
}

21
bsp/evb4020/evb4020.tra Executable file
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*** Creating Trace Output File 'evb4020.tra' Ok.
### Preparing for ADS-LD.
### Creating ADS-LD Command Line
### List of Objects: adding '"startup.o"'
### List of Objects: adding '".\context_rvds.o"'
### List of Objects: adding '".\start_rvds.o"'
### ADS-LD Command completed:
--cpu ARM7TDMI "startup.o" ".\context_rvds.o" ".\start_rvds.o" --strict --scatter "evb4020.sct"
--autoat --summary_stderr --info summarysizes --map --xref --callgraph --symbols
--info sizes --info totals --info unused --info veneers
--list ".\evb4020.map" -o "evb4020.axf"### Preparing Environment (PrepEnvAds)
### ADS-LD Output File: 'evb4020.axf'
### ADS-LD Command File: 'evb4020.lnp'
### Checking for dirty Components...
### Creating CmdFile 'evb4020.lnp', Handle=0x000006D0
### Writing '.lnp' file
### ADS-LD Command file 'evb4020.lnp' is ready.
### ADS-LD: About to start ADS-LD Thread.
### ADS-LD: executed with 0 errors
### Updating obj list
### LDADS_file() completed.

4492
bsp/evb4020/evb4020.uvopt Executable file
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939
bsp/evb4020/evb4020.uvproj Executable file
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>EVB4020</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>ARM7 (Little Endian)</Device>
<Vendor>ARM</Vendor>
<Cpu>CLOCK(60000000) CPUTYPE(ARM7TDMI)</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId>3654</DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\output\</OutputDirectory>
<OutputName>evb4020</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf.exe --bin -o Output/evb4020.bin Output/*.axf</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
</CommonProperty>
<DllOption>
<SimDllName>SARM.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDll>DARMP.DLL</SimDlgDll>
<SimDlgDllArguments></SimDlgDllArguments>
<TargetDllName>SARM.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TARMP.DLL</TargetDlgDll>
<TargetDlgDllArguments></TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
<Simulator>
<UseSimulator>0</UseSimulator>
<LoadApplicationAtStartup>0</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>1</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
</Simulator>
<Target>
<UseTarget>1</UseTarget>
<LoadApplicationAtStartup>0</LoadApplicationAtStartup>
<RunToMain>0</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>6</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
</SimDlls>
<TargetDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile>.\Ext_SDRAM.ini</InitializationFile>
<Driver>Segger\JLTAgdi.dll</Driver>
</TargetDlls>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4098</DriverSelection>
</Flash1>
<Flash2>Segger\JLTAgdi.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>ARM7TDMI</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>0</hadIROM>
<hadIRAM>0</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>1</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<RoSelD>0</RoSelD>
<RwSelD>5</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>1</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>0</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>1</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>0</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</IRAM>
<IROM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x200000</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x30000000</StartAddress>
<Size>0x200000</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x4000000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>0</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<VariousControls>
<MiscControls>-g</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>.\src;..\..\include;..\..\finsh;..\..\filesystem;..\..\components\dfs\include;..\..\components\finsh;..\..\components\dfs;..\..\components\net\lwip\src\arch\include;..\..\components\net\lwip\src\include;..\..\components\net\lwip\src;..\..\components\net\lwip\src\include\ipv4;..\..\components\net\lwip\src\include\netif;..\..\components\net\lwip\src\include\lwip</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>0</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<VariousControls>
<MiscControls></MiscControls>
<Define>RAM_INTVEC REMAP</Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<ScatterFile>evb4020.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>--verbose --list=out.txt</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>STARTUP</GroupName>
<Files>
<File>
<FileName>startup.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\startup.c</FilePath>
</File>
<File>
<FileName>application.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\application.c</FilePath>
</File>
<File>
<FileName>export.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\export.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>KERNEL</GroupName>
<Files>
<File>
<FileName>clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\clock.c</FilePath>
</File>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\device.c</FilePath>
</File>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\idle.c</FilePath>
</File>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\ipc.c</FilePath>
</File>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\irq.c</FilePath>
</File>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\kservice.c</FilePath>
</File>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\mem.c</FilePath>
</File>
<File>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\mempool.c</FilePath>
</File>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\object.c</FilePath>
</File>
<File>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\scheduler.c</FilePath>
</File>
<File>
<FileName>slab.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\slab.c</FilePath>
</File>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\thread.c</FilePath>
</File>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\timer.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>SEP4020</GroupName>
<Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\libcpu\arm\sep4020\context_rvds.S</FilePath>
</File>
<File>
<FileName>start_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\libcpu\arm\sep4020\start_rvds.S</FilePath>
</File>
<File>
<FileName>stack.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\stack.c</FilePath>
</File>
<File>
<FileName>trap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\trap.c</FilePath>
</File>
<File>
<FileName>interrupt.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\interrupt.c</FilePath>
</File>
<File>
<FileName>cpu.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\cpu.c</FilePath>
</File>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\board.c</FilePath>
</File>
<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\serial.c</FilePath>
</File>
<File>
<FileName>sdcard.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\sdcard.c</FilePath>
</File>
<File>
<FileName>dm9161.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\dm9161.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>ARM</GroupName>
<Files>
<File>
<FileName>backtrace.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
</File>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
</File>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>FileSystem</GroupName>
<Files>
<File>
<FileName>dfs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs.c</FilePath>
</File>
<File>
<FileName>dfs_file.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs_file.c</FilePath>
</File>
<File>
<FileName>dfs_fs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs_fs.c</FilePath>
</File>
<File>
<FileName>dfs_posix.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs_posix.c</FilePath>
</File>
<File>
<FileName>dfs_elm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\filesystems\elmfat\dfs_elm.c</FilePath>
</File>
<File>
<FileName>ff.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\filesystems\elmfat\ff.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>FINSH</GroupName>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>finsh_compiler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
</File>
<File>
<FileName>finsh_error.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_error.c</FilePath>
</File>
<File>
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1
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Dependencies for Project 'evb4020', Target 'Target 1': (DO NOT MODIFY !)

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4492
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<interw>0</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<VariousControls>
<MiscControls>-g</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>.\src;..\..\include;..\..\finsh;..\..\filesystem;..\..\components\dfs\include;..\..\components\finsh;..\..\components\dfs;..\..\components\net\lwip\src\arch\include;..\..\components\net\lwip\src\include;..\..\components\net\lwip\src;..\..\components\net\lwip\src\include\ipv4;..\..\components\net\lwip\src\include\netif;..\..\components\net\lwip\src\include\lwip</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>0</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
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<VariousControls>
<MiscControls></MiscControls>
<Define>RAM_INTVEC REMAP</Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
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<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<ScatterFile>evb4020.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>--verbose --list=out.txt</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>STARTUP</GroupName>
<Files>
<File>
<FileName>startup.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\startup.c</FilePath>
</File>
<File>
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<FilePath>.\src\application.c</FilePath>
</File>
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<FilePath>.\src\export.c</FilePath>
</File>
<File>
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<FilePath>.\src\tcpsendpacket.c</FilePath>
</File>
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<Group>
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<FileType>1</FileType>
<FilePath>..\..\src\clock.c</FilePath>
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<File>
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</File>
<File>
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<FilePath>..\..\src\ipc.c</FilePath>
</File>
<File>
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<FilePath>..\..\src\irq.c</FilePath>
</File>
<File>
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<FilePath>..\..\src\kservice.c</FilePath>
</File>
<File>
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<FilePath>..\..\src\mem.c</FilePath>
</File>
<File>
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<FilePath>..\..\src\mempool.c</FilePath>
</File>
<File>
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<FilePath>..\..\src\object.c</FilePath>
</File>
<File>
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<FilePath>..\..\src\scheduler.c</FilePath>
</File>
<File>
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<FilePath>..\..\src\slab.c</FilePath>
</File>
<File>
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<FilePath>..\..\src\thread.c</FilePath>
</File>
<File>
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<FilePath>..\..\src\timer.c</FilePath>
</File>
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</Group>
<Group>
<GroupName>SEP4020</GroupName>
<Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
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</File>
<File>
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</File>
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</File>
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</File>
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<FilePath>.\src\serial.c</FilePath>
</File>
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<FilePath>.\src\sdcard.c</FilePath>
</File>
<File>
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</File>
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<Group>
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<Files>
<File>
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</File>
<File>
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<FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
</File>
<File>
<FileName>showmem.c</FileName>
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<FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
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</File>
<File>
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</File>
<File>
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<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs_posix.c</FilePath>
</File>
<File>
<FileName>dfs_elm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\filesystems\elmfat\dfs_elm.c</FilePath>
</File>
<File>
<FileName>ff.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\filesystems\elmfat\ff.c</FilePath>
</File>
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</Group>
<Group>
<GroupName>FINSH</GroupName>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>finsh_compiler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
</File>
<File>
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<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_error.c</FilePath>
</File>
<File>
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<FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
</File>
<File>
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<FilePath>..\..\components\finsh\finsh_init.c</FilePath>
</File>
<File>
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<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_node.c</FilePath>
</File>
<File>
<FileName>finsh_ops.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
</File>
<File>
<FileName>finsh_parser.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
</File>
<File>
<FileName>finsh_token.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_token.c</FilePath>
</File>
<File>
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<FilePath>..\..\components\finsh\finsh_var.c</FilePath>
</File>
<File>
<FileName>finsh_vm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
</File>
<File>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\shell.c</FilePath>
</File>
<File>
<FileName>symbol.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\symbol.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>LWIP</GroupName>
<Files>
<File>
<FileName>api_lib.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\api_lib.c</FilePath>
</File>
<File>
<FileName>api_msg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\api_msg.c</FilePath>
</File>
<File>
<FileName>err.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\err.c</FilePath>
</File>
<File>
<FileName>netbuf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\netbuf.c</FilePath>
</File>
<File>
<FileName>netdb.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\netdb.c</FilePath>
</File>
<File>
<FileName>netifapi.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\netifapi.c</FilePath>
</File>
<File>
<FileName>sockets.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\sockets.c</FilePath>
</File>
<File>
<FileName>tcpip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\tcpip.c</FilePath>
</File>
<File>
<FileName>sys_arch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\arch\sys_arch.c</FilePath>
</File>
<File>
<FileName>sys_arch_init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\arch\sys_arch_init.c</FilePath>
</File>
<File>
<FileName>dhcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\dhcp.c</FilePath>
</File>
<File>
<FileName>dns.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\dns.c</FilePath>
</File>
<File>
<FileName>init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\init.c</FilePath>
</File>
<File>
<FileName>memp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\memp.c</FilePath>
</File>
<File>
<FileName>netif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\netif.c</FilePath>
</File>
<File>
<FileName>pbuf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\pbuf.c</FilePath>
</File>
<File>
<FileName>raw.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\raw.c</FilePath>
</File>
<File>
<FileName>stats.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\stats.c</FilePath>
</File>
<File>
<FileName>sys.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\sys.c</FilePath>
</File>
<File>
<FileName>tcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\tcp.c</FilePath>
</File>
<File>
<FileName>tcp_in.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\tcp_in.c</FilePath>
</File>
<File>
<FileName>tcp_out.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\tcp_out.c</FilePath>
</File>
<File>
<FileName>udp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\udp.c</FilePath>
</File>
<File>
<FileName>autoip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\autoip.c</FilePath>
</File>
<File>
<FileName>icmp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\icmp.c</FilePath>
</File>
<File>
<FileName>igmp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\igmp.c</FilePath>
</File>
<File>
<FileName>inet.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\inet.c</FilePath>
</File>
<File>
<FileName>inet_chksum.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\inet_chksum.c</FilePath>
</File>
<File>
<FileName>ip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\ip.c</FilePath>
</File>
<File>
<FileName>ip_addr.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\ip_addr.c</FilePath>
</File>
<File>
<FileName>ip_frag.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\ip_frag.c</FilePath>
</File>
<File>
<FileName>asn1_dec.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\asn1_dec.c</FilePath>
</File>
<File>
<FileName>asn1_enc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\asn1_enc.c</FilePath>
</File>
<File>
<FileName>mib_structs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\mib_structs.c</FilePath>
</File>
<File>
<FileName>mib2.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\mib2.c</FilePath>
</File>
<File>
<FileName>msg_in.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\msg_in.c</FilePath>
</File>
<File>
<FileName>msg_out.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\msg_out.c</FilePath>
</File>
<File>
<FileName>etharp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\etharp.c</FilePath>
</File>
<File>
<FileName>ethernetif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ethernetif.c</FilePath>
</File>
<File>
<FileName>loopif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\loopif.c</FilePath>
</File>
<File>
<FileName>slipif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\slipif.c</FilePath>
</File>
<File>
<FileName>auth.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\auth.c</FilePath>
</File>
<File>
<FileName>chap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\chap.c</FilePath>
</File>
<File>
<FileName>chpms.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\chpms.c</FilePath>
</File>
<File>
<FileName>fsm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\fsm.c</FilePath>
</File>
<File>
<FileName>ipcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\ipcp.c</FilePath>
</File>
<File>
<FileName>lcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\lcp.c</FilePath>
</File>
<File>
<FileName>magic.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\magic.c</FilePath>
</File>
<File>
<FileName>md5.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\md5.c</FilePath>
</File>
<File>
<FileName>pap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\pap.c</FilePath>
</File>
<File>
<FileName>ppp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\ppp.c</FilePath>
</File>
<File>
<FileName>ppp_oe.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\ppp_oe.c</FilePath>
</File>
<File>
<FileName>randm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\randm.c</FilePath>
</File>
<File>
<FileName>vj.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\vj.c</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>

154
bsp/evb4020/output/evb4020.plg Executable file
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<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Project:</h2>
F:\rtt\bsp\evb4020\evb4020.uvproj
Project File Date: 10/26/2010
<h2>Output:</h2>
Build target 'EVB4020'
compiling startup.c...
compiling application.c...
compiling export.c...
compiling clock.c...
compiling device.c...
compiling idle.c...
compiling ipc.c...
compiling irq.c...
compiling kservice.c...
compiling mem.c...
compiling mempool.c...
compiling object.c...
compiling scheduler.c...
compiling slab.c...
compiling thread.c...
compiling timer.c...
assembling context_rvds.S...
assembling start_rvds.S...
compiling stack.c...
compiling trap.c...
compiling interrupt.c...
compiling cpu.c...
..\..\libcpu\arm\sep4020\cpu.c(21): warning: #1215-D: #warning directive: I DON'T KNOW IF THE MMU OPERATION WORKS ON SEP4020
..\..\libcpu\arm\sep4020\cpu.c: #warning I DON'T KNOW IF THE MMU OPERATION WORKS ON SEP4020
..\..\libcpu\arm\sep4020\cpu.c: ^
..\..\libcpu\arm\sep4020\cpu.c(187): warning: #236-D: controlling expression is constant
..\..\libcpu\arm\sep4020\cpu.c: RT_ASSERT(RT_NULL);
..\..\libcpu\arm\sep4020\cpu.c: ^
..\..\libcpu\arm\sep4020\cpu.c: ..\..\libcpu\arm\sep4020\cpu.c: 2 warnings, 0 errors
compiling board.c...
compiling serial.c...
compiling sdcard.c...
src\sdcard.c(359): warning: #177-D: function "sd_readmultiblock" was declared but never referenced
src\sdcard.c: static rt_uint8_t sd_readmultiblock(rt_uint32_t address, rt_uint8_t* buf,rt_uint32_t size)
src\sdcard.c: ^
src\sdcard.c: src\sdcard.c: 1 warning, 0 errors
compiling dm9161.c...
src\dm9161.c(363): warning: #1215-D: #warning directive: SHOULD SET MAC ADDR
src\dm9161.c: #warning SHOULD SET MAC ADDR
src\dm9161.c: ^
src\dm9161.c(369): warning: #1215-D: #warning directive: SHOULD DETERMIN LINK SPEED
src\dm9161.c: #warning SHOULD DETERMIN LINK SPEED
src\dm9161.c: ^
src\dm9161.c(487): warning: #1215-D: #warning directive: disable ether;
src\dm9161.c: #warning disable ether;
src\dm9161.c: ^
src\dm9161.c(534): warning: #1215-D: #warning directive: SHOULD DISABLE INTEERUPT?
src\dm9161.c: #warning SHOULD DISABLE INTEERUPT?
src\dm9161.c: ^
src\dm9161.c(563): warning: #1215-D: #warning directive: SHOULD NOTICE IT'S LENGTH
src\dm9161.c: #warning SHOULD NOTICE IT'S LENGTH
src\dm9161.c: ^
src\dm9161.c(616): warning: #177-D: variable "len" was declared but never referenced
src\dm9161.c: rt_int32_t len;
src\dm9161.c: ^
src\dm9161.c(664): warning: #1215-D: #warning directive: NOTICE:
src\dm9161.c: #warning NOTICE:
src\dm9161.c: ^
src\dm9161.c(688): warning: #1215-D: #warning directive: TODO
src\dm9161.c: #warning TODO
src\dm9161.c: ^
src\dm9161.c: src\dm9161.c: 8 warnings, 0 errors
compiling backtrace.c...
compiling div0.c...
compiling showmem.c...
compiling dfs.c...
compiling dfs_file.c...
compiling dfs_fs.c...
compiling dfs_posix.c...
compiling dfs_elm.c...
compiling ff.c...
compiling cmd.c...
compiling finsh_compiler.c...
compiling finsh_error.c...
compiling finsh_heap.c...
compiling finsh_init.c...
compiling finsh_node.c...
compiling finsh_ops.c...
compiling finsh_parser.c...
compiling finsh_token.c...
compiling finsh_var.c...
compiling finsh_vm.c...
compiling shell.c...
compiling symbol.c...
compiling api_lib.c...
compiling api_msg.c...
compiling err.c...
compiling netbuf.c...
compiling netdb.c...
compiling netifapi.c...
compiling sockets.c...
compiling tcpip.c...
compiling sys_arch.c...
compiling sys_arch_init.c...
compiling dhcp.c...
compiling dns.c...
compiling init.c...
compiling memp.c...
compiling netif.c...
compiling pbuf.c...
compiling raw.c...
compiling stats.c...
compiling sys.c...
compiling tcp.c...
compiling tcp_in.c...
compiling tcp_out.c...
compiling udp.c...
compiling autoip.c...
compiling icmp.c...
compiling igmp.c...
compiling inet.c...
compiling inet_chksum.c...
compiling ip.c...
compiling ip_addr.c...
compiling ip_frag.c...
compiling asn1_dec.c...
compiling asn1_enc.c...
compiling mib_structs.c...
compiling mib2.c...
compiling msg_in.c...
compiling msg_out.c...
compiling etharp.c...
compiling ethernetif.c...
compiling loopif.c...
compiling slipif.c...
compiling auth.c...
compiling chap.c...
compiling chpms.c...
compiling fsm.c...
compiling ipcp.c...
compiling lcp.c...
compiling magic.c...
compiling md5.c...
compiling pap.c...
compiling ppp.c...
compiling ppp_oe.c...
compiling randm.c...
compiling vj.c...
compiling ping.c...
linking...
Program Size: Code=96692 RO-data=3264 RW-data=468 ZI-data=17844
".\output\evb4020.axf" - 0 Error(s), 11 Warning(s).
Clean started: Project: 'evb4020'
deleting intermediate output files for target 'EVB4020'

121
bsp/evb4020/output/evb4020.tra Executable file
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*** Creating Trace Output File '.\output\evb4020.tra' Ok.
### Preparing for ADS-LD.
### Creating ADS-LD Command Line
### List of Objects: adding '".\output\startup.o"'
### List of Objects: adding '".\output\application.o"'
### List of Objects: adding '".\output\export.o"'
### List of Objects: adding '".\output\clock.o"'
### List of Objects: adding '".\output\device.o"'
### List of Objects: adding '".\output\idle.o"'
### List of Objects: adding '".\output\ipc.o"'
### List of Objects: adding '".\output\irq.o"'
### List of Objects: adding '".\output\kservice.o"'
### List of Objects: adding '".\output\mem.o"'
### List of Objects: adding '".\output\mempool.o"'
### List of Objects: adding '".\output\object.o"'
### List of Objects: adding '".\output\scheduler.o"'
### List of Objects: adding '".\output\slab.o"'
### List of Objects: adding '".\output\thread.o"'
### List of Objects: adding '".\output\timer.o"'
### List of Objects: adding '".\output\context_rvds.o"'
### List of Objects: adding '".\output\start_rvds.o"'
### List of Objects: adding '".\output\stack.o"'
### List of Objects: adding '".\output\trap.o"'
### List of Objects: adding '".\output\interrupt.o"'
### List of Objects: adding '".\output\cpu.o"'
### List of Objects: adding '".\output\board.o"'
### List of Objects: adding '".\output\serial.o"'
### List of Objects: adding '".\output\sdcard.o"'
### List of Objects: adding '".\output\dm9161.o"'
### List of Objects: adding '".\output\backtrace.o"'
### List of Objects: adding '".\output\div0.o"'
### List of Objects: adding '".\output\showmem.o"'
### List of Objects: adding '".\output\dfs.o"'
### List of Objects: adding '".\output\dfs_file.o"'
### List of Objects: adding '".\output\dfs_fs.o"'
### List of Objects: adding '".\output\dfs_posix.o"'
### List of Objects: adding '".\output\dfs_elm.o"'
### List of Objects: adding '".\output\ff.o"'
### List of Objects: adding '".\output\cmd.o"'
### List of Objects: adding '".\output\finsh_compiler.o"'
### List of Objects: adding '".\output\finsh_error.o"'
### List of Objects: adding '".\output\finsh_heap.o"'
### List of Objects: adding '".\output\finsh_init.o"'
### List of Objects: adding '".\output\finsh_node.o"'
### List of Objects: adding '".\output\finsh_ops.o"'
### List of Objects: adding '".\output\finsh_parser.o"'
### List of Objects: adding '".\output\finsh_token.o"'
### List of Objects: adding '".\output\finsh_var.o"'
### List of Objects: adding '".\output\finsh_vm.o"'
### List of Objects: adding '".\output\shell.o"'
### List of Objects: adding '".\output\symbol.o"'
### List of Objects: adding '".\output\api_lib.o"'
### List of Objects: adding '".\output\api_msg.o"'
### List of Objects: adding '".\output\err.o"'
### List of Objects: adding '".\output\netbuf.o"'
### List of Objects: adding '".\output\netdb.o"'
### List of Objects: adding '".\output\netifapi.o"'
### List of Objects: adding '".\output\sockets.o"'
### List of Objects: adding '".\output\tcpip.o"'
### List of Objects: adding '".\output\sys_arch.o"'
### List of Objects: adding '".\output\sys_arch_init.o"'
### List of Objects: adding '".\output\dhcp.o"'
### List of Objects: adding '".\output\dns.o"'
### List of Objects: adding '".\output\init.o"'
### List of Objects: adding '".\output\memp.o"'
### List of Objects: adding '".\output\netif.o"'
### List of Objects: adding '".\output\pbuf.o"'
### List of Objects: adding '".\output\raw.o"'
### List of Objects: adding '".\output\stats.o"'
### List of Objects: adding '".\output\sys.o"'
### List of Objects: adding '".\output\tcp.o"'
### List of Objects: adding '".\output\tcp_in.o"'
### List of Objects: adding '".\output\tcp_out.o"'
### List of Objects: adding '".\output\udp.o"'
### List of Objects: adding '".\output\autoip.o"'
### List of Objects: adding '".\output\icmp.o"'
### List of Objects: adding '".\output\igmp.o"'
### List of Objects: adding '".\output\inet.o"'
### List of Objects: adding '".\output\inet_chksum.o"'
### List of Objects: adding '".\output\ip.o"'
### List of Objects: adding '".\output\ip_addr.o"'
### List of Objects: adding '".\output\ip_frag.o"'
### List of Objects: adding '".\output\asn1_dec.o"'
### List of Objects: adding '".\output\asn1_enc.o"'
### List of Objects: adding '".\output\mib_structs.o"'
### List of Objects: adding '".\output\mib2.o"'
### List of Objects: adding '".\output\msg_in.o"'
### List of Objects: adding '".\output\msg_out.o"'
### List of Objects: adding '".\output\etharp.o"'
### List of Objects: adding '".\output\ethernetif.o"'
### List of Objects: adding '".\output\loopif.o"'
### List of Objects: adding '".\output\slipif.o"'
### List of Objects: adding '".\output\auth.o"'
### List of Objects: adding '".\output\chap.o"'
### List of Objects: adding '".\output\chpms.o"'
### List of Objects: adding '".\output\fsm.o"'
### List of Objects: adding '".\output\ipcp.o"'
### List of Objects: adding '".\output\lcp.o"'
### List of Objects: adding '".\output\magic.o"'
### List of Objects: adding '".\output\md5.o"'
### List of Objects: adding '".\output\pap.o"'
### List of Objects: adding '".\output\ppp.o"'
### List of Objects: adding '".\output\ppp_oe.o"'
### List of Objects: adding '".\output\randm.o"'
### List of Objects: adding '".\output\vj.o"'
### List of Objects: adding '".\output\ping.o"'
### ADS-LD Command completed:
--cpu ARM7TDMI ".\output\startup.o" ".\output\application.o" ".\output\export.o" ".\output\clock.o" ".\output\device.o" ".\output\idle.o" ".\output\ipc.o" ".\output\irq.o" ".\output\kservice.o" ".\output\mem.o" ".\output\mempool.o" ".\output\object.o" ".\output\scheduler.o" ".\output\slab.o" ".\output\thread.o" ".\output\timer.o" ".\output\context_rvds.o" ".\output\start_rvds.o" ".\output\stack.o" ".\output\trap.o" ".\output\interrupt.o" ".\output\cpu.o" ".\output\board.o" ".\output\serial.o" ".\output\sdcard.o" ".\output\dm9161.o" ".\output\backtrace.o" ".\output\div0.o" ".\output\showmem.o" ".\output\dfs.o" ".\output\dfs_file.o" ".\output\dfs_fs.o" ".\output\dfs_posix.o" ".\output\dfs_elm.o" ".\output\ff.o" ".\output\cmd.o" ".\output\finsh_compiler.o" ".\output\finsh_error.o" ".\output\finsh_heap.o" ".\output\finsh_init.o" ".\output\finsh_node.o" ".\output\finsh_ops.o" ".\output\finsh_parser.o" ".\output\finsh_token.o" ".\output\finsh_var.o" ".\output\finsh_vm.o" ".\output\shell.o" ".\output\symbol.o" ".\output\api_lib.o" ".\output\api_msg.o" ".\output\err.o" ".\output\netbuf.o" ".\output\netdb.o" ".\output\netifapi.o" ".\output\sockets.o" ".\output\tcpip.o" ".\output\sys_arch.o" ".\output\sys_arch_init.o" ".\output\dhcp.o" ".\output\dns.o" ".\output\init.o" ".\output\memp.o" ".\output\netif.o" ".\output\pbuf.o" ".\output\raw.o" ".\output\stats.o" ".\output\sys.o" ".\output\tcp.o" ".\output\tcp_in.o" ".\output\tcp_out.o" ".\output\udp.o" ".\output\autoip.o" ".\output\icmp.o" ".\output\igmp.o" ".\output\inet.o" ".\output\inet_chksum.o" ".\output\ip.o" ".\output\ip_addr.o" ".\output\ip_frag.o" ".\output\asn1_dec.o" ".\output\asn1_enc.o" ".\output\mib_structs.o" ".\output\mib2.o" ".\output\msg_in.o" ".\output\msg_out.o" ".\output\etharp.o" ".\output\ethernetif.o" ".\output\loopif.o" ".\output\slipif.o" ".\output\auth.o" ".\output\chap.o" ".\output\chpms.o" ".\output\fsm.o" ".\output\ipcp.o" ".\output\lcp.o" ".\output\magic.o" ".\output\md5.o" ".\output\pap.o" ".\output\ppp.o" ".\output\ppp_oe.o" ".\output\randm.o" ".\output\vj.o" ".\output\ping.o" --strict --scatter "evb4020.sct"
--verbose --list=out.txt --autoat --summary_stderr --info summarysizes --map --xref --callgraph --symbols
--info sizes --info totals --info unused --info veneers
--list ".\evb4020.map" -o ".\output\evb4020.axf"### Preparing Environment (PrepEnvAds)
### ADS-LD Output File: '.\output\evb4020.axf'
### ADS-LD Command File: '.\output\evb4020.lnp'
### Checking for dirty Components...
### Creating CmdFile '.\output\evb4020.lnp', Handle=0x000002E8
### Writing '.lnp' file
### ADS-LD Command file '.\output\evb4020.lnp' is ready.
### ADS-LD: About to start ADS-LD Thread.
### ADS-LD: executed with 0 errors
### Updating obj list
### LDADS_file() completed.

126
bsp/evb4020/src/application.c Executable file
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/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2007-11-20 Yi.Qiu add rtgui application
* 2008-6-28 Bernard no rtgui init
*/
/**
* @addtogroup mini2440
*/
/*@{*/
#include <board.h>
#include <rtthread.h>
#ifdef RT_USING_DFS
#include <dfs_init.h>
#include <dfs_elm.h>
#include <dfs_fs.h>
#include <dfs_posix.h>
#endif
static rt_uint8_t buf_init[0x200];
static struct rt_thread thread_test;
void rt_init_thread_entry(void* parameter)
{
int fd;
rt_uint32_t sz;
char buffer[20];
#ifdef RT_USING_DFS
dfs_init();
#ifdef RT_USING_DFS_ELMFATFS
elm_init();
/* mount sd card fat partition 1 as root directory */
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
{
rt_kprintf("File System initialized!\n");
/*Open a file*/
fd = open("/fattest.txt", O_RDWR|O_CREAT, 0);
if (fd < 0)
{
rt_kprintf("open file for write failed\n");
return;
}
sz = write(fd,"Hello RT-Thread!",sizeof("Hello RT-Thread!"));
if(sz!=0)
{
rt_kprintf("written %d\n",sz);
}
else
rt_kprintf("haven't written\n");
sz = read(fd,buffer,sizeof(buffer));
if(sz!=0)
{
rt_kprintf("READ %d:",sz);
while(sz--)
rt_kprintf("%c",buffer[sz]);//opposite
}
else
rt_kprintf("haven't read\n");
close(fd);
}
else
rt_kprintf("File System initialzation failed!\n");
#endif
#endif
}
void rt_led_thread_entry(void* parameter)
{
/*
rt_uint32_t flag = 0;
while(1)
{
//Add your led implemention here
rt_led_put(flag^0x01);
rt_kprintf("rt led test %s\n",flag?"on":"off" );
rt_thread_delay(100);
} */
//rt_thread_suspend(rt_thread_self());
}
int rt_application_init()
{
rt_thread_t led_thread;
rt_err_t err;
err = rt_thread_init(&thread_test,"init",
rt_init_thread_entry, RT_NULL,buf_init,
sizeof(buf_init), 19, 20);
led_thread = rt_thread_create("led",
rt_led_thread_entry, RT_NULL,
512, 200, 20);
if(err == RT_EOK)
rt_thread_startup(&thread_test);
if (led_thread != RT_NULL)
rt_thread_startup(led_thread);
return 0;
}
/*@}*/

159
bsp/evb4020/src/board.c Executable file
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/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-05-16 Bernard first implementation
* 2010-10-5 Wangmeng sep4020 implementation
*/
#include <rthw.h>
#include <rtthread.h>
#include <sep4020.h>
#include <serial.h>
void rt_hw_serial_putc(const char c);
#define UART0 ((struct uartport *)UART0_BASE)
struct rt_device uart0_device;
struct serial_int_rx uart0_int_rx;
struct serial_device uart0 =
{
UART0,
&uart0_int_rx,
RT_NULL
};
/**
* This function will handle rtos timer
*/
void rt_timer_handler(int vector)
{
rt_uint32_t clear_int;
rt_tick_increase();
/*Clear timer interrupt*/
clear_int = *(RP)TIMER_T1ISCR;
*(RP)TIMER_T1ISCR=clear_int;
}
/**
* This function will handle serial
*/
void rt_serial_handler(int vector)
{
//rt_kprintf("in rt_serial_handler\n");
rt_int32_t stat = *(RP)UART0_IIR ;
UNUSED char c;
/*Received data*/
if(((stat & 0x0E) >> 1) == 0x02)
{
rt_hw_serial_isr(&uart0_device);
/*while (((*(RP)UART0_LSR) & 0x40))
{
c = (char)(*(RP)UART0_BASE);
if(c == '\r')
{
rt_hw_serial_putc('\r');
rt_hw_serial_putc('\n');
}
else
rt_hw_serial_putc(c);
} */
}
else
{
/*clear the timeout interrupt*/
while (uart0.uart_device->lsr & USTAT_RCV_READY)
c = uart0.uart_device->dlbl_fifo.rxfifo;
}
}
/**
* This function will init timer4 for system ticks
*/
void rt_hw_timer_init()
{
/*Set timer1*/
*(RP)TIMER_T1LCR = 880000;
*(RP)TIMER_T1CR = 0x06;
rt_hw_interrupt_install(INTSRC_TIMER1, rt_timer_handler, RT_NULL);
rt_hw_interrupt_umask(INTSRC_TIMER1);
/*Enable timer1*/
*(RP)TIMER_T1CR |= 0x01;
}
/**
* This function will handle init uart
*/
void rt_hw_uart_init(void)
{
const rt_int32_t sysclk = 72000000;
/*Set data bit:8*/
*(RP)(UART0_LCR) = 0x83;
/*Set baud rate high*/
*(RP)(UART0_DLBH) = (sysclk/16/115200) >> 8;
/*Set baud rate low*/
*(RP)(UART0_DLBL) = (sysclk/16/115200) & 0xff;
*(RP)(UART0_LCR) = 0x83&(~(0x1 << 7));
/*Set trigger level*/
*(RP)(UART0_FCR) = 0x0;
*(RP)(UART0_IER) = 0x0;
/*Enable rx interrupt*/
*(RP)(UART0_IER) |= 0x01;
/*Disable tx interrupt*/
*(RP)(UART0_IER) &= ~(0x1<<1);
rt_hw_interrupt_install(INTSRC_UART0, rt_serial_handler, RT_NULL);
rt_hw_interrupt_umask(INTSRC_UART0);
}
void rt_hw_board_init()
{
/* initialize uart */
rt_hw_uart_init();
rt_hw_timer_init();
}
/* write one character to serial, must not trigger interrupt */
void rt_hw_serial_putc(const char c)
{
/*
to be polite with serial console add a line feed
to the carriage return character
*/
if (c=='\n')rt_hw_serial_putc('\r');
while (!((*(RP)UART0_LSR) & 0x40));
*(RP)(UART0_BASE) = c;
}
/**
* This function is used by rt_kprintf to display a string on console.
*
* @param str the displayed string
*/
void rt_hw_console_output(const char* str)
{
while (*str)
{
rt_hw_serial_putc(*str++);
}
}

24
bsp/evb4020/src/board.h Executable file
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/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-10-08 Bernard add board.h to this bsp
* 2010-10-5 Wangmeng sep4020 implemention
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <sep4020.h>
void rt_hw_board_init(void);
void rt_hw_sdcard_init(void);
#endif

700
bsp/evb4020/src/dm9161.c Executable file
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#include <rtthread.h>
#include <netif/ethernetif.h>
#include "dm9161.h"
#include <sep4020.h>
#include "mii.h"
#define SPEED_10 10
#define SPEED_100 100
#define SPEED_1000 1000
/* Duplex, half or full. */
#define DUPLEX_HALF 0x00
#define DUPLEX_FULL 0x01
/*
* Davicom dm9161EP driver
*
* IRQ_LAN connects to EINT7(GPF7)
* nLAN_CS connects to nGCS4
*/
/* #define dm9161_DEBUG 1 */
#if DM9161_DEBUG
#define DM9161_TRACE rt_kprintf
#else
#define DM9161_TRACE(...)
#endif
/*
* dm9161 interrupt line is connected to PF7
*/
//--------------------------------------------------------
#define DM9161_PHY 0x40 /* PHY address 0x01 */
#define MAX_ADDR_LEN 6
enum DM9161_PHY_mode
{
DM9161_10MHD = 0, DM9161_100MHD = 1,
DM9161_10MFD = 4, DM9161_100MFD = 5,
DM9161_AUTO = 8, DM9161_1M_HPNA = 0x10
};
enum DM9161_TYPE
{
TYPE_DM9161,
};
struct rt_dm9161_eth
{
/* inherit from ethernet device */
struct eth_device parent;
enum DM9161_TYPE type;
enum DM9161_PHY_mode mode;
rt_uint8_t imr_all;
rt_uint8_t phy_addr;
rt_uint32_t tx_index;
rt_uint8_t packet_cnt; /* packet I or II */
rt_uint16_t queue_packet_len; /* queued packet (packet II) */
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
};
static struct rt_dm9161_eth dm9161_device;
static struct rt_semaphore sem_ack, sem_lock;
void rt_dm9161_isr(int irqno);
static void udelay(unsigned long ns)
{
unsigned long i;
while(ns--)
{
i = 100;
while(i--);
}
}
static __inline unsigned long sep_emac_read(unsigned int reg)
{
void __iomem *emac_base = (void __iomem *)reg;
return read_reg(emac_base);
}
/*
* Write to a EMAC register.
*/
static __inline void sep_emac_write(unsigned int reg, unsigned long value)
{
void __iomem *emac_base = (void __iomem *)reg;
write_reg(emac_base,value);
}
/* ........................... PHY INTERFACE ........................... */
/* CAN DO MAC CONFIGRATION
* Enable the MDIO bit in MAC control register
* When not called from an interrupt-handler, access to the PHY must be
* protected by a spinlock.
*/
static void enable_mdi(void) //need think more
{
unsigned long ctl;
ctl = sep_emac_read(MAC_CTRL);
sep_emac_write(MAC_CTRL, ctl&(~0x3)); /* enable management port */
return;
}
/* CANNOT DO MAC CONFIGRATION
* Disable the MDIO bit in the MAC control register
*/
static void disable_mdi(void)
{
unsigned long ctl;
ctl = sep_emac_read(MAC_CTRL);
sep_emac_write(MAC_CTRL, ctl|(0x3)); /* disable management port */
return;
}
/*
* Wait until the PHY operation is complete.
*/
static __inline void sep_phy_wait(void)
{
unsigned long timeout = 2;
while ((sep_emac_read(MAC_MII_STATUS) & 0x2))
{
timeout--;
if (!timeout)
{
EOUT("sep_ether: MDIO timeout\n");
break;
}
}
return;
}
/*
* Write value to the a PHY register
* Note: MDI interface is assumed to already have been enabled.
*/
static void write_phy(unsigned char phy_addr, unsigned char address, unsigned int value)
{
unsigned short mii_txdata;
mii_txdata = value;
sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
sep_emac_write(MAC_MII_TXDATA ,mii_txdata);
sep_emac_write(MAC_MII_CMD ,0x4);
udelay(40);
sep_phy_wait();
return;
}
/*
* Read value stored in a PHY register.
* Note: MDI interface is assumed to already have been enabled.
*/
static void read_phy(unsigned char phy_addr, unsigned char address, unsigned int *value)
{
unsigned short mii_rxdata;
// unsigned long mii_status;
sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
sep_emac_write(MAC_MII_CMD ,0x2);
udelay(40);
sep_phy_wait();
mii_rxdata = sep_emac_read(MAC_MII_RXDATA);
*value = mii_rxdata;
return;
}
/* interrupt service routine */
void rt_dm9161_isr(int irqno)
{
unsigned long intstatus;
rt_uint32_t address;
mask_irq(INTSRC_MAC);
intstatus = sep_emac_read(MAC_INTSRC);
sep_emac_write(MAC_INTSRC,intstatus);
/*Receive complete*/
if(intstatus & 0x04)
{
eth_device_ready(&(dm9161_device.parent));
}
/*Receive error*/
else if(intstatus & 0x08)
{
rt_kprintf("Receive error\n");
}
/*Transmit complete*/
else if(intstatus & 0x03)
{
if(dm9161_device.tx_index == 0)
address = (MAC_TX_BD +(MAX_TX_DESCR-2)*8);
else if(dm9161_device.tx_index == 1)
address = (MAC_TX_BD +(MAX_TX_DESCR-1)*8);
else
address = (MAC_TX_BD + dm9161_device.tx_index*8-16);
//printk("free tx skb 0x%x in inter!!\n",lp->txBuffIndex);
sep_emac_write(address,0x0);
}
else if (intstatus & 0x10)
{
rt_kprintf("ROVER ERROR\n");
}
while(intstatus)
{
sep_emac_write(MAC_INTSRC,intstatus);
intstatus = sep_emac_read(MAC_INTSRC);
}
unmask_irq(INTSRC_MAC);
}
static rt_err_t update_mac_address()
{
rt_uint32_t lo,hi;
hi = sep_emac_read(MAC_ADDR1);
lo = sep_emac_read(MAC_ADDR0);
DBOUT("Before MAC: hi=%x lo=%x\n",hi,lo);
sep_emac_write(MAC_ADDR0,(dm9161_device.dev_addr[2] << 24) | (dm9161_device.dev_addr[3] << 16) | (dm9161_device.dev_addr[4] << 8) | (dm9161_device.dev_addr[5]));
sep_emac_write(MAC_ADDR1,dm9161_device.dev_addr[1]|(dm9161_device.dev_addr[0]<<8));
hi = sep_emac_read(MAC_ADDR1);
lo = sep_emac_read(MAC_ADDR0);
DBOUT("After MAC: hi=%x lo=%x\n",hi,lo);
return RT_EOK;
}
static int mii_link_ok (unsigned long phy_id)
{
/* first, a dummy read, needed to latch some MII phys */
unsigned int value;
read_phy(phy_id, MII_BMSR,&value);
if (value & BMSR_LSTATUS)
return 1;
return 0;
}
static void update_link_speed(unsigned short phy_addr)
{
unsigned int bmsr, bmcr, lpa, mac_cfg;
unsigned int speed, duplex;
if(!mii_link_ok(phy_addr))
{
EOUT("Link Down\n");
//goto result;
}
read_phy(phy_addr,MII_BMSR,&bmsr);
read_phy(phy_addr,MII_BMCR,&bmcr);
if (bmcr & BMCR_ANENABLE) /* AutoNegotiation is enabled */
{
if (!(bmsr & BMSR_ANEGCOMPLETE)) /* Do nothing - another interrupt generated when negotiation complete */
goto result;
read_phy(phy_addr, MII_LPA, &lpa);
if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF))
speed = SPEED_100;
else
speed = SPEED_10;
if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL))
duplex = DUPLEX_FULL;
else
duplex = DUPLEX_HALF;
}
else
{
speed = (bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10;
duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
}
/* Update the MAC */
mac_cfg = sep_emac_read(MAC_CTRL);
if (speed == SPEED_100)
{
mac_cfg |= 0x800; /* set speed 100 M */
//bmcr &=(~0x2000);
//write_phy(lp->phy_address, MII_BMCR, bmcr); //将dm9161的速度设为10M
if (duplex == DUPLEX_FULL) /* 100 Full Duplex */
mac_cfg |= 0x400;
else /* 100 Half Duplex */
mac_cfg &= (~0x400);
}
else
{
mac_cfg &= (~0x800); /* set speed 10 M */
if (duplex == DUPLEX_FULL) /* 10 Full Duplex */
mac_cfg |= 0x400;
else /* 10 Half Duplex */
mac_cfg &= (~0x400);
}
sep_emac_write(MAC_CTRL, mac_cfg);
rt_kprintf("Link now %i M-%s\n", speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex");
result:
mac_cfg = sep_emac_read(MAC_CTRL);
DBOUT("After mac_cfg=%d\n",mac_cfg);
return;
}
static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag);
/* RT-Thread Device Interface */
/* initialize the interface */
static rt_err_t rt_dm9161_init(rt_device_t dev)
{
unsigned int phyid1, phyid2;
int detected = -1;
unsigned long phy_id;
unsigned short phy_address = 0;
while ((detected != 0) && (phy_address < 32))
{
/* Read the PHY ID registers */
enable_mdi();
read_phy(phy_address, MII_PHYSID1, &phyid1);
read_phy(phy_address, MII_PHYSID2, &phyid2);
disable_mdi();
phy_id = (phyid1 << 16) | (phyid2 & 0xfff0);
switch (phy_id)
{
case MII_DM9161_ID: /* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */
case MII_DM9161A_ID: /* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */
case MII_RTL8201_ID: /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */
case MII_BCM5221_ID: /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */
case MII_DP83847_ID: /* National Semiconductor DP83847: */
case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */
case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */
{
enable_mdi();
#warning SHOULD SET MAC ADDR
//get_mac_address(dev); /* Get ethernet address and store it in dev->dev_addr */
update_mac_address(); /* Program ethernet address into MAC */
//用哈希寄存器比较当前群播地址，全双工，添加CRC校验，短数据帧进行填充
sep_emac_write(MAC_CTRL, 0xa413);
#warning SHOULD DETERMIN LINK SPEED
update_link_speed(phy_address);
dm9161_device.phy_addr = phy_address;
disable_mdi();
break;
}
}
phy_address++;
}
rt_dm9161_open(dev,0);
return RT_EOK;
}
/* ................................ MAC ................................ */
/*
* Initialize and start the Receiver and Transmit subsystems
*/
static void sepether_start()
{
int i;
unsigned int tempaddr;
sep_emac_write(MAC_TXBD_NUM,MAX_TX_DESCR);
//初始化发送和接收描述符
for (i = 0; i < MAX_TX_DESCR; i++)
{
tempaddr=(MAC_TX_BD+i*8);
sep_emac_write(tempaddr,0);
tempaddr=(MAC_TX_BD+i*8+4);
sep_emac_write(tempaddr,0);
}
for (i = 0; i < MAX_RX_DESCR; i++)
{
tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
sep_emac_write(tempaddr,0);
tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
sep_emac_write(tempaddr,0);
}
for (i = 0; i < MAX_RX_DESCR; i++)
{
tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
sep_emac_write(tempaddr,0xc000);
tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
sep_emac_write(tempaddr,ESRAM_BASE+ MAX_TX_DESCR*0x600+i*0x600);
}
/* Set the Wrap bit on the last descriptor */
tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8-8);
sep_emac_write(tempaddr,0xe000);
for (i = 0; i < MAX_TX_DESCR; i++)
{
tempaddr=(MAC_TX_BD+i*8);
sep_emac_write(tempaddr,0x0);
tempaddr=(MAC_TX_BD+i*8+4);
sep_emac_write(tempaddr,ESRAM_BASE+i*0x600);
}
return;
}
static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag)
{
unsigned int dsintr;
enable_mdi();
mask_irq(28);
sep_emac_write(MAC_INTMASK,0x0); //首先屏蔽中断
sepether_start();
/* Enable PHY interrupt */
*(volatile unsigned long*)GPIO_PORTA_DIR |= 0x0080 ; //1 stands for in
*(volatile unsigned long*)GPIO_PORTA_SEL |= 0x0080 ; //for common use
*(volatile unsigned long*)GPIO_PORTA_INCTL |= 0x0080; //中断输入方式
*(volatile unsigned long*)GPIO_PORTA_INTRCTL |= (0x3UL<<14); //中断类型为低电平解发
*(volatile unsigned long*)GPIO_PORTA_INTRCLR |= 0x0080; //清除中断
*(volatile unsigned long*)GPIO_PORTA_INTRCLR = 0x0000; //清除中断
rt_hw_interrupt_install(INTSRC_MAC, rt_dm9161_isr, RT_NULL);
enable_irq(INTSRC_EXINT7);
read_phy(dm9161_device.phy_addr, MII_DSINTR_REG, &dsintr);
dsintr = dsintr & ~0xf00; /* clear bits 8..11 */
write_phy(dm9161_device.phy_addr, MII_DSINTR_REG, dsintr);
update_link_speed(dm9161_device.phy_addr);
/************************************************************************************/
/* Enable MAC interrupts */
sep_emac_write(MAC_INTMASK,0xff); //open中断
sep_emac_write(MAC_INTSRC,0xff); //clear all mac irq
unmask_irq(28);
disable_mdi();
rt_kprintf("SEP4020 ethernet interface open!\n\r");
return RT_EOK;
}
static rt_err_t rt_dm9161_close(rt_device_t dev)
{
rt_kprintf("SEP4020 ethernet interface close!\n\r");
/* Disable Receiver and Transmitter */
disable_mdi();
#warning disable ether;
// INT_ENABLE(28);
/* Disable PHY interrupt */
// disable_phyirq(dev);
/* Disable MAC interrupts */
sep_emac_write(MAC_INTMASK,0); //屏蔽中断
// INT_DISABLE(28);
return RT_EOK;
}
static rt_size_t rt_dm9161_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_size_t rt_dm9161_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_err_t rt_dm9161_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
return RT_EOK;
}
/* ethernet device interface */
/* transmit packet. */
rt_err_t rt_dm9161_tx( rt_device_t dev, struct pbuf* p)
{
rt_uint8_t i;
rt_uint32_t length = 0;
struct pbuf *q;
unsigned long address;
unsigned long tmp_tx_bd;
/* lock DM9000 device */
// rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
/* disable dm9000a interrupt */
#warning SHOULD DISABLE INTEERUPT?
/*Search for available BD*/
for(i = 0;i<MAX_TX_DESCR;)
{
address = MAC_TX_BD + i*8;
tmp_tx_bd = sep_emac_read(address);
if(!(tmp_tx_bd & 0x8000))
{
if(i == (MAX_TX_DESCR-1))
i = 0;
else
i = i+1;
break;
}
if(i == MAX_TX_DESCR-1)
i = 0;
else
i++;
}
q = p;
while (q)
{
rt_memcpy((u8_t*)(ESRAM_BASE + i*0x600 + length),(u8_t*)q->payload,q->len);
length += q->len;
q = q->next;
}
#warning SHOULD NOTICE IT'S LENGTH
length = length << 16;
if(i == MAX_TX_DESCR - 1)
length |= 0xb800;
else
length |= 0x9800;
address = (MAC_TX_BD + i*8);
dm9161_device.tx_index = i;
sep_emac_write(address,length);
//wait for tranfer complete
while(!(sep_emac_read(address)&0x8000));
/* unlock DM9000 device */
// rt_sem_release(&sem_lock);
/* wait ack */
// rt_sem_take(&sem_ack, RT_WAITING_FOREVER);
return RT_EOK;
}
/* reception packet. */
struct pbuf *rt_dm9161_rx(rt_device_t dev)
{
unsigned int temp_rx_bd,address;
rt_uint32_t i = 0;
rt_uint32_t length;
unsigned char *p_recv;
struct pbuf* p = RT_NULL;
/* lock DM9000 device */
rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
while(1)
{
address = MAC_TX_BD + (MAX_TX_DESCR + i) * 8;
temp_rx_bd = sep_emac_read(address);
if(!(temp_rx_bd & 0x8000))
{
length = temp_rx_bd;
length = length >> 16;
p_recv = (unsigned char*)(ESRAM_BASE + (MAX_TX_DESCR + i) * 0x600);
p = pbuf_alloc(PBUF_LINK,length,PBUF_RAM);
if(p != RT_NULL)
{
struct pbuf* q;
rt_int32_t len;
for(q = p;q != RT_NULL;q = q->next)
{
rt_memcpy((rt_uint8_t*)(q->payload),p_recv,q->len);
}
}
else
{
rt_kprintf("Droping %d packet \n",length);
}
if(i == (MAX_RX_DESCR-1))
{
sep_emac_write(address,0xe000);
i = 0;
}
else
{
sep_emac_write(address,0xc000);
i++;
}
}
else
break;
}
rt_sem_release(&sem_lock);
return p;
}
void rt_hw_dm9161_init()
{
rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
dm9161_device.type = TYPE_DM9161;
dm9161_device.mode = DM9161_AUTO;
dm9161_device.packet_cnt = 0;
dm9161_device.queue_packet_len = 0;
/*
* SRAM Tx/Rx pointer automatically return to start address,
* Packet Transmitted, Packet Received
*/
#warning NOTICE:
//dm9161_device.imr_all = IMR_PAR | IMR_PTM | IMR_PRM;
dm9161_device.dev_addr[0] = 0x01;
dm9161_device.dev_addr[1] = 0x60;
dm9161_device.dev_addr[2] = 0x6E;
dm9161_device.dev_addr[3] = 0x11;
dm9161_device.dev_addr[4] = 0x02;
dm9161_device.dev_addr[5] = 0x0F;
dm9161_device.parent.parent.init = rt_dm9161_init;
dm9161_device.parent.parent.open = rt_dm9161_open;
dm9161_device.parent.parent.close = rt_dm9161_close;
dm9161_device.parent.parent.read = rt_dm9161_read;
dm9161_device.parent.parent.write = rt_dm9161_write;
dm9161_device.parent.parent.control = rt_dm9161_control;
dm9161_device.parent.parent.private = RT_NULL;
dm9161_device.parent.eth_rx = rt_dm9161_rx;
dm9161_device.parent.eth_tx = rt_dm9161_tx;
eth_device_init(&(dm9161_device.parent), "e0");
/* instal interrupt */
#warning TODO
//rt_hw_interrupt_install(INTEINT4_7, rt_dm9161_isr, RT_NULL);
//rt_hw_interrupt_umask(INTEINT4_7);
}
void dm9161a(void)
{
}
#ifdef RT_USING_FINSH
#include <finsh.h>
FINSH_FUNCTION_EXPORT(dm9161a, dm9161a register dump);
#endif

65
bsp/evb4020/src/dm9161.h Executable file
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#ifndef __DM9000_H__
#define __DM9000_H__
/*MACRO DEFINATIONS*/
#define SEP4020_ID_EMAC ((unsigned int) 28) // Ethernet Mac
/* Davicom 9161 PHY */
#define MII_DM9161_ID 0x0181b880
#define MII_DM9161A_ID 0x0181b8a0
/* Davicom specific registers */
#define MII_DSCR_REG 16
#define MII_DSCSR_REG 17
#define MII_DSINTR_REG 21
/* Intel LXT971A PHY */
#define MII_LXT971A_ID 0x001378E0
/* Intel specific registers */
#define MII_ISINTE_REG 18
#define MII_ISINTS_REG 19
#define MII_LEDCTRL_REG 20
/* Realtek RTL8201 PHY */
#define MII_RTL8201_ID 0x00008200
/* Broadcom BCM5221 PHY */
#define MII_BCM5221_ID 0x004061e0
/* Broadcom specific registers */
#define MII_BCMINTR_REG 26
/* National Semiconductor DP83847 */
#define MII_DP83847_ID 0x20005c30
/* Altima AC101L PHY */
#define MII_AC101L_ID 0x00225520
/* Micrel KS8721 PHY */
#define MII_KS8721_ID 0x00221610
/* ........................................................................ */
#define MAX_RBUFF_SZ 0x600 /* 1518 rounded up */
#define MAX_RX_DESCR 20 /* max number of receive buffers */
#define MAX_TBUFF_SZ 0x600 /* 1518 rounded up */
#define MAX_TX_DESCR 20 /* max number of receive buffers */
#define EMAC_DESC_DONE 0x00000001 /* bit for if DMA is done */
#define EMAC_DESC_WRAP 0x00000002 /* bit for wrap */
#define EMAC_BROADCAST 0x80000000 /* broadcast address */
#define EMAC_MULTICAST 0x40000000 /* multicast address */
#define EMAC_UNICAST 0x20000000 /* unicast address */
#define DM9161_inb(r) (*(volatile rt_uint8_t *)r)
#define DM9161_outb(r, d) (*(volatile rt_uint8_t *)r = d)
#define DM9161_inw(r) (*(volatile rt_uint16_t *)r)
#define DM9161_outw(r, d) (*(volatile rt_uint16_t *)r = d)
void rt_hw_dm9616_init(void);
#endif

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bsp/evb4020/src/export.c Executable file
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#include <rtthread.h>
#include <finsh.h>
void testkkkk(void)
{
rt_kprintf("Hello wangmengmeng!\n");
return;
}
FINSH_FUNCTION_EXPORT(testkkkk,a test);

130
bsp/evb4020/src/mii.h Executable file
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#ifndef __MII_H__
#define __MII_H__
/* Generic MII registers. */
#define MII_BMCR 0x00 /* Basic mode control register */
#define MII_BMSR 0x01 /* Basic mode status register */
#define MII_PHYSID1 0x02 /* PHYS ID 1 */
#define MII_PHYSID2 0x03 /* PHYS ID 2 */
#define MII_ADVERTISE 0x04 /* Advertisement control reg */
#define MII_LPA 0x05 /* Link partner ability reg */
#define MII_EXPANSION 0x06 /* Expansion register */
#define MII_CTRL1000 0x09 /* 1000BASE-T control */
#define MII_STAT1000 0x0a /* 1000BASE-T status */
#define MII_ESTATUS 0x0f /* Extended Status */
#define MII_DCOUNTER 0x12 /* Disconnect counter */
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
#define MII_RERRCOUNTER 0x15 /* Receive error counter */
#define MII_SREVISION 0x16 /* Silicon revision */
#define MII_RESV1 0x17 /* Reserved... */
#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
#define MII_PHYADDR 0x19 /* PHY address */
#define MII_RESV2 0x1a /* Reserved... */
#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
#define MII_NCONFIG 0x1c /* Network interface config */
/* Basic mode control register. */
#define BMCR_RESV 0x003f /* Unused... */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_CTST 0x0080 /* Collision test */
#define BMCR_FULLDPLX 0x0100 /* Full duplex */
#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
#define BMCR_RESET 0x8000 /* Reset the DP83840 */
/* Basic mode status register. */
#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
#define BMSR_JCD 0x0002 /* Jabber detected */
#define BMSR_LSTATUS 0x0004 /* Link status */
#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
#define BMSR_RFAULT 0x0010 /* Remote fault detected */
#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
#define BMSR_RESV 0x00c0 /* Unused... */
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
#define BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */
#define BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */
#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
/* Advertisement control register. */
#define ADVERTISE_SLCT 0x001f /* Selector bits */
#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
#define ADVERTISE_RESV 0x1000 /* Unused... */
#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
ADVERTISE_CSMA)
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
ADVERTISE_100HALF | ADVERTISE_100FULL)
/* Link partner ability register. */
#define LPA_SLCT 0x001f /* Same as advertise selector */
#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/
#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
#define LPA_PAUSE_CAP 0x0400 /* Can pause */
#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
#define LPA_RESV 0x1000 /* Unused... */
#define LPA_RFAULT 0x2000 /* Link partner faulted */
#define LPA_LPACK 0x4000 /* Link partner acked us */
#define LPA_NPAGE 0x8000 /* Next page bit */
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
/* Expansion register for auto-negotiation. */
#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */
#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */
#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */
#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
#define EXPANSION_RESV 0xffe0 /* Unused... */
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
/* N-way test register. */
#define NWAYTEST_RESV1 0x00ff /* Unused... */
#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
#define NWAYTEST_RESV2 0xfe00 /* Unused... */
/* 1000BASE-T Control register */
#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
/* 1000BASE-T Status register */
#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */
#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */
#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */
#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */
#endif