LPC55S69: Integration with TF-M

This patch enables TF-M running on secure side and RT-Thread running on
NS side by:

1. Updates the VTOR address
2. Remove a HW initialization which is already done in TF-M
3. Add a new project and linker script to build RTT in NS

Note:
    There are no secure service calls to TF-M in this patch

Change-Id: I4023a082cfb5c8df8a4f0ecc7ffee850daaadeb4
Signed-off-by: Kevin Peng <kevin.peng@arm.com>
Signed-off-by: Karl Zhang <karl.zhang@arm.com>

bsp/lpc55sxx/lpc55s69_nxp_evk/board/board.c

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -10,6 +11,7 @@
  * 2010-05-02     Aozima       update CMSIS to 130
  * 2017-08-02     XiaoYang     porting to LPC54608 bsp
  * 2019-08-05     Magicoe      porting to LPC55S69-EVK bsp
+ * 2020-01-01     Karl         Add RT_USING_TFM support
  */
 
 #include <rthw.h>
@@ -56,11 +58,20 @@ void rt_hw_board_init()
     /* Set the Vector Table base location at 0x10000000 */
     SCB->VTOR  = (0x10000000 & NVIC_VTOR_MASK);
 #else  /* VECT_TAB_FLASH  */
+
+#ifdef RT_USING_TFM
+    /* Set the Vector Table base location at 0x00020000 when RTT with TF-M*/
+    SCB->VTOR  = (0x00020000 & NVIC_VTOR_MASK);
+#else
     /* Set the Vector Table base location at 0x00000000 */
     SCB->VTOR  = (0x00000000 & NVIC_VTOR_MASK);
 #endif
+#endif
 
+#ifndef RT_USING_TFM
+    /* This init has finished in secure side of TF-M  */
     BOARD_BootClockPLL150M();
+#endif
     //BOARD_BootClockFROHF96M();
     
     /* init systick  1 systick = 1/(100M / 100) 100¸ösystick = 1s*/

bsp/lpc55sxx/lpc55s69_nxp_evk/board/linker_scripts/LPC55S69_cm33_core0_flash_ns_mdk.scf

@@ -0,0 +1,110 @@
+#!armclang --target=arm-arm-none-eabi -march=armv8-m.main -E -x c
+/*
+** ###################################################################
+**     Processors:          LPC55S69JBD100_cm33_core0
+**                          LPC55S69JET98_cm33_core0
+**
+**     Compiler:            Keil ARM C/C++ Compiler
+**     Reference manual:    LPC55xx/LPC55Sxx User manual Rev.0.2  15 Aug 2018
+**     Version:             rev. 1.0, 2018-08-22
+**     Build:               b181008
+**
+**     Abstract:
+**         Linker file for the Keil ARM C/C++ Compiler
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2018 NXP
+**     All rights reserved.
+**
+**     SPDX-License-Identifier: BSD-3-Clause
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+/*
+ * Original code taken from RTT project at:
+ * https://github.com/RT-Thread/rt-thread
+ * File: bsp/lpc55sxx/lpc55s69_nxp_evk/board/linker_scripts/LPC55S69_cm33_core0_flash_mdk.scf
+ * Git SHA of the original version: 64945ba882d651a14933eb4e7b3d93d10d6daae1
+ */
+
+/* USB BDT size */
+#define usb_bdt_size                   0x0
+/* Sizes */
+#if (defined(__stack_size__))
+  #define Stack_Size                   __stack_size__
+#else
+  #define Stack_Size                   0x1000
+#endif
+
+#if (defined(__heap_size__))
+  #define Heap_Size                    __heap_size__
+#else
+  #define Heap_Size                    0x1000
+#endif
+
+#define  m_interrupts_start            0x00000000
+#define  m_interrupts_size             0x00000200
+
+#define  m_text_start                  0x00000200
+#define  m_text_size                   0x00071E00
+
+#define  m_core1_image_start           0x00072000
+#define  m_core1_image_size            0x00026000
+
+#if (defined(__use_shmem__))
+  #define  m_data_start                0x20000000
+  #define  m_data_size                 0x00031800
+  #define  m_rpmsg_sh_mem_start        0x20031800
+  #define  m_rpmsg_sh_mem_size         0x00001800
+#else
+  #define  m_data_start                0x20000000
+  #define  m_data_size                 0x00033000
+#endif
+
+#define  m_usb_sram_start              0x40100000
+#define  m_usb_sram_size               0x00004000
+
+
+LR_m_text m_interrupts_start m_interrupts_size+m_text_size {   ; load region size_region
+
+  VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
+    * (RESET,+FIRST)
+  }
+
+  ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
+    * (InRoot$$Sections)
+    * (+RO)
+  }
+
+#if (defined(__use_shmem__))
+  RPMSG_SH_MEM m_rpmsg_sh_mem_start UNINIT m_rpmsg_sh_mem_size { ; Shared memory used by RPMSG
+    * (rpmsg_sh_mem_section)
+  }
+#endif
+
+  RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
+    * (+RW +ZI)
+  }
+  ARM_LIB_HEAP +0 EMPTY Heap_Size {    ; Heap region growing up
+  }
+  ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
+  }
+
+  RW_m_usb_bdt m_usb_sram_start UNINIT usb_bdt_size {
+    * (m_usb_bdt)
+  }
+
+  RW_m_usb_ram (m_usb_sram_start + usb_bdt_size) UNINIT (m_usb_sram_size - usb_bdt_size) {
+    * (m_usb_global)
+  }
+}
+
+LR_CORE1_IMAGE m_core1_image_start {
+  CORE1_REGION m_core1_image_start m_core1_image_size {
+    *(M0CODE)
+  }
+}