libs/rt-thread
libs
/
rt-thread
4
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

使用 __ARMCC_VERSION 代替 __CC_ARM 用以支持AC6编译 (#6436) 

将__CC_ARM 替换成 __ARMCC_VERSION 用以支持AC6编译，通过gd32f303测试。
This commit is contained in:
charlown 2022-09-16 20:13:40 +08:00 committed by GitHub
parent 981e721c3b
commit 5ed3e81490
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
11 changed files with 11 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
bsp/gd32/arm/gd32103c-eval/board/board.h
View File

@ -30,7 +30,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __CC_ARM #ifdef __ARMCC_VERSION
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32/arm/gd32105c-eval/board/board.h
View File

@ -30,7 +30,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __CC_ARM #ifdef __ARMCC_VERSION
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32/arm/gd32105r-start/board/board.h
View File

@ -29,7 +29,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __CC_ARM #ifdef __ARMCC_VERSION
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32/arm/gd32107c-eval/board/board.h
View File

@ -30,7 +30,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __CC_ARM #ifdef __ARMCC_VERSION
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32/arm/gd32205r-start/board/board.h
View File

@ -30,7 +30,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __CC_ARM #ifdef __ARMCC_VERSION
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32/arm/gd32207i-eval/board/board.h
View File

@ -30,7 +30,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __CC_ARM #ifdef __ARMCC_VERSION
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32/arm/gd32303e-eval/board/board.h
View File

@ -30,7 +30,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __CC_ARM #ifdef __ARMCC_VERSION
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32/arm/gd32305r-start/board/board.h
View File

@ -30,7 +30,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __CC_ARM #ifdef __ARMCC_VERSION
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32/arm/gd32307e-start/board/board.h
View File

@ -30,7 +30,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __CC_ARM #ifdef __ARMCC_VERSION
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32/arm/gd32407v-start/board/board.h
View File

@ -30,7 +30,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __CC_ARM #ifdef __ARMCC_VERSION
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32/arm/gd32450z-eval/board/board.h
View File

@ -30,7 +30,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __CC_ARM #ifdef __ARMCC_VERSION
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__