[bsp][realview-a8] delete realview-a8 bsp
This commit is contained in:
yangjie
parent
9c784f9c1f
commit
5ea61fca5a
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# Object files
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*.o
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*.bin
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*.pyc
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*.map
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*.elf
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# Libraries
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*.lib
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*.a
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# Shared objects (inc. Windows DLLs)
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*.dll
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*.so
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*.so.*
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*.dylib
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# Executables
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*.exe
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*.out
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*.app
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.scons*
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# directory
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build/*
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VMM BSP on realview-pb-a8
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This is a demo program that run RT-Thread VMM(Virtual Machine Module) on
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the single core RealView-PB-A8.
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To compile it, you need buildroot and a linux 3.8.x source tree. You should
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build the patched Linux kernel and builroot before building the VMM. This
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directory has a "mk.sh" helper script to build both the RT-Thread, Linux kernel
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module and the ramdisk.
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Linux console is serial0 and RT-Thread console is serial1.
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# for module compiling
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import os
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Import('RTT_ROOT')
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cwd = str(Dir('#'))
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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from building import *
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TARGET = 'rtthread-realview.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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env['ASCOM'] = env['ASPPCOM']
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Export('RTT_ROOT')
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Export('rtconfig')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT)
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if GetDepend('RT_USING_VMM'):
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if os.system('{cppcmd} -P -C -E -I. -D__ASSEMBLY__ {ldfile}.S -o {ldfile}'.format(
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cppcmd = os.path.join(rtconfig.EXEC_PATH, 'arm-none-eabi-gcc'),
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ldfile = rtconfig.LINK_SCRIPT)) != 0:
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print('failed to generate linker script %s' % rtconfig.LINK_SCRIPT)
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sys.exit(255)
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# if the linker script changed, relink the target
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Depends(TARGET, rtconfig.LINK_SCRIPT)
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else:
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# we should use none-vmm link script
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link_flags = str(env['LINKFLAGS'])
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env['LINKFLAGS'] = link_flags.replace('_vmm.lds', '.lds')
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# make a building
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DoBuilding(TARGET, objs)
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Import('RTT_ROOT')
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Import('rtconfig')
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from building import *
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cwd = os.path.join(str(Dir('#')), 'applications')
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src = Glob('*.c')
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CPPPATH = [cwd, str(Dir('#'))]
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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@ -1,28 +0,0 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2012-11-20 Bernard the first version
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*/
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#include <rtthread.h>
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void init_thread(void* parameter)
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{
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rt_components_init();
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}
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int rt_application_init()
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{
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rt_thread_t tid;
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tid = rt_thread_create("init", init_thread, RT_NULL,
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1024, RT_THREAD_PRIORITY_MAX/3, 10);
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if (tid != RT_NULL) rt_thread_startup(tid);
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return 0;
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}
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2012-12-05 Bernard the first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <board.h>
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extern int rt_application_init(void);
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extern void rt_hw_board_init(void);
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/**
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* This function will startup RT-Thread RTOS.
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*/
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void rtthread_startup(void)
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{
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/* initialzie hardware interrupt */
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rt_hw_interrupt_init();
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/* initialize board */
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rt_hw_board_init();
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/* show RT-Thread version */
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rt_show_version();
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/* initialize memory system */
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#ifdef RT_USING_HEAP
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rt_system_heap_init(HEAP_BEGIN, HEAP_END);
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#endif
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/* initialize scheduler system */
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rt_system_scheduler_init();
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/* initialize timer and soft timer thread */
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rt_system_timer_init();
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rt_system_timer_thread_init();
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/* initialize application */
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rt_application_init();
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/* initialize idle thread */
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rt_thread_idle_init();
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/* start scheduler */
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rt_system_scheduler_start();
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/* never reach here */
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return ;
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}
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int main(void)
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{
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/* disable interrupt first */
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rt_hw_interrupt_disable();
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/* invoke rtthread_startup */
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rtthread_startup();
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return 0;
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}
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#!/bin/sh -e
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scons -j12
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qemu-system-arm -M realview-pb-a8 -kernel rtthread-realview.elf -serial vc -serial stdio
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import copy
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Import('RTT_ROOT')
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Import('rtconfig')
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from building import *
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cwd = GetCurrentDir()
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src = Glob('*.c')
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CPPPATH = [cwd]
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2012-11-20 Bernard the first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "board.h"
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#define TIMER_LOAD(hw_base) __REG32(hw_base + 0x00)
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#define TIMER_VALUE(hw_base) __REG32(hw_base + 0x04)
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#define TIMER_CTRL(hw_base) __REG32(hw_base + 0x08)
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#define TIMER_CTRL_ONESHOT (1 << 0)
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#define TIMER_CTRL_32BIT (1 << 1)
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#define TIMER_CTRL_DIV1 (0 << 2)
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#define TIMER_CTRL_DIV16 (1 << 2)
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#define TIMER_CTRL_DIV256 (2 << 2)
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#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable (versatile only) */
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#define TIMER_CTRL_PERIODIC (1 << 6)
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#define TIMER_CTRL_ENABLE (1 << 7)
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#define TIMER_INTCLR(hw_base) __REG32(hw_base + 0x0c)
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#define TIMER_RIS(hw_base) __REG32(hw_base + 0x10)
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#define TIMER_MIS(hw_base) __REG32(hw_base + 0x14)
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#define TIMER_BGLOAD(hw_base) __REG32(hw_base + 0x18)
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#define SYS_CTRL __REG32(REALVIEW_SCTL_BASE)
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#ifdef RT_USING_VMM
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#include <vmm.h>
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static rt_uint32_t timer_hw_base = 0;
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#define TIMER_HW_BASE (timer_hw_base)
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#else
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#define TIMER_HW_BASE REALVIEW_TIMER2_3_BASE
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#endif
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void rt_hw_timer_ack(void)
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{
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/* clear interrupt */
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TIMER_INTCLR(TIMER_HW_BASE) = 0x01;
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}
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static void rt_hw_timer_isr(int vector, void *param)
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{
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rt_tick_increase();
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rt_hw_timer_ack();
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}
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int rt_hw_timer_init(void)
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{
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rt_uint32_t val;
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#ifdef RT_USING_VMM
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{
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rt_uint32_t sys_ctrl;
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sys_ctrl = vmm_find_iomap("SYS_CTRL");
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__REG32(sys_ctrl) |= REALVIEW_REFCLK;
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}
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timer_hw_base = vmm_find_iomap("TIMER");
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#else
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SYS_CTRL |= REALVIEW_REFCLK;
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#endif
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/* Setup Timer0 for generating irq */
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val = TIMER_CTRL(TIMER_HW_BASE);
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val &= ~TIMER_CTRL_ENABLE;
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val |= (TIMER_CTRL_32BIT | TIMER_CTRL_PERIODIC | TIMER_CTRL_IE);
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TIMER_CTRL(TIMER_HW_BASE) = val;
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TIMER_LOAD(TIMER_HW_BASE) = 1000;
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/* enable timer */
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TIMER_CTRL(TIMER_HW_BASE) |= TIMER_CTRL_ENABLE;
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rt_hw_interrupt_install(IRQ_PBA8_TIMER2_3, rt_hw_timer_isr, RT_NULL, "tick");
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rt_hw_interrupt_umask(IRQ_PBA8_TIMER2_3);
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return 0;
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}
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INIT_BOARD_EXPORT(rt_hw_timer_init);
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/**
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* This function will initialize beaglebone board
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*/
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void rt_hw_board_init(void)
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{
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rt_components_board_init();
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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}
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/*@}*/
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@ -1,28 +0,0 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2013-07-06 Bernard the first version
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*/
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include <realview.h>
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#if defined(__CC_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void*)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif defined(__GNUC__)
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extern int __bss_end;
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#define HEAP_BEGIN ((void*)&__bss_end)
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#endif
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#define HEAP_END (void*)(0x70000000 + 8 * 1024 * 1024)
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void rt_hw_board_init(void);
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#endif
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#ifndef __AM33XX_H__
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#define __AM33XX_H__
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#define __REG32(x) (*((volatile unsigned int *)(x)))
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#define __REG16(x) (*((volatile unsigned short *)(x)))
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/*
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* Peripheral addresses
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*/
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#define REALVIEW_UART0_BASE 0x10009000 /* UART 0 */
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#define REALVIEW_UART1_BASE 0x1000A000 /* UART 1 */
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#define REALVIEW_UART2_BASE 0x1000B000 /* UART 2 */
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#define REALVIEW_UART3_BASE 0x1000C000 /* UART 3 */
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#define REALVIEW_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
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#define REALVIEW_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
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#define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */
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#define REALVIEW_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
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#define REALVIEW_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
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#define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */
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#define REALVIEW_RTC_BASE 0x10017000 /* Real Time Clock */
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#define REALVIEW_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
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#define REALVIEW_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
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#define REALVIEW_SCTL_BASE 0x1001A000 /* System Controller */
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#define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */
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#define REALVIEW_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
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#define REALVIEW_DMC_BASE 0x100E0000 /* DMC configuration */
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#define REALVIEW_SMC_BASE 0x100E1000 /* SMC configuration */
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#define REALVIEW_CAN_BASE 0x100E2000 /* CAN bus */
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#define REALVIEW_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
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#define REALVIEW_FLASH0_BASE 0x40000000
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#define REALVIEW_FLASH0_SIZE SZ_64M
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#define REALVIEW_FLASH1_BASE 0x44000000
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#define REALVIEW_FLASH1_SIZE SZ_64M
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#define REALVIEW_ETH_BASE 0x4E000000 /* Ethernet */
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#define REALVIEW_USB_BASE 0x4F000000 /* USB */
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#define REALVIEW_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
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#define REALVIEW_LT_BASE 0xC0000000 /* Logic Tile expansion */
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#define REALVIEW_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
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#define REALVIEW_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
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#define REALVIEW_SYS_PLD_CTRL1 0x74
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/*
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* PCI regions
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*/
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#define REALVIEW_PCI_BASE 0x90040000 /* PCI-X Unit base */
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#define REALVIEW_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
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#define REALVIEW_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
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#define REALVIEW_PCI_BASE_SIZE 0x10000 /* 16 Kb */
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#define REALVIEW_PCI_IO_SIZE 0x1000 /* 4 Kb */
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#define REALVIEW_PCI_MEM_SIZE 0x20000000 /* 512 MB */
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/*
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* Memory definitions
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*/
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#define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)... */
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#define REALVIEW_BOOT_ROM_HI 0x30000000
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#define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */
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#define REALVIEW_BOOT_ROM_SIZE SZ_64M
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#define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */
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#define REALVIEW_SSRAM_SIZE SZ_2M
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/*
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* SDRAM
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*/
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#define REALVIEW_SDRAM_BASE 0x00000000
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/*
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* Logic expansion modules
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*
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*/
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#define IRQ_PBA8_GIC_START 32
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/*
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* PB-A8 on-board gic irq sources
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*/
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#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
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#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
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#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
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#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
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#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
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#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
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#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
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/* 9 reserved */
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#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
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#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
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#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
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#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
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#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
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#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
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#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
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#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
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#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
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#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
#define IRQ_PBA8_PMU (IRQ_PBA8_GIC_START + 47) /* Cortex-A8 PMU */
|
||||
|
||||
/* ... */
|
||||
#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
|
||||
#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
|
||||
#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
|
||||
#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
|
||||
|
||||
#define IRQ_PBA8_SMC -1
|
||||
#define IRQ_PBA8_SCTL -1
|
||||
|
||||
#define NR_GIC_PBA8 1
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PBA8
|
||||
*/
|
||||
#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
|
||||
|
||||
/* ------------------------------------------------------------------------
|
||||
* RealView Registers
|
||||
* ------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
#define REALVIEW_SYS_ID_OFFSET 0x00
|
||||
#define REALVIEW_SYS_SW_OFFSET 0x04
|
||||
#define REALVIEW_SYS_LED_OFFSET 0x08
|
||||
#define REALVIEW_SYS_OSC0_OFFSET 0x0C
|
||||
|
||||
#define REALVIEW_SYS_OSC1_OFFSET 0x10
|
||||
#define REALVIEW_SYS_OSC2_OFFSET 0x14
|
||||
#define REALVIEW_SYS_OSC3_OFFSET 0x18
|
||||
#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */
|
||||
|
||||
#define REALVIEW_SYS_LOCK_OFFSET 0x20
|
||||
#define REALVIEW_SYS_100HZ_OFFSET 0x24
|
||||
#define REALVIEW_SYS_CFGDATA1_OFFSET 0x28
|
||||
#define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C
|
||||
#define REALVIEW_SYS_FLAGS_OFFSET 0x30
|
||||
#define REALVIEW_SYS_FLAGSSET_OFFSET 0x30
|
||||
#define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34
|
||||
#define REALVIEW_SYS_NVFLAGS_OFFSET 0x38
|
||||
#define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38
|
||||
#define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C
|
||||
#define REALVIEW_SYS_RESETCTL_OFFSET 0x40
|
||||
#define REALVIEW_SYS_PCICTL_OFFSET 0x44
|
||||
#define REALVIEW_SYS_MCI_OFFSET 0x48
|
||||
#define REALVIEW_SYS_FLASH_OFFSET 0x4C
|
||||
#define REALVIEW_SYS_CLCD_OFFSET 0x50
|
||||
#define REALVIEW_SYS_CLCDSER_OFFSET 0x54
|
||||
#define REALVIEW_SYS_BOOTCS_OFFSET 0x58
|
||||
#define REALVIEW_SYS_24MHz_OFFSET 0x5C
|
||||
#define REALVIEW_SYS_MISC_OFFSET 0x60
|
||||
#define REALVIEW_SYS_IOSEL_OFFSET 0x70
|
||||
#define REALVIEW_SYS_PROCID_OFFSET 0x84
|
||||
#define REALVIEW_SYS_TEST_OSC0_OFFSET 0xC0
|
||||
#define REALVIEW_SYS_TEST_OSC1_OFFSET 0xC4
|
||||
#define REALVIEW_SYS_TEST_OSC2_OFFSET 0xC8
|
||||
#define REALVIEW_SYS_TEST_OSC3_OFFSET 0xCC
|
||||
#define REALVIEW_SYS_TEST_OSC4_OFFSET 0xD0
|
||||
|
||||
#define REALVIEW_SYS_BASE 0x10000000
|
||||
#define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET)
|
||||
#define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET)
|
||||
#define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET)
|
||||
#define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET)
|
||||
#define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET)
|
||||
|
||||
#define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET)
|
||||
#define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET)
|
||||
#define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET)
|
||||
#define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET)
|
||||
#define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET)
|
||||
#define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET)
|
||||
#define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET)
|
||||
#define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET)
|
||||
#define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET)
|
||||
#define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET)
|
||||
#define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET)
|
||||
#define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET)
|
||||
#define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET)
|
||||
#define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET)
|
||||
#define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET)
|
||||
#define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET)
|
||||
#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)
|
||||
#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)
|
||||
#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET)
|
||||
#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)
|
||||
#define REALVIEW_SYS_PROCID (REALVIEW_SYS_BASE + REALVIEW_SYS_PROCID_OFFSET)
|
||||
#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
|
||||
#define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET)
|
||||
#define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET)
|
||||
#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
|
||||
#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
|
||||
|
||||
#define REALVIEW_SYS_CTRL_LED (1 << 0)
|
||||
|
||||
/* ------------------------------------------------------------------------
|
||||
* RealView control registers
|
||||
* ------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*
|
||||
* REALVIEW_IDFIELD
|
||||
*
|
||||
* 31:24 = manufacturer (0x41 = ARM)
|
||||
* 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
|
||||
* 15:12 = FPGA (0x3 = XVC600 or XVC600E)
|
||||
* 11:4 = build value
|
||||
* 3:0 = revision number (0x1 = rev B (AHB))
|
||||
*/
|
||||
|
||||
/*
|
||||
* REALVIEW_SYS_LOCK
|
||||
* control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
|
||||
* SYS_CLD, SYS_BOOTCS
|
||||
*/
|
||||
#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
|
||||
#define REALVIEW_SYS_LOCKVAL 0xA05F
|
||||
#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
|
||||
|
||||
/*
|
||||
* REALVIEW_SYS_FLASH
|
||||
*/
|
||||
#define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
|
||||
|
||||
/*
|
||||
* REALVIEW_INTREG
|
||||
* - used to acknowledge and control MMCI and UART interrupts
|
||||
*/
|
||||
#define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
|
||||
#define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
|
||||
#define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */
|
||||
/* write 1 to acknowledge and clear */
|
||||
#define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
|
||||
#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
|
||||
|
||||
/*
|
||||
* LED settings, bits [7:0]
|
||||
*/
|
||||
#define REALVIEW_SYS_LED0 (1 << 0)
|
||||
#define REALVIEW_SYS_LED1 (1 << 1)
|
||||
#define REALVIEW_SYS_LED2 (1 << 2)
|
||||
#define REALVIEW_SYS_LED3 (1 << 3)
|
||||
#define REALVIEW_SYS_LED4 (1 << 4)
|
||||
#define REALVIEW_SYS_LED5 (1 << 5)
|
||||
#define REALVIEW_SYS_LED6 (1 << 6)
|
||||
#define REALVIEW_SYS_LED7 (1 << 7)
|
||||
|
||||
#define ALL_LEDS 0xFF
|
||||
|
||||
#define LED_BANK REALVIEW_SYS_LED
|
||||
|
||||
/*
|
||||
* Control registers
|
||||
*/
|
||||
#define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */
|
||||
#define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */
|
||||
#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
|
||||
#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
|
||||
|
||||
/*
|
||||
* Clean base - dummy
|
||||
*
|
||||
*/
|
||||
#define CLEAN_BASE REALVIEW_BOOT_ROM_HI
|
||||
|
||||
/*
|
||||
* System controller bit assignment
|
||||
*/
|
||||
#define REALVIEW_REFCLK 0
|
||||
#define REALVIEW_TIMCLK 1
|
||||
|
||||
#define REALVIEW_TIMER1_EnSel 15
|
||||
#define REALVIEW_TIMER2_EnSel 17
|
||||
#define REALVIEW_TIMER3_EnSel 19
|
||||
#define REALVIEW_TIMER4_EnSel 21
|
||||
|
||||
/*
|
||||
*struct rt_hw_register
|
||||
*{
|
||||
* unsigned long r0;
|
||||
* unsigned long r1;
|
||||
* unsigned long r2;
|
||||
* unsigned long r3;
|
||||
* unsigned long r4;
|
||||
* unsigned long r5;
|
||||
* unsigned long r6;
|
||||
* unsigned long r7;
|
||||
* unsigned long r8;
|
||||
* unsigned long r9;
|
||||
* unsigned long r10;
|
||||
* unsigned long fp;
|
||||
* unsigned long ip;
|
||||
* unsigned long sp;
|
||||
* unsigned long lr;
|
||||
* unsigned long pc;
|
||||
* unsigned long cpsr;
|
||||
* unsigned long ORIG_r0;
|
||||
*};
|
||||
*/
|
||||
|
||||
#include <armv7.h>
|
||||
|
||||
/* Interrupt Control Interface */
|
||||
#define ARM_GIC_CPU_BASE 0x1E000000
|
||||
|
||||
/* number of interrupts on board */
|
||||
#define ARM_GIC_NR_IRQS 96
|
||||
/* only one GIC available */
|
||||
#define ARM_GIC_MAX_NR 1
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -1,185 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2013-03-30 Bernard the first verion
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#include "serial.h"
|
||||
#ifdef RT_USING_VMM
|
||||
#include <vmm.h>
|
||||
#endif
|
||||
|
||||
struct hw_uart_device
|
||||
{
|
||||
rt_uint32_t hw_base;
|
||||
rt_uint32_t irqno;
|
||||
};
|
||||
|
||||
#define UART_DR(base) __REG32(base + 0x00)
|
||||
#define UART_FR(base) __REG32(base + 0x18)
|
||||
#define UART_CR(base) __REG32(base + 0x30)
|
||||
#define UART_IMSC(base) __REG32(base + 0x38)
|
||||
#define UART_ICR(base) __REG32(base + 0x44)
|
||||
|
||||
#define UARTFR_RXFE 0x10
|
||||
#define UARTFR_TXFF 0x20
|
||||
#define UARTIMSC_RXIM 0x10
|
||||
#define UARTIMSC_TXIM 0x20
|
||||
#define UARTICR_RXIC 0x10
|
||||
#define UARTICR_TXIC 0x20
|
||||
|
||||
static void rt_hw_uart_isr(int irqno, void *param)
|
||||
{
|
||||
struct rt_serial_device *serial = (struct rt_serial_device *)param;
|
||||
|
||||
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
|
||||
static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
|
||||
{
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
|
||||
{
|
||||
struct hw_uart_device *uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct hw_uart_device *)serial->parent.user_data;
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_CLR_INT:
|
||||
/* disable rx irq */
|
||||
UART_IMSC(uart->hw_base) &= ~UARTIMSC_RXIM;
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_SET_INT:
|
||||
/* enable rx irq */
|
||||
UART_IMSC(uart->hw_base) |= UARTIMSC_RXIM;
|
||||
rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, serial, "uart");
|
||||
rt_hw_interrupt_umask(uart->irqno);
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static int uart_putc(struct rt_serial_device *serial, char c)
|
||||
{
|
||||
struct hw_uart_device *uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct hw_uart_device *)serial->parent.user_data;
|
||||
|
||||
while (UART_FR(uart->hw_base) & UARTFR_TXFF);
|
||||
UART_DR(uart->hw_base) = c;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int uart_getc(struct rt_serial_device *serial)
|
||||
{
|
||||
int ch;
|
||||
struct hw_uart_device *uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct hw_uart_device *)serial->parent.user_data;
|
||||
|
||||
ch = -1;
|
||||
if (!(UART_FR(uart->hw_base) & UARTFR_RXFE))
|
||||
{
|
||||
ch = UART_DR(uart->hw_base) & 0xff;
|
||||
}
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
static const struct rt_uart_ops _uart_ops =
|
||||
{
|
||||
uart_configure,
|
||||
uart_control,
|
||||
uart_putc,
|
||||
uart_getc,
|
||||
};
|
||||
|
||||
#ifdef RT_USING_UART0
|
||||
/* UART device driver structure */
|
||||
static struct hw_uart_device _uart0_device =
|
||||
{
|
||||
REALVIEW_UART0_BASE,
|
||||
IRQ_PBA8_UART0,
|
||||
};
|
||||
static struct rt_serial_device _serial0;
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_UART1
|
||||
/* UART1 device driver structure */
|
||||
static struct hw_uart_device _uart1_device =
|
||||
{
|
||||
REALVIEW_UART1_BASE,
|
||||
IRQ_PBA8_UART1,
|
||||
};
|
||||
static struct rt_serial_device _serial1;
|
||||
#endif
|
||||
|
||||
int uart_isr_test(void)
|
||||
{
|
||||
return uart_getc(&_serial1);
|
||||
}
|
||||
|
||||
int rt_hw_uart_init(void)
|
||||
{
|
||||
struct hw_uart_device *uart;
|
||||
struct serial_configure config;
|
||||
|
||||
config.baud_rate = BAUD_RATE_115200;
|
||||
config.bit_order = BIT_ORDER_LSB;
|
||||
config.data_bits = DATA_BITS_8;
|
||||
config.parity = PARITY_NONE;
|
||||
config.stop_bits = STOP_BITS_1;
|
||||
config.invert = NRZ_NORMAL;
|
||||
config.bufsz = RT_SERIAL_RB_BUFSZ;
|
||||
|
||||
#ifdef RT_USING_UART0
|
||||
uart = &_uart0_device;
|
||||
#ifdef RT_USING_VMM
|
||||
uart->hw_base = vmm_find_iomap("UART0");
|
||||
#endif
|
||||
|
||||
_serial0.ops = &_uart_ops;
|
||||
_serial0.config = config;
|
||||
|
||||
/* register UART1 device */
|
||||
rt_hw_serial_register(&_serial0, "uart0",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
uart);
|
||||
/* enable Rx and Tx of UART */
|
||||
UART_CR(uart->hw_base) = (1 << 0) | (1 << 8) | (1 << 9);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_UART1
|
||||
uart = &_uart1_device;
|
||||
#ifdef RT_USING_VMM
|
||||
uart->hw_base = vmm_find_iomap("UART1");
|
||||
#endif
|
||||
_serial1.ops = &_uart_ops;
|
||||
_serial1.config = config;
|
||||
|
||||
/* register UART1 device */
|
||||
rt_hw_serial_register(&_serial1, "uart1",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
|
||||
/* enable Rx and Tx of UART */
|
||||
UART_CR(uart->hw_base) = (1 << 0) | (1 << 8) | (1 << 9);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_uart_init);
|
||||
|
|
@ -1,20 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2013-03-30 Bernard the first verion
|
||||
*/
|
||||
|
||||
#ifndef __UART_H__
|
||||
#define __UART_H__
|
||||
|
||||
#include <board.h>
|
||||
|
||||
int rt_hw_uart_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -1,10 +0,0 @@
|
|||
*.o
|
||||
*.o.cmd
|
||||
*.ko
|
||||
*.ko.cmd
|
||||
*.mod.c
|
||||
|
||||
Module.symvers
|
||||
modules.order
|
||||
|
||||
.tmp_versions/
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
ccflags-y := -I$(VMM_HDR_DIR)
|
||||
|
||||
obj-m += rtvmm.o
|
||||
|
||||
rtvmm-objs := vmm_linux.o
|
||||
|
||||
|
|
@ -1,22 +0,0 @@
|
|||
#!/bin/sh
|
||||
|
||||
set -e
|
||||
|
||||
# local variable
|
||||
TISDK_DIR=/home/grissiom/ti-sdk-am335x-evm-06.00.00.00/
|
||||
|
||||
# external variable {{{
|
||||
ROOTFS_DIR=${ROOTFS_DIR:-~/remotedir/buildroot-rootfs/}
|
||||
KDIR=${KDIR:-$PWD/../../bfm-kernel/}
|
||||
|
||||
TOOLCHAIN_DIR=${TOOLCHAIN_DIR:-${TISDK_DIR}/linux-devkit/sysroots/i686-arago-linux/usr/bin}
|
||||
TOOLCHAIN_PREFIX=${TOOLCHAIN_PREFIX:-"arm-linux-gnueabihf-"}
|
||||
# }}}
|
||||
|
||||
export PATH="${TOOLCHAIN_DIR}:$PATH"
|
||||
|
||||
make -C $KDIR M=$PWD ARCH=arm CROSS_COMPILE="${TOOLCHAIN_PREFIX}" V=0
|
||||
|
||||
#sudo PATH="${TOOLCHAIN_DIR}:$PATH" \
|
||||
#make -C $KDIR M=$PWD ARCH=arm CROSS_COMPILE=${TOOLCHAIN_PREFIX} \
|
||||
#INSTALL_MOD_PATH=${ROOTFS_DIR} modules_install
|
||||
|
|
@ -1,257 +0,0 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/memblock.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "vmm_linux.h"
|
||||
|
||||
#define IOMAP_NUM 3
|
||||
#define BUFF_SZ (4 * 1024)
|
||||
|
||||
struct vmm_iomap *_linux_iomap = NULL;
|
||||
|
||||
const char *uart_name = "uart";
|
||||
|
||||
/* some exported Linux Kernel patch */
|
||||
extern void vmm_set_status(int status);
|
||||
extern void vmm_context_init(void *context_addr);
|
||||
extern unsigned long vmm_save_irq(void);
|
||||
extern void vmm_restore_irq(unsigned long flags);
|
||||
|
||||
static struct vmm_domain domain =
|
||||
{
|
||||
.kernel = DOMAIN_KERNEL,
|
||||
.user = DOMAIN_USER,
|
||||
.io = DOMAIN_IO,
|
||||
.vmm = DOMAIN_RTVMM,
|
||||
.vmm_share = DOMAIN_RTVMM_SHR,
|
||||
};
|
||||
|
||||
static struct vmm_iomap iomap[RT_VMM_IOMAP_MAXNR] =
|
||||
{
|
||||
{.name = "UART1", .pa = 0x1000A000, .size = 4096},
|
||||
{.name = "TIMER", .pa = 0x10012000, .size = 4096},
|
||||
{.name = "GIC_CPU", .pa = 0x1E000000, .size = 4096},
|
||||
{.name = "GIC_DIST", .pa = 0x1E001000, .size = 4096},
|
||||
{.name = "SYS_CTRL", .pa = 0x1001A000, .size = 4096},
|
||||
{.pa = 0},
|
||||
};
|
||||
|
||||
void vmm_iomap_init(void)
|
||||
{
|
||||
int index;
|
||||
|
||||
_linux_iomap = &iomap[0];
|
||||
|
||||
BUILD_BUG_ON(ARRAY_SIZE(iomap) > RT_VMM_IOMAP_MAXNR);
|
||||
|
||||
for (index = 0; index < ARRAY_SIZE(iomap); index++) {
|
||||
if (_linux_iomap[index].pa == 0)
|
||||
break;
|
||||
|
||||
if (_linux_iomap[index].size != 0)
|
||||
_linux_iomap[index].va =
|
||||
ioremap_nocache(_linux_iomap[index].pa,
|
||||
_linux_iomap[index].size);
|
||||
|
||||
printk("%s: 0x%08lx --> 0x%p, size %u\n",
|
||||
_linux_iomap[index].name,
|
||||
_linux_iomap[index].pa,
|
||||
_linux_iomap[index].va,
|
||||
_linux_iomap[index].size);
|
||||
}
|
||||
|
||||
printk("vmm: init iomap done!\n");
|
||||
}
|
||||
|
||||
#if 0
|
||||
void trap_set_vector(unsigned long start, unsigned int length)
|
||||
{
|
||||
int sctrl;
|
||||
|
||||
/* C12-C0 is only active when SCTLR.V = 0 */
|
||||
asm volatile ("mrc p15, #0, %0, c1, c0, #0"
|
||||
:"=r" (sctrl));
|
||||
sctrl &= ~(1 << 13);
|
||||
asm volatile ("mcr p15, #0, %0, c1, c0, #0"
|
||||
:
|
||||
:"r" (sctrl));
|
||||
|
||||
asm volatile ("mcr p15, #0, %0, c12, c0, #0"
|
||||
:
|
||||
:"r" (start));
|
||||
rmb();
|
||||
}
|
||||
#else
|
||||
extern void trap_set_vector(unsigned long start, unsigned int length);
|
||||
#endif
|
||||
|
||||
static void vmm_open_domain(void)
|
||||
{
|
||||
unsigned long dval;
|
||||
asm volatile ("mrc p15, 0, %0, c3, c0\n"
|
||||
: "=r" (dval));
|
||||
dval |= (0x1 << (DOMAIN_RTVMM * 2)) |
|
||||
(0x1 << (DOMAIN_RTVMM_SHR * 2));
|
||||
asm volatile ("mcr p15, 0, %0, c3, c0\n"
|
||||
: : "r" (dval));
|
||||
}
|
||||
|
||||
static void vmm_close_domain(void)
|
||||
{
|
||||
unsigned long dval;
|
||||
asm volatile ("mrc p15, 0, %0, c3, c0\n"
|
||||
: "=r" (dval));
|
||||
/* we still need access tp DOMAIN_RTVMM_SHR because the IRQ stack is
|
||||
* there. */
|
||||
dval &= ~(0x3 << (DOMAIN_RTVMM * 2));
|
||||
asm volatile ("mcr p15, 0, %0, c3, c0\n"
|
||||
: : "r" (dval));
|
||||
}
|
||||
|
||||
static DEFINE_SPINLOCK(init_lock);
|
||||
void vmm_entry(void)
|
||||
{
|
||||
vmm_entry_t entry;
|
||||
unsigned long flags;
|
||||
struct vmm_entry_param eparam = {
|
||||
.iomap = &iomap[0],
|
||||
.domain = &domain,
|
||||
};
|
||||
|
||||
printk("Entry VMM:0x%08x with iomap 0x%p\n", VMM_BEGIN, _linux_iomap);
|
||||
|
||||
spin_lock_irqsave(&init_lock, flags);
|
||||
|
||||
memcpy((void*)(LINUX_VECTOR_POS), (void*)0xFFFF0000,
|
||||
LINUX_VECTOR_PGSZ);
|
||||
flush_icache_range(LINUX_VECTOR_POS,
|
||||
LINUX_VECTOR_POS + LINUX_VECTOR_PGSZ);
|
||||
|
||||
/*dump_vector(0xFFFF0000);*/
|
||||
/* set the interrupt vector to RTT */
|
||||
trap_set_vector(VMM_BEGIN, 16 * 4);
|
||||
/*dump_vector(VMM_END-LINUX_VECTOR_PGSZ);*/
|
||||
|
||||
entry = (vmm_entry_t)VMM_BEGIN;
|
||||
|
||||
vmm_context_init(&RT_VMM_SHARE->ctx);
|
||||
vmm_set_status(0x01);
|
||||
|
||||
pr_info("Linux domain: kernel: %d, user: %d, io: %d\n",
|
||||
DOMAIN_KERNEL, DOMAIN_USER, DOMAIN_IO);
|
||||
|
||||
/* switch to RTT and Good Luck */
|
||||
entry(&eparam);
|
||||
|
||||
spin_unlock_irqrestore(&init_lock, flags);
|
||||
|
||||
/* we now switched to virtual IRQ but the hardware IRQ is disabled
|
||||
* before entering RT-Thread. So we have to enabled it by hand. */
|
||||
{
|
||||
asm volatile ("cpsie i":::"memory", "cc");
|
||||
}
|
||||
|
||||
printk("come back to Linux.\n");
|
||||
|
||||
}
|
||||
|
||||
int vmm_load_fw(const char* filename)
|
||||
{
|
||||
mm_segment_t oldfs = {0};
|
||||
unsigned long len;
|
||||
unsigned long file_sz;
|
||||
loff_t pos = 0;
|
||||
struct file *flp = NULL;
|
||||
char *buf_ptr = (char*)VMM_BEGIN;
|
||||
|
||||
printk("loading RT-Thread:%s ....", filename);
|
||||
/* FIXME: we should not need this actually. But currently Linux would
|
||||
* hang without this. Let's just proceed and I will go back to handle
|
||||
* this in the future. */
|
||||
memset((void*)VMM_BEGIN, 0, VMM_SIZE);
|
||||
|
||||
flp = filp_open(filename, O_RDONLY, S_IRWXU);
|
||||
if (IS_ERR(flp))
|
||||
{
|
||||
printk("vmm loader: open file failed. "
|
||||
"Return 0x%p\n", flp);
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* get file size */
|
||||
file_sz = vfs_llseek(flp, 0, SEEK_END);
|
||||
vfs_llseek(flp, 0, SEEK_SET);
|
||||
|
||||
oldfs = get_fs();
|
||||
set_fs(get_ds());
|
||||
while (file_sz > 0)
|
||||
{
|
||||
// len = vfs_read(flp, (void __user __force *)buff, BUFF_SZ, &pos);
|
||||
len = vfs_read(flp, (void __user __force*)buf_ptr, BUFF_SZ, &pos);
|
||||
file_sz -= len;
|
||||
buf_ptr += len;
|
||||
}
|
||||
set_fs(oldfs);
|
||||
|
||||
filp_close(flp, NULL);
|
||||
|
||||
printk("done!\n");
|
||||
|
||||
/* flush RT-Thread memory */
|
||||
flush_cache_vmap(VMM_BEGIN, VMM_END);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init vmm_init(void)
|
||||
{
|
||||
printk("VMM started.\n");
|
||||
|
||||
vmm_iomap_init();
|
||||
/* Open the domain permission so we could write firmware to it */
|
||||
vmm_open_domain();
|
||||
if (vmm_load_fw("/vmm/rtthread.bin") == 0)
|
||||
vmm_entry();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit vmm_exit(void)
|
||||
{
|
||||
int i;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&init_lock, flags);
|
||||
vmm_set_status(0x00);
|
||||
trap_set_vector(LINUX_VECTOR_POS, 16 * 4);
|
||||
spin_unlock_irqrestore(&init_lock, flags);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(iomap); i++)
|
||||
{
|
||||
if (iomap[i].pa == 0)
|
||||
break;
|
||||
|
||||
printk("iounmap %s(0x%p)\n",
|
||||
iomap[i].name,
|
||||
iomap[i].va);
|
||||
iounmap(iomap[i].va);
|
||||
}
|
||||
|
||||
vmm_close_domain();
|
||||
|
||||
printk("vmm exit\n");
|
||||
}
|
||||
|
||||
module_init(vmm_init);
|
||||
module_exit(vmm_exit);
|
||||
|
||||
MODULE_AUTHOR("bernard.xiong <bernard.xiong@gmail.com>");
|
||||
MODULE_DESCRIPTION("RT-VMM");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
#ifndef __VMM_H__
|
||||
#define __VMM_H__
|
||||
|
||||
#include <rtt_api.h>
|
||||
|
||||
#define RT_VMM_ON_AM335X
|
||||
|
||||
#endif
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
#!/bin/sh
|
||||
|
||||
set -e
|
||||
|
||||
KDIR=~/linux-git
|
||||
BUILD_ROOT_DIR=/temp-build/buildroot-2014.02/
|
||||
|
||||
scons -j20
|
||||
mkdir -p $BUILD_ROOT_DIR/output/target/vmm
|
||||
cp rtthread.bin $BUILD_ROOT_DIR/output/target/vmm
|
||||
|
||||
(
|
||||
cd ./linux_vmm/
|
||||
export PATH=/opt/gcc-linaro-arm-linux-gnueabihf-4.8-2013.10_linux/bin/:"$PATH"
|
||||
make -C $KDIR M=$PWD VMM_HDR_DIR=$PWD/../ ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf-
|
||||
cp rtvmm.ko $BUILD_ROOT_DIR/output/target/root/
|
||||
)
|
||||
|
||||
make -C $BUILD_ROOT_DIR
|
||||
|
|
@ -1 +0,0 @@
|
|||
qemu-system-arm -M realview-pb-a8 -kernel rtthread-realview.elf -serial vc -serial vc
|
||||
|
|
@ -1,91 +0,0 @@
|
|||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x70000000;
|
||||
|
||||
__text_start = .;
|
||||
.text :
|
||||
{
|
||||
*(.vectors)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
/* section information for modules */
|
||||
. = ALIGN(4);
|
||||
__rtmsymtab_start = .;
|
||||
KEEP(*(RTMSymTab))
|
||||
__rtmsymtab_end = .;
|
||||
|
||||
/* section information for initialization */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
} =0
|
||||
__text_end = .;
|
||||
|
||||
__rodata_start = .;
|
||||
.rodata : { *(.rodata) *(.rodata.*) }
|
||||
__rodata_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
.ctors :
|
||||
{
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP(*(SORT(.ctors.*)))
|
||||
KEEP(*(.ctors))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
}
|
||||
|
||||
.dtors :
|
||||
{
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
}
|
||||
|
||||
. = ALIGN(8);
|
||||
__data_start = .;
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
}
|
||||
__data_end = .;
|
||||
|
||||
. = ALIGN(8);
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
}
|
||||
. = ALIGN(4);
|
||||
__bss_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
_end = .;
|
||||
}
|
||||
|
|
@ -1,140 +0,0 @@
|
|||
#include <rtt_api.h>
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = VMM_BEGIN;
|
||||
|
||||
__text_start = .;
|
||||
.text.share :
|
||||
{
|
||||
KEEP(*(.vectors))
|
||||
*(.text.isr)
|
||||
*(.vmm_glue)
|
||||
}
|
||||
ASSERT(SIZEOF(.text.share) <= VMM_SHARE_TEXT_PGSZ, ".text.share too big")
|
||||
|
||||
. = VMM_BEGIN + VMM_SHARE_TEXT_PGSZ;
|
||||
/* the vectore page is saved here
|
||||
* {
|
||||
* }
|
||||
*/
|
||||
|
||||
. = VMM_SHARE_DATA_POS;
|
||||
.data.share :
|
||||
{
|
||||
__data_share_start = .;
|
||||
*(.data.share*)
|
||||
__data_share_end = .;
|
||||
}
|
||||
ASSERT(SIZEOF(.data.share) <= (VMM_SHARE_DATA_PGSZ), ".data.share is too big")
|
||||
|
||||
. = VMM_SHARE_BSS_POS;
|
||||
.bss.share :
|
||||
{
|
||||
__bss_share_start = .;
|
||||
*(.bss.share*)
|
||||
__bss_share_end = .;
|
||||
}
|
||||
ASSERT(SIZEOF(.bss.share) <= (VMM_SHARE_BSS_PGSZ), ".bss.share is too big")
|
||||
|
||||
. = VMM_SHARE_CTX_POS;
|
||||
.vmm.share :
|
||||
{
|
||||
/* the vmm context goes here */
|
||||
__vmm_share_start = .;
|
||||
*(.vmm.share*)
|
||||
__vmm_share_end = .;
|
||||
}
|
||||
ASSERT(SIZEOF(.vmm.share) <= (VMM_SHARE_CTX_PGSZ), "vmm share context is too big")
|
||||
|
||||
. = VMM_BEGIN + VMM_SHARE_PGSZ;
|
||||
.text :
|
||||
{
|
||||
*(.vmm_init)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
/* section information for modules */
|
||||
. = ALIGN(4);
|
||||
__rtmsymtab_start = .;
|
||||
KEEP(*(RTMSymTab))
|
||||
__rtmsymtab_end = .;
|
||||
|
||||
/* section information for initialization */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
}
|
||||
__text_end = .;
|
||||
|
||||
__rodata_start = .;
|
||||
.rodata : { *(.rodata) *(.rodata.*) }
|
||||
__rodata_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
.ctors :
|
||||
{
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP(*(SORT(.ctors.*)))
|
||||
KEEP(*(.ctors))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
}
|
||||
|
||||
.dtors :
|
||||
{
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
}
|
||||
|
||||
__data_start = .;
|
||||
. = ALIGN(8);
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
}
|
||||
__data_end = .;
|
||||
|
||||
. = ALIGN(8);
|
||||
__bss_start = __data_end;
|
||||
.bss :
|
||||
{
|
||||
vmm_stack_start = .;
|
||||
. = vmm_stack_start + RT_VMM_STACK_SIZE;
|
||||
vmm_stack_end = .;
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
}
|
||||
. = ALIGN(4);
|
||||
__bss_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
_end = .;
|
||||
}
|
||||
|
|
@ -1,153 +0,0 @@
|
|||
/* RT-Thread config file */
|
||||
#ifndef __RTTHREAD_CFG_H__
|
||||
#define __RTTHREAD_CFG_H__
|
||||
|
||||
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
|
||||
|
||||
// <integer name="RT_NAME_MAX" description="Maximal size of kernel object name length" default="6" />
|
||||
#define RT_NAME_MAX 6
|
||||
// <integer name="RT_ALIGN_SIZE" description="Alignment size for CPU architecture data access" default="4" />
|
||||
#define RT_ALIGN_SIZE 4
|
||||
// <integer name="RT_THREAD_PRIORITY_MAX" description="Maximal level of thread priority" default="32">
|
||||
// <item description="8">8</item>
|
||||
// <item description="32">32</item>
|
||||
// <item description="256">256</item>
|
||||
// </integer>
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
// <integer name="RT_TICK_PER_SECOND" description="OS tick per second" default="1000" />
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
// <integer name="IDLE_THREAD_STACK_SIZE" description="The stack size of idle thread" default="512" />
|
||||
#define IDLE_THREAD_STACK_SIZE 512
|
||||
// <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" >
|
||||
#define RT_DEBUG
|
||||
#define RT_DEBUG_COLOR
|
||||
// <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" />
|
||||
// #define RT_THREAD_DEBUG
|
||||
// <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" />
|
||||
// #define RT_USING_OVERFLOW_CHECK
|
||||
// </section>
|
||||
|
||||
// <bool name="RT_USING_HOOK" description="Using hook functions" default="true" />
|
||||
#define RT_USING_HOOK
|
||||
// <section name="RT_USING_TIMER_SOFT" description="Using software timer which will start a thread to handle soft-timer" default="true" >
|
||||
// #define RT_USING_TIMER_SOFT
|
||||
// <integer name="RT_TIMER_THREAD_PRIO" description="The priority level of timer thread" default="4" />
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
// <integer name="RT_TIMER_THREAD_STACK_SIZE" description="The stack size of timer thread" default="512" />
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
// <integer name="RT_TIMER_TICK_PER_SECOND" description="The soft-timer tick per second" default="10" />
|
||||
#define RT_TIMER_TICK_PER_SECOND 10
|
||||
// </section>
|
||||
|
||||
// <section name="IPC" description="Inter-Thread communication" default="always" >
|
||||
// <bool name="RT_USING_SEMAPHORE" description="Using semaphore in the system" default="true" />
|
||||
#define RT_USING_SEMAPHORE
|
||||
// <bool name="RT_USING_MUTEX" description="Using mutex in the system" default="true" />
|
||||
#define RT_USING_MUTEX
|
||||
// <bool name="RT_USING_EVENT" description="Using event group in the system" default="true" />
|
||||
#define RT_USING_EVENT
|
||||
// <bool name="RT_USING_MAILBOX" description="Using mailbox in the system" default="true" />
|
||||
#define RT_USING_MAILBOX
|
||||
// <bool name="RT_USING_MESSAGEQUEUE" description="Using message queue in the system" default="true" />
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
// </section>
|
||||
|
||||
// <section name="MM" description="Memory Management" default="always" >
|
||||
// <bool name="RT_USING_MEMPOOL" description="Using Memory Pool Management in the system" default="true" />
|
||||
#define RT_USING_MEMPOOL
|
||||
// <bool name="RT_USING_MEMHEAP" description="Using Memory Heap Object in the system" default="true" />
|
||||
// #define RT_USING_MEMHEAP
|
||||
// <bool name="RT_USING_HEAP" description="Using Dynamic Heap Management in the system" default="true" />
|
||||
#define RT_USING_HEAP
|
||||
// <bool name="RT_USING_MEMHEAP_AS_HEAP" description="Using Memory Heap Object as system heap" default="true" />
|
||||
// #define RT_USING_MEMHEAP_AS_HEAP
|
||||
// <bool name="RT_USING_SMALL_MEM" description="Optimizing for small memory" default="false" />
|
||||
#define RT_USING_SMALL_MEM
|
||||
// <bool name="RT_USING_SLAB" description="Using SLAB memory management for large memory" default="false" />
|
||||
// #define RT_USING_SLAB
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_DEVICE" description="Using Device Driver Framework" default="true" >
|
||||
#define RT_USING_DEVICE
|
||||
// <bool name="RT_USING_DEVICE_IPC" description="Using IPC in Device Driver Framework" default="true" />
|
||||
#define RT_USING_DEVICE_IPC
|
||||
// <bool name="RT_USING_SERIAL" description="Using Serial Device Driver Framework" default="true" />
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_SERIAL_USING_DMA
|
||||
// <integer name="RT_UART_RX_BUFFER_SIZE" description="The buffer size for UART reception" default="64" />
|
||||
#define RT_UART_RX_BUFFER_SIZE 64
|
||||
// <bool name="RT_USING_INTERRUPT_INFO" description="Using interrupt information description" default="true" />
|
||||
#define RT_USING_INTERRUPT_INFO
|
||||
// <bool name="RT_USING_UART0" description="Enable UART0" default="false" />
|
||||
// #define RT_USING_UART0
|
||||
// <bool name="RT_USING_UART1" description="Enable UART1" default="true" />
|
||||
#define RT_USING_UART1
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_CONSOLE" description="Using console" default="true" >
|
||||
#define RT_USING_CONSOLE
|
||||
// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart" />
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
// </section>
|
||||
|
||||
// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
// <section name="RT_USING_FINSH" description="Using finsh as shell, which is a C-Express shell" default="true" >
|
||||
#define RT_USING_FINSH
|
||||
// <bool name="FINSH_USING_MSH" description="Using module shell" default="true" />
|
||||
#define FINSH_USING_MSH
|
||||
// <bool name="FINSH_USING_MSH_DEFAULT" description="The default shell is msh" default="true" />
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
// <bool name="FINSH_USING_SYMTAB" description="Using symbol table in finsh shell" default="true" />
|
||||
#define FINSH_USING_SYMTAB
|
||||
// <bool name="FINSH_USING_DESCRIPTION" description="Keeping description in symbol table" default="true" />
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
// </section>
|
||||
|
||||
// <section name="LIBC" description="C Runtime library setting" default="always" >
|
||||
// <bool name="RT_USING_LIBC" description="Using libc library" default="true" />
|
||||
#define RT_USING_LIBC
|
||||
// <bool name="RT_USING_PTHREADS" description="Using POSIX threads library" default="true" />
|
||||
#define RT_USING_PTHREADS
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_DFS" description="Device file system" default="true" >
|
||||
// #define RT_USING_DFS
|
||||
// <bool name="DFS_USING_WORKDIR" description="Using working directory" default="true" />
|
||||
// #define DFS_USING_WORKDIR
|
||||
// <integer name="DFS_FILESYSTEMS_MAX" description="The maximal number of mounted file system" default="4" />
|
||||
#define DFS_FILESYSTEMS_MAX 2
|
||||
// <integer name="DFS_FD_MAX" description="The maximal number of opened files" default="4" />
|
||||
#define DFS_FD_MAX 4
|
||||
// <bool name="RT_USING_DFS_ELMFAT" description="Using ELM FatFs" default="true" />
|
||||
#define RT_USING_DFS_ELMFAT
|
||||
// <integer name="RT_DFS_ELM_USE_LFN" description="Support long file name" default="0">
|
||||
// <item description="LFN1">1</item>
|
||||
// <item description="LFN1">2</item>
|
||||
// </integer>
|
||||
#define RT_DFS_ELM_USE_LFN 1
|
||||
// <integer name="RT_DFS_ELM_MAX_LFN" description="Maximal size of file name length" default="255" />
|
||||
#define RT_DFS_ELM_MAX_LFN 64
|
||||
// <bool name="RT_USING_DFS_YAFFS2" description="Using YAFFS2" default="false" />
|
||||
// #define RT_USING_DFS_YAFFS2
|
||||
// <bool name="RT_USING_DFS_UFFS" description="Using UFFS" default="false" />
|
||||
// #define RT_USING_DFS_UFFS
|
||||
// <bool name="RT_USING_DFS_DEVFS" description="Using devfs for device objects" default="true" />
|
||||
// #define RT_USING_DFS_DEVFS
|
||||
// <bool name="RT_USING_DFS_NFS" description="Using NFS v3 client file system" default="false" />
|
||||
// #define RT_USING_DFS_NFS
|
||||
// <string name="RT_NFS_HOST_EXPORT" description="NFSv3 host export" default="192.168.1.5:/" />
|
||||
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
|
||||
// </section>
|
||||
|
||||
// </RDTConfigurator>
|
||||
|
||||
// <section name="RT_USING_VMM" description="Enable RT-Thread hypervisor" default="true" >
|
||||
// #define RT_USING_VMM
|
||||
// </section>
|
||||
|
||||
#endif
|
||||
|
|
@ -1,55 +0,0 @@
|
|||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='realview-a8-vmm'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
PLATFORM = 'gcc'
|
||||
# EXEC_PATH = r'/opt/arm-2012.09/bin'
|
||||
EXEC_PATH = r'C:\Program Files (x86)\CodeSourcery\Sourcery_CodeBench_Lite_for_ARM_EABI\bin'
|
||||
EXEC_PATH = '/opt/gcc-arm-none-eabi-4_8-2014q1_gri/bin'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -march=armv7-a -mtune=cortex-a8 -mfpu=vfpv3-d16 -ftree-vectorize -ffast-math -mfloat-abi=softfp'
|
||||
CFLAGS = DEVICE + ' -Wall'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__'
|
||||
LINK_SCRIPT = 'realview_vmm.lds'
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=realview.map,-cref,-u,system_vectors'+\
|
||||
' -T %s' % LINK_SCRIPT
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
# generate debug info in all cases
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
CFLAGS += ' -g -gdwarf-2'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' +\
|
||||
SIZE + ' $TARGET \n' +\
|
||||
OBJDUMP + ' -S $TARGET > rtt.S\n'
|
||||
|
|
@ -1,164 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2014-04-07 Grissiom first version
|
||||
*/
|
||||
|
||||
#ifndef __RTT_API_H__
|
||||
#define __RTT_API_H__
|
||||
|
||||
/* 4MB in size */
|
||||
#define VMM_SIZE 0x400000
|
||||
#define VMM_END 0xc8000000
|
||||
#define VMM_BEGIN (VMM_END - VMM_SIZE)
|
||||
|
||||
/* VMM Memory Map:
|
||||
*
|
||||
* --- VMM_BEGIN --- +------+
|
||||
* .vectors | 4KB |
|
||||
* .text.share | |
|
||||
* ----------------- + |
|
||||
* guest vector page | 4KB |
|
||||
* ----------------- + |
|
||||
* .data.share | 4KB |
|
||||
* ----------------- + |
|
||||
* .bss.share | 4KB |
|
||||
* -- SHARE_BASE -- + | 1MB
|
||||
* shared context | shared region
|
||||
* ----------------- |
|
||||
* blabla... |
|
||||
* ----------------- +------+
|
||||
* vmm text |
|
||||
* rodata |
|
||||
* blabla... |
|
||||
* ----------------- | private region
|
||||
* vmm data |
|
||||
* ----------------- |
|
||||
* vmm bss |
|
||||
* ---- VMM_END ---- +------+
|
||||
*
|
||||
*/
|
||||
|
||||
/* 1MB is one level one page table entry, if we want to page table to be
|
||||
* simple(avoid TLB miss), we could allocate 1MB for shared memory. */
|
||||
#define VMM_SHARE_PGSZ (1024*1024)
|
||||
|
||||
/* the size and position of shared code text */
|
||||
#define VMM_SHARE_TEXT_PGSZ 4096
|
||||
|
||||
/* the size and position of vector's page size in Linux */
|
||||
#define LINUX_VECTOR_PGSZ 4096
|
||||
#define LINUX_VECTOR_POS (VMM_BEGIN + VMM_SHARE_TEXT_PGSZ)
|
||||
|
||||
/* the size and position of shared code data */
|
||||
#define VMM_SHARE_DATA_PGSZ 4096
|
||||
#define VMM_SHARE_DATA_POS (LINUX_VECTOR_POS + LINUX_VECTOR_PGSZ)
|
||||
|
||||
/* the size and position of shared code bss */
|
||||
#define VMM_SHARE_BSS_PGSZ 4096
|
||||
#define VMM_SHARE_BSS_POS (VMM_SHARE_DATA_POS + VMM_SHARE_DATA_PGSZ)
|
||||
|
||||
/* the size and position of shared code bss */
|
||||
#define VMM_SHARE_CTX_PGSZ (VMM_SHARE_PGSZ - \
|
||||
LINUX_VECTOR_PGSZ - \
|
||||
VMM_SHARE_TEXT_PGSZ - \
|
||||
VMM_SHARE_DATA_PGSZ - \
|
||||
VMM_SHARE_BSS_PGSZ)
|
||||
#if VMM_SHARE_CTX_PGSZ <= 0
|
||||
#error
|
||||
#endif
|
||||
|
||||
#define VMM_SHARE_CTX_POS (VMM_SHARE_BSS_POS + VMM_SHARE_BSS_PGSZ)
|
||||
|
||||
/* the size of FIQ stack page size in RT-Thread */
|
||||
#define RT_FIQ_STACK_PGSZ 0
|
||||
|
||||
/* the size of IRQ stack page size in RT-Thread */
|
||||
#define RT_IRQ_STACK_PGSZ 4096
|
||||
|
||||
#ifdef HEAP_END
|
||||
#undef HEAP_END
|
||||
#endif
|
||||
#define HEAP_END (VMM_END)
|
||||
|
||||
#define RT_VMM_VIRQ_TRIGGER 10
|
||||
|
||||
#define RT_VMM_STACK_SIZE 1024
|
||||
|
||||
/* the max number of iomap entries */
|
||||
#define RT_VMM_IOMAP_MAXNR 16
|
||||
|
||||
#ifndef __iomem
|
||||
#define __iomem
|
||||
#endif
|
||||
|
||||
#define IRQS_NR_32 ((96 + 31)/32)
|
||||
|
||||
/*#define RT_VMM_USING_DOMAIN*/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/* keep consistent with linux/arch/arm/include/vmm/vmm.h */
|
||||
struct vmm_context
|
||||
{
|
||||
/* the status of vGuest irq, read only for RT-Thread */
|
||||
volatile unsigned long virq_status;
|
||||
|
||||
/* has interrupt pended on vGuest OS IRQ */
|
||||
volatile unsigned long virq_pended;
|
||||
|
||||
/* pending interrupt for vGuest OS */
|
||||
volatile unsigned long virq_pending[IRQS_NR_32];
|
||||
};
|
||||
|
||||
struct vmm_domain
|
||||
{
|
||||
/* the number of kernel domain */
|
||||
char kernel;
|
||||
/* the number of user domain */
|
||||
char user;
|
||||
/* the number of io domain */
|
||||
char io;
|
||||
/* the number of vmm domain */
|
||||
char vmm;
|
||||
/* the number of vmm_share domain */
|
||||
char vmm_share;
|
||||
};
|
||||
|
||||
struct vmm_iomap
|
||||
{
|
||||
const char name[16]; /* iomap name */
|
||||
|
||||
unsigned long pa; /* physical address */
|
||||
volatile void __iomem * va; /* virtual address */
|
||||
size_t size; /* memory size */
|
||||
};
|
||||
|
||||
struct vmm_entry_param
|
||||
{
|
||||
struct vmm_iomap *iomap;
|
||||
struct vmm_domain *domain;
|
||||
};
|
||||
|
||||
typedef void (*vmm_entry_t)(struct vmm_entry_param* param);
|
||||
|
||||
struct rt_vmm_share_layout
|
||||
{
|
||||
struct vmm_context ctx;
|
||||
};
|
||||
|
||||
#ifndef __KERNEL__
|
||||
/* not in Linux, use better type check */
|
||||
extern struct rt_vmm_share_layout rt_vmm_share;
|
||||
#define RT_VMM_SHARE (&rt_vmm_share)
|
||||
#else
|
||||
#define RT_VMM_SHARE ((struct rt_vmm_share_layout*)VMM_SHARE_CTX_POS)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* end of include guard: __RTT_API_H__ */
|
||||
Loading…
Reference in New Issue