Merge pull request #5345 from jiladahe1997/master
[bugfix] libcpu/arm/cortex-m/context_gcc: 修复thumb指令集汇编语法错误
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5decbb5170
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@ -143,6 +143,7 @@ contex_ns_store:
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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TST lr, #0x10 /* if(!EXC_RETURN[4]) */
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IT EQ
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VSTMDBEQ r1!, {d8 - d15} /* push FPU register s16~s31 */
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#endif
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@ -187,6 +188,7 @@ contex_ns_load:
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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TST lr, #0x10 /* if(!EXC_RETURN[4]) */
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IT EQ
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VLDMIAEQ r1!, {d8 - d15} /* pop FPU register s16~s31 */
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#endif
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@ -107,6 +107,7 @@ PendSV_Handler:
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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TST lr, #0x10 /* if(!EXC_RETURN[4]) */
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IT EQ
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VSTMDBEQ r1!, {d8 - d15} /* push FPU register s16~s31 */
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#endif
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@ -116,6 +117,7 @@ PendSV_Handler:
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MOV r4, #0x00 /* flag = 0 */
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TST lr, #0x10 /* if(!EXC_RETURN[4]) */
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IT EQ
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MOVEQ r4, #0x01 /* flag = 1 */
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STMFD r1!, {r4} /* push flag */
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@ -137,6 +139,7 @@ switch_to_thread:
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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CMP r3, #0 /* if(flag_r3 != 0) */
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IT NE
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VLDMIANE r1!, {d8 - d15} /* pop FPU register s16~s31 */
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#endif
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@ -145,6 +148,7 @@ switch_to_thread:
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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ORR lr, lr, #0x10 /* lr |= (1 << 4), clean FPCA. */
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CMP r3, #0 /* if(flag_r3 != 0) */
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IT NE
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BICNE lr, lr, #0x10 /* lr &= ~(1 << 4), set FPCA. */
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#endif
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@ -107,6 +107,7 @@ PendSV_Handler:
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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TST lr, #0x10 /* if(!EXC_RETURN[4]) */
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IT EQ
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VSTMDBEQ r1!, {d8 - d15} /* push FPU register s16~s31 */
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#endif
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@ -116,6 +117,7 @@ PendSV_Handler:
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MOV r4, #0x00 /* flag = 0 */
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TST lr, #0x10 /* if(!EXC_RETURN[4]) */
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IT EQ
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MOVEQ r4, #0x01 /* flag = 1 */
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STMFD r1!, {r4} /* push flag */
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@ -137,6 +139,7 @@ switch_to_thread:
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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CMP r3, #0 /* if(flag_r3 != 0) */
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IT NE
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VLDMIANE r1!, {d8 - d15} /* pop FPU register s16~s31 */
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#endif
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@ -145,6 +148,7 @@ switch_to_thread:
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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ORR lr, lr, #0x10 /* lr |= (1 << 4), clean FPCA. */
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CMP r3, #0 /* if(flag_r3 != 0) */
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IT NE
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BICNE lr, lr, #0x10 /* lr &= ~(1 << 4), set FPCA. */
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#endif
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