[bsp][stm32][spi] 优化H7 DMA数据非字节对齐的处理流程
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8691ed3767
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@ -298,9 +298,13 @@ static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *m
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if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
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{
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if (device->config.mode & RT_SPI_CS_HIGH)
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{
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rt_pin_write(device->cs_pin, PIN_HIGH);
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}
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else
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{
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rt_pin_write(device->cs_pin, PIN_LOW);
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}
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}
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LOG_D("%s transfer prepare and start", spi_drv->config->bus_name);
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@ -344,7 +348,7 @@ static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *m
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if ((spi_drv->spi_dma_flag & SPI_USING_TX_DMA_FLAG) && (send_length >= DMA_TRANS_MIN_LEN))
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{
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#if defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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if (RT_IS_ALIGN((rt_uint32_t)send_buf, 32)) /* aligned with 32 bytes? */
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if (RT_IS_ALIGN((rt_uint32_t)send_buf, 32) && send_buf != RT_NULL) /* aligned with 32 bytes? */
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{
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p_txrx_buffer = (rt_uint32_t *)send_buf; /* send_buf aligns with 32 bytes, no more operations */
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}
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@ -357,7 +361,7 @@ static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *m
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}
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rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, dma_aligned_buffer, send_length);
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#else
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if (RT_IS_ALIGN((rt_uint32_t)send_buf, 4)) /* aligned with 4 bytes? */
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if (RT_IS_ALIGN((rt_uint32_t)send_buf, 4) && send_buf != RT_NULL) /* aligned with 4 bytes? */
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{
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p_txrx_buffer = (rt_uint32_t *)send_buf; /* send_buf aligns with 4 bytes, no more operations */
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}
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