From 54696c4aa74d0cadd47576b756628e55e1c79208 Mon Sep 17 00:00:00 2001 From: "bernard.xiong" Date: Mon, 24 May 2010 08:39:03 +0000 Subject: [PATCH] add sdcard driver. git-svn-id: https://rt-thread.googlecode.com/svn/trunk@732 bbd45198-f89e-11dd-88c7-29a3b14d5316 --- bsp/lpc176x/SConscript | 5 +- bsp/lpc176x/application.c | 124 ++++------- bsp/lpc176x/led.c | 38 ++++ bsp/lpc176x/led.h | 10 + bsp/lpc176x/project.Uv2 | 159 ++++++++++++++ bsp/lpc176x/rtconfig.h | 2 +- bsp/lpc176x/sd.c | 448 ++++++++++++++++++++++++++++++++++++++ bsp/lpc176x/sd.h | 47 ++++ bsp/lpc176x/spi.c | 197 +++++++++++++++++ bsp/lpc176x/spi.h | 31 +++ bsp/lpc176x/startup.c | 7 + 11 files changed, 979 insertions(+), 89 deletions(-) create mode 100644 bsp/lpc176x/led.c create mode 100644 bsp/lpc176x/led.h create mode 100644 bsp/lpc176x/project.Uv2 create mode 100644 bsp/lpc176x/sd.c create mode 100644 bsp/lpc176x/sd.h create mode 100644 bsp/lpc176x/spi.c create mode 100644 bsp/lpc176x/spi.h diff --git a/bsp/lpc176x/SConscript b/bsp/lpc176x/SConscript index 5077ed8997..63e4cf17fd 100644 --- a/bsp/lpc176x/SConscript +++ b/bsp/lpc176x/SConscript @@ -12,9 +12,12 @@ group['CPPDEFINES'] = [] group['LINKFLAGS'] = '' src_bsp = ['application.c', 'startup.c', 'board.c'] -src_drv = ['uart.c'] +src_drv = ['uart.c', 'led.c'] src_cmsis = ['CMSIS/CM3/CoreSupport/core_cm3.c', 'CMSIS/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.c'] +if rtconfig.RT_USING_DFS: + src_drv += ['sd.c', 'spi.c'] + group['src'] = File(src_bsp + src_drv + src_cmsis) # add group to project list diff --git a/bsp/lpc176x/application.c b/bsp/lpc176x/application.c index 07c0d00db9..9910965bb8 100644 --- a/bsp/lpc176x/application.c +++ b/bsp/lpc176x/application.c @@ -12,110 +12,60 @@ * 2009-01-05 Bernard the first version * 2010-03-04 Magicoe for LPC1766 version * 2010-05-02 Aozima add led function + * 2010-05-24 Bernard add filesystem initialization and move led function to led.c */ -/**2q +/** * @addtogroup LPC17 */ /*@{*/ #include -#include "LPC17xx.h" -static void rt_hw_led_init(void) -{ - LPC_GPIO2->FIODIR0 |= 1<<0; /* led0:P2.0 */ - LPC_GPIO2->FIODIR0 |= 1<<1; /* led1:P2.1 */ -} +#ifdef RT_USING_DFS +/* dfs init */ +#include +/* dfs filesystem:ELM FatFs filesystem init */ +#include +/* dfs Filesystem APIs */ +#include +#endif -static void rt_hw_led_on(unsigned int led) +/* thread phase init */ +void rt_init_thread_entry(void *parameter) { - switch(led) + /* Filesystem Initialization */ +#ifdef RT_USING_DFS { - case 0: /* P2.0 = 1 */ - LPC_GPIO2->FIOSET0 = 1<<0; - break; - case 1: /* P2.1 = 1 */ - LPC_GPIO2->FIOSET0 = 1<<1; - break; - default: - break; - } -} - -static void rt_hw_led_off(unsigned int led) -{ - switch(led) - { - case 0: /* P2.0 = 0 */ - LPC_GPIO2->FIOCLR0 = 1<<0; - break; - case 1: /* P2.1 = 0 */ - LPC_GPIO2->FIOCLR0 = 1<<1; - break; - default: - break; - } -} -static void rt_thread_entry_led1(void* parameter) -{ - /* init led configuration */ - rt_hw_led_init(); - - while (1) - { - /* led on */ - rt_kprintf("led1 on\r\n"); - rt_hw_led_on(0); - rt_thread_delay(50); /* sleep 0.5 second and switch to other thread */ - - /* led off */ - rt_kprintf("led1 off\r\n"); - rt_hw_led_off(0); - rt_thread_delay(50); - } -} - -char thread_led2_stack[1024]; -struct rt_thread thread_led2; -void rt_thread_entry_led2(void* parameter) -{ - unsigned int count=0; - while (1) - { - /* led on */ - rt_kprintf("led2 on,count : %d\r\n",count); - count++; - rt_hw_led_on(1); - rt_thread_delay(RT_TICK_PER_SECOND); - - /* led off */ - rt_kprintf("led2 off\r\n"); - rt_hw_led_off(1); - rt_thread_delay(RT_TICK_PER_SECOND); + /* init the device filesystem */ + dfs_init(); + + /* init the elm FAT filesystam*/ + elm_init(); + + /* mount sd card fat partition 1 as root directory */ + if (dfs_mount("sd0", "/", "elm", 0, 0) == 0) + rt_kprintf("File System initialized!\n"); + else + rt_kprintf("File System init failed!\n"); } +#endif } int rt_application_init() { - rt_thread_t thread; + rt_thread_t init_thread; - /* create led1 thread */ - thread = rt_thread_create("led1", - rt_thread_entry_led1, RT_NULL, - 512, - 20, 5); - if (thread != RT_NULL) - rt_thread_startup(thread); - - /* init led2 thread */ - rt_thread_init(&thread_led2, - "led2", - rt_thread_entry_led2, - RT_NULL, - &thread_led2_stack[0], - sizeof(thread_led2_stack),10,10); - rt_thread_startup(&thread_led2); +#if (RT_THREAD_PRIORITY_MAX == 32) + init_thread = rt_thread_create("init", + rt_init_thread_entry, RT_NULL, + 2048, 8, 20); +#else + init_thread = rt_thread_create("init", + rt_init_thread_entry, RT_NULL, + 2048, 80, 20); +#endif + if (init_thread != RT_NULL) rt_thread_startup(init_thread); return 0; } diff --git a/bsp/lpc176x/led.c b/bsp/lpc176x/led.c new file mode 100644 index 0000000000..2d45b70322 --- /dev/null +++ b/bsp/lpc176x/led.c @@ -0,0 +1,38 @@ +#include "LPC17xx.h" +#include "led.h" + +void rt_hw_led_init(void) +{ + LPC_GPIO2->FIODIR0 |= 1<<0; /* led0:P2.0 */ + LPC_GPIO2->FIODIR0 |= 1<<1; /* led1:P2.1 */ +} + +void rt_hw_led_on(rt_uint32_t led) +{ + switch(led) + { + case 0: /* P2.0 = 1 */ + LPC_GPIO2->FIOSET0 = 1<<0; + break; + case 1: /* P2.1 = 1 */ + LPC_GPIO2->FIOSET0 = 1<<1; + break; + default: + break; + } +} + +void rt_hw_led_off(rt_uint32_t led) +{ + switch(led) + { + case 0: /* P2.0 = 0 */ + LPC_GPIO2->FIOCLR0 = 1<<0; + break; + case 1: /* P2.1 = 0 */ + LPC_GPIO2->FIOCLR0 = 1<<1; + break; + default: + break; + } +} diff --git a/bsp/lpc176x/led.h b/bsp/lpc176x/led.h new file mode 100644 index 0000000000..2f9eb44da1 --- /dev/null +++ b/bsp/lpc176x/led.h @@ -0,0 +1,10 @@ +#ifndef __LED_H__ +#define __LED_H__ + +#include + +void rt_hw_led_init(void); +void rt_hw_led_on (rt_uint32_t led); +void rt_hw_led_off(rt_uint32_t led); + +#endif diff --git a/bsp/lpc176x/project.Uv2 b/bsp/lpc176x/project.Uv2 new file mode 100644 index 0000000000..d1d4344184 --- /dev/null +++ b/bsp/lpc176x/project.Uv2 @@ -0,0 +1,159 @@ +### uVision2 Project, (C) Keil Software +### Do not modify ! + +Target (RT-Thread LPC17xx), 0x0004 // Tools: 'ARM-ADS' + +Group (Kernel) +Group (LPC17XX) +Group (finsh) +Group (Filesystem) +Group (Startup) + +File 1,1,<..\..\src\clock.c> +File 1,1,<..\..\src\device.c> +File 1,1,<..\..\src\idle.c> +File 1,1,<..\..\src\ipc.c> +File 1,1,<..\..\src\irq.c> +File 1,1,<..\..\src\kservice.c> +File 1,1,<..\..\src\mem.c> +File 1,1,<..\..\src\mempool.c> +File 1,1,<..\..\src\module.c> +File 1,1,<..\..\src\object.c> +File 1,1,<..\..\src\rtm.c> +File 1,1,<..\..\src\scheduler.c> +File 1,1,<..\..\src\slab.c> +File 1,1,<..\..\src\thread.c> +File 1,1,<..\..\src\timer.c> +File 2,1,<..\..\libcpu\arm\lpc17xx\cpu.c> +File 2,1,<..\..\libcpu\arm\lpc17xx\fault.c> +File 2,1,<..\..\libcpu\arm\lpc17xx\interrupt.c> +File 2,1,<..\..\libcpu\arm\lpc17xx\stack.c> +File 2,2,<..\..\libcpu\arm\lpc17xx\context_rvds.S> +File 2,2,<..\..\libcpu\arm\lpc17xx\fault_rvds.S> +File 2,2,<..\..\libcpu\arm\lpc17xx\start_rvds.S> +File 2,1,<..\..\libcpu\arm\common\backtrace.c> +File 2,1,<..\..\libcpu\arm\common\div0.c> +File 2,1,<..\..\libcpu\arm\common\showmem.c> +File 3,1,<..\..\components\finsh\cmd.c> +File 3,1,<..\..\components\finsh\finsh_compiler.c> +File 3,1,<..\..\components\finsh\finsh_error.c> +File 3,1,<..\..\components\finsh\finsh_heap.c> +File 3,1,<..\..\components\finsh\finsh_init.c> +File 3,1,<..\..\components\finsh\finsh_node.c> +File 3,1,<..\..\components\finsh\finsh_ops.c> +File 3,1,<..\..\components\finsh\finsh_parser.c> +File 3,1,<..\..\components\finsh\finsh_token.c> +File 3,1,<..\..\components\finsh\finsh_var.c> +File 3,1,<..\..\components\finsh\finsh_vm.c> +File 3,1,<..\..\components\finsh\shell.c> +File 3,1,<..\..\components\finsh\symbol.c> +File 4,1,<..\..\components\dfs\src\dfs_fs.c> +File 4,1,<..\..\components\dfs\src\dfs_init.c> +File 4,1,<..\..\components\dfs\src\dfs_posix.c> +File 4,1,<..\..\components\dfs\src\dfs_raw.c> +File 4,1,<..\..\components\dfs\src\dfs_util.c> +File 4,1,<..\..\components\dfs\filesystems\elmfat\dfs_elm.c> +File 4,1,<..\..\components\dfs\filesystems\elmfat\ff.c> +File 5,1,<.\application.c> +File 5,1,<.\startup.c> +File 5,1,<.\board.c> +File 5,1,<.\uart.c> +File 5,1,<.\led.c> +File 5,1,<.\sd.c> +File 5,1,<.\spi.c> +File 5,1, +File 5,1, + + + + +Options 1,0,0 // Target 'RT-Thread LPC17xx' + Device (LPC1768) + Vendor (NXP (founded by Philips)) + Cpu (IRAM(0x10000000-0x10007FFF) IRAM2(0x20000000-0x20007FFF) IROM(0-0x7FFFF) CLOCK(12000000) CPUTYPE("Cortex-M3")) + FlashUt () + StupF ("STARTUP\NXP\startup_LPC17xx.s" ("NXP LPC17xx Startup Code")) + FlashDR (UL2CM3(-O463 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_256 -FS00 -FL040000)) + DevID (4868) + Rgf (LPC17xx.H) + Mem () + C () + A () + RL () + OH () + DBC_IFX () + DBC_CMS () + DBC_AMS () + DBC_LMS () + UseEnv=0 + EnvBin () + EnvInc () + EnvLib () + EnvReg (ÿNXP\) + OrgReg (ÿNXP\) + TgStat=16 + OutDir (.\obj\) + OutName (rtthread-lpc) + GenApp=1 + GenLib=0 + GenHex=0 + Debug=1 + Browse=1 + LstDir (.\obj\) + HexSel=1 + MG32K=0 + TGMORE=0 + RunUsr 0 0 <> + RunUsr 1 0 <> + BrunUsr 0 0 <> + BrunUsr 1 0 <> + CrunUsr 0 0 <> + CrunUsr 1 0 <> + SVCSID <> + GLFLAGS=1790 + ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } + ACPUTYP ("Cortex-M3") + RVDEV () + ADSTFLGA { 0,12,16,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 } + OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } + OCMADSIRAM { 0,0,0,0,16,0,128,0,0 } + OCMADSIROM { 1,0,0,0,0,0,0,8,0 } + OCMADSXRAM { 0,0,0,0,0,0,0,0,0 } + OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,8,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,16,0,128,0,0,0,0,0,0,32,0,128,0,0 } + RV_STAVEC () + ADSCCFLG { 5,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } + ADSCMISC () + ADSCDEFN () + ADSCUDEF () + ADSCINCD (..\..\components\dfs;CMSIS\CM3\DeviceSupport\NXP\LPC17xx;.;..\..\libcpu\arm\lpc17xx;..\..\include;..\..\components\dfs\include;CMSIS\CM3\CoreSupport;..\..\components\finsh) + ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } + ADSAMISC () + ADSADEFN () + ADSAUDEF () + ADSAINCD () + PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } + IncBld=1 + AlwaysBuild=0 + GenAsm=0 + AsmAsm=0 + PublicsOnly=0 + StopCode=3 + CustArgs () + LibMods () + ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } + ADSLDTA (0x00000000) + ADSLDDA (0x10000000) + ADSLDSC () + ADSLDIB () + ADSLDIC () + ADSLDMC ( --keep __fsym_* --keep __vsym_*) + ADSLDIF () + ADSLDDW () + OPTDL (SARMCM3.DLL)(-MPU)(DARMP1.DLL)(-pLPC1768)(SARMCM3.DLL)(-MPU)(TARMP1.DLL)(-pLPC1768) + OPTDBG 48126,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()() + FLASH1 { 9,0,0,0,1,0,0,0,6,16,0,0,0,0,0,0,0,0,0,0 } + FLASH2 (Segger\JL2CM3.dll) + FLASH3 ("" ()) + FLASH4 () +EndOpt + diff --git a/bsp/lpc176x/rtconfig.h b/bsp/lpc176x/rtconfig.h index e2500c6e5f..22167c2b64 100644 --- a/bsp/lpc176x/rtconfig.h +++ b/bsp/lpc176x/rtconfig.h @@ -75,7 +75,7 @@ #define FINSH_USING_DESCRIPTION /* SECTION: device filesystem support */ -/* #define RT_USING_DFS */ +#define RT_USING_DFS #define RT_USING_DFS_ELMFAT /* the max number of mounted filesystem */ diff --git a/bsp/lpc176x/sd.c b/bsp/lpc176x/sd.c new file mode 100644 index 0000000000..715d58af90 --- /dev/null +++ b/bsp/lpc176x/sd.c @@ -0,0 +1,448 @@ +#include +#include + +#include "spi.h" +#include "sd.h" + +/* 512 bytes for each sector */ +#define SD_SECTOR_SIZE 512 + +/* token for write operation */ +#define TOKEN_SINGLE_BLOCK 0xFE +#define TOKEN_MULTI_BLOCK 0xFC +#define TOKEN_STOP_TRAN 0xFD + +/* Local variables */ +static uint8_t CardType; +static SDCFG SDCfg; +static struct rt_device sdcard_device; +static struct dfs_partition part; + +/* Local Function Prototypes */ +static bool LPC17xx_SD_Init (void); +static uint8_t LPC17xx_SD_SendCmd (uint8_t cmd, uint32_t arg); +static bool LPC17xx_SD_ReadSector (uint32_t sector, uint8_t *buff, uint32_t count); +static bool LPC17xx_SD_ReadDataBlock ( uint8_t *buff, uint32_t cnt); +static bool LPC17xx_SD_WriteSector (uint32_t sector, const uint8_t *buff, uint32_t count); +static bool LPC17xx_SD_WirteDataBlock (const uint8_t *buff, uint8_t token); +static bool LPC17xx_SD_ReadCfg (SDCFG *cfg); +static bool LPC17xx_SD_WaitForReady (void); + +/* wait until the card is not busy */ +static bool LPC17xx_SD_WaitForReady (void) +{ + uint8_t res; + /* timeout should be large enough to make sure the write operaion can be completed. */ + uint32_t timeout = 400000; + + LPC17xx_SPI_SendByte(0xFF); + do { + res = LPC17xx_SPI_RecvByte(); + } while ((res != 0xFF) && timeout--); + + return (res == 0xFF ? true : false); +} + +/* Initialize SD/MMC card. */ +static bool LPC17xx_SD_Init (void) +{ + uint32_t i, timeout; + uint8_t cmd, ct, ocr[4]; + bool ret = false; + + /* Initialize SPI interface and enable Flash Card SPI mode. */ + LPC17xx_SPI_Init (); + + /* At least 74 clock cycles are required prior to starting bus communication */ + for (i = 0; i < 80; i++) { /* 80 dummy clocks */ + LPC17xx_SPI_SendByte (0xFF); + } + + ct = CT_NONE; + if (LPC17xx_SD_SendCmd (GO_IDLE_STATE, 0) == 0x1) + { + timeout = 50000; + if (LPC17xx_SD_SendCmd(CMD8, 0x1AA) == 1) { /* SDHC */ + /* Get trailing return value of R7 resp */ + for (i = 0; i < 4; i++) ocr[i] = LPC17xx_SPI_RecvByte(); + if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */ + /* Wait for leaving idle state (ACMD41 with HCS bit) */ + while (timeout-- && LPC17xx_SD_SendCmd(SD_SEND_OP_COND, 1UL << 30)); + /* Check CCS bit in the OCR */ + if (timeout && LPC17xx_SD_SendCmd(READ_OCR, 0) == 0) { + for (i = 0; i < 4; i++) ocr[i] = LPC17xx_SPI_RecvByte(); + ct = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; + } + } else { /* SDSC or MMC */ + if (LPC17xx_SD_SendCmd(SD_SEND_OP_COND, 0) <= 1) { + ct = CT_SD1; cmd = SD_SEND_OP_COND; /* SDSC */ + } else { + ct = CT_MMC; cmd = SEND_OP_COND; /* MMC */ + } + /* Wait for leaving idle state */ + while (timeout-- && LPC17xx_SD_SendCmd(cmd, 0)); + /* Set R/W block length to 512 */ + if (!timeout || LPC17xx_SD_SendCmd(SET_BLOCKLEN, SD_SECTOR_SIZE) != 0) + ct = CT_NONE; + } + } + } + CardType = ct; + LPC17xx_SPI_Release(); + + if (ct) { /* Initialization succeeded */ + ret = true; + if ( ct == CT_MMC ) { + LPC17xx_SPI_SetSpeed(SPI_SPEED_20MHz); + } else { + LPC17xx_SPI_SetSpeed(SPI_SPEED_20MHz); + } + } else { /* Initialization failed */ + LPC17xx_SPI_Select (); + LPC17xx_SD_WaitForReady (); + LPC17xx_SPI_DeInit(); + } + + return ret; +} + +/***************************************************************************** + Send a Command to Flash card and get a Response + cmd: cmd index + arg: argument for the cmd + return the received response of the commond +*****************************************************************************/ +static uint8_t LPC17xx_SD_SendCmd (uint8_t cmd, uint32_t arg) +{ + uint32_t r1, n; + + if (cmd & 0x80) { /* ACMD is the command sequence of CMD55-CMD */ + cmd &= 0x7F; + r1 = LPC17xx_SD_SendCmd(APP_CMD, 0); /* CMD55 */ + if (r1 > 1) return r1; /* cmd send failed */ + } + + /* Select the card and wait for ready */ + LPC17xx_SPI_DeSelect(); + LPC17xx_SPI_Select(); + if (LPC17xx_SD_WaitForReady() == false ) return 0xFF; + + LPC17xx_SPI_SendByte (0xFF); /* prepare 8 clocks */ + LPC17xx_SPI_SendByte (cmd); + LPC17xx_SPI_SendByte (arg >> 24); + LPC17xx_SPI_SendByte (arg >> 16); + LPC17xx_SPI_SendByte (arg >> 8); + LPC17xx_SPI_SendByte (arg); + /* Checksum, should only be valid for the first command.CMD0 */ + n = 0x01; /* Dummy CRC + Stop */ + if (cmd == GO_IDLE_STATE) n = 0x95; /* Valid CRC for CMD0(0) */ + if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) */ + LPC17xx_SPI_SendByte(n); + + if (cmd == STOP_TRAN) LPC17xx_SPI_RecvByte (); /* Skip a stuff byte when stop reading */ + + n = 10; /* Wait for a valid response in timeout of 10 attempts */ + do { + r1 = LPC17xx_SPI_RecvByte (); + } while ((r1 & 0x80) && --n); + + return (r1); /* Return with the response value */ +} + +/***************************************************************************** + Read "count" Sector(s) starting from sector index "sector", + buff <- [sector, sector+1, ... sector+count-1] + if success, return true, otherwise return false +*****************************************************************************/ +static bool LPC17xx_SD_ReadSector (uint32_t sector, uint8_t *buff, uint32_t count) +{ + /* Convert to byte address if needed */ + if (!(CardType & CT_BLOCK)) sector *= SD_SECTOR_SIZE; + + if (count == 1) { /* Single block read */ + if ((LPC17xx_SD_SendCmd(READ_BLOCK, sector) == 0) + && LPC17xx_SD_ReadDataBlock(buff, SD_SECTOR_SIZE)) + count = 0; + } else { /* Multiple block read */ + if (LPC17xx_SD_SendCmd(READ_MULT_BLOCK, sector) == 0) { + do { + if (!LPC17xx_SD_ReadDataBlock(buff, SD_SECTOR_SIZE)) break; + buff += SD_SECTOR_SIZE; + } while (--count); + LPC17xx_SD_SendCmd(STOP_TRAN, 0); /* STOP_TRANSMISSION */ + } + } + LPC17xx_SPI_Release(); + + return count ? false : true; +} + +/***************************************************************************** + read specified number of data to specified buffer. + buff: Data buffer to store received data + cnt: Byte count (must be multiple of 4, normally 512) +*****************************************************************************/ +static bool LPC17xx_SD_ReadDataBlock ( uint8_t *buff, uint32_t cnt) +{ + uint8_t token; + uint32_t timeout; + + timeout = 20000; + do { /* Wait for data packet in timeout of 100ms */ + token = LPC17xx_SPI_RecvByte(); + } while ((token == 0xFF) && timeout--); + if(token != 0xFE) return false; /* If not valid data token, return with error */ + +#if USE_FIFO + LPC17xx_SPI_RecvBlock_FIFO (buff, cnt); +#else + do { /* Receive the data block into buffer */ + *buff++ = LPC17xx_SPI_RecvByte (); + *buff++ = LPC17xx_SPI_RecvByte (); + *buff++ = LPC17xx_SPI_RecvByte (); + *buff++ = LPC17xx_SPI_RecvByte (); + } while (cnt -= 4); +#endif /* USE_FIFO */ + LPC17xx_SPI_RecvByte (); /* Discard CRC */ + LPC17xx_SPI_RecvByte (); + + return true; /* Return with success */ +} + +/***************************************************************************** + Write "count" Sector(s) starting from sector index "sector", + buff -> [sector, sector+1, ... sector+count-1] + if success, return true, otherwise return false +*****************************************************************************/ +static bool LPC17xx_SD_WriteSector (uint32_t sector, const uint8_t *buff, uint32_t count) +{ + if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */ + + if (count == 1) { /* Single block write */ + if ((LPC17xx_SD_SendCmd(WRITE_BLOCK, sector) == 0) + && LPC17xx_SD_WirteDataBlock(buff, TOKEN_SINGLE_BLOCK)) + count = 0; + } else { /* Multiple block write */ + if (CardType & CT_SDC) LPC17xx_SD_SendCmd(SET_WR_BLK_ERASE_COUNT, count); + if (LPC17xx_SD_SendCmd(WRITE_MULT_BLOCK, sector) == 0) { + do { + if (!LPC17xx_SD_WirteDataBlock(buff, TOKEN_MULTI_BLOCK)) break; + buff += 512; + } while (--count); + #if 1 + if (!LPC17xx_SD_WirteDataBlock(0, TOKEN_STOP_TRAN)) /* STOP_TRAN token */ + count = 1; + #else + LPC17xx_SPI_SendByte(TOKEN_STOP_TRAN); + #endif + } + } + LPC17xx_SPI_Release(); + return count ? false : true; +} + +/***************************************************************************** + Write 512 bytes + buffer: 512 byte data block to be transmitted + token: 0xFE -> single block + 0xFC -> multi block + 0xFD -> Stop +*****************************************************************************/ +static bool LPC17xx_SD_WirteDataBlock (const uint8_t *buff, uint8_t token) +{ + uint8_t resp, i; + + i = i; // avoid warning + + LPC17xx_SPI_SendByte (token); /* send data token first*/ + + if (token != TOKEN_STOP_TRAN) { +#if USE_FIFO + LPC17xx_SPI_SendBlock_FIFO (buff); +#else + /* Send data. */ + for (i = 512/4; i ; i--) { + LPC17xx_SPI_SendByte (*buff++); + LPC17xx_SPI_SendByte (*buff++); + LPC17xx_SPI_SendByte (*buff++); + LPC17xx_SPI_SendByte (*buff++); + } +#endif /* USE_FIFO */ + LPC17xx_SPI_SendByte(0xFF); /* 16-bit CRC (Dummy) */ + LPC17xx_SPI_SendByte(0xFF); + + resp = LPC17xx_SPI_RecvByte(); /* Receive data response */ + if ((resp & 0x1F) != 0x05) /* If not accepted, return with error */ + return false; + + if ( LPC17xx_SD_WaitForReady() == false) /* Wait while Flash Card is busy. */ + return false; + } + + return true; +} + +/* Read MMC/SD Card device configuration. */ +static bool LPC17xx_SD_ReadCfg (SDCFG *cfg) +{ + uint8_t i; + uint16_t csize; + uint8_t n, csd[16]; + bool retv = false; + + /* Read the OCR - Operations Condition Register. */ + if (LPC17xx_SD_SendCmd (READ_OCR, 0) != 0x00) goto x; + for (i = 0; i < 4; i++) cfg->ocr[i] = LPC17xx_SPI_RecvByte (); + + /* Read the CID - Card Identification. */ + if ((LPC17xx_SD_SendCmd (SEND_CID, 0) != 0x00) || + (LPC17xx_SD_ReadDataBlock (cfg->cid, 16) == false)) + goto x; + + /* Read the CSD - Card Specific Data. */ + if ((LPC17xx_SD_SendCmd (SEND_CSD, 0) != 0x00) || + (LPC17xx_SD_ReadDataBlock (cfg->csd, 16) == false)) + goto x; + + cfg -> sectorsize = SD_SECTOR_SIZE; + + /* Get number of sectors on the disk (DWORD) */ + if ((cfg->csd[0] >> 6) == 1) { /* SDC ver 2.00 */ + csize = cfg->csd[9] + ((uint16_t)cfg->csd[8] << 8) + 1; + cfg -> sectorcnt = (uint32_t)csize << 10; + } else { /* SDC ver 1.XX or MMC*/ + n = (cfg->csd[5] & 15) + ((cfg->csd[10] & 128) >> 7) + ((cfg->csd[9] & 3) << 1) + 2; // 19 + csize = (cfg->csd[8] >> 6) + ((uint16_t)cfg->csd[7] << 2) + ((uint16_t)(cfg->csd[6] & 3) << 10) + 1; // 3752 + cfg -> sectorcnt = (uint32_t)csize << (n - 9); // 3842048 + } + + cfg->size = cfg -> sectorcnt * cfg -> sectorsize; // 512*3842048=1967128576Byte (1.83GB) + + /* Get erase block size in unit of sector (DWORD) */ + if (CardType & CT_SD2) { /* SDC ver 2.00 */ + if (LPC17xx_SD_SendCmd(SD_STATUS /*ACMD13*/, 0) == 0) { /* Read SD status */ + LPC17xx_SPI_RecvByte(); + if (LPC17xx_SD_ReadDataBlock(csd, 16)) { /* Read partial block */ + for (n = 64 - 16; n; n--) LPC17xx_SPI_RecvByte(); /* Purge trailing data */ + cfg->blocksize = 16UL << (csd[10] >> 4); + retv = true; + } + } + } else { /* SDC ver 1.XX or MMC */ + if ((LPC17xx_SD_SendCmd(SEND_CSD, 0) == 0) && LPC17xx_SD_ReadDataBlock(csd, 16)) { /* Read CSD */ + if (CardType & CT_SD1) { /* SDC ver 1.XX */ + cfg->blocksize = (((csd[10] & 63) << 1) + ((uint16_t)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1); + } else { /* MMC */ + // cfg->blocksize = ((uint16_t)((buf[10] & 124) >> 2) + 1) * (((buf[11] & 3) << 3) + ((buf[11] & 224) >> 5) + 1); + cfg->blocksize = ((uint16_t)((cfg->csd[10] & 124) >> 2) + 1) * (((cfg->csd[10] & 3) << 3) + ((cfg->csd[11] & 224) >> 5) + 1); + } + retv = true; + } + } + +x: LPC17xx_SPI_Release(); + return (retv); +} + +static rt_err_t rt_sdcard_init(rt_device_t dev) +{ + return RT_EOK; +} + +static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag) +{ + return RT_EOK; +} + +static rt_err_t rt_sdcard_close(rt_device_t dev) +{ + return RT_EOK; +} + +static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) +{ + bool status; + rt_uint32_t nr = size / SD_SECTOR_SIZE; + + status = LPC17xx_SD_ReadSector(part.offset * SECTOR_SIZE + pos, buffer, nr); + + if (status == true) return nr * SECTOR_SIZE; + + rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer); + return 0; +} + +static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) +{ + bool status; + rt_uint32_t nr = size / SD_SECTOR_SIZE; + + status = LPC17xx_SD_WriteSector(part.offset * SECTOR_SIZE + pos, buffer, nr); + + if (status == true) return nr * SECTOR_SIZE; + + rt_kprintf("write failed: %d, buffer 0x%08x\n", status, buffer); + return 0; +} + +static rt_err_t rt_sdcard_control(rt_device_t dev, rt_uint8_t cmd, void *args) +{ + return RT_EOK; +} + +void rt_hw_sdcard_init() +{ + if (LPC17xx_SD_Init() && LPC17xx_SD_ReadCfg(&SDCfg)) + { + bool status; + rt_uint8_t *sector; + + /* get the first sector to read partition table */ + sector = (rt_uint8_t*) rt_malloc (512); + if (sector == RT_NULL) + { + rt_kprintf("allocate partition sector buffer failed\n"); + return; + } + + status = LPC17xx_SD_ReadSector(0, sector, 512); + if (status == true) + { + /* get the first partition */ + if (dfs_filesystem_get_partition(&part, sector, 0) != 0) + { + /* there is no partition */ + part.offset = 0; + part.size = 0; + } + } + else + { + /* there is no partition table */ + part.offset = 0; + part.size = 0; + } + + /* release sector buffer */ + rt_free(sector); + + /* register sdcard device */ + sdcard_device.type = RT_Device_Class_Block; + sdcard_device.init = rt_sdcard_init; + sdcard_device.open = rt_sdcard_open; + sdcard_device.close = rt_sdcard_close; + sdcard_device.read = rt_sdcard_read; + sdcard_device.write = rt_sdcard_write; + sdcard_device.control = rt_sdcard_control; + + /* no private */ + sdcard_device.private = &SDCfg; + + rt_device_register(&sdcard_device, "sd0", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE); + + return; + } + + rt_kprintf("sdcard init failed\n"); +} diff --git a/bsp/lpc176x/sd.h b/bsp/lpc176x/sd.h new file mode 100644 index 0000000000..a2001c78fa --- /dev/null +++ b/bsp/lpc176x/sd.h @@ -0,0 +1,47 @@ +#ifndef __SD_H__ +#define __SD_H__ + +#include + +/* SD/MMC Commands */ +#define GO_IDLE_STATE (0x40 + 0) // CMD0 +#define SEND_OP_COND (0x40 + 1) +#define CMD8 (0x40 + 8) // CMD8 +#define SEND_CSD (0x40 + 9) +#define SEND_CID (0x40 + 10) // CMD10 +#define STOP_TRAN (0x40 + 12) // CMD12 +#define SET_BLOCKLEN (0x40 + 16) // CMD16 +#define READ_BLOCK (0x40 + 17) +#define READ_MULT_BLOCK (0x40 + 18) +#define WRITE_BLOCK (0x40 + 24) +#define WRITE_MULT_BLOCK (0x40 + 25) +#define APP_CMD (0x40 + 55) // CMD55 +#define READ_OCR (0x40 + 58) // CMD58 +#define CRC_ON_OFF (0x40 + 59) +#define SD_SEND_OP_COND (0xC0 + 41) // ACMD41 +#define SD_STATUS (0xC0 + 13) // ACMD13, SD_STATUS (SDC) +#define SET_WR_BLK_ERASE_COUNT (0xC0 + 23) // ACMD23 (SDC) + +/* Card type flags (CardType) */ +#define CT_NONE 0x00 +#define CT_MMC 0x01 +#define CT_SD1 0x02 +#define CT_SD2 0x04 +#define CT_SDC (CT_SD1|CT_SD2) +#define CT_BLOCK 0x08 + +/* MMC device configuration */ +typedef struct tagSDCFG{ + uint32_t sernum; // serial number + uint32_t size; // size=sectorsize*sectorcnt + uint32_t sectorcnt; // + uint32_t sectorsize; // 512 + uint32_t blocksize; // erase block size + uint8_t ocr[4]; // OCR + uint8_t cid[16]; // CID + uint8_t csd[16]; // CSD +} SDCFG; + +void rt_hw_sdcard_init(void); + +#endif diff --git a/bsp/lpc176x/spi.c b/bsp/lpc176x/spi.c new file mode 100644 index 0000000000..cd9b14a68c --- /dev/null +++ b/bsp/lpc176x/spi.c @@ -0,0 +1,197 @@ +#include "LPC17xx.h" /* LPC17xx definitions */ +#include "spi.h" + +/* bit definitions for register SSPCR0. */ +#define SSPCR0_DSS 0 +#define SSPCR0_CPOL 6 +#define SSPCR0_CPHA 7 +#define SSPCR0_SCR 8 +/* bit definitions for register SSPCR1. */ +#define SSPCR1_SSE 1 +/* bit definitions for register SSPSR. */ +#define SSPSR_TFE 0 +#define SSPSR_TNF 1 +#define SSPSR_RNE 2 +#define SSPSR_RFF 3 +#define SSPSR_BSY 4 + +/* Local functions */ +static uint8_t LPC17xx_SPI_SendRecvByte (uint8_t byte_s); + +/* Initialize the SSP0, SSP0_PCLK=CCLK=72MHz */ +void LPC17xx_SPI_Init (void) +{ + uint32_t dummy; + + dummy = dummy; // avoid warning + + /* Initialize and enable the SSP0 Interface module. */ + LPC_SC->PCONP |= (1 << 21); /* Enable power to SSPI0 block */ + + /* SSEL is GPIO, output set to high. */ + LPC_GPIO0->FIODIR |= (1<<16); /* P0.16 is output */ + LPC_PINCON->PINSEL1 &= ~(3<<0); /* P0.16 SSEL (used as GPIO) */ + LPC17xx_SPI_DeSelect (); /* set P0.16 high (SSEL inactiv) */ + + /* SCK, MISO, MOSI are SSP pins. */ + LPC_PINCON->PINSEL0 &= ~(3UL<<30); /* P0.15 cleared */ + LPC_PINCON->PINSEL0 |= (2UL<<30); /* P0.15 SCK0 */ + LPC_PINCON->PINSEL1 &= ~((3<<2) | (3<<4)); /* P0.17, P0.18 cleared */ + LPC_PINCON->PINSEL1 |= ((2<<2) | (2<<4)); /* P0.17 MISO0, P0.18 MOSI0 */ + + /* PCLK_SSP0=CCLK */ + LPC_SC->PCLKSEL1 &= ~(3<<10); /* PCLKSP0 = CCLK/4 (18MHz) */ + LPC_SC->PCLKSEL1 |= (1<<10); /* PCLKSP0 = CCLK (72MHz) */ + + LPC_SSP0->CR0 = 0x0007; /* 8Bit, CPOL=0, CPHA=0 */ + LPC_SSP0->CR1 = 0x0002; /* SSP0 enable, master */ + + LPC17xx_SPI_SetSpeed (SPI_SPEED_400kHz); + + /* wait for busy gone */ + while( LPC_SSP0->SR & ( 1 << SSPSR_BSY ) ); + + /* drain SPI RX FIFO */ + while( LPC_SSP0->SR & ( 1 << SSPSR_RNE ) ) + { + dummy = LPC_SSP0->DR; + } +} + +/* Close SSP0 */ +void LPC17xx_SPI_DeInit( void ) +{ + // disable SPI + LPC_SSP0->CR1 = 0; + + // Pins to GPIO + LPC_PINCON->PINSEL0 &= ~(3UL<<30); + LPC_PINCON->PINSEL1 &= ~((3<<2) | (3<<4)); + + // disable SSP power + LPC_SC->PCONP &= ~(1 << 21); +} + +/* Set a SSP0 clock speed to desired value. */ +void LPC17xx_SPI_SetSpeed (uint8_t speed) +{ + speed &= 0xFE; + if ( speed < 2 ) { + speed = 2 ; + } + LPC_SSP0->CPSR = speed; +} + +/* SSEL: low */ +void LPC17xx_SPI_Select () +{ + LPC_GPIO0->FIOPIN &= ~(1<<16); +} + +/* SSEL: high */ +void LPC17xx_SPI_DeSelect () +{ + LPC_GPIO0->FIOPIN |= (1<<16); +} + +/* Send one byte then recv one byte of response. */ +static uint8_t LPC17xx_SPI_SendRecvByte (uint8_t byte_s) +{ + uint8_t byte_r; + + LPC_SSP0->DR = byte_s; + while (LPC_SSP0->SR & (1 << SSPSR_BSY) /*BSY*/); /* Wait for transfer to finish */ +// while( !( LPC_SSP0->SR & ( 1 << SSPSR_RNE ) ) ); /* Wait untill the Rx FIFO is not empty */ + byte_r = LPC_SSP0->DR; + + return byte_r; /* Return received value */ +} + +/* Send one byte */ +void LPC17xx_SPI_SendByte (uint8_t data) +{ + LPC17xx_SPI_SendRecvByte (data); +} + +/* Recv one byte */ +uint8_t LPC17xx_SPI_RecvByte () +{ + return LPC17xx_SPI_SendRecvByte (0xFF); +} + +/* Release SSP0 */ +void LPC17xx_SPI_Release (void) +{ + LPC17xx_SPI_DeSelect (); + LPC17xx_SPI_RecvByte (); +} + + +#if USE_FIFO +/* on LPC17xx the FIFOs have 8 elements which each can hold up to 16 bits */ +#define FIFO_ELEM 8 + +/* Receive btr (must be multiple of 4) bytes of data and store in buff. */ +void LPC17xx_SPI_RecvBlock_FIFO (uint8_t *buff, uint32_t btr) +{ + uint32_t hwtr, startcnt, i, rec; + + hwtr = btr/2; /* byte number in unit of short */ + if ( btr < FIFO_ELEM ) { + startcnt = hwtr; + } else { + startcnt = FIFO_ELEM; + } + + LPC_SSP0 -> CR0 |= 0x0f; /* DSS to 16 bit */ + + for ( i = startcnt; i; i-- ) { + LPC_SSP0 -> DR = 0xffff; /* fill TX FIFO, prepare clk for receive */ + } + + do { + while ( !(LPC_SSP0->SR & ( 1 << SSPSR_RNE ) ) ) { + // wait for data in RX FIFO (RNE set) + } + rec = LPC_SSP0->DR; + if ( i < ( hwtr - startcnt ) ) { + LPC_SSP0->DR = 0xffff; /* fill TX FIFO, prepare clk for receive */ + } + *buff++ = (uint8_t)(rec>>8); + *buff++ = (uint8_t)(rec); + i++; + } while ( i < hwtr ); + + LPC_SSP0->CR0 &= ~0x08; /* DSS to 8 bit */ +} + +/* Send 512 bytes of data block (stored in buff). */ +void LPC17xx_SPI_SendBlock_FIFO (const uint8_t *buff) +{ + uint32_t cnt; + uint16_t data; + + LPC_SSP0->CR0 |= 0x0f; /* DSS to 16 bit */ + + /* fill the FIFO unless it is full */ + for ( cnt = 0; cnt < ( 512 / 2 ); cnt++ ) + { + /* wait for TX FIFO not full (TNF) */ + while ( !( LPC_SSP0->SR & ( 1 << SSPSR_TNF ) ) ); + + data = (*buff++) << 8; + data |= *buff++; + LPC_SSP0->DR = data; + } + + /* wait for BSY gone */ + while ( LPC_SSP0->SR & ( 1 << SSPSR_BSY ) ); + + /* drain receive FIFO */ + while ( LPC_SSP0->SR & ( 1 << SSPSR_RNE ) ) { + data = LPC_SSP0->DR; + } + + LPC_SSP0->CR0 &= ~0x08; /* DSS to 8 bit */ +} +#endif /* USE_FIFO */ diff --git a/bsp/lpc176x/spi.h b/bsp/lpc176x/spi.h new file mode 100644 index 0000000000..0cd2955058 --- /dev/null +++ b/bsp/lpc176x/spi.h @@ -0,0 +1,31 @@ +#ifndef __LPC17XX_SPI_H__ +#define __LPC17XX_SPI_H__ + +#include +#include + +// if not use FIFO, R: 600kB/s, W: 500kB/s +// if use FIFO, R: 1.2MB/s, W: 800kB/s +#define USE_FIFO 1 + +/* bit-frequency = PCLK / (CPSDVSR * [SCR+1]), here SCR=0, PCLK=72MHz, must be even */ +#define SPI_SPEED_20MHz 4 /* => 18MHz */ +#define SPI_SPEED_25MHz 4 /* => 18MHz */ +#define SPI_SPEED_400kHz 180 /* => 400kHz */ + +/* external functions */ +void LPC17xx_SPI_Init (void); +void LPC17xx_SPI_DeInit( void ); +void LPC17xx_SPI_Release (void); +void LPC17xx_SPI_SetSpeed (uint8_t speed); +void LPC17xx_SPI_Select (void); +void LPC17xx_SPI_DeSelect (void); +void LPC17xx_SPI_SendByte (uint8_t data); +uint8_t LPC17xx_SPI_RecvByte (void); + +#if USE_FIFO +void LPC17xx_SPI_RecvBlock_FIFO (uint8_t *buff, uint32_t btr); +void LPC17xx_SPI_SendBlock_FIFO (const uint8_t *buff); +#endif + +#endif // __LPC17XX_SPI_H__ diff --git a/bsp/lpc176x/startup.c b/bsp/lpc176x/startup.c index 89137c4c7c..dce89005ab 100644 --- a/bsp/lpc176x/startup.c +++ b/bsp/lpc176x/startup.c @@ -19,6 +19,10 @@ #include "lpc17xx.h" #include "board.h" +#ifdef RT_USING_DFS +#include "sd.h" +#endif + /** * @addtogroup LPC17 */ @@ -94,6 +98,9 @@ void rtthread_startup(void) rt_system_scheduler_init(); #ifdef RT_USING_DEVICE +#ifdef RT_USING_DFS + rt_hw_sdcard_init(); +#endif /* init all device */ rt_device_init_all(); #endif