update lpc2478 bsp
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@10 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
parent
e653914623
commit
53919ba500
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@ -58,44 +58,6 @@ void rt_hw_board_init()
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T0TCR = 0x01; //enable timer0 counter
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T0TCR = 0x01; //enable timer0 counter
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}
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}
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#ifdef RT_USING_FINSH
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extern void finsh_notify(void);
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void rt_serial_isr(int vector)
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{
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rt_uint32_t iir;
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if (U0LSR & 0x01)
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{
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rt_uint8_t ch;
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while (U0LSR & 0x01)
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{
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ch = U0RBR;
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rt_serial_savechar(ch);
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}
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/* notify finsh shell thread */
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finsh_notify();
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}
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/* clear interrupt source */
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iir = U0IIR;
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/* acknowledge Interrupt */
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VICVectAddr = 0;
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}
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void rt_hw_finsh_init()
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{
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/* init UART rx interrupt */
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U0IER = 0x01;
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/* install UART isr */
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rt_hw_interrupt_install(UART0_INT, rt_serial_isr, RT_NULL);
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rt_hw_interrupt_umask(UART0_INT);
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}
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#endif
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/******************************************************************************
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/******************************************************************************
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** Function name: TargetInit
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** Function name: TargetInit
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**
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**
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@ -99,6 +99,9 @@ void rt_hw_finsh_init(void);
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#define VECT_ADDR_INDEX 0x100
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#define VECT_ADDR_INDEX 0x100
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#define VECT_CNTL_INDEX 0x200
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#define VECT_CNTL_INDEX 0x200
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#define CCLK 60000000 /* Fosc = 12MHz, M = 5 */
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#define PCLK 15000000 /* CCLK/4, use default */
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/******************************************************************************
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/******************************************************************************
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** Function name: TargetInit
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** Function name: TargetInit
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**
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**
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@ -9,7 +9,7 @@
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#define RT_ALIGN_SIZE 4
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#define RT_ALIGN_SIZE 4
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/* PRIORITY_MAX*/
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/* PRIORITY_MAX*/
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#define RT_THREAD_PRIORITY_MAX 32
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#define RT_THREAD_PRIORITY_MAX 256
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/* Tick per Second*/
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/* Tick per Second*/
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#define RT_TICK_PER_SECOND 100
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#define RT_TICK_PER_SECOND 100
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@ -55,7 +55,9 @@
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/* SECTION: Device System */
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/* SECTION: Device System */
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/* Using Device System*/
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/* Using Device System*/
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/* #define RT_USING_DEVICE */
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#define RT_USING_DEVICE
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#define RT_USING_UART1
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#define RT_UART_RX_BUFFER_SIZE 64
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/* SECTION: Console options */
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/* SECTION: Console options */
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/* the buffer size of console*/
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/* the buffer size of console*/
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@ -68,10 +70,6 @@
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#define FINSH_USING_SYMTAB
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#define FINSH_USING_SYMTAB
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#define FINSH_USING_DESCRIPTION
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#define FINSH_USING_DESCRIPTION
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/* SECTION: emulator options */
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/* Using QEMU or SkyEye*/
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/* #define RT_USING_EMULATOR */
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/* SECTION: a mini libc */
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/* SECTION: a mini libc */
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/* Using mini libc library*/
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/* Using mini libc library*/
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/* #define RT_USING_MINILIBC */
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/* #define RT_USING_MINILIBC */
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@ -14,136 +14,374 @@
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#include <rthw.h>
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtthread.h>
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#include "lpc214x.h"
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#include "lpc214x.h"
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#include "board.h"
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#include "board.h"
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void rt_serial_init(void);
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/* serial hardware register */
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#define REG8(d) (*((volatile unsigned char *)(d)))
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#define REG32(d) (*((volatile unsigned long *)(d)))
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#define UART_RBR(base) REG8(base + 0x00)
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#define UART_THR(base) REG8(base + 0x00)
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#define UART_IER(base) REG32(base + 0x04)
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#define UART_IIR(base) REG32(base + 0x08)
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#define UART_FCR(base) REG8(base + 0x08)
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#define UART_LCR(base) REG8(base + 0x0C)
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#define UART_MCR(base) REG8(base + 0x10)
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#define UART_LSR(base) REG8(base + 0x14)
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#define UART_MSR(base) REG8(base + 0x18)
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#define UART_SCR(base) REG8(base + 0x1C)
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#define UART_DLL(base) REG8(base + 0x00)
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#define UART_DLM(base) REG8(base + 0x04)
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#define UART_ACR(base) REG32(base + 0x20)
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#define UART_FDR(base) REG32(base + 0x28)
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#define UART_TER(base) REG8(base + 0x30)
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/* LPC serial device */
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struct rt_lpcserial
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{
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/* inherit from device */
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struct rt_device parent;
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rt_uint32_t hw_base;
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rt_uint32_t irqno;
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rt_uint32_t baudrate;
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/* reception field */
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rt_uint16_t save_index, read_index;
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rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
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};
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#ifdef RT_USING_UART1
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struct rt_lpcserial serial1;
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#endif
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#ifdef RT_USING_UART2
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struct rt_lpcserial serial2;
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#endif
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void rt_hw_serial_init(void);
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#define PCLK 18000000
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#define BAUD_RATE 115200
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#define U0PINS 0x00000005
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#define U0PINS 0x00000005
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void rt_hw_uart_isr(struct rt_lpcserial* lpc_serial)
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{
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UNUSED rt_uint32_t iir;
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RT_ASSERT(lpc_serial != RT_NULL)
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if (UART_LSR(lpc_serial->hw_base) & 0x01)
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{
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rt_base_t level;
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while (UART_LSR(lpc_serial->hw_base) & 0x01)
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{
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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/* read character */
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lpc_serial->rx_buffer[lpc_serial->save_index] =
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UART_RBR(lpc_serial->hw_base);
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lpc_serial->save_index ++;
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if (lpc_serial->save_index >= RT_UART_RX_BUFFER_SIZE)
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lpc_serial->save_index = 0;
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/* if the next position is read index, discard this 'read char' */
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if (lpc_serial->save_index == lpc_serial->read_index)
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{
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lpc_serial->read_index ++;
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if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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lpc_serial->read_index = 0;
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}
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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}
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/* invoke callback */
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if(lpc_serial->parent.rx_indicate != RT_NULL)
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{
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lpc_serial->parent.rx_indicate(&lpc_serial->parent, 1);
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}
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}
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/* clear interrupt source */
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iir = UART_IIR(lpc_serial->hw_base);
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/* acknowledge Interrupt */
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VICVectAddr = 0;
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}
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#ifdef RT_USING_UART1
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void rt_hw_uart_isr_1(int irqno)
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{
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/* get lpc serial device */
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rt_hw_uart_isr(&serial1);
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}
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#endif
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#ifdef RT_USING_UART2
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void rt_hw_uart_isr_2(int irqno)
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{
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/* get lpc serial device */
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rt_hw_uart_isr(&serial2);
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}
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#endif
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/**
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/**
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* @addtogroup LPC2100
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* @addtogroup LPC214x
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*/
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*/
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/*@{*/
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/*@{*/
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/**
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static rt_err_t rt_serial_init (rt_device_t dev)
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* This function is used to display a string on console, normally, it's
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* invoked by rt_kprintf
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*
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* @param str the displayed string
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*/
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void rt_console_puts(const char* str)
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{
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{
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while (*str)
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return RT_EOK;
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{
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rt_serial_putc (*str++);
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}
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}
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}
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#define UART_RX_BUFFER_SIZE 64
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static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
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static rt_uint8_t uart_rx_buffer[UART_RX_BUFFER_SIZE];
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static rt_uint32_t uart_read_index, uart_save_index;
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/**
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* This function initializes serial
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*/
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void rt_serial_init()
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{
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{
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unsigned long Fdiv;
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struct rt_lpcserial* lpc_serial;
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lpc_serial = (struct rt_lpcserial*) dev;
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PINSEL0 = 0x00000050; /* RxD0 and TxD0 */
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RT_ASSERT(lpc_serial != RT_NULL);
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* init UART rx interrupt */
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UART_IER(lpc_serial->hw_base) = 0x01;
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rt_memset(uart_rx_buffer, 0, sizeof(uart_rx_buffer));
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/* install ISR */
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uart_read_index = uart_save_index = 0;
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if (lpc_serial->irqno == UART0_INT)
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{
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U0LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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#ifdef RT_USING_UART1
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/*PCLK select is 00,so /4*/
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rt_hw_interrupt_install(lpc_serial->irqno, rt_hw_uart_isr_1, RT_NULL);
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Fdiv = ( PCLK / 16 ) / BAUD_RATE ; /*baud rate */
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#endif
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U0DLM = Fdiv / 256;
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}
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U0DLL = Fdiv % 256;
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else
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U0FCR = 0x00; /* Enable and reset TX and RX FIFO. */
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{
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U0LCR = 0x03; /* DLAB = 0 */
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#ifdef RT_USING_UART2
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rt_hw_interrupt_install(lpc_serial->irqno, rt_hw_uart_isr_2, RT_NULL);
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#endif
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}
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}
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/* save a char to serial buffer */
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rt_hw_interrupt_umask(lpc_serial->irqno);
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void rt_serial_savechar(char ch)
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}
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return RT_EOK;
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}
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static rt_err_t rt_serial_close(rt_device_t dev)
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{
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{
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struct rt_lpcserial* lpc_serial;
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lpc_serial = (struct rt_lpcserial*) dev;
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RT_ASSERT(lpc_serial != RT_NULL);
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* disable UART rx interrupt */
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UART_IER(lpc_serial->hw_base) = 0x00;
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}
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return RT_EOK;
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}
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static rt_err_t rt_serial_control(rt_device_t dev, rt_uint8_t cmd, void *args)
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{
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return RT_EOK;
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}
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static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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{
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rt_uint8_t* ptr;
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struct rt_lpcserial *lpc_serial = (struct rt_lpcserial*)dev;
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RT_ASSERT(lpc_serial != RT_NULL);
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/* point to buffer */
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ptr = (rt_uint8_t*) buffer;
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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while (size)
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{
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/* interrupt receive */
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rt_base_t level;
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rt_base_t level;
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/* disable interrupt */
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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level = rt_hw_interrupt_disable();
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if (lpc_serial->read_index != lpc_serial->save_index)
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uart_rx_buffer[uart_save_index] = ch;
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uart_save_index ++;
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if (uart_save_index >= UART_RX_BUFFER_SIZE)
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uart_save_index = 0;
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/* if the next position is read index, discard this 'read char' */
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if (uart_save_index == uart_read_index)
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{
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{
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uart_read_index ++;
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*ptr = lpc_serial->rx_buffer[lpc_serial->read_index];
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if (uart_read_index >= UART_RX_BUFFER_SIZE)
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uart_read_index = 0;
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lpc_serial->read_index ++;
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if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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lpc_serial->read_index = 0;
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}
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}
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else
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{
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/* no data in rx buffer */
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/* enable interrupt */
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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rt_hw_interrupt_enable(level);
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}
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break;
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/**
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* This function read a character from serial without interrupt enable mode
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*
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* @return the read char
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*/
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char rt_serial_getc()
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{
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char ch;
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rt_base_t level;
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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if (uart_read_index != uart_save_index)
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{
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ch = uart_rx_buffer[uart_read_index];
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uart_read_index ++;
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if (uart_read_index >= UART_RX_BUFFER_SIZE)
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uart_read_index = 0;
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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return ch;
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}
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}
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/* enable interrupt */
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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rt_hw_interrupt_enable(level);
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return 0;
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ptr ++; size --;
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}
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}
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/**
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return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
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* This function will write a character to serial without interrupt enable mode
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}
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*
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else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
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* @param c the char to write
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*/
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void rt_serial_putc(const char c)
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{
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{
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/*
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/* not support right now */
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to be polite with serial console add a line feed
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RT_ASSERT(0);
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to the carriage return character
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*/
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if (c=='\n')
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{
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while (!(U0LSR & 0x20));
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||||||
U0THR = '\r';
|
|
||||||
}
|
}
|
||||||
|
|
||||||
while (!(U0LSR & 0x20));
|
/* polling mode */
|
||||||
U0THR = c;
|
while (size && (UART_LSR(lpc_serial->hw_base) & 0x01))
|
||||||
|
{
|
||||||
|
/* Read Character */
|
||||||
|
*ptr = UART_RBR(lpc_serial->hw_base);
|
||||||
|
|
||||||
|
ptr ++;
|
||||||
|
size --;
|
||||||
|
}
|
||||||
|
|
||||||
|
return (rt_size_t)ptr - (rt_size_t)buffer;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
|
||||||
|
{
|
||||||
|
struct rt_lpcserial* lpc_serial;
|
||||||
|
char *ptr;
|
||||||
|
|
||||||
|
lpc_serial = (struct rt_lpcserial*) dev;
|
||||||
|
if (dev->flag & RT_DEVICE_FLAG_INT_TX)
|
||||||
|
{
|
||||||
|
/* not support */
|
||||||
|
RT_ASSERT(0);
|
||||||
|
}
|
||||||
|
else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
|
||||||
|
{
|
||||||
|
/* not support */
|
||||||
|
RT_ASSERT(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* polling write */
|
||||||
|
ptr = (char *)buffer;
|
||||||
|
|
||||||
|
if (dev->flag & RT_DEVICE_FLAG_STREAM)
|
||||||
|
{
|
||||||
|
/* stream mode */
|
||||||
|
while (size)
|
||||||
|
{
|
||||||
|
if (*ptr == '\n')
|
||||||
|
{
|
||||||
|
while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
|
||||||
|
UART_THR(lpc_serial->hw_base) = '\r';
|
||||||
|
}
|
||||||
|
|
||||||
|
while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
|
||||||
|
UART_THR(lpc_serial->hw_base) = *ptr;
|
||||||
|
|
||||||
|
ptr ++;
|
||||||
|
size --;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
while (size)
|
||||||
|
{
|
||||||
|
while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
|
||||||
|
UART_THR(lpc_serial->hw_base) = *ptr;
|
||||||
|
|
||||||
|
ptr ++;
|
||||||
|
size --;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return (rt_size_t) ptr - (rt_size_t) buffer;
|
||||||
|
}
|
||||||
|
|
||||||
|
void rt_hw_serial_init(void)
|
||||||
|
{
|
||||||
|
struct rt_lpcserial* lpc_serial;
|
||||||
|
|
||||||
|
#ifdef RT_USING_UART1
|
||||||
|
lpc_serial = &serial1;
|
||||||
|
|
||||||
|
lpc_serial->parent.type = RT_Device_Class_Char;
|
||||||
|
|
||||||
|
lpc_serial->hw_base = 0xE000C000;
|
||||||
|
lpc_serial->baudrate = 115200;
|
||||||
|
lpc_serial->irqno = UART0_INT;
|
||||||
|
|
||||||
|
rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
|
||||||
|
lpc_serial->read_index = lpc_serial->save_index = 0;
|
||||||
|
|
||||||
|
/* Enable UART0 RxD and TxD pins */
|
||||||
|
PINSEL0 |= 0x05;
|
||||||
|
|
||||||
|
/* 8 bits, no Parity, 1 Stop bit */
|
||||||
|
UART_LCR(lpc_serial->hw_base) = 0x83;
|
||||||
|
|
||||||
|
/* Setup Baudrate */
|
||||||
|
UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
|
||||||
|
UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
|
||||||
|
|
||||||
|
/* DLAB = 0 */
|
||||||
|
UART_LCR(lpc_serial->hw_base) = 0x03;
|
||||||
|
|
||||||
|
lpc_serial->parent.init = rt_serial_init;
|
||||||
|
lpc_serial->parent.open = rt_serial_open;
|
||||||
|
lpc_serial->parent.close = rt_serial_close;
|
||||||
|
lpc_serial->parent.read = rt_serial_read;
|
||||||
|
lpc_serial->parent.write = rt_serial_write;
|
||||||
|
lpc_serial->parent.control = rt_serial_control;
|
||||||
|
lpc_serial->parent.private = RT_NULL;
|
||||||
|
|
||||||
|
rt_device_register(&lpc_serial->parent,
|
||||||
|
"uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef RT_USING_UART2
|
||||||
|
lpc_serial = &serial2;
|
||||||
|
|
||||||
|
lpc_serial->parent.type = RT_Device_Class_Char;
|
||||||
|
|
||||||
|
lpc_serial->hw_base = 0xE0010000;
|
||||||
|
lpc_serial->baudrate = 115200;
|
||||||
|
lpc_serial->irqno = UART1_INT;
|
||||||
|
|
||||||
|
rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
|
||||||
|
lpc_serial->read_index = lpc_serial->save_index = 0;
|
||||||
|
|
||||||
|
/* Enable UART1 RxD and TxD pins */
|
||||||
|
PINSEL0 |= 0x05 << 16;
|
||||||
|
|
||||||
|
/* 8 bits, no Parity, 1 Stop bit */
|
||||||
|
UART_LCR(lpc_serial->hw_base) = 0x83;
|
||||||
|
|
||||||
|
/* Setup Baudrate */
|
||||||
|
UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
|
||||||
|
UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
|
||||||
|
|
||||||
|
/* DLAB = 0 */
|
||||||
|
UART_LCR(lpc_serial->hw_base) = 0x03;
|
||||||
|
|
||||||
|
lpc_serial->parent.init = rt_serial_init;
|
||||||
|
lpc_serial->parent.open = rt_serial_open;
|
||||||
|
lpc_serial->parent.close = rt_serial_close;
|
||||||
|
lpc_serial->parent.read = rt_serial_read;
|
||||||
|
lpc_serial->parent.write = rt_serial_write;
|
||||||
|
lpc_serial->parent.control = rt_serial_control;
|
||||||
|
lpc_serial->parent.private = RT_NULL;
|
||||||
|
|
||||||
|
rt_device_register(&lpc_serial->parent,
|
||||||
|
"uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/*@}*/
|
/*@}*/
|
||||||
|
|
Loading…
Reference in New Issue