parent
dbd389a5a0
commit
5121b8da43
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@ -168,8 +168,16 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
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uint32_t FLatency = 0;
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &FLatency);
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uint32_t pclk1_doubler = 1 + ( RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1 );
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uint32_t pclk2_doubler = 1 + ( RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1 );
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uint32_t pclk1_doubler = 1;
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uint32_t pclk2_doubler = 1;
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if(RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1)
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{
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pclk1_doubler = pclk1_doubler + 1;
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}
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if(RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1)
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{
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pclk2_doubler = pclk2_doubler + 1;
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}
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/* time init */
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#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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@ -300,8 +308,16 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
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uint32_t FLatency = 0;
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &FLatency);
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uint32_t pclk1_doubler = 1 + ( RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1 );
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uint32_t pclk2_doubler = 1 + ( RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1 );
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uint32_t pclk1_doubler = 1;
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uint32_t pclk2_doubler = 1;
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if(RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1)
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{
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pclk1_doubler = pclk1_doubler + 1;
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}
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if(RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1)
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{
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pclk2_doubler = pclk2_doubler + 1;
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}
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#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
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