diff --git a/bsp/bluetrum/README.md b/bsp/bluetrum/README.md new file mode 100644 index 0000000000..ae5edfc14a --- /dev/null +++ b/bsp/bluetrum/README.md @@ -0,0 +1 @@ +# Bluetrum RISC-V Processor Support Package diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/.config b/bsp/bluetrum/ab32vg1-ab-prougen/.config new file mode 100644 index 0000000000..b0ea6b0b1d --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/.config @@ -0,0 +1,491 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Project Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=8 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=1024 +CONFIG_RT_USING_TIMER_SOFT=y +CONFIG_RT_TIMER_THREAD_PRIO=4 +CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 +CONFIG_RT_DEBUG=y +# CONFIG_RT_DEBUG_COLOR is not set +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +CONFIG_RT_USING_MEMHEAP=y +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +CONFIG_RT_USING_DEVICE_OPS=y +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" +CONFIG_RT_VER_NUM=0x40003 +# CONFIG_RT_USING_CPU_FFS is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=1024 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_CMD_SIZE=80 +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_USING_MSH_DEFAULT=y +# CONFIG_FINSH_USING_MSH_ONLY is not set +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +# CONFIG_RT_SERIAL_USING_DMA is not set +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +CONFIG_RT_USING_LIBC=y +# CONFIG_RT_USING_PTHREADS is not set +# CONFIG_RT_USING_MODULE is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set + +# +# multimedia packages +# +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set + +# +# system packages +# +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_PKG_USING_PPOOL is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set + +# +# miscellaneous packages +# +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_MULTIBUTTON_V102 is not set +# CONFIG_PKG_USING_MULTIBUTTON_LATEST_VERSION is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set + +# +# games: games run on RT-Thread console +# +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set + +# +# Hardware Drivers Config +# + +# +# Onboard Peripheral Drivers +# +CONFIG_BSP_USING_USB_TO_USART=y + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_UART0=y + +# +# Board extended module Drivers +# +CONFIG_BOARD_BLUETRUM_EVB=y diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/.cproject b/bsp/bluetrum/ab32vg1-ab-prougen/.cproject new file mode 100644 index 0000000000..a6a2f9f036 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/.cproject @@ -0,0 +1,155 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/.gitignore b/bsp/bluetrum/ab32vg1-ab-prougen/.gitignore new file mode 100644 index 0000000000..f43ad7b6e0 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/.gitignore @@ -0,0 +1,13 @@ +*.dblite +*.bin +*.dcf +*.map +*.lst +*.pyc +*.elf +*.old +*.o + +build +dist +packages diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/.project b/bsp/bluetrum/ab32vg1-ab-prougen/.project new file mode 100644 index 0000000000..39a40bd40c --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/.project @@ -0,0 +1,27 @@ + + + ab32vg1 + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/.settings/.rtmenus b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/.rtmenus new file mode 100644 index 0000000000..353addb05a Binary files /dev/null and b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/.rtmenus differ diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/.settings/language.settings.xml b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/language.settings.xml new file mode 100644 index 0000000000..f4f2ad89a4 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/language.settings.xml @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/.settings/org.eclipse.core.resources.prefs b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/org.eclipse.core.resources.prefs new file mode 100644 index 0000000000..99f26c0203 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/org.eclipse.core.resources.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +encoding/=UTF-8 diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/.settings/projcfg.ini b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/projcfg.ini new file mode 100644 index 0000000000..a88e82b9c5 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/projcfg.ini @@ -0,0 +1,19 @@ +#RT-Thread Studio Project Configuration +#Mon Dec 14 17:48:04 CST 2020 +cfg_version=v3.0 +board_name=AB32VG1-AB-PROUGEN +example_name= +hardware_adapter=ST-LINK +project_type=rt-thread +board_base_nano_proj=False +chip_name=AB32VG1 +selected_rtt_version=latest +bsp_version=1.0.1 +os_branch=full +output_project_path=D\:/Softwares/RT-ThreadStudio/workspace +is_base_example_project=False +is_use_scons_build=True +project_base_bsp=true +project_name=ab32101 +os_version=latest +bsp_path=repo/Local/Board_Support_Packages/Bluetrum/AB32VG1-AB-PROUGEN/1.0.1/Bluetrum_AB32VG1-ab-prougen diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/Kconfig b/bsp/bluetrum/ab32vg1-ab-prougen/Kconfig new file mode 100644 index 0000000000..99cc5c4410 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/Kconfig @@ -0,0 +1,27 @@ +mainmenu "RT-Thread Project Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "board/Kconfig" + +config BOARD_BLUETRUM_EVB + bool + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/README.md b/bsp/bluetrum/ab32vg1-ab-prougen/README.md new file mode 100644 index 0000000000..49b13893f3 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/README.md @@ -0,0 +1,117 @@ +# AB32VG1 骄龙开发板 BSP 说明 + +## 简介 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +ab32vg1-prougen 是 中科蓝讯(Bluetrum) 推出的一款基于 RISC-V 内核的开发板，最高主频为 120Mhz，该开发板芯片为 AB5301A。 + +开发板外观如下图所示： + +![board](figures/board.png) + +该开发板常用 **板载资源** 如下： + +- MCU：AB5301A，主频 120MHz，可超频至 192MHz，4Mbit FLASH ，192KB RAM。 +- 常用外设 + - LED: RGB灯 + - 按键: 3 个, USER(s2,s3) and RESET(s1) +- 常用接口：USB 转串口、SD 卡接口 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------- | :----------: | :---------- | +| USB 转串口 | 支持 | | +| SD卡 | 即将支持 | | +| IRDA | 即将支持 | | +| 音频接口 | 即将支持 | | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA PB PE PF | +| UART | 支持 | UART0/1/2 | +| SDIO | 即将支持 | | +| ADC | 即将支持 | | +| SPI | 即将支持 | | +| I2C | 即将支持 | 软件 I2C | +| RTC | 即将支持 | | +| WDT | 即将支持 | | +| FLASH | 即将支持 | | +| PWM | 即将支持 | | +| USB Device | 暂不支持 | | +| USB Host | 暂不支持 | | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 GCC 开发环境。下面介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +运行 `scons` 编译得到 `.dcf` 固件，通过 `downloader` 进行下载 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LED 常亮、绿色 LED 会周期性闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.3 build Dec 9 2020 + 2006 - 2020 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口0 的功能，如果需使用 SD 卡、Flash 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons` 命令重新编译工程。 + +## 注意事项 + +波特率默认为 1.5M，需要使用 [Downloader](https://github.com/BLUETRUM/Downloader) 下载 `.dcf` 到芯片 + +编译报错的时候，如果出现重复定义的报错，可能需要在 `cconfig.h` 中手动添加以下配置 + +``` +#define HAVE_SIGEVENT 1 +#define HAVE_SIGINFO 1 +#define HAVE_SIGVAL 1 +``` + +## 维护人信息 + +- [greedyhao](https://github.com/greedyhao) diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/SConscript b/bsp/bluetrum/ab32vg1-ab-prougen/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/SConstruct b/bsp/bluetrum/ab32vg1-ab-prougen/SConstruct new file mode 100644 index 0000000000..697488940c --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/SConstruct @@ -0,0 +1,61 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) +env['ASCOM'] = env['ASPPCOM'] + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +if os.path.exists(SDK_ROOT + '/libcpu'): + libcpu_path_prefix = SDK_ROOT + '/libcpu' +else: + libcpu_path_prefix = os.path.dirname(SDK_ROOT) + '/libcpu' + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = True) + +bsp_library_type = 'hal_libraries' +rtconfig.BSP_LIBRARY_TYPE = bsp_library_type + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, bsp_library_type, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'hal_drivers', 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libcpu_path_prefix, 'cpu', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/applications/SConscript b/bsp/bluetrum/ab32vg1-ab-prougen/applications/SConscript new file mode 100644 index 0000000000..c583d3016e --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/applications/SConscript @@ -0,0 +1,9 @@ +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/applications/main.c b/bsp/bluetrum/ab32vg1-ab-prougen/applications/main.c new file mode 100644 index 0000000000..e9a54f6b75 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/applications/main.c @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2020-2020, Bluetrum Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020/12/10 greedyhao The first version + */ + +#include +#include "board.h" + +int main(void) +{ + uint32_t cnt = 0; + uint8_t pin = rt_pin_get("PE.1"); + + rt_pin_mode(pin, PIN_MODE_OUTPUT); + rt_kprintf("Hello, world\n"); + + while (1) + { + if (cnt % 2 == 0) { + rt_pin_write(pin, PIN_LOW); + } else { + rt_pin_write(pin, PIN_HIGH); + } + cnt++; + rt_thread_mdelay(1000); + } + + return 0; +} diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig b/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig new file mode 100644 index 0000000000..5d8b548f71 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig @@ -0,0 +1,25 @@ +menu "Hardware Drivers Config" + +menu "Onboard Peripheral Drivers" + + config BSP_USING_USB_TO_USART + bool "Enable USB TO USART (uart0)" + select BSP_USING_UART + select BSP_USING_UART0 + default y + +endmenu + +menu "On-chip Peripheral Drivers" + +menuconfig BSP_USING_UART0 + bool "Enable UART0" + select RT_USING_SERIAL + default y + +endmenu + +menu "Board extended module Drivers" +endmenu + +endmenu diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/board/SConscript b/bsp/bluetrum/ab32vg1-ab-prougen/board/SConscript new file mode 100644 index 0000000000..22d32eade7 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/SConscript @@ -0,0 +1,22 @@ +# RT-Thread building script for component + +from building import * + +cwd = GetCurrentDir() +src = Split(''' +board.c +ab32vg1_hal_msp.c +''') +CPPPATH = [cwd] + +group = DefineGroup('Board', src, depend = [''], CPPPATH = CPPPATH) + +objs = [group] + +list = os.listdir(cwd) + +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + objs = objs + SConscript(os.path.join(item, 'SConscript')) + +Return('objs') diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/board/ab32vg1_hal_msp.c b/bsp/bluetrum/ab32vg1-ab-prougen/board/ab32vg1_hal_msp.c new file mode 100644 index 0000000000..963ac59eac --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/ab32vg1_hal_msp.c @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ab32vg1_hal.h" + +void hal_uart_mspinit(struct uart_handle *huart) +{ + struct gpio_init gpio_init; + + if (huart->instance == UART0_BASE) { + gpio_init.pin = GPIO_PIN_7; + gpio_init.pull = GPIO_PULLUP; + gpio_init.dir = GPIO_DIR_INPUT; + gpio_init.de = GPIO_DIGITAL; + gpio_init.alternate = GPIO_AF_MAP_Gx(UT0TXMAP_AF, GPIO_AF_G1) | UT0RXMAP_TX; + gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | UT0TXMAP_AF; + hal_gpio_init(GPIOA_BASE, &gpio_init); + } else if (huart->instance == UART1_BASE) { + gpio_init.pin = GPIO_PIN_4; + gpio_init.dir = GPIO_DIR_OUTPUT; + gpio_init.de = GPIO_DIGITAL; + gpio_init.alternate = GPIO_AF_MAP_Gx(UT1TXMAP_AF, GPIO_AF_G2); + gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | UT1TXMAP_AF; + hal_gpio_init(GPIOA_BASE, &gpio_init); + + gpio_init.pin = GPIO_PIN_3; + gpio_init.pull = GPIO_PULLUP; + gpio_init.dir = GPIO_DIR_INPUT; + gpio_init.de = GPIO_DIGITAL; + gpio_init.alternate = GPIO_AF_MAP_Gx(UT1RXMAP_AF, GPIO_AF_G2); + gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | UT1RXMAP_AF; + hal_gpio_init(GPIOA_BASE, &gpio_init); + /* Interrupt */ + } +} + +#ifdef HAL_DAC_MODULE_ENABLED +void hal_dac_mspinit(struct dac_handle *hdac) +{ +} +#endif + +#ifdef HAL_SD_MODULE_ENABLED +void hal_sd_mspinit(sd_handle_t hsd) +{ + struct gpio_init gpio_init; + + gpio_init.pin = GPIO_PIN_0 | GPIO_PIN_2; + gpio_init.pull = GPIO_PULLUP; + gpio_init.dir = GPIO_DIR_INPUT; + gpio_init.de = GPIO_DIGITAL; + gpio_init.alternate = GPIO_AF_MAP_Gx(SD0MAP_AF, GPIO_AF_G2); + gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | SD0MAP_AF; + hal_gpio_init(GPIOB_BASE, &gpio_init); + + gpio_init.pin = GPIO_PIN_1; + gpio_init.dir = GPIO_DIR_OUTPUT; + gpio_init.alternate = GPIO_AF_MAP_Gx(SD0MAP_AF, GPIO_AF_G2); + gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | SD0MAP_AF; + hal_gpio_init(GPIOB_BASE, &gpio_init); +} +#endif diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/board/board.c b/bsp/bluetrum/ab32vg1-ab-prougen/board/board.c new file mode 100644 index 0000000000..84b534016f --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/board.c @@ -0,0 +1,129 @@ +/* + * Copyright (c) 2006-2020, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-11-18 greedyhao first version + */ + +#include +#include "board.h" + +int rt_hw_usart_init(void); +void my_printf(const char *format, ...); +void timer0_cfg(uint32_t ticks); +void rt_soft_isr(int vector, void *param); +void cpu_irq_comm(void); +void set_cpu_irq_comm(void (*irq_hook)(void)); +extern uint32_t __heap_start, __heap_end; + +void hal_printf(const char *fmt, ...) +{ + rt_device_t console = rt_console_get_device(); + + va_list args; + rt_size_t length; + static char rt_log_buf[RT_CONSOLEBUF_SIZE]; + + va_start(args, fmt); + /* the return value of vsnprintf is the number of bytes that would be + * written to buffer had if the size of the buffer been sufficiently + * large excluding the terminating null byte. If the output string + * would be larger than the rt_log_buf, we have to adjust the output + * length. */ + length = rt_vsnprintf(rt_log_buf, sizeof(rt_log_buf) - 1, fmt, args); + if (length > RT_CONSOLEBUF_SIZE - 1) + length = RT_CONSOLEBUF_SIZE - 1; +#ifdef RT_USING_DEVICE + if (console == RT_NULL) + { + rt_hw_console_output(rt_log_buf); + } + else + { + rt_uint16_t old_flag = console->open_flag; + + console->open_flag |= RT_DEVICE_FLAG_STREAM; + rt_device_write(console, 0, rt_log_buf, length); + console->open_flag = old_flag; + } +#else + rt_hw_console_output(rt_log_buf); +#endif + va_end(args); +} + +void timer0_isr(int vector, void *param) +{ + rt_interrupt_enter(); + TMR0CPND = BIT(9); + rt_tick_increase(); + rt_interrupt_leave(); +} + +void timer0_init(void) +{ + TMR0CON = BIT(7); //TIE + TMR0CNT = 0; + + rt_hw_interrupt_install(IRQ_TMR0_VECTOR, timer0_isr, RT_NULL, "tick"); +} + +void timer0_cfg(uint32_t ticks) +{ + TMR0PR = (uint32_t)(ticks - 1UL); //1ms interrupt + TMR0CON |= BIT(0); // EN +} + +void hal_mdelay(uint32_t ms) +{ + rt_thread_mdelay(ms); +} + +void rt_hw_systick_init(void) +{ + CLKCON2 &= 0x00ffffff; + CLKCON2 |= (25 << 24); //配置x26m_div_clk = 1M (timer, ir, fmam ...用到) + CLKCON0 &= ~(7 << 23); + CLKCON0 |= BIT(24); //tmr_inc select x26m_div_clk = 1M + + set_sysclk(SYSCLK_48M); + + /* Setting software interrupt */ + set_cpu_irq_comm(cpu_irq_comm); + rt_hw_interrupt_install(IRQ_SW_VECTOR, rt_soft_isr, RT_NULL, "sw_irq"); + + timer0_init(); + hal_set_tick_hook(timer0_cfg); + hal_set_ticks(get_sysclk_nhz()/RT_TICK_PER_SECOND); + + PICCON |= 0x10002; +} + +void rt_hw_board_init(void) +{ + WDT_DIS(); + rt_hw_systick_init(); + +#ifdef RT_USING_HEAP + rt_system_heap_init(&__heap_start, &__heap_end); +#endif + +#ifdef RT_USING_PIN + rt_hw_pin_init(); +#endif // RT_USING_PIN + +#ifdef RT_USING_SERIAL + rt_hw_usart_init(); +#endif // RT_USING_SERIAL + +#ifdef RT_USING_CONSOLE + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif // RT_USING_CONSOLE + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif +} diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/board/board.h b/bsp/bluetrum/ab32vg1-ab-prougen/board/board.h new file mode 100644 index 0000000000..71020147a8 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/board.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2006-2020, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-11-18 greedyhao first version + */ + +#ifndef BOARD_H__ +#define BOARD_H__ + +#include +#include "ab32vgx.h" +#include "drv_gpio.h" + +#endif diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/cconfig.h b/bsp/bluetrum/ab32vg1-ab-prougen/cconfig.h new file mode 100644 index 0000000000..074cbd3397 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/cconfig.h @@ -0,0 +1,21 @@ +#ifndef CCONFIG_H__ +#define CCONFIG_H__ +/* Automatically generated file; DO NOT EDIT. */ +/* compiler configure file for RT-Thread in GCC*/ + +#define HAVE_NEWLIB_H 1 +#define LIBC_VERSION "newlib 3.2.0" + +#define HAVE_SYS_SIGNAL_H 1 +#define HAVE_SYS_SELECT_H 1 +#define HAVE_PTHREAD_H 1 + +#define HAVE_FDSET 1 +#define HAVE_SIGACTION 1 +#define HAVE_SIGEVENT 1 +#define HAVE_SIGINFO 1 +#define HAVE_SIGVAL 1 +#define GCC_VERSION_STR "10.1.0" +#define STDC "2011" + +#endif diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/figures/board.png b/bsp/bluetrum/ab32vg1-ab-prougen/figures/board.png new file mode 100644 index 0000000000..9c236b0cd9 Binary files /dev/null and b/bsp/bluetrum/ab32vg1-ab-prougen/figures/board.png differ diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/header.bin b/bsp/bluetrum/ab32vg1-ab-prougen/header.bin new file mode 100644 index 0000000000..640e4c9ed0 Binary files /dev/null and b/bsp/bluetrum/ab32vg1-ab-prougen/header.bin differ diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/link.lds b/bsp/bluetrum/ab32vg1-ab-prougen/link.lds new file mode 100644 index 0000000000..84b359925f --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/link.lds @@ -0,0 +1,109 @@ +/* Define the flash max size */ +__max_flash_size = 768k; + +__comm_ram_size = 104k; +__heap_ram_size = 14k; + +__base = 0x10000000; + +__comm_vma = 0x12800; +__heap_vma = __comm_vma + __comm_ram_size; + +__ram1_vma = 0x50000; + +MEMORY +{ + init : org = __base, len = 512 + flash(rx) : org = __base + 512, len = __max_flash_size + comm(rx) : org = __comm_vma, len = __comm_ram_size + + data : org = 0x11000, len = 5k + stack : org = 0x12400, len = 1k + heap : org = __heap_vma, len = __heap_ram_size + ram1(rx) : org = __ram1_vma, len = 0x7a00 +} + +SECTIONS +{ + .init : { + *(.reset) + } > init + + .ram1 __ram1_vma : { + /*board\\ports\\*.o(.text*)*/ + *hal_drivers\\*.o(.text*) + *hal_libraries\\ab32vg1_hal\\*.o(.text*) + *components\\drivers\\*.o(.text* .rodata*) + *components\\libc\\*.o(.text*) + *ab32vg1_hal_msp.o(.text*) + *components.o(.text* .rodata*) + *ipc.o(.text* .rodata*) + . = ALIGN(32); + } > ram1 AT > flash + + .rti : { + . = ALIGN(4); + /* section information for initial */ + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + + . = ALIGN(32); + } > ram1 AT > flash + + .comm : { + KEEP(*(.vector)) + *(.text*) + *(.rodata*) + *(.srodata*) + *(.rela*) + *(.data*) + *(.sdata*) + . = ALIGN(512); + } > comm AT > flash + + .flash : { + . = ALIGN(512); + } > flash + + .bss (NOLOAD): + { + __bss_start = .; + *(COMMON) + *(.bss) + *(.sbss) + *(.buf*) + __bss_end = .; + } > data + __bss_size = __bss_end - __bss_start; + + .stack (NOLOAD) : { + __irq_stack_start = .; + . = 0x400; + __irq_stack = .; + } > stack + __irq_stack_size = __irq_stack - __irq_stack_start; + + .heap : { + __heap_start = .; + . = __heap_ram_size; + __heap_end = .; + } > heap +} + +/* Calc the lma */ +__bank_size = SIZEOF(.flash); +__comm_lma = LOADADDR(.comm); +__comm_size = SIZEOF(.comm); +__ram1_lma = LOADADDR(.ram1); +__ram1_size = SIZEOF(.ram1) + SIZEOF(.rti); diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/riscv32-elf-xmaker.exe b/bsp/bluetrum/ab32vg1-ab-prougen/riscv32-elf-xmaker.exe new file mode 100644 index 0000000000..6b20e111a7 Binary files /dev/null and b/bsp/bluetrum/ab32vg1-ab-prougen/riscv32-elf-xmaker.exe differ diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.h b/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.h new file mode 100644 index 0000000000..9a85525014 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.h @@ -0,0 +1,171 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Project Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 8 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 1024 +#define RT_USING_TIMER_SOFT +#define RT_TIMER_THREAD_PRIO 4 +#define RT_TIMER_THREAD_STACK_SIZE 512 +#define RT_DEBUG + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_MEMHEAP +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_DEVICE_OPS +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart0" +#define RT_VER_NUM 0x40003 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 1024 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_USING_DESCRIPTION +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_CMD_SIZE 80 +#define FINSH_USING_MSH +#define FINSH_USING_MSH_DEFAULT +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SERIAL +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_USING_LIBC + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + + +/* tools packages */ + + +/* system packages */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + + +/* miscellaneous packages */ + + +/* samples: kernel and components samples */ + + +/* games: games run on RT-Thread console */ + + +/* Hardware Drivers Config */ + +/* Onboard Peripheral Drivers */ + +#define BSP_USING_USB_TO_USART + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_UART0 + +/* Board extended module Drivers */ + +#define BOARD_BLUETRUM_EVB + +#endif diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.py b/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.py new file mode 100644 index 0000000000..300d845047 --- /dev/null +++ b/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.py @@ -0,0 +1,67 @@ +import os + +# toolchains options +ARCH ='risc-v' +CPU ='bluetrum' +CROSS_TOOL ='gcc' + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = r'../../..' + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') + +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'D:/Softwares/RT-ThreadStudio/repo/Extract/ToolChain_Support_Packages/RISC-V/RISC-V-GCC/10.1.0/bin' +else: + print('Please make sure your toolchains is GNU GCC!') + exit(0) + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'release' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'riscv64-unknown-elf-' + CC = PREFIX + 'gcc' + CXX = PREFIX + 'g++' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + # DEVICE = ' -mcmodel=medany -march=rv32imc -mabi=ilp32 -fsingle-precision-constant' + DEVICE = ' -mcmodel=medany -march=rv32imc -mabi=ilp32' + # CFLAGS = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields' + CFLAGS = DEVICE + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' + LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds' + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -ggdb' + AFLAGS += ' -ggdb' + else: + CFLAGS += ' -Os' + + CXXFLAGS = CFLAGS + +DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n' +POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' +POST_ACTION += './riscv32-elf-xmaker -b rtthread.xm\n' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/rtthread.xm b/bsp/bluetrum/ab32vg1-ab-prougen/rtthread.xm new file mode 100644 index 0000000000..9dca5b7d0b Binary files /dev/null and b/bsp/bluetrum/ab32vg1-ab-prougen/rtthread.xm differ diff --git a/bsp/bluetrum/libcpu/cpu/SConscript b/bsp/bluetrum/libcpu/cpu/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/bsp/bluetrum/libcpu/cpu/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/bluetrum/libcpu/cpu/context_gcc.S b/bsp/bluetrum/libcpu/cpu/context_gcc.S new file mode 100644 index 0000000000..9139657eaa --- /dev/null +++ b/bsp/bluetrum/libcpu/cpu/context_gcc.S @@ -0,0 +1,222 @@ +/* + * Copyright (c) 2020-2020, Bluetrum Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020/11/18 greedyhao The first version. + */ + +#include "ab32vg1.h" + +.global rt_interrupt_from_thread +.global rt_interrupt_to_thread +.global rt_cur_thread_sp +.global rt_switch_flag +.global rt_interrupt_nest + +/* + * rt_base_t rt_hw_interrupt_disable(); + * a0 -> return + */ + .global rt_hw_interrupt_disable +rt_hw_interrupt_disable: + lw a5, PICCON(zero) + mv a0, a5 + andi a5, a5, -2 + sw a5, PICCON(zero) + ret + +/* + * void rt_hw_interrupt_enable(rt_base_t level); + * a0 -> level + */ + .global rt_hw_interrupt_enable +rt_hw_interrupt_enable: + andi a0, a0, 1 + beqz a0,enable_int_ret + lw a5, PICCON(zero) + ori a5, a5, 1 + sw a5,PICCON(zero) +enable_int_ret: + ret + +/* Macro for saving task context */ +.macro save_context + addi sp, sp, -120 + + /* Save Context */ + sw x1, 0(sp) + sw x4, 4(sp) + sw x5, 8(sp) + sw x6, 12(sp) + sw x7, 16(sp) + sw x8, 20(sp) + sw x9, 24(sp) + sw x10, 28(sp) + sw x11, 32(sp) + sw x12, 36(sp) + sw x13, 40(sp) + sw x14, 44(sp) + sw x15, 48(sp) + sw x16, 52(sp) + sw x17, 56(sp) + sw x18, 60(sp) + sw x19, 64(sp) + sw x20, 68(sp) + sw x21, 72(sp) + sw x22, 76(sp) + sw x23, 80(sp) + sw x24, 84(sp) + sw x25, 88(sp) + sw x26, 92(sp) + sw x27, 96(sp) + sw x28, 100(sp) + sw x29, 104(sp) + sw x30, 108(sp) + sw x31, 112(sp) + + lw a5, EPC(zero) //Saves current program counter (EPC) as task program counter + sw a5, 116(sp) + + sw sp, rt_cur_thread_sp, a4 //store sp in preempted tasks tcb + .endm + + +/* Macro for restoring task context */ +.macro restore_context + + la a5, rt_cur_thread_sp + lw sp, 0(a5) //get new task stack pointer + + /* Load task program counter EPC*/ + lw a5, 116(sp) + sw a5, EPC(zero) + + /* Restore registers, + Skip global pointer because that does not change */ + lw x1, 0(sp) + lw x4, 4(sp) + lw x5, 8(sp) + lw x6, 12(sp) + lw x7, 16(sp) + lw x8, 20(sp) + lw x9, 24(sp) + lw x10, 28(sp) + lw x11, 32(sp) + lw x12, 36(sp) + lw x13, 40(sp) + lw x14, 44(sp) + lw x15, 48(sp) + lw x16, 52(sp) + lw x17, 56(sp) + lw x18, 60(sp) + lw x19, 64(sp) + lw x20, 68(sp) + lw x21, 72(sp) + lw x22, 76(sp) + lw x23, 80(sp) + lw x24, 84(sp) + lw x25, 88(sp) + lw x26, 92(sp) + lw x27, 96(sp) + lw x28, 100(sp) + lw x29, 104(sp) + lw x30, 108(sp) + lw x31, 112(sp) + + addi sp, sp, 120 + mret + .endm + +/* + * void rt_hw_context_switch_to(rt_uint32 to); + * r0 --> to + */ + .globl rt_hw_context_switch_to +rt_hw_context_switch_to: + sw zero, rt_interrupt_from_thread, a4 /*set from thread to 0*/ + sw a0, rt_interrupt_to_thread, a4 /*set rt_interrupt_to_thread*/ + + sb zero, rt_interrupt_nest, a4 /*rt_interrupt_nest = 0*/ + + li a5, 1 + sw a5, rt_switch_flag, a4 // rt_switch_flag = 1; + + SWINT /*kick soft interrupt*/ + lw a5, PICCON(zero) /*enable interrupt*/ + ori a5, a5, 1 + sw a5, PICCON(zero) + ret + +/* + * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to); + * a0 --> from + * a1 --> to + */ + .globl rt_hw_context_switch +rt_hw_context_switch: + sw a0, rt_interrupt_from_thread, a4 /*set rt_interrupt_from_thread*/ + sw a1, rt_interrupt_to_thread, a4 /*set rt_interrupt_to_thread*/ + li a5, 1 + sw a5, rt_switch_flag, a4 // rt_switch_flag = 1; + SWINT /*kick soft interrupt*/ + ret + + /* + * void rt_switch_to_thread(void); + * r0 --> to + */ + .globl rt_switch_to_thread +rt_switch_to_thread: + lw a0, rt_interrupt_from_thread + lw a5, rt_cur_thread_sp + sw a5, 0(a0) + + lw a0, rt_interrupt_to_thread + lw a5, 0(a0) + sw a5, rt_cur_thread_sp, a4 + ret + +/* + * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to); + * a0 --> from + * a1 --> to + */ + .global rt_hw_context_switch_interrupt +rt_hw_context_switch_interrupt: + lw a5, rt_switch_flag + bnez a5, _reswitch + li a5, 0x01 + sw a5, rt_switch_flag, a4 + sw a0, rt_interrupt_from_thread, a4 /*set rt_interrupt_from_thread*/ +_reswitch: + sw a1, rt_interrupt_to_thread, a4 /*set rt_interrupt_to_thread*/ + ret + + //软中断服务 + .global rt_soft_isr +rt_soft_isr: + li a5, 0x4 // PICPND = BIT(IRQ_SW_VECTOR); 清软中断Pending + sw a5, PICPND(zero) + ret + + .globl low_prio_irq +low_prio_irq: + save_context + li a5, 1 + sb a5, rt_interrupt_nest, a4 // rt_interrupt_nest = 1; + + lw a5, cpu_irq_comm_hook + jalr a5 + + lw a5, rt_switch_flag + beqz a5, _low_prio_irq_exit // if (rt_switch_flag) + jal rt_switch_to_thread + sw zero, rt_switch_flag, a4 // rt_switch_flag = 0; + + _low_prio_irq_exit: + sb zero, rt_interrupt_nest, a4 // rt_interrupt_nest = 0; + restore_context + diff --git a/bsp/bluetrum/libcpu/cpu/cpuport.c b/bsp/bluetrum/libcpu/cpu/cpuport.c new file mode 100644 index 0000000000..576401421a --- /dev/null +++ b/bsp/bluetrum/libcpu/cpu/cpuport.c @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2020-2020, Bluetrum Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020/11/18 greedyhao Bluetrum RISC-V porting code. + */ + +#include +#include + +volatile rt_ubase_t rt_interrupt_from_thread = 0; +volatile rt_ubase_t rt_interrupt_to_thread = 0; +volatile rt_uint32_t rt_thread_switch_interrupt_flag = 0; +volatile rt_uint32_t rt_switch_flag = 0; +rt_uint32_t rt_cur_thread_sp = 0; + +/** + * This function will initialize thread stack + * + * @param tentry the entry of thread + * @param parameter the parameter of entry + * @param stack_addr the beginning stack address + * @param texit the function will be called when thread exit + * + * @return stack address + */ +rt_uint8_t *rt_hw_stack_init(void *tentry, + void *parameter, + rt_uint8_t *stack_addr, + void *texit) +{ + rt_uint32_t *stk; + register int *tp asm("x3"); + + stack_addr += sizeof(rt_uint32_t); + stack_addr = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8); + stk = (rt_uint32_t *)stack_addr; + + stk--; + *stk = (rt_uint32_t)tentry; /* Start address */ + stk -= 22; + *stk = (rt_uint32_t)parameter; /* Register a0 parameter*/ + stk -= 6; + *stk = (rt_uint32_t)tp; /* Register thread pointer */ + stk --; + *stk = (rt_uint32_t)texit; /* Register ra texit*/ + + /* return task's current stack address */ + return (rt_uint8_t *)stk; +} + +/** shutdown CPU */ +void rt_hw_cpu_shutdown(void) +{ + rt_uint32_t level; + rt_kprintf("shutdown...\n"); + + level = rt_hw_interrupt_disable(); + while (level) + { + RT_ASSERT(0); + } +} diff --git a/bsp/bluetrum/libcpu/cpu/interrupt.c b/bsp/bluetrum/libcpu/cpu/interrupt.c new file mode 100644 index 0000000000..1903ec25ce --- /dev/null +++ b/bsp/bluetrum/libcpu/cpu/interrupt.c @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2020-2020, Bluetrum Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020/11/18 greedyhao Bluetrum RISC-V porting code. + */ + +#include +#include +#include +#include "ab32vgx.h" + +uint32_t irq_mask AT(.bss.irq_tbl); +void *tbl_irq_vector[IRQ_TOTAL_NUM] AT(.bss.irq_tbl); +void (*cpu_irq_comm_hook)(void); + +void set_cpu_irq_comm(void (*irq_hook)(void)) +{ + cpu_irq_comm_hook = irq_hook; +} + +AT(.com_text.irq) +void cpu_irq_comm_do(void) +{ + void (*pfnct)(void); + uint32_t irq_pend = PICPND & irq_mask; + for (int i = 0; i < IRQ_TOTAL_NUM; i++) { + if (irq_pend & BIT(i)) { + pfnct = tbl_irq_vector[i]; + if (pfnct) { + pfnct(); /* call ISR */ + } + } + } +} + +void rt_hw_interrupt_init(void) +{ +} + +/** + * @brief This function will install a interrupt service routine to a interrupt. + * + * @param vector + * @param handler + * @param param + * @param name + * @return rt_isr_handler_t + */ +rt_isr_handler_t rt_hw_interrupt_install(int vector, + rt_isr_handler_t handler, + void *param, + const char *name) +{ + rt_isr_handler_t old_handler = RT_NULL; + + if (vector < IRQ_TOTAL_NUM) { + uint32_t cpu_ie = PICCON&BIT(0); + PICCON &= ~BIT(0); + old_handler = tbl_irq_vector[vector]; + tbl_irq_vector[vector] = handler; + irq_mask |= BIT(vector); + PICCON |= cpu_ie; + PICPR &= ~BIT(vector); + PICEN |= BIT(vector); + } + return old_handler; +} diff --git a/bsp/bluetrum/libraries/hal_drivers/SConscript b/bsp/bluetrum/libraries/hal_drivers/SConscript new file mode 100644 index 0000000000..87c1b93152 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_drivers/SConscript @@ -0,0 +1,25 @@ +# RT-Thread building script for component + +from building import * + +cwd = GetCurrentDir() +src = [] +CPPPATH = [cwd] + +if GetDepend('RT_USING_PIN'): + src += ['drv_gpio.c'] + +if GetDepend('RT_USING_SERIAL'): + src += ['drv_usart.c'] + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +objs = [group] + +list = os.listdir(cwd) + +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + objs = objs + SConscript(os.path.join(item, 'SConscript')) + +Return('objs') diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_common.h b/bsp/bluetrum/libraries/hal_drivers/drv_common.h new file mode 100644 index 0000000000..3bdce2ed42 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_drivers/drv_common.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2020-2020, Bluetrum Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-11-18 greedyhao first version + */ + +#ifndef DRV_COMMON_H__ +#define DRV_COMMON_H__ + +#include +#include +#include + +#endif // DRV_COMMON_H__ diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_gpio.c b/bsp/bluetrum/libraries/hal_drivers/drv_gpio.c new file mode 100644 index 0000000000..e809afb7cb --- /dev/null +++ b/bsp/bluetrum/libraries/hal_drivers/drv_gpio.c @@ -0,0 +1,182 @@ +/* + * Copyright (c) 2020-2020, Bluetrum Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-11-19 greedyhao first version + */ + +#include "drv_gpio.h" + +#ifdef RT_USING_PIN + +// #define DRV_DEBUG +#define LOG_TAG "drv.gpio" +#include + +struct port_info +{ + uint8_t start_pin; + uint8_t delta_pin; + uint8_t total_pin; +}; + +/* It needs to be adjusted to the hardware. */ +static const struct port_info port_table[] = +{ + {0, 8, 0}, /* PA0-PA7 */ + {0, 5, 8}, /* PB0-PB5 */ + {0, 8, 13}, /* PE0-PE7 */ + {0, 6, 21}, /* PF0-PF6 */ +}; + +static const hal_sfr_t port_sfr[] = +{ + GPIOA_BASE, + GPIOB_BASE, + GPIOE_BASE, + GPIOF_BASE, +}; + +static uint8_t _pin_port(uint32_t pin) +{ + uint8_t port = 0; + for (port = 0; port < 3; port++) { + if (pin < (port_table[port].total_pin + port_table[port].delta_pin)) { + break; + } + } + return port; +} + +#define PIN_NUM(port, no) ((uint8_t)(port_table[port].total_pin + no - port_table[port].start_pin)) +#define PIN_PORT(pin) _pin_port(pin) +#define PORT_SFR(port) (port_sfr[(port)]) +#define PIN_NO(pin) (uint8_t)((pin) & 0xFu) + +// #define PIN_ABPIN(pin) (uint8_t)(port_table[PIN_PORT(pin)].total_pin + PIN_NO(pin)) + +static rt_base_t ab32_pin_get(const char *name) +{ + rt_base_t pin = 0; + int hw_port_num, hw_pin_num = 0; + int i, name_len; + + name_len = rt_strlen(name); + + if ((name_len < 4) || (name_len >= 6)) + { + return -RT_EINVAL; + } + if ((name[0] != 'P') || (name[2] != '.')) + { + return -RT_EINVAL; + } + + if ((name[1] >= 'A') && (name[1] <= 'B')) + { + hw_port_num = (int)(name[1] - 'A'); + } + else if ((name[1] >= 'E') && (name[1] <= 'G')) + { + hw_port_num = (int)(name[1] - 'A') - 2; /* Without 'C' and 'D'. */ + } + else + { + return -RT_EINVAL; + } + + for (i = 3; i < name_len; i++) + { + hw_pin_num *= 10; + hw_pin_num += name[i] - '0'; + } + + pin = PIN_NUM(hw_port_num, hw_pin_num); + LOG_D("name=%s", name); + LOG_D("hw_port_num=%d hw_pin_num=%d pin=%d", hw_port_num, hw_pin_num, pin); + + return pin; +} + +static void ab32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) +{ + uint8_t port = PIN_PORT(pin); + uint8_t gpio_pin = pin - port_table[port].total_pin; + hal_gpio_write(PORT_SFR(port), gpio_pin, (uint8_t)value); +} + +static int ab32_pin_read(rt_device_t dev, rt_base_t pin) +{ + uint8_t port = PIN_PORT(pin); + uint8_t gpio_pin = pin - port_table[port].total_pin; + return hal_gpio_read(PORT_SFR(port), gpio_pin); +} + +static void ab32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) +{ + struct gpio_init gpio_init; + uint8_t port = PIN_PORT(pin); + + gpio_init.pin = BIT(pin - port_table[port].total_pin); + gpio_init.de = GPIO_DIGITAL; + gpio_init.af_con = GPIO_AFDIS; + LOG_D("port=%d pin=%d", port, gpio_init.pin); + + switch (mode) + { + case PIN_MODE_INPUT: + case PIN_MODE_INPUT_PULLUP: + gpio_init.pull = GPIO_PULLUP; + gpio_init.dir = GPIO_DIR_INPUT; + break; + case PIN_MODE_INPUT_PULLDOWN: + gpio_init.pull = GPIO_PULLDOWN; + gpio_init.dir = GPIO_DIR_INPUT; + break; + case PIN_MODE_OUTPUT: + case PIN_MODE_OUTPUT_OD: + default: + gpio_init.pull = GPIO_NOPULL; + gpio_init.dir = GPIO_DIR_OUTPUT; + break; + } + hal_gpio_init(PORT_SFR(port), &gpio_init); +} + +static rt_err_t ab32_pin_attach_irq(struct rt_device *device, rt_int32_t pin, + rt_uint32_t mode, void (*hdr)(void *args), void *args) +{ + return -RT_ERROR; +} + +static rt_err_t ab32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) +{ + return -RT_ERROR; +} + +static rt_err_t ab32_pin_irq_enable(struct rt_device *device, rt_base_t pin, + rt_uint32_t enabled) +{ + return -RT_ERROR; +} + +const static struct rt_pin_ops _ab32_pin_ops = +{ + ab32_pin_mode, + ab32_pin_write, + ab32_pin_read, + ab32_pin_attach_irq, + ab32_pin_dettach_irq, + ab32_pin_irq_enable, + ab32_pin_get, +}; + +int rt_hw_pin_init(void) +{ + return rt_device_pin_register("pin", &_ab32_pin_ops, RT_NULL); +} + +#endif diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_gpio.h b/bsp/bluetrum/libraries/hal_drivers/drv_gpio.h new file mode 100644 index 0000000000..c7116b8be3 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_drivers/drv_gpio.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2020-2020, Bluetrum Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-11-19 greedyhao first version + */ + +#ifndef DRV_GPIO_H__ +#define DRV_GPIO_H__ + +#include "drv_common.h" +#include "board.h" + +#define __AB32_PORT(port) GPIO##port + +int rt_hw_pin_init(void); + +#endif // DRV_GPIO_H__ diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_log.h b/bsp/bluetrum/libraries/hal_drivers/drv_log.h new file mode 100644 index 0000000000..f73f00e8a2 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_drivers/drv_log.h @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2020-2020, Bluetrum Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-11-19 greedyhao first version + */ + +/* + * NOTE: DO NOT include this file on the header file. + */ + +#ifndef LOG_TAG +#define DBG_TAG "drv" +#else +#define DBG_TAG LOG_TAG +#endif /* LOG_TAG */ + +#ifdef DRV_DEBUG +#define DBG_LVL DBG_LOG +#else +#define DBG_LVL DBG_INFO +#endif /* DRV_DEBUG */ + +#include diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_usart.c b/bsp/bluetrum/libraries/hal_drivers/drv_usart.c new file mode 100644 index 0000000000..f17e62f467 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_drivers/drv_usart.c @@ -0,0 +1,205 @@ +/* + * Copyright (c) 2020-2020, Bluetrum Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-11-20 greedyhao first version + */ + +#include "board.h" +#include "drv_usart.h" + +#ifdef RT_USING_SERIAL + +//#define DRV_DEBUG +#define LOG_TAG "drv.usart" +#include + +#undef RT_SERIAL_USING_DMA + +enum +{ + UART0_INDEX, + UART1_INDEX, +}; + +static struct ab32_uart_config uart_config[] = +{ + { + .name = "uart0", + .instance = UART0_BASE, + }, + { + .name = "uart1", + .instance = UART1_BASE, + } +}; + +static struct ab32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0}; + +static rt_err_t ab32_configure(struct rt_serial_device *serial, struct serial_configure *cfg) +{ + struct ab32_uart *uart; + RT_ASSERT(serial != RT_NULL); + RT_ASSERT(cfg != RT_NULL); + + uart = rt_container_of(serial, struct ab32_uart, serial); + uart->handle.instance = uart->config->instance; + uart->handle.init.baud = cfg->baud_rate; + uart->handle.init.mode = UART_MODE_TX_RX; + + switch (cfg->data_bits) + { + case DATA_BITS_8: + uart->handle.init.word_len = UART_WORDLENGTH_8B; + break; + case DATA_BITS_9: + uart->handle.init.word_len = UART_WORDLENGTH_9B; + break; + default: + uart->handle.init.word_len = UART_WORDLENGTH_8B; + break; + } + + switch (cfg->stop_bits) + { + case STOP_BITS_1: + uart->handle.init.stop_bits = UART_STOPBITS_1; + break; + case STOP_BITS_2: + uart->handle.init.stop_bits = UART_STOPBITS_2; + break; + default: + uart->handle.init.stop_bits = UART_STOPBITS_1; + break; + } + +#ifdef RT_SERIAL_USING_DMA + uart->dma_rx.last_index = 0; +#endif + + hal_uart_init(&uart->handle); + + return RT_EOK; +} + +static rt_err_t ab32_control(struct rt_serial_device *serial, int cmd, void *arg) +{ + struct ab32_uart *uart; +#ifdef RT_SERIAL_USING_DMA + rt_ubase_t ctrl_arg = (rt_ubase_t)arg; +#endif + + RT_ASSERT(serial != RT_NULL); + uart = rt_container_of(serial, struct ab32_uart, serial); + + switch (cmd) + { + /* disable interrupt */ + case RT_DEVICE_CTRL_CLR_INT: + hal_uart_control(uart->handle.instance, UART_RXIT_ENABLE, HAL_DISABLE); + break; + /* enable interrupt */ + case RT_DEVICE_CTRL_SET_INT: + hal_uart_clrflag(uart->handle.instance, UART_FLAG_RXPND); + hal_uart_control(uart->handle.instance, UART_RXIT_ENABLE, HAL_ENABLE); + break; + case RT_DEVICE_CTRL_CLOSE: + hal_uart_deinit(uart->handle.instance); + break; + } + + return RT_EOK; +} + +static int ab32_putc(struct rt_serial_device *serial, char ch) +{ + struct ab32_uart *uart; + RT_ASSERT(serial != RT_NULL); + + uart = rt_container_of(serial, struct ab32_uart, serial); + hal_uart_clrflag(uart->handle.instance, UART_FLAG_TXPND); + hal_uart_write(uart->handle.instance, ch); + while(hal_uart_getflag(uart->handle.instance, UART_FLAG_TXPND) == 0); + + return 1; +} + +static int ab32_getc(struct rt_serial_device *serial) +{ + int ch; + struct ab32_uart *uart; + RT_ASSERT(serial != RT_NULL); + uart = rt_container_of(serial, struct ab32_uart, serial); + + ch = -1; + if(hal_uart_getflag(uart->handle.instance, UART_FLAG_RXPND) != HAL_RESET) { + hal_uart_clrflag(uart->handle.instance, UART_FLAG_RXPND); + ch = hal_uart_read(uart->handle.instance); + } + + return ch; +} + +static rt_size_t ab32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction) +{ + return -1; +} + +static void uart_isr(int vector, void *param) +{ + rt_interrupt_enter(); + + if(hal_uart_getflag(UART0_BASE, UART_FLAG_RXPND)) //RX one byte finish + { + rt_hw_serial_isr(&(uart_obj[UART0_INDEX].serial), RT_SERIAL_EVENT_RX_IND); + } + if(hal_uart_getflag(UART1_BASE, UART_FLAG_RXPND)) //RX one byte finish + { + rt_hw_serial_isr(&(uart_obj[UART1_INDEX].serial), RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} + +static const struct rt_uart_ops ab32_uart_ops = +{ + .configure = ab32_configure, + .control = ab32_control, + .putc = ab32_putc, + .getc = ab32_getc, + .dma_transmit = ab32_dma_transmit +}; + +int rt_hw_usart_init(void) +{ + rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct ab32_uart); + struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; + rt_err_t result = 0; + + rt_hw_interrupt_install(IRQ_UART0_2_VECTOR, uart_isr, RT_NULL, "ut_isr"); + + for (int i = 0; i < obj_num; i++) + { + /* init UART object */ + uart_obj[i].config = &uart_config[i]; + uart_obj[i].serial.ops = &ab32_uart_ops; + uart_obj[i].serial.config = config; + uart_obj[i].serial.config.baud_rate = 1500000; + + /* register UART device */ + result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name, + RT_DEVICE_FLAG_RDWR + | RT_DEVICE_FLAG_INT_RX + | RT_DEVICE_FLAG_INT_TX + | uart_obj[i].uart_dma_flag + , NULL); + RT_ASSERT(result == RT_EOK); + } + + return result; +} + +#endif diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_usart.h b/bsp/bluetrum/libraries/hal_drivers/drv_usart.h new file mode 100644 index 0000000000..2e34efd792 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_drivers/drv_usart.h @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2006-2020, Bluetrum Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-11-20 greedyhao first version + */ + +#ifndef DRV_USART_H__ +#define DRV_USART_H__ + +#include "drv_common.h" + +#ifdef RT_USING_SERIAL + +/* an32 config class */ +struct ab32_uart_config +{ + const char *name; + hal_sfr_t instance; + // struct dma_config *dma_rx; + // struct dma_config *dma_tx; +}; + +/* ab32 uart driver class */ +struct ab32_uart +{ + struct uart_handle handle; + struct ab32_uart_config *config; + +#ifdef RT_SERIAL_USING_DMA + struct + { + DMA_HandleTypeDef handle; + rt_size_t last_index; + } dma_rx; + struct + { + DMA_HandleTypeDef handle; + } dma_tx; +#endif + rt_uint16_t uart_dma_flag; + struct rt_serial_device serial; +}; + +#endif + +int rt_hw_usart_init(void); + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/SConscript b/bsp/bluetrum/libraries/hal_libraries/SConscript new file mode 100644 index 0000000000..ca95be14e2 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/SConscript @@ -0,0 +1,12 @@ +import os +from building import * + +objs = [] +cwd = GetCurrentDir() +list = os.listdir(cwd) + +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + objs = objs + SConscript(os.path.join(item, 'SConscript')) + +Return('objs') diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/SConscript b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/SConscript new file mode 100644 index 0000000000..e7227244bb --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/SConscript @@ -0,0 +1,78 @@ +#-*- encoding: utf-8 -*- + +import os +from building import * +Import('RTT_ROOT') +Import('rtconfig') + +#--------------------------------------------------------------------------------- +# Package configuration +#--------------------------------------------------------------------------------- +PKGNAME = "ab32vg1_hal" +VERSION = "v1.0.0" +DEPENDS = [""] +#DEPENDS = ["PKG_USING_RW007"] + +#--------------------------------------------------------------------------------- +# Compile the configuration +# +# SOURCES: Need to compile c and c++ source, auto search when SOURCES is empty +# +# LOCAL_CPPPATH: Local file path (.h/.c/.cpp) +# LOCAL_CCFLAGS: Local compilation parameter +# LOCAL_ASFLAGS: Local assembly parameters +# +# CPPPATH: Global file path (.h/.c/.cpp), auto search when LOCAL_CPPPATH/CPPPATH +# is empty # no pass!!! +# CCFLAGS: Global compilation parameter +# ASFLAGS: Global assembly parameters +# +# CPPDEFINES: Global macro definition +# LOCAL_CPPDEFINES: Local macro definition +# +# LIBS: Specify the static library that need to be linked +# LIBPATH: Specify the search directory for the library file (.lib/.a) +# +# LINKFLAGS: Link options +#--------------------------------------------------------------------------------- +SOURCES = Glob("./source/*.c") + +LOCAL_CPPPATH = [] +LOCAL_CCFLAGS = "" +LOCAL_ASFLAGS = "" + +CPPPATH = [GetCurrentDir(), os.path.join(GetCurrentDir(), 'include')] +CCFLAGS = "" +ASFLAGS = "" + +CPPDEFINES = [] +LOCAL_CPPDEFINES = [] + +LIBS = [] +LIBPATH = [] + +LINKFLAGS = "" + +SOURCES_IGNORE = [] +CPPPATH_IGNORE = [] + +#--------------------------------------------------------------------------------- +# Main target +#--------------------------------------------------------------------------------- +objs = DefineGroup(name = PKGNAME, src = SOURCES, depend = DEPENDS, + CPPPATH = CPPPATH, + CCFLAGS = CCFLAGS, + ASFLAGS = ASFLAGS, + LOCAL_CPPPATH = LOCAL_CPPPATH, + LOCAL_CCFLAGS = LOCAL_CCFLAGS, + LOCAL_ASFLAGS = LOCAL_ASFLAGS, + CPPDEFINES = CPPDEFINES, + LOCAL_CPPDEFINES = LOCAL_CPPDEFINES, + LIBS = LIBS, + LIBPATH = LIBPATH, + LINKFLAGS = LINKFLAGS) + +Return("objs") +#--------------------------------------------------------------------------------- +# End +#--------------------------------------------------------------------------------- diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal.h new file mode 100644 index 0000000000..a215fdee55 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32VG1_HAL_H__ +#define AB32VG1_HAL_H__ + +#include "ab32vg1_hal_conf.h" + +void hal_set_tick_hook(void (*hook)(uint32_t ticks)); +void hal_set_ticks(uint32_t ticks); +void hal_mdelay(uint32_t nms); +void hal_udelay(uint16_t nus); +void hal_printf(const char *fmt, ...); + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_conf.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_conf.h new file mode 100644 index 0000000000..9c1f9b3fcb --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_conf.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32VG1_HAL_CONF_H__ +#define AB32VG1_HAL_CONF_H__ + +/* System Configuration */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_RCU_MODULE_ENABLED +#define HAL_WDT_MODULE_ENABLED +// #define HAL_DAC_MODULE_ENABLED +// #define HAL_SD_MODULE_ENABLED + +/* Includes */ +#ifdef HAL_GPIO_MODULE_ENABLED +#include "ab32vg1_hal_gpio.h" +#endif + +#ifdef HAL_UART_MODULE_ENABLED +#include "ab32vg1_hal_uart.h" +#endif + +#ifdef HAL_RCU_MODULE_ENABLED +#include "ab32vg1_hal_rcu.h" +#endif + +#ifdef HAL_WDT_MODULE_ENABLED +#include "ab32vg1_hal_wdt.h" +#endif + +#ifdef HAL_DAC_MODULE_ENABLED +#include "ab32vg1_hal_dac.h" +#endif + +#ifdef HAL_SD_MODULE_ENABLED +#include "ab32vg1_hal_sd.h" +#endif + +#include + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_dac.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_dac.h new file mode 100644 index 0000000000..260bc9dee2 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_dac.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32BG1_HAL_DAC_H__ +#define AB32BG1_HAL_DAC_H__ + +#include "ab32vg1_hal_def.h" + +struct dac_init +{ + +}; + +struct dac_handle +{ + hal_sfr_t instance; + struct dac_init init; +}; + +/* Initialization functions */ +hal_error_t hal_dac_init(struct dac_handle *hdac); +void hal_dac_deinit(uint32_t dacx); +void hal_dac_mspinit(struct dac_handle *hdac); + +void hal_dac_control(uint32_t dacx, uint32_t cntl, uint32_t param); +void hal_dac_write(uint32_t dacx, uint32_t data); +uint32_t hal_dac_read(uint32_t dacx); + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_def.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_def.h new file mode 100644 index 0000000000..72a16aadd8 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_def.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32VG1_HAL_DEF_H__ +#define AB32VG1_HAL_DEF_H__ + +#include "ab32vgx.h" + +typedef int hal_bool_t; +typedef long hal_base_t; +typedef unsigned long hal_ubase_t; + +typedef hal_base_t hal_error_t; +typedef volatile unsigned long* hal_sfr_t; + + +/* HAL error code definitions */ +#define HAL_EOK 0 /**< There is no error */ +#define HAL_ERROR 1 /**< A generic error happens */ +#define HAL_ETIMEOUT 2 /**< Timed out */ +#define HAL_EFULL 3 /**< The resource is full */ +#define HAL_EEMPTY 4 /**< The resource is empty */ +#define HAL_ENOMEM 5 /**< No memory */ +#define HAL_ENOSYS 6 /**< No system */ +#define HAL_EBUSY 7 /**< Busy */ +#define HAL_EIO 8 /**< IO error */ +#define HAL_EINTR 9 /**< Interrupted system call */ +#define HAL_EINVAL 10 /**< Invalid argument */ + +#define HAL_NULL ((void *)0) + +#define HAL_DISABLE (0) +#define HAL_ENABLE (1) + +#define HAL_RESET (0) +#define HAL_SET (1) + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_gpio.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_gpio.h new file mode 100644 index 0000000000..ea039cbbd2 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_gpio.h @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32VG1_HAL_GPIO_H__ +#define AB32VG1_HAL_GPIO_H__ + +#include "ab32vg1_hal_def.h" + +struct gpio_init +{ + uint8_t pin; + uint8_t dir; + uint8_t de; + uint8_t pull; + uint32_t alternate; + uint32_t af_con; /*!< Alternate function control + [4:0]: Mapping name + [6:5]: Mapping control register + [7]: Mapping enable bit */ +}; +typedef struct gpio_init *gpio_init_t; + +enum +{ + GPIOxSET = 0x00, + GPIOxCLR, + GPIOx, + GPIOxDIR, + GPIOxDE, + GPIOxFEN, + GPIOxDRV, + GPIOxPU, + GPIOxPD, + GPIOxPU200K, + GPIOxPD200K, + GPIOxPU300K, + GPIOxPD300K, +}; + +/* Private constants */ + +#define FUNCMCONx(x) *(volatile uint32_t*)(SFR0_BASE + (0x07 + (x))*4) + +/* Exported constants */ +#define GPIO_DIR_INPUT (0x01u) +#define GPIO_DIR_OUTPUT (0x02u) + +#define GPIO_DIGITAL (0x01u) +#define GPIO_ANALOG (0x02u) + +#define GPIO_AFDIS (0u << 7) +#define GPIO_AFEN (1u << 7) +#define GPIO_AFCON0 (0u << 5) /*!< When using UARTT0 UART1 HSUART SPI0 and SD0 */ +#define GPIO_AFCON1 (1u << 5) /*!< When using LPWM0 LPWM1 LPWM2 LPWM3 SPI1 UART2 and CLKOUT */ +#define GPIO_AFCON2 (2u << 5) /*!< When using IR TIMER3 TIMER4 TIMER5 and IIS */ +#define GPIO_AFCON_MASK (0x3u << 5) +#define GPIO_GET_AFCON(af_con) (uint8_t)(((af_con) & (GPIO_AFCON_MASK)) >> 5) + +#define GPIO_NOPULL (0x00u) +#define GPIO_PULLUP (0x01u) +#define GPIO_PULLDOWN (0x02u) + +#define GPIO_PIN_LOW (0x00u) +#define GPIO_PIN_HIGH (0x01u) + +#define GPIOA_BASE ((hal_sfr_t)(&GPIOASET)) +#define GPIOB_BASE ((hal_sfr_t)(&GPIOBSET)) +#define GPIOE_BASE ((hal_sfr_t)(&GPIOESET)) +#define GPIOF_BASE ((hal_sfr_t)(&GPIOFSET)) + +#define GPIO_PIN_0 (BIT(0)) +#define GPIO_PIN_1 (BIT(1)) +#define GPIO_PIN_2 (BIT(2)) +#define GPIO_PIN_3 (BIT(3)) +#define GPIO_PIN_4 (BIT(4)) +#define GPIO_PIN_5 (BIT(5)) +#define GPIO_PIN_6 (BIT(6)) +#define GPIO_PIN_7 (BIT(7)) + +/* Include GPIO HAL Extended module */ +#include "ab32vg1_hal_gpio_ex.h" + +/* Initialization and de-initialization functions */ +void hal_gpio_init(hal_sfr_t gpiox, gpio_init_t gpio_init); + +/* IO operation function */ +uint8_t hal_gpio_read(hal_sfr_t gpiox, uint8_t pin); +void hal_gpio_write(hal_sfr_t gpiox, uint8_t pin, uint8_t state); +void hal_gpio_toggle(hal_sfr_t gpiox, uint8_t pin); + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_gpio_ex.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_gpio_ex.h new file mode 100644 index 0000000000..9745242870 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_gpio_ex.h @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32VG1_HAL_GPIO_EX_H__ +#define AB32VG1_HAL_GPIO_EX_H__ + +/* Alternate function */ +/** + * UART0: + * G1: tx:PA7 rx:PA6 + * G2: tx:PB2 rx:PB1 + * G3: tx:PB3 rx:PB4 + * G4: tx:PE7 rx:PE6 + * G5: tx:PA1 rx:PA0 + * G6: tx:PE0 rx:PE1 + * G7: tx:PF2 rx:map to tx + * + * UART1: + * G1: tx:PA7 rx:PA6 + * G2: tx:PA4 rx:PA3 + * G3: tx:PF2 rx:map to tx + */ +#define GPIO_AF_MAP_Gx(AF, Gx) ((uint32_t)((Gx) << (AF))) +#define GPIO_AF_MAP_CLR(AF) ((uint32_t)(0xfu << (AF))) + +#define GPIO_AF_G1 (1u) +#define GPIO_AF_G2 (2u) +#define GPIO_AF_G3 (3u) +#define GPIO_AF_G4 (4u) +#define GPIO_AF_G5 (5u) +#define GPIO_AF_G6 (6u) +#define GPIO_AF_G7 (7u) + +#define UT1RXMAP_AF (28u) +#define UT1TXMAP_AF (24u) +#define HSUTRXMAP_AF (20u) +#define HSUTTXMAP_AF (16u) +#define UT0RXMAP_AF (12u) +#define UT0TXMAP_AF ( 8u) +#define SPI0MAP_AF ( 4u) +#define SD0MAP_AF ( 0u) + +#define UT1RXMAP_TX ((uint32_t)(0x3u << (UT1RXMAP_AF))) +#define UT0RXMAP_TX ((uint32_t)(0x7u << (UT0RXMAP_AF))) + +#define GPIO_HSUART_G1 +#define GPIO_HSUART_G2 +#define GPIO_HSUART_G3 +#define GPIO_HSUART_G4 +#define GPIO_HSUART_G5 +#define GPIO_HSUART_G6 +#define GPIO_HSUART_G7 +#define GPIO_HSUART_G8 +#define GPIO_HSUART_G9 +#define GPIO_HSUART_G10 + +#define GPIO_SPI0_G1 +#define GPIO_SPI0_G2 +#define GPIO_SPI0_G3 + +#define GPIO_SD0_G1 +#define GPIO_SD0_G2 +#define GPIO_SD0_G3 +#define GPIO_SD0_G4 +#define GPIO_SD0_G5 +#define GPIO_SD0_G6 + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rcu.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rcu.h new file mode 100644 index 0000000000..d81fbb83f5 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rcu.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32VG1_HAL_RCU_H__ +#define AB32VG1_HAL_RCU_H__ + +#include "ab32vg1_hal_def.h" + +enum rcu_periph_type { + RCU_ROM0 = 0, + RCU_ROM1, + RCU_RAM0, + RCU_RAM1, + RCU_RAM2, + RCU_RAM3, + RCU_RSV0, /*!< reserve */ + RCU_RSV1, /*!< reserve */ + RCU_TMR0 = 8, + RCU_SD0, + RCU_UART0, + RCU_HSUT0, + RCU_DAC, + RCU_SARADC, + RCU_USB, + RCU_FMRX, + RCU_AUDEC, + RCU_PORT, + RCU_MBIST, + RCU_SPI0, + RCU_UART1 = 21, + RCU_TMR1 = 24, + RCU_TMR2 = 25, + RCU_FMAMFDT = 26, + RCU_FMTX, + RCU_IRRX = 29, + RCU_IIS, + RCU_TMR3 = 34, + RCU_TMR4, + RCU_TMR5, + RCU_UART2, + RCU_SPI1, +}; + +void hal_rcu_periph_clk_enable(uint32_t periph); +void hal_rcu_periph_clk_disable(uint32_t periph); + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_sd.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_sd.h new file mode 100644 index 0000000000..291d1e1e36 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_sd.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32VG1_HAL_SD_H__ +#define AB32VG1_HAL_SD_H__ + +#include "ab32vg1_hal_def.h" + +struct sd_init +{ + // uint8_t +}; + +struct sd_card_info +{ + uint32_t rca; /*!< Specifies the Relative Card Address */ + uint8_t type; /*!< Specifies the card type */ +}; +typedef struct sd_card_info* sd_card_info_t; + +struct sd_handle +{ + hal_sfr_t instance; + struct sd_init init; + struct sd_card_info sdcard; +}; +typedef struct sd_handle* sd_handle_t; + +#define SD0N (0x00u) + +#define CARD_V1 (0x01u) +#define CARD_V2 (0x02u) +#define CARD_MMC (0x03u) + +#define SDMMC_CHECK_PATTERM (0x000001AAu) + +/* Initialization functions */ +hal_error_t hal_sd_init(sd_handle_t hsd); +void hal_sd_deinit(uint32_t sdx); +void hal_sd_mspinit(sd_handle_t hsd); + +hal_error_t hal_sd_control(uint32_t control, uint32_t arg); +void hal_sd_write(uint32_t sdx, uint32_t data); +uint32_t hal_sd_read(uint32_t sdx); +// void hal_uart_write_it(uint32_t uartx, uint8_t data); +// uint8_t hal_uart_read_it(uint32_t uartx); + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_uart.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_uart.h new file mode 100644 index 0000000000..6802bfc61f --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_uart.h @@ -0,0 +1,144 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32VG1_HAL_UART_H__ +#define AB32VG1_HAL_UART_H__ + +#include "ab32vg1_hal_def.h" + +/* Exported types */ +/** @defgroup UART_Exported_Types UART Exported Types + * @{ + */ + +/** + * @brief UART Init Structure definition + */ + +struct uart_init +{ + uint32_t baud; /*!< This member configures the UART communication baud rate. + Baud Rate Register[31:16] is used to configure the rx rate. + Baud Rate Register[15: 0] is used to configure the tx rate. + The baud rate register is computed using the following formula: + UARTBAUD = Fsys_clock/BaudRate-1 + for example: UARTBAUD= (26000000/2)/baud-1 */ + + uint8_t word_len; /*!< Specifies the number of data bits transmitted or received in a frame. + This parameter can be a value of @ref UARTEx_Word_Length. */ + + uint8_t stop_bits; /*!< Specifies the number of stop bits transmitted. + This parameter can be a value of @ref UART_Stop_Bits. */ + + uint8_t mode; /*!< Specifies whether the receive or one line mode is enabled or disabled. + This parameter can be a value of @ref UART_Mode. */ +}; + +/** + * @brief UART handle struction definition + * + */ +struct uart_handle +{ + hal_sfr_t instance; + struct uart_init init; +}; + +/** + * @} + */ + +/* Exported constants */ + +/** + * @defgroup UARTEx_Word_Length UART Word Length + * @{ + */ +#define UART_WORDLENGTH_8B (0x00u) /*!< 8 bit long UART frame */ +#define UART_WORDLENGTH_9B (0x01u) /*!< 9 bit long UART frame */ +/** + * @} + */ + +/** + * @defgroup UART_Stop_Bits UART Number of Stop Bits + * @{ + */ +#define UART_STOPBITS_1 (0x00u) /*!< UART frame with 1 stop bit */ +#define UART_STOPBITS_2 (0x01u) /*!< UART frame with 2 stop bit */ +/** + * @} + */ + +/** @defgroup UART_Mode UART Transfer Mode + * @{ + */ +#define UART_MODE_TX (0x00u) /*!< TX mode */ +#define UART_MODE_TX_RX (0x01u) /*!< RX and TX mode */ + +/** + * @} + */ + +#define UART_FLAG_RXPND (BIT(9)) /*!< RX one byte finish flag */ +#define UART_FLAG_TXPND (BIT(8)) /*!< TX one byte finish flag */ + +#define UART_MODULE_ENABLE (BIT(0)) /*!< UART enable bit */ +#define UART_BIT9_ENABLE (BIT(1)) /*!< BIT9 enable bit */ +#define UART_RXIT_ENABLE (BIT(2)) /*!< Receive interrupt enable bit */ +#define UART_TXIT_ENABLE (BIT(3)) /*!< Transmit interrupt enable bit */ +#define UART_SB2_ENABLE (BIT(4)) /*!< Two stop bit enable bit */ +#define UART_CLK_SRC1 (BIT(5)) /*!< Clock source select bit */ +#define UART_1LINE_ENABLE (BIT(6)) /*!< One-Line mode enable bit */ +#define UART_RX_ENABLE (BIT(7)) /*!< Receive enable bit */ + +#define UART0N (0x00u) /*!< Number of UART0 */ +#define UART1N (0x01u) /*!< Number of UART1 */ +#define UART2N (0x02u) /*!< Number of UART2 */ + +#define UART0_BASE ((hal_sfr_t)(&UART0CON)) +#define UART1_BASE ((hal_sfr_t)(&UART1CON)) +#define UART2_BASE ((hal_sfr_t)(&UART2CON)) + +/* Exported function */ +/** @addtogroup UART_Exported_Functions UART Exported Functions + * @{ + */ + +/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions + * @{ + */ + +/* Initialization functions */ +hal_error_t hal_uart_init(struct uart_handle *huart); +void hal_uart_deinit(hal_sfr_t uartx); +void hal_uart_mspinit(struct uart_handle *huart); + +/** + * @} + */ + +void hal_uart_control(hal_sfr_t uartx, uint32_t cntl, uint32_t param); +void hal_uart_write(hal_sfr_t uartx, uint8_t data); +uint8_t hal_uart_read(hal_sfr_t uartx); +uint32_t hal_uart_getflag(hal_sfr_t uartx, uint32_t flag); +void hal_uart_clrflag(hal_sfr_t uartx, uint32_t flag); + +/** + * @} + */ + +/* Private function */ +/** @addtogroup UART_Private_Functions UART Private Functions + * @{ + */ +void uart_config_all(struct uart_handle *huart); + +/** + * @} + */ + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_wdt.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_wdt.h new file mode 100644 index 0000000000..76d15a675b --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_wdt.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32VG1_HAL_WDT_H__ +#define AB32VG1_HAL_WDT_H__ + +#include "ab32vg1_hal_def.h" + +#define WDT_CLR() WDTCON = 0xa +#define WDT_EN() WDTCON = 0x110 +#define WDT_DIS() WDTCON = 0xaa0 +#define WDT_RST() WDTCON = 0xa000110; while (1) +#define WDT_RST_DELAY() WDTCON = 0xa100110; while (1) + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_ll_sdio.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_ll_sdio.h new file mode 100644 index 0000000000..6fff778b7d --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_ll_sdio.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32VG1_HAL_SDIO_H__ +#define AB32VG1_HAL_SDIO_H__ + +#include "ab32vg1_hal_def.h" + +struct sdio_init +{ + uint32_t tmp; +}; +typedef struct sdio_init* sdio_init_t; + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal.c b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal.c new file mode 100644 index 0000000000..8b32dbf16e --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal.c @@ -0,0 +1,38 @@ +#include "ab32vg1_hal.h" + +static uint32_t hw_ticks = 0; + +void timer0_cfg(uint32_t ticks); + +static void (*tick_cfg_hook)(uint32_t ticks) = HAL_NULL; + +void hal_set_tick_hook(void (*hook)(uint32_t ticks)) +{ + tick_cfg_hook = hook; +} + +void hal_set_ticks(uint32_t ticks) +{ + if (ticks != hw_ticks) { + hw_ticks = ticks; + } + if (tick_cfg_hook != HAL_NULL) { + tick_cfg_hook(hw_ticks); + } +} + +WEAK void hal_mdelay(uint32_t nms) +{ + +} + +void hal_udelay(uint16_t nus) +{ + int i; + for (i = 0; i < nus*10; i++) { + asm("nop"); + } +} + +WEAK void hal_printf(const char *fmt, ...) +{} diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_dac.c b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_dac.c new file mode 100644 index 0000000000..9e78da5b05 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_dac.c @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ab32vg1_hal.h" + +#ifdef HAL_DAC_MODULE_ENABLED + +WEAK void hal_dac_mspinit(struct dac_handle *hdac) +{} + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_gpio.c b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_gpio.c new file mode 100644 index 0000000000..3e06595986 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_gpio.c @@ -0,0 +1,147 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ab32vg1_hal.h" + +#ifdef HAL_GPIO_MODULE_ENABLED + +#if 0 +#define HAL_LOG(...) hal_printf(__VA_ARGS__) +#else +#define HAL_LOG(...) +#endif + +void gpio_afinit(hal_sfr_t gpiox, uint8_t pin, uint32_t alternate, uint32_t af_con) +{ + uint32_t is_rx_map_tx = (alternate & UT1RXMAP_TX) || (alternate & UT0RXMAP_TX); + if ((af_con & 0xf0u) != GPIO_AFDIS) { + gpiox[GPIOxFEN] |= BIT(pin); + + switch (is_rx_map_tx) + { + case UT1RXMAP_TX: + FUNCMCONx(GPIO_GET_AFCON(af_con)) |= GPIO_AF_MAP_CLR(UT1RXMAP_AF); + break; + case UT0RXMAP_TX: + FUNCMCONx(GPIO_GET_AFCON(af_con)) |= GPIO_AF_MAP_CLR(UT0RXMAP_AF); + break; + default: + break; + } + + FUNCMCONx(GPIO_GET_AFCON(af_con)) |= GPIO_AF_MAP_CLR(af_con & 0x1f); + FUNCMCONx(GPIO_GET_AFCON(af_con)) |= alternate; + HAL_LOG("af_con=0x%X AFCON=%d alternate=%d\n", af_con, GPIO_GET_AFCON(af_con), (af_con & 0x1f)); + } +} + +/** + * @brief Initialize the gpio. + * + * @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN). + * @param gpio_init the configuration of the specified GPIO peripheral. + */ +void hal_gpio_init(hal_sfr_t gpiox, gpio_init_t gpio_init) +{ + uint8_t iocurrent = 0; + if (gpio_init == HAL_NULL) { + return; + } + + for (iocurrent = 0; iocurrent < 8; iocurrent++) { + if ((gpio_init->pin & BIT(iocurrent)) == 0) { + continue; + } + + gpio_afinit(gpiox, iocurrent, gpio_init->alternate, gpio_init->af_con); + + switch (gpio_init->dir) + { + case GPIO_DIR_INPUT: + /* When set to input, clear all pull-ups of the port. */ + gpiox[GPIOxDIR] |= BIT(iocurrent); + gpiox[GPIOxPU] &= ~BIT(iocurrent); + gpiox[GPIOxPU200K] &= ~BIT(iocurrent); + gpiox[GPIOxPD200K] &= ~BIT(iocurrent); + gpiox[GPIOxPU300K] &= ~BIT(iocurrent); + gpiox[GPIOxPD300K] &= ~BIT(iocurrent); + + switch (gpio_init->pull) + { + case GPIO_PULLUP: + gpiox[GPIOxPU] |= BIT(iocurrent); + break; + case GPIO_PULLDOWN: + gpiox[GPIOxPD] |= BIT(iocurrent); + break; + case GPIO_NOPULL: + default: + break; + } + break; + case GPIO_DIR_OUTPUT: + gpiox[GPIOxDIR] &= ~BIT(iocurrent); + break; + default: + break; + } + + switch (gpio_init->de) + { + case GPIO_DIGITAL: + gpiox[GPIOxDE] |= BIT(iocurrent); + break; + case GPIO_ANALOG: + gpiox[GPIOxDE] &= ~BIT(iocurrent); + break; + default: + break; + } + } +} + +/** + * @brief Read the specified input port pin. + * + * @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN). + * @param pin This parameter can be GPIO_PIN_x where x can be (0.15). + * @return uint8_t The input port pin value. + */ +uint8_t hal_gpio_read(hal_sfr_t gpiox, uint8_t pin) +{ + return ((gpiox[GPIOx] & BIT(pin)) != GPIO_PIN_LOW) ? GPIO_PIN_HIGH : GPIO_PIN_LOW; +} + +/** + * @brief Set or clear the selected data port bit. + * + * @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN). + * @param pin This parameter can be GPIO_PIN_x where x can be (0.15). + * @param state specifies the value to be written to the selected bit. + * @arg GPIO_PIN_LOW: + * @arg GPIO_PIN_HIGH: + */ +void hal_gpio_write(hal_sfr_t gpiox, uint8_t pin, uint8_t state) +{ + if (state == GPIO_PIN_LOW) { + gpiox[GPIOx] &= ~BIT(pin); + } else { + gpiox[GPIOx] |= BIT(pin); + } +} + +/** + * @brief Toggle the specified GPIO pin. + * + * @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN). + * @param pin This parameter can be GPIO_PIN_x where x can be (0.15). + */ +void hal_gpio_toggle(hal_sfr_t gpiox, uint8_t pin) +{ + gpiox[GPIOx] ^= BIT(pin); +} + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_rcu.c b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_rcu.c new file mode 100644 index 0000000000..cc78f6d234 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_rcu.c @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ab32vg1_hal.h" + +#ifdef HAL_RCU_MODULE_ENABLED + +void hal_rcu_periph_clk_enable(uint32_t periph) +{ + if (periph <= RCU_TMR2) { + CLKGAT0 |= BIT(periph); + } else if (periph <= RCU_SPI1) { + CLKGAT1 |= BIT(periph - RCU_FMAMFDT); + } +} + +void hal_rcu_periph_clk_disable(uint32_t periph) +{ + if (periph <= RCU_TMR2) { + CLKGAT0 &= ~BIT(periph); + } else if (periph <= RCU_SPI1) { + CLKGAT1 &= ~BIT(periph - RCU_FMAMFDT); + } +} + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_sd.c b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_sd.c new file mode 100644 index 0000000000..6beacf75a5 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_sd.c @@ -0,0 +1,184 @@ +#include "ab32vg1_hal.h" +#include "ab32vg1_ll_sdio.h" + +#ifdef HAL_SD_MODULE_ENABLED + +#include + +#define HAL_LOG(...) hal_printf(__VA_ARGS__) + +/************************* LL ************************************/ + +#define CK8E BIT(11) //在命令/数据包后加上8CLK +#define CBUSY BIT(10) //Busy Check +#define CLRSP BIT(9) //17Byte Long Rsp +#define CRSP BIT(8) //Need Rsp + +//0x40是CMD中的 01 开头。 +#define RSP_NO (0x40 | CK8E) +#define RSP_1 (0x40 | CRSP | CK8E) //接收6BYTE +#define RSP_1B (0x40 | CBUSY | CRSP | CK8E) //接收6BYTE，并等待BUSY +#define RSP_2 (0x40 | CLRSP | CRSP | CK8E) //接收17BYTE +#define RSP_3 (0x40 | CRSP | CK8E) //接收6BYTE +#define RSP_6 (0x40 | CRSP | CK8E) //接收6BYTE +#define RSP_7 (0x40 | CRSP | CK8E) //接收6BYTE +#define REQ_MULTREAD (18 | 0x40 | CRSP) //多块读时，不需要增加8CLK。其实，多块读先KICK DATA，这个是无所谓的 + +#define RSP_BUSY_TIMEOUT 2400000 //大约2s +#define RSP_TIMEOUT 6000 //大约5ms + +enum +{ + SDCON = 0, /* [20]:BUSY [19:17]:CRCS [16]:DCRCE [15]:NRPS [1]:Data bus width [0]:SD enable */ + SDCPND, + SDBAUD, + SDCMD, + SDARG3, + SDARG2, + SDARG1, + SDARG0, + SDDMAADR, + SDDMACNT, +}; + +uint8_t sysclk_update_baud(uint8_t baud); + +void sdio_setbaud(hal_sfr_t sdiox, uint8_t baud) +{ + sdiox[SDBAUD] = sysclk_update_baud(baud); +} + +void sdio_init(hal_sfr_t sdiox, sdio_init_t init) +{ + /* Set clock */ + sdio_setbaud(sdiox, 199); + + sdiox[SDCON] = 0; + hal_udelay(20); + sdiox[SDCON] |= BIT(0); /* SD control enable */ + sdiox[SDCON] |= BIT(3); /* Keep clock output */ + sdiox[SDCON] |= BIT(5); /* Data interrupt enable */ + hal_mdelay(40); +} + +/** + * @brief Check if SDIO command is finished. + * + * @param sdiox + * @return true is finished + * @return false + */ +bool sdio_check_finish(hal_sfr_t sdiox) +{ + if (sdiox[SDCON] & BIT(12)) { + sdiox[SDCPND] = BIT(12); + return true; + } + return false; +} + +/** + * @brief Check if SDIO has a response. + * + * @param sdiox + * @return true Have a response. + * @return false No response. + */ +bool sdio_check_rsp(hal_sfr_t sdiox) +{ + return !(sdiox[SDCON] & BIT(15)); +} + +bool sdio_send_cmd(hal_sfr_t sdiox, uint32_t cmd, uint32_t arg) +{ + uint32_t time_out = (cmd & CBUSY) ? RSP_BUSY_TIMEOUT : RSP_TIMEOUT; + sdiox[SDCMD] = cmd; + sdiox[SDARG3] = arg; + + while (sdio_check_finish(sdiox) == false) { + if (--time_out == 0) { + HAL_LOG("cmd time out\n"); + // card.abend = 1; + return false; + } + } + + return sdio_check_rsp(sdiox); +} + +uint8_t sdio_get_cmd_rsp(hal_sfr_t sdiox) +{ + return -1; +} + +uint32_t sdio_get_rsp(hal_sfr_t sdiox, uint32_t rsp) +{ + return -1; +} + +void sdio_read_kick(hal_sfr_t sdiox, void* buf) +{} + +void sdio_write_kick(hal_sfr_t sdiox, void* buf) +{} + +bool sdio_isbusy(hal_sfr_t sdiox) +{ + return false; +} + +void sdmmc_go_idle_state(hal_sfr_t sdiox) +{ + // hal_sfr_t sdiox = hsd->instance; + sdio_send_cmd(sdiox, 0x00 | RSP_NO, 0); +} + +void sdmmc_send_if_cond(hal_sfr_t sdiox) +{ + // hal_sfr_t sdiox = hsd->instance; + sdio_send_cmd(sdiox, 0x08 | RSP_7, SDMMC_CHECK_PATTERM); +} + +/************************* HAL ************************************/ + + +static void sd_poweron(sd_handle_t hsd) +{ + sdmmc_go_idle_state(hsd->instance); + sdmmc_send_if_cond(hsd->instance); + if (hsd->instance[SDCMD] == 0x08) { + hsd->sdcard.type = CARD_V2; + HAL_LOG("SD 2.0\n"); + } +} + +void hal_sd_initcard(sd_handle_t hsd) +{ + struct sdio_init init = {0}; + hal_sfr_t sdiox = hsd->instance; + + sdio_init(sdiox, &init); + sd_poweron(hsd); +} + +WEAK void hal_sd_mspinit(sd_handle_t hsd) +{ +} + +hal_error_t hal_sd_init(sd_handle_t hsd) +{ + if (hsd == HAL_NULL) { + return -HAL_ERROR; + } + + hal_sd_mspinit(hsd); + hal_sd_initcard(hsd); + + return -HAL_ERROR; +} + +void hal_sd_deinit(uint32_t sdx) +{ +} + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_uart.c b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_uart.c new file mode 100644 index 0000000000..bef740f89f --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_uart.c @@ -0,0 +1,172 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ab32vg1_hal.h" + +#ifdef HAL_UART_MODULE_ENABLED + +enum +{ + UARTxCON = 0x00, + UARTxCPND, + UARTxBAUD, + UARTxDATA, +}; + +/** + * @brief Set the UART baud rate. + * + * @param uartx This parameter can be UARTxN where x can be (0.2). + * @param baud Baud rate. + */ +void hal_uart_setbaud(hal_sfr_t uartx, uint32_t baud) +{ + uint32_t baud_cfg; + + uartx[UARTxCON] |= UART_CLK_SRC1; + baud_cfg = (26000000/2)/baud; //1.5M + uartx[UARTxBAUD] = (baud_cfg << 16) | baud_cfg; +} + +/** + * @brief Initialize the UART mode. + * + * @param huart UART handle. + * @return hal_error_t + */ +hal_error_t hal_uart_init(struct uart_handle *huart) +{ + if (huart == HAL_NULL) { + return -HAL_ERROR; + } + + hal_uart_mspinit(huart); + uart_config_all(huart); + + return HAL_EOK; +} + +/** + * @brief DeInitialize the UART peripheral. + * + * @param uartx This parameter can be UARTxN where x can be (0.2). + */ +void hal_uart_deinit(hal_sfr_t uartx) +{ + uartx[UARTxCON] = 0; +} + +/** + * @brief Initialize the UART MSP. + * + * @param huart UART handle. + */ +WEAK void HAL_UART_MspInit(struct uart_handle *huart) +{} + +/** + * @brief Control the UART peripheral. + * + * @param uartx This parameter can be UARTxN where x can be (0.2). + * @param cntl + * @arg UART_MODULE_ENABLE + * @arg UART_BIT9_ENABLE + * @arg UART_RXIT_ENABLE + * @arg UART_TXIT_ENABLE + * @arg UART_SB2_ENABLE + * @arg UART_CLK_SRC1 + * @arg UART_1LINE_ENABLE + * @arg UART_RX_ENABLE + * @param param + * @arg HAL_DISABLE + * @arg HAL_ENABLE + */ +void hal_uart_control(hal_sfr_t uartx, uint32_t cntl, uint32_t param) +{ + if (param == HAL_ENABLE) { + uartx[UARTxCON] |= (cntl); + } else { + uartx[UARTxCON] &= ~(cntl); + } +} + +/** + * @brief Send a character + * + * @param uartx This parameter can be UARTxN where x can be (0.2). + * @param data The characters that need to be sent + */ +void hal_uart_write(hal_sfr_t uartx, uint8_t data) +{ + uartx[UARTxDATA] = data; +} + +/** + * @brief Receive a character. + * + * @param uartx This parameter can be UARTxN where x can be (0.2). + * @return uint8_t Received character. + */ +uint8_t hal_uart_read(hal_sfr_t uartx) +{ + return (uartx[UARTxDATA] & 0xff); +} + +/** + * @brief Get the UART flag. + * + * @param uartx This parameter can be UARTxN where x can be (0.2). + * @param flag + * @arg UART_FLAG_RXPND + * @arg UART_FLAG_TXPND + * @return uint32_t + */ +uint32_t hal_uart_getflag(hal_sfr_t uartx, uint32_t flag) +{ + uint32_t ret = uartx[UARTxCON] & flag; + return ret; +} + +/** + * @brief Clear the UART flag. + * + * @param uartx This parameter can be UARTxN where x can be (0.2). + * @param flag + * @arg UART_FLAG_RXPND + * @arg UART_FLAG_TXPND + */ +void hal_uart_clrflag(hal_sfr_t uartx, uint32_t flag) +{ + uartx[UARTxCPND] |= flag; +} + +/** + * @brief Configure the UART peripheral. + * + * @param huart UART handle. + */ +void uart_config_all(struct uart_handle *huart) +{ + hal_uart_control(huart->instance, UART_MODULE_ENABLE, HAL_DISABLE); + + CLKCON1 |= BIT(14); + if (huart->instance == UART0_BASE) { + hal_rcu_periph_clk_enable(RCU_UART0); + } else if (huart->instance == UART1_BASE) { + hal_rcu_periph_clk_enable(RCU_UART1); + } else { + return; /* Not support! */ + } + + hal_uart_setbaud(huart->instance, huart->init.baud); + + if (huart->init.mode != UART_MODE_TX) { + hal_uart_control(huart->instance, UART_RX_ENABLE, HAL_ENABLE); + } + hal_uart_control(huart->instance, UART_MODULE_ENABLE, HAL_ENABLE); +} + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/bmsis/SConscript b/bsp/bluetrum/libraries/hal_libraries/bmsis/SConscript new file mode 100644 index 0000000000..9a82897032 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/bmsis/SConscript @@ -0,0 +1,79 @@ +#-*- encoding: utf-8 -*- + +import os +from building import * +Import('RTT_ROOT') +Import('rtconfig') + +#--------------------------------------------------------------------------------- +# Package configuration +#--------------------------------------------------------------------------------- +PKGNAME = "bmsis" +VERSION = "v1.0.0" +DEPENDS = [""] +#DEPENDS = ["PKG_USING_RW007"] + +#--------------------------------------------------------------------------------- +# Compile the configuration +# +# SOURCES: Need to compile c and c++ source, auto search when SOURCES is empty +# +# LOCAL_CPPPATH: Local file path (.h/.c/.cpp) +# LOCAL_CCFLAGS: Local compilation parameter +# LOCAL_ASFLAGS: Local assembly parameters +# +# CPPPATH: Global file path (.h/.c/.cpp), auto search when LOCAL_CPPPATH/CPPPATH +# is empty # no pass!!! +# CCFLAGS: Global compilation parameter +# ASFLAGS: Global assembly parameters +# +# CPPDEFINES: Global macro definition +# LOCAL_CPPDEFINES: Local macro definition +# +# LIBS: Specify the static library that need to be linked +# LIBPATH: Specify the search directory for the library file (.lib/.a) +# +# LINKFLAGS: Link options +#--------------------------------------------------------------------------------- +SOURCES = Glob("./source/*.c") +SOURCES += Glob("./source/*.S") + +LOCAL_CPPPATH = [] +LOCAL_CCFLAGS = "" +LOCAL_ASFLAGS = "" + +CPPPATH = [GetCurrentDir(), os.path.join(GetCurrentDir(), 'include')] +CCFLAGS = "" +ASFLAGS = "" + +CPPDEFINES = [] +LOCAL_CPPDEFINES = [] + +LIBS = [] +LIBPATH = [] + +LINKFLAGS = "" + +SOURCES_IGNORE = [] +CPPPATH_IGNORE = [] + +#--------------------------------------------------------------------------------- +# Main target +#--------------------------------------------------------------------------------- +objs = DefineGroup(name = PKGNAME, src = SOURCES, depend = DEPENDS, + CPPPATH = CPPPATH, + CCFLAGS = CCFLAGS, + ASFLAGS = ASFLAGS, + LOCAL_CPPPATH = LOCAL_CPPPATH, + LOCAL_CCFLAGS = LOCAL_CCFLAGS, + LOCAL_ASFLAGS = LOCAL_ASFLAGS, + CPPDEFINES = CPPDEFINES, + LOCAL_CPPDEFINES = LOCAL_CPPDEFINES, + LIBS = LIBS, + LIBPATH = LIBPATH, + LINKFLAGS = LINKFLAGS) + +Return("objs") +#--------------------------------------------------------------------------------- +# End +#--------------------------------------------------------------------------------- diff --git a/bsp/bluetrum/libraries/hal_libraries/bmsis/include/ab32vg1.h b/bsp/bluetrum/libraries/hal_libraries/bmsis/include/ab32vg1.h new file mode 100644 index 0000000000..203281403d --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/bmsis/include/ab32vg1.h @@ -0,0 +1,322 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef AB32VG1_H__ +#define AB32VG1_H__ + +#ifndef __ASSEMBLER__ +#include +#include "system_ab32vgx.h" + +/*!< Interrupt Number Definition */ +typedef enum +{ + IRQ_SW_VECTOR = 2, + IRQ_TMR0_VECTOR = 3, + IRQ_TMR1_VECTOR = 4, + IRQ_TMR2_4_5_VECTOR = 5, /*!< Timer 2, 4 and 5 Interrupt */ + IRQ_IRRX_VECTOR = 6, /*!< Timer 3 and IR receiver Interrupt */ + IRQ_USB_VECTOR = 7, + IRQ_SD_VECTOR = 8, + IRQ_AUBUF0_1_VECTOR = 9, /*!< Audio buffer 0 and 1 Interrupt */ + IRQ_SDADC_VECTOR = 10, + IRQ_AUDEC_VECTOR = 11, /*!< Audio codec, SBC encode and AEC FFT Interrupt */ + IRQ_SRC_VECTOR = 12, /*!< SRC, PLC and CVSD Interrupt */ + IRQ_FM_SPDIF_VECTOR = 13, /*!< FM TX, RX and SPDIF RX Interrupt */ + IRQ_UART0_2_VECTOR = 14, /*!< UART 0 to 2 Interrupt */ + IRQ_HSUART_VECTOR = 15, + IRQ_RTC_VECTOR = 16, /*!< RTC, LVD and WDT Interrupt */ + IRQ_I2S_VECTOR = 17, + IRQ_TOTAL_NUM = 23, +} irq_type; +#endif // __ASSEMBLER__ + +#ifndef __ASSEMBLER__ +#define SFR_RO *(volatile unsigned long const *) +#define SFR_WO *(volatile unsigned long*) +#define SFR_RW *(volatile unsigned long*) +#define SWINT() asm(".long 0xb0030057") +#define EEBREAKINT() asm(".long 0xb0040057") +#else +#define SFR_RO +#define SFR_WO +#define SFR_RW +#define SWINT .long 0xb0030057 +#define EEBREAKINT .long 0xb0040057 +#endif + +#define SFR_BASE 0x00000000 +#define SFR0_BASE (0x00000000 + 0x000) +#define SFR1_BASE (0x00000000 + 0x100) +#define SFR2_BASE (0x00000000 + 0x200) +#define SFR3_BASE (0x00000000 + 0x300) +#define SFR4_BASE (0x00000000 + 0x400) +#define SFR5_BASE (0x00000000 + 0x500) +#define SFR6_BASE (0x00000000 + 0x600) +#define SFR7_BASE (0x00000000 + 0x700) +#define SFR8_BASE (0x00000000 + 0x800) +#define SFR9_BASE (0x00000000 + 0x900) +#define SFR10_BASE (0x00000000 + 0xa00) +#define SFR11_BASE (0x00000000 + 0xb00) +#define SFR12_BASE (0x00000000 + 0xc00) +#define SFR13_BASE (0x00000000 + 0xd00) +#define SFR14_BASE (0x00000000 + 0xe00) +#define SFR15_BASE (0x00000000 + 0xf00) + +#define RTC_WR 0x200 +#define RTC_RD 0x100 + +#define RTCCNT_CMD 0x01 +#define RTCALM_CMD 0x02 +#define RTCRAM_CMD 0x03 +#define RTCCON0_CMD 0x04 +#define RTCCON1_CMD 0x05 +#define RTCCON2_CMD 0x06 +#define RTCCON3_CMD 0x07 +#define RTCCON4_CMD 0x08 +#define RTCCON5_CMD 0x09 +#define RTCCON6_CMD 0x0a +#define RTCCON7_CMD 0x0b +#define RTCCON8_CMD 0x0c +#define RTCCON9_CMD 0x0d +#define RTCCON10_CMD 0x0e + +#define FUNCMCON0 SFR_RW (SFR0_BASE + 0x07*4) +#define FUNCMCON1 SFR_RW (SFR0_BASE + 0x08*4) +#define FUNCMCON2 SFR_RW (SFR0_BASE + 0x09*4) + +#define UART0CON SFR_RW (SFR0_BASE + 0x10*4) +#define UART0CPND SFR_WO (SFR0_BASE + 0x11*4) +#define UART0BAUD SFR_RW (SFR0_BASE + 0x12*4) +#define UART0DATA SFR_RW (SFR0_BASE + 0x13*4) +#define TMR0CON SFR_RW (SFR0_BASE + 0x14*4) +#define TMR0CPND SFR_RW (SFR0_BASE + 0x15*4) +#define TMR0CNT SFR_RW (SFR0_BASE + 0x16*4) +#define TMR0PR SFR_RW (SFR0_BASE + 0x17*4) +#define CLKCON0 SFR_RW (SFR0_BASE + 0x19*4) +#define WDTCON SFR_RW (SFR0_BASE + 0x1a*4) +#define RTCCON SFR_RW (SFR0_BASE + 0x1b*4) +#define RTCDAT SFR_RW (SFR0_BASE + 0x1c*4) +#define CLKCON1 SFR_RW (SFR0_BASE + 0x1d*4) +#define RTCCPND SFR_WO (SFR0_BASE + 0x1e*4) + +#define SD0CON SFR_RW (SFR0_BASE + 0x20*4) +#define SD0CPND SFR_WO (SFR0_BASE + 0x21*4) +#define SD0BAUD SFR_RW (SFR0_BASE + 0x22*4) +#define SD0CMD SFR_RW (SFR0_BASE + 0x23*4) +#define SD0ARG3 SFR_RW (SFR0_BASE + 0x24*4) +#define SD0ARG2 SFR_RW (SFR0_BASE + 0x25*4) +#define SD0ARG1 SFR_RW (SFR0_BASE + 0x26*4) +#define SD0ARG0 SFR_RW (SFR0_BASE + 0x27*4) +#define SD0DMAADR SFR_RW (SFR0_BASE + 0x28*4) +#define SD0DMACNT SFR_RW (SFR0_BASE + 0x29*4) +#define SPI0CON SFR_RW (SFR0_BASE + 0x2a*4) +#define SPI0BUF SFR_RW (SFR0_BASE + 0x2b*4) +#define SPI0BAUD SFR_RW (SFR0_BASE + 0x2c*4) +#define SPI0CPND SFR_RW (SFR0_BASE + 0x2d*4) +#define SPI0DMACNT SFR_RW (SFR0_BASE + 0x2e*4) +#define SPI0DMAADR SFR_RW (SFR0_BASE + 0x2f*4) + +#define UART1CON SFR_RW (SFR0_BASE + 0x30*4) +#define UART1CPND SFR_WO (SFR0_BASE + 0x31*4) +#define UART1BAUD SFR_RW (SFR0_BASE + 0x32*4) +#define UART1DATA SFR_RW (SFR0_BASE + 0x33*4) +#define TMR1CON SFR_RW (SFR0_BASE + 0x35*4) +#define TMR1CPND SFR_RW (SFR0_BASE + 0x36*4) +#define TMR1CNT SFR_RW (SFR0_BASE + 0x37*4) +#define TMR1PR SFR_RW (SFR0_BASE + 0x38*4) +#define TMR2CON SFR_RW (SFR0_BASE + 0x3a*4) +#define TMR2CPND SFR_RW (SFR0_BASE + 0x3b*4) +#define TMR2CNT SFR_RW (SFR0_BASE + 0x3c*4) +#define TMR2PR SFR_RW (SFR0_BASE + 0x3d*4) + +#define DACDIGCON0 SFR_RW (SFR1_BASE + 0x10*4) +#define DACVOLCON SFR_RW (SFR1_BASE + 0x11*4) + +#define USBCON0 SFR_RW (SFR3_BASE + 0x00*4) +#define USBCON1 SFR_RW (SFR3_BASE + 0x01*4) +#define USBCON2 SFR_RW (SFR3_BASE + 0x02*4) + +#define PWRCON0 SFR_RW (SFR3_BASE + 0x1d*4) +#define LVDCON SFR_RW (SFR3_BASE + 0x1e*4) +#define CHAGCON SFR_RW (SFR3_BASE + 0x1f*4) + +#define PLL0DIV SFR_RW (SFR3_BASE + 0x23*4) +#define PLL1DIV SFR_RW (SFR3_BASE + 0x24*4) +#define PLL0CON SFR_RW (SFR3_BASE + 0x26*4) +#define PLL1CON SFR_RW (SFR3_BASE + 0x27*4) +#define XO26MCON SFR_RW (SFR3_BASE + 0x29*4) +#define CLKCON2 SFR_RW (SFR3_BASE + 0x2a*4) +#define CLKGAT0 SFR_RW (SFR3_BASE + 0x2c*4) +#define LPMCON SFR_RW (SFR3_BASE + 0x2d*4) +#define MEMCON SFR_RW (SFR3_BASE + 0x2e*4) +#define CLKCON3 SFR_RW (SFR3_BASE + 0x2f*4) +#define CLKGAT1 SFR_RW (SFR3_BASE + 0x3f*4) + +#define PWMCON SFR_RW (SFR4_BASE + 0x20*4) +#define PWMPRCON SFR_RW (SFR4_BASE + 0x21*4) +#define PWM01DUTY SFR_RW (SFR4_BASE + 0x22*4) +#define PWM23DUTY SFR_RW (SFR4_BASE + 0x23*4) +#define PWMCYCNUM SFR_RW (SFR4_BASE + 0x24*4) +#define PWMSTEP SFR_RW (SFR4_BASE + 0x25*4) + +//0x00~0x1f reserve for CPU +#define PICCONCLR SFR_WO (SFR5_BASE + 0x0c*4) +#define PICCONSET SFR_WO (SFR5_BASE + 0x0d*4) +#define PICENCLR SFR_WO (SFR5_BASE + 0x0e*4) +#define PICENSET SFR_WO (SFR5_BASE + 0x0f*4) + +#define PICCON SFR_RW (SFR5_BASE + 0x10*4) +#define PICEN SFR_RW (SFR5_BASE + 0x11*4) +#define PICPR SFR_RW (SFR5_BASE + 0x12*4) +#define PICADR SFR_RW (SFR5_BASE + 0x13*4) +#define PICPND SFR_RW (SFR5_BASE + 0x14*4) +#define EPC SFR_RW (SFR5_BASE + 0x1f*4) + +#define SADCDAT0 SFR_RO (SFR5_BASE + 0x20*4) +#define SADCDAT1 SFR_RO (SFR5_BASE + 0x21*4) +#define SADCDAT2 SFR_RO (SFR5_BASE + 0x22*4) +#define SADCDAT3 SFR_RO (SFR5_BASE + 0x23*4) +#define SADCDAT4 SFR_RO (SFR5_BASE + 0x24*4) +#define SADCDAT5 SFR_RO (SFR5_BASE + 0x25*4) +#define SADCDAT6 SFR_RO (SFR5_BASE + 0x26*4) +#define SADCDAT7 SFR_RO (SFR5_BASE + 0x27*4) +#define SADCDAT8 SFR_RO (SFR5_BASE + 0x28*4) +#define SADCDAT9 SFR_RO (SFR5_BASE + 0x29*4) +#define SADCDAT10 SFR_RO (SFR5_BASE + 0x2a*4) +#define SADCDAT11 SFR_RO (SFR5_BASE + 0x2b*4) +#define SADCDAT12 SFR_RO (SFR5_BASE + 0x2c*4) +#define SADCDAT13 SFR_RO (SFR5_BASE + 0x2d*4) +#define SADCDAT14 SFR_RO (SFR5_BASE + 0x2e*4) +#define SADCDAT15 SFR_RO (SFR5_BASE + 0x2f*4) + +#define AUANGCON1 SFR_RW (SFR1_BASE + 0x3d*4) + +#define WKUPCON SFR_WO (SFR5_BASE + 0x39*4) +#define WKUPEDG SFR_WO (SFR5_BASE + 0x3a*4) +#define WKUPCPND SFR_WO (SFR5_BASE + 0x3b*4) + +//------------------------- SFR Group6 ---------------------------------------// +#define GPIOASET SFR_RW (SFR6_BASE + 0x00*4) +#define GPIOACLR SFR_RW (SFR6_BASE + 0x01*4) +#define GPIOA SFR_RW (SFR6_BASE + 0x02*4) +#define GPIOADIR SFR_RW (SFR6_BASE + 0x03*4) +#define GPIOADE SFR_RW (SFR6_BASE + 0x04*4) +#define GPIOAFEN SFR_RW (SFR6_BASE + 0x05*4) +#define GPIOADRV SFR_RW (SFR6_BASE + 0x06*4) +#define GPIOAPU SFR_RW (SFR6_BASE + 0x07*4) +#define GPIOAPD SFR_RW (SFR6_BASE + 0x08*4) +#define GPIOAPU200K SFR_RW (SFR6_BASE + 0x09*4) +#define GPIOAPD200K SFR_RW (SFR6_BASE + 0x0a*4) +#define GPIOAPU300 SFR_RW (SFR6_BASE + 0x0b*4) +#define GPIOAPD300 SFR_RW (SFR6_BASE + 0x0c*4) + +#define GPIOBSET SFR_RW (SFR6_BASE + 0x10*4) +#define GPIOBCLR SFR_RW (SFR6_BASE + 0x11*4) +#define GPIOB SFR_RW (SFR6_BASE + 0x12*4) +#define GPIOBDIR SFR_RW (SFR6_BASE + 0x13*4) +#define GPIOBDE SFR_RW (SFR6_BASE + 0x14*4) +#define GPIOBFEN SFR_RW (SFR6_BASE + 0x15*4) +#define GPIOBDRV SFR_RW (SFR6_BASE + 0x16*4) +#define GPIOBPU SFR_RW (SFR6_BASE + 0x17*4) +#define GPIOBPD SFR_RW (SFR6_BASE + 0x18*4) +#define GPIOBPU200K SFR_RW (SFR6_BASE + 0x19*4) +#define GPIOBPD200K SFR_RW (SFR6_BASE + 0x1a*4) +#define GPIOBPU300 SFR_RW (SFR6_BASE + 0x1b*4) +#define GPIOBPD300 SFR_RW (SFR6_BASE + 0x1c*4) + +#define GPIOESET SFR_RW (SFR6_BASE + 0x20*4) +#define GPIOECLR SFR_RW (SFR6_BASE + 0x21*4) +#define GPIOE SFR_RW (SFR6_BASE + 0x22*4) +#define GPIOEDIR SFR_RW (SFR6_BASE + 0x23*4) +#define GPIOEDE SFR_RW (SFR6_BASE + 0x24*4) +#define GPIOEFEN SFR_RW (SFR6_BASE + 0x25*4) +#define GPIOEDRV SFR_RW (SFR6_BASE + 0x26*4) +#define GPIOEPU SFR_RW (SFR6_BASE + 0x27*4) +#define GPIOEPD SFR_RW (SFR6_BASE + 0x28*4) +#define GPIOEPU200K SFR_RW (SFR6_BASE + 0x29*4) +#define GPIOEPD200K SFR_RW (SFR6_BASE + 0x2a*4) +#define GPIOEPU300 SFR_RW (SFR6_BASE + 0x2b*4) +#define GPIOEPD300 SFR_RW (SFR6_BASE + 0x2c*4) + +#define GPIOFSET SFR_RW (SFR6_BASE + 0x30*4) +#define GPIOFCLR SFR_RW (SFR6_BASE + 0x31*4) +#define GPIOF SFR_RW (SFR6_BASE + 0x32*4) +#define GPIOFDIR SFR_RW (SFR6_BASE + 0x33*4) +#define GPIOFDE SFR_RW (SFR6_BASE + 0x34*4) +#define GPIOFFEN SFR_RW (SFR6_BASE + 0x35*4) +#define GPIOFDRV SFR_RW (SFR6_BASE + 0x36*4) +#define GPIOFPU SFR_RW (SFR6_BASE + 0x37*4) +#define GPIOFPD SFR_RW (SFR6_BASE + 0x38*4) +#define GPIOFPU200K SFR_RW (SFR6_BASE + 0x39*4) +#define GPIOFPD200K SFR_RW (SFR6_BASE + 0x3a*4) +#define GPIOFPU300 SFR_RW (SFR6_BASE + 0x3b*4) +#define GPIOFPD300 SFR_RW (SFR6_BASE + 0x3c*4) + +#define GPIOGSET SFR_RW (SFR7_BASE + 0x00*4) +#define GPIOGCLR SFR_RW (SFR7_BASE + 0x01*4) +#define GPIOG SFR_RW (SFR7_BASE + 0x02*4) +#define GPIOGDIR SFR_RW (SFR7_BASE + 0x03*4) +#define GPIOGDE SFR_RW (SFR7_BASE + 0x04*4) +#define GPIOGFEN SFR_RW (SFR7_BASE + 0x05*4) +#define GPIOGDRV SFR_RW (SFR7_BASE + 0x06*4) +#define GPIOGPU SFR_RW (SFR7_BASE + 0x07*4) +#define GPIOGPD SFR_RW (SFR7_BASE + 0x08*4) +#define GPIOGPU200K SFR_RW (SFR7_BASE + 0x09*4) +#define GPIOGPD200K SFR_RW (SFR7_BASE + 0x0a*4) +#define GPIOGPU300 SFR_RW (SFR7_BASE + 0x0b*4) +#define GPIOGPD300 SFR_RW (SFR7_BASE + 0x0c*4) + +#define IRRXCON SFR_RW (SFR8_BASE + 0x1b*4) +#define IRRXDAT SFR_RW (SFR8_BASE + 0x1c*4) +#define IRRXCPND SFR_WO (SFR8_BASE + 0x1d*4) +#define IRRXERR0 SFR_WO (SFR8_BASE + 0x1e*4) +#define IRRXERR1 SFR_WO (SFR8_BASE + 0x1f*4) + +#define USERKEY SFR_RW (SFR8_BASE + 0x20*4) +#define PROTCON1 SFR_RW (SFR8_BASE + 0x21*4) +#define FMAMFDTCON SFR_WO (SFR8_BASE + 0x29*4) + +#define TMR3CON SFR_RW (SFR9_BASE + 0x00*4) +#define TMR3CPND SFR_WO (SFR9_BASE + 0x01*4) +#define TMR3CNT SFR_RW (SFR9_BASE + 0x02*4) +#define TMR3PR SFR_RW (SFR9_BASE + 0x03*4) +#define TMR3CPT SFR_RO (SFR9_BASE + 0x04*4) +#define TMR3DUTY0 SFR_WO (SFR9_BASE + 0x05*4) +#define TMR3DUTY1 SFR_WO (SFR9_BASE + 0x06*4) +#define TMR3DUTY2 SFR_WO (SFR9_BASE + 0x07*4) +#define TMR4CON SFR_RW (SFR9_BASE + 0x08*4) +#define TMR4CPND SFR_WO (SFR9_BASE + 0x09*4) +#define TMR4CNT SFR_RW (SFR9_BASE + 0x0a*4) +#define TMR4PR SFR_RW (SFR9_BASE + 0x0b*4) +#define TMR4CPT SFR_RO (SFR9_BASE + 0x0c*4) +#define TMR4DUTY0 SFR_WO (SFR9_BASE + 0x0d*4) +#define TMR4DUTY1 SFR_WO (SFR9_BASE + 0x0e*4) +#define TMR4DUTY2 SFR_WO (SFR9_BASE + 0x0f*4) + +#define TMR5CON SFR_RW (SFR9_BASE + 0x10*4) +#define TMR5CPND SFR_WO (SFR9_BASE + 0x11*4) +#define TMR5CNT SFR_RW (SFR9_BASE + 0x12*4) +#define TMR5PR SFR_RW (SFR9_BASE + 0x13*4) +#define TMR5CPT SFR_RO (SFR9_BASE + 0x14*4) +#define TMR5DUTY0 SFR_WO (SFR9_BASE + 0x15*4) +#define TMR5DUTY1 SFR_WO (SFR9_BASE + 0x16*4) +#define TMR5DUTY2 SFR_WO (SFR9_BASE + 0x17*4) +#define UART2CON SFR_RW (SFR9_BASE + 0x18*4) +#define UART2CPND SFR_WO (SFR9_BASE + 0x19*4) +#define UART2BAUD SFR_RW (SFR9_BASE + 0x1a*4) +#define UART2DATA SFR_RW (SFR9_BASE + 0x1b*4) +#define PORTINTEDG SFR_RW (SFR9_BASE + 0x1e*4) +#define PORTINTEN SFR_RW (SFR9_BASE + 0x1f*4) + +#define SPI1CON SFR_RW (SFR9_BASE + 0x20*4) +#define SPI1BUF SFR_RW (SFR9_BASE + 0x21*4) +#define SPI1BAUD SFR_RW (SFR9_BASE + 0x22*4) +#define SPI1CPND SFR_RW (SFR9_BASE + 0x23*4) +#define SPI1DMACNT SFR_RW (SFR9_BASE + 0x24*4) +#define SPI1DMAADR SFR_RW (SFR9_BASE + 0x25*4) + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/bmsis/include/ab32vgx.h b/bsp/bluetrum/libraries/hal_libraries/bmsis/include/ab32vgx.h new file mode 100644 index 0000000000..fdf1404d4a --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/bmsis/include/ab32vgx.h @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef PROUGENGX_H__ +#define PROUGENGX_H__ + +#include "ab32vg1.h" + +#ifndef UINT_MAX +#define UINT_MAX 0xffffffff +#endif // UINT_MAX + +#define BIT(n) (1ul << (n)) + +#define AT(x) __attribute__((section(#x))) +#define ALIGNED(n) __attribute__((aligned(n))) +#define DMA_ADR(x) ((uint32_t)x) +#define ALWAYS_INLINE __attribute__((always_inline)) inline +#define NO_INLINE __attribute__((noinline)) +#define WEAK __attribute__((weak)) +#define PACKED __attribute__((packed)) + +#define BYTE0(n) ((unsigned char)(n)) +#define BYTE1(n) ((unsigned char)((n)>>8)) +#define BYTE2(n) ((unsigned char)((n)>>16)) +#define BYTE3(n) ((unsigned char)((n)>>24)) + +#define GET_LE16(ptr) (uint16_t)(*(uint16_t*)(uint8_t*)(ptr)) +#define GET_LE32(ptr) (uint32_t)(*(uint32_t*)(uint8_t*)(ptr)) +#define PUT_LE16(ptr, val) *(uint16_t*)(uint8_t*)(ptr) = (uint16_t)(val) +#define PUT_LE32(ptr, val) *(uint32_t*)(uint8_t*)(ptr) = (uint32_t)(val) + +#define GET_BE16(ptr) get_be16(ptr) +#define GET_BE32(ptr) get_be32(ptr) +#define PUT_BE16(ptr, val) put_be16(ptr, val) +#define PUT_BE32(ptr, val) put_be32(ptr, val) + +#include "ab32vg1_hal.h" + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/bmsis/include/bmsis_gcc.h b/bsp/bluetrum/libraries/hal_libraries/bmsis/include/bmsis_gcc.h new file mode 100644 index 0000000000..368f363ac9 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/bmsis/include/bmsis_gcc.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef BMSIS_GCC_H__ +#define BMSIS_GCC_H__ + +/* ignore some GCC warnings */ +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wsign-conversion" +#pragma GCC diagnostic ignored "-Wconversion" +#pragma GCC diagnostic ignored "-Wunused-parameter" +#endif + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/bmsis/include/system_ab32vgx.h b/bsp/bluetrum/libraries/hal_libraries/bmsis/include/system_ab32vgx.h new file mode 100644 index 0000000000..faeb4b25d9 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/bmsis/include/system_ab32vgx.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef SYSTEM_PROUGENGX_H__ +#define SYSTEM_PROUGENGX_H__ + +//sys_clk configure list +enum { + //select pll0out, PLL0 240M + PLL0DIV_12M, + PLL0DIV_24M, + PLL0DIV_30M, + PLL0DIV_48M, + PLL0DIV_60M, + PLL0DIV_80M, + PLL0DIV_120M, + + //select osc26m + OSCDIV_2M, + OSCDIV_13M, + OSCDIV_26M, + + //select adpll +}; + +//需要与sysclk_sel_tbl对应, 按时钟频率升序 +enum { + SYSCLK_2M, + SYSCLK_12M, + SYSCLK_13M, + SYSCLK_24M, + SYSCLK_26M, + SYSCLK_30M, + SYSCLK_48M, + SYSCLK_60M, + SYSCLK_80M, + SYSCLK_120M, +}; + +extern uint32_t get_sysclk_nhz(void); +extern void system_init(void); +extern void set_sysclk(uint32_t sys_clk); + +#endif diff --git a/bsp/bluetrum/libraries/hal_libraries/bmsis/source/startup.S b/bsp/bluetrum/libraries/hal_libraries/bmsis/source/startup.S new file mode 100644 index 0000000000..0445641797 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/bmsis/source/startup.S @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ab32vg1.h" + +.global _start +.section .reset, "ax" +_start: + + //load comm + la a0, __comm_vma + la a1, __comm_lma + la a2, __comm_size + call 0x84044 + + //load ram1 + la a0, __ram1_vma + la a1, __ram1_lma + la a2, __ram1_size + call 0x84044 + + la a0, __irq_stack_start //Stack清成0x23 + li a1, 0x23 + la a2, __irq_stack_size + call memset + la ra, __irq_stack + lui a5, 0x1 + sw zero, -1920(a5) + sw zero, -1916(a5) + + //clear bss + la a0, __bss_start + li a1, 0 + la a2, __bss_size + call memset + + la a0, __comm_vma + sw a0, PICADR(zero) + + call entry +// la ra, __exception +// jr ra + +.section .vector, "ax" +// .org 0x10 +//__exception: +// li sp, 0x10600 //出错后，不破坏错误点的堆栈数据 +// jal exception_isr +// 1: j 1b +// mret + + .org 0x40 + jal x0, low_prio_irq + mret + + .global cpu_irq_comm +cpu_irq_comm: + la a5, __irq_stack + mv sp, a5 + j cpu_irq_comm_do + + ret diff --git a/bsp/bluetrum/libraries/hal_libraries/bmsis/source/system_ab32vgx.c b/bsp/bluetrum/libraries/hal_libraries/bmsis/source/system_ab32vgx.c new file mode 100644 index 0000000000..a34ea4b423 --- /dev/null +++ b/bsp/bluetrum/libraries/hal_libraries/bmsis/source/system_ab32vgx.c @@ -0,0 +1,421 @@ +/* + * Copyright (c) 2020-2020, BLUETRUM Development Team + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ab32vgx.h" + +#ifndef ALIGN +#define ALIGN(n) __attribute__((aligned(n))) +#endif // ALIGN + +typedef struct _sys_t { + uint8_t cnt_1us; //delay 1us cnt + uint8_t main_start; //Main是否已启动 + uint8_t clk_sel; //system clock select + uint8_t sys_clk; +// uint8_t aupll_type; //区分AUPLL的频率 + uint16_t rand_seed; + uint32_t uart0baud; //UART0BAUD +} sys_t; + +const uint8_t sysclk_sel_tbl[] = { + OSCDIV_2M, //SYS_2M + PLL0DIV_12M, //SYS_12M + OSCDIV_13M, //SYS_13M + PLL0DIV_24M, //SYS_24M + OSCDIV_26M, //SYS_26M + PLL0DIV_30M, //SYS_30M + PLL0DIV_48M, //SYS_48M + PLL0DIV_60M, //SYS_60M + PLL0DIV_80M, //SYS_80M + PLL0DIV_120M, //SYS_120M +}; + +const uint8_t sysclk_index[] = { + 2, + 12, + 13, + 24, + 26, + 30, + 48, + 60, + 80, + 120, +}; + +sys_t sys = {0}; +void my_printf(const char *format, ...); + +static void delay_us(uint16_t nus) +{ + int i; + for (i = 0; i < nus*10; i++) { + asm("nop"); + } +} + +uint8_t get_clksel_val(uint8_t val) +{ + return sysclk_sel_tbl[val]; +} + +uint8_t get_cur_sysclk(void) +{ + return sys.sys_clk; +} + +uint32_t get_sysclk_nhz(void) +{ + return sysclk_index[sys.sys_clk] * 1000000; +} + +////AT(.com_text.set_flash_safety) +//static ALWAYS_INLINE void set_flash_safety(uint32_t sys_clk) +//{ +// SPI0CON |= BIT(10); +// if (sys_clk > SYS_48M) { +// SPI0CON |= BIT(3); //2bit mode +// spiflash_init(0x3b, 1); //dummy = 1 +// } else { +// SPI0CON &= ~BIT(3); //2bit mode +// spiflash_init(0x0b, 1); //dummy = 0 +// } +//} + +uint8_t get_sd_rate(void) +{ + return 0; //unit: M +} + +uint8_t set_sd_baud(uint8_t sd_rate) +{ + uint8_t sd0baud=0; + uint8_t sys_clk=0; + if(sd_rate > 14){//不支持超过14M + return 0; + } + if (sys.sys_clk <= SYSCLK_26M) { + sys_clk=26; + }else if (sys.sys_clk == SYSCLK_48M) { + sys_clk=48; + } else if (sys.sys_clk <= SYSCLK_60M) { + sys_clk=52; + } else if (sys.sys_clk == SYSCLK_80M) { + sys_clk=80; + } else if (sys.sys_clk <= SYSCLK_120M) { + sys_clk=120; + } + sd0baud = sys_clk/sd_rate-1; + if(sys_clk%sd_rate*2/sd_rate) { + sd0baud=sd0baud+1; + } + return sd0baud; +} + +void update_sd0baud(void) +{ + if (!(SD0CON & BIT(0))) { + return; + } + + uint8_t sd_rate=get_sd_rate(); + if(sd_rate){ + uint8_t sd0baud=set_sd_baud(sd_rate); + if(sd0baud){ + SD0BAUD=sd0baud; + return ; + } + } + + if (sys.sys_clk <= SYSCLK_30M) { + SD0BAUD = 1; + } else if (sys.sys_clk <= SYSCLK_60M) { + SD0BAUD = 3; + } else if (sys.sys_clk == SYSCLK_80M) { + SD0BAUD = 5; + } else if (sys.sys_clk <= SYSCLK_120M) { + SD0BAUD = 9; + } +} + +uint8_t sysclk_update_baud(uint8_t baud) +{ + uint8_t sd_rate=get_sd_rate(); + if(baud>20||!sd_rate) { + if (sys.sys_clk == SYSCLK_120M) { + return ((uint16_t)(baud + 1) * 25 / 10 - 1); + } else if (sys.sys_clk >= SYSCLK_80M) { + return ((baud + 1) * 2 - 1); + } else if (sys.sys_clk <= SYSCLK_30M) { + return (((baud + 1) >> 1) - 1); + } + } else if (sd_rate){ + return set_sd_baud(sd_rate); + } + return baud; +} + +//客户可能用到UART0(使用26M时钟源)做通信,这里可选设置系统时钟时不改波特率 +WEAK void update_uart0baud_in_sysclk(uint32_t uart_baud) +{ + if(UART0CON & BIT(0)) { + while (!(UART0CON & BIT(8))); + } + UART0BAUD = (uart_baud << 16) | uart_baud; +} + +void set_sys_uart0baud(uint32_t baud) +{ + sys.uart0baud = baud; +} + +//切系统时钟前，先设置模块时钟分频较大值，保证模块不会超频的情况 +void set_peripherals_clkdiv_safety(void) +{ + uint32_t clkcon3 = CLKCON3; + uint32_t clkcon2 = CLKCON2; + + //src clkdiv + clkcon3 &= ~0xf0; //reset src clkdiv + clkcon3 |= (1 << 4); //src clk = sys_clk / (n+1) + + //sbcenc硬件要小于48M + clkcon3 &= ~(0x0f << 12); //reset sbcenc clkdiv + clkcon3 |= (2 << 12); //src clk = sys_clk / (n+1) + + //aec ram硬件要小于50M + clkcon3 &= ~0x0f; //reset aec clkdiv + clkcon3 &= ~(0x0f << 19); //reset plc clkdiv + clkcon3 &= ~(0x0f << 23); //reset cvsd clkdiv + clkcon3 |= 0x02; //aec clk = sys_clk / (n+1) + clkcon3 |= (2 << 19); //plc clk = sys_clk / (n+1) + clkcon3 |= (2 << 23); //cvsd clk = sys_clk / (n+1) + + //audec硬件要小于48M + clkcon2 &= ~(0x0f << 13); //reset audec clkdiv + clkcon2 |= (2 << 13); //audec clk = sys_clk / (n+1) + + CLKCON3 = clkcon3; + CLKCON2 = clkcon2; +} + +//根据实际系统时钟，设置合适的模块时钟分频 +void set_peripherals_clkdiv(void) +{ + uint32_t clkcon3 = CLKCON3; + uint32_t clkcon2 = CLKCON2; + uint32_t clkdiv; + uint8_t sys_clk = sys.sys_clk; + + //src clkdiv + clkcon3 &= ~0xf0; //reset src clkdiv + if (sys_clk > SYSCLK_80M) { + clkcon3 |= (1 << 4); //src clk = sys_clk / (n+1) + } + + //sbcec硬件要小于48M + clkcon3 &= ~(0x0f << 12); + if (sys_clk > SYSCLK_80M) { + clkcon3 |= (2 << 12); + } else if (sys_clk >= SYSCLK_60M) { + clkcon3 |= (1 << 12); + } + + //aec ram硬件要小于50M + clkcon3 &= ~0x0f; //reset aec clkdiv + clkcon3 &= ~(0x0f << 19); //reset plc clkdiv + clkcon3 &= ~(0x0f << 23); //reset cvsd clkdiv + if (sys_clk > SYSCLK_80M) { + clkdiv = 2; + } else if (sys_clk >= SYSCLK_60M) { + clkdiv = 1; + } else { + clkdiv = 0; + } + clkcon3 |= clkdiv; //aec clk = sys_clk / (n+1) + clkcon3 |= (clkdiv << 19); //plc clk = sys_clk / (n+1) + clkcon3 |= (clkdiv << 23); //cvsd clk = sys_clk / (n+1) + + //audec硬件要小于48M + clkcon2 &= ~(0x0f << 13); //reset audec clkdiv + if (sys_clk > SYSCLK_80M) { + clkdiv = 2; + } else if (sys_clk >= SYSCLK_60M) { + clkdiv = 1; + } else { + clkdiv = 0; + } + clkcon2 |= (clkdiv << 13); //audec clk = sys_clk / (n+1) + + CLKCON3 = clkcon3; + CLKCON2 = clkcon2; + +// if (sys_clk <= SYS_48M) { +// PWRCON0 = (PWRCON0 & ~0xf) | (sys_trim.vddcore); //VDDCORE减一档 +// } +// vddcore_other_offset(); +} + +ALIGN(512) //注意：超过512byte时，要用lock cache +static void set_sysclk_do(uint32_t sys_clk, uint32_t clk_sel, uint32_t spll_div, uint32_t spi_baud, uint32_t spi1baud) +{ + uint32_t cpu_ie; + cpu_ie = PICCON & BIT(0); + PICCONCLR = BIT(0); //关中断，切换系统时钟 + set_peripherals_clkdiv_safety(); + + CLKCON0 &= ~(BIT(2) | BIT(3)); //sysclk sel rc2m + CLKCON2 &= ~(0x1f << 8); //reset spll div + + if(clk_sel <= PLL0DIV_120M) { + //sys_clk来源PLL0的分频配置 + CLKCON0 &= ~(BIT(4) | BIT(5) | BIT(6)); //sys_pll select pll0out + if (PLL0DIV != (240 * 65536 / 26)) { + PLL0DIV = 240 * 65536 / 26; //pll: 240M, XOSC: 26M + PLL0CON &= ~(BIT(3) | BIT(4) | BIT(5)); + PLL0CON |= BIT(3); //Select PLL/VCO frequency band (PLL大于206M vcos = 0x01, 否则为0) + PLL0CON |= BIT(20); //update pll0div to pll0_clk + CLKCON3 &= ~(7 << 16); + CLKCON3 |= (4 << 16); //USB CLK 48M + } + } else if (clk_sel <= OSCDIV_26M) { + //sys_clk来源于XOSC26M时钟分频, 无USB时关闭PLL0 +// if (!is_usb_support()) { +// PLL0CON &= ~BIT(18); +// PLL0CON &= ~(BIT(12) | BIT(6)); //close pll0 +// } + + CLKCON0 &= ~(BIT(4) | BIT(5) | BIT(6)); + CLKCON0 |= BIT(6); //spll select xosc26m_clk + } + + CLKCON2 |= (spll_div << 8); + CLKCON0 |= BIT(3); //sysclk sel spll + SPI0BAUD = spi_baud; + if (CLKGAT1 & BIT(12)) { + SPI1BAUD = spi1baud; + } +// if (spiflash_speed_up_en()) { +// set_flash_safety(sys_clk); +// } + PICCON |= cpu_ie; +} + +void set_sysclk(uint32_t sys_clk) +{ + uint32_t uart_baud, spll_div = 0, spi_baud = 0, spi1baud; + uint8_t cnt_1us, clk_sel; + + clk_sel = get_clksel_val(sys_clk); + if(sys.clk_sel == clk_sel) { + return; + } +// if (sys_clk > SYSCLK_48M) { +// PWRCON0 = (PWRCON0 & ~0xf) | (sys_trim.vddcore + 1); //VDDCORE加一档 +// } +// vddcore_other_offset(); + +// printf("%s: %d, %d\n", __func__, sys_clk, clk_sel); + switch (sys_clk) { + case SYSCLK_12M: + spll_div = 19; //pll0 240M + cnt_1us = 1; + spi_baud = 0; + spi1baud = 0; + break; + + case SYSCLK_24M: + spll_div = 9; //pll0 240M + cnt_1us = 2; + spi_baud = 0; + spi1baud = 1; + break; + + case SYSCLK_30M: + spll_div = 7; //pll0 240M + cnt_1us = 3; + spi_baud = 1; //Baud Rate =Fsys clock / (SPI_BAUD+1) + spi1baud = 1; + break; + + case SYSCLK_48M: + spll_div = 4; //pll0 240M + cnt_1us = 4; + spi_baud = 1; //Baud Rate =Fsys clock / (SPI_BAUD+1) + spi1baud = 3; + break; + + case SYSCLK_60M: + spll_div = 3; //pll0 240M + cnt_1us = 5; + spi_baud = 2; //Baud Rate =Fsys clock / (SPI_BAUD+1) + spi1baud = 3; + break; + + case SYSCLK_80M: + spll_div = 2; //pll0 240M + cnt_1us = 7; + spi_baud = 3; //Baud Rate =Fsys clock / (SPI_BAUD+1) + spi1baud = 4; + break; + + case SYSCLK_120M: + spll_div = 1; //pll0 240M + cnt_1us = 10; + spi_baud = 4; //Baud Rate =Fsys clock / (SPI_BAUD+1) //spiclk 120/5 = 24M + spi1baud = 9; + break; + + case SYSCLK_26M: + spll_div = 0; + cnt_1us = 3; + spi_baud = 1; + spi1baud = 1; + break; + + case SYSCLK_13M: + spll_div = 1; + cnt_1us = 1; + spi_baud = 0; + spi1baud = 0; + break; + + case SYSCLK_2M: + spll_div = 1; + cnt_1us = 1; + spi_baud = 0; + spi1baud = 0; + break; + + default: + return; + } + + //先判断PLL0是否打开 + if(clk_sel <= PLL0DIV_120M) { + if (!(PLL0CON & BIT(12))) { + PLL0CON &= ~(BIT(3) | BIT(4) | BIT(5)); + PLL0CON |= BIT(3); //Select PLL/VCO frequency band (PLL大于206M vcos = 0x01, 否则为0) + PLL0CON |= BIT(12); //enable pll0 ldo + delay_us(100); //delay 100us + PLL0DIV = 240 * 65536 / 26; //pll0: 240M, XOSC: 26M + PLL0CON |= BIT(20); //update pll0div to pll0_clk + PLL0CON |= BIT(6); //enable analog pll0 + PLL0CON |= BIT(18); //pll0 sdm enable + delay_us(1000); //wait pll0 stable + } + } + + sys.cnt_1us = cnt_1us; + sys.sys_clk = sys_clk; + sys.clk_sel = clk_sel; + uart_baud = (((get_sysclk_nhz() + (sys.uart0baud / 2)) / sys.uart0baud) - 1); + + set_sysclk_do(sys_clk, clk_sel,spll_div, spi_baud, spi1baud); + set_peripherals_clkdiv(); + update_sd0baud(); //更新下SD0BAUD + update_uart0baud_in_sysclk(uart_baud); +} diff --git a/bsp/bluetrum/tools/sdk_dist.py b/bsp/bluetrum/tools/sdk_dist.py new file mode 100644 index 0000000000..e40064fb84 --- /dev/null +++ b/bsp/bluetrum/tools/sdk_dist.py @@ -0,0 +1,24 @@ +import os +import sys +import shutil +cwd_path = os.getcwd() +sys.path.append(os.path.join(os.path.dirname(cwd_path), 'rt-thread', 'tools')) + +# BSP dist function +def dist_do_building(BSP_ROOT, dist_dir): + from mkdist import bsp_copy_files + import rtconfig + + library_dir = os.path.join(dist_dir, 'libraries') + + print("=> copy bluetrum bsp library") + library_path = os.path.join(os.path.dirname(BSP_ROOT), 'libraries') + library_dir = os.path.join(dist_dir, 'libraries') + bsp_copy_files(os.path.join(library_path, rtconfig.BSP_LIBRARY_TYPE), os.path.join(library_dir, rtconfig.BSP_LIBRARY_TYPE)) + + print("=> copy bsp drivers") + bsp_copy_files(os.path.join(library_path, 'hal_drivers'), os.path.join(library_dir, 'hal_drivers')) + # shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) + + print("=> copy libcpu") + bsp_copy_files(os.path.join(os.path.dirname(BSP_ROOT), 'libcpu'), os.path.join(dist_dir, 'libcpu')) diff --git a/bsp/stm32/docs/STM32_Nucleo-144_BSP_Introduction.md b/bsp/stm32/docs/STM32_Nucleo-144_BSP_Introduction.md index cb6e4f8f47..05ac07a869 100644 --- a/bsp/stm32/docs/STM32_Nucleo-144_BSP_Introduction.md +++ b/bsp/stm32/docs/STM32_Nucleo-144_BSP_Introduction.md @@ -72,7 +72,7 @@ Use a Type-A to Mini-B cable to connect the development board to the PC and turn After the program is successfully downloaded, the system runs automatically. Observe the running results of the LED on the development board, the LD3 and LD1 will light all the time, and LD2 will flash periodically. -The USB virtual COM port connects to **USART2 by default**, and when the corresponding serial port (**115200-8-1-N**) is opened in the terminal tool, the output information of RT-Thread can be seen when the device is reset: +The USB virtual COM port connects to **USART3 by default**, and when the corresponding serial port (**115200-8-1-N**) is opened in the terminal tool, the output information of RT-Thread can be seen when the device is reset: ```shell \ | / @@ -102,7 +102,7 @@ Follow these tutorial videos to learn PuTTy: ## Advanced Features -This BSP only enables GPIO and USART2 by default. If you need more advanced features such as SPI, I2C, you need to configure the BSP with RT-Thread [ENV tool](https://www.rt-thread.io/download.html?download=Env) , as follows: +This BSP only enables GPIO and USART3 by default. If you need more advanced features such as SPI, I2C, you need to configure the BSP with RT-Thread [ENV tool](https://www.rt-thread.io/download.html?download=Env) , as follows: 1. Open the Env tool under the specific BSP folder; 2. Enter `menuconfig` command to configure the project, then save and exit; diff --git a/bsp/stm32/stm32f446-st-nucleo/README_zh.md b/bsp/stm32/stm32f446-st-nucleo/README_zh.md index e91f1ef45a..acc7091fd8 100644 --- a/bsp/stm32/stm32f446-st-nucleo/README_zh.md +++ b/bsp/stm32/stm32f446-st-nucleo/README_zh.md @@ -83,7 +83,7 @@ msh > ``` ### 进阶使用 -此 BSP 默认只开启了 GPIO 和 串口1 的功能，如果需使用 SD 卡、Flash 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： +此 BSP 默认只开启了 GPIO 和 串口3 的功能，如果需使用 SD 卡、Flash 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： 1. 在 bsp 下打开 env 工具。 diff --git a/bsp/stm32/stm32g070-st-nucleo/README.md b/bsp/stm32/stm32g070-st-nucleo/README.md index b221d5e6d2..bf3b978d28 100644 --- a/bsp/stm32/stm32g070-st-nucleo/README.md +++ b/bsp/stm32/stm32g070-st-nucleo/README.md @@ -1,116 +1,72 @@ -# STM32G071 BSP +# STM32G070-Nucleo BSP Introduction -## 简介 +[中文](README_zh.md) -本文档为 STM32G070RB-Nucleo 开发板的 BSP (板级支持包) 说明。 +## MCU: STM32G070RB @64MHz, 128KB FLASH, 36KB RAM -主要内容如下： +The STM32G070CB/KB/RB mainstream microcontrollers are based on high-performance Arm® Cortex®-M0+ 32-bit RISC core operating at up to 64 MHz frequency. Offering a high level of integration, they are suitable for a wide range of applications in consumer, industrial and appliance domains and ready for the Internet of Things (IoT) solutions. -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 +The devices incorporate a memory protection unit (MPU), high-speed embedded memories (128 Kbytes of Flash program memory with read protection, write protection, and 36 Kbytes of SRAM), DMA and an extensive range of system functions, enhanced I/Os and peripherals. The devices offer standard communication interfaces (two I2Cs, two SPIs / one I2S, and four USARTs), one 12-bit ADC (2.5 MSps) with up to 19 channels, a low-power RTC, an advanced control PWM timer, five general-purpose 16-bit timers, two basic timers, two watchdog timers, and a SysTick timer. +The devices operate within ambient temperatures from -40 to 85°C. They can operate with supply voltages from 2.0 V to 3.6 V. Optimized dynamic consumption combined with a comprehensive set of power-saving modes allows the design of low-power applications. +VBAT direct battery input allows keeping RTC and backup registers powered. +The devices come in packages with 32 to 64 pins. -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 +#### KEY FEATURES -## 开发板介绍 +- Core: Arm® 32-bit Cortex®-M0+ CPU, frequency up to 64 MHz +- -40°C to 85°C operating temperature +- Memories + - 128 Kbytes of Flash memory with protection + - 36 Kbytes of SRAM (32 Kbytes with HW parity check) +- CRC calculation unit +- Reset and power management + - Voltage range: 2.0 V to 3.6 V + - Power-on/Power-down reset (POR/PDR) + - Low-power modes:Sleep, Stop, Standby + - VBAT supply for RTC and backup registers +- Clock management + - 4 to 48 MHz crystal oscillator + - 32 kHz crystal oscillator with calibration + - Internal 16 MHz RC with PLL option + - Internal 32 kHz RC oscillator (±5 %) +- Up to 59 fast I/Os + - All mappable on external interrupt vectors + - Multiple 5 V-tolerant I/Os -STM32G070RB-Nucleo 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 内核的开发板，最高主频为 64Mhz，该开发板具有丰富的扩展接口，可以方便验证 STM32G070RB 的芯片性能。 +- 7-channel DMA controller with flexible mapping +- 12-bit, 0.4 µs ADC (up to 16 ext. channels) + - Up to 16-bit with hardware oversampling + - Conversion range: 0 to 3.6V +- 11 timers: 16-bit for advanced motor control, five 16-bit general-purpose, two basic 16-bit, two watchdogs, SysTick timer +- Calendar RTC with alarm and periodic wakeup from Stop/Standby +- Communication interfaces + - Two I2C-bus interfaces supporting Fast-mode Plus (1 Mbit/s) with extra current sink, one supporting SMBus/PMBus and wakeup from Stop mode + - Four USARTs with master/slave synchronous SPI; two supporting ISO7816 interface, LIN, IrDA capability, auto baud rate detection and wakeup feature + - Two SPIs (32 Mbit/s) with 4- to 16-bit programmable bitframe, one multiplexed with I2S interface +- Development support: serial wire debug (SWD) +- All packages ECOPACK 2 compliant -开发板外观如下图所示： -![board](figures/board.jpg) -该开发板常用 **板载资源** 如下： +## Read more -- MCU：STM32G070RB，主频 64MHz，128KB FLASH ，36KB RAM -- 外部 RAM：无 -- 外部 FLASH：无 -- 常用外设 - - 按键：1个，user（兼具唤醒功能，PC13） -- 常用接口：USB 转串口、arduino 接口等 -- 调试接口，标准 SWD +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) | +| [STM32G070RB ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32g070rb.html#documentation) | STM32G070RB datasheet and other resources | -开发板更多详细信息请参考 ST 的 [NUCLEO 开发板介绍](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-g070rb.html)。 -## 外设支持 -本 BSP 目前对外设的支持情况如下： +## Maintained By -| **板载外设** | **支持情况** | **备注** | -| :----------------- | :----------: | :------------------------------------- | -| ST-LINK 虚拟串口 | 支持 | 使用 USART2 | -| **片上外设** | **支持情况** | **备注** | -| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | -| UART | 支持 | USART1/2/3 | -| TIM | 支持 | TIM1/3 | -| PWM | 支持 | | -| SPI | 支持 | SPI1/2 | -| I2C | 支持 | 软件 I2C | -| ADC | 支持 | | -| WDT | 支持 | | -| FLASH | 支持 | 已适配 [FAL](https://github.com/RT-Thread-packages/fal) | -| RTC | 暂不支持 | 详见注意事项 | +[NU-LL](https://github.com/NU-LL) -## 使用说明 -使用说明分为如下两个章节： -- 快速上手 +## Translated By - 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 +Meco Man @ RT-Thread Community -- 进阶使用 - - 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 - -### 快速上手 - -本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 - -#### 硬件连接 - -使用数据线连接开发板到 PC，打开电源开关。 - -#### 编译下载 - -双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 - -> 将工程使用的仿真器设置为ST-Link并安装仿真器好驱动程序以后，将开发板连接到PC，点击下载按钮即可下载程序到开发板。 - -#### 运行结果 - -下载程序成功之后，系统会自动运行。 - -连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: - -```bash - \ | / -- RT - Thread Operating System - / | \ 4.0.2 build Jul 1 2020 - 2006 - 2019 Copyright by rt-thread team -msh > -``` - -### 进阶使用 - -此 BSP 默认只开启了 GPIO 和 UART 的功能，如果需使用 SPI，I2C 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： - -1. 在 bsp 下打开 env 工具。 - -2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 - -3. 输入`pkgs --update`命令更新软件包。 - -4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 - -本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 - -## 注意事项 - -- G0系列RTC驱动有点问题，详见论坛 [该贴](https://www.rt-thread.org/qa/thread-424601-1-2.html) - -## 联系人信息 - -维护人: - -- [NU-LL](https://github.com/NU-LL) +> jiantingman@foxmail.com +> +> https://github.com/mysterywolf \ No newline at end of file diff --git a/bsp/stm32/stm32g070-st-nucleo/README_zh.md b/bsp/stm32/stm32g070-st-nucleo/README_zh.md new file mode 100644 index 0000000000..b221d5e6d2 --- /dev/null +++ b/bsp/stm32/stm32g070-st-nucleo/README_zh.md @@ -0,0 +1,116 @@ +# STM32G071 BSP + +## 简介 + +本文档为 STM32G070RB-Nucleo 开发板的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +STM32G070RB-Nucleo 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 内核的开发板，最高主频为 64Mhz，该开发板具有丰富的扩展接口，可以方便验证 STM32G070RB 的芯片性能。 + +开发板外观如下图所示： + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32G070RB，主频 64MHz，128KB FLASH ，36KB RAM +- 外部 RAM：无 +- 外部 FLASH：无 +- 常用外设 + - 按键：1个，user（兼具唤醒功能，PC13） +- 常用接口：USB 转串口、arduino 接口等 +- 调试接口，标准 SWD + +开发板更多详细信息请参考 ST 的 [NUCLEO 开发板介绍](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-g070rb.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| ST-LINK 虚拟串口 | 支持 | 使用 USART2 | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | +| UART | 支持 | USART1/2/3 | +| TIM | 支持 | TIM1/3 | +| PWM | 支持 | | +| SPI | 支持 | SPI1/2 | +| I2C | 支持 | 软件 I2C | +| ADC | 支持 | | +| WDT | 支持 | | +| FLASH | 支持 | 已适配 [FAL](https://github.com/RT-Thread-packages/fal) | +| RTC | 暂不支持 | 详见注意事项 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 将工程使用的仿真器设置为ST-Link并安装仿真器好驱动程序以后，将开发板连接到PC，点击下载按钮即可下载程序到开发板。 + +#### 运行结果 + +下载程序成功之后，系统会自动运行。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.2 build Jul 1 2020 + 2006 - 2019 Copyright by rt-thread team +msh > +``` + +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 UART 的功能，如果需使用 SPI，I2C 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- G0系列RTC驱动有点问题，详见论坛 [该贴](https://www.rt-thread.org/qa/thread-424601-1-2.html) + +## 联系人信息 + +维护人: + +- [NU-LL](https://github.com/NU-LL) diff --git a/bsp/stm32/stm32g071-st-nucleo/README.md b/bsp/stm32/stm32g071-st-nucleo/README.md index d38cd76edd..928aea83fd 100644 --- a/bsp/stm32/stm32g071-st-nucleo/README.md +++ b/bsp/stm32/stm32g071-st-nucleo/README.md @@ -1,108 +1,80 @@ -# STM32G071 BSP +# STM32G071-Nucleo BSP Introduction -## 简介 +[中文](README_zh.md) -本文档为 RT-Thread 开发团队为 STM32G071RB-Nucleo 开发板提供的 BSP (板级支持包) 说明。 +## MCU: STM32G071RB @64MHz, 128KB FLASH, 36KB RAM -主要内容如下： +The STM32G071x8/xB mainstream microcontrollers are based on high-performance Arm® Cortex®-M0+ 32-bit RISC core operating at up to 64 MHz frequency. Offering a high level of integration, they are suitable for a wide range of applications in consumer, industrial and appliance domains and ready for the Internet of Things (IoT) solutions. -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 +The devices incorporate a memory protection unit (MPU), high-speed embedded memories (up to 128 Kbytes of Flash program memory with read protection, write protection, proprietary code protection, and securable area, and 36 Kbytes of SRAM), DMA and an extensive range of system functions, enhanced I/Os and peripherals. The devices offer standard communication interfaces (two I2Cs, two SPIs / one I2S, one HDMI CEC, and four USARTs), one 12-bit ADC (2.5 MSps) with up to 19 channels, one 12-bit DAC with two channels, two fast comparators, an internal voltage reference buffer, a low-power RTC, an advanced control PWM timer running at up to double the CPU frequency, five general-purpose 16-bit timers with one running at up to double the CPU frequency, a 32-bit general-purpose timer, two basic timers, two low-power 16-bit timers, two watchdog timers, and a SysTick timer. The STM32G071x8/xB devices provide a fully integrated USB Type-C Power Delivery controller. +The devices operate within ambient temperatures from -40 to 125°C. They can operate with supply voltages from 1.7 V to 3.6 V. Optimized dynamic consumption combined with a comprehensive set of power-saving modes, low-power timers and low-power UART, allows the design of low-power applications. +VBAT direct battery input allows keeping RTC and backup registers powered. +The devices come in packages with 28 to 64 pins. -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 +#### KEY FEATURES -## 开发板介绍 +- Core: Arm® 32-bit Cortex®-M0+ CPU, frequency up to 64 MHz +- -40°C to 85°C/105°C/125°C operating temperature +- Memories + - Up to 128 Kbytes of Flash memory with protection and securable area + - 36 Kbytes of SRAM (32 Kbytes with HW parity check) +- CRC calculation unit +- Reset and power management + - Voltage range: 1.7 V to 3.6 V + - Power-on/Power-down reset (POR/PDR) + - Programmable Brownout reset (BOR) + - Programmable voltage detector (PVD) + - Low-power modes:Sleep, Stop, Standby, Shutdown + - VBAT supply for RTC and backup registers +- Clock management + - 4 to 48 MHz crystal oscillator + - 32 kHz crystal oscillator with calibration + - Internal 16 MHz RC with PLL option (±1 %) + - Internal 32 kHz RC oscillator (±5 %) +- Up to 60 fast I/Os + - All mappable on external interrupt vectors + - Multiple 5 V-tolerant I/Os +- 7-channel DMA controller with flexible mapping +- 12-bit, 0.4 µs ADC (up to 16 ext. channels) + - Up to 16-bit with hardware oversampling + - Conversion range: 0 to 3.6V -STM32G071RB-Nucleo 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 内核的开发板，最高主频为 64Mhz，该开发板具有丰富的扩展接口，可以方便验证 STM32G071RB 的芯片性能。 +- Two 12-bit DACs, low-power sample-and-hold +- Two fast low-power analog comparators, with programmable input and output, rail-to-rail +- 14 timers (two 128 MHz capable): 16-bit for advanced motor control, one 32-bit and five 16-bit general-purpose, two basic 16-bit, two low-power 16-bit, two watchdogs, SysTick timer +- Calendar RTC with alarm and periodic wakeup from Stop/Standby/Shutdown +- Communication interfaces + - Two I2C-bus interfaces supporting Fast-mode Plus (1 Mbit/s) with extra current sink, one supporting SMBus/PMBus and wakeup from Stop mode + - Four USARTs with master/slave synchronous SPI; two supporting ISO7816 interface, LIN, IrDA capability, auto baud rate detection and wakeup feature + - One low-power UART + - Two SPIs (32 Mbit/s) with 4- to 16-bit programmable bitframe, one multiplexed with I2S interface + - HDMI CEC interface, wakeup on header +- USB Type-C™ Power Delivery controller +- Development support: serial wire debug (SWD) +- 96-bit unique ID +- All packages ECOPACK®2 compliant -开发板外观如下图所示： -![board](figures/board.jpg) -该开发板常用 **板载资源** 如下： +## Read more -- MCU：STM32G071RB，主频 64MHz，128KB FLASH ，36KB RAM -- 外部 RAM：无 -- 外部 FLASH：无 -- 常用外设 - - 按键：1个，user（兼具唤醒功能，PC13） -- 常用接口：USB 转串口、arduino 接口等 -- 调试接口，标准 SWD +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) | +| [STM32G071RB ST Official Website](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-g071rb.html#documentation) | STM32G071RB datasheet and other resources | -开发板更多详细信息请参考 ST 的 [NUCLEO 开发板介绍](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-g071rb.html)。 -## 外设支持 -本 BSP 目前对外设的支持情况如下： +## Maintained By -| **板载外设** | **支持情况** | **备注** | -| :----------------- | :----------: | :------------------------------------- | -| ST-LINK 虚拟串口 | 支持 | 使用 LPUART | -| **片上外设** | **支持情况** | **备注** | -| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | -| UART | 支持 | LPUART1, USART1/2 | +[gztss](https://github.com/gztss) -## 使用说明 -使用说明分为如下两个章节： -- 快速上手 +## Translated By - 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 +Meco Man @ RT-Thread Community -- 进阶使用 - - 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 - -### 快速上手 - -本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 - -#### 硬件连接 - -使用数据线连接开发板到 PC，打开电源开关。 - -#### 编译下载 - -双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 - -> 将工程使用的仿真器设置为ST-Link并安装仿真器好驱动程序以后，将开发板连接到PC，点击下载按钮即可下载程序到开发板。 - -#### 运行结果 - -下载程序成功之后，系统会自动运行。 - -连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: - -```bash - \ | / -- RT - Thread Operating System - / | \ 4.0.0 build Dec 21 2018 - 2006 - 2018 Copyright by rt-thread team -msh > -``` - -### 进阶使用 - -此 BSP 默认只开启了 GPIO 和 LPUART 的功能，如果需使用 SPI，I2C 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： - -1. 在 bsp 下打开 env 工具。 - -2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 - -3. 输入`pkgs --update`命令更新软件包。 - -4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 - -本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 - -## 注意事项 - -- 无 - -## 联系人信息 - -维护人: - -- [gztss](https://github.com/gztss) +> jiantingman@foxmail.com +> +> https://github.com/mysterywolf \ No newline at end of file diff --git a/bsp/stm32/stm32g071-st-nucleo/README_zh.md b/bsp/stm32/stm32g071-st-nucleo/README_zh.md new file mode 100644 index 0000000000..d38cd76edd --- /dev/null +++ b/bsp/stm32/stm32g071-st-nucleo/README_zh.md @@ -0,0 +1,108 @@ +# STM32G071 BSP + +## 简介 + +本文档为 RT-Thread 开发团队为 STM32G071RB-Nucleo 开发板提供的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +STM32G071RB-Nucleo 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 内核的开发板，最高主频为 64Mhz，该开发板具有丰富的扩展接口，可以方便验证 STM32G071RB 的芯片性能。 + +开发板外观如下图所示： + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32G071RB，主频 64MHz，128KB FLASH ，36KB RAM +- 外部 RAM：无 +- 外部 FLASH：无 +- 常用外设 + - 按键：1个，user（兼具唤醒功能，PC13） +- 常用接口：USB 转串口、arduino 接口等 +- 调试接口，标准 SWD + +开发板更多详细信息请参考 ST 的 [NUCLEO 开发板介绍](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-g071rb.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| ST-LINK 虚拟串口 | 支持 | 使用 LPUART | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | +| UART | 支持 | LPUART1, USART1/2 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 将工程使用的仿真器设置为ST-Link并安装仿真器好驱动程序以后，将开发板连接到PC，点击下载按钮即可下载程序到开发板。 + +#### 运行结果 + +下载程序成功之后，系统会自动运行。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.0 build Dec 21 2018 + 2006 - 2018 Copyright by rt-thread team +msh > +``` + +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 LPUART 的功能，如果需使用 SPI，I2C 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 无 + +## 联系人信息 + +维护人: + +- [gztss](https://github.com/gztss) diff --git a/bsp/stm32/stm32g431-st-nucleo/README.md b/bsp/stm32/stm32g431-st-nucleo/README.md index 64ed19231b..5446988f28 100644 --- a/bsp/stm32/stm32g431-st-nucleo/README.md +++ b/bsp/stm32/stm32g431-st-nucleo/README.md @@ -1,106 +1,108 @@ -# NUCLEO-G431RB 开发板 BSP 说明 +# STM32G431-Nucleo BSP Introduction -## 简介 +[中文](README_zh.md) -本文档为 NUCLEO-G431RB 开发板的 BSP (板级支持包) 说明。 +## MCU: STM32G431RB @170MHz, 128KB FLASH, 32KB RAM -主要内容如下： +The STM32G431x6/x8/xB devices are based on the high-performance Arm® Cortex®-M4 32-bit RISC core. They operate at a frequency of up to 170 MHz. -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 +The Cortex-M4 core features a single-precision floating-point unit (FPU), which supports all the Arm single-precision data-processing instructions and all the data types. It also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) which enhances the application’s security. +These devices embed high-speed memories (128 Kbytes of Flash memory, and 32 Kbytes of SRAM), an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix. +The devices also embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, securable memory area and proprietary code readout protection. +The devices embed peripherals allowing mathematical/arithmetic function acceleration (CORDIC for trigonometric functions and FMAC unit for filter functions). +They offer two fast 12-bit ADCs (5 Msps), four comparators, three operational amplifiers, four DAC channels (2 external and 2 internal), an internal voltage reference buffer, a low-power RTC, one general-purpose 32-bit timers, two 16-bit PWM timers dedicated to motor control, seven general-purpose 16-bit timers, and one 16-bit low-power timer. +They also feature standard and advanced communication interfaces such as: +\- Three I2Cs +\- Three SPIs multiplexed with two half duplex I2Ss +\- Three USARTs, one UART and one low-power UART. +\- One FDCAN +\- One SAI +\- USB device +\- UCPD +The devices operate in the -40 to +85 °C (+105 °C junction) and -40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V power supply. A comprehensive set of power-saving modes allows the design of low-power applications. +Some independent power supplies are supported including an analog independent supply input for ADC, DAC, OPAMPs and comparators. A VBAT input allows backup of the RTC and the registers. +The STM32G431x6/x8/xB family offers 9 packages from 32-pin to 100-pin. -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 +#### KEY FEATURES -## 开发板介绍 +- Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 170 MHz with 213 DMIPS, MPU, DSP instructions +- Operating conditions: + - VDD, VDDA voltage range: 1.71 V to 3.6 V +- Mathematical hardware accelerators + - CORDIC for trigonometric functions acceleration + - FMAC: filter mathematical accelerator +- Memories + - 128 Kbytes of Flash memory with ECC support, proprietary code readout protection (PCROP), securable memory area, 1 Kbyte OTP + - 22 Kbytes of SRAM, with hardware parity check implemented on the first 16 Kbytes + - Routine booster: 10 Kbytes of SRAM on instruction and data bus, with hardware parity check (CCM SRAM) +- Reset and supply management + - Power-on/power-down reset (POR/PDR/BOR) + - Programmable voltage detector (PVD) + - Low-power modes: sleep, stop, standby and shutdown + - VBAT supply for RTC and backup registers +- Clock management + - 4 to 48 MHz crystal oscillator + - 32 kHz oscillator with calibration + - Internal 16 MHz RC with PLL option (± 1%) + - Internal 32 kHz RC oscillator (± 5%) +- Up to 86 fast I/Os + - All mappable on external interrupt vectors + - Several I/Os with 5 V tolerant capability +- Interconnect matrix +- 12-channel DMA controller +- 2 x ADCs 0.25 µs (up to 23 channels). Resolution up to 16-bit with hardware oversampling, 0 to 3.6 V conversion range -NUCLEO-G431RB 是 ST 公司推出的一款针对 STM32G4 系列设计的 Cortex-M4 Nucleo-64 开发板，支持 mbed，兼容 Arduino、还带有 ST Morpho 扩展接口，可连接微控制器的所有周边外设。 - -开发板外观如下图所示： - -![board](figures/board.jpg) - -该开发板常用 **板载资源** 如下： - -- MCU：STM32G431RB，主频 170MHz，128KB FLASH ，22KB RAM -- 常用外设 - - LED：1个，LD2（黄色，PA5） -- 常用接口：USB 转串口 -- 调试接口，标准 ST-LINK/SWD - -开发板更多详细信息请参考【NUCLEO-G431RB】 [开发板介绍](https://www.st.com/zh/evaluation-tools/nucleo-g431rb.html)。 - -## 外设支持 - -本 BSP 目前对外设的支持情况如下： - -| **板载外设** | **支持情况** | **备注** | -| :----------------- | :----------: | :------------------------------------- | -| USB 转串口 | 支持 | | -| **片上外设** | **支持情况** | **备注** | -| GPIO | 支持 | | -| UART | 支持 | LPUART1 USART1/3 UART4 | - -## 使用说明 - -使用说明分为如下两个章节： - -- 快速上手 - - 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 - -- 进阶使用 - - 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 +- 4 x 12-bit DAC channels + - 2 x buffered external channels 1 MSPS + - 2 x unbuffered internal channels 15 MSPS +- 4 x ultra-fast rail-to-rail analog comparators +- 3 x operational amplifiers that can be used in PGA mode, all terminals accessible +- Internal voltage reference buffer (VREFBUF) supporting three output voltages (2.048 V, 2.5 V, 2.9 V) +- 14 timers: + - 1 x 32-bit timer and 2 x 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input + - 2 x 16-bit 8-channel advanced motor control timers, with up to 8 x PWM channels, dead time generation and emergency stop + - 1 x 16-bit timer with 2 x IC/OCs, one OCN/PWM, dead time generation and emergency stop + - 2 x 16-bit timers with IC/OC/OCN/PWM, dead time generation and emergency stop + - 2 x watchdog timers (independent, window) + - 1 x SysTick timer: 24-bit downcounter + - 2 x 16-bit basic timers + - 1 x low-power timer +- Calendar RTC with alarm, periodic wakeup from stop/standby +- Communication interfaces + - 1 x FDCAN controller supporting flexible data rate + - 3 x I2C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from stop + - 4 x USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control) + - 1 x LPUART + - 3 x SPIs, 4 to 16 programmable bit frames, 2 x with multiplexed half duplex I2S interface + - 1 x SAI (serial audio interface) + - USB 2.0 full-speed interface with LPM and BCD support + - IRTIM (infrared interface) + - USB Type-C™ /USB power delivery controller (UCPD) +- True random number generator (RNG) +- CRC calculation unit, 96-bit unique ID +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™ -### 快速上手 -本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 +## Read more -#### 硬件连接 +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) | +| [STM32G431RB ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32g431rb.html#documentation) | STM32G431RB datasheet and other resources | -使用数据线连接开发板到 PC，通过数据线对开发板供电,下载,调试。 -#### 编译下载 -双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 +## Maintained By -> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 ST-LINK 连接开发板的基础上，点击下载按钮即可下载程序到开发板 +[xuzhuoyi](https://github.com/xuzhuoyi), -#### 运行结果 -下载程序成功之后，系统会自动运行，黄色的 LD2 以 500MS 周期闪烁。 -连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: +## Translated By -```bash - \ | / -- RT - Thread Operating System - / | \ 4.0.2 build Oct 5 2019 - 2006 - 2019 Copyright by rt-thread team -msh > -``` -### 进阶使用 +Meco Man @ RT-Thread Community -此 BSP 默认只开启了 GPIO 和 LPUART1 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下： - -1. 在 bsp 下打开 env 工具。 - -2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 - -3. 输入`pkgs --update`命令更新软件包。 - -4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 - -本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 - -## 注意事项 - -- 默认终端输出设备是 LPUART1 - -## 联系人信息 - -维护人: - -- [xuzhuoyi](https://github.com/xuzhuoyi), 邮箱： \ No newline at end of file +> jiantingman@foxmail.com +> +> https://github.com/mysterywolf \ No newline at end of file diff --git a/bsp/stm32/stm32g431-st-nucleo/README_zh.md b/bsp/stm32/stm32g431-st-nucleo/README_zh.md new file mode 100644 index 0000000000..a3dd55ad36 --- /dev/null +++ b/bsp/stm32/stm32g431-st-nucleo/README_zh.md @@ -0,0 +1,106 @@ +# NUCLEO-G431RB 开发板 BSP 说明 + +## 简介 + +本文档为 NUCLEO-G431RB 开发板的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +NUCLEO-G431RB 是 ST 公司推出的一款针对 STM32G4 系列设计的 Cortex-M4 Nucleo-64 开发板，支持 mbed，兼容 Arduino、还带有 ST Morpho 扩展接口，可连接微控制器的所有周边外设。 + +开发板外观如下图所示： + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32G431RB，主频 170MHz，128KB FLASH ，32KB RAM +- 常用外设 + - LED：1个，LD2（黄色，PA5） +- 常用接口：USB 转串口 +- 调试接口，标准 ST-LINK/SWD + +开发板更多详细信息请参考【NUCLEO-G431RB】 [开发板介绍](https://www.st.com/zh/evaluation-tools/nucleo-g431rb.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| USB 转串口 | 支持 | | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | | +| UART | 支持 | LPUART1 USART1/3 UART4 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，通过数据线对开发板供电,下载,调试。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 ST-LINK 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，黄色的 LD2 以 500MS 周期闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.2 build Oct 5 2019 + 2006 - 2019 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 LPUART1 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 默认终端输出设备是 LPUART1 + +## 联系人信息 + +维护人: + +- [xuzhuoyi](https://github.com/xuzhuoyi), 邮箱： \ No newline at end of file diff --git a/bsp/stm32/stm32h743-st-nucleo/README.md b/bsp/stm32/stm32h743-st-nucleo/README.md index 68ce1a722e..ee2ffa2135 100644 --- a/bsp/stm32/stm32h743-st-nucleo/README.md +++ b/bsp/stm32/stm32h743-st-nucleo/README.md @@ -1,109 +1,115 @@ -# STM32H743-st-nucleo 开发板 BSP 说明 +# STM32H743-Nucleo BSP Introduction -## 简介 +[中文](README_zh.md) -本文档为 tyustli 为 STM32H743-st-nucleo 开发板提供的 BSP (板级支持包) 说明。 +## MCU: STM32H743ZI @480MHz, 2MB FLASH, 1MB RAM -主要内容如下： +STM32H742xI/G and STM32H743xI/G devices are based on the high-performance Arm® Cortex®-M7 32-bit RISC core operating at up to 480 MHz. The Cortex® -M7 core features a floating point unit (FPU) which supports Arm® double-precision (IEEE 754 compliant) and single-precision data-processing instructions and data types. STM32H742xI/G and STM32H743xI/G devices support a full set of DSP instructions and a memory protection unit (MPU) to enhance application security. -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 +STM32H742xI/G and STM32H743xI/G devices incorporate high-speed embedded memories with a dual-bank Flash memory of up to 2 Mbytes, up to 1 Mbyte of RAM (including 192 Kbytes of TCM RAM, up to 864 Kbytes of user SRAM and 4 Kbytes of backup SRAM), as well as an extensive range of enhanced I/Os and peripherals connected to APB buses, AHB buses, 2x32-bit multi-AHB bus matrix and a multi layer AXI interconnect supporting internal and external memory access. -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 +#### KEY FEATURES -## 开发板介绍 +- Core + - 32-bit Arm® Cortex®-M7 core with double-precision FPU and L1 cache: 16 Kbytes of data and 16 Kbytes of instruction cache; frequency up to 480 MHz, MPU, 1027 DMIPS/ 2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions +- Memories + - Up to 2 Mbytes of Flash memory with read-while-write support + - Up to 1 Mbyte of RAM: 192 Kbytes of TCM RAM (inc. 64 Kbytes of ITCM RAM + 128 Kbytes of DTCM RAM for time critical routines), Up to 864 Kbytes of user SRAM, and 4 Kbytes of SRAM in Backup domain + - Dual mode Quad-SPI memory interface running up to 133 MHz + - Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND Flash memory clocked up to 100 MHz in Synchronous mode + - CRC calculation unit +- Security + - ROP, PC-ROP, active tamper +- General-purpose input/outputs + - Up to 168 I/O ports with interrupt capability +- Reset and power management + - 3 separate power domains which can be independently clock-gated or switched off: + - D1: high-performance capabilities + - D2: communication peripherals and timers + - D3: reset/clock control/power management + - 1.62 to 3.6 V application supply and I/Os + - POR, PDR, PVD and BOR + - Dedicated USB power embedding a 3.3 V internal regulator to supply the internal PHYs + - Embedded regulator (LDO) with configurable scalable output to supply the digital circuitry + - Voltage scaling in Run and Stop mode (6 configurable ranges) + - Backup regulator (~0.9 V) + - Voltage reference for analog peripheral/VREF+ + - Low-power modes: Sleep, Stop, Standby and VBAT supporting battery charging +- Low-power consumption + - VBAT battery operating mode with charging capability + - CPU and domain power state monitoring pins + - 2.95 μA in Standby mode (Backup SRAM OFF, RTC/LSE ON) +- Clock management + - Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI + - External oscillators: 4-48 MHz HSE, 32.768 kHz LSE + - 3× PLLs (1 for the system clock, 2 for kernel clocks) with Fractional mode +- Interconnect matrix -STM32H743 是 ST 推出的一款基于 ARM Cortex-M7 内核的开发板，最高主频为 400Mhz，该开发板具有丰富的板载资源，可以充分发挥 STM32H743 的芯片性能。 - -开发板外观如下图所示： - -![board](figures/board.jpg) - -该开发板常用 **板载资源** 如下： - -- MCU：STM32H743，主频 400MHz，2MB FLASH ，1MB RAM -- 常用接口：USB 转串口、以太网接口、arduino 接口等 -- 调试接口，标准 JTAG/SWD - -开发板更多详细信息请参考 ST [STM32H743](https://www.st.com/en/evaluation-tools/nucleo-h743zi.html)。 - -## 外设支持 - -本 BSP 目前对外设的支持情况如下： - -| **板载外设** | **支持情况** | **备注** | -| :----------------- | :----------: | :------------------------------------- | -| USB 转串口 | 支持 | -| **片上外设** | **支持情况** | **备注** | -| GPIO | 支持 | | -| UART | 支持 | UART3 | +- 4 DMA controllers to unload the CPU + - 1× high-speed master direct memory access controller (MDMA) with linked list support + - 2× dual-port DMAs with FIFO + - 1× basic DMA with request router capabilities +- Up to 35 communication peripherals + - 4× I2Cs FM+ interfaces (SMBus/PMBus) + - 4× USARTs/4x UARTs (ISO7816 interface, LIN, IrDA, up to 12.5 Mbit/s) and 1x LPUART + - 6× SPIs, 3 with muxed duplex I2S audio class accuracy via internal audio PLL or external clock, 1x I2S in LP domain (up to 150 MHz) + - 4x SAIs (serial audio interface) + - SPDIFRX interface + - SWPMI single-wire protocol master I/F + - MDIO Slave interface + - 2× SD/SDIO/MMC interfaces (up to 125 MHz) + - 2× CAN controllers: 2 with CAN FD, 1 with time-triggered CAN (TT-CAN) + - 2× USB OTG interfaces (1FS, 1HS/FS) crystal-less solution with LPM and BCD + - Ethernet MAC interface with DMA controller + - HDMI-CEC + - 8- to 14-bit camera interface (up to 80 MHz) +- 11 analog peripherals + - 3× ADCs with 16-bit max. resolution (up to 36 channels, up to 3.6 MSPS) + - 1× temperature sensor + - 2× 12-bit D/A converters (1 MHz) + - 2× ultra-low-power comparators + - 2× operational amplifiers (7.3 MHz bandwidth) + - 1× digital filters for sigma delta modulator (DFSDM) with 8 channels/4 filters +- Graphics + - LCD-TFT controller up to XGA resolution + - Chrom-ART graphical hardware Accelerator™ (DMA2D) to reduce CPU load + - Hardware JPEG Codec +- Up to 22 timers and watchdogs + - 1× high-resolution timer (2.1 ns max resolution) + - 2× 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input (up to 240 MHz) + - 2× 16-bit advanced motor control timers (up to 240 MHz) + - 10× 16-bit general-purpose timers (up to 240 MHz) + - 5× 16-bit low-power timers (up to 240 MHz) + - 2× watchdogs (independent and window) + - 1× SysTick timer + - RTC with sub-second accuracy and hardware calendar +- Debug mode + - SWD & JTAG interfaces + - 4-Kbyte Embedded Trace Buffer +- True random number generators (3 oscillators each) +- 96-bit unique ID -## 使用说明 -使用说明分为如下两个章节： +## Read more -- 快速上手 - - 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 - -- 进阶使用 - - 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-144_BSP_Introduction](../docs/STM32_Nucleo-144_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-144 boards (**Must-Read**) | +| [STM32H743ZI ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32h743zi.html#documentation) | STM32H743ZI datasheet and other resources | -### 快速上手 -本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 +## Maintained By -#### 硬件连接 +[tyustli](https://github.com/tyustli) -使用数据线连接开发板到 PC，打开电源开关。 -#### 编译下载 -双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 +## Translated By -> 工程默认配置使用 ST_LINK 仿真器下载程序，在通过 ST_LINK 连接开发板的基础上，点击下载按钮即可下载程序到开发板 +Meco Man @ RT-Thread Community -#### 运行结果 - -下载程序成功之后，系统会自动运行，LED闪烁。 - -连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: - -```bash - \ | / -- RT - Thread Operating System - / | \ 4.0.1 build Mar 5 2019 - 2006 - 2019 Copyright by rt-thread team -msh > -``` -### 进阶使用 - -此 BSP 默认只开启了 GPIO 和 串口3 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： - -1. 在 bsp 下打开 env 工具。 - -2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 - -3. 输入`pkgs --update`命令更新软件包。 - -4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 - -本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 - -## 注意事项 - -- 调试串口为串口3 映射说明 - - PD8 ------> USART3_TX - - PD9 ------> USART3_RX - -## 联系人信息 - -维护人: - -- [tyustli](https://github.com/tyustli) \ No newline at end of file +> jiantingman@foxmail.com +> +> https://github.com/mysterywolf \ No newline at end of file diff --git a/bsp/stm32/stm32h743-st-nucleo/README_zh.md b/bsp/stm32/stm32h743-st-nucleo/README_zh.md new file mode 100644 index 0000000000..68ce1a722e --- /dev/null +++ b/bsp/stm32/stm32h743-st-nucleo/README_zh.md @@ -0,0 +1,109 @@ +# STM32H743-st-nucleo 开发板 BSP 说明 + +## 简介 + +本文档为 tyustli 为 STM32H743-st-nucleo 开发板提供的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +STM32H743 是 ST 推出的一款基于 ARM Cortex-M7 内核的开发板，最高主频为 400Mhz，该开发板具有丰富的板载资源，可以充分发挥 STM32H743 的芯片性能。 + +开发板外观如下图所示： + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32H743，主频 400MHz，2MB FLASH ，1MB RAM +- 常用接口：USB 转串口、以太网接口、arduino 接口等 +- 调试接口，标准 JTAG/SWD + +开发板更多详细信息请参考 ST [STM32H743](https://www.st.com/en/evaluation-tools/nucleo-h743zi.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| USB 转串口 | 支持 | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | | +| UART | 支持 | UART3 | + + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 ST_LINK 仿真器下载程序，在通过 ST_LINK 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，LED闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.1 build Mar 5 2019 + 2006 - 2019 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口3 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 调试串口为串口3 映射说明 + + PD8 ------> USART3_TX + + PD9 ------> USART3_RX + +## 联系人信息 + +维护人: + +- [tyustli](https://github.com/tyustli) \ No newline at end of file diff --git a/bsp/stm32/stm32l010-st-nucleo/README.md b/bsp/stm32/stm32l010-st-nucleo/README.md index c69bbe14fa..aee1a5879b 100644 --- a/bsp/stm32/stm32l010-st-nucleo/README.md +++ b/bsp/stm32/stm32l010-st-nucleo/README.md @@ -1,120 +1,77 @@ +# STM32L010-Nucleo BSP Introduction -# NUCLEO-L010RB 开发板 BSP 说明 +[中文](README_zh.md) -## 简介 +## MCU: STM32L010RB @32MHz, 128KB FLASH, 20KB RAM -本文档为ST官方 NUCLEO-L010RB 开发板的 BSP (板级支持包) 说明。 +#### KEY FEATURES -主要内容如下： +- Ultra-low-power platform + - 1.8 V to 3.6 V power supply + - –40 to 85 °C temperature range + - 0.29 µA Standby mode (2 wakeup pins) + - 0.43 µA Stop mode (16 wakeup lines) + - 0.86 µA Stop mode + RTC + 20-Kbyte RAM retention + - Down to 93 µA/MHz in Run mode + - 5 µs wakeup time (from Flash memory) + - 41 µA 12-bit ADC conversion at 10 ksps +- Core: Arm® 32-bit Cortex®-M0+ + - From 32 kHz to 32 MHz + - 0.95 DMIPS/MHz +- Reset and supply management + - Ultra-low-power BOR (brownout reset) with 5 selectable thresholds + - Ultra-low-power POR/PDR +- Clock sources + - 0 to 32 MHz external clock + - 32 kHz oscillator for RTC with calibration + - High-speed internal 16 MHz factory-trimmed RC (±1%) + - Internal low-power 37 kHz RC + - Internal multispeed low-power 65 kHz to 4.2 MHz RC + - PLL for CPU clock +- Pre-programmed bootloader + - USART, I2C, SPI supported +- Development support + - Serial wire debug supported +- 51 fast I/Os (45 I/Os 5-Volt tolerant) +- Memories + - 128-Kbyte Flash memory + - 20-Kbyte RAM + - 512 bytes of data EEPROM + - 20-byte backup register + - Sector protection against R/W operation +- Analog peripherals + - 12-bit ADC 1.14 Msps up to 16 channels (down to 1.8 V) -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 - -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 - -## 开发板介绍 - -NUCLEO-L010RB 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 内核的开发板，绿色的 Nucleo 标志显示了这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，该开发板具有丰富的扩展接口，且与Arduino™ nano 接口兼容，可以方便验证 STM32L010RB 芯片的性能。 - -开发板外观如下图所示： - -![board](figures/board.jpg) - -该开发板常用 **板载资源** 如下： - -- MCU：STM32L010RB - - 主频 32MHz - - 128KB FLASH - - 20KB RAM - - 512 byte EEPROM -- 常用外设 - - LED：3个，USB communication(LD1 双色)，power LED(LD3 红色)，user LED(LD2 黄色) - - 按键：1个，B1（兼具唤醒功能，PC13），B2（RESET） -- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口；arduino 接口等 -- 调试接口：标准 SWD - -开发板更多详细信息请参考[STMicroelectronics NUCLEO-L010RB](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-l010rb.html#overview)。 - -## 外设支持 - -本 BSP 目前对外设的支持情况如下： - -| **板载外设** | **支持情况** | **备注** | -| :----------------- | :----------: | :------------------------------------- | -| 板载 ST-LINK 转串口 | 支持 | | -| **片上外设** | **支持情况** | **备注** | -| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | -| UART | 支持 | UART2 | -| SPI | 暂不支持 | | -| I2C | 暂不支持 | | -| RTC | 暂不支持 | | -| PWM | 暂不支持 | | -| USB Device | 暂不支持 | | -| IWG | 暂不支持 | | -| **扩展模块** | **支持情况** | **备注** | - -## 使用说明 - -使用说明分为如下两个章节： - -- 快速上手 - - 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 - -- 进阶使用 - - 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 +- 7-channel DMA controller, supporting ADC, SPI, I2C, USART and timers +- 4x peripherals communication interface +- 1x USART (ISO7816), 1x LPUART (low power) +- 1x SPI 16 Mbit/s +- 1x I2C (SMBus/PMBus) +- 8x timers: 1x 16-bit with up to 4 channels, 2x 16-bit with up to 2 channels, 1x 16-bit ultra-low-power timer, 1x SysTick, 1x RTC and 2x watchdogs (independent/window) +- CRC calculation unit, 96-bit unique ID +- LFQFP64 package is ECOPACK2 compliant -### 快速上手 -本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 +## Read more -#### 硬件连接 +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) | +| [STM32L010RB ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32l010rb.html#documentation) | STM32L010RB datasheet and other resources | -使用数据线连接开发板到 PC，打开电源开关。 -#### 编译下载 -双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 +## Maintained By -> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 microUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + [xph](https://github.com/xupenghu), -#### 运行结果 -下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LED1 和 LED3 常亮、黄色 LED2 会周期性闪烁。 -USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: +## Translated By -```bash - \ | / -- RT - Thread Operating System - / | \ 4.0.3 build Apr 9 2020 - 2006 - 2020 Copyright by rt-thread team -msh > +Meco Man @ RT-Thread Community -``` -### 进阶使用 - -此 BSP 默认只开启了 GPIO 和 串口 2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： - -1. 在 bsp 下打开 env 工具。 - -2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 - -3. 输入`pkgs --update`命令更新软件包。 - -4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 - -本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 - -## 注意事项 - -- 开机时如果不能打印 RT-Thread 版本信息，请将BSP中串口 GPIO 速率调低 -- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号 - -## 联系人信息 - -- 维护人: [xph](https://github.com/xupenghu) -- 邮箱： +> jiantingman@foxmail.com +> +> https://github.com/mysterywolf \ No newline at end of file diff --git a/bsp/stm32/stm32l010-st-nucleo/README_zh.md b/bsp/stm32/stm32l010-st-nucleo/README_zh.md new file mode 100644 index 0000000000..c69bbe14fa --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/README_zh.md @@ -0,0 +1,120 @@ + +# NUCLEO-L010RB 开发板 BSP 说明 + +## 简介 + +本文档为ST官方 NUCLEO-L010RB 开发板的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +NUCLEO-L010RB 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 内核的开发板，绿色的 Nucleo 标志显示了这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，该开发板具有丰富的扩展接口，且与Arduino™ nano 接口兼容，可以方便验证 STM32L010RB 芯片的性能。 + +开发板外观如下图所示： + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32L010RB + - 主频 32MHz + - 128KB FLASH + - 20KB RAM + - 512 byte EEPROM +- 常用外设 + - LED：3个，USB communication(LD1 双色)，power LED(LD3 红色)，user LED(LD2 黄色) + - 按键：1个，B1（兼具唤醒功能，PC13），B2（RESET） +- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口；arduino 接口等 +- 调试接口：标准 SWD + +开发板更多详细信息请参考[STMicroelectronics NUCLEO-L010RB](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-l010rb.html#overview)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| 板载 ST-LINK 转串口 | 支持 | | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | +| UART | 支持 | UART2 | +| SPI | 暂不支持 | | +| I2C | 暂不支持 | | +| RTC | 暂不支持 | | +| PWM | 暂不支持 | | +| USB Device | 暂不支持 | | +| IWG | 暂不支持 | | +| **扩展模块** | **支持情况** | **备注** | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 microUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LED1 和 LED3 常亮、黄色 LED2 会周期性闪烁。 + +USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.3 build Apr 9 2020 + 2006 - 2020 Copyright by rt-thread team +msh > + +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口 2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 开机时如果不能打印 RT-Thread 版本信息，请将BSP中串口 GPIO 速率调低 +- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号 + +## 联系人信息 + +- 维护人: [xph](https://github.com/xupenghu) +- 邮箱： diff --git a/bsp/stm32/stm32l053-st-nucleo/README.md b/bsp/stm32/stm32l053-st-nucleo/README.md index 35799d2715..424ec19c46 100644 --- a/bsp/stm32/stm32l053-st-nucleo/README.md +++ b/bsp/stm32/stm32l053-st-nucleo/README.md @@ -1,115 +1,96 @@ -# NUCLEO-L053R8 开发板 BSP 说明 +# STM32L053-Nucleo BSP Introduction -## 简介 +[中文](README_zh.md) -本文档为ST官方 NUCLEO-L053R8 开发板的 BSP (板级支持包) 说明。 +## MCU: STM32L053R8 @32MHz, 64KB FLASH, 8KB RAM -主要内容如下： +The ultra-low-power STM32L053x6/8 microcontrollers incorporate the connectivity power of the universal serial bus (USB 2.0 crystal-less) with the high-performance Arm® Cortex®-M0+ 32-bit RISC core operating at a 32 MHz frequency, a memory protection unit (MPU), high-speed embedded memories (up to 64 Kbytes of Flash program memory, 2 Kbytes of data EEPROM and 8 Kbytes of RAM) plus an extensive range of enhanced I/Os and peripherals. -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 +The STM32L053x6/8 devices provide high power efficiency for a wide range of performance. It is achieved with a large choice of internal and external clock sources, an internal voltage adaptation and several low-power modes. +The STM32L053x6/8 devices offer several analog features, one 12-bit ADC with hardware oversampling, one DAC, two ultra-low-power comparators, several timers, one low-power timer (LPTIM), three general-purpose 16-bit timers and one basic timer, one RTC and one SysTick which can be used as timebases. They also feature two watchdogs, one watchdog with independent clock and window capability and one window watchdog based on bus clock. +Moreover, the STM32L053x6/8 devices embed standard and advanced communication interfaces: up to two I2C, two SPIs, one I2S, two USARTs, a low-power UART (LPUART), and a crystal-less USB. The devices offer up to 24 capacitive sensing channels to simply add touch sensing functionality to any application. +The STM32L053x6/8 also include a real-time clock and a set of backup registers that remain powered in Standby mode. +Finally, their integrated LCD controller has a built-in LCD voltage generator that allows to drive up to 8 multiplexed LCDs with contrast independent of the supply voltage. +The ultra-low-power STM32L053x6/8 devices operate from a 1.8 to 3.6 V power supply (down to 1.65 V at power down) with BOR and from a 1.65 to 3.6 V power supply without BOR option. They are available in the -40 to +125 °C temperature range. A comprehensive set of power-saving modes allows the design of low-power applications. -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 +#### KEY FEATURES -## 开发板介绍 +- Ultra-low-power platform + - 1.65 V to 3.6 V power supply + - -40 to 125 °C temperature range + - 0.27 μA Standby mode (2 wakeup pins) + - 0.4 μA Stop mode (16 wakeup lines) + - 0.8 μA Stop mode + RTC + 8 KB RAM retention + - 88 μA/MHz in Run mode + - 3.5 μs wakeup time (from RAM) + - 5 μs wakeup time (from Flash memory) +- Core: Arm® 32-bit Cortex®-M0+ with MPU + - From 32 kHz up to 32 MHz max. + - 0.95 DMIPS/MHz +- Memories + - Up to 64 KB Flash memory with ECC + - 8KB RAM + - 2 KB of data EEPROM with ECC + - 20-byte backup register + - Sector protection against R/W operation +- Up to 51 fast I/Os (45 I/Os 5V tolerant) +- Reset and supply management + - Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds + - Ultra-low-power POR/PDR + - Programmable voltage detector (PVD) +- Clock sources + - 1 to 25 MHz crystal oscillator + - 32 kHz oscillator for RTC with calibration + - High speed internal 16 MHz factory-trimmed RC (+/- 1%) + - Internal low-power 37 kHz RC + - Internal multispeed low-power 65 kHz to 4.2 MHz RC + - PLL for CPU clock +- Pre-programmed bootloader + - USART, SPI supported +- Development support + - Serial wire debug supported +- LCD driver for up to 8×28segments + - Support contrast adjustment + - Support blinking mode + - Step-up converted on board -NUCLEO-L053R8 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 内核的开发板，绿色的 Nucleo 标志显示了这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，该开发板具有丰富的扩展接口，且与Arduino™ nano 接口兼容，可以方便验证 STM32L053R8 芯片的性能。 - -开发板外观如下图所示： - -![board](figures/board.jpg) - -该开发板常用 **板载资源** 如下： - -- MCU：STM32L053R8，主频 32MHz，64KB FLASH ，8KB RAM -- 常用外设 - - LED：3个，USB communication(LD1 双色),power LED(LD3 红色),user LED(LD2 黄色) - - 按键：1个，B1（兼具唤醒功能，PC13），B2（RESET） -- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口；arduino 接口等 -- 调试接口：标准 SWD - -开发板更多详细信息请参考【STMicroelectronics】 [NUCLEO-L053R8](https://www.st.com/en/evaluation-tools/nucleo-l053r8.html)。 - -## 外设支持 - -本 BSP 目前对外设的支持情况如下： - -| **板载外设** | **支持情况** | **备注** | -| :----------------- | :----------: | :------------------------------------- | -| 板载 ST-LINK 转串口 | 支持 | | -| **片上外设** | **支持情况** | **备注** | -| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | -| UART | 支持 | UART2 | -| SPI | 暂不支持 | SPI1 即将支持 | -| I2C | 暂不支持 | 软件 I2C 即将支持 | -| RTC | 暂不支持 | 即将支持 | -| PWM | 暂不支持 | 即将支持 | -| USB Device | 暂不支持 | 即将支持 | -| IWG | 暂不支持 | 即将支持 | -| **扩展模块** | **支持情况** | **备注** | - -## 使用说明 - -使用说明分为如下两个章节： - -- 快速上手 - - 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 - -- 进阶使用 - - 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 +- Rich Analog peripherals + - 12-bit ADC 1.14 Msps up to 16 channels (down to 1.65 V) + - 12-bit 1 channel DAC with output buffers (down to 1.8 V) + - 2x ultra-low-power comparators (window mode and wake up capability, down to 1.65 V) +- Up to 24 capacitive sensing channels supporting touchkey, linear and rotary touch sensors +- 7-channel DMA controller, supporting ADC, SPI, I2C, USART, DAC, Timers +- 8x peripheral communication interfaces + - 1x USB 2.0 crystal-less, battery charging detection and LPM + - 2x USART (ISO 7816, IrDA), 1x UART (low power) + - Up to 4x SPI 16 Mbits/s + - 2x I2C (SMBus/PMBus) +- 9x timers: 1x 16-bit with up to 4 channels, 2x 16-bit with up to 2 channels, 1x 16-bit ultra-low-power timer, 1x SysTick, 1x RTC, 1x 16-bit basic for DAC, and 2x watchdogs (independent/window) +- CRC calculation unit, 96-bit unique ID +- True RNG and firewall protection +- All packages are ECOPACK®2 -### 快速上手 -本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 +## Read more -#### 硬件连接 +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) | +| [STM32L053R8 ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32l053r8.html#documentation) | STM32L053R8 datasheet and other resources | -使用数据线连接开发板到 PC，打开电源开关。 -#### 编译下载 -双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 +## Maintained By -> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 microUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + [sun_shine](https://github.com/xupenghu), -#### 运行结果 -下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD1 和 LD3 常亮、黄色 LD2 会周期性闪烁。 -USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: +## Translated By -```bash - \ | / -- RT - Thread Operating System - / | \ 4.0.0 build Jan 9 2019 - 2006 - 2018 Copyright by rt-thread team -msh > -``` -### 进阶使用 +Meco Man @ RT-Thread Community -此 BSP 默认只开启了 GPIO 和 串口 2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： - -1. 在 bsp 下打开 env 工具。 - -2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 - -3. 输入`pkgs --update`命令更新软件包。 - -4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 - -本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 - -## 注意事项 - -- 开机时如果不能打印 RT-Thread 版本信息，请将BSP中串口 GPIO 速率调低 -- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号 - -## 联系人信息 - -维护人: - -- [sun_shine](https://github.com/sunshine0824), 邮箱： +> jiantingman@foxmail.com +> +> https://github.com/mysterywolf \ No newline at end of file diff --git a/bsp/stm32/stm32l053-st-nucleo/README_zh.md b/bsp/stm32/stm32l053-st-nucleo/README_zh.md new file mode 100644 index 0000000000..35799d2715 --- /dev/null +++ b/bsp/stm32/stm32l053-st-nucleo/README_zh.md @@ -0,0 +1,115 @@ +# NUCLEO-L053R8 开发板 BSP 说明 + +## 简介 + +本文档为ST官方 NUCLEO-L053R8 开发板的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +NUCLEO-L053R8 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 内核的开发板，绿色的 Nucleo 标志显示了这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，该开发板具有丰富的扩展接口，且与Arduino™ nano 接口兼容，可以方便验证 STM32L053R8 芯片的性能。 + +开发板外观如下图所示： + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32L053R8，主频 32MHz，64KB FLASH ，8KB RAM +- 常用外设 + - LED：3个，USB communication(LD1 双色),power LED(LD3 红色),user LED(LD2 黄色) + - 按键：1个，B1（兼具唤醒功能，PC13），B2（RESET） +- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口；arduino 接口等 +- 调试接口：标准 SWD + +开发板更多详细信息请参考【STMicroelectronics】 [NUCLEO-L053R8](https://www.st.com/en/evaluation-tools/nucleo-l053r8.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| 板载 ST-LINK 转串口 | 支持 | | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | +| UART | 支持 | UART2 | +| SPI | 暂不支持 | SPI1 即将支持 | +| I2C | 暂不支持 | 软件 I2C 即将支持 | +| RTC | 暂不支持 | 即将支持 | +| PWM | 暂不支持 | 即将支持 | +| USB Device | 暂不支持 | 即将支持 | +| IWG | 暂不支持 | 即将支持 | +| **扩展模块** | **支持情况** | **备注** | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 microUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD1 和 LD3 常亮、黄色 LD2 会周期性闪烁。 + +USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.0 build Jan 9 2019 + 2006 - 2018 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口 2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 开机时如果不能打印 RT-Thread 版本信息，请将BSP中串口 GPIO 速率调低 +- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号 + +## 联系人信息 + +维护人: + +- [sun_shine](https://github.com/sunshine0824), 邮箱： diff --git a/bsp/stm32/stm32l412-st-nucleo/README.md b/bsp/stm32/stm32l412-st-nucleo/README.md index ce4af7d1f8..1bff7ef7a4 100644 --- a/bsp/stm32/stm32l412-st-nucleo/README.md +++ b/bsp/stm32/stm32l412-st-nucleo/README.md @@ -1,116 +1,99 @@ -# NUCLEO32-L412 开发板 BSP 说明 +# STM32L412-Nucleo BSP Introduction -## 简介 +[中文](README_zh.md) -本文档为ST官方 NUCLEO32-L412 开发板的 BSP (板级支持包) 说明。 +## MCU: STM32L412RB @80MHz, 128KB FLASH, 40KB RAM -主要内容如下： +The STM32L412xx devices are ultra-low-power microcontrollers based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 80 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision that supports all Arm® single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security. -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 +The STM32L412xx devices embed high-speed memories (Flash memory up to 128 Kbyte,40 Kbyte of SRAM), a Quad SPI Flash memories interface (available on all packages) and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix. +The STM32L412xx devices embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, proprietary code readout protection and Firewall. +The devices offer two fast 12-bit ADC (5 Msps), two comparators, one operational amplifier, a low-power RTC, one general-purpose 32-bit timer, one 16-bit PWM timer dedicated to motor control, four general-purpose 16-bit timers, and two 16-bit low-power timers. +In addition, up to 12 capacitive sensing channels are available. +They also feature standard and advanced communication interfaces, namely three I2Cs, two SPIs, three USARTs and one Low-Power UART, one USB full-speed device crystal less. +The STM32L412xx operates in the -40 to +85 °C (+105 °C junction) and -40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V VDD power supply when using internal LDO regulator and a 1.00 to 1.32V VDD12 power supply when using external SMPS supply. A comprehensive set of power-saving modes makes possible the design of low-power applications. +Some independent power supplies are supported: analog independent supply input for ADC, OPAMP and comparator. A VBAT input makes it possible to backup the RTC and backup registers. Dedicated VDD12 power supplies can be used to bypass the internal LDO regulator when connected to an external SMPS. +The STM32L412xx family offers six packages from 32 to 64-pin packages. -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 +#### KEY FEATURES -## 开发板介绍 +- Ultra-low-power with FlexPowerControl + - 1.71 V to 3.6 V power supply + - -40 °C to 85/125 °C temperature range + - 300 nA in VBAT mode: supply for RTC and 32x32-bit backup registers + - 16 nA Shutdown mode (4 wakeup pins) + - 32 nA Standby mode (4 wakeup pins) + - 245 nA Standby mode with RTC + - 0.7 µA Stop 2 mode, 0.95 µA with RTC + - 79 µA/MHz run mode (LDO Mode) + - 28 μA/MHz run mode (@3.3 V SMPS Mode) + - Batch acquisition mode (BAM) + - 4 µs wakeup from Stop mode + - Brown out reset (BOR) + - Interconnect matrix +- Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait-state execution from Flash memory, frequency up to 80 MHz, MPU, 100DMIPS and DSP instructions +- Performance benchmark + - 1.25 DMIPS/MHz (Drystone 2.1) + - 273.55 CoreMark® (3.42 CoreMark/MHz @ 80 MHz) +- Energy benchmark + - 442 ULPMark-CP® + - 165 ULPMark-PP® +- Clock Sources + - 4 to 48 MHz crystal oscillator + - 32 kHz crystal oscillator for RTC (LSE) + - Internal 16 MHz factory-trimmed RC (±1%) + - Internal low-power 32 kHz RC (±5%) + - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy) + - Internal 48 MHz with clock recovery + - PLL for system clock +- Up to 52 fast I/Os, most 5 V-tolerant +- RTC with HW calendar, alarms and calibration +- Up to 12 capacitive sensing channels: support touchkey, linear and rotary touch sensors +- 10x timers: 1x 16-bit advanced motor-control, 1x 32-bit and 2x 16-bit general purpose, 1x 16-bit basic, 2x low-power 16-bit timers (available in Stop mode), 2x watchdogs, SysTick timer -对于 NUCLEO32-L412，内核是 Cortex-M4，绿色的 Nucleo 标志显示了这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，迷你尺寸，mirco USB 接口，可数的外设，Arduino™ nano 兼容的接口。 - -开发板外观如下图所示： - -![board](figures/board.jpg) - -该开发板常用 **板载资源** 如下： - -- MCU：STM32L412RBT6P，主频 80MHz，128KB FLASH ，40KB RAM。 -- 常用外设 - - LED：4个，LD1（COM 双色），LD2（5V_USB 红色），LD3（5V_PWR 绿色），LD4（USER 绿色） - - 按键：2个，用户按键（B1），复位按键（B2） -- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口。 -- 调试接口：板载 ST-LINK/V2-1 调试器。 - -开发板更多详细信息请参考【STMicroelectronics】 [NUCLEO-L412RB-P](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-l412rb-p.html)。 - -## 外设支持 - -本 BSP 目前对外设的支持情况如下： - -| **板载外设** | **支持情况** | **备注** | -| :----------------- | :----------: | :------------------------------------- | -| 板载 ST-LINK 转串口 | 支持 | UART2 | -| **片上外设** | **支持情况** | **备注** | -| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | -| UART | 支持 | UART2 | -| SPI | 暂不支持 | SPI1 即将支持 | -| I2C | 暂不支持 | 软件 I2C 即将支持 | -| RTC | 支持 | 支持外部晶振和内部低速时钟 | -| PWM | 暂不支持 | 即将支持 | -| USB Device | 暂不支持 | 即将支持 | -| IWG | 支持 | 独立看门狗，未开启窗口模式 | -| **扩展模块** | **支持情况** | **备注** | +- Memories + - 128 KB single bank Flash, proprietary code readout protection + - 40 KB of SRAM including 8 KB with hardware parity check + - Quad SPI memory interface with XIP capability +- Rich analog peripherals (independent supply) + - 2x 12-bit ADC 5 Msps, up to 16-bit with hardware oversampling, 200 µA/Msps + - 2x operational amplifiers with built-in PGA + - 1x ultra-low-power comparator + - Accurate 2.5 V or 2.048 V reference voltage buffered output +- 12x communication interfaces + - USB 2.0 full-speed crystal less solution with LPM and BCD + - 3x I2C FM+(1 Mbit/s), SMBus/PMBus + - 3x USARTs (ISO 7816, LIN, IrDA, modem) + - 1x LPUART (Stop 2 wake-up) + - 2x SPIs (and 1x Quad SPI) + - IRTIM (Infrared interface) +- 14-channel DMA controller +- True random number generator +- CRC calculation unit, 96-bit unique ID +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™ +- All packages are ECOPACK2 compliant -## 使用说明 -使用说明分为如下两个章节： +## Read more -- 快速上手 - - 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 - -- 进阶使用 - - 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) | +| [STM32L412RB ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32l412rb.html#documentation) | STM32L412RB datasheet and other resources | -### 快速上手 -本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 +## Maintained By -#### 硬件连接 +[luhuadong](https://github.com/luhuadong), luhuadong@163.com -使用数据线连接开发板到 PC，打开电源开关。 -#### 编译下载 -双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 +## Translated By -> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 microUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 +Meco Man @ RT-Thread Community -#### 运行结果 - -下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD1 和 LD2 常亮、黄色色 LD3 会周期性闪烁。 - -USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: - -```bash - \ | / -- RT - Thread Operating System - / | \ 4.0.3 build Apr 24 2020 - 2006 - 2020 Copyright by rt-thread team -msh > -``` -### 进阶使用 - -此 BSP 默认只开启了 GPIO 和 串口2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下： - -1. 在 bsp 下打开 env 工具。 - -2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 - -3. 输入`pkgs --update`命令更新软件包。 - -4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 - -本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 - -## 注意事项 - -- 开机时如果不能打印 RT-Thread 版本信息，请将BSP中串口 GPIO 速率调低 -- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号 - -## 联系人信息 - -维护人: - -- [luhuadong](https://github.com/luhuadong), 邮箱： \ No newline at end of file +> jiantingman@foxmail.com +> +> https://github.com/mysterywolf \ No newline at end of file diff --git a/bsp/stm32/stm32l412-st-nucleo/README_zh.md b/bsp/stm32/stm32l412-st-nucleo/README_zh.md new file mode 100644 index 0000000000..a5480bdf58 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/README_zh.md @@ -0,0 +1,116 @@ +# NUCLEO32-L412 开发板 BSP 说明 + +## 简介 + +本文档为ST官方 NUCLEO32-L412 开发板的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +对于 NUCLEO32-L412，内核是 Cortex-M4，绿色的 Nucleo 标志显示了这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，迷你尺寸，mirco USB 接口，可数的外设，Arduino™ nano 兼容的接口。 + +开发板外观如下图所示： + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32L412RB，主频 80MHz，128KB FLASH ，40KB RAM。 +- 常用外设 + - LED：4个，LD1（COM 双色），LD2（5V_USB 红色），LD3（5V_PWR 绿色），LD4（USER 绿色） + - 按键：2个，用户按键（B1），复位按键（B2） +- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口。 +- 调试接口：板载 ST-LINK/V2-1 调试器。 + +开发板更多详细信息请参考【STMicroelectronics】 [NUCLEO-L412RB-P](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-l412rb-p.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| 板载 ST-LINK 转串口 | 支持 | UART2 | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | +| UART | 支持 | UART2 | +| SPI | 暂不支持 | SPI1 即将支持 | +| I2C | 暂不支持 | 软件 I2C 即将支持 | +| RTC | 支持 | 支持外部晶振和内部低速时钟 | +| PWM | 暂不支持 | 即将支持 | +| USB Device | 暂不支持 | 即将支持 | +| IWG | 支持 | 独立看门狗，未开启窗口模式 | +| **扩展模块** | **支持情况** | **备注** | + + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 microUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD1 和 LD2 常亮、黄色色 LD3 会周期性闪烁。 + +USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.3 build Apr 24 2020 + 2006 - 2020 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 开机时如果不能打印 RT-Thread 版本信息，请将BSP中串口 GPIO 速率调低 +- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号 + +## 联系人信息 + +维护人: + +- [luhuadong](https://github.com/luhuadong), 邮箱： \ No newline at end of file diff --git a/bsp/stm32/stm32l433-st-nucleo/README.md b/bsp/stm32/stm32l433-st-nucleo/README.md index 2757522345..2c744c5d47 100644 --- a/bsp/stm32/stm32l433-st-nucleo/README.md +++ b/bsp/stm32/stm32l433-st-nucleo/README.md @@ -1,113 +1,102 @@ -# NUCLEO-L433RC-P 开发板 BSP 说明 +# STM32L433-Nucleo BSP Introduction -## 简介 +[中文](README_zh.md) -本文档为ST官方 NUCLEO-L433RC-P 开发板的 BSP (板级支持包) 说明。 +## MCU: STM32L433RC @80MHz, 256KB FLASH, 64KB RAM -主要内容如下： +The STM32L433xx devices are the ultra-low-power microcontrollers based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 80 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision which supports all Arm® single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security. -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 +The STM32L433xx devices embed high-speed memories (Flash memory up to 256 Kbyte, 64 Kbyte of SRAM), a Quad SPI flash memories interface (available on all packages) and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix. +The STM32L433xx devices embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, proprietary code readout protection and Firewall. +The devices offer a fast 12-bit ADC (5 Msps), two comparators, one operational amplifier, two DAC channels, an internal voltage reference buffer, a low-power RTC, one general-purpose 32-bit timer, one 16-bit PWM timer dedicated to motor control, four general-purpose 16-bit timers, and two 16-bit low-power timers. +In addition, up to 21 capacitive sensing channels are available. The devices also embed an integrated LCD driver 8x40 or 4x44, with internal step-up converter. +They also feature standard and advanced communication interfaces. +The STM32L433xx operates in the -40 to +85 °C (+105 °C junction), -40 to +105 °C (+125 °C junction) and -40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V VDD power supply when using internal LDO regulator and a 1.05 to 1.32V VDD12 power supply when using external SMPS supply. A comprehensive set of power-saving modes allows the design of low-power applications. +Some independent power supplies are supported: analog independent supply input for ADC, DAC, OPAMP and comparators, and 3.3 V dedicated supply input for USB. A VBAT input allows to backup the RTC and backup registers. Dedicated VDD12 power supplies can be used to bypass the internal LDO regulator when connected to an external SMPS. +The STM32L433xx family offers eight packages from 48 to 100-pin packages. -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 +#### KEY FEATURES -## 开发板介绍 +- Ultra-low-power with FlexPowerControl + - 1.71 V to 3.6 V power supply + - -40 °C to 85/105/125 °C temperature range + - 200 nA in VBAT mode: supply for RTC and 32x32-bit backup registers + - 8 nA Shutdown mode (5 wakeup pins) + - 28 nA Standby mode (5 wakeup pins) + - 280 nA Standby mode with RTC + - 1.0 μA Stop 2 mode, 1.28 μA with RTC + - 84 μA/MHz run mode (LDO Mode) + - 36 μA/MHz run mode (@3.3 V SMPS Mode) + - Batch acquisition mode (BAM) + - 4 μs wakeup from Stop mode + - Brown out reset (BOR) + - Interconnect matrix +- Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait-state execution from Flash memory, frequency up to 80 MHz, MPU, 100DMIPS and DSP instructions +- Performance benchmark + - 1.25 DMIPS/MHz (Drystone 2.1) + - 273.55 CoreMark® (3.42 CoreMark/MHz @ 80 MHz) +- Energy benchmark + - 253 ULPBench® score +- Clock Sources + - 4 to 48 MHz crystal oscillator + - 32 kHz crystal oscillator for RTC (LSE) + - Internal 16 MHz factory-trimmed RC (±1%) + - Internal low-power 32 kHz RC (±5%) + - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy) + - Internal 48 MHz with clock recovery + - 2 PLLs for system clock, USB, audio, ADC +- Up to 83 fast I/Os, most 5 V-tolerant +- RTC with HW calendar, alarms and calibration +- LCD 8× 40 or 4× 44 with step-up converter +- Up to 21 capacitive sensing channels: support touchkey, linear and rotary touch sensors -对于 NUCLEO-L433RC-P，内核是 Cortex-M4，绿色的 Nucleo 标志显示了这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，迷你尺寸，mirco USB 接口，可数的外设，Arduino™ nano 兼容的接口。 - -开发板外观如下图所示： - -![board](figures/board.jpg) - -该开发板常用 **板载资源** 如下： - -- MCU：STM32L433RC，主频 80MHz，256KB FLASH ，64KB RAM。 -- 常用外设 - - LED：4个，USB communication(LD1 双色)，USB overcurrent(LD2 红色)，power LED(LD3 绿色)，user LED(LD4 绿色) - - 按键：2 个，USER and RESET 。 -- 常用接口：USB 转串口、Arduino Uno 和 ST morpho 两类扩展接口 -- 调试接口：板载 ST-LINK/V2-1 调试器。 - -快速入门：[STM32 Nucleo板软件开发工具入门](https://www.st.com/resource/zh/user_manual/dm00105928-getting-started-with-stm32-nucleo-board-software-development-tools-stmicroelectronics.pdf) - -原理图下载：[NUCLEO-L433RC-P schematic](https://www.st.com/resource/en/schematic_pack/nucleo-l433rc-p_sch.zip) - -开发板更多详细信息请参考【STMicroelectronics】 [NUCLEO-L433RC-P](https://www.st.com/content/st_com/zh/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-l433rc-p.html)。 - -## 外设支持 - -本 BSP 目前对外设的支持情况如下： - -| **片上外设** | **支持情况** | **备注** | -| :----------------- | :----------: | :------------------------------------ | -| GPIO | 支持 | PA0, PA1... PH1 ---> PIN: 0, 1...63 | -| UART | 支持 | UART1, UART2 | -| SPI | 支持 | SPI1 | -| RTC | 支持 | 支持外部晶振和内部低速时钟 | +- 11x timers: 1x 16-bit advanced motor-control, 1x 32-bit and 2x 16-bit general purpose, 2x 16-bit basic, 2x low-power 16-bit timers (available in Stop mode), 2x watchdogs, SysTick timer +- Memories + - Up to 256 KB single bank Flash, proprietary code readout protection + - 64 KB of SRAM including 16 KB with hardware parity check + - Quad SPI memory interface +- Rich analog peripherals (independent supply) + - 1x 12-bit ADC 5 Msps, up to 16-bit with hardware oversampling, 200 μA/Msps + - 2x 12-bit DAC output channels, low-power sample and hold + - 1x operational amplifier with built-in PGA + - 2x ultra-low-power comparators +- 17x communication interfaces + - USB 2.0 full-speed crystal less solution with LPM and BCD + - 1x SAI (serial audio interface) + - 3x I2C FM+(1 Mbit/s), SMBus/PMBus + - 4x USARTs (ISO 7816, LIN, IrDA, modem) + - 1x LPUART (Stop 2 wake-up) + - 3x SPIs (and 1x Quad SPI) + - CAN (2.0B Active) and SDMMC interface + - SWPMI single wire protocol master I/F + - IRTIM (Infrared interface) +- 14-channel DMA controller +- True random number generator +- CRC calculation unit, 96-bit unique ID +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™ +- All packages are ECOPACK2® compliant -## 使用说明 -使用说明分为如下两个章节： +## Read more -- 快速上手 - - 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 - -- 进阶使用 - - 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) | +| [STM32L433RC ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32l433rc.html#documentation) | STM32L433RC datasheet and other resources | -### 快速上手 -本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 +## Maintained By -#### 硬件连接 +[Sunwancn](https://github.com/Sunwancn), -使用数据线连接开发板到 PC，打开电源开关。 -#### 编译下载 -双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 +## Translated By -> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 microUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 +Meco Man @ RT-Thread Community -#### 运行结果 - -下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD1 和 绿色 LD3 常亮、绿色 LD4 会周期性闪烁。 - -USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: - -```bash - \ | / -- RT - Thread Operating System - / | \ 4.0.0 build Jan 9 2019 - 2006 - 2018 Copyright by rt-thread team -msh > -``` -### 进阶使用 - -此 BSP 默认只开启了 GPIO 和 串口2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下： - -1. 在 bsp 下打开 env 工具。 - -2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 - -3. 输入`pkgs --update`命令更新软件包。 - -4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 - -本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 - -## 注意事项 - -- 开机时如果不能打印 RT-Thread 版本信息，请将BSP中串口 GPIO 速率调低 -- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号 - -## 联系人信息 - -维护人: - -- [Sunwancn](https://github.com/Sunwancn), 邮箱： \ No newline at end of file +> jiantingman@foxmail.com +> +> https://github.com/mysterywolf \ No newline at end of file diff --git a/bsp/stm32/stm32l433-st-nucleo/README_zh.md b/bsp/stm32/stm32l433-st-nucleo/README_zh.md new file mode 100644 index 0000000000..ce2d27823b --- /dev/null +++ b/bsp/stm32/stm32l433-st-nucleo/README_zh.md @@ -0,0 +1,113 @@ +# NUCLEO-L433RC 开发板 BSP 说明 + +## 简介 + +本文档为ST官方 NUCLEO-L433RC 开发板的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +对于 NUCLEO-L433RC，内核是 Cortex-M4，绿色的 Nucleo 标志显示了这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，迷你尺寸，mirco USB 接口，可数的外设，Arduino™ nano 兼容的接口。 + +开发板外观如下图所示： + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32L433RC，主频 80MHz，256KB FLASH ，64KB RAM。 +- 常用外设 + - LED：4个，USB communication(LD1 双色)，USB overcurrent(LD2 红色)，power LED(LD3 绿色)，user LED(LD4 绿色) + - 按键：2 个，USER and RESET 。 +- 常用接口：USB 转串口、Arduino Uno 和 ST morpho 两类扩展接口 +- 调试接口：板载 ST-LINK/V2-1 调试器。 + +快速入门：[STM32 Nucleo板软件开发工具入门](https://www.st.com/resource/zh/user_manual/dm00105928-getting-started-with-stm32-nucleo-board-software-development-tools-stmicroelectronics.pdf) + +原理图下载：[NUCLEO-L433RC-P schematic](https://www.st.com/resource/en/schematic_pack/nucleo-l433rc-p_sch.zip) + +开发板更多详细信息请参考【STMicroelectronics】 [NUCLEO-L433RC-P](https://www.st.com/content/st_com/zh/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-l433rc-p.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **片上外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------ | +| GPIO | 支持 | PA0, PA1... PH1 ---> PIN: 0, 1...63 | +| UART | 支持 | UART1, UART2 | +| SPI | 支持 | SPI1 | +| RTC | 支持 | 支持外部晶振和内部低速时钟 | + + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 microUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD1 和 绿色 LD3 常亮、绿色 LD4 会周期性闪烁。 + +USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.0 build Jan 9 2019 + 2006 - 2018 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 开机时如果不能打印 RT-Thread 版本信息，请将BSP中串口 GPIO 速率调低 +- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号 + +## 联系人信息 + +维护人: + +- [Sunwancn](https://github.com/Sunwancn), 邮箱： \ No newline at end of file diff --git a/bsp/stm32/stm32l452-st-nucleo/README.md b/bsp/stm32/stm32l452-st-nucleo/README.md index d054b12052..af8b1c625b 100644 --- a/bsp/stm32/stm32l452-st-nucleo/README.md +++ b/bsp/stm32/stm32l452-st-nucleo/README.md @@ -1,115 +1,32 @@ -# NUCLEO-L452RE BSP 说明 +# STM32L452-Nucleo BSP Introduction -## 简介 +[中文](README_zh.md) -本文档为刘恒为 NUCLEO-L452RE 开发板提供的 BSP (板级支持包) 说明。 +## MCU: STM32L452RE @80MHz, 512KB FLASH, 160KB RAM -主要内容如下： - -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 - -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 - -## 开发板介绍 - -对于 NUCLEO-L452RE，内核是 Cortex-M4，这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，迷你尺寸，MINI USB 接口，兼容 Arduino、还带有ST Zio和 ST Morpho 扩展接口，可连接微控制器的所有周边外设。 - -开发板外观如下图所示： - -![board](figures/board.jpg) - -该开发板常用 **板载资源** 如下： - -- MCU：STM32L452RE，主频 80MHz，512KB FLASH ，160KB RAM -- 常用外设 - - LED：3个，USB communication(LD1 双色),power LED(LD3 红色),user LED(LD2 绿色) - - 按键：2个，复位按键 B2，用户按键 B1。 -- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口。 -- 调试接口：板载 ST-LINK/V2-1 调试器。 - -开发板更多详细信息请参考【STMicroelectronics】 [NUCLEO-L452RE](https://www.st.com/en/evaluation-tools/nucleo-l452re.html#)。 - -## 外设支持 - -本 BSP 目前对外设的支持情况如下： - -| **板载外设** | **支持情况** | **备注** | -| :---------------: | :----------: | :-----------------------------------: | -| ST-LINK | 支持 | | -| USB 转串口 | 支持 | UART2 | -| **片上外设** | **支持情况** | **备注** | -| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | -| UART | 支持 | UART1(TX:PA9 RX:PA10)、UART2(TX:PA2 RX:PA2) | -| SPI | 支持 | SPI1 | -| I2C | 暂不支持 | | -| RTC | 暂不支持 | | -| PWM | 暂不支持 | | -| USB Device | 暂不支持 | | -| IWG | 暂不支持 | | - -## 使用说明 - -使用说明分为如下两个章节： - -- 快速上手 - - 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 - -- 进阶使用 - - 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 +https://www.st.com/resource/en/datasheet/stm32l452re.pdf -### 快速上手 -本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 +## Read more -#### 硬件连接 +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) | +| [STM32L452RE ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32l452re.html#documentation) | STM32L452RE datasheet and other resources | -使用数据线连接开发板到 PC，打开电源开关。 -#### 编译下载 -双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 +## Maintained By -> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 miniUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 +[liuheng](https://github.com/lhxzui), -#### 运行结果 -下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD3 常亮、绿色 LD2 会周期性闪烁。 -连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: +## Translated By -``` - \ | / -- RT - Thread Operating System - / | \ 4.0.2 build May 31 2019 - 2006 - 2019 Copyright by rt-thread team -msh > -``` +Meco Man @ RT-Thread Community -### 进阶使用 - -此 BSP 默认只开启了 GPIO 和 串口2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下： - -1. 在 bsp 下打开 env 工具。 - -2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 - -3. 输入`pkgs --update`命令更新软件包。 - -4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 - -本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 - -## 注意事项 - -1. MCU 片内 SRAM 有 SRAM1、SRAM2，分别是 128KB、32KB，共计 160KB，本 bsp 只使用 SRAM1 128KB. - -## 联系人信息 - -维护人: - -- [刘恒](https://github.com/lhxzui), 邮箱： \ No newline at end of file +> jiantingman@foxmail.com +> +> https://github.com/mysterywolf \ No newline at end of file diff --git a/bsp/stm32/stm32l452-st-nucleo/README_zh.md b/bsp/stm32/stm32l452-st-nucleo/README_zh.md new file mode 100644 index 0000000000..065dd2171d --- /dev/null +++ b/bsp/stm32/stm32l452-st-nucleo/README_zh.md @@ -0,0 +1,115 @@ +# NUCLEO-L452RE BSP 说明 + +## 简介 + +本文档为 NUCLEO-L452RE 开发板提供的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +对于 NUCLEO-L452RE，内核是 Cortex-M4，这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，迷你尺寸，MINI USB 接口，兼容 Arduino、还带有ST Zio和 ST Morpho 扩展接口，可连接微控制器的所有周边外设。 + +开发板外观如下图所示： + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32L452RE，主频 80MHz，512KB FLASH ，160KB RAM +- 常用外设 + - LED：3个，USB communication(LD1 双色),power LED(LD3 红色),user LED(LD2 绿色) + - 按键：2个，复位按键 B2，用户按键 B1。 +- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口。 +- 调试接口：板载 ST-LINK/V2-1 调试器。 + +开发板更多详细信息请参考【STMicroelectronics】 [NUCLEO-L452RE](https://www.st.com/en/evaluation-tools/nucleo-l452re.html#)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :---------------: | :----------: | :-----------------------------------: | +| ST-LINK | 支持 | | +| USB 转串口 | 支持 | UART2 | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | +| UART | 支持 | UART1(TX:PA9 RX:PA10)、UART2(TX:PA2 RX:PA2) | +| SPI | 支持 | SPI1 | +| I2C | 暂不支持 | | +| RTC | 暂不支持 | | +| PWM | 暂不支持 | | +| USB Device | 暂不支持 | | +| IWG | 暂不支持 | | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 miniUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD3 常亮、绿色 LD2 会周期性闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +``` + \ | / +- RT - Thread Operating System + / | \ 4.0.2 build May 31 2019 + 2006 - 2019 Copyright by rt-thread team +msh > +``` + +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +1. MCU 片内 SRAM 有 SRAM1、SRAM2，分别是 128KB、32KB，共计 160KB，本 bsp 只使用 SRAM1 128KB. + +## 联系人信息 + +维护人: + +- [刘恒](https://github.com/lhxzui), 邮箱： \ No newline at end of file diff --git a/bsp/stm32/stm32l476-st-nucleo/README.md b/bsp/stm32/stm32l476-st-nucleo/README.md index e1784c3855..90ea72296a 100644 --- a/bsp/stm32/stm32l476-st-nucleo/README.md +++ b/bsp/stm32/stm32l476-st-nucleo/README.md @@ -1,113 +1,104 @@ -# NUCLEO-L476RG 开发板的 BSP 说明 +# STM32L476-Nucleo BSP Introduction -## 简介 +[中文](README_zh.md) -本文档为 ST 官方 (64)NUCLEO-L476RG 开发板的 BSP (板级支持包) 说明。 +## MCU: STM32L476RG @80MHz, 1024KB FLASH, 128KB RAM -主要内容如下： +The STM32L476xx devices are the ultra-low-power microcontrollers based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 80 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision which supports all Arm® single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security. -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 +The STM32L476xx devices embed high-speed memories (Flash memory up to 1 Mbyte, up to 128 Kbyte of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), a Quad SPI flash memories interface (available on all packages) and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix. +The STM32L476xx devices embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, proprietary code readout protection and Firewall. +The devices offer up to three fast 12-bit ADCs (5 Msps), two comparators, two operational amplifiers, two DAC channels, an internal voltage reference buffer, a low-power RTC, two general-purpose 32-bit timer, two 16-bit PWM timers dedicated to motor control, seven general-purpose 16-bit timers, and two 16-bit low-power timers. The devices support four digital filters for external sigma delta modulators (DFSDM). +In addition, up to 24 capacitive sensing channels are available. The devices also embed an integrated LCD driver 8x40 or 4x44, with internal step-up converter. +They also feature standard and advanced communication interfaces. +The STM32L476xx operates in the -40 to +85 °C (+105 °C junction), -40 to +105 °C (+125 °C junction) and -40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V VDD power supply when using internal LDO regulator and a 1.05 to 1.32V VDD12 power supply when using external SMPS supply. A comprehensive set of power-saving modes allows the design of low-power applications. +Some independent power supplies are supported: analog independent supply input for ADC, DAC, OPAMPs and comparators, 3.3 V dedicated supply input for USB and up to 14 I/Os can be supplied independently down to 1.08V. A VBAT input allows to backup the RTC and backup registers. Dedicated VDD12 power supplies can be used to bypass the internal LDO regulator when connected to an external SMPS. +The STM32L476xx family offers six packages from 64-pin to 144-pin packages. -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 +#### KEY FEATURES -## 开发板介绍 +- Ultra-low-power with FlexPowerControl + - 1.71 V to 3.6 V power supply + - -40 °C to 85/105/125 °C temperature range + - 300 nA in VBAT mode: supply for RTC and 32x32-bit backup registers + - 30 nA Shutdown mode (5 wakeup pins) + - 120 nA Standby mode (5 wakeup pins) + - 420 nA Standby mode with RTC + - 1.1 μA Stop 2 mode, 1.4 μA with RTC + - 100 μA/MHz run mode (LDO Mode) + - 39 μA/MHz run mode (@3.3 V SMPS Mode) + - Batch acquisition mode (BAM) + - 4 μs wakeup from Stop mode + - Brown out reset (BOR) + - Interconnect matrix +- Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait-state execution from Flash memory, frequency up to 80 MHz, MPU, 100DMIPS and DSP instructions +- Performance benchmark + - 1.25 DMIPS/MHz (Drystone 2.1) + - 273.55 CoreMark® (3.42 CoreMark/MHz @ 80 MHz) +- Energy benchmark + - 294 ULPMark™ CP score + - 106 ULPMark™ PP score +- Clock Sources + - 4 to 48 MHz crystal oscillator + - 32 kHz crystal oscillator for RTC (LSE) + - Internal 16 MHz factory-trimmed RC (±1%) + - Internal low-power 32 kHz RC (±5%) + - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy) + - 3 PLLs for system clock, USB, audio, ADC +- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V +- RTC with HW calendar, alarms and calibration +- LCD 8× 40 or 4× 44 with step-up converter +- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors +- 16x timers: 2x 16-bit advanced motor-control, 2x 32-bit and 5x 16-bit general purpose, 2x 16-bit basic, 2x low-power 16-bit timers (available in Stop mode), 2x watchdogs, SysTick timer -对于 NUCLEO-L476RG，内核是 Cortex-M4，绿色的 Nucleo 标志显示了这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，迷你尺寸，mirco USB 接口，可数的外设，Arduino™ nano 兼容的接口。 - -开发板外观如下图所示： - -![board](figures/board.png) - -该开发板常用 **板载资源** 如下： - -- MCU：STM32L476RG，主频 80MHz，1024KB FLASH ，128KB RAM（96+32）。 -- 常用外设 - - LED：3个，USB communication(LD1 双色),power LED(LD3 红色),user LED(LD2 黄绿色) - - 按键：1个，复位按键(B1)。 -- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口。 -- 调试接口：板载 ST-LINK/V2-1 调试器。 - -开发板更多详细信息请参考【STMicroelectronics】 [NUCLEO-L476RG](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-l476rg.html)。 - -## 外设支持 - -本 BSP 目前对外设的支持情况如下： - -| **板载外设** | **支持情况** | **备注** | -| :----------------- | :----------: | :------------------------------------- | -| 板载 ST-LINK 转串口 | 支持 | UART2 | -| **片上外设** | **支持情况** | **备注** | -| GPIO | 支持 | | -| UART | 支持 | UART2 | -| IIC | 支持 | 软件模拟 | -| RTC | 支持 | 支持外部晶振和内部低速时钟 | -| SPI | 支持 | SPI1/2/3 | -| ADC | 支持 | ADC1_IN1/ADC2_IN2/ADC3_IN3 | -| TIME | 支持 | TIME15/16/17 | -| **扩展模块** | **支持情况** | **备注** | - -## 使用说明 - -使用说明分为如下两个章节： - -- 快速上手 - - 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 - -- 进阶使用 - - 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 +- Memories + - Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection + - Up to 128 KB of SRAM including 32 KB with hardware parity check + - External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories + - Quad SPI memory interface +- 4x digital filters for sigma delta modulator +- Rich analog peripherals (independent supply) + - 3x 12-bit ADC 5 Msps, up to 16-bit with hardware oversampling, 200 μA/Msps + - 2x 12-bit DAC output channels, low-power sample and hold + - 2x operational amplifiers with built-in PGA + - 2x ultra-low-power comparators +- 20x communication interfaces + - USB OTG 2.0 full-speed, LPM and BCD + - 2x SAIs (serial audio interface) + - 3x I2C FM+(1 Mbit/s), SMBus/PMBus + - 5x USARTs (ISO 7816, LIN, IrDA, modem) + - 1x LPUART (Stop 2 wake-up) + - 3x SPIs (and 1x Quad SPI) + - CAN (2.0B Active) and SDMMC interface + - SWPMI single wire protocol master I/F + - IRTIM (Infrared interface) +- 14-channel DMA controller +- True random number generator +- CRC calculation unit, 96-bit unique ID +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™ +- All packages are ECOPACK2® compliant -### 快速上手 -本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 +## Read more -#### 硬件连接 +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) | +| [STM32L476RG ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32l476rg.html#documentation) | STM32L476RG datasheet and other resources | -使用数据线连接开发板到 PC，打开电源开关。 -#### 编译下载 -双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 +## Maintained By -> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 microUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + -#### 运行结果 -下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD1 和 LD3 常亮、黄绿色 LD2 会周期性闪烁。 -USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: +## Translated By -```bash - \ | / -- RT - Thread Operating System - / | \ 4.0.0 build Jan 9 2019 - 2006 - 2018 Copyright by rt-thread team -msh > -``` -### 进阶使用 +Meco Man @ RT-Thread Community -此 BSP 默认只开启了 GPIO 和 串口2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下： - -1. 在 bsp 下打开 env 工具。 - -2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 - -3. 输入`pkgs --update`命令更新软件包。 - -4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 - -本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 - -## 注意事项 - -- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号或将 BSP 中串口的 GPIO 速率调低 - -## 联系人信息 - -维护人: - -- [GW] 邮箱： \ No newline at end of file +> jiantingman@foxmail.com +> +> https://github.com/mysterywolf \ No newline at end of file diff --git a/bsp/stm32/stm32l476-st-nucleo/README_zh.md b/bsp/stm32/stm32l476-st-nucleo/README_zh.md new file mode 100644 index 0000000000..e1784c3855 --- /dev/null +++ b/bsp/stm32/stm32l476-st-nucleo/README_zh.md @@ -0,0 +1,113 @@ +# NUCLEO-L476RG 开发板的 BSP 说明 + +## 简介 + +本文档为 ST 官方 (64)NUCLEO-L476RG 开发板的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +对于 NUCLEO-L476RG，内核是 Cortex-M4，绿色的 Nucleo 标志显示了这款芯片是低功耗系列，板载 ST-LINK/V2-1 调试器/编程器，迷你尺寸，mirco USB 接口，可数的外设，Arduino™ nano 兼容的接口。 + +开发板外观如下图所示： + +![board](figures/board.png) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32L476RG，主频 80MHz，1024KB FLASH ，128KB RAM（96+32）。 +- 常用外设 + - LED：3个，USB communication(LD1 双色),power LED(LD3 红色),user LED(LD2 黄绿色) + - 按键：1个，复位按键(B1)。 +- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口。 +- 调试接口：板载 ST-LINK/V2-1 调试器。 + +开发板更多详细信息请参考【STMicroelectronics】 [NUCLEO-L476RG](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-l476rg.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| 板载 ST-LINK 转串口 | 支持 | UART2 | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | | +| UART | 支持 | UART2 | +| IIC | 支持 | 软件模拟 | +| RTC | 支持 | 支持外部晶振和内部低速时钟 | +| SPI | 支持 | SPI1/2/3 | +| ADC | 支持 | ADC1_IN1/ADC2_IN2/ADC3_IN3 | +| TIME | 支持 | TIME15/16/17 | +| **扩展模块** | **支持情况** | **备注** | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 microUSB 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD1 和 LD3 常亮、黄绿色 LD2 会周期性闪烁。 + +USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.0 build Jan 9 2019 + 2006 - 2018 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口2 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号或将 BSP 中串口的 GPIO 速率调低 + +## 联系人信息 + +维护人: + +- [GW] 邮箱： \ No newline at end of file diff --git a/bsp/stm32/stm32l496-st-nucleo/README.md b/bsp/stm32/stm32l496-st-nucleo/README.md index 156449a74d..c31510a214 100644 --- a/bsp/stm32/stm32l496-st-nucleo/README.md +++ b/bsp/stm32/stm32l496-st-nucleo/README.md @@ -1,107 +1,103 @@ -# NUCLEO-L496ZG 开发板的 BSP 说明 +# STM32L496-Nucleo BSP Introduction -## 简介 +[中文](README_zh.md) -本文档为 ST 官方 (144)NUCLEO-L496ZG 开发板的 BSP (板级支持包) 说明。 +## MCU: STM32L496ZG @80MHz, 1024KB FLASH, 320KB RAM -主要内容如下： +The STM32L496xx devices are the ultra-low-power microcontrollers based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 80 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision which supports all Arm® single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security. -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 +The STM32L496xx devices embed high-speed memories (up to 1 Mbyte of Flash memory, 320 Kbyte of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), a Quad SPI flash memories interface (available on all packages) and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix. +The STM32L496xx devices embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, proprietary code readout protection and Firewall. +The devices offer up to three fast 12-bit ADCs (5 Msps), two comparators, two operational amplifiers, two DAC channels, an internal voltage reference buffer, a low-power RTC, two general-purpose 32-bit timer, two 16-bit PWM timers dedicated to motor control, seven general-purpose 16-bit timers, and two 16-bit low-power timers. The devices support four digital filters for external sigma delta modulators (DFSDM). +In addition, up to 24 capacitive sensing channels are available. The devices also embed an integrated LCD driver 8x40 or 4x44, with internal step-up converter. +They also feature standard and advanced communication interfaces. -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 +#### KEY FEATURES -## 开发板介绍 +- Ultra-low-power with FlexPowerControl + - 1.71 V to 3.6 V power supply + - -40 °C to 85/125 °C temperature range + - 320 nA in VBAT mode: supply for RTC and 32x32-bit backup registers + - 25 nA Shutdown mode (5 wakeup pins) + - 108 nA Standby mode (5 wakeup pins) + - 426 nA Standby mode with RTC + - 2.57 µA Stop 2 mode, 2.86 µA Stop 2 with RTC + - 91 µA/MHz run mode (LDO Mode) + - 37 μA/MHz run mode (@3.3 V SMPS Mode) + - Batch acquisition mode (BAM) + - 5 µs wakeup from Stop mode + - Brown out reset (BOR) in all modes except shutdown + - Interconnect matrix +- Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait-state execution from Flash memory, frequency up to 80 MHz, MPU, 100 DMIPS and DSP instructions +- Performance benchmark + - 1.25 DMIPS/MHz (Drystone 2.1) + - 273.55 Coremark® (3.42 Coremark/MHz @ 80 MHz) +- Energy benchmark + - 279 ULPMark™ CP score + - 80.2 ULPMark™ PP score +- 16 x timers: 2 x 16-bit advanced motor-control, 2 x 32-bit and 5 x 16-bit general purpose, 2 x 16-bit basic, 2 x low-power 16-bit timers (available in Stop mode), 2 x watchdogs, SysTick timer +- RTC with HW calendar, alarms and calibration +- Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V +- Dedicated Chrom-ART Accelerator™ for enhanced graphic content creation (DMA2D) +- 8- to 14-bit camera interface up to 32 MHz (black&white) or 10 MHz (color) +- Memories + - Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection + - 320 KB of SRAM including 64 KB with hardware parity check + - External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories + - Dual-flash Quad SPI memory interface -NUCLEO-L496ZG 是 ST 公司推出的一款针对 STM32L4 系列设计的 Cortex-M4 Nucleo-144 开发板，支持 mbed，兼容 Arduino、还带有ST Zio和 ST Morpho 扩展接口，可连接微控制器的所有周边外设。 - -开发板外观如下图所示： - -![board](figures/board.png) - -该开发板常用 **板载资源** 如下： - -- MCU：STM32L496ZG，主频 80MHz，1MB FLASH ，320KB RAM -- 常用外设 - - LED：3个，LED1 (绿色，PB0),LED2（蓝色，PB7），LED3（红色，PB14） - - 按键：1个，K1（PC13） -- 常用接口：USB OTG 等 -- 调试接口，标准 ST-LINK/SWD - -开发板更多详细信息请参考【NUCLEO-L496ZG】 [L496ZG开发板介绍](https://www.st.com/content/st_com/zh/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-l496zg.html)。 - -## 外设支持 - -本 BSP 目前对外设的支持情况如下： - -| **板载外设** | **支持情况** | **备注** | -| :----------------- | :----------: | :------------------------------------- | -| USB 转串口 | 支持 | | -| **片上外设** | **支持情况** | **备注** | -| GPIO | 支持 | | -| UART | 支持 | LPUART1 | - -## 使用说明 - -使用说明分为如下两个章节： - -- 快速上手 - - 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 - -- 进阶使用 - - 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 +- Clock Sources + - 4 to 48 MHz crystal oscillator + - 32 kHz crystal oscillator for RTC (LSE) + - Internal 16 MHz factory-trimmed RC (±1%) + - Internal low-power 32 kHz RC (±5%) + - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25% accuracy) + - Internal 48 MHz with clock recovery + - 3 PLLs for system clock, USB, audio, ADC +- LCD 8 × 40 or 4 × 44 with step-up converter +- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors +- 4 x digital filters for sigma delta modulator +- Rich analog peripherals (independent supply) + - 3 × 12-bit ADC 5 Msps, up to 16-bit with hardware oversampling, 200 µA/Msps + - 2 x 12-bit DAC output channels, low-power sample and hold + - 2 x operational amplifiers with built-in PGA + - 2 x ultra-low-power comparators +- 20 x communication interfaces + - USB OTG 2.0 full-speed, LPM and BCD + - 2 x SAIs (serial audio interface) + - 4 x I2C FM+(1 Mbit/s), SMBus/PMBus + - 5 x U(S)ARTs (ISO 7816, LIN, IrDA, modem) + - 1 x LPUART + - 3 x SPIs (4 x SPIs with the Quad SPI) + - 2 x CAN (2.0B Active) and SDMMC + - SWPMI single wire protocol master I/F + - IRTIM (Infrared interface) +- 14-channel DMA controller +- True random number generator +- CRC calculation unit, 96-bit unique ID +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™ -### 快速上手 -本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 +## Read more -#### 硬件连接 +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-144_BSP_Introduction](../docs/STM32_Nucleo-144_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) | +| [STM32L496ZG ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32l496zg.html#documentation) | STM32L496ZG datasheet and other resources | -使用数据线连接开发板到 PC，打开电源开关。 -#### 编译下载 -双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 +## Maintained By -> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 ST-LINK 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + -#### 运行结果 -下载程序成功之后，系统会自动运行，蓝色的 LED2 以 500MS 周期闪烁。 -连接开发板ST-LINK到 PC , 会发现有串口, 在终端工具里打开相应的串口（115200-8-1-N）, 复位设备后，可以看到 RT-Thread 的输出信息: +## Translated By -```bash - \ | / -- RT - Thread Operating System - / | \ 4.0.2 build Oct 2 2019 - 2006 - 2019 Copyright by rt-thread team -msh > -``` -### 进阶使用 +Meco Man @ RT-Thread Community -此 BSP 默认只开启了 GPIO 和 LPUART1 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： - -1. 在 bsp 下打开 env 工具。 - -2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 - -3. 输入`pkgs --update`命令更新软件包。 - -4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 - -本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 - -## 注意事项 - -- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号或将 BSP 中串口的 GPIO 速率调低 - -## 联系人信息 - -维护人: - -- [super_mcu] 邮箱： \ No newline at end of file +> jiantingman@foxmail.com +> +> https://github.com/mysterywolf \ No newline at end of file diff --git a/bsp/stm32/stm32l496-st-nucleo/README_zh.md b/bsp/stm32/stm32l496-st-nucleo/README_zh.md new file mode 100644 index 0000000000..d07e0e83c8 --- /dev/null +++ b/bsp/stm32/stm32l496-st-nucleo/README_zh.md @@ -0,0 +1,107 @@ +# NUCLEO-L496ZG 开发板的 BSP 说明 + +## 简介 + +本文档为 ST 官方 (144)NUCLEO-L496ZG 开发板的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +NUCLEO-L496ZG 是 ST 公司推出的一款针对 STM32L4 系列设计的 Cortex-M4 Nucleo-144 开发板，支持 mbed，兼容 Arduino、还带有ST Zio和 ST Morpho 扩展接口，可连接微控制器的所有周边外设。 + +开发板外观如下图所示： + +![board](figures/board.png) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32L496ZG，主频 80MHz，1MB FLASH ，320KB RAM +- 常用外设 + - LED：3个，LED1 (绿色，PB0),LED2（蓝色，PB7），LED3（红色，PB14） + - 按键：1个，K1（PC13） +- 常用接口：USB OTG 等 +- 调试接口，标准 ST-LINK/SWD + +开发板更多详细信息请参考 [L496ZG开发板介绍](https://www.st.com/content/st_com/zh/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-l496zg.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| USB 转串口 | 支持 | | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | | +| UART | 支持 | LPUART1 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 ST-LINK 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，蓝色的 LED2 以 500MS 周期闪烁。 + +连接开发板ST-LINK到 PC , 会发现有串口, 在终端工具里打开相应的串口（115200-8-1-N）, 复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.2 build Oct 2 2019 + 2006 - 2019 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 LPUART1 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 开机时如果不能打印 RT-Thread 版本信息，请重新选择 PC 端串口调试软件的串口号或将 BSP 中串口的 GPIO 速率调低 + +## 联系人信息 + +维护人: + +- [super_mcu] 邮箱： \ No newline at end of file diff --git a/components/libc/compilers/armlibc/sys/unistd.h b/components/libc/compilers/armlibc/sys/unistd.h index 524de2cf83..549771e8f4 100644 --- a/components/libc/compilers/armlibc/sys/unistd.h +++ b/components/libc/compilers/armlibc/sys/unistd.h @@ -68,4 +68,6 @@ int isatty (int fd); char * ttyname (int desc); +unsigned int sleep(unsigned int seconds); + #endif /* _SYS_UNISTD_H */ diff --git a/components/libc/compilers/common/sys/time.h b/components/libc/compilers/common/sys/time.h index 22f1c17f5e..952dbf32a5 100644 --- a/components/libc/compilers/common/sys/time.h +++ b/components/libc/compilers/common/sys/time.h @@ -36,6 +36,13 @@ struct timeval { }; #endif /* _TIMEVAL_DEFINED */ +#ifndef _TIMESPEC +#define _TIMESPEC +struct timespec { + time_t tv_sec; /* seconds */ + long tv_nsec; /* and nanoseconds */ +}; +#endif struct timezone { int tz_minuteswest; /* minutes west of Greenwich */ diff --git a/components/libc/compilers/dlib/sys/unistd.h b/components/libc/compilers/dlib/sys/unistd.h index 9564daba8d..982a29135d 100644 --- a/components/libc/compilers/dlib/sys/unistd.h +++ b/components/libc/compilers/dlib/sys/unistd.h @@ -40,4 +40,6 @@ int isatty (int fd); char * ttyname (int desc); +unsigned int sleep(unsigned int seconds); + #endif /* _SYS_UNISTD_H */