[HUST CSE] Fix many abnormal symbols in annotations and format code

bsp/Vango/v85xx/Libraries/CMSIS/Vango/V85xx/Include/target.h

@@ -1089,7 +1089,7 @@ typedef struct
 //#define ANA_REGA_PSLSEL                ANA_REGA_PSLSEL_Msk                     /*!< power switch level selection */ 
 //#define ANA_REGA_PD_PORH_Pos          (5U)                                     
 //#define ANA_REGA_PD_PORH_Msk          (0x1U << ANA_REGA_PD_PORH_Pos)           /*!< 0x00000020 */
-//#define ANA_REGA_PD_PORH               ANA_REGA_PD_PORH_Msk                    /*!< PD POR_H module, output <EFBFBD><EFBFBD>1<EFBFBD><EFBFBD> when PD */ 
+//#define ANA_REGA_PD_PORH               ANA_REGA_PD_PORH_Msk                    /*!< PD POR_H module, output '1' when PD */ 
 //#define ANA_REGA_PD_RCL_Pos           (6U)                                     
 //#define ANA_REGA_PD_RCL_Msk           (0x1U << ANA_REGA_PD_RCL_Pos)            /*!< 0x00000040 */
 //#define ANA_REGA_PD_RCL                ANA_REGA_PD_RCL_Msk                     /*!< PD 32K RC module */ 

bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Src/ft32f0xx_flash.c

@@ -858,11 +858,11 @@ FLASH_Status FLASH_OB_Erase(void)
   /* Get the actual read protection Option Byte value */
   if(FLASH_OB_GetRDP() != RESET)
   {
-    rdptmp = 0x0000 | 0xff00;               //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1
+    rdptmp = 0x0000 | 0xff00;               //读保护级别1
   }
     else
     {
-        rdptmp = OB_RDP_Level_0 | 0x5500;   //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0
+        rdptmp = OB_RDP_Level_0 | 0x5500;   //读保护级别0
     }
 
     /*Get iwdg value */

bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Src/ft32f0xx_rtc.c

@@ -1303,7 +1303,7 @@ void RTC_TimeStampCmd(uint32_t RTC_TimeStampEdge, FunctionalState NewState)
 {
   uint32_t tmpreg = 0;
 
-    /*<EFBFBD><EFBFBD>Edge<EFBFBD>ĸ<EFBFBD><EFBFBD>û<EFBFBD>д<EFBFBD>λ<EFBFBD>Ķ<EFBFBD><EFBFBD><EFBFBD>*/
+    /* 设置Edge的边缘触发，没有特定位的情况 */
   /* Check the parameters */
   assert_param(IS_RTC_TIMESTAMP_EDGE(RTC_TimeStampEdge));
   assert_param(IS_FUNCTIONAL_STATE(NewState));

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_standard_peripheral/Source/gd32f4xx_rtc.c

@@ -68,7 +68,7 @@ ErrStatus rtc_deinit(void)
     error_status = rtc_init_mode_enter();
 
     if(ERROR != error_status) {
-        /* reset RTC_CTL register, but RTC_CTL[2<EFBFBD><EFBFBD>0] */
+        /* reset RTC_CTL register, but RTC_CTL[2:0] */
         RTC_CTL &= (RTC_REGISTER_RESET | RTC_CTL_WTCS);
         /* before reset RTC_TIME and RTC_DATE, BPSHAD bit in RTC_CTL should be reset as the condition.
            in order to read calendar from shadow register, not the real registers being reset */
@@ -76,7 +76,7 @@ ErrStatus rtc_deinit(void)
         RTC_DATE = RTC_DATE_RESET;
 
         RTC_PSC = RTC_PSC_RESET;
-        /* only when RTC_CTL_WTEN=0 and RTC_STAT_WTWF=1 can write RTC_CTL[2<EFBFBD><EFBFBD>0] */
+        /* only when RTC_CTL_WTEN=0 and RTC_STAT_WTWF=1 can write RTC_CTL[2:0] */
         /* wait until the WTWF flag to be set */
         do {
             flag_status = RTC_STAT & RTC_STAT_WTWF;
@@ -1095,7 +1095,7 @@ ErrStatus rtc_wakeup_clock_set(uint8_t wakeup_clock)
     /* disable the write protection */
     RTC_WPK = RTC_UNLOCK_KEY1;
     RTC_WPK = RTC_UNLOCK_KEY2;
-    /* only when RTC_CTL_WTEN=0 and RTC_STAT_WTWF=1 can write RTC_CTL[2<EFBFBD><EFBFBD>0] */
+    /* only when RTC_CTL_WTEN=0 and RTC_STAT_WTWF=1 can write RTC_CTL[2:0] */
     /* wait until the WTWF flag to be set */
     do {
         flag_status = RTC_STAT & RTC_STAT_WTWF;

bsp/gd32450z-eval/Libraries/GD32F4xx_standard_peripheral/Source/gd32f4xx_rtc.c

@@ -68,7 +68,7 @@ ErrStatus rtc_deinit(void)
     error_status = rtc_init_mode_enter();
 
     if(ERROR != error_status){
-        /* reset RTC_CTL register, but RTC_CTL[2<EFBFBD><EFBFBD>0] */
+        /* reset RTC_CTL register, but RTC_CTL[2:0] */
         RTC_CTL &= (RTC_REGISTER_RESET | RTC_CTL_WTCS);
         /* before reset RTC_TIME and RTC_DATE, BPSHAD bit in RTC_CTL should be reset as the condition.
            in order to read calendar from shadow register, not the real registers being reset */
@@ -76,7 +76,7 @@ ErrStatus rtc_deinit(void)
         RTC_DATE = RTC_DATE_RESET;
 
         RTC_PSC = RTC_PSC_RESET;
-        /* only when RTC_CTL_WTEN=0 and RTC_STAT_WTWF=1 can write RTC_CTL[2<EFBFBD><EFBFBD>0] */
+        /* only when RTC_CTL_WTEN=0 and RTC_STAT_WTWF=1 can write RTC_CTL[2:0] */
         /* wait until the WTWF flag to be set */
         do{
            flag_status = RTC_STAT & RTC_STAT_WTWF;
@@ -1096,7 +1096,7 @@ ErrStatus rtc_wakeup_clock_set(uint8_t wakeup_clock)
     /* disable the write protection */
     RTC_WPK = RTC_UNLOCK_KEY1;
     RTC_WPK = RTC_UNLOCK_KEY2;
-    /* only when RTC_CTL_WTEN=0 and RTC_STAT_WTWF=1 can write RTC_CTL[2<EFBFBD><EFBFBD>0] */
+    /* only when RTC_CTL_WTEN=0 and RTC_STAT_WTWF=1 can write RTC_CTL[2:0] */
     /* wait until the WTWF flag to be set */
     do{
         flag_status = RTC_STAT & RTC_STAT_WTWF;

bsp/hpmicro/libraries/hpm_sdk/soc/HPM6360/HPM6360_svd.xml

@@ -25077,7 +25077,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -25091,7 +25091,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -25107,7 +25107,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -25388,7 +25388,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -25402,7 +25402,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -25418,7 +25418,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -25699,7 +25699,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -25713,7 +25713,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -25729,7 +25729,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -26010,7 +26010,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -26024,7 +26024,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -26040,7 +26040,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -26321,7 +26321,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -26335,7 +26335,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -26351,7 +26351,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -26632,7 +26632,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -26646,7 +26646,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -26662,7 +26662,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -26943,7 +26943,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -26957,7 +26957,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -26973,7 +26973,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -27254,7 +27254,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -27268,7 +27268,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -27284,7 +27284,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>

bsp/hpmicro/libraries/hpm_sdk/soc/HPM6750/HPM6750_svd.xml

@@ -34249,7 +34249,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -34263,7 +34263,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -34279,7 +34279,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -34560,7 +34560,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -34574,7 +34574,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -34590,7 +34590,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -34871,7 +34871,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -34885,7 +34885,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -34901,7 +34901,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -35182,7 +35182,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -35196,7 +35196,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -35212,7 +35212,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -35493,7 +35493,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -35507,7 +35507,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -35523,7 +35523,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -35804,7 +35804,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -35818,7 +35818,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -35834,7 +35834,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -36115,7 +36115,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -36129,7 +36129,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -36145,7 +36145,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -36426,7 +36426,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x8: 256 transfers
 0x9:512 transfers
 0xa: 1024 transfers
-0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
+0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>24</bitOffset>
               <bitWidth>4</bitWidth>
               <access>read-write</access>
@@ -36440,7 +36440,7 @@ The burst transfer byte number is (SrcBurstSize * SrcWidth).
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>21</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>
@@ -36456,7 +36456,7 @@ See field SrcBurstSize above for the definition of burst transfer byte number an
 0x3: Double word transfer
 0x4: Quad word transfer
 0x5: Eight word transfer
-0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception</description>
+0x6-x7: Reserved, setting this field with a reserved value triggers the error exception</description>
               <bitOffset>18</bitOffset>
               <bitWidth>3</bitWidth>
               <access>read-write</access>

bsp/hpmicro/libraries/hpm_sdk/soc/ip/hpm_dma_regs.h

@@ -273,7 +273,7 @@ typedef struct {
  * 0x8: 256 transfers
  * 0x9:512 transfers
  * 0xa: 1024 transfers
- * 0xb <EFBFBD>?0xf: Reserved, setting this field with a reserved value triggers the error exception
+ * 0xb -0xf: Reserved, setting this field with a reserved value triggers the error exception
  */
 #define DMA_CHCTRL_CTRL_SRCBURSTSIZE_MASK (0xF000000UL)
 #define DMA_CHCTRL_CTRL_SRCBURSTSIZE_SHIFT (24U)
@@ -290,7 +290,7 @@ typedef struct {
  * 0x3: Double word transfer
  * 0x4: Quad word transfer
  * 0x5: Eight word transfer
- * 0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception
+ * 0x6-x7: Reserved, setting this field with a reserved value triggers the error exception
  */
 #define DMA_CHCTRL_CTRL_SRCWIDTH_MASK (0xE00000UL)
 #define DMA_CHCTRL_CTRL_SRCWIDTH_SHIFT (21U)
@@ -309,7 +309,7 @@ typedef struct {
  * 0x3: Double word transfer
  * 0x4: Quad word transfer
  * 0x5: Eight word transfer
- * 0x6<EFBFBD>?x7: Reserved, setting this field with a reserved value triggers the error exception
+ * 0x6-x7: Reserved, setting this field with a reserved value triggers the error exception
  */
 #define DMA_CHCTRL_CTRL_DSTWIDTH_MASK (0x1C0000UL)
 #define DMA_CHCTRL_CTRL_DSTWIDTH_SHIFT (18U)

bsp/imxrt/libraries/drivers/drv_eth.c

@@ -1020,7 +1020,7 @@ static int rt_hw_imxrt_eth_init(void)
     imxrt_eth_device.dev_addr[4] = 0x22;
     imxrt_eth_device.dev_addr[5] = 0x33;
 
-    imxrt_eth_device.speed = kENET_MiiSpeed100M;//Ҫ֧<EFBFBD><EFBFBD>ǧ<EFBFBD>ף<EFBFBD>ֱ<EFBFBD>ӽ<EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD>ΪkENET_MiiSpeed1000M
+    imxrt_eth_device.speed = kENET_MiiSpeed100M;//要支持千兆，直接赋值为kENET_MiiSpeed1000M
     imxrt_eth_device.duplex = kENET_MiiFullDuplex;
 
     imxrt_eth_device.enet_base = ENET_1G;

bsp/simulator/drivers/uart_console.c

@@ -117,10 +117,10 @@ static void * ThreadforKeyGet(void * lpParam)
 #endif /* not _WIN32*/
 {
  /*
- * left  key(<EFBFBD><EFBFBD>)<EFBFBD><EFBFBD> 0xe04b
+ * left  key(左)： 0xe04b
- * up    key(<EFBFBD><EFBFBD>)<EFBFBD><EFBFBD> 0xe048
+ * up    key(上)： 0xe048
- * right key(<EFBFBD><EFBFBD>)<EFBFBD><EFBFBD> 0xe04d
+ * right key(右)： 0xe04d
- * down  key(<EFBFBD><EFBFBD>)<EFBFBD><EFBFBD> 0xe050
+ * down  key(下)： 0xe050
  */
     unsigned char key;
 

bsp/stm32/stm32h743-atk-apollo/board/ports/drv_ov2640.h

@@ -21,7 +21,7 @@ extern "C" {
 #define OV2640_PID              0X2642
 
 
-//褰撻<EFBFBD>夋嫨DSP鍦板潃(0XFF=0X00)鏃<>,OV2640鐨凞SP瀵勫瓨鍣ㄥ湴鍧<E6B9B4>鏄犲皠琛<E79AA0>
+//当选择DSP地址(0XFF=0X00)时，OV2640的DSP寄存器地址映射表
 #define OV2640_DSP_R_BYPASS     0x05
 #define OV2640_DSP_Qs           0x44
 #define OV2640_DSP_CTRL         0x50
@@ -57,7 +57,7 @@ extern "C" {
 #define OV2640_DSP_P_STATUS     0xFE
 #define OV2640_DSP_RA_DLMT      0xFF
 
-//褰撻<EFBFBD>夋嫨浼犳劅鍣ㄥ湴鍧<EFBFBD>(0XFF=0X01)鏃<>,OV2640鐨凞SP瀵勫瓨鍣ㄥ湴鍧<E6B9B4>鏄犲皠琛<E79AA0>
+//当选择DSP地址(0XFF=0X01)时，OV2640的DSP寄存器地址映射表
 #define OV2640_SENSOR_GAIN       0x00
 #define OV2640_SENSOR_COM1       0x03
 #define OV2640_SENSOR_REG04      0x04

components/drivers/audio/audio.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/audio/audio_pipe.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/audio/audio_pipe.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/can/can.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/cputime/cputime.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/cputime/cputime_cortexm.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/fdt/libfdt/fdt.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/fdt/src/dtb_get.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  */

components/drivers/fdt/src/dtb_head.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  */

components/drivers/fdt/src/dtb_load.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  */

components/drivers/fdt/src/dtb_set.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  */

components/drivers/hwcrypto/hw_bignum.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hw_bignum.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hw_crc.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hw_crc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hw_gcm.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hw_gcm.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hw_hash.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hw_hash.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hw_rng.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hw_rng.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hw_symmetric.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hw_symmetric.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hwcrypto.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwcrypto/hwcrypto.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/hwtimer/hwtimer.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/i2c/i2c-bit-ops.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/i2c/i2c_core.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/i2c/i2c_dev.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/adc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/alarm.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/audio.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/can.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/cputime.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/crypto.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/dac.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/gpt.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/hwtimer.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/i2c-bit-ops.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/i2c.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/i2c_dev.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/lcd.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/lptimer.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/mmc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/mmcsd_card.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/mmcsd_cmd.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/mmcsd_core.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/mmcsd_host.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/mtd_nand.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/phy.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/phy_mdio.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/pin.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/pm.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/pulse_encoder.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/rt_dev_bus.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/rt_drv_pwm.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/rt_inputcapture.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/rtc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/sd.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/sdio.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/sdio_func_ids.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/sensor.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/serial.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/serial_v2.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/touch.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/usb_common.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/usb_device.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/usb_host.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/watchdog.h

@@ -1,5 +1,5 @@
 /*
- * COPYRIGHT (C) 2011-2021, Real-Thread Information Technology Ltd
+ * COPYRIGHT (C) 2011-2023, Real-Thread Information Technology Ltd
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/drivers/wlan.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/ipc/completion.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/ipc/dataqueue.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/ipc/pipe.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/ipc/poll.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/ipc/ringblk_buf.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/ipc/ringbuffer.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/ipc/waitqueue.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/ipc/workqueue.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/include/rtdevice.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/ipc/completion.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/ipc/dataqueue.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/ipc/pipe.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/ipc/ringblk_buf.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/ipc/waitqueue.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/ipc/workqueue.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/misc/adc.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/misc/dac.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/misc/pin.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/drivers/misc/pulse_encoder.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *