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[errno code]fix that use RT_ENOSYS without - (#7084) 

* [errno code]fix that use RT_ENOSYS without -

* Update bsp/airm2m/air32f103/libraries/rt_drivers/drv_hwtimer.c

---------

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
This commit is contained in:
Zxy 2023-03-23 13:54:42 +08:00 committed by GitHub
parent e15adf5e45
commit 4ed9bc11f7
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
35 changed files with 123 additions and 123 deletions
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8
bsp/Vango/v85xx/drivers/drv_gpio.c
View File

@ -233,7 +233,7 @@ static rt_err_t v85xx_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
irqindex = bit2bitno(PIN_V85XXPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -271,7 +271,7 @@ static rt_err_t v85xx_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
irqindex = bit2bitno(PIN_V85XXPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -306,7 +306,7 @@ static rt_err_t v85xx_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt
irqindex = bit2bitno(PIN_V85XXPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -314,7 +314,7 @@ static rt_err_t v85xx_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_INPUT;

8
bsp/Vango/v85xxp/drivers/drv_gpio.c
View File

@ -234,7 +234,7 @@ static rt_err_t V85XXP_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
irqindex = bit2bitno(PIN_V85XXPPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -272,7 +272,7 @@ static rt_err_t V85XXP_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
irqindex = bit2bitno(PIN_V85XXPPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -307,7 +307,7 @@ static rt_err_t V85XXP_pin_irq_enable(struct rt_device *device, rt_base_t pin, r
irqindex = bit2bitno(PIN_V85XXPPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -315,7 +315,7 @@ static rt_err_t V85XXP_pin_irq_enable(struct rt_device *device, rt_base_t pin, r
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
GPIO_InitStruct.GPIO_Mode = GPIO_MODE_INPUT;

10
bsp/acm32/acm32f0x0-nucleo/drivers/drv_gpio.c
View File

@ -318,7 +318,7 @@ static rt_err_t acm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = PIN2INDEX(pin);
@ -357,7 +357,7 @@ static rt_err_t acm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = PIN2INDEX(pin);
@ -389,7 +389,7 @@ static rt_err_t acm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = PIN2INDEX(pin);
@ -402,7 +402,7 @@ static rt_err_t acm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
System_Module_Enable(EN_EXTI);
@ -444,7 +444,7 @@ static rt_err_t acm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
{
if ((pin_irq_enable_mask & (1 << irqindex)) == 0)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

10
bsp/acm32/acm32f4xx-nucleo/drivers/drv_gpio.c
View File

@ -290,7 +290,7 @@ static rt_err_t _pin_attach_irq(struct rt_device *device, rt_int32_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = PIN2INDEX(pin);
@ -329,7 +329,7 @@ static rt_err_t _pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = PIN2INDEX(pin);
@ -361,7 +361,7 @@ static rt_err_t _pin_irq_enable(struct rt_device *device, rt_base_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = PIN2INDEX(pin);
@ -374,7 +374,7 @@ static rt_err_t _pin_irq_enable(struct rt_device *device, rt_base_t pin,
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
/* Configure GPIO_InitStructure */
@ -414,7 +414,7 @@ static rt_err_t _pin_irq_enable(struct rt_device *device, rt_base_t pin,
{
if ((pin_irq_enable_mask & (1 << irqindex)) == 0)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

2
bsp/airm2m/air105/libraries/rt_drivers/drv_gpio.c
View File

@ -153,7 +153,7 @@ static rt_err_t air105_pin_irq_enable(struct rt_device *device, rt_base_t pin,
if (pin_irq_hdr_tab[pin].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
switch (pin_irq_hdr_tab[pin].mode)
{

2
bsp/airm2m/air32f103/libraries/rt_drivers/drv_hwtimer.c
View File

@ -177,7 +177,7 @@ static rt_err_t air32_hwtimer_control(struct rt_hwtimer_device *device, rt_uint3
break;
default:
result = RT_ENOSYS;
result = -RT_EINVAL;
break;
}

10
bsp/apm32/libraries/Drivers/drv_gpio.c
View File

@ -340,7 +340,7 @@ static rt_err_t apm32_pin_attach_irq(struct rt_device *device, rt_base_t pin,
irqindex = bit2bitno(PIN_APMPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -379,7 +379,7 @@ static rt_err_t apm32_pin_dettach_irq(struct rt_device *device, rt_base_t pin)
irqindex = bit2bitno(PIN_APMPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -416,7 +416,7 @@ static rt_err_t apm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqindex = bit2bitno(PIN_APMPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -424,7 +424,7 @@ static rt_err_t apm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqmap = &pin_irq_map[irqindex];
@ -512,7 +512,7 @@ static rt_err_t apm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqmap = get_pin_irq_map(PIN_APMPIN(pin));
if (irqmap == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

4
bsp/apollo2/board/gpio.c
View File

@ -176,7 +176,7 @@ rt_err_t am_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t
{
if (am_hal_gpio_int_enable_get() != AM_HAL_GPIO_BIT(am_pin_irq_hdr_tab[irqindex].pin))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
/* Disable the GPIO/button interrupt */
@ -184,7 +184,7 @@ rt_err_t am_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t
}
else
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
return RT_EOK;

18
bsp/essemi/es32f0654/drivers/drv_gpio.c
View File

@ -337,7 +337,7 @@ rt_err_t es32f0_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
/* pin no. convert to dec no. */
for (irqindex = 0; irqindex < 16; irqindex++)
@ -349,7 +349,7 @@ rt_err_t es32f0_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
}
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == pin &&
@ -381,12 +381,12 @@ rt_err_t es32f0_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = index->pin & 0x00FF;
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == -1)
@ -419,7 +419,7 @@ rt_err_t es32f0_pin_irq_enable(struct rt_device *device, rt_base_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
if (enabled == PIN_IRQ_ENABLE)
{
@ -433,13 +433,13 @@ rt_err_t es32f0_pin_irq_enable(struct rt_device *device, rt_base_t pin,
}
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqmap = &pin_irq_map[irqindex];
ald_gpio_exti_init(index->gpio, index->pin, &exti_initstruct);
@ -470,13 +470,13 @@ rt_err_t es32f0_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqmap = get_pin_irq_map(index->pin);
if (irqmap == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
NVIC_DisableIRQ(irqmap->irqno);
}
else
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
return RT_EOK;
}

18
bsp/essemi/es32f369x/drivers/drv_gpio.c
View File

@ -339,7 +339,7 @@ rt_err_t es32f3_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
/* pin no. convert to dec no. */
for (irqindex = 0; irqindex < 16; irqindex++)
@ -351,7 +351,7 @@ rt_err_t es32f3_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
}
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == pin &&
@ -383,7 +383,7 @@ rt_err_t es32f3_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
for (irqindex = 0; irqindex < 16; irqindex++)
@ -395,7 +395,7 @@ rt_err_t es32f3_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
}
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == -1)
@ -428,7 +428,7 @@ rt_err_t es32f3_pin_irq_enable(struct rt_device *device, rt_base_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
if (enabled == PIN_IRQ_ENABLE)
{
@ -442,13 +442,13 @@ rt_err_t es32f3_pin_irq_enable(struct rt_device *device, rt_base_t pin,
}
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqmap = &pin_irq_map[irqindex];
ald_gpio_exti_init(index->gpio, index->pin, &exti_initstruct);
@ -483,13 +483,13 @@ rt_err_t es32f3_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqmap = get_pin_irq_map(index->pin);
if (irqmap == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
NVIC_DisableIRQ(irqmap->irqno);
}
else
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
return RT_EOK;
}

10
bsp/fm33lc026/libraries/HAL_Drivers/drv_gpio.c
View File

@ -251,7 +251,7 @@ static rt_err_t fm33_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
irqindex = pin2irqindex(pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -290,7 +290,7 @@ static rt_err_t fm33_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
irqindex = pin2irqindex(PIN_STPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -332,7 +332,7 @@ static rt_err_t fm33_pin_irq_enable(struct rt_device *device, rt_base_t pin,
{
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = pin2irqindex(pin);
@ -343,7 +343,7 @@ static rt_err_t fm33_pin_irq_enable(struct rt_device *device, rt_base_t pin,
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
/* Configure GPIO_InitStructure */
@ -383,7 +383,7 @@ static rt_err_t fm33_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqmap = get_pin_irq_map(PIN_STPIN(pin));
if (irqmap == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

10
bsp/ft32/libraries/Drivers/drv_gpio.c
View File

@ -234,7 +234,7 @@ static rt_err_t ft32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
irqindex = bit2bitno(PIN_FTPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -273,7 +273,7 @@ static rt_err_t ft32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
irqindex = bit2bitno(PIN_FTPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -368,7 +368,7 @@ static rt_err_t ft32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqindex = bit2bitno(PIN_FTPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -376,7 +376,7 @@ static rt_err_t ft32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqmap = &pin_irq_map[irqindex];
@ -425,7 +425,7 @@ static rt_err_t ft32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqmap = get_pin_irq_map(PIN_FTPIN(pin));
if (irqmap == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

16
bsp/gd32vf103v-eval/drivers/drv_gpio.c
View File

@ -273,12 +273,12 @@ static rt_err_t gd32vf_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -313,12 +313,12 @@ static rt_err_t gd32vf_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -347,13 +347,13 @@ static rt_err_t gd32vf_pin_irq_enable(struct rt_device *device, rt_base_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
if (enabled == PIN_IRQ_ENABLE)
@ -363,7 +363,7 @@ static rt_err_t gd32vf_pin_irq_enable(struct rt_device *device, rt_base_t pin,
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqmap = &pin_irq_map[irqindex];
@ -403,7 +403,7 @@ static rt_err_t gd32vf_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqmap = get_pin_irq_map(index->pin);
if (irqmap == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

8
bsp/hc32/libraries/hc32_drivers/drv_gpio.c
View File

@ -315,7 +315,7 @@ static rt_err_t hc32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
irqindex = GPIO_PIN_INDEX(pin);
if (irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -353,7 +353,7 @@ static rt_err_t hc32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
irqindex = GPIO_PIN_INDEX(pin);
if (irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -397,7 +397,7 @@ static rt_err_t hc32_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_
irqindex = GPIO_PIN_INDEX(pin);
if (irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irq_map = &pin_irq_map[irqindex];
@ -409,7 +409,7 @@ static rt_err_t hc32_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
/* Exint config */

2
bsp/hc32l136/drivers/drv_gpio.c
View File

@ -305,7 +305,7 @@ static rt_err_t _pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
/* Exint config */

8
bsp/imxrt/libraries/drivers/drv_gpio.c
View File

@ -668,7 +668,7 @@ static rt_err_t imxrt_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
if (PIN_INVALID_CHECK(port, pin_num))
{
LOG_D("invalid pin,rtt pin: %d,port: %d,pin: %d \n", pin,port + 1,pin_num);
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -701,7 +701,7 @@ static rt_err_t imxrt_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
if (PIN_INVALID_CHECK(port, pin_num))
{
LOG_D("invalid pin,rtt pin: %d,port: %d,pin: %d \n", pin,port + 1,pin_num);
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -730,13 +730,13 @@ static rt_err_t imxrt_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt
if (PIN_INVALID_CHECK(port, pin_num))
{
LOG_D("invalid pin,rtt pin: %d,port: %d,pin: %d \n", pin,port + 1,pin_num);
return RT_ENOSYS;
return -RT_ENOSYS;
}
if (hdr_tab[pin].pin == -1)
{
LOG_D("rtt pin: %d callback function not initialized!\n", pin);
return RT_ENOSYS;
return -RT_ENOSYS;
}
if (enabled == PIN_IRQ_ENABLE)

2
bsp/loongson/ls2kdev/drivers/drv_pwm.c
View File

@ -104,7 +104,7 @@ static rt_err_t loongson_pwm_ioctl(struct rt_device_pwm *device, int cmd, void *
rc = loongson_pwm_set(device, cfg->channel, cfg->period, cfg->pulse);
break;
case PWM_CMD_GET:
rc = RT_ENOSYS;
rc = -RT_ENOSYS;
break;
default:
rc = -RT_EINVAL;

2
bsp/loongson/ls2kdev/drivers/drv_rtc.c
View File

@ -115,7 +115,7 @@ static rt_ssize_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_si
static rt_err_t rt_rtc_ioctl(rt_device_t dev, int cmd, void *args)
{
rt_err_t err = RT_ENOSYS;
rt_err_t err = -RT_ENOSYS;
static int count = 0;

10
bsp/mm32/libraries/HAL_Drivers/drv_gpio.c
View File

@ -230,7 +230,7 @@ static rt_err_t mm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
irqindex = bit2bitno(PIN_STPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -269,7 +269,7 @@ static rt_err_t mm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
irqindex = bit2bitno(PIN_STPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -305,7 +305,7 @@ static rt_err_t mm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqindex = bit2bitno(PIN_STPIN(pin));
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -313,7 +313,7 @@ static rt_err_t mm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqmap = &pin_irq_map[irqindex];
@ -350,7 +350,7 @@ static rt_err_t mm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqmap = get_pin_irq_map(PIN_STPIN(pin));
if (irqmap == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

4
bsp/mm32f103x/drivers/drv_gpio.c
View File

@ -311,12 +311,12 @@ rt_err_t mm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(mm32_pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

4
bsp/mm32f327x/drivers/drv_gpio.c
View File

@ -306,12 +306,12 @@ rt_err_t mm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(mm32_pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

4
bsp/mm32l3xx/drivers/drv_gpio.c
View File

@ -296,12 +296,12 @@ rt_err_t mm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(mm32_pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

16
bsp/n32/libraries/n32_drivers/drv_gpio.c
View File

@ -422,12 +422,12 @@ static rt_err_t n32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -462,12 +462,12 @@ static rt_err_t n32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -497,7 +497,7 @@ static rt_err_t n32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
if (enabled == PIN_IRQ_ENABLE)
@ -505,7 +505,7 @@ static rt_err_t n32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -513,7 +513,7 @@ static rt_err_t n32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqmap = &pin_irq_map[irqindex];
@ -561,7 +561,7 @@ static rt_err_t n32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqmap = get_pin_irq_map(index->pin);
if (irqmap == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

10
bsp/nrf5x/libraries/drivers/drv_gpio.c
View File

@ -206,7 +206,7 @@ static rt_err_t nrf5x_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irq_quantity = ITEM_NUM(pin_irq_hdr_tab);
@ -280,7 +280,7 @@ static rt_err_t nrf5x_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irq_quantity = ITEM_NUM(pin_irq_hdr_tab);
@ -300,7 +300,7 @@ static rt_err_t nrf5x_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
}
if(i >= irq_quantity)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
return RT_EOK;
}
@ -316,7 +316,7 @@ static rt_err_t nrf5x_pin_irq_enable(struct rt_device *device, rt_base_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irq_quantity = ITEM_NUM(pin_irq_hdr_tab);
@ -340,7 +340,7 @@ static rt_err_t nrf5x_pin_irq_enable(struct rt_device *device, rt_base_t pin,
if(i >= irq_quantity)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
return RT_EOK;
}

14
bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_gpio.c
View File

@ -267,12 +267,12 @@ static rt_err_t gd32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -307,12 +307,12 @@ static rt_err_t gd32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -345,7 +345,7 @@ static rt_err_t gd32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
if (enabled == PIN_IRQ_ENABLE)
@ -353,7 +353,7 @@ static rt_err_t gd32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -361,7 +361,7 @@ static rt_err_t gd32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqmap = &pin_irq_map[irqindex];

10
bsp/rockchip/common/drivers/drv_gpio.c
View File

@ -97,7 +97,7 @@ static rt_err_t pin_attach_irq(struct rt_device *device, rt_int32_t pin,
if (pin < 0 || pin >= HAL_ARRAY_SIZE(pin_irq_hdr_tab))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -132,7 +132,7 @@ static rt_err_t pin_detach_irq(struct rt_device *device, rt_int32_t pin)
if (pin < 0 || pin >= HAL_ARRAY_SIZE(pin_irq_hdr_tab))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -163,13 +163,13 @@ static rt_err_t pin_irq_enable(struct rt_device *dev, rt_base_t pin, rt_uint32_t
{
if (pin < 0 || pin >= HAL_ARRAY_SIZE(pin_irq_hdr_tab))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[pin].pin == BANK_PIN_DEFAULT)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
switch (pin_irq_hdr_tab[pin].mode)
@ -204,7 +204,7 @@ static rt_err_t pin_irq_enable(struct rt_device *dev, rt_base_t pin, rt_uint32_t
}
else
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
return RT_EOK;

2
bsp/rv32m1_vega/ri5cy/driver/drv_gpio.c
View File

@ -410,7 +410,7 @@ static rt_err_t vega_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
if(pin_map == RT_NULL || irq_map == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
if(irq_map->enable == PIN_IRQ_DISABLE)

2
bsp/synwit/swm320/drivers/drv_gpio.c
View File

@ -384,7 +384,7 @@ static rt_err_t swm_pin_irq_enable(struct rt_device *device,
gpio_obj = _pin2struct(pin);
if (gpio_obj == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
if (enabled == PIN_IRQ_ENABLE)

2
bsp/synwit/swm341/drivers/drv_gpio.c
View File

@ -406,7 +406,7 @@ static rt_err_t swm_pin_irq_enable(struct rt_device *device,
gpio_obj = _pin2struct(pin);
if (gpio_obj == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
if (enabled == PIN_IRQ_ENABLE)

4
bsp/tkm32F499/drivers/drv_gpio.c
View File

@ -339,12 +339,12 @@ rt_err_t tkm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(tkm32_pin_irq_map))
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();

8
bsp/w60x/drivers/drv_pin.c
View File

@ -78,7 +78,7 @@ static rt_err_t wm_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
gpio_pin = wm_get_pin(pin);
if (gpio_pin < 0)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
@ -102,7 +102,7 @@ static rt_err_t wm_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
break;
default:
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
tls_gpio_isr_register((enum tls_io_name)gpio_pin, hdr, args);
@ -123,7 +123,7 @@ static rt_err_t wm_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_ui
gpio_pin = wm_get_pin(pin);
if (gpio_pin < 0)
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (enabled == PIN_IRQ_ENABLE)
@ -142,7 +142,7 @@ static rt_err_t wm_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_ui
else
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
return -RT_ENOSYS;
}
}

2
bsp/wch/arm/Libraries/ch32_drivers/drv_hwtimer_ch32f10x.c
View File

@ -216,7 +216,7 @@ static rt_err_t ch32f1_hwtimer_control(struct rt_hwtimer_device *device, rt_uint
break;
default:
result = RT_ENOSYS;
result = -RT_ENOSYS;
break;
}

2
bsp/wch/arm/Libraries/ch32_drivers/drv_hwtimer_ch32f20x.c
View File

@ -264,7 +264,7 @@ static rt_err_t ch32f2_hwtimer_control(struct rt_hwtimer_device *device, rt_uint
break;
default:
result = RT_ENOSYS;
result = -RT_ENOSYS;
break;
}

2
bsp/yichip/yc3121-pos/drivers/drv_gpio.c
View File

@ -224,7 +224,7 @@ static rt_err_t yc_pin_irq_enable(struct rt_device *device,
}
else
{
return RT_ENOSYS;
return -RT_ENOSYS;
}
return RT_EOK;
}

2
libcpu/aarch64/common/mmu.c
View File

@ -613,7 +613,7 @@ static int _noncache(uintptr_t *pte)
else
{
// do not support other type to be noncache
err = RT_ENOSYS;
err = -RT_ENOSYS;
}
return err;
}