libs/rt-thread
libs
/
rt-thread
4
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

[bsp][nxp mcxn236]Delete unused code with pin_mux.c .

This commit is contained in:
andeyqi 2024-06-26 15:50:50 +08:00 committed by Rbb666
parent ca35f6692c
commit 4d00fd19da
1 changed files with 0 additions and 45 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

45
bsp/nxp/mcx/mcxn/frdm-mcxn236/board/MCUX_Config/board/pin_mux.c
View File

@ -26,16 +26,9 @@ void BOARD_InitBootPins(void)
PORT1->PCR[9] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_IBE(1); /* FC4_P1 */
/* Mikro Bus UART */
/* PORT1->PCR[16] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_IBE(1); /* FC5_P0 */
/* PORT1->PCR[17] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_IBE(1); /* FC5_P1 */
PORT1->PCR[16] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC5_UART */
PORT1->PCR[17] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC5_UART */
/* DAC */
/* PORT4->PCR[2] = PORT_PCR_MUX(0) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(0); /* DAC0 */
/* PORT4->PCR[3] = PORT_PCR_MUX(0) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(0); /* DAC1 */
/* MCX_RST UART */
PORT4->PCR[2] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC2_UART */
PORT4->PCR[3] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC2_UART */
@ -60,8 +53,6 @@ void BOARD_InitBootPins(void)
/* Arduino D8(P0_28), D9(P0_10), D10(P0_27) as GPIO function, for RW007 RST, INT, CS */
/* drv_pin.c works well, follow lines just notice that pins we used as GPIO function */
/* PORT0->PCR[28] = PORT_PCR_MUX(0) | PORT_PCR_PS(1) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* P0_28: P0_28 */
/* PORT0->PCR[10] = PORT_PCR_MUX(0) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* P0_10: P0_27 */
PORT0->PCR[27] = PORT_PCR_MUX(0) | PORT_PCR_PS(1) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* P0_27: P0_27 */
#endif
@ -70,9 +61,6 @@ void BOARD_InitBootPins(void)
PORT1->PCR[1] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC3_1 SCK, FC3_SPI_CLK */
PORT1->PCR[2] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC3_2 SDI/D[1], FC3_SPI_MISO */
PORT1->PCR[3] = PORT_PCR_MUX(0) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* CS */
/* PORT1->PCR[3] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC3_3 CS0 */
/* PORT1->PCR[4] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC3_4 D[3] */
/* PORT1->PCR[5] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC3_5 D[2] */
/* SPI */
PORT3->PCR[8] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC7_P0, MOSI */
@ -92,11 +80,7 @@ void BOARD_InitBootPins(void)
PORT1->PCR[13] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC3_1 SCK */
PORT1->PCR[14] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC3_2 SDI/D[1] */
PORT1->PCR[15] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC3_3 CS0 */
/* PORT1->PCR[16] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC3_4 D[3] */
/* PORT1->PCR[17] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC3_5 D[2] */
/* PORT1->PCR[8] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC5_4 D[3] */
/* PORT1->PCR[9] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC5_5 D[2] */
PORT1->PCR[4] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC5_0 SDO/D[0] */
PORT1->PCR[5] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC5_1 SCK */
PORT1->PCR[6] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* FC5_2 SDI/D[1] */
@ -115,17 +99,6 @@ void BOARD_InitBootPins(void)
PORT3->PCR[22] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC6_P2 SDI/D[1], FC3_SPI_MISO */
PORT3->PCR[23] = PORT_PCR_MUX(0) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* CS */
/* PORT1->PCR[20] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC4_0 */
/* PORT1->PCR[21] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC4_1 */
/* PORT1->PCR[22] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC4_2 */
/* PORT1->PCR[23] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC4_3 */
/* PORT1->PCR[0] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC4_4 */
/* PORT1->PCR[1] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC4_5 */
/* PORT4->PCR[0] = PORT_PCR_MUX(0) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* ANA_0, ADC0_A0 */
/* PORT4->PCR[1] = PORT_PCR_MUX(0) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* ANA_1, ADC0_B0 */
PORT4->PCR[0] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC2_P0 I2C_SDA */
PORT4->PCR[1] = PORT_PCR_MUX(2) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC2_P1 I2C_SCL */
@ -145,11 +118,6 @@ void BOARD_InitBootPins(void)
PORT4->PCR[15] = PORT_PCR_MUX(FLEXIO_DATA7_MUX) | PORT_PCR_PE_MASK | PORT_PCR_PS(0); /* FXIO0_D7 */
PORT4->PCR[16] = PORT_PCR_MUX(FLEXIO_DATA8_MUX) | PORT_PCR_PE_MASK | PORT_PCR_PS(0); /* FXIO0_D8 */
/* PORT4->PCR[15] = PORT_PCR_MUX(11) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* CAN1 */
/* PORT4->PCR[16] = PORT_PCR_MUX(11) | PORT_PCR_PS(0) | PORT_PCR_PE(1) | PORT_PCR_IBE(1); /* CAN */
PORT4->PCR[17] = PORT_PCR_MUX(FLEXIO_DATA9_MUX) | PORT_PCR_PE_MASK | PORT_PCR_PS(0); /* FXIO0_D9 */
PORT4->PCR[18] = PORT_PCR_MUX(FLEXIO_DATA10_MUX) | PORT_PCR_PE_MASK | PORT_PCR_PS(0); /* FXIO0_D10 */
PORT4->PCR[19] = PORT_PCR_MUX(FLEXIO_DATA11_MUX) | PORT_PCR_PE_MASK | PORT_PCR_PS(0); /* FXIO0_D11 */
@ -157,19 +125,6 @@ void BOARD_InitBootPins(void)
PORT4->PCR[21] = PORT_PCR_MUX(FLEXIO_DATA13_MUX) | PORT_PCR_PE_MASK | PORT_PCR_PS(0); /* FXIO0_D13 */
PORT4->PCR[22] = PORT_PCR_MUX(FLEXIO_DATA14_MUX) | PORT_PCR_PE_MASK | PORT_PCR_PS(0); /* FXIO0_D14 */
PORT4->PCR[23] = PORT_PCR_MUX(FLEXIO_DATA15_MUX) | PORT_PCR_PE_MASK | PORT_PCR_PS(0); /* FXIO0_D15 */
/* ENET */
PORT1->PCR[13] = PORT_PCR_MUX(9) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* ENET0_RXDV */
PORT1->PCR[14] = PORT_PCR_MUX(9) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* ENET0_RXD0 */
PORT1->PCR[15] = PORT_PCR_MUX(9) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* ENET0_RXD1 */
PORT1->PCR[20] = PORT_PCR_MUX(9) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* ENET0_MDC */
PORT1->PCR[21] = PORT_PCR_MUX(9) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* ENET0_MDIO */
PORT1->PCR[4] = PORT_PCR_MUX(9) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* ENET0_TX_CLK */
PORT1->PCR[5] = PORT_PCR_MUX(9) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* ENET0_TXEN */
PORT1->PCR[6] = PORT_PCR_MUX(9) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* ENET0_TXD0 */
PORT1->PCR[7] = PORT_PCR_MUX(9) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* ENET0_TXD1 */
}