component: sdio: fix potential ricky clock setting
Currently RTT mmc stack only support Highspeed mode or blow, which means the max speed should be 52MHz according to JEDEC spec. Two problems show here: (1) max_data_rate = (unsigned int)-1. The value of unsigned int depends on compilers/arch. Moreover, it makes no sense to assume cpu addressing width with IP clock rate limit. (1)hs_max_data_rate was set to 200MHz. So what should BSP drivers do if 52MHz < max_data_rate < 200MHz? Either it blindly sets a spec-violated clock rate to drive a Highspeed card, or just adjust the clock rate internally. Both cases are really bad for practice. If the card claims to support Highspeed, we set the clock to not to exceed 52MHz. Otherwise it should be set according to card->max_data_rate parsed by ext_csd. This patch fixes it as-is, and also simplify the code a lot. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
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@ -191,7 +191,7 @@ static int mmc_parse_ext_csd(struct rt_mmcsd_card *card, rt_uint8_t *ext_csd)
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}
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card->flags |= CARD_FLAG_HIGHSPEED;
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card->hs_max_data_rate = 200000000;
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card->hs_max_data_rate = 52000000;
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card_capacity = *((rt_uint32_t *)&ext_csd[EXT_CSD_SEC_CNT]);
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card_capacity *= card->card_blksize;
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@ -513,16 +513,10 @@ static rt_int32_t mmcsd_mmc_init_card(struct rt_mmcsd_host *host,
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card->flags |= CARD_FLAG_SDHC;
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/* set bus speed */
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max_data_rate = (unsigned int)-1;
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if (card->flags & CARD_FLAG_HIGHSPEED)
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{
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if (max_data_rate > card->hs_max_data_rate)
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max_data_rate = card->hs_max_data_rate;
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}
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else if (max_data_rate > card->max_data_rate)
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{
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max_data_rate = card->hs_max_data_rate;
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else
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max_data_rate = card->max_data_rate;
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}
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mmcsd_set_clock(host, max_data_rate);
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