update stm32f4.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1957 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wuyangyong
parent
1f6e13d1da
commit
4bf7e430e2
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@ -40,7 +40,9 @@
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#define STM32_SRAM_SIZE 128
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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//#define RT_USING_UART1
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#define RT_USING_UART2
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//#define RT_USING_UART3
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// <o> Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3
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// <i>Default: 1
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@ -157,6 +157,22 @@ void DebugMon_Handler(void)
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{
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}*/
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void USART1_IRQHandler(void)
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{
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#ifdef RT_USING_UART1
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extern struct rt_device uart1_device;
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extern void rt_hw_serial_isr(struct rt_device *device);
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/* enter interrupt */
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rt_interrupt_enter();
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rt_hw_serial_isr(&uart1_device);
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/* leave interrupt */
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rt_interrupt_leave();
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#endif
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}
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void USART2_IRQHandler(void)
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{
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#ifdef RT_USING_UART2
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@ -173,6 +189,22 @@ void USART2_IRQHandler(void)
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#endif
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}
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void USART3_IRQHandler(void)
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{
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#ifdef RT_USING_UART3
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extern struct rt_device uart3_device;
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extern void rt_hw_serial_isr(struct rt_device *device);
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/* enter interrupt */
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rt_interrupt_enter();
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rt_hw_serial_isr(&uart3_device);
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/* leave interrupt */
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rt_interrupt_leave();
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#endif
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}
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/**
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* @}
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*/
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@ -11,6 +11,7 @@
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* Date Author Notes
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* 2009-01-05 Bernard the first version
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* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
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* 2012-02-08 aozima update for F4.
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*/
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#include "stm32f4xx.h"
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@ -68,53 +69,64 @@ struct stm32_serial_device uart3 =
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struct rt_device uart3_device;
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#endif
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#define USART1_DR_Base 0x40013804
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#define USART2_DR_Base 0x40004404
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#define USART3_DR_Base 0x40004804
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//#define USART1_DR_Base 0x40013804
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//#define USART2_DR_Base 0x40004404
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//#define USART3_DR_Base 0x40004804
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/* USART1_REMAP = 0 */
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#define UART1_GPIO_TX GPIO_Pin_9
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#define UART1_TX_PIN_SOURCE GPIO_PinSource9
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#define UART1_GPIO_RX GPIO_Pin_10
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#define UART1_RX_PIN_SOURCE GPIO_PinSource10
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#define UART1_GPIO GPIOA
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#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOA
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#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
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#define UART1_TX_DMA DMA1_Channel4
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#define UART1_RX_DMA DMA1_Channel5
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#define UART2_GPIO_TX GPIO_Pin_2
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#define UART2_TX_PIN_SOURCE GPIO_PinSource2
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#define UART2_GPIO_RX GPIO_Pin_3
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#define UART2_RX_PIN_SOURCE GPIO_PinSource3
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#define UART2_GPIO GPIOA
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#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
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#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
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/* USART3_REMAP[1:0] = 00 */
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#define UART3_GPIO_RX GPIO_Pin_11
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#define UART3_GPIO_TX GPIO_Pin_10
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#define UART3_TX_PIN_SOURCE GPIO_PinSource10
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#define UART3_GPIO_RX GPIO_Pin_11
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#define UART3_RX_PIN_SOURCE GPIO_PinSource11
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#define UART3_GPIO GPIOB
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#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOB
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#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
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#define UART3_TX_DMA DMA1_Channel2
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#define UART3_RX_DMA DMA1_Channel3
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#define UART3_TX_DMA DMA1_Stream1
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#define UART3_RX_DMA DMA1_Stream3
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static void RCC_Configuration(void)
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{
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#ifdef RT_USING_UART1
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/* Enable USART1 and GPIOA clocks */
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
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/* Enable USART2 GPIO clocks */
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RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE);
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/* Enable USART2 clock */
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RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE);
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#endif
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#ifdef RT_USING_UART2
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/* Enable USART2 and GPIOA clocks */
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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/* Enable USART2 GPIO clocks */
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RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE);
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/* Enable USART2 clock */
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
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RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE);
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#endif
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#ifdef RT_USING_UART3
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
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/* Enable USART3 GPIO clocks */
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RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE);
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/* Enable USART3 clock */
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
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RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE);
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/* DMA clock enable */
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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RCC_APB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
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#endif
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}
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@ -128,35 +140,33 @@ static void GPIO_Configuration(void)
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
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#ifdef RT_USING_UART1
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/* Configure USART1 Rx (PA.10) as input floating */
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GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
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/* Configure USART1 Rx/tx PIN */
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GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX;
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GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
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/* Configure USART1 Tx (PA.09) as alternate function push-pull */
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GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
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GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
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/* Connect alternate function */
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GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1);
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GPIO_PinAFConfig(UART1_GPIO, UART1_RX_PIN_SOURCE, GPIO_AF_USART1);
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#endif
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#ifdef RT_USING_UART2
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GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX|UART2_GPIO_RX;
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/* Configure USART2 Rx/tx PIN */
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GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX | UART2_GPIO_RX;
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GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
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/* Connect alternate function */
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_USART2);
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_USART2);
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GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2);
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GPIO_PinAFConfig(UART2_GPIO, UART2_RX_PIN_SOURCE, GPIO_AF_USART2);
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#endif
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#ifdef RT_USING_UART3
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/* Configure USART3 Rx as input floating */
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GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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/* Configure USART3 Rx/tx PIN */
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GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX | UART3_GPIO_RX;
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GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
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/* Configure USART3 Tx as alternate function push-pull */
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GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
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/* Connect alternate function */
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GPIO_PinAFConfig(UART2_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3);
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GPIO_PinAFConfig(UART2_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3);
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#endif
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}
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@ -189,7 +199,7 @@ static void NVIC_Configuration(void)
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NVIC_Init(&NVIC_InitStructure);
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/* Enable the DMA1 Channel2 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream1_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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@ -201,24 +211,62 @@ static void DMA_Configuration(void)
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#if defined (RT_USING_UART3)
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DMA_InitTypeDef DMA_InitStructure;
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/* fill init structure */
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// /* Configure DMA Stream */
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// DMA_InitStructure.DMA_Channel = DMA_CHANNEL;
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// DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SRC_Const_Buffer;
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// DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)DST_Buffer;
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// DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToMemory;
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// DMA_InitStructure.DMA_BufferSize = (uint32_t)BUFFER_SIZE;
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// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable;
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// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
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// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
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// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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// DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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// DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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// DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
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// DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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// DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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// DMA_Init(DMA_STREAM, &DMA_InitStructure);
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/* Configure DMA Stream */
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DMA_InitStructure.DMA_Channel = DMA_Channel_0;
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DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&USART3->DR);
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0;
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DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
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DMA_InitStructure.DMA_BufferSize = (uint32_t)0;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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/* DMA1 Channel5 (triggered by USART3 Tx event) Config */
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DMA_DeInit(UART3_TX_DMA);
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DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
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DMA_InitStructure.DMA_BufferSize = 0;
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DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
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// /* fill init structure */
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// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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// DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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// DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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//
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// /* DMA1 Channel5 (triggered by USART3 Tx event) Config */
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// DMA_DeInit(UART3_TX_DMA);
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// DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
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// DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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// DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
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// DMA_InitStructure.DMA_BufferSize = 0;
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// DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
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DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
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DMA_ClearFlag(DMA1_FLAG_TC5);
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// DMA_ClearFlag(DMA1_FLAG_TC5);
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#endif
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}
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@ -285,7 +333,7 @@ void rt_hw_usart_init()
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USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_Init(USART3, &USART_InitStructure);
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uart3_dma_tx.dma_channel= UART3_TX_DMA;
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// uart3_dma_tx.dma_channel= UART3_TX_DMA;
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/* register uart3 */
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rt_hw_serial_register(&uart3_device, "uart3",
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@ -31,7 +31,7 @@ if PLATFORM == 'gcc':
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OBJDUMP = PREFIX + 'objdump'
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OBJCPY = PREFIX + 'objcopy'
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DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=vfp -mfloat-abi=softfp -ffunction-sections -fdata-sections'
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DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -ffunction-sections -fdata-sections'
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CFLAGS = DEVICE
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AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
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LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-stm32.map,-cref,-u,Reset_Handler -T stm32_rom.ld'
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@ -94,7 +94,7 @@ elif PLATFORM == 'iar':
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CFLAGS += ' --no_scheduling'
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CFLAGS += ' --debug'
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CFLAGS += ' --endian=little'
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CFLAGS += ' --cpu=Cortex-M3'
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CFLAGS += ' --cpu=Cortex-M4'
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CFLAGS += ' -e'
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CFLAGS += ' --fpu=None'
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CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
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@ -105,7 +105,7 @@ elif PLATFORM == 'iar':
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AFLAGS += ' -s+'
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AFLAGS += ' -w+'
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AFLAGS += ' -r'
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AFLAGS += ' --cpu Cortex-M3'
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AFLAGS += ' --cpu Cortex-M4'
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AFLAGS += ' --fpu None'
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LFLAGS = ' --config stm32f10x_flash.icf'
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