Merge pull request #3399 from loogg/mlw-fs
add stm32f407-atk-explorer sram driver
This commit is contained in:
commit
4b99c7df66
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@ -44,6 +44,7 @@
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| COM3 | 支持 | |
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| COM3 | 支持 | |
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| MPU6050 | 支持 | |
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| MPU6050 | 支持 | |
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| Flash | 支持 | |
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| Flash | 支持 | |
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| SRAM | 支持 | |
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| SD卡 | 支持 | |
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| SD卡 | 支持 | |
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| 以太网 | 支持 | |
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| 以太网 | 支持 | |
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| WM8978 | 暂不支持 | |
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| WM8978 | 暂不支持 | |
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File diff suppressed because one or more lines are too long
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@ -1,287 +1,442 @@
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#MicroXplorer Configuration settings - do not modify
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#MicroXplorer Configuration settings - do not modify
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ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_5
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PH0-OSC_IN.Signal=RCC_OSC_IN
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ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag,master
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SH.FSMC_D1_DA1.0=FSMC_D1,16b-d1
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ADC1.NbrOfConversionFlag=1
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SPI1.VirtualType=VM_MASTER
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ADC1.Rank-0\#ChannelRegularConversion=1
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SPI2.VirtualType=VM_MASTER
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PB10.Mode=Asynchronous
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PG4.Signal=FSMC_A14
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RCC.PLLCLKFreq_Value=168000000
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PC12.Signal=SDIO_CK
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SH.FSMC_NWE.0=FSMC_NWE,Sram1
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RCC.PLLQCLKFreq_Value=48000000
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PG0.Signal=FSMC_A10
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VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
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RCC.RTCFreq_Value=32768
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PC5.Mode=RMII
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USART1.IPParameters=VirtualMode
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PB13.Signal=SPI2_SCK
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PG13.Signal=ETH_TXD0
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PinOutPanel.RotationAngle=0
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RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
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NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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SH.FSMC_A15.ConfNb=1
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SH.FSMC_A11.ConfNb=1
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SPI1.Direction=SPI_DIRECTION_2LINES
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TIM2.IPParameters=Channel-PWM Generation4 CH4
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PD4.Signal=FSMC_NOE
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RCC.APB2TimFreq_Value=168000000
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PB6.Signal=S_TIM4_CH1
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SPI1.CalculateBaudRate=42.0 MBits/s
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PC3.Signal=SPI2_MOSI
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PD0.Signal=FSMC_D2_DA2
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PD8.Signal=FSMC_D13_DA13
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VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
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PE1.Signal=FSMC_NBL1
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SH.FSMC_D4_DA4.ConfNb=1
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ProjectManager.ProjectBuild=false
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PG13.Locked=true
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NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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PB3.Mode=Full_Duplex_Master
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PG14.Mode=RMII
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ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.25.0
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MxDb.Version=DB.5.0.60
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SH.FSMC_NOE.ConfNb=1
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ProjectManager.BackupPrevious=false
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SH.FSMC_D10_DA10.0=FSMC_D10,16b-d1
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PE9.Signal=FSMC_D6_DA6
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SH.FSMC_A0.0=FSMC_A0,19b-a1
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PC9.Mode=SD_4_bits_Wide_bus
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SPI2.CalculateBaudRate=21.0 MBits/s
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SH.S_TIM4_CH2.0=TIM4_CH2,Encoder_Interface
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PB6.Locked=true
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NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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PF3.Signal=FSMC_A3
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PE10.Signal=FSMC_D7_DA7
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SH.FSMC_D5_DA5.0=FSMC_D5,16b-d1
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ProjectManager.HalAssertFull=false
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ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_3CYCLES
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ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_3CYCLES
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ADC1.master=1
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SH.FSMC_A0.ConfNb=1
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RCC.MCO2PinFreq_Value=168000000
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SH.FSMC_A8.ConfNb=1
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Mcu.Package=LQFP144
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PA5.Locked=true
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SPI2.Mode=SPI_MODE_MASTER
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SH.FSMC_D15_DA15.ConfNb=1
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FSMC.IPParameters=WriteOperation1
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PD12.Signal=FSMC_A17_ALE
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SH.FSMC_D14_DA14.ConfNb=1
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VP_SYS_VS_Systick.Signal=SYS_VS_Systick
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USART3.IPParameters=VirtualMode
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PA10.Signal=USART1_RX
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VP_TIM11_VS_ClockSourceINT.Signal=TIM11_VS_ClockSourceINT
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PC11.Mode=SD_4_bits_Wide_bus
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SH.FSMC_A1.0=FSMC_A1,19b-a1
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RCC.APB2CLKDivider=RCC_HCLK_DIV2
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SH.FSMC_D3_DA3.0=FSMC_D3,16b-d1
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SH.S_TIM4_CH1.0=TIM4_CH1,Encoder_Interface
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PF14.Signal=FSMC_A8
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RCC.APB1TimFreq_Value=84000000
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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USB_OTG_FS.IPParameters=VirtualMode
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PB13.Mode=Full_Duplex_Master
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VP_TIM14_VS_ClockSourceINT.Mode=Enable_Timer
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SH.S_TIM2_CH4.ConfNb=1
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NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
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SH.FSMC_D7_DA7.ConfNb=1
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PD15.Signal=FSMC_D1_DA1
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ProjectManager.CustomerFirmwarePackage=
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PC4.Mode=RMII
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SH.FSMC_A5.ConfNb=1
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Mcu.Pin80=VP_TIM2_VS_ClockSourceINT
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SH.S_TIM4_CH1.ConfNb=1
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Mcu.Pin81=VP_TIM11_VS_ClockSourceINT
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ProjectManager.ProjectFileName=CubeMX_Config.ioc
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ADC1.Rank-0\#ChannelRegularConversion=1
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Mcu.Pin79=VP_SYS_VS_Systick
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SH.FSMC_A2.0=FSMC_A2,19b-a1
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Mcu.PinsNb=84
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Mcu.Pin73=PB6
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Mcu.Pin74=PB7
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Mcu.Pin71=PB4
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Mcu.Pin72=PB5
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ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag,master
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Mcu.Pin77=VP_IWDG_VS_IWDG
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PG5.Signal=FSMC_A15
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Mcu.Pin78=VP_RTC_VS_RTC_Activate
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Mcu.Pin75=PE0
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Mcu.Pin76=PE1
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SH.FSMC_NBL1.ConfNb=1
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Mcu.Pin70=PB3
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PC2.Signal=SPI2_MISO
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SH.FSMC_A16_CLE.0=FSMC_A16,19b-a1
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SH.FSMC_D8_DA8.ConfNb=1
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PD1.Signal=FSMC_D3_DA3
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SH.FSMC_D9_DA9.0=FSMC_D9,16b-d1
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Mcu.Pin68=PG13
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Mcu.Pin69=PG14
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RCC.APB1CLKDivider=RCC_HCLK_DIV4
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PC14-OSC32_IN.Signal=RCC_OSC32_IN
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Mcu.Pin62=PD1
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PG14.Locked=true
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Mcu.Pin63=PD2
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Mcu.Pin60=PC12
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Mcu.Pin61=PD0
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Mcu.Pin66=PG10
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Mcu.Pin67=PG11
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Mcu.Pin64=PD4
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Mcu.Pin65=PD5
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PG10.Signal=FSMC_NE3
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SH.FSMC_D8_DA8.0=FSMC_D8,16b-d1
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ETH.IPParameters=MediaInterface
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ETH.IPParameters=MediaInterface
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PD10.Signal=FSMC_D15_DA15
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Mcu.Pin59=PC11
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SH.FSMC_A14.ConfNb=1
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Mcu.Pin57=PA14
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Mcu.Pin58=PC10
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PB11.Mode=Asynchronous
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SH.FSMC_A3.0=FSMC_A3,19b-a1
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SH.FSMC_A15.0=FSMC_A15,19b-a1
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SH.FSMC_D5_DA5.ConfNb=1
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Mcu.Pin51=PC9
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SH.FSMC_A10.ConfNb=1
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Mcu.Pin52=PA9
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Mcu.Pin50=PC8
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Mcu.Pin55=PA12
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Mcu.Pin56=PA13
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Mcu.Pin53=PA10
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Mcu.Pin54=PA11
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SH.FSMC_A3.ConfNb=1
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PA9.Signal=USART1_TX
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PB5.Locked=true
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Mcu.Pin48=PG4
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Mcu.Pin49=PG5
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Mcu.Pin46=PG2
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Mcu.Pin47=PG3
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PB10.Signal=USART3_TX
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PA5.Signal=ADCx_IN5
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Mcu.Pin40=PD10
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Mcu.Pin41=PD11
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Mcu.Pin44=PD14
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PC12.Mode=SD_4_bits_Wide_bus
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SH.FSMC_D7_DA7.0=FSMC_D7,16b-d1
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Mcu.Pin45=PD15
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Mcu.Pin42=PD12
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Mcu.Pin43=PD13
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ProjectManager.LastFirmware=true
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SH.FSMC_D3_DA3.ConfNb=1
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NVIC.SPI1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
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VP_TIM13_VS_ClockSourceINT.Mode=Enable_Timer
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PA1.Mode=RMII
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PE14.Signal=FSMC_D11_DA11
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PE15.Signal=FSMC_D12_DA12
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Mcu.Pin37=PB13
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Mcu.Pin38=PD8
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Mcu.Pin35=PB10
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PE8.Signal=FSMC_D5_DA5
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Mcu.Pin36=PB11
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SPI1.Mode=SPI_MODE_MASTER
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SH.FSMC_A18.0=FSMC_A18,19b-a1
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Mcu.Pin39=PD9
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Mcu.Pin30=PE11
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SH.FSMC_A4.0=FSMC_A4,19b-a1
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RCC.EthernetFreq_Value=168000000
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Mcu.Pin33=PE14
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Mcu.Pin34=PE15
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Mcu.Pin31=PE12
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RCC.RCC_RTC_Clock_SourceVirtual=RCC_RTCCLKSOURCE_LSE
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Mcu.Pin32=PE13
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SH.FSMC_A4.ConfNb=1
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NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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PF13.Signal=FSMC_A7
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PA13.Mode=Serial_Wire
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ProjectManager.FreePins=false
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Mcu.Pin26=PE7
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Mcu.Pin27=PE8
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RCC.RTCHSEDivFreq_Value=4000000
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Mcu.Pin24=PG0
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ProjectManager.UnderRoot=false
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Mcu.Pin25=PG1
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SH.FSMC_A17_ALE.0=FSMC_A17,19b-a1
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Mcu.Pin28=PE9
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PC8.Mode=SD_4_bits_Wide_bus
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Mcu.Pin29=PE10
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PB4.Locked=true
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Mcu.Pin22=PF14
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PB5.Signal=SPI1_MOSI
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ETH.MediaInterface=ETH_MEDIA_INTERFACE_RMII
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ETH.MediaInterface=ETH_MEDIA_INTERFACE_RMII
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File.Version=6
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Mcu.Pin23=PF15
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KeepUserPlacement=false
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Mcu.Pin20=PF12
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ADC1.master=1
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Mcu.Pin21=PF13
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NVIC.ForceEnableDMAVector=true
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PD11.Signal=FSMC_A16_CLE
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NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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USART1.VirtualMode=VM_ASYNC
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ProjectManager.CompilerOptimize=6
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PG11.Mode=RMII
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PA11.Signal=USB_OTG_FS_DM
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SH.FSMC_D15_DA15.0=FSMC_D15,16b-d1
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ProjectManager.HeapSize=0x200
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Mcu.Pin15=PA3
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NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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Mcu.Pin16=PA5
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Mcu.Pin13=PA1
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Mcu.Pin14=PA2
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Mcu.Pin19=PC5
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ProjectManager.ComputerToolchain=false
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Mcu.Pin17=PA7
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Mcu.Pin18=PC4
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SH.FSMC_D1_DA1.ConfNb=1
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SH.ADCx_IN5.0=ADC1_IN5,IN5
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NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
|
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SH.FSMC_A5.0=FSMC_A5,19b-a1
|
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Mcu.Pin11=PC2
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Mcu.Pin12=PC3
|
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Mcu.Pin10=PC1
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SH.FSMC_NBL0.ConfNb=1
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SH.ADCx_IN5.ConfNb=1
|
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PF4.Signal=FSMC_A4
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PD2.Signal=SDIO_CMD
|
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PC1.Signal=ETH_MDC
|
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PC1.Mode=RMII
|
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SH.FSMC_A9.ConfNb=1
|
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SH.FSMC_D10_DA10.ConfNb=1
|
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Mcu.Family=STM32F4
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Mcu.Family=STM32F4
|
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PC3.Mode=Full_Duplex_Master
|
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ProjectManager.MainLocation=Src
|
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SH.S_TIM4_CH2.ConfNb=1
|
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RCC.CortexFreq_Value=168000000
|
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SH.FSMC_A12.0=FSMC_A12,19b-a1
|
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ProjectManager.KeepUserCode=true
|
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Mcu.UserName=STM32F407ZGTx
|
||||||
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SH.FSMC_A6.0=FSMC_A6,19b-a1
|
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PG2.Signal=FSMC_A12
|
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PC10.Signal=SDIO_D2
|
||||||
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VP_IWDG_VS_IWDG.Mode=IWDG_Activate
|
||||||
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ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_ETH_Init-ETH-false-HAL-true,6-MX_USART3_UART_Init-USART3-false-HAL-true,7-MX_ADC1_Init-ADC1-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_IWDG_Init-IWDG-false-HAL-true,10-MX_TIM14_Init-TIM14-false-HAL-true,11-MX_TIM13_Init-TIM13-false-HAL-true,12-MX_TIM11_Init-TIM11-false-HAL-true,13-MX_SDIO_SD_Init-SDIO-false-HAL-true,14-MX_TIM2_Init-TIM2-false-HAL-true,15-MX_SPI2_Init-SPI2-false-HAL-true,16-MX_TIM4_Init-TIM4-false-HAL-true,17-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,18-MX_FSMC_Init-FSMC-false-HAL-true
|
||||||
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SH.FSMC_D0_DA0.0=FSMC_D0,16b-d1
|
||||||
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PA11.Mode=Device_Only
|
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PB11.Signal=USART3_RX
|
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PG11.Signal=ETH_TX_EN
|
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ProjectManager.StackSize=0x400
|
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PD13.Signal=FSMC_A18
|
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Mcu.IP4=NVIC
|
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Mcu.IP5=RCC
|
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RCC.FCLKCortexFreq_Value=168000000
|
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Mcu.IP2=FSMC
|
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Mcu.IP3=IWDG
|
||||||
Mcu.IP0=ADC1
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Mcu.IP0=ADC1
|
||||||
Mcu.IP1=ETH
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Mcu.IP1=ETH
|
||||||
Mcu.IP10=TIM2
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PA12.Signal=USB_OTG_FS_DP
|
||||||
Mcu.IP11=TIM4
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SH.FSMC_A11.0=FSMC_A11,19b-a1
|
||||||
Mcu.IP12=TIM11
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Mcu.UserConstants=
|
||||||
Mcu.IP13=TIM13
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RCC.RCC_RTC_Clock_Source=RCC_RTCCLKSOURCE_LSE
|
||||||
Mcu.IP14=TIM14
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SH.FSMC_A7.0=FSMC_A7,19b-a1
|
||||||
Mcu.IP15=USART1
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Mcu.ThirdPartyNb=0
|
||||||
Mcu.IP16=USART3
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RCC.HCLKFreq_Value=168000000
|
||||||
Mcu.IP17=USB_OTG_FS
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Mcu.IPNb=19
|
||||||
Mcu.IP2=IWDG
|
RCC.I2SClocksFreq_Value=192000000
|
||||||
Mcu.IP3=NVIC
|
ProjectManager.PreviousToolchain=
|
||||||
Mcu.IP4=RCC
|
RCC.VcooutputI2S=192000000
|
||||||
Mcu.IP5=RTC
|
PF12.Signal=FSMC_A6
|
||||||
Mcu.IP6=SDIO
|
Mcu.Pin6=PF4
|
||||||
Mcu.IP7=SPI1
|
Mcu.Pin7=PF5
|
||||||
Mcu.IP8=SPI2
|
Mcu.Pin8=PH0-OSC_IN
|
||||||
Mcu.IP9=SYS
|
Mcu.Pin9=PH1-OSC_OUT
|
||||||
Mcu.IPNb=18
|
SH.FSMC_A10.0=FSMC_A10,19b-a1
|
||||||
Mcu.Name=STM32F407Z(E-G)Tx
|
RCC.AHBFreq_Value=168000000
|
||||||
Mcu.Package=LQFP144
|
PH0-OSC_IN.Mode=HSE-External-Oscillator
|
||||||
Mcu.Pin0=PC14-OSC32_IN
|
Mcu.Pin0=PC14-OSC32_IN
|
||||||
Mcu.Pin1=PC15-OSC32_OUT
|
Mcu.Pin1=PC15-OSC32_OUT
|
||||||
Mcu.Pin10=PA5
|
GPIO.groupedBy=Group By Peripherals
|
||||||
Mcu.Pin11=PA7
|
Mcu.Pin2=PF0
|
||||||
Mcu.Pin12=PC4
|
Mcu.Pin3=PF1
|
||||||
Mcu.Pin13=PC5
|
SH.FSMC_D12_DA12.ConfNb=1
|
||||||
Mcu.Pin14=PB10
|
Mcu.Pin4=PF2
|
||||||
Mcu.Pin15=PB11
|
Mcu.Pin5=PF3
|
||||||
Mcu.Pin16=PB13
|
ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_5
|
||||||
Mcu.Pin17=PC8
|
|
||||||
Mcu.Pin18=PC9
|
|
||||||
Mcu.Pin19=PA9
|
|
||||||
Mcu.Pin2=PH0-OSC_IN
|
|
||||||
Mcu.Pin20=PA10
|
|
||||||
Mcu.Pin21=PA11
|
|
||||||
Mcu.Pin22=PA12
|
|
||||||
Mcu.Pin23=PA13
|
|
||||||
Mcu.Pin24=PA14
|
|
||||||
Mcu.Pin25=PC10
|
|
||||||
Mcu.Pin26=PC11
|
|
||||||
Mcu.Pin27=PC12
|
|
||||||
Mcu.Pin28=PD2
|
|
||||||
Mcu.Pin29=PG11
|
|
||||||
Mcu.Pin3=PH1-OSC_OUT
|
|
||||||
Mcu.Pin30=PG13
|
|
||||||
Mcu.Pin31=PG14
|
|
||||||
Mcu.Pin32=PB3
|
|
||||||
Mcu.Pin33=PB4
|
|
||||||
Mcu.Pin34=PB5
|
|
||||||
Mcu.Pin35=PB6
|
|
||||||
Mcu.Pin36=PB7
|
|
||||||
Mcu.Pin37=VP_IWDG_VS_IWDG
|
|
||||||
Mcu.Pin38=VP_RTC_VS_RTC_Activate
|
|
||||||
Mcu.Pin39=VP_SYS_VS_Systick
|
|
||||||
Mcu.Pin4=PC1
|
|
||||||
Mcu.Pin40=VP_TIM2_VS_ClockSourceINT
|
|
||||||
Mcu.Pin41=VP_TIM11_VS_ClockSourceINT
|
|
||||||
Mcu.Pin42=VP_TIM13_VS_ClockSourceINT
|
|
||||||
Mcu.Pin43=VP_TIM14_VS_ClockSourceINT
|
|
||||||
Mcu.Pin5=PC2
|
|
||||||
Mcu.Pin6=PC3
|
|
||||||
Mcu.Pin7=PA1
|
|
||||||
Mcu.Pin8=PA2
|
|
||||||
Mcu.Pin9=PA3
|
|
||||||
Mcu.PinsNb=44
|
|
||||||
Mcu.ThirdPartyNb=0
|
|
||||||
Mcu.UserConstants=
|
|
||||||
Mcu.UserName=STM32F407ZGTx
|
|
||||||
MxCube.Version=5.4.0
|
|
||||||
MxDb.Version=DB.5.0.40
|
|
||||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
|
||||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
|
||||||
NVIC.ForceEnableDMAVector=true
|
|
||||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
|
||||||
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
|
||||||
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
|
||||||
NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true
|
|
||||||
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
|
||||||
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
|
|
||||||
NVIC.SPI1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
|
|
||||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
|
||||||
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
|
|
||||||
NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
|
|
||||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
|
||||||
PA1.Mode=RMII
|
|
||||||
PA1.Signal=ETH_REF_CLK
|
|
||||||
PA10.Mode=Asynchronous
|
|
||||||
PA10.Signal=USART1_RX
|
|
||||||
PA11.Mode=Device_Only
|
|
||||||
PA11.Signal=USB_OTG_FS_DM
|
|
||||||
PA12.Mode=Device_Only
|
|
||||||
PA12.Signal=USB_OTG_FS_DP
|
|
||||||
PA13.Mode=Serial_Wire
|
|
||||||
PA13.Signal=SYS_JTMS-SWDIO
|
|
||||||
PA14.Mode=Serial_Wire
|
|
||||||
PA14.Signal=SYS_JTCK-SWCLK
|
|
||||||
PA2.Mode=RMII
|
|
||||||
PA2.Signal=ETH_MDIO
|
|
||||||
PA3.Signal=S_TIM2_CH4
|
|
||||||
PA5.Locked=true
|
|
||||||
PA5.Signal=ADCx_IN5
|
|
||||||
PA7.Mode=RMII
|
|
||||||
PA7.Signal=ETH_CRS_DV
|
|
||||||
PA9.Mode=Asynchronous
|
|
||||||
PA9.Signal=USART1_TX
|
|
||||||
PB10.Mode=Asynchronous
|
|
||||||
PB10.Signal=USART3_TX
|
|
||||||
PB11.Mode=Asynchronous
|
|
||||||
PB11.Signal=USART3_RX
|
|
||||||
PB13.Mode=Full_Duplex_Master
|
|
||||||
PB13.Signal=SPI2_SCK
|
|
||||||
PB3.Locked=true
|
|
||||||
PB3.Mode=Full_Duplex_Master
|
|
||||||
PB3.Signal=SPI1_SCK
|
|
||||||
PB4.Locked=true
|
|
||||||
PB4.Mode=Full_Duplex_Master
|
|
||||||
PB4.Signal=SPI1_MISO
|
|
||||||
PB5.Locked=true
|
|
||||||
PB5.Mode=Full_Duplex_Master
|
|
||||||
PB5.Signal=SPI1_MOSI
|
|
||||||
PB6.Locked=true
|
|
||||||
PB6.Signal=S_TIM4_CH1
|
|
||||||
PB7.Locked=true
|
|
||||||
PB7.Signal=S_TIM4_CH2
|
|
||||||
PC1.Mode=RMII
|
|
||||||
PC1.Signal=ETH_MDC
|
|
||||||
PC10.Mode=SD_4_bits_Wide_bus
|
|
||||||
PC10.Signal=SDIO_D2
|
|
||||||
PC11.Mode=SD_4_bits_Wide_bus
|
|
||||||
PC11.Signal=SDIO_D3
|
|
||||||
PC12.Mode=SD_4_bits_Wide_bus
|
|
||||||
PC12.Signal=SDIO_CK
|
|
||||||
PC14-OSC32_IN.Mode=LSE-External-Oscillator
|
|
||||||
PC14-OSC32_IN.Signal=RCC_OSC32_IN
|
|
||||||
PC15-OSC32_OUT.Mode=LSE-External-Oscillator
|
|
||||||
PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
|
|
||||||
PC2.Mode=Full_Duplex_Master
|
|
||||||
PC2.Signal=SPI2_MISO
|
|
||||||
PC3.Mode=Full_Duplex_Master
|
|
||||||
PC3.Signal=SPI2_MOSI
|
|
||||||
PC4.Mode=RMII
|
|
||||||
PC4.Signal=ETH_RXD0
|
|
||||||
PC5.Mode=RMII
|
|
||||||
PC5.Signal=ETH_RXD1
|
|
||||||
PC8.Mode=SD_4_bits_Wide_bus
|
|
||||||
PC8.Signal=SDIO_D0
|
|
||||||
PC9.Mode=SD_4_bits_Wide_bus
|
|
||||||
PC9.Signal=SDIO_D1
|
|
||||||
PCC.Checker=false
|
|
||||||
PCC.Line=STM32F407/417
|
|
||||||
PCC.MCU=STM32F407Z(E-G)Tx
|
|
||||||
PCC.PartNumber=STM32F407ZGTx
|
|
||||||
PCC.Seq0=0
|
|
||||||
PCC.Series=STM32F4
|
|
||||||
PCC.Temperature=25
|
|
||||||
PCC.Vdd=3.3
|
|
||||||
PD2.Mode=SD_4_bits_Wide_bus
|
|
||||||
PD2.Signal=SDIO_CMD
|
|
||||||
PG11.Locked=true
|
|
||||||
PG11.Mode=RMII
|
|
||||||
PG11.Signal=ETH_TX_EN
|
|
||||||
PG13.Locked=true
|
|
||||||
PG13.Mode=RMII
|
|
||||||
PG13.Signal=ETH_TXD0
|
|
||||||
PG14.Locked=true
|
|
||||||
PG14.Mode=RMII
|
|
||||||
PG14.Signal=ETH_TXD1
|
|
||||||
PH0-OSC_IN.Mode=HSE-External-Oscillator
|
|
||||||
PH0-OSC_IN.Signal=RCC_OSC_IN
|
|
||||||
PH1-OSC_OUT.Mode=HSE-External-Oscillator
|
|
||||||
PH1-OSC_OUT.Signal=RCC_OSC_OUT
|
|
||||||
PinOutPanel.RotationAngle=0
|
|
||||||
ProjectManager.AskForMigrate=true
|
|
||||||
ProjectManager.BackupPrevious=false
|
|
||||||
ProjectManager.CompilerOptimize=6
|
|
||||||
ProjectManager.ComputerToolchain=false
|
|
||||||
ProjectManager.CoupleFile=false
|
|
||||||
ProjectManager.CustomerFirmwarePackage=
|
|
||||||
ProjectManager.DefaultFWLocation=true
|
|
||||||
ProjectManager.DeletePrevious=true
|
|
||||||
ProjectManager.DeviceId=STM32F407ZGTx
|
|
||||||
ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.24.2
|
|
||||||
ProjectManager.FreePins=false
|
|
||||||
ProjectManager.HalAssertFull=false
|
|
||||||
ProjectManager.HeapSize=0x200
|
|
||||||
ProjectManager.KeepUserCode=true
|
|
||||||
ProjectManager.LastFirmware=true
|
|
||||||
ProjectManager.LibraryCopy=0
|
|
||||||
ProjectManager.MainLocation=Src
|
|
||||||
ProjectManager.NoMain=false
|
|
||||||
ProjectManager.PreviousToolchain=
|
|
||||||
ProjectManager.ProjectBuild=false
|
|
||||||
ProjectManager.ProjectFileName=CubeMX_Config.ioc
|
|
||||||
ProjectManager.ProjectName=CubeMX_Config
|
|
||||||
ProjectManager.StackSize=0x400
|
|
||||||
ProjectManager.TargetToolchain=MDK-ARM V5
|
|
||||||
ProjectManager.ToolChainLocation=
|
|
||||||
ProjectManager.UnderRoot=false
|
|
||||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_ETH_Init-ETH-false-HAL-true,6-MX_USART3_UART_Init-USART3-false-HAL-true,7-MX_ADC1_Init-ADC1-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_IWDG_Init-IWDG-false-HAL-true,10-MX_TIM14_Init-TIM14-false-HAL-true,11-MX_TIM13_Init-TIM13-false-HAL-true,12-MX_TIM11_Init-TIM11-false-HAL-true,13-MX_SDIO_SD_Init-SDIO-false-HAL-true,14-MX_TIM2_Init-TIM2-false-HAL-true,15-MX_SPI2_Init-SPI2-false-HAL-true,16-MX_TIM4_Init-TIM4-false-HAL-true,17-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true
|
|
||||||
RCC.48MHZClocksFreq_Value=48000000
|
|
||||||
RCC.AHBFreq_Value=168000000
|
|
||||||
RCC.APB1CLKDivider=RCC_HCLK_DIV4
|
|
||||||
RCC.APB1Freq_Value=42000000
|
|
||||||
RCC.APB1TimFreq_Value=84000000
|
|
||||||
RCC.APB2CLKDivider=RCC_HCLK_DIV2
|
|
||||||
RCC.APB2Freq_Value=84000000
|
|
||||||
RCC.APB2TimFreq_Value=168000000
|
|
||||||
RCC.CortexFreq_Value=168000000
|
|
||||||
RCC.EthernetFreq_Value=168000000
|
|
||||||
RCC.FCLKCortexFreq_Value=168000000
|
|
||||||
RCC.FamilyName=M
|
|
||||||
RCC.HCLKFreq_Value=168000000
|
|
||||||
RCC.HSE_VALUE=8000000
|
RCC.HSE_VALUE=8000000
|
||||||
RCC.HSI_VALUE=16000000
|
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||||
RCC.I2SClocksFreq_Value=192000000
|
Mcu.IP10=SYS
|
||||||
RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,RCC_RTC_Clock_Source,RCC_RTC_Clock_SourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S
|
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
|
||||||
|
Mcu.IP12=TIM4
|
||||||
|
SH.FSMC_D6_DA6.ConfNb=1
|
||||||
|
Mcu.IP11=TIM2
|
||||||
|
SH.FSMC_A16_CLE.ConfNb=1
|
||||||
|
SH.FSMC_NBL0.0=FSMC_NBL0,2ByteEnable1
|
||||||
|
SH.FSMC_A17_ALE.ConfNb=1
|
||||||
|
Mcu.IP18=USB_OTG_FS
|
||||||
|
Mcu.IP17=USART3
|
||||||
|
Mcu.IP14=TIM13
|
||||||
|
PB4.Mode=Full_Duplex_Master
|
||||||
|
Mcu.IP13=TIM11
|
||||||
|
PE13.Signal=FSMC_D10_DA10
|
||||||
|
Mcu.IP16=USART1
|
||||||
|
SH.FSMC_D14_DA14.0=FSMC_D14,16b-d1
|
||||||
|
Mcu.IP15=TIM14
|
||||||
|
PC14-OSC32_IN.Mode=LSE-External-Oscillator
|
||||||
|
RCC.VCOInputFreq_Value=2000000
|
||||||
|
SH.FSMC_A14.0=FSMC_A14,19b-a1
|
||||||
|
PA14.Mode=Serial_Wire
|
||||||
|
SH.FSMC_D6_DA6.0=FSMC_D6,16b-d1
|
||||||
|
PB5.Mode=Full_Duplex_Master
|
||||||
|
File.Version=6
|
||||||
|
SH.FSMC_D9_DA9.ConfNb=1
|
||||||
|
SH.FSMC_A8.0=FSMC_A8,19b-a1
|
||||||
|
PB7.Signal=S_TIM4_CH2
|
||||||
|
PG13.Mode=RMII
|
||||||
|
ProjectManager.ProjectName=CubeMX_Config
|
||||||
|
SH.FSMC_D4_DA4.0=FSMC_D4,16b-d1
|
||||||
|
PH1-OSC_OUT.Mode=HSE-External-Oscillator
|
||||||
|
SH.FSMC_A2.ConfNb=1
|
||||||
|
PG11.Locked=true
|
||||||
|
SH.FSMC_NBL1.0=FSMC_NBL1,2ByteEnable1
|
||||||
|
NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true
|
||||||
|
ProjectManager.ToolChainLocation=
|
||||||
RCC.LSI_VALUE=32000
|
RCC.LSI_VALUE=32000
|
||||||
RCC.MCO2PinFreq_Value=168000000
|
SH.FSMC_D13_DA13.0=FSMC_D13,16b-d1
|
||||||
RCC.PLLCLKFreq_Value=168000000
|
USB_OTG_FS.VirtualMode=Device_Only
|
||||||
|
SH.FSMC_A13.0=FSMC_A13,19b-a1
|
||||||
|
VP_TIM13_VS_ClockSourceINT.Signal=TIM13_VS_ClockSourceINT
|
||||||
|
SH.FSMC_A13.ConfNb=1
|
||||||
|
PF5.Signal=FSMC_A5
|
||||||
|
SH.FSMC_A9.0=FSMC_A9,19b-a1
|
||||||
|
SH.FSMC_D2_DA2.0=FSMC_D2,16b-d1
|
||||||
|
SH.FSMC_NWE.ConfNb=1
|
||||||
|
SPI2.Direction=SPI_DIRECTION_2LINES
|
||||||
|
PF0.Signal=FSMC_A0
|
||||||
|
PC5.Signal=ETH_RXD1
|
||||||
|
PE7.Signal=FSMC_D4_DA4
|
||||||
|
PB3.Locked=true
|
||||||
|
PB4.Signal=SPI1_MISO
|
||||||
|
Mcu.Pin82=VP_TIM13_VS_ClockSourceINT
|
||||||
|
Mcu.Pin83=VP_TIM14_VS_ClockSourceINT
|
||||||
|
PA3.Signal=S_TIM2_CH4
|
||||||
|
VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
|
||||||
|
PC15-OSC32_OUT.Mode=LSE-External-Oscillator
|
||||||
|
TIM2.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
||||||
|
SH.FSMC_D12_DA12.0=FSMC_D12,16b-d1
|
||||||
|
PA7.Mode=RMII
|
||||||
|
PA10.Mode=Asynchronous
|
||||||
|
VP_TIM14_VS_ClockSourceINT.Signal=TIM14_VS_ClockSourceINT
|
||||||
|
FSMC.WriteOperation1=FSMC_WRITE_OPERATION_ENABLE
|
||||||
|
ProjectManager.NoMain=false
|
||||||
|
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
||||||
|
PG3.Signal=FSMC_A13
|
||||||
|
PG1.Signal=FSMC_A11
|
||||||
|
PC11.Signal=SDIO_D3
|
||||||
|
PC8.Signal=SDIO_D0
|
||||||
|
PC4.Signal=ETH_RXD0
|
||||||
|
PC10.Mode=SD_4_bits_Wide_bus
|
||||||
|
PG10.Mode=NorPsramChipSelect3_1
|
||||||
|
ProjectManager.DefaultFWLocation=true
|
||||||
|
PC2.Mode=Full_Duplex_Master
|
||||||
|
PD9.Signal=FSMC_D14_DA14
|
||||||
|
PD5.Signal=FSMC_NWE
|
||||||
|
SH.FSMC_D11_DA11.ConfNb=1
|
||||||
|
ProjectManager.DeletePrevious=true
|
||||||
|
RCC.FamilyName=M
|
||||||
|
VP_TIM11_VS_ClockSourceINT.Mode=Enable_Timer
|
||||||
|
PA13.Signal=SYS_JTMS-SWDIO
|
||||||
|
SH.FSMC_D13_DA13.ConfNb=1
|
||||||
|
PA9.Mode=Asynchronous
|
||||||
|
ProjectManager.TargetToolchain=MDK-ARM V5
|
||||||
|
SH.FSMC_A18.ConfNb=1
|
||||||
|
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
||||||
|
PF2.Signal=FSMC_A2
|
||||||
|
PE11.Signal=FSMC_D8_DA8
|
||||||
|
PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
|
||||||
|
PA1.Signal=ETH_REF_CLK
|
||||||
|
RCC.VCOI2SOutputFreq_Value=384000000
|
||||||
|
PD2.Mode=SD_4_bits_Wide_bus
|
||||||
|
SH.FSMC_A7.ConfNb=1
|
||||||
|
PG14.Signal=ETH_TXD1
|
||||||
|
board=custom
|
||||||
|
SH.FSMC_D0_DA0.ConfNb=1
|
||||||
|
RCC.VCOOutputFreq_Value=336000000
|
||||||
|
RCC.APB2Freq_Value=84000000
|
||||||
|
MxCube.Version=5.6.0
|
||||||
|
VP_TIM2_VS_ClockSourceINT.Mode=Internal
|
||||||
|
VP_SYS_VS_Systick.Mode=SysTick
|
||||||
|
PH1-OSC_OUT.Signal=RCC_OSC_OUT
|
||||||
|
PF15.Signal=FSMC_A9
|
||||||
|
PF1.Signal=FSMC_A1
|
||||||
|
RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,RCC_RTC_Clock_Source,RCC_RTC_Clock_SourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S
|
||||||
|
ProjectManager.AskForMigrate=true
|
||||||
|
Mcu.Name=STM32F407Z(E-G)Tx
|
||||||
|
PE0.Signal=FSMC_NBL0
|
||||||
|
PE12.Signal=FSMC_D9_DA9
|
||||||
|
PA2.Signal=ETH_MDIO
|
||||||
|
Mcu.IP8=SPI1
|
||||||
|
Mcu.IP9=SPI2
|
||||||
|
PD14.Signal=FSMC_D0_DA0
|
||||||
|
Mcu.IP6=RTC
|
||||||
|
Mcu.IP7=SDIO
|
||||||
|
ProjectManager.CoupleFile=false
|
||||||
|
RCC.48MHZClocksFreq_Value=48000000
|
||||||
|
PB3.Signal=SPI1_SCK
|
||||||
|
RCC.SYSCLKFreq_VALUE=168000000
|
||||||
|
SH.FSMC_A6.ConfNb=1
|
||||||
|
PA12.Mode=Device_Only
|
||||||
|
KeepUserPlacement=false
|
||||||
|
USART3.VirtualMode=VM_ASYNC
|
||||||
|
VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
|
||||||
|
PA14.Signal=SYS_JTCK-SWCLK
|
||||||
|
SH.S_TIM2_CH4.0=TIM2_CH4,PWM Generation4 CH4
|
||||||
|
SH.FSMC_D11_DA11.0=FSMC_D11,16b-d1
|
||||||
|
SH.FSMC_NOE.0=FSMC_NOE,Sram1
|
||||||
|
SH.FSMC_A12.ConfNb=1
|
||||||
|
SH.FSMC_D2_DA2.ConfNb=1
|
||||||
|
RCC.HSI_VALUE=16000000
|
||||||
|
RCC.PLLQ=7
|
||||||
|
ADC1.NbrOfConversionFlag=1
|
||||||
RCC.PLLM=4
|
RCC.PLLM=4
|
||||||
RCC.PLLN=168
|
RCC.PLLN=168
|
||||||
RCC.PLLQ=7
|
PB7.Locked=true
|
||||||
RCC.PLLQCLKFreq_Value=48000000
|
PA2.Mode=RMII
|
||||||
RCC.RCC_RTC_Clock_Source=RCC_RTCCLKSOURCE_LSE
|
PC9.Signal=SDIO_D1
|
||||||
RCC.RCC_RTC_Clock_SourceVirtual=RCC_RTCCLKSOURCE_LSE
|
RCC.APB1Freq_Value=42000000
|
||||||
RCC.RTCFreq_Value=32768
|
ProjectManager.DeviceId=STM32F407ZGTx
|
||||||
RCC.RTCHSEDivFreq_Value=4000000
|
ProjectManager.LibraryCopy=0
|
||||||
RCC.SYSCLKFreq_VALUE=168000000
|
PA7.Signal=ETH_CRS_DV
|
||||||
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
SH.FSMC_A1.ConfNb=1
|
||||||
RCC.VCOI2SOutputFreq_Value=384000000
|
|
||||||
RCC.VCOInputFreq_Value=2000000
|
|
||||||
RCC.VCOOutputFreq_Value=336000000
|
|
||||||
RCC.VcooutputI2S=192000000
|
|
||||||
SH.ADCx_IN5.0=ADC1_IN5,IN5
|
|
||||||
SH.ADCx_IN5.ConfNb=1
|
|
||||||
SH.S_TIM2_CH4.0=TIM2_CH4,PWM Generation4 CH4
|
|
||||||
SH.S_TIM2_CH4.ConfNb=1
|
|
||||||
SH.S_TIM4_CH1.0=TIM4_CH1,Encoder_Interface
|
|
||||||
SH.S_TIM4_CH1.ConfNb=1
|
|
||||||
SH.S_TIM4_CH2.0=TIM4_CH2,Encoder_Interface
|
|
||||||
SH.S_TIM4_CH2.ConfNb=1
|
|
||||||
SPI1.CalculateBaudRate=42.0 MBits/s
|
|
||||||
SPI1.Direction=SPI_DIRECTION_2LINES
|
|
||||||
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
|
||||||
SPI1.Mode=SPI_MODE_MASTER
|
|
||||||
SPI1.VirtualType=VM_MASTER
|
|
||||||
SPI2.CalculateBaudRate=21.0 MBits/s
|
|
||||||
SPI2.Direction=SPI_DIRECTION_2LINES
|
|
||||||
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
|
||||||
SPI2.Mode=SPI_MODE_MASTER
|
|
||||||
SPI2.VirtualType=VM_MASTER
|
|
||||||
TIM2.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
|
||||||
TIM2.IPParameters=Channel-PWM Generation4 CH4
|
|
||||||
USART1.IPParameters=VirtualMode
|
|
||||||
USART1.VirtualMode=VM_ASYNC
|
|
||||||
USART3.IPParameters=VirtualMode
|
|
||||||
USART3.VirtualMode=VM_ASYNC
|
|
||||||
USB_OTG_FS.IPParameters=VirtualMode
|
|
||||||
USB_OTG_FS.VirtualMode=Device_Only
|
|
||||||
VP_IWDG_VS_IWDG.Mode=IWDG_Activate
|
|
||||||
VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
|
|
||||||
VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
|
|
||||||
VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
|
|
||||||
VP_SYS_VS_Systick.Mode=SysTick
|
|
||||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
|
||||||
VP_TIM11_VS_ClockSourceINT.Mode=Enable_Timer
|
|
||||||
VP_TIM11_VS_ClockSourceINT.Signal=TIM11_VS_ClockSourceINT
|
|
||||||
VP_TIM13_VS_ClockSourceINT.Mode=Enable_Timer
|
|
||||||
VP_TIM13_VS_ClockSourceINT.Signal=TIM13_VS_ClockSourceINT
|
|
||||||
VP_TIM14_VS_ClockSourceINT.Mode=Enable_Timer
|
|
||||||
VP_TIM14_VS_ClockSourceINT.Signal=TIM14_VS_ClockSourceINT
|
|
||||||
VP_TIM2_VS_ClockSourceINT.Mode=Internal
|
|
||||||
VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
|
|
||||||
board=custom
|
|
||||||
|
|
|
@ -48,7 +48,7 @@
|
||||||
/* #define HAL_NAND_MODULE_ENABLED */
|
/* #define HAL_NAND_MODULE_ENABLED */
|
||||||
/* #define HAL_NOR_MODULE_ENABLED */
|
/* #define HAL_NOR_MODULE_ENABLED */
|
||||||
/* #define HAL_PCCARD_MODULE_ENABLED */
|
/* #define HAL_PCCARD_MODULE_ENABLED */
|
||||||
/* #define HAL_SRAM_MODULE_ENABLED */
|
#define HAL_SRAM_MODULE_ENABLED
|
||||||
/* #define HAL_SDRAM_MODULE_ENABLED */
|
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||||
/* #define HAL_HASH_MODULE_ENABLED */
|
/* #define HAL_HASH_MODULE_ENABLED */
|
||||||
/* #define HAL_I2C_MODULE_ENABLED */
|
/* #define HAL_I2C_MODULE_ENABLED */
|
||||||
|
@ -69,7 +69,7 @@
|
||||||
/* #define HAL_SMBUS_MODULE_ENABLED */
|
/* #define HAL_SMBUS_MODULE_ENABLED */
|
||||||
/* #define HAL_WWDG_MODULE_ENABLED */
|
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||||
#define HAL_PCD_MODULE_ENABLED
|
#define HAL_PCD_MODULE_ENABLED
|
||||||
#define HAL_HCD_MODULE_ENABLED
|
/* #define HAL_HCD_MODULE_ENABLED */
|
||||||
/* #define HAL_DSI_MODULE_ENABLED */
|
/* #define HAL_DSI_MODULE_ENABLED */
|
||||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||||
|
|
|
@ -897,6 +897,198 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd)
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static uint32_t FSMC_Initialized = 0;
|
||||||
|
|
||||||
|
static void HAL_FSMC_MspInit(void){
|
||||||
|
/* USER CODE BEGIN FSMC_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FSMC_MspInit 0 */
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct ={0};
|
||||||
|
if (FSMC_Initialized) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
FSMC_Initialized = 1;
|
||||||
|
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
__HAL_RCC_FSMC_CLK_ENABLE();
|
||||||
|
|
||||||
|
/** FSMC GPIO Configuration
|
||||||
|
PF0 ------> FSMC_A0
|
||||||
|
PF1 ------> FSMC_A1
|
||||||
|
PF2 ------> FSMC_A2
|
||||||
|
PF3 ------> FSMC_A3
|
||||||
|
PF4 ------> FSMC_A4
|
||||||
|
PF5 ------> FSMC_A5
|
||||||
|
PF12 ------> FSMC_A6
|
||||||
|
PF13 ------> FSMC_A7
|
||||||
|
PF14 ------> FSMC_A8
|
||||||
|
PF15 ------> FSMC_A9
|
||||||
|
PG0 ------> FSMC_A10
|
||||||
|
PG1 ------> FSMC_A11
|
||||||
|
PE7 ------> FSMC_D4
|
||||||
|
PE8 ------> FSMC_D5
|
||||||
|
PE9 ------> FSMC_D6
|
||||||
|
PE10 ------> FSMC_D7
|
||||||
|
PE11 ------> FSMC_D8
|
||||||
|
PE12 ------> FSMC_D9
|
||||||
|
PE13 ------> FSMC_D10
|
||||||
|
PE14 ------> FSMC_D11
|
||||||
|
PE15 ------> FSMC_D12
|
||||||
|
PD8 ------> FSMC_D13
|
||||||
|
PD9 ------> FSMC_D14
|
||||||
|
PD10 ------> FSMC_D15
|
||||||
|
PD11 ------> FSMC_A16
|
||||||
|
PD12 ------> FSMC_A17
|
||||||
|
PD13 ------> FSMC_A18
|
||||||
|
PD14 ------> FSMC_D0
|
||||||
|
PD15 ------> FSMC_D1
|
||||||
|
PG2 ------> FSMC_A12
|
||||||
|
PG3 ------> FSMC_A13
|
||||||
|
PG4 ------> FSMC_A14
|
||||||
|
PG5 ------> FSMC_A15
|
||||||
|
PD0 ------> FSMC_D2
|
||||||
|
PD1 ------> FSMC_D3
|
||||||
|
PD4 ------> FSMC_NOE
|
||||||
|
PD5 ------> FSMC_NWE
|
||||||
|
PG10 ------> FSMC_NE3
|
||||||
|
PE0 ------> FSMC_NBL0
|
||||||
|
PE1 ------> FSMC_NBL1
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
|
||||||
|
|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_13
|
||||||
|
|GPIO_PIN_14|GPIO_PIN_15;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF12_FSMC;
|
||||||
|
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
|
||||||
|
|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_10;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF12_FSMC;
|
||||||
|
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|
||||||
|
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
||||||
|
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF12_FSMC;
|
||||||
|
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|
||||||
|
|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
|
||||||
|
|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF12_FSMC;
|
||||||
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN FSMC_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FSMC_MspInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
|
||||||
|
/* USER CODE BEGIN SRAM_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END SRAM_MspInit 0 */
|
||||||
|
HAL_FSMC_MspInit();
|
||||||
|
/* USER CODE BEGIN SRAM_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END SRAM_MspInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint32_t FSMC_DeInitialized = 0;
|
||||||
|
|
||||||
|
static void HAL_FSMC_MspDeInit(void){
|
||||||
|
/* USER CODE BEGIN FSMC_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FSMC_MspDeInit 0 */
|
||||||
|
if (FSMC_DeInitialized) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
FSMC_DeInitialized = 1;
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
__HAL_RCC_FSMC_CLK_DISABLE();
|
||||||
|
|
||||||
|
/** FSMC GPIO Configuration
|
||||||
|
PF0 ------> FSMC_A0
|
||||||
|
PF1 ------> FSMC_A1
|
||||||
|
PF2 ------> FSMC_A2
|
||||||
|
PF3 ------> FSMC_A3
|
||||||
|
PF4 ------> FSMC_A4
|
||||||
|
PF5 ------> FSMC_A5
|
||||||
|
PF12 ------> FSMC_A6
|
||||||
|
PF13 ------> FSMC_A7
|
||||||
|
PF14 ------> FSMC_A8
|
||||||
|
PF15 ------> FSMC_A9
|
||||||
|
PG0 ------> FSMC_A10
|
||||||
|
PG1 ------> FSMC_A11
|
||||||
|
PE7 ------> FSMC_D4
|
||||||
|
PE8 ------> FSMC_D5
|
||||||
|
PE9 ------> FSMC_D6
|
||||||
|
PE10 ------> FSMC_D7
|
||||||
|
PE11 ------> FSMC_D8
|
||||||
|
PE12 ------> FSMC_D9
|
||||||
|
PE13 ------> FSMC_D10
|
||||||
|
PE14 ------> FSMC_D11
|
||||||
|
PE15 ------> FSMC_D12
|
||||||
|
PD8 ------> FSMC_D13
|
||||||
|
PD9 ------> FSMC_D14
|
||||||
|
PD10 ------> FSMC_D15
|
||||||
|
PD11 ------> FSMC_A16
|
||||||
|
PD12 ------> FSMC_A17
|
||||||
|
PD13 ------> FSMC_A18
|
||||||
|
PD14 ------> FSMC_D0
|
||||||
|
PD15 ------> FSMC_D1
|
||||||
|
PG2 ------> FSMC_A12
|
||||||
|
PG3 ------> FSMC_A13
|
||||||
|
PG4 ------> FSMC_A14
|
||||||
|
PG5 ------> FSMC_A15
|
||||||
|
PD0 ------> FSMC_D2
|
||||||
|
PD1 ------> FSMC_D3
|
||||||
|
PD4 ------> FSMC_NOE
|
||||||
|
PD5 ------> FSMC_NWE
|
||||||
|
PG10 ------> FSMC_NE3
|
||||||
|
PE0 ------> FSMC_NBL0
|
||||||
|
PE1 ------> FSMC_NBL1
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
|
||||||
|
|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_13
|
||||||
|
|GPIO_PIN_14|GPIO_PIN_15);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
|
||||||
|
|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_10);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|
||||||
|
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
||||||
|
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|
||||||
|
|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
|
||||||
|
|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN FSMC_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FSMC_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* hsram){
|
||||||
|
/* USER CODE BEGIN SRAM_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END SRAM_MspDeInit 0 */
|
||||||
|
HAL_FSMC_MspDeInit();
|
||||||
|
/* USER CODE BEGIN SRAM_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END SRAM_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
/* USER CODE BEGIN 1 */
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
/* USER CODE END 1 */
|
/* USER CODE END 1 */
|
||||||
|
|
|
@ -27,6 +27,12 @@ menu "Onboard Peripheral Drivers"
|
||||||
select BSP_USING_UART3
|
select BSP_USING_UART3
|
||||||
default n
|
default n
|
||||||
|
|
||||||
|
config BSP_USING_SRAM
|
||||||
|
bool "Enable SRAM"
|
||||||
|
select BSP_USING_EXT_FMC_IO
|
||||||
|
select BSP_USING_FMC
|
||||||
|
default n
|
||||||
|
|
||||||
config BSP_USING_SPI_FLASH
|
config BSP_USING_SPI_FLASH
|
||||||
bool "Enable SPI FLASH (W25Q128 spi1)"
|
bool "Enable SPI FLASH (W25Q128 spi1)"
|
||||||
select BSP_USING_SPI
|
select BSP_USING_SPI
|
||||||
|
@ -327,6 +333,13 @@ menu "On-chip Peripheral Drivers"
|
||||||
|
|
||||||
endif
|
endif
|
||||||
|
|
||||||
|
config BSP_USING_EXT_FMC_IO
|
||||||
|
bool
|
||||||
|
default n
|
||||||
|
|
||||||
|
config BSP_USING_FMC
|
||||||
|
bool
|
||||||
|
default n
|
||||||
source "../libraries/HAL_Drivers/Kconfig"
|
source "../libraries/HAL_Drivers/Kconfig"
|
||||||
|
|
||||||
endmenu
|
endmenu
|
||||||
|
|
|
@ -21,6 +21,9 @@ if GetDepend(['BSP_USING_SPI_FLASH']):
|
||||||
if GetDepend(['BSP_USING_SDCARD']):
|
if GetDepend(['BSP_USING_SDCARD']):
|
||||||
src += Glob('ports/sdcard_port.c')
|
src += Glob('ports/sdcard_port.c')
|
||||||
|
|
||||||
|
if GetDepend(['BSP_USING_SRAM']):
|
||||||
|
src += Glob('ports/drv_sram.c')
|
||||||
|
|
||||||
path = [cwd]
|
path = [cwd]
|
||||||
path += [cwd + '/CubeMX_Config/Inc']
|
path += [cwd + '/CubeMX_Config/Inc']
|
||||||
path += [cwd + '/ports']
|
path += [cwd + '/ports']
|
||||||
|
|
|
@ -0,0 +1,161 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-02-23 Malongwei first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
#include <rtdevice.h>
|
||||||
|
#include <board.h>
|
||||||
|
|
||||||
|
#ifdef BSP_USING_SRAM
|
||||||
|
#include <sram_port.h>
|
||||||
|
|
||||||
|
#define DRV_DEBUG
|
||||||
|
#define LOG_TAG "drv.sram"
|
||||||
|
#include <drv_log.h>
|
||||||
|
|
||||||
|
#ifdef RT_USING_MEMHEAP_AS_HEAP
|
||||||
|
static struct rt_memheap system_heap;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
static SRAM_HandleTypeDef hsram;
|
||||||
|
|
||||||
|
static int rt_hw_sram_init(void)
|
||||||
|
{
|
||||||
|
int result = RT_EOK;
|
||||||
|
|
||||||
|
FSMC_NORSRAM_TimingTypeDef Timing = {0};
|
||||||
|
|
||||||
|
/** Perform the SRAM2 memory initialization sequence
|
||||||
|
*/
|
||||||
|
hsram.Instance = FSMC_NORSRAM_DEVICE;
|
||||||
|
hsram.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
|
||||||
|
/* hsram.Init */
|
||||||
|
hsram.Init.NSBank = FSMC_NORSRAM_BANK3;
|
||||||
|
hsram.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
|
||||||
|
hsram.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
|
||||||
|
#if SRAM_DATA_WIDTH == 8
|
||||||
|
hsram.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_8;
|
||||||
|
#elif SRAM_DATA_WIDTH == 16
|
||||||
|
hsram.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
|
||||||
|
#else
|
||||||
|
hsram.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_32;
|
||||||
|
#endif
|
||||||
|
hsram.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
|
||||||
|
hsram.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
|
||||||
|
hsram.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
|
||||||
|
hsram.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
|
||||||
|
hsram.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
|
||||||
|
hsram.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
|
||||||
|
hsram.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
|
||||||
|
hsram.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
|
||||||
|
hsram.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
|
||||||
|
hsram.Init.PageSize = FSMC_PAGE_SIZE_NONE;
|
||||||
|
|
||||||
|
|
||||||
|
/* Timing */
|
||||||
|
Timing.AddressSetupTime = 0;
|
||||||
|
Timing.AddressHoldTime = 0;
|
||||||
|
Timing.DataSetupTime = 8;
|
||||||
|
Timing.BusTurnAroundDuration = 0;
|
||||||
|
Timing.CLKDivision = 0;
|
||||||
|
Timing.DataLatency = 0;
|
||||||
|
Timing.AccessMode = FSMC_ACCESS_MODE_A;
|
||||||
|
/* ExtTiming */
|
||||||
|
|
||||||
|
if (HAL_SRAM_Init(&hsram, &Timing, &Timing) != HAL_OK)
|
||||||
|
{
|
||||||
|
LOG_E("SRAM init failed!");
|
||||||
|
result = -RT_ERROR;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
LOG_D("sram init success, mapped at 0x%X, size is %d bytes, data width is %d", SRAM_BANK_ADDR, SRAM_SIZE, SRAM_DATA_WIDTH);
|
||||||
|
#ifdef RT_USING_MEMHEAP_AS_HEAP
|
||||||
|
/* If RT_USING_MEMHEAP_AS_HEAP is enabled, SRAM is initialized to the heap */
|
||||||
|
rt_memheap_init(&system_heap, "sram", (void *)SRAM_BANK_ADDR, SRAM_SIZE);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
return result;
|
||||||
|
}
|
||||||
|
INIT_BOARD_EXPORT(rt_hw_sram_init);
|
||||||
|
|
||||||
|
#ifdef DRV_DEBUG
|
||||||
|
#ifdef FINSH_USING_MSH
|
||||||
|
static int sram_test(void)
|
||||||
|
{
|
||||||
|
int i = 0;
|
||||||
|
uint32_t start_time = 0, time_cast = 0;
|
||||||
|
#if SRAM_DATA_WIDTH == 8
|
||||||
|
char data_width = 1;
|
||||||
|
uint8_t data = 0;
|
||||||
|
#elif SRAM_DATA_WIDTH == 16
|
||||||
|
char data_width = 2;
|
||||||
|
uint16_t data = 0;
|
||||||
|
#else
|
||||||
|
char data_width = 4;
|
||||||
|
uint32_t data = 0;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* write data */
|
||||||
|
LOG_D("Writing the %ld bytes data, waiting....", SRAM_SIZE);
|
||||||
|
start_time = rt_tick_get();
|
||||||
|
for (i = 0; i < SRAM_SIZE / data_width; i++)
|
||||||
|
{
|
||||||
|
#if SRAM_DATA_WIDTH == 8
|
||||||
|
*(__IO uint8_t *)(SRAM_BANK_ADDR + i * data_width) = (uint8_t)0x55;
|
||||||
|
#elif SRAM_DATA_WIDTH == 16
|
||||||
|
*(__IO uint16_t *)(SRAM_BANK_ADDR + i * data_width) = (uint16_t)0x5555;
|
||||||
|
#else
|
||||||
|
*(__IO uint32_t *)(SRAM_BANK_ADDR + i * data_width) = (uint32_t)0x55555555;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
time_cast = rt_tick_get() - start_time;
|
||||||
|
LOG_D("Write data success, total time: %d.%03dS.", time_cast / RT_TICK_PER_SECOND,
|
||||||
|
time_cast % RT_TICK_PER_SECOND / ((RT_TICK_PER_SECOND * 1 + 999) / 1000));
|
||||||
|
|
||||||
|
/* read data */
|
||||||
|
LOG_D("start Reading and verifying data, waiting....");
|
||||||
|
for (i = 0; i < SRAM_SIZE / data_width; i++)
|
||||||
|
{
|
||||||
|
#if SRAM_DATA_WIDTH == 8
|
||||||
|
data = *(__IO uint8_t *)(SRAM_BANK_ADDR + i * data_width);
|
||||||
|
if (data != 0x55)
|
||||||
|
{
|
||||||
|
LOG_E("SRAM test failed!");
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
#elif SRAM_DATA_WIDTH == 16
|
||||||
|
data = *(__IO uint16_t *)(SRAM_BANK_ADDR + i * data_width);
|
||||||
|
if (data != 0x5555)
|
||||||
|
{
|
||||||
|
LOG_E("SRAM test failed!");
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
data = *(__IO uint32_t *)(SRAM_BANK_ADDR + i * data_width);
|
||||||
|
if (data != 0x55555555)
|
||||||
|
{
|
||||||
|
LOG_E("SRAM test failed!");
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
if (i >= SRAM_SIZE / data_width)
|
||||||
|
{
|
||||||
|
LOG_D("SRAM test success!");
|
||||||
|
}
|
||||||
|
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
MSH_CMD_EXPORT(sram_test, sram test);
|
||||||
|
#endif /* FINSH_USING_MSH */
|
||||||
|
#endif /* DRV_DEBUG */
|
||||||
|
#endif /* BSP_USING_SRAM */
|
|
@ -0,0 +1,22 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-02-23 Malongwei first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __SRAM_PORT_H__
|
||||||
|
#define __SRAM_PORT_H__
|
||||||
|
|
||||||
|
/* parameters for sram peripheral */
|
||||||
|
/* stm32f4 Bank3:0X68000000 */
|
||||||
|
#define SRAM_BANK_ADDR ((uint32_t)0X68000000)
|
||||||
|
/* data width: 8, 16, 32 */
|
||||||
|
#define SRAM_DATA_WIDTH 16
|
||||||
|
/* sram size */
|
||||||
|
#define SRAM_SIZE ((uint32_t)0x00100000)
|
||||||
|
|
||||||
|
#endif
|
Loading…
Reference in New Issue