[atomic] add stdc atomic detection. (#7536)
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1e5dc5509e
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@ -348,7 +348,7 @@ jobs:
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if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-riscv64-unknown-elf' && success() }}
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run: |
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wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.4/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz
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sudo tar zxvf riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz -C /opt
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sudo tar zxf riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz -C /opt
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/opt/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-gcc --version
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echo "RTT_EXEC_PATH=/opt/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin" >> $GITHUB_ENV
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@ -356,7 +356,7 @@ jobs:
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if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-riscv-none-embed' && success() }}
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run: |
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wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.5/xpack-riscv-none-embed-gcc-8.3.0-2.3-linux-x64.tar.gz
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sudo tar zxvf xpack-riscv-none-embed-gcc-8.3.0-2.3-linux-x64.tar.gz -C /opt
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sudo tar zxf xpack-riscv-none-embed-gcc-8.3.0-2.3-linux-x64.tar.gz -C /opt
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/opt/xpack-riscv-none-embed-gcc-8.3.0-2.3/bin/riscv-none-embed-gcc --version
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echo "RTT_EXEC_PATH=/opt/xpack-riscv-none-embed-gcc-8.3.0-2.3/bin" >> $GITHUB_ENV
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@ -6,10 +6,13 @@
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* Change Logs:
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* Date Author Notes
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* 2023-03-14 WangShun first version
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* 2023-05-20 Bernard add stdc atomic detection.
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*/
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#ifndef __RT_ATOMIC_H__
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#define __RT_ATOMIC_H__
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#if !defined(__cplusplus)
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rt_atomic_t rt_hw_atomic_load(volatile rt_atomic_t *ptr);
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void rt_hw_atomic_store(volatile rt_atomic_t *ptr, rt_atomic_t val);
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rt_atomic_t rt_hw_atomic_add(volatile rt_atomic_t *ptr, rt_atomic_t val);
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@ -20,9 +23,30 @@ rt_atomic_t rt_hw_atomic_xor(volatile rt_atomic_t *ptr, rt_atomic_t val);
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rt_atomic_t rt_hw_atomic_exchange(volatile rt_atomic_t *ptr, rt_atomic_t val);
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void rt_hw_atomic_flag_clear(volatile rt_atomic_t *ptr);
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rt_atomic_t rt_hw_atomic_flag_test_and_set(volatile rt_atomic_t *ptr);
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rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_atomic_t *old, rt_atomic_t new);
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rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_atomic_t *expected, rt_atomic_t desired);
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/* To detect stdatomic */
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#if !defined(RT_USING_HW_ATOMIC) && !defined(RT_USING_STDC_ATOMIC)
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#if defined(__GNUC__) && defined(RT_USING_LIBC) && !defined(__STDC_NO_ATOMICS__)
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#define RT_USING_STDC_ATOMIC
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#endif /* __GNUC__ && .. */
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#endif /* !RT_USING_HW_ATOMIC && !RT_USING_STDC_ATOMIC */
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#if defined(RT_USING_HW_ATOMIC)
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#define rt_atomic_load(ptr) rt_hw_atomic_load(ptr)
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#define rt_atomic_store(ptr, v) rt_hw_atomic_store(ptr, v)
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#define rt_atomic_add(ptr, v) rt_hw_atomic_add(ptr, v)
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#define rt_atomic_sub(ptr, v) rt_hw_atomic_sub(ptr, v)
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#define rt_atomic_and(ptr, v) rt_hw_atomic_and(ptr, v)
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#define rt_atomic_or(ptr, v) rt_hw_atomic_or(ptr, v)
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#define rt_atomic_xor(ptr, v) rt_hw_atomic_xor(ptr, v)
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#define rt_atomic_exchange(ptr, v) rt_hw_atomic_exchange(ptr, v)
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#define rt_atomic_flag_clear(ptr) rt_hw_atomic_flag_clear(ptr)
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#define rt_atomic_flag_test_and_set(ptr) rt_hw_atomic_flag_test_and_set(ptr)
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#define rt_atomic_compare_exchange_strong(ptr, v,des) rt_hw_atomic_compare_exchange_strong(ptr, v ,des)
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#elif defined(RT_USING_STDC_ATOMIC)
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#if defined(RT_USING_STDC_ATOMIC)
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#ifndef __STDC_NO_ATOMICS__
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#define rt_atomic_load(ptr) atomic_load(ptr)
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#define rt_atomic_store(ptr, v) atomic_store(ptr, v)
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@ -38,18 +62,7 @@ rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_a
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#else
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#error "The standard library C doesn't support the atomic operation"
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#endif /* __STDC_NO_ATOMICS__ */
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#elif defined(RT_USING_HW_ATOMIC)
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#define rt_atomic_load(ptr) rt_hw_atomic_load(ptr)
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#define rt_atomic_store(ptr, v) rt_hw_atomic_store(ptr, v)
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#define rt_atomic_add(ptr, v) rt_hw_atomic_add(ptr, v)
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#define rt_atomic_sub(ptr, v) rt_hw_atomic_sub(ptr, v)
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#define rt_atomic_and(ptr, v) rt_hw_atomic_and(ptr, v)
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#define rt_atomic_or(ptr, v) rt_hw_atomic_or(ptr, v)
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#define rt_atomic_xor(ptr, v) rt_hw_atomic_xor(ptr, v)
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#define rt_atomic_exchange(ptr, v) rt_hw_atomic_exchange(ptr, v)
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#define rt_atomic_flag_clear(ptr) rt_hw_atomic_flag_clear(ptr)
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#define rt_atomic_flag_test_and_set(ptr) rt_hw_atomic_flag_test_and_set(ptr)
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#define rt_atomic_compare_exchange_strong(ptr, v,des) rt_hw_atomic_compare_exchange_strong(ptr, v ,des)
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#else
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#include <rthw.h>
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#define rt_atomic_load(ptr) rt_soft_atomic_load(ptr)
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@ -192,4 +205,7 @@ rt_inline rt_atomic_t rt_soft_atomic_compare_exchange_strong(volatile rt_atomic_
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return temp;
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}
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#endif /* RT_USING_STDC_ATOMIC */
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#endif /* __cplusplus */
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#endif /* __RT_ATOMIC_H__ */
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@ -48,6 +48,7 @@
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* 2022-09-12 Meco Man define rt_ssize_t
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* 2022-12-20 Meco Man add const name for rt_object
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* 2023-04-01 Chushicheng change version number to v5.0.1
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* 2023-05-20 Bernard add stdc atomic detection.
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*/
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#ifndef __RT_DEF_H__
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@ -126,12 +127,24 @@ typedef rt_base_t rt_flag_t; /**< Type for flags */
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typedef rt_ubase_t rt_dev_t; /**< Type for device */
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typedef rt_base_t rt_off_t; /**< Type for offset */
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#if !defined(__cplusplus)
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#if defined(RT_USING_STDC_ATOMIC)
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#include <stdatomic.h>
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typedef atomic_size_t rt_atomic_t;
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#include <stdatomic.h>
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typedef atomic_size_t rt_atomic_t;
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#elif defined(RT_USING_HW_ATOMIC)
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typedef volatile rt_base_t rt_atomic_t;
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#else
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typedef volatile rt_base_t rt_atomic_t;
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#endif
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/* To detect std atomic */
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#if defined(RT_USING_LIBC) && defined(__GNUC__) && !defined(__STDC_NO_ATOMICS__)
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#include <stdatomic.h>
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typedef atomic_size_t rt_atomic_t;
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#else
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typedef volatile rt_base_t rt_atomic_t;
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#endif /* __GNUC__ && !__STDC_NO_ATOMICS__ */
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#endif /* RT_USING_STDC_ATOMIC */
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#endif /* __cplusplus */
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/* boolean type definitions */
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#define RT_TRUE 1 /**< boolean true */
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@ -17,6 +17,7 @@
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* 2021-02-28 Meco Man add RT_KSERVICE_USING_STDLIB
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* 2021-11-14 Meco Man add rtlegacy.h for compatibility
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* 2022-06-04 Meco Man remove strnlen
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* 2023-05-20 Bernard add rtatomic.h header file to included files.
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*/
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#ifndef __RT_THREAD_H__
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@ -27,6 +28,7 @@
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#include <rtdef.h>
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#include <rtservice.h>
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#include <rtm.h>
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#include <rtatomic.h>
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#ifdef RT_USING_LEGACY
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#include <rtlegacy.h>
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#endif
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@ -166,7 +166,6 @@ config ARCH_ARMV8
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bool
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select ARCH_ARM
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select ARCH_ARM_MMU
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select RT_USING_HW_ATOMIC
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config ARCH_MIPS
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bool
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@ -166,7 +166,7 @@ rt_atomic_t rt_hw_atomic_flag_test_and_set(volatile rt_atomic_t *ptr)
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return oldval;
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}
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rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, volatile rt_atomic_t *old, rt_atomic_t new)
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rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_atomic_t *old, rt_atomic_t new)
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{
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rt_atomic_t result;
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rt_atomic_t temp = *old;
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@ -12,7 +12,7 @@
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rt_atomic_t rt_hw_atomic_exchange(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t result;
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rt_atomic_t result = 0;
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#if __riscv_xlen == 32
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asm volatile ("amoswap.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory");
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#elif __riscv_xlen == 64
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@ -23,7 +23,7 @@ rt_atomic_t rt_hw_atomic_exchange(volatile rt_atomic_t *ptr, rt_atomic_t val)
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rt_atomic_t rt_hw_atomic_add(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t result;
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rt_atomic_t result = 0;
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#if __riscv_xlen == 32
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asm volatile ("amoadd.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory");
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#elif __riscv_xlen == 64
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@ -34,7 +34,7 @@ rt_atomic_t rt_hw_atomic_add(volatile rt_atomic_t *ptr, rt_atomic_t val)
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rt_atomic_t rt_hw_atomic_sub(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t result;
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rt_atomic_t result = 0;
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val = -val;
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#if __riscv_xlen == 32
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asm volatile ("amoadd.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory");
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@ -46,7 +46,7 @@ rt_atomic_t rt_hw_atomic_sub(volatile rt_atomic_t *ptr, rt_atomic_t val)
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rt_atomic_t rt_hw_atomic_xor(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t result;
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rt_atomic_t result = 0;
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#if __riscv_xlen == 32
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asm volatile ("amoxor.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory");
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#elif __riscv_xlen == 64
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@ -57,7 +57,7 @@ rt_atomic_t rt_hw_atomic_xor(volatile rt_atomic_t *ptr, rt_atomic_t val)
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rt_atomic_t rt_hw_atomic_and(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t result;
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rt_atomic_t result = 0;
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#if __riscv_xlen == 32
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asm volatile ("amoand.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory");
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#elif __riscv_xlen == 64
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@ -68,7 +68,7 @@ rt_atomic_t rt_hw_atomic_and(volatile rt_atomic_t *ptr, rt_atomic_t val)
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rt_atomic_t rt_hw_atomic_or(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t result;
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rt_atomic_t result = 0;
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#if __riscv_xlen == 32
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asm volatile ("amoor.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory");
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#elif __riscv_xlen == 64
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@ -79,7 +79,7 @@ rt_atomic_t rt_hw_atomic_or(volatile rt_atomic_t *ptr, rt_atomic_t val)
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rt_atomic_t rt_hw_atomic_load(volatile rt_atomic_t *ptr)
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{
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rt_atomic_t result;
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rt_atomic_t result = 0;
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#if __riscv_xlen == 32
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asm volatile ("amoxor.w %0, x0, (%1)" : "=r"(result) : "r"(ptr) : "memory");
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#elif __riscv_xlen == 64
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@ -90,7 +90,7 @@ rt_atomic_t rt_hw_atomic_load(volatile rt_atomic_t *ptr)
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void rt_hw_atomic_store(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t result;
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rt_atomic_t result = 0;
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#if __riscv_xlen == 32
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asm volatile ("amoswap.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory");
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#elif __riscv_xlen == 64
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@ -100,7 +100,7 @@ void rt_hw_atomic_store(volatile rt_atomic_t *ptr, rt_atomic_t val)
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rt_atomic_t rt_hw_atomic_flag_test_and_set(volatile rt_atomic_t *ptr)
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{
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rt_atomic_t result;
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rt_atomic_t result = 0;
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rt_atomic_t temp = 1;
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#if __riscv_xlen == 32
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asm volatile ("amoor.w %0, %1, (%2)" : "=r"(result) : "r"(temp), "r"(ptr) : "memory");
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void rt_hw_atomic_flag_clear(volatile rt_atomic_t *ptr)
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{
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rt_atomic_t result;
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rt_atomic_t result = 0;
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#if __riscv_xlen == 32
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asm volatile ("amoand.w %0, x0, (%1)" : "=r"(result) :"r"(ptr) : "memory");
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#elif __riscv_xlen == 64
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@ -120,16 +120,16 @@ void rt_hw_atomic_flag_clear(volatile rt_atomic_t *ptr)
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#endif
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}
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rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, volatile rt_atomic_t *old, rt_atomic_t new)
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rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_atomic_t *old, rt_atomic_t desired)
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{
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rt_atomic_t tmp = *old;
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rt_atomic_t result;
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rt_atomic_t result = 0;
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#if __riscv_xlen == 32
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asm volatile(
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" fence iorw, ow\n"
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"1: lr.w.aq %[result], (%[ptr])\n"
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" bne %[result], %[tmp], 2f\n"
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" sc.w.rl %[tmp], %[new], (%[ptr])\n"
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" sc.w.rl %[tmp], %[desired], (%[ptr])\n"
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" bnez %[tmp], 1b\n"
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" li %[result], 1\n"
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" j 3f\n"
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" li %[result], 0\n"
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" 3:\n"
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: [result]"+r" (result), [tmp]"+r" (tmp), [ptr]"+r" (ptr)
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: [new]"r" (new), [old]"r"(old)
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: [desired]"r" (desired), [old]"r"(old)
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: "memory");
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#elif __riscv_xlen == 64
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asm volatile(
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" fence iorw, ow\n"
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"1: lr.d.aq %[result], (%[ptr])\n"
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" bne %[result], %[tmp], 2f\n"
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" sc.d.rl %[tmp], %[new], (%[ptr])\n"
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" sc.d.rl %[tmp], %[desired], (%[ptr])\n"
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" bnez %[tmp], 1b\n"
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" li %[result], 1\n"
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" j 3f\n"
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" li %[result], 0\n"
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" 3:\n"
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: [result]"+r" (result), [tmp]"+r" (tmp), [ptr]"+r" (ptr)
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: [new]"r" (new), [old]"r"(old)
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: [desired]"r" (desired), [old]"r"(old)
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: "memory");
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#endif
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return result;
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