Change license, update Readme and fixed some compability issues
This commit is contained in:
parent
82cc9a9eae
commit
48ca812dbc
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@ -1,11 +1,7 @@
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/*
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/*
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* File : drv_cache.c
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* Copyright (c) 2006-2018, RT-Thread Development Team
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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*
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* The license and distribution terms for this file may be
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* SPDX-License-Identifier: Apache-2.0
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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*
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* Change Logs:
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* Change Logs:
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* Date Author Notes
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* Date Author Notes
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@ -1,3 +1,13 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-03-11 JiCheng Adapt RT1020's IO MAP
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*/
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#include <rthw.h>
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <rtdevice.h>
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@ -55,21 +65,21 @@ static void _InitPins(void)
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{
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{
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL, 1);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA, 1);
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IOMUXC_SetPinConfig( IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 0xD8B0u);
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IOMUXC_SetPinConfig( IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL, 0xD8B0u);
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IOMUXC_SetPinConfig( IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 0xD8B0u);
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IOMUXC_SetPinConfig( IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA, 0xD8B0u);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_SAI1_MCLK, 1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_SAI1_MCLK, 1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00, 1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_03_SAI1_TX_DATA00, 1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK, 1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_SAI1_TX_BCLK, 1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC, 1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_SAI1_TX_SYNC, 1U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_09_SAI1_MCLK, 0x10B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_00_SAI1_MCLK, 0x10B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00, 0x10B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_03_SAI1_TX_DATA00, 0x10B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK, 0x10B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_01_SAI1_TX_BCLK, 0x10B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC, 0x10B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_02_SAI1_TX_SYNC, 0x10B0u);
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}
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}
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static void BOARD_EnableSaiMclkOutput(bool enable)
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static void BOARD_EnableSaiMclkOutput(bool enable)
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@ -1,3 +1,11 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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*/
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#ifndef __DRV_CODEC_H__
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#ifndef __DRV_CODEC_H__
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#define __DRV_CODEC_H__
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#define __DRV_CODEC_H__
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@ -1,15 +1,12 @@
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/*
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/*
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* File : application.c
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* Copyright (c) 2006-2018, RT-Thread Development Team
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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*
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* The license and distribution terms for this file may be
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* SPDX-License-Identifier: Apache-2.0
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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*
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* Change Logs:
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* Change Logs:
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* Date Author Notes
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* Date Author Notes
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* 2017-06-08 tanek first implementation
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* 2017-06-08 tanek first implementation
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* 2019-03-11 JiCheng Adapt RT1020's IO MAP
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*/
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*/
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#include <rtthread.h>
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#include <rtthread.h>
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#include "board.h"
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#include "board.h"
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@ -386,13 +383,13 @@ static void _enet_config(void)
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/* Set SMI to get PHY link status. */
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/* Set SMI to get PHY link status. */
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sysClock = CLOCK_GetFreq(kCLOCK_AhbClk);
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sysClock = CLOCK_GetFreq(kCLOCK_AhbClk);
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dbg_log(DBG_LOG, "deinit\n");
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LOG_D("deinit\n");
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ENET_Deinit(imxrt_eth_device.enet_base);
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ENET_Deinit(imxrt_eth_device.enet_base);
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dbg_log(DBG_LOG, "init\n");
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LOG_D("init\n");
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ENET_Init(imxrt_eth_device.enet_base, &imxrt_eth_device.enet_handle, &config, &buffConfig, &imxrt_eth_device.dev_addr[0], sysClock);
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ENET_Init(imxrt_eth_device.enet_base, &imxrt_eth_device.enet_handle, &config, &buffConfig, &imxrt_eth_device.dev_addr[0], sysClock);
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dbg_log(DBG_LOG, "set call back\n");
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LOG_D("set call back\n");
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ENET_SetCallback(&imxrt_eth_device.enet_handle, _enet_callback, &imxrt_eth_device);
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ENET_SetCallback(&imxrt_eth_device.enet_handle, _enet_callback, &imxrt_eth_device);
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dbg_log(DBG_LOG, "active read\n");
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LOG_D("active read\n");
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ENET_ActiveRead(imxrt_eth_device.enet_base);
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ENET_ActiveRead(imxrt_eth_device.enet_base);
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}
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}
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/* initialize the interface */
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/* initialize the interface */
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static rt_err_t rt_imxrt_eth_init(rt_device_t dev)
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static rt_err_t rt_imxrt_eth_init(rt_device_t dev)
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{
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{
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dbg_log(DBG_LOG, "rt_imxrt_eth_init...\n");
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LOG_D("rt_imxrt_eth_init...\n");
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_enet_config();
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_enet_config();
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return RT_EOK;
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return RT_EOK;
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static rt_err_t rt_imxrt_eth_open(rt_device_t dev, rt_uint16_t oflag)
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static rt_err_t rt_imxrt_eth_open(rt_device_t dev, rt_uint16_t oflag)
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{
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{
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dbg_log(DBG_LOG, "rt_imxrt_eth_open...\n");
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LOG_D("rt_imxrt_eth_open...\n");
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return RT_EOK;
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return RT_EOK;
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}
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}
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static rt_err_t rt_imxrt_eth_close(rt_device_t dev)
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static rt_err_t rt_imxrt_eth_close(rt_device_t dev)
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{
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{
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dbg_log(DBG_LOG, "rt_imxrt_eth_close...\n");
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LOG_D("rt_imxrt_eth_close...\n");
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return RT_EOK;
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return RT_EOK;
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}
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}
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static rt_size_t rt_imxrt_eth_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
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static rt_size_t rt_imxrt_eth_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
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{
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{
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dbg_log(DBG_LOG, "rt_imxrt_eth_read...\n");
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LOG_D("rt_imxrt_eth_read...\n");
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rt_set_errno(-RT_ENOSYS);
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rt_set_errno(-RT_ENOSYS);
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return 0;
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return 0;
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}
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}
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static rt_size_t rt_imxrt_eth_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
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static rt_size_t rt_imxrt_eth_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
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{
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{
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dbg_log(DBG_LOG, "rt_imxrt_eth_write...\n");
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LOG_D("rt_imxrt_eth_write...\n");
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rt_set_errno(-RT_ENOSYS);
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rt_set_errno(-RT_ENOSYS);
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return 0;
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return 0;
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}
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}
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static rt_err_t rt_imxrt_eth_control(rt_device_t dev, int cmd, void *args)
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static rt_err_t rt_imxrt_eth_control(rt_device_t dev, int cmd, void *args)
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{
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{
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dbg_log(DBG_LOG, "rt_imxrt_eth_control...\n");
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LOG_D("rt_imxrt_eth_control...\n");
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switch (cmd)
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switch (cmd)
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{
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{
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case NIOCTL_GADDR:
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case NIOCTL_GADDR:
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@ -679,7 +676,7 @@ rt_err_t rt_imxrt_eth_tx(rt_device_t dev, struct pbuf *p)
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RT_ASSERT(p != NULL);
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RT_ASSERT(p != NULL);
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RT_ASSERT(enet_handle != RT_NULL);
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RT_ASSERT(enet_handle != RT_NULL);
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dbg_log(DBG_LOG, "rt_imxrt_eth_tx: %d\n", p->len);
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LOG_D("rt_imxrt_eth_tx: %d\n", p->len);
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#ifdef ETH_TX_DUMP
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#ifdef ETH_TX_DUMP
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packet_dump("send", p);
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packet_dump("send", p);
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}
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}
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else
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else
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{
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{
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dbg_log(DBG_LOG, " A frame read failed\n");
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LOG_D(" A frame read failed\n");
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pbuf_free(p);
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pbuf_free(p);
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}
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}
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}
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}
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else
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else
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{
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{
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dbg_log(DBG_LOG, " pbuf_alloc faild\n");
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LOG_D(" pbuf_alloc faild\n");
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}
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}
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}
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}
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else if (status == kStatus_ENET_RxFrameError)
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else if (status == kStatus_ENET_RxFrameError)
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{
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{
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dbg_log(DBG_WARNING, "ENET_GetRxFrameSize: kStatus_ENET_RxFrameError\n");
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LOG_W("ENET_GetRxFrameSize: kStatus_ENET_RxFrameError\n");
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/* Update the received buffer when error happened. */
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/* Update the received buffer when error happened. */
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/* Get the error information of the received g_frame. */
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/* Get the error information of the received g_frame. */
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ENET_GetRxErrBeforeReadFrame(enet_handle, error_statistic);
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ENET_GetRxErrBeforeReadFrame(enet_handle, error_statistic);
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@ -782,20 +779,20 @@ static void phy_monitor_thread_entry(void *parameter)
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if (kPHY_Speed10M == speed)
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if (kPHY_Speed10M == speed)
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{
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{
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dbg_log(DBG_LOG, "10M\n");
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LOG_D("10M\n");
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}
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}
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else
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else
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{
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{
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dbg_log(DBG_LOG, "100M\n");
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LOG_D("100M\n");
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}
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}
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if (kPHY_HalfDuplex == duplex)
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if (kPHY_HalfDuplex == duplex)
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{
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{
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dbg_log(DBG_LOG, "half dumplex\n");
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LOG_D("half dumplex\n");
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}
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}
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else
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else
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{
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{
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dbg_log(DBG_LOG, "full dumplex\n");
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LOG_D("full dumplex\n");
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}
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}
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if ((imxrt_eth_device.speed != (enet_mii_speed_t)speed)
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if ((imxrt_eth_device.speed != (enet_mii_speed_t)speed)
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imxrt_eth_device.speed = (enet_mii_speed_t)speed;
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imxrt_eth_device.speed = (enet_mii_speed_t)speed;
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imxrt_eth_device.duplex = (enet_mii_duplex_t)duplex;
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imxrt_eth_device.duplex = (enet_mii_duplex_t)duplex;
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dbg_log(DBG_LOG, "link up, and update eth mode.\n");
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LOG_D("link up, and update eth mode.\n");
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rt_imxrt_eth_init((rt_device_t)&imxrt_eth_device);
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rt_imxrt_eth_init((rt_device_t)&imxrt_eth_device);
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}
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}
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else
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else
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{
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{
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dbg_log(DBG_LOG, "link up, eth not need re-config.\n");
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LOG_D("link up, eth not need re-config.\n");
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}
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}
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dbg_log(DBG_LOG, "link up.\n");
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LOG_D("link up.\n");
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eth_device_linkchange(&imxrt_eth_device.parent, RT_TRUE);
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eth_device_linkchange(&imxrt_eth_device.parent, RT_TRUE);
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}
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}
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else // link down
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else // link down
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{
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{
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dbg_log(DBG_LOG, "link down.\n");
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LOG_D("link down.\n");
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eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);
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eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);
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}
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}
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}
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}
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@ -858,20 +855,20 @@ static int rt_hw_imxrt_eth_init(void)
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imxrt_eth_device.parent.eth_rx = rt_imxrt_eth_rx;
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imxrt_eth_device.parent.eth_rx = rt_imxrt_eth_rx;
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imxrt_eth_device.parent.eth_tx = rt_imxrt_eth_tx;
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imxrt_eth_device.parent.eth_tx = rt_imxrt_eth_tx;
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dbg_log(DBG_LOG, "sem init: tx_wait\r\n");
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LOG_D("sem init: tx_wait\r\n");
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/* init tx semaphore */
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/* init tx semaphore */
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rt_sem_init(&imxrt_eth_device.tx_wait, "tx_wait", 0, RT_IPC_FLAG_FIFO);
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rt_sem_init(&imxrt_eth_device.tx_wait, "tx_wait", 0, RT_IPC_FLAG_FIFO);
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/* register eth device */
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/* register eth device */
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dbg_log(DBG_LOG, "eth_device_init start\r\n");
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LOG_D("eth_device_init start\r\n");
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state = eth_device_init(&(imxrt_eth_device.parent), "e0");
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state = eth_device_init(&(imxrt_eth_device.parent), "e0");
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if (RT_EOK == state)
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if (RT_EOK == state)
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{
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{
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dbg_log(DBG_LOG, "eth_device_init success\r\n");
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LOG_D("eth_device_init success\r\n");
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}
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}
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else
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else
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{
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{
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dbg_log(DBG_LOG, "eth_device_init faild: %d\r\n", state);
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LOG_D("eth_device_init faild: %d\r\n", state);
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}
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}
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eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);
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eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);
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@ -6,6 +6,7 @@
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* Change Logs:
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* Change Logs:
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* Date Author Notes
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* Date Author Notes
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* 2018-07-05 ZYH the first version
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* 2018-07-05 ZYH the first version
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* 2019-03-11 JiCheng Remove section"itcm", use scatter file to allocate drv_flexspi.o to itcm
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*/
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*/
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#include <rtthread.h>
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#include <rtthread.h>
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#define PRINTF rt_kprintf
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#define PRINTF rt_kprintf
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@ -1,25 +1,12 @@
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/*
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/*
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* File : drv_hwtimer.c
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* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
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*
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* COPYRIGHT (C) 2017, RT-Thread Development Team
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* SPDX-License-Identifier: Apache-2.0
|
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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|
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* the Free Software Foundation; either version 2 of the License, or
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|
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* (at your option) any later version.
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*
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|
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* This program is distributed in the hope that it will be useful,
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|
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
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|
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*
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|
||||||
* You should have received a copy of the GNU General Public License along
|
|
||||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
|
||||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
|
||||||
*
|
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2018-04-17 WangBing the first version.
|
* 2018-04-17 WangBing the first version.
|
||||||
|
* 2019-03-11 JiCheng Change API name from rt1052 to rt1021
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <rtthread.h>
|
#include <rtthread.h>
|
||||||
|
@ -47,7 +34,7 @@ static void NVIC_Configuration(void)
|
||||||
EnableIRQ(GPT1_IRQn);
|
EnableIRQ(GPT1_IRQn);
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t rt1052_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args)
|
static rt_err_t rt1021_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args)
|
||||||
{
|
{
|
||||||
rt_err_t err = RT_EOK;
|
rt_err_t err = RT_EOK;
|
||||||
GPT_Type *hwtimer_dev;
|
GPT_Type *hwtimer_dev;
|
||||||
|
@ -73,7 +60,7 @@ static rt_err_t rt1052_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, voi
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_uint32_t rt1052_hwtimer_count_get(rt_hwtimer_t *timer)
|
static rt_uint32_t rt1021_hwtimer_count_get(rt_hwtimer_t *timer)
|
||||||
{
|
{
|
||||||
rt_uint32_t CurrentTimer_Count;
|
rt_uint32_t CurrentTimer_Count;
|
||||||
GPT_Type *hwtimer_dev;
|
GPT_Type *hwtimer_dev;
|
||||||
|
@ -86,7 +73,7 @@ static rt_uint32_t rt1052_hwtimer_count_get(rt_hwtimer_t *timer)
|
||||||
return CurrentTimer_Count;
|
return CurrentTimer_Count;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void rt1052_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
|
static void rt1021_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
|
||||||
{
|
{
|
||||||
GPT_Type *hwtimer_dev;
|
GPT_Type *hwtimer_dev;
|
||||||
gpt_config_t gptConfig;
|
gpt_config_t gptConfig;
|
||||||
|
@ -108,7 +95,7 @@ static void rt1052_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t rt1052_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
|
static rt_err_t rt1021_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
|
||||||
{
|
{
|
||||||
GPT_Type *hwtimer_dev;
|
GPT_Type *hwtimer_dev;
|
||||||
hwtimer_dev = (GPT_Type *)timer->parent.user_data;
|
hwtimer_dev = (GPT_Type *)timer->parent.user_data;
|
||||||
|
@ -128,7 +115,7 @@ static rt_err_t rt1052_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hw
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void rt1052_hwtimer_stop(rt_hwtimer_t *timer)
|
static void rt1021_hwtimer_stop(rt_hwtimer_t *timer)
|
||||||
{
|
{
|
||||||
GPT_Type *hwtimer_dev;
|
GPT_Type *hwtimer_dev;
|
||||||
hwtimer_dev = (GPT_Type *)timer->parent.user_data;
|
hwtimer_dev = (GPT_Type *)timer->parent.user_data;
|
||||||
|
@ -138,16 +125,16 @@ static void rt1052_hwtimer_stop(rt_hwtimer_t *timer)
|
||||||
GPT_StopTimer(hwtimer_dev);
|
GPT_StopTimer(hwtimer_dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct rt_hwtimer_ops rt1052_hwtimer_ops =
|
static const struct rt_hwtimer_ops rt1021_hwtimer_ops =
|
||||||
{
|
{
|
||||||
rt1052_hwtimer_init,
|
rt1021_hwtimer_init,
|
||||||
rt1052_hwtimer_start,
|
rt1021_hwtimer_start,
|
||||||
rt1052_hwtimer_stop,
|
rt1021_hwtimer_stop,
|
||||||
rt1052_hwtimer_count_get,
|
rt1021_hwtimer_count_get,
|
||||||
rt1052_hwtimer_control,
|
rt1021_hwtimer_control,
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct rt_hwtimer_info rt1052_hwtimer_info =
|
static const struct rt_hwtimer_info rt1021_hwtimer_info =
|
||||||
{
|
{
|
||||||
25000000, /* the maximum count frequency can be set */
|
25000000, /* the maximum count frequency can be set */
|
||||||
6103, /* the minimum count frequency can be set */
|
6103, /* the minimum count frequency can be set */
|
||||||
|
@ -157,12 +144,12 @@ static const struct rt_hwtimer_info rt1052_hwtimer_info =
|
||||||
|
|
||||||
static rt_hwtimer_t GPT_timer1;
|
static rt_hwtimer_t GPT_timer1;
|
||||||
|
|
||||||
int rt1052_hw_hwtimer_init(void)
|
int rt1021_hw_hwtimer_init(void)
|
||||||
{
|
{
|
||||||
int ret = RT_EOK;
|
int ret = RT_EOK;
|
||||||
|
|
||||||
GPT_timer1.info = &rt1052_hwtimer_info;
|
GPT_timer1.info = &rt1021_hwtimer_info;
|
||||||
GPT_timer1.ops = &rt1052_hwtimer_ops;
|
GPT_timer1.ops = &rt1021_hwtimer_ops;
|
||||||
|
|
||||||
rt_device_hwtimer_register(&GPT_timer1, "_timer", GPT1);
|
rt_device_hwtimer_register(&GPT_timer1, "_timer", GPT1);
|
||||||
|
|
||||||
|
@ -184,6 +171,6 @@ void GPT1_IRQHandler(void)
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
INIT_DEVICE_EXPORT(rt1052_hw_hwtimer_init);
|
INIT_DEVICE_EXPORT(rt1021_hw_hwtimer_init);
|
||||||
|
|
||||||
#endif /*RT_USING_HWTIMER*/
|
#endif /*RT_USING_HWTIMER*/
|
||||||
|
|
|
@ -1,25 +1,12 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_hwtimer.h
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
*
|
||||||
* COPYRIGHT (C) 2017, RT-Thread Development Team
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License along
|
|
||||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
|
||||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
|
||||||
*
|
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2018-04-17 WangBing the first version.
|
* 2018-04-17 WangBing the first version.
|
||||||
|
* 2019-03-11 JiCheng Change API name from rt1052 to rt1021
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __DRV_HWTIMER_H__
|
#ifndef __DRV_HWTIMER_H__
|
||||||
|
@ -28,7 +15,7 @@
|
||||||
#include <rtthread.h>
|
#include <rtthread.h>
|
||||||
#include <rtdevice.h>
|
#include <rtdevice.h>
|
||||||
|
|
||||||
int rt1052_hw_hwtimer_init(void);
|
int rt1021_hw_hwtimer_init(void);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -1,25 +1,13 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_i2c.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License along
|
|
||||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
|
||||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2017-08-08 Yang the first version
|
* 2017-08-08 Yang the first version
|
||||||
* 2018-03-24 LaiYiKeTang add hardware iic
|
* 2018-03-24 LaiYiKeTang add hardware iic
|
||||||
|
* 2019-03-11 JiCheng Adapt RT1020's IO MAP
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <rtthread.h>
|
#include <rtthread.h>
|
||||||
|
@ -44,7 +32,7 @@
|
||||||
#define LPI2C_CLOCK_FREQUENCY ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (LPI2C_CLOCK_SOURCE_DIVIDER))
|
#define LPI2C_CLOCK_FREQUENCY ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (LPI2C_CLOCK_SOURCE_DIVIDER))
|
||||||
|
|
||||||
#ifdef RT_USING_HW_I2C1
|
#ifdef RT_USING_HW_I2C1
|
||||||
static struct rt1052_i2c_bus lpi2c1 =
|
static struct rt1021_i2c_bus lpi2c1 =
|
||||||
{
|
{
|
||||||
.I2C = LPI2C1,
|
.I2C = LPI2C1,
|
||||||
.device_name = I2C1BUS_NAME,
|
.device_name = I2C1BUS_NAME,
|
||||||
|
@ -52,7 +40,7 @@ static struct rt1052_i2c_bus lpi2c1 =
|
||||||
#endif /* RT_USING_HW_I2C1 */
|
#endif /* RT_USING_HW_I2C1 */
|
||||||
|
|
||||||
#ifdef RT_USING_HW_I2C2
|
#ifdef RT_USING_HW_I2C2
|
||||||
static struct rt1052_i2c_bus lpi2c2 =
|
static struct rt1021_i2c_bus lpi2c2 =
|
||||||
{
|
{
|
||||||
.I2C = LPI2C2,
|
.I2C = LPI2C2,
|
||||||
.device_name = I2C2BUS_NAME,
|
.device_name = I2C2BUS_NAME,
|
||||||
|
@ -60,7 +48,7 @@ static struct rt1052_i2c_bus lpi2c2 =
|
||||||
#endif /* RT_USING_HW_I2C2 */
|
#endif /* RT_USING_HW_I2C2 */
|
||||||
|
|
||||||
#ifdef RT_USING_HW_I2C3
|
#ifdef RT_USING_HW_I2C3
|
||||||
static struct rt1052_i2c_bus lpi2c3 =
|
static struct rt1021_i2c_bus lpi2c3 =
|
||||||
{
|
{
|
||||||
.I2C = LPI2C3,
|
.I2C = LPI2C3,
|
||||||
.device_name = I2C3BUS_NAME,
|
.device_name = I2C3BUS_NAME,
|
||||||
|
@ -68,7 +56,7 @@ static struct rt1052_i2c_bus lpi2c3 =
|
||||||
#endif /* RT_USING_HW_I2C3 */
|
#endif /* RT_USING_HW_I2C3 */
|
||||||
|
|
||||||
#ifdef RT_USING_HW_I2C4
|
#ifdef RT_USING_HW_I2C4
|
||||||
static struct rt1052_i2c_bus lpi2c4 =
|
static struct rt1021_i2c_bus lpi2c4 =
|
||||||
{
|
{
|
||||||
.I2C = LPI2C4,
|
.I2C = LPI2C4,
|
||||||
.device_name = I2C4BUS_NAME,
|
.device_name = I2C4BUS_NAME,
|
||||||
|
@ -94,7 +82,7 @@ static const struct rt_i2c_bus_device_ops imxrt_i2c_ops =
|
||||||
imxrt_i2c_bus_control,
|
imxrt_i2c_bus_control,
|
||||||
};
|
};
|
||||||
|
|
||||||
void imxrt_lpi2c_gpio_init(struct rt1052_i2c_bus *bus)
|
void imxrt_lpi2c_gpio_init(struct rt1021_i2c_bus *bus)
|
||||||
{
|
{
|
||||||
if (bus->I2C == LPI2C1)
|
if (bus->I2C == LPI2C1)
|
||||||
{
|
{
|
||||||
|
@ -162,7 +150,7 @@ void imxrt_lpi2c_gpio_init(struct rt1052_i2c_bus *bus)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t imxrt_lpi2c_configure(struct rt1052_i2c_bus *bus, lpi2c_master_config_t *cfg)
|
static rt_err_t imxrt_lpi2c_configure(struct rt1021_i2c_bus *bus, lpi2c_master_config_t *cfg)
|
||||||
{
|
{
|
||||||
RT_ASSERT(bus != RT_NULL);
|
RT_ASSERT(bus != RT_NULL);
|
||||||
RT_ASSERT(cfg != RT_NULL);
|
RT_ASSERT(cfg != RT_NULL);
|
||||||
|
@ -250,36 +238,36 @@ static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
|
||||||
struct rt_i2c_msg msgs[],
|
struct rt_i2c_msg msgs[],
|
||||||
rt_uint32_t num)
|
rt_uint32_t num)
|
||||||
{
|
{
|
||||||
struct rt1052_i2c_bus *rt1052_i2c;
|
struct rt1021_i2c_bus *rt1021_i2c;
|
||||||
rt_size_t i;
|
rt_size_t i;
|
||||||
RT_ASSERT(bus != RT_NULL);
|
RT_ASSERT(bus != RT_NULL);
|
||||||
rt1052_i2c = (struct rt1052_i2c_bus *) bus;
|
rt1021_i2c = (struct rt1021_i2c_bus *) bus;
|
||||||
|
|
||||||
rt1052_i2c->msg = msgs;
|
rt1021_i2c->msg = msgs;
|
||||||
rt1052_i2c->msg_ptr = 0;
|
rt1021_i2c->msg_ptr = 0;
|
||||||
rt1052_i2c->msg_cnt = num;
|
rt1021_i2c->msg_cnt = num;
|
||||||
rt1052_i2c->dptr = 0;
|
rt1021_i2c->dptr = 0;
|
||||||
|
|
||||||
for (i = 0; i < num; i++)
|
for (i = 0; i < num; i++)
|
||||||
{
|
{
|
||||||
if (rt1052_i2c->msg[i].flags & RT_I2C_RD)
|
if (rt1021_i2c->msg[i].flags & RT_I2C_RD)
|
||||||
{
|
{
|
||||||
if (LPI2C_MasterStart(rt1052_i2c->I2C, rt1052_i2c->msg[i].addr, kLPI2C_Read) != kStatus_Success)
|
if (LPI2C_MasterStart(rt1021_i2c->I2C, rt1021_i2c->msg[i].addr, kLPI2C_Read) != kStatus_Success)
|
||||||
{
|
{
|
||||||
i = 0;
|
i = 0;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1052_i2c->I2C) != kStatus_Success)
|
if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1021_i2c->I2C) != kStatus_Success)
|
||||||
{
|
{
|
||||||
i = 0;
|
i = 0;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (LPI2C_MasterReceive(rt1052_i2c->I2C, rt1052_i2c->msg[i].buf, rt1052_i2c->msg[i].len) != kStatus_Success)
|
if (LPI2C_MasterReceive(rt1021_i2c->I2C, rt1021_i2c->msg[i].buf, rt1021_i2c->msg[i].len) != kStatus_Success)
|
||||||
{
|
{
|
||||||
i = 0;
|
i = 0;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1052_i2c->I2C) != kStatus_Success)
|
if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1021_i2c->I2C) != kStatus_Success)
|
||||||
{
|
{
|
||||||
i = 0;
|
i = 0;
|
||||||
break;
|
break;
|
||||||
|
@ -287,22 +275,22 @@ static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if (LPI2C_MasterStart(rt1052_i2c->I2C, rt1052_i2c->msg[i].addr, kLPI2C_Write) != kStatus_Success)
|
if (LPI2C_MasterStart(rt1021_i2c->I2C, rt1021_i2c->msg[i].addr, kLPI2C_Write) != kStatus_Success)
|
||||||
{
|
{
|
||||||
i = 0;
|
i = 0;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1052_i2c->I2C) != kStatus_Success)
|
if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1021_i2c->I2C) != kStatus_Success)
|
||||||
{
|
{
|
||||||
i = 0;
|
i = 0;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (LPI2C_MasterSend(rt1052_i2c->I2C, rt1052_i2c->msg[i].buf, rt1052_i2c->msg[i].len) != kStatus_Success)
|
if (LPI2C_MasterSend(rt1021_i2c->I2C, rt1021_i2c->msg[i].buf, rt1021_i2c->msg[i].len) != kStatus_Success)
|
||||||
{
|
{
|
||||||
i = 0;
|
i = 0;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1052_i2c->I2C) != kStatus_Success)
|
if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1021_i2c->I2C) != kStatus_Success)
|
||||||
{
|
{
|
||||||
i = 0;
|
i = 0;
|
||||||
break;
|
break;
|
||||||
|
@ -310,15 +298,15 @@ static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
i2c_dbg("send stop condition\n");
|
i2c_dbg("send stop condition\n");
|
||||||
if (LPI2C_MasterStop(rt1052_i2c->I2C) != kStatus_Success)
|
if (LPI2C_MasterStop(rt1021_i2c->I2C) != kStatus_Success)
|
||||||
{
|
{
|
||||||
i = 0;
|
i = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
rt1052_i2c->msg = RT_NULL;
|
rt1021_i2c->msg = RT_NULL;
|
||||||
rt1052_i2c->msg_ptr = 0;
|
rt1021_i2c->msg_ptr = 0;
|
||||||
rt1052_i2c->msg_cnt = 0;
|
rt1021_i2c->msg_cnt = 0;
|
||||||
rt1052_i2c->dptr = 0;
|
rt1021_i2c->dptr = 0;
|
||||||
return i;
|
return i;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,11 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_i2c.h
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
|
@ -19,7 +15,7 @@
|
||||||
#include <rtthread.h>
|
#include <rtthread.h>
|
||||||
#include <rtdevice.h>
|
#include <rtdevice.h>
|
||||||
#include "board.h"
|
#include "board.h"
|
||||||
struct rt1052_i2c_bus
|
struct rt1021_i2c_bus
|
||||||
{
|
{
|
||||||
struct rt_i2c_bus_device parent;
|
struct rt_i2c_bus_device parent;
|
||||||
LPI2C_Type *I2C;
|
LPI2C_Type *I2C;
|
||||||
|
|
|
@ -1,11 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_pcf8574.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
|
|
|
@ -1,11 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_pcf8574.h
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
|
|
|
@ -1,16 +1,13 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_pin.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2018-03-13 Liuguang the first version.
|
* 2018-03-13 Liuguang the first version.
|
||||||
* 2018-03-19 Liuguang add GPIO interrupt mode support.
|
* 2018-03-19 Liuguang add GPIO interrupt mode support.
|
||||||
|
* 2019-03-11 JiCheng Adapt RT1020's IO MAP
|
||||||
*/
|
*/
|
||||||
#include "drv_pin.h"
|
#include "drv_pin.h"
|
||||||
|
|
||||||
|
@ -24,188 +21,136 @@
|
||||||
#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
|
#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
struct rt1052_pin
|
struct rt1021_pin
|
||||||
{
|
{
|
||||||
rt_uint16_t pin;
|
rt_uint16_t pin;
|
||||||
GPIO_Type *gpio;
|
GPIO_Type *gpio;
|
||||||
rt_uint32_t gpio_pin;
|
rt_uint32_t gpio_pin;
|
||||||
};
|
};
|
||||||
|
|
||||||
struct rt1052_irq
|
struct rt1021_irq
|
||||||
{
|
{
|
||||||
rt_uint16_t enable;
|
rt_uint16_t enable;
|
||||||
struct rt_pin_irq_hdr irq_info;
|
struct rt_pin_irq_hdr irq_info;
|
||||||
};
|
};
|
||||||
|
|
||||||
#define __ARRAY_LEN(array) (sizeof(array)/sizeof(array[0]))
|
#define __ARRAY_LEN(array) (sizeof(array)/sizeof(array[0]))
|
||||||
#define __RT1052_PIN_DEFAULT {0, 0, 0}
|
#define __RT1021_PIN_DEFAULT {0, 0, 0}
|
||||||
#define __RT1052_PIN(INDEX, PORT, PIN) {INDEX, PORT, PIN}
|
#define __RT1021_PIN(INDEX, PORT, PIN) {INDEX, PORT, PIN}
|
||||||
|
|
||||||
static struct rt_pin_ops rt1052_pin_ops;
|
static struct rt_pin_ops rt1021_pin_ops;
|
||||||
|
|
||||||
static struct rt1052_pin rt1052_pin_map[] =
|
static struct rt1021_pin rt1021_pin_map[] =
|
||||||
{
|
{
|
||||||
__RT1052_PIN_DEFAULT,
|
__RT1021_PIN_DEFAULT,
|
||||||
|
|
||||||
/* GPIO4 */
|
|
||||||
__RT1052_PIN( 1, GPIO2, 0), /* GPIO_EMC_00 */
|
|
||||||
__RT1052_PIN( 2, GPIO2, 1), /* GPIO_EMC_01 */
|
|
||||||
__RT1052_PIN( 3, GPIO2, 2), /* GPIO_EMC_02 */
|
|
||||||
__RT1052_PIN( 4, GPIO2, 3), /* GPIO_EMC_03 */
|
|
||||||
__RT1052_PIN( 5, GPIO2, 4), /* GPIO_EMC_04 */
|
|
||||||
__RT1052_PIN( 6, GPIO2, 5), /* GPIO_EMC_05 */
|
|
||||||
__RT1052_PIN( 7, GPIO2, 6), /* GPIO_EMC_06 */
|
|
||||||
__RT1052_PIN( 8, GPIO2, 7), /* GPIO_EMC_07 */
|
|
||||||
__RT1052_PIN( 9, GPIO2, 8), /* GPIO_EMC_08 */
|
|
||||||
__RT1052_PIN(10, GPIO2, 9), /* GPIO_EMC_09 */
|
|
||||||
__RT1052_PIN(11, GPIO2, 10), /* GPIO_EMC_10 */
|
|
||||||
__RT1052_PIN(12, GPIO2, 11), /* GPIO_EMC_11 */
|
|
||||||
__RT1052_PIN(13, GPIO2, 12), /* GPIO_EMC_12 */
|
|
||||||
__RT1052_PIN(14, GPIO2, 13), /* GPIO_EMC_13 */
|
|
||||||
__RT1052_PIN(15, GPIO2, 14), /* GPIO_EMC_14 */
|
|
||||||
__RT1052_PIN(16, GPIO2, 15), /* GPIO_EMC_15 */
|
|
||||||
__RT1052_PIN(17, GPIO2, 16), /* GPIO_EMC_16 */
|
|
||||||
__RT1052_PIN(18, GPIO2, 17), /* GPIO_EMC_17 */
|
|
||||||
__RT1052_PIN(19, GPIO2, 18), /* GPIO_EMC_18 */
|
|
||||||
__RT1052_PIN(20, GPIO2, 19), /* GPIO_EMC_19 */
|
|
||||||
__RT1052_PIN(21, GPIO2, 20), /* GPIO_EMC_20 */
|
|
||||||
__RT1052_PIN(22, GPIO2, 21), /* GPIO_EMC_21 */
|
|
||||||
__RT1052_PIN(23, GPIO2, 22), /* GPIO_EMC_22 */
|
|
||||||
__RT1052_PIN(24, GPIO2, 23), /* GPIO_EMC_23 */
|
|
||||||
__RT1052_PIN(25, GPIO2, 24), /* GPIO_EMC_24 */
|
|
||||||
__RT1052_PIN(26, GPIO2, 25), /* GPIO_EMC_25 */
|
|
||||||
__RT1052_PIN(27, GPIO2, 26), /* GPIO_EMC_26 */
|
|
||||||
__RT1052_PIN(28, GPIO2, 27), /* GPIO_EMC_27 */
|
|
||||||
__RT1052_PIN(29, GPIO2, 28), /* GPIO_EMC_28 */
|
|
||||||
__RT1052_PIN(30, GPIO2, 29), /* GPIO_EMC_29 */
|
|
||||||
__RT1052_PIN(31, GPIO2, 30), /* GPIO_EMC_30 */
|
|
||||||
__RT1052_PIN(32, GPIO2, 31), /* GPIO_EMC_31 */
|
|
||||||
|
|
||||||
__RT1052_PIN(33, GPIO3, 0), /* GPIO_EMC_32 */
|
|
||||||
__RT1052_PIN(34, GPIO3, 1), /* GPIO_EMC_33 */
|
|
||||||
__RT1052_PIN(35, GPIO3, 2), /* GPIO_EMC_34 */
|
|
||||||
__RT1052_PIN(36, GPIO3, 3), /* GPIO_EMC_35 */
|
|
||||||
__RT1052_PIN(37, GPIO3, 4), /* GPIO_EMC_36 */
|
|
||||||
__RT1052_PIN(38, GPIO3, 5), /* GPIO_EMC_37 */
|
|
||||||
__RT1052_PIN(39, GPIO3, 6), /* GPIO_EMC_38 */
|
|
||||||
__RT1052_PIN(40, GPIO3, 7), /* GPIO_EMC_39 */
|
|
||||||
__RT1052_PIN(41, GPIO3, 8), /* GPIO_EMC_40 */
|
|
||||||
__RT1052_PIN(42, GPIO3, 9), /* GPIO_EMC_41 */
|
|
||||||
__RT1052_PIN(33, GPIO3, 13), /* GPIO_SD_B0_00 */
|
|
||||||
__RT1052_PIN(34, GPIO3, 14), /* GPIO_SD_B0_01 */
|
|
||||||
__RT1052_PIN(35, GPIO3, 15), /* GPIO_SD_B0_02 */
|
|
||||||
__RT1052_PIN(36, GPIO3, 16), /* GPIO_SD_B0_03 */
|
|
||||||
__RT1052_PIN(37, GPIO3, 17), /* GPIO_SD_B0_04 */
|
|
||||||
__RT1052_PIN(38, GPIO3, 18), /* GPIO_SD_B0_05 */
|
|
||||||
__RT1052_PIN(39, GPIO3, 19), /* GPIO_SD_B0_06 */
|
|
||||||
__RT1052_PIN(40, GPIO3, 20), /* GPIO_SD_B1_00 */
|
|
||||||
__RT1052_PIN(41, GPIO3, 21), /* GPIO_SD_B1_01 */
|
|
||||||
__RT1052_PIN(42, GPIO3, 22), /* GPIO_SD_B1_02 */
|
|
||||||
__RT1052_PIN(33, GPIO3, 23), /* GPIO_SD_B1_03 */
|
|
||||||
__RT1052_PIN(34, GPIO3, 24), /* GPIO_SD_B1_04 */
|
|
||||||
__RT1052_PIN(35, GPIO3, 25), /* GPIO_SD_B1_05 */
|
|
||||||
__RT1052_PIN(36, GPIO3, 26), /* GPIO_SD_B1_06 */
|
|
||||||
__RT1052_PIN(37, GPIO3, 27), /* GPIO_SD_B1_07 */
|
|
||||||
__RT1052_PIN(38, GPIO3, 28), /* GPIO_SD_B1_08 */
|
|
||||||
__RT1052_PIN(39, GPIO3, 29), /* GPIO_SD_B1_09 */
|
|
||||||
__RT1052_PIN(40, GPIO3, 30), /* GPIO_SD_B1_10 */
|
|
||||||
__RT1052_PIN(41, GPIO3, 31), /* GPIO_SD_B1_11 */
|
|
||||||
|
|
||||||
/* GPIO1 */
|
|
||||||
__RT1052_PIN(43, GPIO1, 0), /* GPIO_AD_B0_00 */
|
|
||||||
__RT1052_PIN(44, GPIO1, 1), /* GPIO_AD_B0_01 */
|
|
||||||
__RT1052_PIN(45, GPIO1, 2), /* GPIO_AD_B0_02 */
|
|
||||||
__RT1052_PIN(46, GPIO1, 3), /* GPIO_AD_B0_03 */
|
|
||||||
__RT1052_PIN(47, GPIO1, 4), /* GPIO_AD_B0_04 */
|
|
||||||
__RT1052_PIN(48, GPIO1, 5), /* GPIO_AD_B0_05 */
|
|
||||||
__RT1052_PIN(49, GPIO1, 6), /* GPIO_AD_B0_06 */
|
|
||||||
__RT1052_PIN(50, GPIO1, 7), /* GPIO_AD_B0_07 */
|
|
||||||
__RT1052_PIN(51, GPIO1, 8), /* GPIO_AD_B0_08 */
|
|
||||||
__RT1052_PIN(52, GPIO1, 9), /* GPIO_AD_B0_09 */
|
|
||||||
__RT1052_PIN(53, GPIO1, 10), /* GPIO_AD_B0_10 */
|
|
||||||
__RT1052_PIN(54, GPIO1, 11), /* GPIO_AD_B0_11 */
|
|
||||||
__RT1052_PIN(55, GPIO1, 12), /* GPIO_AD_B0_12 */
|
|
||||||
__RT1052_PIN(56, GPIO1, 13), /* GPIO_AD_B0_13 */
|
|
||||||
__RT1052_PIN(57, GPIO1, 14), /* GPIO_AD_B0_14 */
|
|
||||||
__RT1052_PIN(58, GPIO1, 15), /* GPIO_AD_B0_15 */
|
|
||||||
__RT1052_PIN(59, GPIO1, 16), /* GPIO_AD_B1_00 */
|
|
||||||
__RT1052_PIN(60, GPIO1, 17), /* GPIO_AD_B1_01 */
|
|
||||||
__RT1052_PIN(61, GPIO1, 18), /* GPIO_AD_B1_02 */
|
|
||||||
__RT1052_PIN(62, GPIO1, 19), /* GPIO_AD_B1_03 */
|
|
||||||
__RT1052_PIN(63, GPIO1, 20), /* GPIO_AD_B1_04 */
|
|
||||||
__RT1052_PIN(64, GPIO1, 21), /* GPIO_AD_B1_05 */
|
|
||||||
__RT1052_PIN(65, GPIO1, 22), /* GPIO_AD_B1_06 */
|
|
||||||
__RT1052_PIN(66, GPIO1, 23), /* GPIO_AD_B1_07 */
|
|
||||||
__RT1052_PIN(67, GPIO1, 24), /* GPIO_AD_B1_08 */
|
|
||||||
__RT1052_PIN(68, GPIO1, 25), /* GPIO_AD_B1_09 */
|
|
||||||
__RT1052_PIN(69, GPIO1, 26), /* GPIO_AD_B1_10 */
|
|
||||||
__RT1052_PIN(70, GPIO1, 27), /* GPIO_AD_B1_11 */
|
|
||||||
__RT1052_PIN(71, GPIO1, 28), /* GPIO_AD_B1_12 */
|
|
||||||
__RT1052_PIN(72, GPIO1, 29), /* GPIO_AD_B1_13 */
|
|
||||||
__RT1052_PIN(73, GPIO1, 30), /* GPIO_AD_B1_14 */
|
|
||||||
__RT1052_PIN(74, GPIO1, 31), /* GPIO_AD_B1_15 */
|
|
||||||
|
|
||||||
/* GPIO2 */
|
/* GPIO2 */
|
||||||
__RT1052_PIN( 75, GPIO2, 0), /* GPIO_B0_00 */
|
__RT1021_PIN( 1, GPIO2, 0), /* GPIO_EMC_00 */
|
||||||
__RT1052_PIN( 76, GPIO2, 1), /* GPIO_B0_01 */
|
__RT1021_PIN( 2, GPIO2, 1), /* GPIO_EMC_01 */
|
||||||
__RT1052_PIN( 77, GPIO2, 2), /* GPIO_B0_02 */
|
__RT1021_PIN( 3, GPIO2, 2), /* GPIO_EMC_02 */
|
||||||
__RT1052_PIN( 78, GPIO2, 3), /* GPIO_B0_03 */
|
__RT1021_PIN( 4, GPIO2, 3), /* GPIO_EMC_03 */
|
||||||
__RT1052_PIN( 79, GPIO2, 4), /* GPIO_B0_04 */
|
__RT1021_PIN( 5, GPIO2, 4), /* GPIO_EMC_04 */
|
||||||
__RT1052_PIN( 80, GPIO2, 5), /* GPIO_B0_05 */
|
__RT1021_PIN( 6, GPIO2, 5), /* GPIO_EMC_05 */
|
||||||
__RT1052_PIN( 81, GPIO2, 6), /* GPIO_B0_06 */
|
__RT1021_PIN( 7, GPIO2, 6), /* GPIO_EMC_06 */
|
||||||
__RT1052_PIN( 82, GPIO2, 7), /* GPIO_B0_07 */
|
__RT1021_PIN( 8, GPIO2, 7), /* GPIO_EMC_07 */
|
||||||
__RT1052_PIN( 83, GPIO2, 8), /* GPIO_B0_08 */
|
__RT1021_PIN( 9, GPIO2, 8), /* GPIO_EMC_08 */
|
||||||
__RT1052_PIN( 84, GPIO2, 9), /* GPIO_B0_09 */
|
__RT1021_PIN(10, GPIO2, 9), /* GPIO_EMC_09 */
|
||||||
__RT1052_PIN( 85, GPIO2, 10), /* GPIO_B0_10 */
|
__RT1021_PIN(11, GPIO2, 10), /* GPIO_EMC_10 */
|
||||||
__RT1052_PIN( 86, GPIO2, 11), /* GPIO_B0_11 */
|
__RT1021_PIN(12, GPIO2, 11), /* GPIO_EMC_11 */
|
||||||
__RT1052_PIN( 87, GPIO2, 12), /* GPIO_B0_12 */
|
__RT1021_PIN(13, GPIO2, 12), /* GPIO_EMC_12 */
|
||||||
__RT1052_PIN( 88, GPIO2, 13), /* GPIO_B0_13 */
|
__RT1021_PIN(14, GPIO2, 13), /* GPIO_EMC_13 */
|
||||||
__RT1052_PIN( 89, GPIO2, 14), /* GPIO_B0_14 */
|
__RT1021_PIN(15, GPIO2, 14), /* GPIO_EMC_14 */
|
||||||
__RT1052_PIN( 90, GPIO2, 15), /* GPIO_B0_15 */
|
__RT1021_PIN(16, GPIO2, 15), /* GPIO_EMC_15 */
|
||||||
__RT1052_PIN( 91, GPIO2, 16), /* GPIO_B1_00 */
|
__RT1021_PIN(17, GPIO2, 16), /* GPIO_EMC_16 */
|
||||||
__RT1052_PIN( 92, GPIO2, 17), /* GPIO_B1_01 */
|
__RT1021_PIN(18, GPIO2, 17), /* GPIO_EMC_17 */
|
||||||
__RT1052_PIN( 93, GPIO2, 18), /* GPIO_B1_02 */
|
__RT1021_PIN(19, GPIO2, 18), /* GPIO_EMC_18 */
|
||||||
__RT1052_PIN( 94, GPIO2, 19), /* GPIO_B1_03 */
|
__RT1021_PIN(20, GPIO2, 19), /* GPIO_EMC_19 */
|
||||||
__RT1052_PIN( 95, GPIO2, 20), /* GPIO_B1_04 */
|
__RT1021_PIN(21, GPIO2, 20), /* GPIO_EMC_20 */
|
||||||
__RT1052_PIN( 96, GPIO2, 21), /* GPIO_B1_05 */
|
__RT1021_PIN(22, GPIO2, 21), /* GPIO_EMC_21 */
|
||||||
__RT1052_PIN( 97, GPIO2, 22), /* GPIO_B1_06 */
|
__RT1021_PIN(23, GPIO2, 22), /* GPIO_EMC_22 */
|
||||||
__RT1052_PIN( 98, GPIO2, 23), /* GPIO_B1_07 */
|
__RT1021_PIN(24, GPIO2, 23), /* GPIO_EMC_23 */
|
||||||
__RT1052_PIN( 99, GPIO2, 24), /* GPIO_B1_08 */
|
__RT1021_PIN(25, GPIO2, 24), /* GPIO_EMC_24 */
|
||||||
__RT1052_PIN(100, GPIO2, 25), /* GPIO_B1_09 */
|
__RT1021_PIN(26, GPIO2, 25), /* GPIO_EMC_25 */
|
||||||
__RT1052_PIN(101, GPIO2, 26), /* GPIO_B1_10 */
|
__RT1021_PIN(27, GPIO2, 26), /* GPIO_EMC_26 */
|
||||||
__RT1052_PIN(102, GPIO2, 27), /* GPIO_B1_11 */
|
__RT1021_PIN(28, GPIO2, 27), /* GPIO_EMC_27 */
|
||||||
__RT1052_PIN(103, GPIO2, 28), /* GPIO_B1_12 */
|
__RT1021_PIN(29, GPIO2, 28), /* GPIO_EMC_28 */
|
||||||
__RT1052_PIN(104, GPIO2, 29), /* GPIO_B1_13 */
|
__RT1021_PIN(30, GPIO2, 29), /* GPIO_EMC_29 */
|
||||||
__RT1052_PIN(105, GPIO2, 30), /* GPIO_B1_14 */
|
__RT1021_PIN(31, GPIO2, 30), /* GPIO_EMC_30 */
|
||||||
__RT1052_PIN(106, GPIO2, 31), /* GPIO_B1_15 */
|
__RT1021_PIN(32, GPIO2, 31), /* GPIO_EMC_31 */
|
||||||
|
|
||||||
|
__RT1021_PIN(33, GPIO3, 0), /* GPIO_EMC_32 */
|
||||||
|
__RT1021_PIN(34, GPIO3, 1), /* GPIO_EMC_33 */
|
||||||
|
__RT1021_PIN(35, GPIO3, 2), /* GPIO_EMC_34 */
|
||||||
|
__RT1021_PIN(36, GPIO3, 3), /* GPIO_EMC_35 */
|
||||||
|
__RT1021_PIN(37, GPIO3, 4), /* GPIO_EMC_36 */
|
||||||
|
__RT1021_PIN(38, GPIO3, 5), /* GPIO_EMC_37 */
|
||||||
|
__RT1021_PIN(39, GPIO3, 6), /* GPIO_EMC_38 */
|
||||||
|
__RT1021_PIN(40, GPIO3, 7), /* GPIO_EMC_39 */
|
||||||
|
__RT1021_PIN(41, GPIO3, 8), /* GPIO_EMC_40 */
|
||||||
|
__RT1021_PIN(42, GPIO3, 9), /* GPIO_EMC_41 */
|
||||||
|
|
||||||
|
/* GPIO1 */
|
||||||
|
__RT1021_PIN(43, GPIO1, 0), /* GPIO_AD_B0_00 */
|
||||||
|
__RT1021_PIN(44, GPIO1, 1), /* GPIO_AD_B0_01 */
|
||||||
|
__RT1021_PIN(45, GPIO1, 2), /* GPIO_AD_B0_02 */
|
||||||
|
__RT1021_PIN(46, GPIO1, 3), /* GPIO_AD_B0_03 */
|
||||||
|
__RT1021_PIN(47, GPIO1, 4), /* GPIO_AD_B0_04 */
|
||||||
|
__RT1021_PIN(48, GPIO1, 5), /* GPIO_AD_B0_05 */
|
||||||
|
__RT1021_PIN(49, GPIO1, 6), /* GPIO_AD_B0_06 */
|
||||||
|
__RT1021_PIN(50, GPIO1, 7), /* GPIO_AD_B0_07 */
|
||||||
|
__RT1021_PIN(51, GPIO1, 8), /* GPIO_AD_B0_08 */
|
||||||
|
__RT1021_PIN(52, GPIO1, 9), /* GPIO_AD_B0_09 */
|
||||||
|
__RT1021_PIN(53, GPIO1, 10), /* GPIO_AD_B0_10 */
|
||||||
|
__RT1021_PIN(54, GPIO1, 11), /* GPIO_AD_B0_11 */
|
||||||
|
__RT1021_PIN(55, GPIO1, 12), /* GPIO_AD_B0_12 */
|
||||||
|
__RT1021_PIN(56, GPIO1, 13), /* GPIO_AD_B0_13 */
|
||||||
|
__RT1021_PIN(57, GPIO1, 14), /* GPIO_AD_B0_14 */
|
||||||
|
__RT1021_PIN(58, GPIO1, 15), /* GPIO_AD_B0_15 */
|
||||||
|
__RT1021_PIN(59, GPIO1, 16), /* GPIO_AD_B1_00 */
|
||||||
|
__RT1021_PIN(60, GPIO1, 17), /* GPIO_AD_B1_01 */
|
||||||
|
__RT1021_PIN(61, GPIO1, 18), /* GPIO_AD_B1_02 */
|
||||||
|
__RT1021_PIN(62, GPIO1, 19), /* GPIO_AD_B1_03 */
|
||||||
|
__RT1021_PIN(63, GPIO1, 20), /* GPIO_AD_B1_04 */
|
||||||
|
__RT1021_PIN(64, GPIO1, 21), /* GPIO_AD_B1_05 */
|
||||||
|
__RT1021_PIN(65, GPIO1, 22), /* GPIO_AD_B1_06 */
|
||||||
|
__RT1021_PIN(66, GPIO1, 23), /* GPIO_AD_B1_07 */
|
||||||
|
__RT1021_PIN(67, GPIO1, 24), /* GPIO_AD_B1_08 */
|
||||||
|
__RT1021_PIN(68, GPIO1, 25), /* GPIO_AD_B1_09 */
|
||||||
|
__RT1021_PIN(69, GPIO1, 26), /* GPIO_AD_B1_10 */
|
||||||
|
__RT1021_PIN(70, GPIO1, 27), /* GPIO_AD_B1_11 */
|
||||||
|
__RT1021_PIN(71, GPIO1, 28), /* GPIO_AD_B1_12 */
|
||||||
|
__RT1021_PIN(72, GPIO1, 29), /* GPIO_AD_B1_13 */
|
||||||
|
__RT1021_PIN(73, GPIO1, 30), /* GPIO_AD_B1_14 */
|
||||||
|
__RT1021_PIN(74, GPIO1, 31), /* GPIO_AD_B1_15 */
|
||||||
|
|
||||||
/* GPIO3 */
|
/* GPIO3 */
|
||||||
__RT1052_PIN(107, GPIO3, 0), /* GPIO_SD_B1_00 */
|
__RT1021_PIN(75, GPIO3, 13), /* GPIO_SD_B0_00 */
|
||||||
__RT1052_PIN(108, GPIO3, 1), /* GPIO_SD_B1_01 */
|
__RT1021_PIN(76, GPIO3, 14), /* GPIO_SD_B0_01 */
|
||||||
__RT1052_PIN(109, GPIO3, 2), /* GPIO_SD_B1_02 */
|
__RT1021_PIN(77, GPIO3, 15), /* GPIO_SD_B0_02 */
|
||||||
__RT1052_PIN(110, GPIO3, 3), /* GPIO_SD_B1_03 */
|
__RT1021_PIN(78, GPIO3, 16), /* GPIO_SD_B0_03 */
|
||||||
__RT1052_PIN(111, GPIO3, 4), /* GPIO_SD_B1_04 */
|
__RT1021_PIN(79, GPIO3, 17), /* GPIO_SD_B0_04 */
|
||||||
__RT1052_PIN(112, GPIO3, 5), /* GPIO_SD_B1_05 */
|
__RT1021_PIN(80, GPIO3, 18), /* GPIO_SD_B0_05 */
|
||||||
__RT1052_PIN(113, GPIO3, 6), /* GPIO_SD_B1_06 */
|
__RT1021_PIN(81, GPIO3, 19), /* GPIO_SD_B0_06 */
|
||||||
__RT1052_PIN(114, GPIO3, 7), /* GPIO_SD_B1_07 */
|
__RT1021_PIN(82, GPIO3, 20), /* GPIO_SD_B1_00 */
|
||||||
__RT1052_PIN(115, GPIO3, 8), /* GPIO_SD_B1_08 */
|
__RT1021_PIN(83, GPIO3, 21), /* GPIO_SD_B1_01 */
|
||||||
__RT1052_PIN(116, GPIO3, 9), /* GPIO_SD_B1_09 */
|
__RT1021_PIN(84, GPIO3, 22), /* GPIO_SD_B1_02 */
|
||||||
__RT1052_PIN(117, GPIO3, 10), /* GPIO_SD_B1_10 */
|
__RT1021_PIN(85, GPIO3, 23), /* GPIO_SD_B1_03 */
|
||||||
__RT1052_PIN(118, GPIO3, 11), /* GPIO_SD_B1_11 */
|
__RT1021_PIN(86, GPIO3, 24), /* GPIO_SD_B1_04 */
|
||||||
__RT1052_PIN(119, GPIO3, 12), /* GPIO_SD_B0_00 */
|
__RT1021_PIN(87, GPIO3, 25), /* GPIO_SD_B1_05 */
|
||||||
__RT1052_PIN(120, GPIO3, 13), /* GPIO_SD_B0_01 */
|
__RT1021_PIN(88, GPIO3, 26), /* GPIO_SD_B1_06 */
|
||||||
__RT1052_PIN(121, GPIO3, 14), /* GPIO_SD_B0_02 */
|
__RT1021_PIN(89, GPIO3, 27), /* GPIO_SD_B1_07 */
|
||||||
__RT1052_PIN(122, GPIO3, 15), /* GPIO_SD_B0_03 */
|
__RT1021_PIN(90, GPIO3, 28), /* GPIO_SD_B1_08 */
|
||||||
__RT1052_PIN(123, GPIO3, 16), /* GPIO_SD_B0_04 */
|
__RT1021_PIN(91, GPIO3, 29), /* GPIO_SD_B1_09 */
|
||||||
__RT1052_PIN(124, GPIO3, 17), /* GPIO_SD_B0_05 */
|
__RT1021_PIN(92, GPIO3, 30), /* GPIO_SD_B1_10 */
|
||||||
|
__RT1021_PIN(93, GPIO3, 31), /* GPIO_SD_B1_11 */
|
||||||
|
|
||||||
/* GPIO5 */
|
/* GPIO5 */
|
||||||
__RT1052_PIN(125, GPIO5, 0), /* WAKEUP */
|
__RT1021_PIN(94, GPIO5, 0), /* WAKEUP */
|
||||||
__RT1052_PIN(126, GPIO5, 1), /* PMIC_ON_REQ */
|
__RT1021_PIN(95, GPIO5, 1), /* PMIC_ON_REQ */
|
||||||
__RT1052_PIN(127, GPIO5, 2) /* PMIC_STBY_REQ */
|
__RT1021_PIN(96, GPIO5, 2) /* PMIC_STBY_REQ */
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct rt1052_irq rt1052_irq_map[] =
|
static struct rt1021_irq rt1021_irq_map[] =
|
||||||
{
|
{
|
||||||
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
|
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
|
||||||
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
|
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
|
||||||
|
@ -247,9 +192,9 @@ void gpio_isr(GPIO_Type* base, rt_uint32_t gpio_pin)
|
||||||
{
|
{
|
||||||
GPIO_PortClearInterruptFlags(base, gpio_pin);
|
GPIO_PortClearInterruptFlags(base, gpio_pin);
|
||||||
|
|
||||||
if(rt1052_irq_map[gpio_pin].irq_info.hdr != RT_NULL)
|
if(rt1021_irq_map[gpio_pin].irq_info.hdr != RT_NULL)
|
||||||
{
|
{
|
||||||
rt1052_irq_map[gpio_pin].irq_info.hdr(rt1052_irq_map[gpio_pin].irq_info.args);
|
rt1021_irq_map[gpio_pin].irq_info.hdr(rt1021_irq_map[gpio_pin].irq_info.args);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -352,7 +297,7 @@ void GPIO5_Combined_0_15_IRQHandler(void)
|
||||||
rt_interrupt_leave();
|
rt_interrupt_leave();
|
||||||
}
|
}
|
||||||
|
|
||||||
static IRQn_Type rt1052_get_irqnum(GPIO_Type *gpio, rt_uint32_t gpio_pin)
|
static IRQn_Type rt1021_get_irqnum(GPIO_Type *gpio, rt_uint32_t gpio_pin)
|
||||||
{
|
{
|
||||||
IRQn_Type irq_num = -100; /* Invalid interrupt number */
|
IRQn_Type irq_num = -100; /* Invalid interrupt number */
|
||||||
|
|
||||||
|
@ -404,17 +349,17 @@ static IRQn_Type rt1052_get_irqnum(GPIO_Type *gpio, rt_uint32_t gpio_pin)
|
||||||
return irq_num;
|
return irq_num;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
|
static void rt1021_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
|
||||||
{
|
{
|
||||||
gpio_pin_config_t gpio;
|
gpio_pin_config_t gpio;
|
||||||
rt_uint32_t config_value = 0;
|
rt_uint32_t config_value = 0;
|
||||||
|
|
||||||
if((pin > __ARRAY_LEN(rt1052_pin_map)) || (pin == 0))
|
if((pin > __ARRAY_LEN(rt1021_pin_map)) || (pin == 0))
|
||||||
{
|
{
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
if(rt1052_pin_map[pin].gpio != GPIO5)
|
if(rt1021_pin_map[pin].gpio != GPIO5)
|
||||||
{
|
{
|
||||||
CLOCK_EnableClock(kCLOCK_Iomuxc);
|
CLOCK_EnableClock(kCLOCK_Iomuxc);
|
||||||
IOMUXC_SetPinMux(0x401F8010U + pin*4, 0x5U, 0, 0, 0, 1);
|
IOMUXC_SetPinMux(0x401F8010U + pin*4, 0x5U, 0, 0, 0, 1);
|
||||||
|
@ -422,7 +367,7 @@ static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
|
CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
|
||||||
IOMUXC_SetPinMux(0x400A8000U + (pin-125)*4, 0x5U, 0, 0, 0, 1);
|
IOMUXC_SetPinMux(0x400A8000U + (pin-94)*4, 0x5U, 0, 0, 0, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
gpio.outputLogic = 0;
|
gpio.outputLogic = 0;
|
||||||
|
@ -466,36 +411,36 @@ static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if(rt1052_pin_map[pin].gpio != GPIO5)
|
if(rt1021_pin_map[pin].gpio != GPIO5)
|
||||||
{
|
{
|
||||||
IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value);
|
IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
IOMUXC_SetPinConfig(0, 0, 0, 0, 0x400A8018U + (pin-125)*4, config_value);
|
IOMUXC_SetPinConfig(0, 0, 0, 0, 0x400A8018U + (pin-94)*4, config_value);
|
||||||
}
|
}
|
||||||
|
|
||||||
GPIO_PinInit(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, &gpio);
|
GPIO_PinInit(rt1021_pin_map[pin].gpio, rt1021_pin_map[pin].gpio_pin, &gpio);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int rt1052_pin_read(rt_device_t dev, rt_base_t pin)
|
static int rt1021_pin_read(rt_device_t dev, rt_base_t pin)
|
||||||
{
|
{
|
||||||
return GPIO_PinReadPadStatus(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin);
|
return GPIO_PinReadPadStatus(rt1021_pin_map[pin].gpio, rt1021_pin_map[pin].gpio_pin);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void rt1052_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
|
static void rt1021_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
|
||||||
{
|
{
|
||||||
GPIO_PinWrite(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, value);
|
GPIO_PinWrite(rt1021_pin_map[pin].gpio, rt1021_pin_map[pin].gpio_pin, value);
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t rt1052_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
|
static rt_err_t rt1021_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
|
||||||
rt_uint32_t mode, void (*hdr)(void *args), void *args)
|
rt_uint32_t mode, void (*hdr)(void *args), void *args)
|
||||||
{
|
{
|
||||||
struct rt1052_pin* pin_map = RT_NULL;
|
struct rt1021_pin* pin_map = RT_NULL;
|
||||||
struct rt1052_irq* irq_map = RT_NULL;
|
struct rt1021_irq* irq_map = RT_NULL;
|
||||||
|
|
||||||
pin_map = &rt1052_pin_map[pin];
|
pin_map = &rt1021_pin_map[pin];
|
||||||
irq_map = &rt1052_irq_map[rt1052_pin_map[pin].gpio_pin];
|
irq_map = &rt1021_irq_map[rt1021_pin_map[pin].gpio_pin];
|
||||||
|
|
||||||
if(pin_map == RT_NULL || irq_map == RT_NULL)
|
if(pin_map == RT_NULL || irq_map == RT_NULL)
|
||||||
{
|
{
|
||||||
|
@ -515,13 +460,13 @@ static rt_err_t rt1052_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t rt1052_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
|
static rt_err_t rt1021_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
|
||||||
{
|
{
|
||||||
struct rt1052_pin* pin_map = RT_NULL;
|
struct rt1021_pin* pin_map = RT_NULL;
|
||||||
struct rt1052_irq* irq_map = RT_NULL;
|
struct rt1021_irq* irq_map = RT_NULL;
|
||||||
|
|
||||||
pin_map = &rt1052_pin_map[pin];
|
pin_map = &rt1021_pin_map[pin];
|
||||||
irq_map = &rt1052_irq_map[rt1052_pin_map[pin].gpio_pin];
|
irq_map = &rt1021_irq_map[rt1021_pin_map[pin].gpio_pin];
|
||||||
|
|
||||||
if(pin_map == RT_NULL || irq_map == RT_NULL)
|
if(pin_map == RT_NULL || irq_map == RT_NULL)
|
||||||
{
|
{
|
||||||
|
@ -541,17 +486,17 @@ static rt_err_t rt1052_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t rt1052_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
|
static rt_err_t rt1021_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
|
||||||
{
|
{
|
||||||
gpio_pin_config_t gpio;
|
gpio_pin_config_t gpio;
|
||||||
IRQn_Type irq_num;
|
IRQn_Type irq_num;
|
||||||
rt_uint32_t config_value = 0x1b0a0;
|
rt_uint32_t config_value = 0x1b0a0;
|
||||||
|
|
||||||
struct rt1052_pin* pin_map = RT_NULL;
|
struct rt1021_pin* pin_map = RT_NULL;
|
||||||
struct rt1052_irq* irq_map = RT_NULL;
|
struct rt1021_irq* irq_map = RT_NULL;
|
||||||
|
|
||||||
pin_map = &rt1052_pin_map[pin];
|
pin_map = &rt1021_pin_map[pin];
|
||||||
irq_map = &rt1052_irq_map[rt1052_pin_map[pin].gpio_pin];
|
irq_map = &rt1021_irq_map[rt1021_pin_map[pin].gpio_pin];
|
||||||
|
|
||||||
if(pin_map == RT_NULL || irq_map == RT_NULL)
|
if(pin_map == RT_NULL || irq_map == RT_NULL)
|
||||||
{
|
{
|
||||||
|
@ -572,7 +517,7 @@ static rt_err_t rt1052_pin_irq_enable(struct rt_device *device, rt_base_t pin, r
|
||||||
|
|
||||||
irq_map->enable = PIN_IRQ_ENABLE;
|
irq_map->enable = PIN_IRQ_ENABLE;
|
||||||
|
|
||||||
if(rt1052_pin_map[pin].gpio != GPIO5)
|
if(rt1021_pin_map[pin].gpio != GPIO5)
|
||||||
{
|
{
|
||||||
CLOCK_EnableClock(kCLOCK_Iomuxc);
|
CLOCK_EnableClock(kCLOCK_Iomuxc);
|
||||||
IOMUXC_SetPinMux(0x401F8010U + pin*4, 0x5U, 0, 0, 0, 0);
|
IOMUXC_SetPinMux(0x401F8010U + pin*4, 0x5U, 0, 0, 0, 0);
|
||||||
|
@ -580,7 +525,7 @@ static rt_err_t rt1052_pin_irq_enable(struct rt_device *device, rt_base_t pin, r
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
|
CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
|
||||||
IOMUXC_SetPinMux(0x400A8000U + (pin-125)*4, 0x5U, 0, 0, 0, 0);
|
IOMUXC_SetPinMux(0x400A8000U + (pin-94)*4, 0x5U, 0, 0, 0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
gpio.direction = kGPIO_DigitalInput;
|
gpio.direction = kGPIO_DigitalInput;
|
||||||
|
@ -619,22 +564,22 @@ static rt_err_t rt1052_pin_irq_enable(struct rt_device *device, rt_base_t pin, r
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if(rt1052_pin_map[pin].gpio != GPIO5)
|
if(rt1021_pin_map[pin].gpio != GPIO5)
|
||||||
{
|
{
|
||||||
IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value);
|
IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
IOMUXC_SetPinConfig(0, 0, 0, 0, 0x400A8018U + (pin-125)*4, config_value);
|
IOMUXC_SetPinConfig(0, 0, 0, 0, 0x400A8018U + (pin-94)*4, config_value);
|
||||||
}
|
}
|
||||||
|
|
||||||
irq_num = rt1052_get_irqnum(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin);
|
irq_num = rt1021_get_irqnum(rt1021_pin_map[pin].gpio, rt1021_pin_map[pin].gpio_pin);
|
||||||
|
|
||||||
NVIC_SetPriority(irq_num, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 5, 0));
|
NVIC_SetPriority(irq_num, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 5, 0));
|
||||||
EnableIRQ(irq_num);
|
EnableIRQ(irq_num);
|
||||||
|
|
||||||
GPIO_PinInit(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, &gpio);
|
GPIO_PinInit(rt1021_pin_map[pin].gpio, rt1021_pin_map[pin].gpio_pin, &gpio);
|
||||||
GPIO_PortEnableInterrupts(rt1052_pin_map[pin].gpio, 1U << rt1052_pin_map[pin].gpio_pin);
|
GPIO_PortEnableInterrupts(rt1021_pin_map[pin].gpio, 1U << rt1021_pin_map[pin].gpio_pin);
|
||||||
}
|
}
|
||||||
else if(enabled == PIN_IRQ_DISABLE)
|
else if(enabled == PIN_IRQ_DISABLE)
|
||||||
{
|
{
|
||||||
|
@ -644,7 +589,7 @@ static rt_err_t rt1052_pin_irq_enable(struct rt_device *device, rt_base_t pin, r
|
||||||
}
|
}
|
||||||
|
|
||||||
irq_map->enable = PIN_IRQ_DISABLE;
|
irq_map->enable = PIN_IRQ_DISABLE;
|
||||||
irq_num = rt1052_get_irqnum(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin);
|
irq_num = rt1021_get_irqnum(rt1021_pin_map[pin].gpio, rt1021_pin_map[pin].gpio_pin);
|
||||||
|
|
||||||
NVIC_DisableIRQ(irq_num);
|
NVIC_DisableIRQ(irq_num);
|
||||||
}
|
}
|
||||||
|
@ -658,16 +603,16 @@ static rt_err_t rt1052_pin_irq_enable(struct rt_device *device, rt_base_t pin, r
|
||||||
|
|
||||||
int rt_hw_pin_init(void)
|
int rt_hw_pin_init(void)
|
||||||
{
|
{
|
||||||
int ret = RT_EOK;
|
int ret = RT_EOK;
|
||||||
|
|
||||||
rt1052_pin_ops.pin_mode = rt1052_pin_mode;
|
rt1021_pin_ops.pin_mode = rt1021_pin_mode;
|
||||||
rt1052_pin_ops.pin_read = rt1052_pin_read;
|
rt1021_pin_ops.pin_read = rt1021_pin_read;
|
||||||
rt1052_pin_ops.pin_write = rt1052_pin_write;
|
rt1021_pin_ops.pin_write = rt1021_pin_write;
|
||||||
rt1052_pin_ops.pin_attach_irq = rt1052_pin_attach_irq;
|
rt1021_pin_ops.pin_attach_irq = rt1021_pin_attach_irq;
|
||||||
rt1052_pin_ops.pin_detach_irq = rt1052_pin_detach_irq;
|
rt1021_pin_ops.pin_detach_irq = rt1021_pin_detach_irq;
|
||||||
rt1052_pin_ops.pin_irq_enable = rt1052_pin_irq_enable;
|
rt1021_pin_ops.pin_irq_enable = rt1021_pin_irq_enable;
|
||||||
|
|
||||||
ret = rt_device_pin_register("pin", &rt1052_pin_ops, RT_NULL);
|
ret = rt_device_pin_register("pin", &rt1021_pin_ops, RT_NULL);
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,11 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_pin.h
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
|
|
|
@ -1,15 +1,12 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_rtc.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2018-03-15 Liuguang the first version.
|
* 2018-03-15 Liuguang the first version.
|
||||||
|
* 2019-03-11 JiCheng Change the name from rt1052 to RT1021
|
||||||
*/
|
*/
|
||||||
#include "drv_rtc.h"
|
#include "drv_rtc.h"
|
||||||
|
|
||||||
|
@ -62,7 +59,7 @@ static int set_timestamp(time_t timestamp)
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t rt1052_hp_rtc_init(rt_device_t dev)
|
static rt_err_t rt1021_hp_rtc_init(rt_device_t dev)
|
||||||
{
|
{
|
||||||
snvs_hp_rtc_config_t snvsRtcConfig;
|
snvs_hp_rtc_config_t snvsRtcConfig;
|
||||||
|
|
||||||
|
@ -74,27 +71,27 @@ static rt_err_t rt1052_hp_rtc_init(rt_device_t dev)
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t rt1052_hp_rtc_open(rt_device_t dev, rt_uint16_t oflag)
|
static rt_err_t rt1021_hp_rtc_open(rt_device_t dev, rt_uint16_t oflag)
|
||||||
{
|
{
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t rt1052_hp_rtc_close(rt_device_t dev)
|
static rt_err_t rt1021_hp_rtc_close(rt_device_t dev)
|
||||||
{
|
{
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_size_t rt1052_hp_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
|
static rt_size_t rt1021_hp_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_size_t rt1052_hp_rtc_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
|
static rt_size_t rt1021_hp_rtc_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t rt1052_hp_rtc_control(rt_device_t dev, int cmd, void *args)
|
static rt_err_t rt1021_hp_rtc_control(rt_device_t dev, int cmd, void *args)
|
||||||
{
|
{
|
||||||
RT_ASSERT(dev != RT_NULL);
|
RT_ASSERT(dev != RT_NULL);
|
||||||
|
|
||||||
|
@ -122,12 +119,12 @@ static rt_err_t rt1052_hp_rtc_control(rt_device_t dev, int cmd, void *args)
|
||||||
static struct rt_device device =
|
static struct rt_device device =
|
||||||
{
|
{
|
||||||
.type = RT_Device_Class_RTC,
|
.type = RT_Device_Class_RTC,
|
||||||
.init = rt1052_hp_rtc_init,
|
.init = rt1021_hp_rtc_init,
|
||||||
.open = rt1052_hp_rtc_open,
|
.open = rt1021_hp_rtc_open,
|
||||||
.close = rt1052_hp_rtc_close,
|
.close = rt1021_hp_rtc_close,
|
||||||
.read = rt1052_hp_rtc_read,
|
.read = rt1021_hp_rtc_read,
|
||||||
.write = rt1052_hp_rtc_write,
|
.write = rt1021_hp_rtc_write,
|
||||||
.control = rt1052_hp_rtc_control,
|
.control = rt1021_hp_rtc_control,
|
||||||
};
|
};
|
||||||
|
|
||||||
int rt_hw_hp_rtc_init(void)
|
int rt_hw_hp_rtc_init(void)
|
||||||
|
|
|
@ -1,11 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_rtc.h
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
|
|
|
@ -1,25 +1,12 @@
|
||||||
/*
|
/*
|
||||||
* File : syscall_write.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License along
|
|
||||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
|
||||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2017-10-10 Tanek first version
|
* 2017-10-10 Tanek first version
|
||||||
|
* 2019-03-11 JiCheng Adapt RT1020's IO MAP
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <rtthread.h>
|
#include <rtthread.h>
|
||||||
|
@ -480,19 +467,6 @@ static void log_toggle(int en)
|
||||||
FINSH_FUNCTION_EXPORT(log_toggle, toglle log dumple);
|
FINSH_FUNCTION_EXPORT(log_toggle, toglle log dumple);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
//static rt_int32_t _mmc_get_card_status(struct rt_mmcsd_host *host)
|
|
||||||
//{
|
|
||||||
// MMCSD_DGB("%s, start\n", __func__);
|
|
||||||
// MMCSD_DGB("%s, end\n", __func__);
|
|
||||||
//
|
|
||||||
// return 0;
|
|
||||||
//}
|
|
||||||
//
|
|
||||||
//static void _mmc_enable_sdio_irq(struct rt_mmcsd_host *host, rt_int32_t enable)
|
|
||||||
//{
|
|
||||||
//
|
|
||||||
//}
|
|
||||||
|
|
||||||
static const struct rt_mmcsd_host_ops ops =
|
static const struct rt_mmcsd_host_ops ops =
|
||||||
{
|
{
|
||||||
_mmc_request,
|
_mmc_request,
|
||||||
|
|
|
@ -1,15 +1,12 @@
|
||||||
/*
|
/*
|
||||||
* File : board.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2009 RT-Thread Develop Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2017-12-04 Tanek first implementation
|
* 2017-12-04 Tanek first implementation
|
||||||
|
* 2019-03-11 JiCheng Adapt RT1020's IO MAP
|
||||||
*/
|
*/
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
#include <rthw.h>
|
#include <rthw.h>
|
||||||
|
@ -50,32 +47,6 @@ static void _clock_init(void)
|
||||||
_WDWORD(0x400D8030,0x00002001);
|
_WDWORD(0x400D8030,0x00002001);
|
||||||
_WDWORD(0x400D8100,0x001d0000);
|
_WDWORD(0x400D8100,0x001d0000);
|
||||||
_WDWORD(0x400FC014,0x00010D40);
|
_WDWORD(0x400FC014,0x00010D40);
|
||||||
// // Enable SYS PLL
|
|
||||||
// _WDWORD(0x400D8030,0x00002001);
|
|
||||||
// do
|
|
||||||
// {
|
|
||||||
// reg = _RDWORD(0x400D8030);
|
|
||||||
// }while((reg & 0x80000000) == 0);
|
|
||||||
|
|
||||||
// // Ungate SYS PLL PFD2
|
|
||||||
// reg = _RDWORD(0x400D8100);
|
|
||||||
// reg &= ~0x800000;
|
|
||||||
// _WDWORD(0x400D8100,reg);
|
|
||||||
|
|
||||||
// // SEMC clock source selection.
|
|
||||||
// // SDRAM running at 133Mhz
|
|
||||||
// // CBCDR:
|
|
||||||
// // SEMC_ALT_CLK_SEL: 0 PLL2 (SYS PLL) PFD2
|
|
||||||
// // SEMC_CLK_SEL: 1 SEMC_ALT_CLK
|
|
||||||
// // SEMC_PODF: 2 divide by 3
|
|
||||||
// reg = _RDWORD(0x400FC014);
|
|
||||||
// reg |= 0x20040;
|
|
||||||
// _WDWORD(0x400FC014,reg);
|
|
||||||
|
|
||||||
// // Disable MPU which will be enabled by ROM to prevent code execution
|
|
||||||
// reg = _RDWORD(0xE000ED94);
|
|
||||||
// reg &= ~0x1;
|
|
||||||
// _WDWORD(0xE000ED94, reg);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void _sdr_Init(void)
|
static void _sdr_Init(void)
|
||||||
|
@ -219,5 +190,5 @@ int imxrt_sdram_init(void)
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
INIT_PREV_EXPORT(imxrt_sdram_init);
|
||||||
/*@}*/
|
/*@}*/
|
||||||
|
|
|
@ -1,15 +1,12 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_spi_bus.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2018-03-27 Liuguang the first version.
|
* 2018-03-27 Liuguang the first version.
|
||||||
|
* 2019-03-11 JiCheng Adapt RT1020's IO MAP
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "drv_spi_bus.h"
|
#include "drv_spi_bus.h"
|
||||||
|
|
|
@ -1,11 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_spi_bus.h
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
|
|
|
@ -1,11 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_spi_flash.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
|
|
|
@ -1,11 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_spi_flash.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
|
|
|
@ -1,16 +1,13 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_uart.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2017-10-10 Tanek the first version
|
* 2017-10-10 Tanek the first version
|
||||||
* 2018-03-17 laiyiketang Add other uart.
|
* 2018-03-17 laiyiketang Add other uart.
|
||||||
|
* 2019-03-11 JiCheng Adapt RT1021's IO MAP
|
||||||
*/
|
*/
|
||||||
#include <rtthread.h>
|
#include <rtthread.h>
|
||||||
#include "drv_uart.h"
|
#include "drv_uart.h"
|
||||||
|
|
|
@ -1,15 +1,12 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_uart.h
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2017-10-10 Tanek the first version
|
* 2017-10-10 Tanek the first version
|
||||||
|
* 2018-03-17 laiyiketang Add other uart.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __DRV_UART_H__
|
#ifndef __DRV_UART_H__
|
||||||
|
|
|
@ -1,11 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* File : drv_usbc.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2009 RT-Thread Develop Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
|
|
|
@ -15,7 +15,7 @@ BSP默认支持的i.MX RT1021处理器具备以下简要的特性:
|
||||||
|
|
||||||
## 2. 编译说明
|
## 2. 编译说明
|
||||||
|
|
||||||
i.MX RT1021板级包支持MDK5﹑IAR开发环境和GCC编译器,以下是具体版本信息:
|
i.MX RT1020板级包支持MDK5﹑IAR开发环境和GCC编译器,以下是具体版本信息:
|
||||||
|
|
||||||
| IDE/编译器 | 已测试版本 |
|
| IDE/编译器 | 已测试版本 |
|
||||||
| ---------- | --------- |
|
| ---------- | --------- |
|
||||||
|
@ -26,15 +26,11 @@ i.MX RT1021板级包支持MDK5﹑IAR开发环境和GCC编译器,以下是具
|
||||||
|
|
||||||
### 3.1 配置工程
|
### 3.1 配置工程
|
||||||
|
|
||||||
i.MX RT1021 BSP支持多块开发板,包括官方开发板MIMXRT1020-EVK。如果不是基于官方开发板,那么需要重新配置并生成工程:
|
i.MX RT1020 BSP默认支持官方开发板MIMXRT1020-EVK。
|
||||||
|
|
||||||
- 在bsp下打开env工具
|
|
||||||
- 输入`menuconfig`命令,`RT1021 Board select (***)-->`选择正确的开发板。
|
|
||||||
- 输入`scons --target=mdk5 -s`或`scons --target=iar`来生成需要的工程
|
|
||||||
|
|
||||||
### 3.2 下载和仿真
|
### 3.2 下载和仿真
|
||||||
|
|
||||||
#### 3.2.1 MIMXRT1021-EVK
|
#### 3.2.1 MIMXRT1020-EVK
|
||||||
|
|
||||||
EVK开发板有板载OpenSDA仿真器,仿真器还连接到i.MX RT1021的UART1。使用USB线连接电脑和仿真器的USB口(J23),就可以进行下载和仿真。在终端工具里打开仿真器的虚拟串口。
|
EVK开发板有板载OpenSDA仿真器,仿真器还连接到i.MX RT1021的UART1。使用USB线连接电脑和仿真器的USB口(J23),就可以进行下载和仿真。在终端工具里打开仿真器的虚拟串口。
|
||||||
|
|
||||||
|
@ -46,19 +42,22 @@ EVK开发板有板载OpenSDA仿真器,仿真器还连接到i.MX RT1021的UART1
|
||||||
|
|
||||||
\ | /
|
\ | /
|
||||||
- RT - Thread Operating System
|
- RT - Thread Operating System
|
||||||
/ | \ 3.0.4 build May 2 2018
|
/ | \ 4.0.1 build Mar 11 2019
|
||||||
2006 - 2018 Copyright by rt-thread team
|
2006 - 2019 Copyright by rt-thread team
|
||||||
|
[I/FLEXSPI] NorFlash Init
|
||||||
|
[I/FLEXSPI] Vendor ID: 0x15
|
||||||
|
[I/FLEXSPI] NorFlash Init Done
|
||||||
lwIP-2.0.2 initialized!
|
lwIP-2.0.2 initialized!
|
||||||
using armcc, version: 5060750
|
using armcc, version: 5060750
|
||||||
build time: May 2 2018 21:52:40
|
build time: Mar 11 2019 22:24:46
|
||||||
msh />[PHY] wait autonegotiation complete...
|
msh />[PHY] wait autonegotiation complete...
|
||||||
SD card capacity 123904 KB
|
[I/SDIO] SD card capacity 15558144 KB.
|
||||||
probe mmcsd block device!
|
found part[0], begin: 32256, size: 14.857GB
|
||||||
found part[0], begin: 32256, size: 120.992MB
|
|
||||||
File System initialized!
|
File System initialized!
|
||||||
[PHY] wait autonegotiation complete...
|
[PHY] wait autonegotiation complete...
|
||||||
```
|
```
|
||||||
|
|
||||||
|
|
||||||
## 4. 驱动支持情况及计划
|
## 4. 驱动支持情况及计划
|
||||||
|
|
||||||
| 驱动 | 支持情况 | 备注 |
|
| 驱动 | 支持情况 | 备注 |
|
||||||
|
@ -76,7 +75,7 @@ File System initialized!
|
||||||
## 5. 联系人信息
|
## 5. 联系人信息
|
||||||
|
|
||||||
维护人:
|
维护人:
|
||||||
|
- [JiCheng](https://github.com/jicheng0622)
|
||||||
|
|
||||||
## 6. 参考
|
## 6. 参考
|
||||||
|
|
||||||
|
|
|
@ -1,517 +0,0 @@
|
||||||
/*
|
|
||||||
* File : device_test.c
|
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2011, RT-Thread Development Team
|
|
||||||
*
|
|
||||||
* The license and distribution terms for this file may be
|
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://openlab.rt-thread.com/license/LICENSE.
|
|
||||||
*
|
|
||||||
* Change Logs:
|
|
||||||
* Date Author Notes
|
|
||||||
* 2011-01-01 aozima the first version.
|
|
||||||
* 2012-02-11 aozima add multiple sector speed test.
|
|
||||||
* 2012-05-27 aozima use rt_deice API.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <rtthread.h>
|
|
||||||
|
|
||||||
/* calculate speed */
|
|
||||||
static void calculate_speed_print(rt_uint32_t speed)
|
|
||||||
{
|
|
||||||
rt_uint32_t k,m;
|
|
||||||
|
|
||||||
k = speed/1024UL;
|
|
||||||
if( k )
|
|
||||||
{
|
|
||||||
m = k/1024UL;
|
|
||||||
if( m )
|
|
||||||
{
|
|
||||||
rt_kprintf("%d.%dMbyte/s",m,k%1024UL*100/1024UL);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
rt_kprintf("%d.%dKbyte/s",k,speed%1024UL*100/1024UL);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
rt_kprintf("%dbyte/s",speed);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static rt_err_t _block_device_test(rt_device_t device)
|
|
||||||
{
|
|
||||||
rt_err_t result;
|
|
||||||
struct rt_device_blk_geometry geometry;
|
|
||||||
rt_uint8_t * read_buffer = RT_NULL;
|
|
||||||
rt_uint8_t * write_buffer = RT_NULL;
|
|
||||||
|
|
||||||
rt_kprintf("\r\n");
|
|
||||||
|
|
||||||
if( (device->flag & RT_DEVICE_FLAG_RDWR) == RT_DEVICE_FLAG_RDWR )
|
|
||||||
{
|
|
||||||
// device can read and write.
|
|
||||||
// step 1: open device
|
|
||||||
result = rt_device_open(device,RT_DEVICE_FLAG_RDWR);
|
|
||||||
if( result != RT_EOK )
|
|
||||||
{
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
|
|
||||||
// step 2: get device info
|
|
||||||
rt_memset(&geometry, 0, sizeof(geometry));
|
|
||||||
result = rt_device_control(device,
|
|
||||||
RT_DEVICE_CTRL_BLK_GETGEOME,
|
|
||||||
&geometry);
|
|
||||||
if( result != RT_EOK )
|
|
||||||
{
|
|
||||||
rt_kprintf("device : %s cmd RT_DEVICE_CTRL_BLK_GETGEOME failed.\r\n");
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
rt_kprintf("device info:\r\n");
|
|
||||||
rt_kprintf("sector size : %d byte\r\n", geometry.bytes_per_sector);
|
|
||||||
rt_kprintf("sector count : %d \r\n", geometry.sector_count);
|
|
||||||
rt_kprintf("block size : %d byte\r\n", geometry.block_size);
|
|
||||||
|
|
||||||
rt_kprintf("\r\n");
|
|
||||||
read_buffer = rt_malloc(geometry.bytes_per_sector);
|
|
||||||
if( read_buffer == RT_NULL )
|
|
||||||
{
|
|
||||||
rt_kprintf("no memory for read_buffer!\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
write_buffer = rt_malloc(geometry.bytes_per_sector);
|
|
||||||
if( write_buffer == RT_NULL )
|
|
||||||
{
|
|
||||||
rt_kprintf("no memory for write_buffer!\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* step 3: R/W test */
|
|
||||||
{
|
|
||||||
rt_uint32_t i,err_count, sector_no;
|
|
||||||
rt_uint8_t * data_point;
|
|
||||||
|
|
||||||
i = rt_device_read(device, 0, read_buffer, 1);
|
|
||||||
if(i != 1)
|
|
||||||
{
|
|
||||||
rt_kprintf("read device :%s ", device->parent.name);
|
|
||||||
rt_kprintf("the first sector failed.\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
|
|
||||||
data_point = write_buffer;
|
|
||||||
for(i=0; i<geometry.bytes_per_sector; i++)
|
|
||||||
{
|
|
||||||
*data_point++ = (rt_uint8_t)i;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* write first sector */
|
|
||||||
sector_no = 0;
|
|
||||||
data_point = write_buffer;
|
|
||||||
*data_point++ = (rt_uint8_t)sector_no;
|
|
||||||
i = rt_device_write(device, sector_no, write_buffer,1);
|
|
||||||
if( i != 1 )
|
|
||||||
{
|
|
||||||
rt_kprintf("read the first sector success!\r\n");
|
|
||||||
rt_kprintf("but write device :%s ", device->parent.name);
|
|
||||||
rt_kprintf("the first sector failed.\r\n");
|
|
||||||
rt_kprintf("maybe readonly!\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* write the second sector */
|
|
||||||
sector_no = 1;
|
|
||||||
data_point = write_buffer;
|
|
||||||
*data_point++ = (rt_uint8_t)sector_no;
|
|
||||||
i = rt_device_write(device,sector_no,write_buffer,1);
|
|
||||||
if( i != 1 )
|
|
||||||
{
|
|
||||||
rt_kprintf("write device :%s ",device->parent.name);
|
|
||||||
rt_kprintf("the second sector failed.\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* write the end sector */
|
|
||||||
sector_no = geometry.sector_count-1;
|
|
||||||
data_point = write_buffer;
|
|
||||||
*data_point++ = (rt_uint8_t)sector_no;
|
|
||||||
i = rt_device_write(device,sector_no,write_buffer,1);
|
|
||||||
if( i != 1 )
|
|
||||||
{
|
|
||||||
rt_kprintf("write device :%s ",device->parent.name);
|
|
||||||
rt_kprintf("the end sector failed.\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* verify first sector */
|
|
||||||
sector_no = 0;
|
|
||||||
i = rt_device_read(device,sector_no,read_buffer,1);
|
|
||||||
if( i != 1 )
|
|
||||||
{
|
|
||||||
rt_kprintf("read device :%s ",device->parent.name);
|
|
||||||
rt_kprintf("the first sector failed.\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
err_count = 0;
|
|
||||||
data_point = read_buffer;
|
|
||||||
if( (*data_point++) != (rt_uint8_t)sector_no)
|
|
||||||
{
|
|
||||||
err_count++;
|
|
||||||
}
|
|
||||||
for(i=1; i<geometry.bytes_per_sector; i++)
|
|
||||||
{
|
|
||||||
if( (*data_point++) != (rt_uint8_t)i )
|
|
||||||
{
|
|
||||||
err_count++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if( err_count > 0 )
|
|
||||||
{
|
|
||||||
rt_kprintf("verify device :%s ",device->parent.name);
|
|
||||||
rt_kprintf("the first sector failed.\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* verify sector sector */
|
|
||||||
sector_no = 1;
|
|
||||||
i = rt_device_read(device,sector_no,read_buffer,1);
|
|
||||||
if( i != 1 )
|
|
||||||
{
|
|
||||||
rt_kprintf("read device :%s ",device->parent.name);
|
|
||||||
rt_kprintf("the second sector failed.\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
err_count = 0;
|
|
||||||
data_point = read_buffer;
|
|
||||||
if( (*data_point++) != (rt_uint8_t)sector_no)
|
|
||||||
{
|
|
||||||
err_count++;
|
|
||||||
}
|
|
||||||
for(i=1; i<geometry.bytes_per_sector; i++)
|
|
||||||
{
|
|
||||||
if( (*data_point++) != (rt_uint8_t)i )
|
|
||||||
{
|
|
||||||
err_count++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if( err_count > 0 )
|
|
||||||
{
|
|
||||||
rt_kprintf("verify device :%s ",device->parent.name);
|
|
||||||
rt_kprintf("the second sector failed.\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* verify the end sector */
|
|
||||||
sector_no = geometry.sector_count-1;
|
|
||||||
i = rt_device_read(device,sector_no,read_buffer,1);
|
|
||||||
if( i != 1 )
|
|
||||||
{
|
|
||||||
rt_kprintf("read device :%s ",device->parent.name);
|
|
||||||
rt_kprintf("the end sector failed.\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
err_count = 0;
|
|
||||||
data_point = read_buffer;
|
|
||||||
if( (*data_point++) != (rt_uint8_t)sector_no)
|
|
||||||
{
|
|
||||||
err_count++;
|
|
||||||
}
|
|
||||||
for(i=1; i<geometry.bytes_per_sector; i++)
|
|
||||||
{
|
|
||||||
if( (*data_point++) != (rt_uint8_t)i )
|
|
||||||
{
|
|
||||||
err_count++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if( err_count > 0 )
|
|
||||||
{
|
|
||||||
rt_kprintf("verify device :%s ",device->parent.name);
|
|
||||||
rt_kprintf("the end sector failed.\r\n");
|
|
||||||
goto __return;
|
|
||||||
}
|
|
||||||
rt_kprintf("device R/W test pass!\r\n");
|
|
||||||
|
|
||||||
} /* step 3: I/O R/W test */
|
|
||||||
|
|
||||||
rt_kprintf("\r\nRT_TICK_PER_SECOND:%d\r\n", RT_TICK_PER_SECOND);
|
|
||||||
|
|
||||||
// step 4: continuous single sector speed test
|
|
||||||
{
|
|
||||||
rt_uint32_t tick_start,tick_end;
|
|
||||||
rt_uint32_t i;
|
|
||||||
|
|
||||||
rt_kprintf("\r\ncontinuous single sector speed test:\r\n");
|
|
||||||
|
|
||||||
if( geometry.sector_count < 10 )
|
|
||||||
{
|
|
||||||
rt_kprintf("device sector_count < 10, speed test abort!\r\n");
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
unsigned int sector;
|
|
||||||
|
|
||||||
// sign sector write
|
|
||||||
rt_kprintf("write: ");
|
|
||||||
sector = 0;
|
|
||||||
tick_start = rt_tick_get();
|
|
||||||
for(i=0; i<200; i++)
|
|
||||||
{
|
|
||||||
sector += rt_device_write(device, i, read_buffer, 1);
|
|
||||||
if((i != 0) && ((i%4) == 0) )
|
|
||||||
{
|
|
||||||
if(sector < 4)
|
|
||||||
{
|
|
||||||
rt_kprintf("#");
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
rt_kprintf("<");
|
|
||||||
}
|
|
||||||
sector = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
tick_end = rt_tick_get();
|
|
||||||
rt_kprintf("\r\nwrite 200 sector from %d to %d, ",tick_start,tick_end);
|
|
||||||
calculate_speed_print( (geometry.bytes_per_sector*200UL*RT_TICK_PER_SECOND)/(tick_end-tick_start) );
|
|
||||||
rt_kprintf("\r\n");
|
|
||||||
|
|
||||||
// sign sector read
|
|
||||||
rt_kprintf("read : ");
|
|
||||||
sector = 0;
|
|
||||||
tick_start = rt_tick_get();
|
|
||||||
for(i=0; i<200; i++)
|
|
||||||
{
|
|
||||||
sector += rt_device_read(device, i, read_buffer, 1);
|
|
||||||
if((i != 0) && ((i%4) == 0) )
|
|
||||||
{
|
|
||||||
if(sector < 4)
|
|
||||||
{
|
|
||||||
rt_kprintf("#");
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
rt_kprintf(">");
|
|
||||||
}
|
|
||||||
sector = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
tick_end = rt_tick_get();
|
|
||||||
rt_kprintf("\r\nread 200 sector from %d to %d, ",tick_start,tick_end);
|
|
||||||
calculate_speed_print( (geometry.bytes_per_sector*200UL*RT_TICK_PER_SECOND)/(tick_end-tick_start) );
|
|
||||||
rt_kprintf("\r\n");
|
|
||||||
}
|
|
||||||
}// step 4: speed test
|
|
||||||
|
|
||||||
// step 5: random single sector speed test
|
|
||||||
{
|
|
||||||
rt_uint32_t tick_start,tick_end;
|
|
||||||
rt_uint32_t i;
|
|
||||||
|
|
||||||
rt_kprintf("\r\nrandom single sector speed test:\r\n");
|
|
||||||
|
|
||||||
if( geometry.sector_count < 10 )
|
|
||||||
{
|
|
||||||
rt_kprintf("device sector_count < 10, speed test abort!\r\n");
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
unsigned int sector;
|
|
||||||
|
|
||||||
// sign sector write
|
|
||||||
rt_kprintf("write: ");
|
|
||||||
sector = 0;
|
|
||||||
tick_start = rt_tick_get();
|
|
||||||
for(i=0; i<200; i++)
|
|
||||||
{
|
|
||||||
sector += rt_device_write(device, (geometry.sector_count / 10) * (i%10) + (i%10), read_buffer, 1);
|
|
||||||
if((i != 0) && ((i%4) == 0) )
|
|
||||||
{
|
|
||||||
if(sector < 4)
|
|
||||||
{
|
|
||||||
rt_kprintf("#");
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
rt_kprintf("<");
|
|
||||||
}
|
|
||||||
sector = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
tick_end = rt_tick_get();
|
|
||||||
rt_kprintf("\r\nwrite 200 sector from %d to %d, ",tick_start,tick_end);
|
|
||||||
calculate_speed_print( (geometry.bytes_per_sector*200UL*RT_TICK_PER_SECOND)/(tick_end-tick_start) );
|
|
||||||
rt_kprintf("\r\n");
|
|
||||||
|
|
||||||
// sign sector read
|
|
||||||
rt_kprintf("read : ");
|
|
||||||
sector = 0;
|
|
||||||
tick_start = rt_tick_get();
|
|
||||||
for(i=0; i<200; i++)
|
|
||||||
{
|
|
||||||
sector += rt_device_read(device, (geometry.sector_count / 10) * (i%10) + (i%10), read_buffer, 1);
|
|
||||||
if((i != 0) && ((i%4) == 0) )
|
|
||||||
{
|
|
||||||
if(sector < 4)
|
|
||||||
{
|
|
||||||
rt_kprintf("#");
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
rt_kprintf(">");
|
|
||||||
}
|
|
||||||
sector = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
tick_end = rt_tick_get();
|
|
||||||
rt_kprintf("\r\nread 200 sector from %d to %d, ",tick_start,tick_end);
|
|
||||||
calculate_speed_print( (geometry.bytes_per_sector*200UL*RT_TICK_PER_SECOND)/(tick_end-tick_start) );
|
|
||||||
rt_kprintf("\r\n");
|
|
||||||
}
|
|
||||||
}// step 4: speed test
|
|
||||||
|
|
||||||
/* step 6: multiple sector speed test */
|
|
||||||
{
|
|
||||||
rt_uint8_t * multiple_buffer;
|
|
||||||
rt_uint8_t * ptr;
|
|
||||||
rt_uint32_t tick_start,tick_end;
|
|
||||||
rt_uint32_t sector,i;
|
|
||||||
|
|
||||||
rt_kprintf("\r\nmultiple sector speed test\r\n");
|
|
||||||
|
|
||||||
for(sector=2; sector<256; sector=sector*2)
|
|
||||||
{
|
|
||||||
multiple_buffer = rt_malloc(geometry.bytes_per_sector * sector);
|
|
||||||
|
|
||||||
if(multiple_buffer == RT_NULL)
|
|
||||||
{
|
|
||||||
rt_kprintf("no memory for %d sector! multiple sector speed test abort!\r\n", sector);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
rt_memset(multiple_buffer, sector, geometry.bytes_per_sector * sector);
|
|
||||||
rt_kprintf("write: ");
|
|
||||||
tick_start = rt_tick_get();
|
|
||||||
for(i=0; i<10; i++)
|
|
||||||
{
|
|
||||||
rt_size_t n;
|
|
||||||
n = rt_device_write(device, 50, multiple_buffer, sector);
|
|
||||||
if(n == sector)
|
|
||||||
{
|
|
||||||
rt_kprintf("<");
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
rt_kprintf("#");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
tick_end = rt_tick_get();
|
|
||||||
rt_kprintf("\r\n");
|
|
||||||
rt_kprintf("multiple write %d sector speed : ", sector);
|
|
||||||
calculate_speed_print( (geometry.bytes_per_sector * sector * 10 * RT_TICK_PER_SECOND)/(tick_end-tick_start) );
|
|
||||||
rt_kprintf("\r\n");
|
|
||||||
|
|
||||||
rt_memset(multiple_buffer, ~sector, geometry.bytes_per_sector * sector);
|
|
||||||
rt_kprintf("read : ");
|
|
||||||
tick_start = rt_tick_get();
|
|
||||||
for(i=0; i<10; i++)
|
|
||||||
{
|
|
||||||
rt_size_t n;
|
|
||||||
n = rt_device_read(device, 50, multiple_buffer, sector);
|
|
||||||
if(n == sector)
|
|
||||||
{
|
|
||||||
rt_kprintf(">");
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
rt_kprintf("#");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
tick_end = rt_tick_get();
|
|
||||||
rt_kprintf("\r\n");
|
|
||||||
rt_kprintf("multiple read %d sector speed : ", sector);
|
|
||||||
calculate_speed_print( (geometry.bytes_per_sector * sector * 10 * RT_TICK_PER_SECOND)/(tick_end-tick_start) );
|
|
||||||
|
|
||||||
ptr = multiple_buffer;
|
|
||||||
for(i=0; i<geometry.bytes_per_sector * sector; i++)
|
|
||||||
{
|
|
||||||
if(*ptr != sector)
|
|
||||||
{
|
|
||||||
rt_kprintf(" but data verify fail!");
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
ptr++;
|
|
||||||
}
|
|
||||||
rt_kprintf("\r\n\r\n");
|
|
||||||
|
|
||||||
rt_free(multiple_buffer);
|
|
||||||
}
|
|
||||||
} /* step 5: multiple sector speed test */
|
|
||||||
|
|
||||||
return RT_EOK;
|
|
||||||
}// device can read and write.
|
|
||||||
else
|
|
||||||
{
|
|
||||||
// device read only
|
|
||||||
return RT_EOK;
|
|
||||||
}// device read only
|
|
||||||
|
|
||||||
__return:
|
|
||||||
if( read_buffer != RT_NULL )
|
|
||||||
{
|
|
||||||
rt_free(read_buffer);
|
|
||||||
}
|
|
||||||
if( write_buffer != RT_NULL )
|
|
||||||
{
|
|
||||||
rt_free(write_buffer);
|
|
||||||
}
|
|
||||||
return RT_ERROR;
|
|
||||||
}
|
|
||||||
|
|
||||||
int device_test(const char * device_name)
|
|
||||||
{
|
|
||||||
rt_device_t device = RT_NULL;
|
|
||||||
|
|
||||||
// step 1:find device
|
|
||||||
device = rt_device_find(device_name);
|
|
||||||
if( device == RT_NULL)
|
|
||||||
{
|
|
||||||
rt_kprintf("device %s: not found!\r\n");
|
|
||||||
return RT_ERROR;
|
|
||||||
}
|
|
||||||
|
|
||||||
// step 2:init device
|
|
||||||
if (!(device->flag & RT_DEVICE_FLAG_ACTIVATED))
|
|
||||||
{
|
|
||||||
rt_err_t result;
|
|
||||||
result = rt_device_init(device);
|
|
||||||
if (result != RT_EOK)
|
|
||||||
{
|
|
||||||
rt_kprintf("To initialize device:%s failed. The error code is %d\r\n",
|
|
||||||
device->parent.name, result);
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
device->flag |= RT_DEVICE_FLAG_ACTIVATED;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
// step 3: device test
|
|
||||||
switch( device->type )
|
|
||||||
{
|
|
||||||
case RT_Device_Class_Block :
|
|
||||||
rt_kprintf("block device!\r\n");
|
|
||||||
return _block_device_test(device);
|
|
||||||
default:
|
|
||||||
rt_kprintf("unkown device type : %02X",device->type);
|
|
||||||
return RT_ERROR;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef RT_USING_FINSH
|
|
||||||
#include <finsh.h>
|
|
||||||
FINSH_FUNCTION_EXPORT(device_test, e.g: device_test("sd0"));
|
|
||||||
#endif
|
|
||||||
|
|
|
@ -1,50 +0,0 @@
|
||||||
/*
|
|
||||||
* File : clock.c
|
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License along
|
|
||||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
|
||||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
|
||||||
*
|
|
||||||
* Change Logs:
|
|
||||||
* Date Author Notes
|
|
||||||
* 2017-12-05 Tanek first version
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <rtthread.h>
|
|
||||||
|
|
||||||
static void mem_dump(uint32_t buffer, uint32_t length)
|
|
||||||
{
|
|
||||||
uint32_t *buf = (uint32_t *)buffer;
|
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < length / 4; i++)
|
|
||||||
{
|
|
||||||
rt_kprintf("0x%08X,", buf[i]);
|
|
||||||
|
|
||||||
if (i % 8 == 7)
|
|
||||||
{
|
|
||||||
rt_kprintf("\n");
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
rt_kprintf(" ");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef RT_USING_FINSH
|
|
||||||
#include <finsh.h>
|
|
||||||
FINSH_FUNCTION_EXPORT(mem_dump, dump memory);
|
|
||||||
#endif
|
|
|
@ -1,103 +0,0 @@
|
||||||
#include <stdint.h>
|
|
||||||
|
|
||||||
#include <rthw.h>
|
|
||||||
#include <rtthread.h>
|
|
||||||
|
|
||||||
void mem_test(uint32_t address, uint32_t size )
|
|
||||||
{
|
|
||||||
uint32_t i;
|
|
||||||
|
|
||||||
rt_kprintf("memtest,address: 0x%08X size: 0x%08X\r\n", address, size);
|
|
||||||
|
|
||||||
/**< 8bit test */
|
|
||||||
{
|
|
||||||
uint8_t * p_uint8_t = (uint8_t *)address;
|
|
||||||
for(i=0; i<size/sizeof(uint8_t); i++)
|
|
||||||
{
|
|
||||||
*p_uint8_t++ = (uint8_t)i;
|
|
||||||
}
|
|
||||||
|
|
||||||
p_uint8_t = (uint8_t *)address;
|
|
||||||
for(i=0; i<size/sizeof(uint8_t); i++)
|
|
||||||
{
|
|
||||||
if( *p_uint8_t != (uint8_t)i )
|
|
||||||
{
|
|
||||||
rt_kprintf("8bit test fail @ 0x%08X\r\nsystem halt!!!!!",(uint32_t)p_uint8_t);
|
|
||||||
while(1);
|
|
||||||
}
|
|
||||||
p_uint8_t++;
|
|
||||||
}
|
|
||||||
rt_kprintf("8bit test pass!!\r\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
/**< 16bit test */
|
|
||||||
{
|
|
||||||
uint16_t * p_uint16_t = (uint16_t *)address;
|
|
||||||
for(i=0; i<size/sizeof(uint16_t); i++)
|
|
||||||
{
|
|
||||||
*p_uint16_t++ = (uint16_t)i;
|
|
||||||
}
|
|
||||||
|
|
||||||
p_uint16_t = (uint16_t *)address;
|
|
||||||
for(i=0; i<size/sizeof(uint16_t); i++)
|
|
||||||
{
|
|
||||||
if( *p_uint16_t != (uint16_t)i )
|
|
||||||
{
|
|
||||||
rt_kprintf("16bit test fail @ 0x%08X\r\nsystem halt!!!!!",(uint32_t)p_uint16_t);
|
|
||||||
while(1);
|
|
||||||
}
|
|
||||||
p_uint16_t++;
|
|
||||||
}
|
|
||||||
rt_kprintf("16bit test pass!!\r\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
/**< 32bit test */
|
|
||||||
{
|
|
||||||
uint32_t * p_uint32_t = (uint32_t *)address;
|
|
||||||
for(i=0; i<size/sizeof(uint32_t); i++)
|
|
||||||
{
|
|
||||||
*p_uint32_t++ = (uint32_t)i;
|
|
||||||
}
|
|
||||||
|
|
||||||
p_uint32_t = (uint32_t *)address;
|
|
||||||
for(i=0; i<size/sizeof(uint32_t); i++)
|
|
||||||
{
|
|
||||||
if( *p_uint32_t != (uint32_t)i )
|
|
||||||
{
|
|
||||||
rt_kprintf("32bit test fail @ 0x%08X\r\nsystem halt!!!!!",(uint32_t)p_uint32_t);
|
|
||||||
while(1);
|
|
||||||
}
|
|
||||||
p_uint32_t++;
|
|
||||||
}
|
|
||||||
rt_kprintf("32bit test pass!!\r\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
/**< 32bit Loopback test */
|
|
||||||
{
|
|
||||||
uint32_t * p_uint32_t = (uint32_t *)address;
|
|
||||||
for(i=0; i<size/sizeof(uint32_t); i++)
|
|
||||||
{
|
|
||||||
*p_uint32_t = (uint32_t)p_uint32_t;
|
|
||||||
p_uint32_t++;
|
|
||||||
}
|
|
||||||
|
|
||||||
p_uint32_t = (uint32_t *)address;
|
|
||||||
for(i=0; i<size/sizeof(uint32_t); i++)
|
|
||||||
{
|
|
||||||
if( *p_uint32_t != (uint32_t)p_uint32_t )
|
|
||||||
{
|
|
||||||
rt_kprintf("32bit Loopback test fail @ 0x%08X", (uint32_t)p_uint32_t);
|
|
||||||
rt_kprintf(" data:0x%08X \r\n", (uint32_t)*p_uint32_t);
|
|
||||||
rt_kprintf("system halt!!!!!",(uint32_t)p_uint32_t);
|
|
||||||
while(1);
|
|
||||||
}
|
|
||||||
p_uint32_t++;
|
|
||||||
}
|
|
||||||
rt_kprintf("32bit Loopback test pass!!\r\n");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef RT_USING_FINSH
|
|
||||||
#include <finsh.h>
|
|
||||||
FINSH_FUNCTION_EXPORT(mem_test, mem_test(0xA0000000, 0x00100000) );
|
|
||||||
#endif
|
|
|
@ -1,15 +1,12 @@
|
||||||
/*
|
/*
|
||||||
* File : board.c
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2009 RT-Thread Develop Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2009-01-05 Bernard first implementation
|
* 2009-01-05 Bernard first implementation
|
||||||
|
* 2019-03-11 JiCheng Change clock setting for RT1020
|
||||||
*/
|
*/
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
#include <rthw.h>
|
#include <rthw.h>
|
||||||
|
|
|
@ -1,15 +1,11 @@
|
||||||
/*
|
/*
|
||||||
* File : board.h
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
* This file is part of RT-Thread RTOS
|
|
||||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
* found in the file LICENSE in this distribution or at
|
|
||||||
* http://www.rt-thread.org/license/LICENSE
|
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2009-09-22 Bernard add board.h to this bsp
|
* 2009-01-05 Bernard first implementation
|
||||||
*/
|
*/
|
||||||
|
|
||||||
// <<< Use Configuration Wizard in Context Menu >>>
|
// <<< Use Configuration Wizard in Context Menu >>>
|
||||||
|
|
|
@ -43,7 +43,7 @@ if PLATFORM == 'gcc':
|
||||||
DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||||
CFLAGS = DEVICE + ' -std=c99 -Wall -D__FPU_PRESENT -eentry'
|
CFLAGS = DEVICE + ' -std=c99 -Wall -D__FPU_PRESENT -eentry'
|
||||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb -D__START=entry'
|
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb -D__START=entry'
|
||||||
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread-imxrt-gcc.map,-cref,-u,Reset_Handler -T flexspi_nor.ld'
|
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T flexspi_nor.ld'
|
||||||
|
|
||||||
CPATH = ''
|
CPATH = ''
|
||||||
LPATH = ''
|
LPATH = ''
|
||||||
|
|
|
@ -22,7 +22,7 @@
|
||||||
</DaveTm>
|
</DaveTm>
|
||||||
|
|
||||||
<Target>
|
<Target>
|
||||||
<TargetName>RT-Thread IMXRT1021</TargetName>
|
<TargetName>rtthread</TargetName>
|
||||||
<ToolsetNumber>0x4</ToolsetNumber>
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
<ToolsetName>ARM-ADS</ToolsetName>
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
<TargetOption>
|
<TargetOption>
|
||||||
|
|
|
@ -7,7 +7,7 @@
|
||||||
|
|
||||||
<Targets>
|
<Targets>
|
||||||
<Target>
|
<Target>
|
||||||
<TargetName>RT-Thread IMXRT1021</TargetName>
|
<TargetName>rtthread</TargetName>
|
||||||
<ToolsetNumber>0x4</ToolsetNumber>
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
<ToolsetName>ARM-ADS</ToolsetName>
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
<pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
|
<pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
|
||||||
|
|
Loading…
Reference in New Issue