rm48x50: remove useless reg_test code
This commit is contained in:
Grissiom
parent
85822f22b7
commit
480ac34445
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@ -17,9 +17,6 @@
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#include "system.h"
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#include "het.h"
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int ulRegTest1Counter;
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int ulRegTest2Counter;
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static rt_uint8_t user_thread_stack[512];
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static struct rt_thread user_thread;
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static void user_thread_entry(void *p)
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@ -35,28 +32,11 @@ static void user_thread_entry(void *p)
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}
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}
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static rt_uint8_t test_thread_stack[512];
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static struct rt_thread test_thread;
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void vRegTestTask1(void*);
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static rt_uint8_t test_thread_stack2[512];
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static struct rt_thread test_thread2;
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void vRegTestTask2(void*);
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int rt_application_init()
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{
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rt_thread_init(&user_thread, "user1", user_thread_entry, RT_NULL,
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user_thread_stack, sizeof(user_thread_stack), 21, 20);
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rt_thread_startup(&user_thread);
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rt_thread_init(&test_thread, "test1", vRegTestTask1, RT_NULL,
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test_thread_stack, sizeof(test_thread_stack), 21, 20);
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rt_thread_startup(&test_thread);
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rt_thread_init(&test_thread2, "test2", vRegTestTask2, RT_NULL,
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test_thread_stack2, sizeof(test_thread_stack2), 22, 20);
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rt_thread_startup(&test_thread2);
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return 0;
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}
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@ -1,472 +0,0 @@
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;/*
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; FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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;
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;
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; ***************************************************************************
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; * *
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; * FreeRTOS tutorial books are available in pdf and paperback. *
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; * Complete, revised, and edited pdf reference manuals are also *
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; * available. *
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; * *
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; * Purchasing FreeRTOS documentation will not only help you, by *
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; * ensuring you get running as quickly as possible and with an *
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; * in-depth knowledge of how to use FreeRTOS, it will also help *
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; * the FreeRTOS project to continue with its mission of providing *
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; * professional grade, cross platform, de facto standard solutions *
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; * for microcontrollers - completely free of charge! *
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; * *
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; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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; * *
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; * Thank you for using FreeRTOS, and thank you for your support! *
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; * *
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; ***************************************************************************
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;
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;
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; This file is part of the FreeRTOS distribution.
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;
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; FreeRTOS is free software; you can redistribute it and/or modify it under
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; the terms of the GNU General Public License (version 2) as published by the
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; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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; >>>NOTE<<< The modification to the GPL is included to allow you to
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; distribute a combined work that includes FreeRTOS without being obliged to
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; provide the source code for proprietary components outside of the FreeRTOS
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; kernel. FreeRTOS is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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; more details. You should have received a copy of the GNU General Public
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; License and the FreeRTOS license exception along with FreeRTOS; if not it
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; can be viewed here: http://www.freertos.org/a00114.html and also obtained
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; by writing to Richard Barry, contact details for whom are available on the
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; FreeRTOS WEB site.
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;
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; 1 tab == 4 spaces!
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;
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; ***************************************************************************
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; * *
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; * Having a problem? Start by reading the FAQ "My application does *
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; * not run, what could be wrong? *
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; * *
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; * http://www.FreeRTOS.org/FAQHelp.html *
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; * *
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; ***************************************************************************
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;
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;
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; http://www.FreeRTOS.org - Documentation, training, latest information,
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; license and contact details.
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;
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; http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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; including FreeRTOS+Trace - an indispensable productivity tool.
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;
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; Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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; the code with commercial support, indemnification, and middleware, under
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; the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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; provide a safety engineered and independently SIL3 certified version under
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; the SafeRTOS brand: http://www.SafeRTOS.com.
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;*/
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;-------------------------------------------------
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; port to RT-Thread by Grissiom
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;
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.def vRegTestTask1
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.ref ulRegTest1Counter
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.ref rt_thread_delay
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.text
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.arm
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vRegTestTask1:
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; Fill each general purpose register with a known value.
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mov r0, #0xFF
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mov r1, #0x11
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mov r2, #0x22
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mov r3, #0x33
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mov r4, #0x44
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mov r5, #0x55
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mov r6, #0x66
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mov r7, #0x77
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mov r8, #0x88
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mov r9, #0x99
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mov r10, #0xAA
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mov r11, #0xBB
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mov r12, #0xCC
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mov r14, #0xEE
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.if (__TI_VFP_SUPPORT__)
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; Fill each FPU register with a known value.
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vmov d0, r0, r1
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vmov d1, r2, r3
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vmov d2, r4, r5
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vmov d3, r6, r7
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vmov d4, r8, r9
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vmov d5, r10, r11
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vmov d6, r0, r1
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vmov d7, r2, r3
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vmov d8, r4, r5
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vmov d9, r6, r7
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vmov d10, r8, r9
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vmov d11, r10, r11
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vmov d12, r0, r1
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vmov d13, r2, r3
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vmov d14, r4, r5
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vmov d15, r6, r7
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.endif
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vRegTestLoop1:
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STMFD sp!, {r0-r3, r12}
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; Force yeild
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MOV r0, #5
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BL rt_thread_delay
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LDMFD sp!, {r0-r3, r12}
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.if (__TI_VFP_SUPPORT__)
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; Check all the VFP registers still contain the values set above.
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; First save registers that are clobbered by the test.
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STMFD sp!, { r0-r1 }
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vmov r0, r1, d0
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cmp r0, #0xFF
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bne reg1_error_loopf
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cmp r1, #0x11
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bne reg1_error_loopf
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vmov r0, r1, d1
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cmp r0, #0x22
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bne reg1_error_loopf
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cmp r1, #0x33
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bne reg1_error_loopf
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vmov r0, r1, d2
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cmp r0, #0x44
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bne reg1_error_loopf
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cmp r1, #0x55
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bne reg1_error_loopf
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vmov r0, r1, d3
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cmp r0, #0x66
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bne reg1_error_loopf
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cmp r1, #0x77
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bne reg1_error_loopf
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vmov r0, r1, d4
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cmp r0, #0x88
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bne reg1_error_loopf
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cmp r1, #0x99
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bne reg1_error_loopf
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vmov r0, r1, d5
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cmp r0, #0xAA
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bne reg1_error_loopf
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cmp r1, #0xBB
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bne reg1_error_loopf
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vmov r0, r1, d6
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cmp r0, #0xFF
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bne reg1_error_loopf
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cmp r1, #0x11
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bne reg1_error_loopf
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vmov r0, r1, d7
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cmp r0, #0x22
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bne reg1_error_loopf
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cmp r1, #0x33
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bne reg1_error_loopf
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vmov r0, r1, d8
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cmp r0, #0x44
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bne reg1_error_loopf
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cmp r1, #0x55
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bne reg1_error_loopf
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vmov r0, r1, d9
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cmp r0, #0x66
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bne reg1_error_loopf
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cmp r1, #0x77
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bne reg1_error_loopf
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vmov r0, r1, d10
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cmp r0, #0x88
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bne reg1_error_loopf
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cmp r1, #0x99
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bne reg1_error_loopf
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vmov r0, r1, d11
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cmp r0, #0xAA
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bne reg1_error_loopf
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cmp r1, #0xBB
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bne reg1_error_loopf
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vmov r0, r1, d12
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cmp r0, #0xFF
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bne reg1_error_loopf
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cmp r1, #0x11
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bne reg1_error_loopf
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vmov r0, r1, d13
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cmp r0, #0x22
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bne reg1_error_loopf
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cmp r1, #0x33
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bne reg1_error_loopf
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vmov r0, r1, d14
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cmp r0, #0x44
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bne reg1_error_loopf
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cmp r1, #0x55
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bne reg1_error_loopf
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vmov r0, r1, d15
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cmp r0, #0x66
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bne reg1_error_loopf
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cmp r1, #0x77
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bne reg1_error_loopf
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; Restore the registers that were clobbered by the test.
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LDMFD sp!, {r0-r1}
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; VFP register test passed. Jump to the core register test.
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b reg1_loopf_pass
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reg1_error_loopf:
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; If this line is hit then a VFP register value was found to be
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; incorrect.
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b reg1_error_loopf
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reg1_loopf_pass:
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.endif ;__TI_VFP_SUPPORT__
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; Test each general purpose register to check that it still contains the
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; expected known value, jumping to vRegTestError1 if any register contains
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; an unexpected value.
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cmp r0, #0xFF
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bne vRegTestError1
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cmp r1, #0x11
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bne vRegTestError1
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cmp r2, #0x22
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bne vRegTestError1
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cmp r3, #0x33
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bne vRegTestError1
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cmp r4, #0x44
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bne vRegTestError1
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cmp r5, #0x55
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bne vRegTestError1
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cmp r6, #0x66
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bne vRegTestError1
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cmp r7, #0x77
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bne vRegTestError1
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cmp r8, #0x88
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bne vRegTestError1
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cmp r9, #0x99
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bne vRegTestError1
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cmp r10, #0xAA
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bne vRegTestError1
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cmp r11, #0xBB
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bne vRegTestError1
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cmp r12, #0xCC
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bne vRegTestError1
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; This task is still running without jumping to vRegTestError1, so increment
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; the loop counter so the check task knows the task is running error free.
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stmfd sp!, { r0-r1 }
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ldr r0, Count1Const
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ldr r1, [r0]
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add r1, r1, #1
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str r1, [r0]
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ldmfd sp!, { r0-r1 }
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; Loop again, performing the same tests.
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b vRegTestLoop1
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Count1Const .word ulRegTest1Counter
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vRegTestError1:
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b vRegTestError1
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;-------------------------------------------------
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;
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.def vRegTestTask2
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.ref ulRegTest2Counter
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.text
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.arm
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;
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vRegTestTask2:
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; Fill each general purpose register with a known value.
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mov r0, #0xFF000000
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mov r1, #0x11000000
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mov r2, #0x22000000
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mov r3, #0x33000000
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mov r4, #0x44000000
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mov r5, #0x55000000
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mov r6, #0x66000000
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mov r7, #0x77000000
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mov r8, #0x88000000
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mov r9, #0x99000000
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mov r10, #0xAA000000
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mov r11, #0xBB000000
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mov r12, #0xCC000000
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mov r14, #0xEE000000
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.if (__TI_VFP_SUPPORT__)
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; Fill each FPU register with a known value.
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vmov d0, r0, r1
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vmov d1, r2, r3
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vmov d2, r4, r5
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vmov d3, r6, r7
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vmov d4, r8, r9
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vmov d5, r10, r11
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vmov d6, r0, r1
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vmov d7, r2, r3
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vmov d8, r4, r5
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vmov d9, r6, r7
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vmov d10, r8, r9
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vmov d11, r10, r11
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vmov d12, r0, r1
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vmov d13, r2, r3
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vmov d14, r4, r5
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vmov d15, r6, r7
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.endif
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vRegTestLoop2:
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.if (__TI_VFP_SUPPORT__)
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; Check all the VFP registers still contain the values set above.
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; First save registers that are clobbered by the test.
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STMFD sp!, { r0-r1 }
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vmov r0, r1, d0
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cmp r0, #0xFF000000
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bne reg2_error_loopf
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cmp r1, #0x11000000
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bne reg2_error_loopf
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vmov r0, r1, d1
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cmp r0, #0x22000000
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bne reg2_error_loopf
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cmp r1, #0x33000000
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bne reg2_error_loopf
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vmov r0, r1, d2
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cmp r0, #0x44000000
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bne reg2_error_loopf
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cmp r1, #0x55000000
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bne reg2_error_loopf
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vmov r0, r1, d3
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cmp r0, #0x66000000
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bne reg2_error_loopf
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cmp r1, #0x77000000
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bne reg2_error_loopf
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vmov r0, r1, d4
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cmp r0, #0x88000000
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bne reg2_error_loopf
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cmp r1, #0x99000000
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bne reg2_error_loopf
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vmov r0, r1, d5
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cmp r0, #0xAA000000
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bne reg2_error_loopf
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cmp r1, #0xBB000000
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bne reg2_error_loopf
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vmov r0, r1, d6
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cmp r0, #0xFF000000
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bne reg2_error_loopf
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cmp r1, #0x11000000
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bne reg2_error_loopf
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vmov r0, r1, d7
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cmp r0, #0x22000000
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bne reg2_error_loopf
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cmp r1, #0x33000000
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bne reg2_error_loopf
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vmov r0, r1, d8
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cmp r0, #0x44000000
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bne reg2_error_loopf
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cmp r1, #0x55000000
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bne reg2_error_loopf
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vmov r0, r1, d9
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cmp r0, #0x66000000
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bne reg2_error_loopf
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cmp r1, #0x77000000
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bne reg2_error_loopf
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vmov r0, r1, d10
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cmp r0, #0x88000000
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bne reg2_error_loopf
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cmp r1, #0x99000000
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bne reg2_error_loopf
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vmov r0, r1, d11
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cmp r0, #0xAA000000
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bne reg2_error_loopf
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cmp r1, #0xBB000000
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bne reg2_error_loopf
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vmov r0, r1, d12
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cmp r0, #0xFF000000
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bne reg2_error_loopf
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cmp r1, #0x11000000
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bne reg2_error_loopf
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vmov r0, r1, d13
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cmp r0, #0x22000000
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bne reg2_error_loopf
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cmp r1, #0x33000000
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bne reg2_error_loopf
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vmov r0, r1, d14
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cmp r0, #0x44000000
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bne reg2_error_loopf
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cmp r1, #0x55000000
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bne reg2_error_loopf
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vmov r0, r1, d15
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cmp r0, #0x66000000
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bne reg2_error_loopf
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cmp r1, #0x77000000
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bne reg2_error_loopf
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; Restore the registers that were clobbered by the test.
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LDMFD sp!, {r0-r1}
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; VFP register test passed. Jump to the core register test.
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b reg2_loopf_pass
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reg2_error_loopf:
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; If this line is hit then a VFP register value was found to be
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; incorrect.
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b reg2_error_loopf
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reg2_loopf_pass:
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.endif ;__TI_VFP_SUPPORT__
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; Test each general purpose register to check that it still contains the
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; expected known value, jumping to vRegTestError2 if any register contains
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; an unexpected value.
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cmp r0, #0xFF000000
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bne vRegTestError2
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cmp r1, #0x11000000
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bne vRegTestError2
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cmp r2, #0x22000000
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bne vRegTestError2
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cmp r3, #0x33000000
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bne vRegTestError2
|
||||
cmp r4, #0x44000000
|
||||
bne vRegTestError2
|
||||
cmp r5, #0x55000000
|
||||
bne vRegTestError2
|
||||
cmp r6, #0x66000000
|
||||
bne vRegTestError2
|
||||
cmp r7, #0x77000000
|
||||
bne vRegTestError2
|
||||
cmp r8, #0x88000000
|
||||
bne vRegTestError2
|
||||
cmp r9, #0x99000000
|
||||
bne vRegTestError2
|
||||
cmp r10, #0xAA000000
|
||||
bne vRegTestError2
|
||||
cmp r11, #0xBB000000
|
||||
bne vRegTestError2
|
||||
cmp r12, #0xCC000000
|
||||
bne vRegTestError2
|
||||
cmp r14, #0xEE000000
|
||||
bne vRegTestError2
|
||||
|
||||
; This task is still running without jumping to vRegTestError2, so increment
|
||||
; the loop counter so the check task knows the task is running error free.
|
||||
stmfd sp!, { r0-r1 }
|
||||
ldr r0, Count2Const
|
||||
ldr r1, [r0]
|
||||
add r1, r1, #1
|
||||
str r1, [r0]
|
||||
ldmfd sp!, { r0-r1 }
|
||||
|
||||
; Loop again, performing the same tests.
|
||||
b vRegTestLoop2
|
||||
|
||||
Count2Const .word ulRegTest2Counter
|
||||
|
||||
vRegTestError2:
|
||||
b vRegTestError2
|
||||
|
||||
;-------------------------------------------------
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue