Merge pull request #645 from armink/master
[BSP] Add usart DMA Rx driver to stm32f40x.
This commit is contained in:
commit
477857d38d
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@ -13,6 +13,7 @@
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* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
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* 2012-02-08 aozima update for F4.
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* 2012-07-28 aozima update for ART board.
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* 2016-05-28 armink add DMA Rx mode
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*/
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#include "stm32f4xx.h"
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@ -29,8 +30,6 @@
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#define UART1_GPIO GPIOB
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#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOB
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#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
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#define UART1_TX_DMA DMA1_Channel4
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#define UART1_RX_DMA DMA1_Channel5
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#define UART2_GPIO_TX GPIO_Pin_2
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#define UART2_TX_PIN_SOURCE GPIO_PinSource2
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@ -39,8 +38,6 @@
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#define UART2_GPIO GPIOA
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#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
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#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
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#define UART2_TX_DMA DMA1_Channel4
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#define UART2_RX_DMA DMA1_Channel5
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#define UART3_GPIO_TX GPIO_Pin_8
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#define UART3_TX_PIN_SOURCE GPIO_PinSource8
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@ -49,16 +46,48 @@
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#define UART3_GPIO GPIOD
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#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOD
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#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
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#define UART3_TX_DMA DMA1_Stream1
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#define UART3_RX_DMA DMA1_Stream3
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#define UART4_GPIO_TX GPIO_Pin_10
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#define UART4_TX_PIN_SOURCE GPIO_PinSource10
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#define UART4_GPIO_RX GPIO_Pin_11
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#define UART4_RX_PIN_SOURCE GPIO_PinSource11
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#define UART4_GPIO GPIOC
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#define UART4_GPIO_RCC RCC_AHB1Periph_GPIOC
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#define RCC_APBPeriph_UART4 RCC_APB1Periph_UART4
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#define UART5_GPIO_TX GPIO_Pin_12
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#define UART5_TX_PIN_SOURCE GPIO_PinSource12
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#define UART5_GPIO_RX GPIO_Pin_2
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#define UART5_RX_PIN_SOURCE GPIO_PinSource2
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#define UART5_TX GPIOC
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#define UART5_RX GPIOD
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#define UART5_GPIO_RCC_TX RCC_AHB1Periph_GPIOB
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#define UART5_GPIO_RCC_RX RCC_AHB1Periph_GPIOD
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#define RCC_APBPeriph_UART5 RCC_APB1Periph_UART5
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/* STM32 uart driver */
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struct stm32_uart
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{
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USART_TypeDef *uart_device;
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IRQn_Type irq;
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struct stm32_uart_dma {
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/* dma stream */
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DMA_Stream_TypeDef *rx_stream;
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/* dma channel */
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uint32_t rx_ch;
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/* dma flag */
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uint32_t rx_flag;
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/* dma irq channel */
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uint8_t rx_irq_ch;
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/* setting receive len */
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rt_size_t setting_recv_len;
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/* last receive index */
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rt_size_t last_recv_index;
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} dma;
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};
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static void DMA_Configuration(struct rt_serial_device *serial);
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static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct stm32_uart* uart;
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@ -69,20 +98,28 @@ static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_c
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uart = (struct stm32_uart *)serial->parent.user_data;
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if (cfg->baud_rate == BAUD_RATE_9600)
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USART_InitStructure.USART_BaudRate = 9600;
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else if (cfg->baud_rate == BAUD_RATE_115200)
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USART_InitStructure.USART_BaudRate = 115200;
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USART_InitStructure.USART_BaudRate = cfg->baud_rate;
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if (cfg->data_bits == DATA_BITS_8)
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if (cfg->data_bits == DATA_BITS_8){
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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} else if (cfg->data_bits == DATA_BITS_9) {
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USART_InitStructure.USART_WordLength = USART_WordLength_9b;
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}
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if (cfg->stop_bits == STOP_BITS_1)
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if (cfg->stop_bits == STOP_BITS_1){
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USART_InitStructure.USART_StopBits = USART_StopBits_1;
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else if (cfg->stop_bits == STOP_BITS_2)
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} else if (cfg->stop_bits == STOP_BITS_2){
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USART_InitStructure.USART_StopBits = USART_StopBits_2;
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}
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if (cfg->parity == PARITY_NONE){
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USART_InitStructure.USART_Parity = USART_Parity_No;
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} else if (cfg->parity == PARITY_ODD) {
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USART_InitStructure.USART_Parity = USART_Parity_Odd;
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} else if (cfg->parity == PARITY_EVEN) {
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USART_InitStructure.USART_Parity = USART_Parity_Even;
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}
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_Init(uart->uart_device, &USART_InitStructure);
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@ -96,6 +133,7 @@ static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_c
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static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct stm32_uart* uart;
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rt_uint32_t ctrl_arg = (rt_uint32_t)(arg);
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RT_ASSERT(serial != RT_NULL);
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uart = (struct stm32_uart *)serial->parent.user_data;
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@ -114,6 +152,11 @@ static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *ar
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/* enable interrupt */
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USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE);
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break;
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/* USART config */
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case RT_DEVICE_CTRL_CONFIG :
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if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) {
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DMA_Configuration(serial);
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}
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}
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return RT_EOK;
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@ -149,6 +192,125 @@ static int stm32_getc(struct rt_serial_device *serial)
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return ch;
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}
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/**
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* DMA initialize by DMA_InitStruct structure
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*
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* @param serial serial device
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* @param setting_recv_len setting receive length
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* @param mem_base_addr memory 0 base address for DMA stream
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*/
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static void dma_uart_config(struct rt_serial_device *serial, uint32_t setting_recv_len,
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void *mem_base_addr) {
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struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
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DMA_InitTypeDef DMA_InitStructure;
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/* rx dma config */
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uart->dma.setting_recv_len = setting_recv_len;
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DMA_DeInit(uart->dma.rx_stream);
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while (DMA_GetCmdStatus(uart->dma.rx_stream) != DISABLE);
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DMA_InitStructure.DMA_Channel = uart->dma.rx_ch;
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DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(uart->uart_device->DR);
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)mem_base_addr;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
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DMA_InitStructure.DMA_BufferSize = uart->dma.setting_recv_len;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
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DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_Init(uart->dma.rx_stream, &DMA_InitStructure);
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}
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/**
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* Serial port receive idle process. This need add to uart idle ISR.
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*
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* @param serial serial device
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*/
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static void dma_uart_rx_idle_isr(struct rt_serial_device *serial) {
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struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
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rt_size_t recv_total_index, recv_len;
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recv_total_index = uart->dma.setting_recv_len - DMA_GetCurrDataCounter(uart->dma.rx_stream);
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if (recv_total_index >= uart->dma.last_recv_index) {
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recv_len = recv_total_index - uart->dma.last_recv_index;
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} else {
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recv_len = uart->dma.setting_recv_len - uart->dma.last_recv_index + recv_total_index;
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}
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uart->dma.last_recv_index = recv_total_index;
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
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/* read a data for clear receive idle interrupt flag */
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USART_ReceiveData(uart->uart_device);
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}
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/**
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* DMA receive done process. This need add to DMA receive done ISR.
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*
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* @param serial serial device
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*/
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static void dma_rx_done_isr(struct rt_serial_device *serial) {
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struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
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rt_size_t recv_total_index, recv_len;
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if (DMA_GetFlagStatus(uart->dma.rx_stream, uart->dma.rx_flag) != RESET) {
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/* disable dma, stop receive data */
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DMA_Cmd(uart->dma.rx_stream, DISABLE);
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recv_total_index = uart->dma.setting_recv_len - DMA_GetCurrDataCounter(uart->dma.rx_stream);
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if (recv_total_index >= uart->dma.last_recv_index) {
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recv_len = recv_total_index - uart->dma.last_recv_index;
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} else {
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recv_len = uart->dma.setting_recv_len - uart->dma.last_recv_index + recv_total_index;
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uart->dma.last_recv_index = recv_total_index;
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}
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uart->dma.last_recv_index = recv_total_index;
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
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/* start receive data */
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DMA_ClearFlag(uart->dma.rx_stream, uart->dma.rx_flag);
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DMA_Cmd(uart->dma.rx_stream, ENABLE);
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}
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}
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/**
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* Uart common interrupt process. This need add to uart ISR.
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*
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* @param serial serial device
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*/
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static void uart_isr(struct rt_serial_device *serial) {
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struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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/* clear interrupt */
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USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
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}
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if(USART_GetITStatus(uart->uart_device, USART_IT_IDLE) != RESET)
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{
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dma_uart_rx_idle_isr(serial);
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}
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if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
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{
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/* clear interrupt */
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USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
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}
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if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
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{
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stm32_getc(serial);
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}
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}
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static const struct rt_uart_ops stm32_uart_ops =
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{
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stm32_configure,
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@ -163,27 +325,33 @@ struct stm32_uart uart1 =
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{
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USART1,
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USART1_IRQn,
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{
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DMA2_Stream5,
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DMA_Channel_4,
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DMA_FLAG_TCIF5,
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DMA2_Stream5_IRQn,
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0,
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},
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};
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struct rt_serial_device serial1;
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void USART1_IRQHandler(void)
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{
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struct stm32_uart *uart;
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uart = &uart1;
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/* enter interrupt */
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rt_interrupt_enter();
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if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
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{
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rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
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}
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if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
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{
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/* clear interrupt */
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USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
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uart_isr(&serial1);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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void DMA2_Stream5_IRQHandler(void) {
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/* enter interrupt */
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rt_interrupt_enter();
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dma_rx_done_isr(&serial1);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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@ -195,27 +363,34 @@ struct stm32_uart uart2 =
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{
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USART2,
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USART2_IRQn,
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{
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DMA1_Stream5,
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DMA_Channel_4,
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DMA_FLAG_TCIF5,
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DMA1_Stream5_IRQn,
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0,
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0,
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},
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};
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struct rt_serial_device serial2;
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void USART2_IRQHandler(void)
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{
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struct stm32_uart *uart;
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uart = &uart2;
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/* enter interrupt */
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rt_interrupt_enter();
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if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
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{
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rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
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}
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if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
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{
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/* clear interrupt */
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USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
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uart_isr(&serial2);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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void DMA1_Stream5_IRQHandler(void) {
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/* enter interrupt */
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rt_interrupt_enter();
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dma_rx_done_isr(&serial2);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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|
@ -227,32 +402,117 @@ struct stm32_uart uart3 =
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{
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USART3,
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USART3_IRQn,
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{
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DMA1_Stream1,
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DMA_Channel_4,
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DMA_FLAG_TCIF1,
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DMA1_Stream1_IRQn,
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0,
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0,
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},
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};
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struct rt_serial_device serial3;
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void USART3_IRQHandler(void)
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{
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struct stm32_uart *uart;
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uart = &uart3;
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/* enter interrupt */
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rt_interrupt_enter();
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if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
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{
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rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND);
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}
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if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
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{
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/* clear interrupt */
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USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
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uart_isr(&serial3);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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void DMA1_Stream1_IRQHandler(void) {
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/* enter interrupt */
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rt_interrupt_enter();
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dma_rx_done_isr(&serial3);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* RT_USING_UART3 */
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#if defined(RT_USING_UART4)
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/* UART4 device driver structure */
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struct stm32_uart uart4 =
|
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{
|
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UART4,
|
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UART4_IRQn,
|
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{
|
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DMA1_Stream2,
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DMA_Channel_4,
|
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DMA_FLAG_TCIF2,
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DMA1_Stream2_IRQn,
|
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0,
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0,
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},
|
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};
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struct rt_serial_device serial4;
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|
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void UART4_IRQHandler(void)
|
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{
|
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/* enter interrupt */
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rt_interrupt_enter();
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|
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uart_isr(&serial4);
|
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/* leave interrupt */
|
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rt_interrupt_leave();
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}
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void DMA1_Stream2_IRQHandler(void) {
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/* enter interrupt */
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rt_interrupt_enter();
|
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|
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dma_rx_done_isr(&serial4);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* RT_USING_UART4 */
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|
||||
#if defined(RT_USING_UART5)
|
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/* UART5 device driver structure */
|
||||
struct stm32_uart uart5 =
|
||||
{
|
||||
UART5,
|
||||
UART5_IRQn,
|
||||
{
|
||||
DMA1_Stream0,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF0,
|
||||
DMA1_Stream0_IRQn,
|
||||
0,
|
||||
0,
|
||||
},
|
||||
};
|
||||
struct rt_serial_device serial5;
|
||||
|
||||
void UART5_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
uart_isr(&serial5);
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void DMA1_Stream0_IRQHandler(void) {
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
dma_rx_done_isr(&serial5);
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif /* RT_USING_UART5 */
|
||||
|
||||
static void RCC_Configuration(void)
|
||||
{
|
||||
#ifdef RT_USING_UART1
|
||||
|
@ -275,6 +535,20 @@ static void RCC_Configuration(void)
|
|||
/* Enable UART3 clock */
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE);
|
||||
#endif /* RT_USING_UART3 */
|
||||
|
||||
#ifdef RT_USING_UART4
|
||||
/* Enable UART4 GPIO clocks */
|
||||
RCC_AHB1PeriphClockCmd(UART4_GPIO_RCC, ENABLE);
|
||||
/* Enable UART4 clock */
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART4, ENABLE);
|
||||
#endif /* RT_USING_UART4 */
|
||||
|
||||
#ifdef RT_USING_UART5
|
||||
/* Enable UART5 GPIO clocks */
|
||||
RCC_AHB1PeriphClockCmd(UART5_GPIO_RCC_TX | UART5_GPIO_RCC_RX, ENABLE);
|
||||
/* Enable UART5 clock */
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART5, ENABLE);
|
||||
#endif /* RT_USING_UART5 */
|
||||
}
|
||||
|
||||
static void GPIO_Configuration(void)
|
||||
|
@ -315,6 +589,28 @@ static void GPIO_Configuration(void)
|
|||
GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3);
|
||||
GPIO_PinAFConfig(UART3_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3);
|
||||
#endif /* RT_USING_UART3 */
|
||||
|
||||
#ifdef RT_USING_UART4
|
||||
/* Configure USART4 Rx/tx PIN */
|
||||
GPIO_InitStructure.GPIO_Pin = UART4_GPIO_TX | UART4_GPIO_RX;
|
||||
GPIO_Init(UART4_GPIO, &GPIO_InitStructure);
|
||||
|
||||
/* Connect alternate function */
|
||||
GPIO_PinAFConfig(UART4_GPIO, UART4_TX_PIN_SOURCE, GPIO_AF_UART4);
|
||||
GPIO_PinAFConfig(UART4_GPIO, UART4_RX_PIN_SOURCE, GPIO_AF_UART4);
|
||||
#endif /* RT_USING_UART4 */
|
||||
|
||||
#ifdef RT_USING_UART5
|
||||
/* Configure USART5 Rx/tx PIN */
|
||||
GPIO_InitStructure.GPIO_Pin = UART5_GPIO_TX;
|
||||
GPIO_Init(UART5_TX, &GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_Pin = UART5_GPIO_RX;
|
||||
GPIO_Init(UART5_RX, &GPIO_InitStructure);
|
||||
|
||||
/* Connect alternate function */
|
||||
GPIO_PinAFConfig(UART5_TX, UART5_TX_PIN_SOURCE, GPIO_AF_UART5);
|
||||
GPIO_PinAFConfig(UART5_RX, UART5_RX_PIN_SOURCE, GPIO_AF_UART5);
|
||||
#endif /* RT_USING_UART5 */
|
||||
}
|
||||
|
||||
static void NVIC_Configuration(struct stm32_uart *uart)
|
||||
|
@ -329,6 +625,34 @@ static void NVIC_Configuration(struct stm32_uart *uart)
|
|||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
|
||||
static void DMA_Configuration(struct rt_serial_device *serial) {
|
||||
struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
|
||||
struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
/* enable transmit idle interrupt */
|
||||
USART_ITConfig(uart->uart_device, USART_IT_IDLE , ENABLE);
|
||||
|
||||
/* DMA clock enable */
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
|
||||
|
||||
/* rx dma config */
|
||||
dma_uart_config(serial, serial->config.bufsz, rx_fifo->buffer);
|
||||
|
||||
DMA_ClearFlag(uart->dma.rx_stream, uart->dma.rx_flag);
|
||||
DMA_ITConfig(uart->dma.rx_stream, DMA_IT_TC, ENABLE);
|
||||
USART_DMACmd(uart->uart_device, USART_DMAReq_Rx, ENABLE);
|
||||
DMA_Cmd(uart->dma.rx_stream, ENABLE);
|
||||
|
||||
/* rx dma interrupt config */
|
||||
NVIC_InitStructure.NVIC_IRQChannel = uart->dma.rx_irq_ch;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
|
||||
int stm32_hw_usart_init(void)
|
||||
{
|
||||
struct stm32_uart *uart;
|
||||
|
@ -348,7 +672,7 @@ int stm32_hw_usart_init(void)
|
|||
/* register UART1 device */
|
||||
rt_hw_serial_register(&serial1,
|
||||
"uart1",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
|
||||
uart);
|
||||
#endif /* RT_USING_UART1 */
|
||||
|
||||
|
@ -363,7 +687,7 @@ int stm32_hw_usart_init(void)
|
|||
/* register UART1 device */
|
||||
rt_hw_serial_register(&serial2,
|
||||
"uart2",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
|
||||
uart);
|
||||
#endif /* RT_USING_UART2 */
|
||||
|
||||
|
@ -378,10 +702,39 @@ int stm32_hw_usart_init(void)
|
|||
/* register UART3 device */
|
||||
rt_hw_serial_register(&serial3,
|
||||
"uart3",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
|
||||
uart);
|
||||
#endif /* RT_USING_UART3 */
|
||||
|
||||
#ifdef RT_USING_UART4
|
||||
uart = &uart4;
|
||||
|
||||
serial4.ops = &stm32_uart_ops;
|
||||
serial4.config = config;
|
||||
|
||||
NVIC_Configuration(&uart4);
|
||||
|
||||
/* register UART4 device */
|
||||
rt_hw_serial_register(&serial4,
|
||||
"uart4",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
|
||||
uart);
|
||||
#endif /* RT_USING_UART4 */
|
||||
|
||||
#ifdef RT_USING_UART5
|
||||
uart = &uart5;
|
||||
|
||||
serial5.ops = &stm32_uart_ops;
|
||||
serial5.config = config;
|
||||
|
||||
NVIC_Configuration(&uart5);
|
||||
|
||||
/* register UART5 device */
|
||||
rt_hw_serial_register(&serial5,
|
||||
"uart5",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
|
||||
uart);
|
||||
#endif /* RT_USING_UART5 */
|
||||
return 0;
|
||||
}
|
||||
INIT_BOARD_EXPORT(stm32_hw_usart_init);
|
||||
|
|
Loading…
Reference in New Issue