[bsp][airm2m/air105][rsoc] Fix compilation issues with bsp of airm2m/air105

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hydevcode 2024-10-01 06:50:15 +08:00 committed by GitHub
parent 1bf3d79be1
commit 443d56cfb1
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7 changed files with 29 additions and 20 deletions

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@ -101,6 +101,7 @@ jobs:
- "rm48x50"
- "ht32/ht32f52352"
- "ht32/ht32f12366"
- "airm2m/air105"
- "w60x"
- "essemi/es32f0654"
- "essemi/es32f365x"

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@ -43,7 +43,7 @@ jobs:
legs:
- {RTT_BSP_NAME: "acm32_acm32f0x0-nucleo", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "acm32/acm32f0x0-nucleo"}
- {RTT_BSP_NAME: "acm32_acm32f4xx-nucleo", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "acm32/acm32f4xx-nucleo"}
#- {RTT_BSP_NAME: "airm2m_air105", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "airm2m/air105"} #scons fail in last step
- {RTT_BSP_NAME: "airm2m_air105", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "airm2m/air105"}
- {RTT_BSP_NAME: "airm2m_air32f103", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "airm2m/air32f103"}
#- {RTT_BSP_NAME: "allwinner_d1", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "allwinner/d1"} # rt-smart fail toolchain
#- {RTT_BSP_NAME: "allwinner_d1s", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "allwinner/d1s"} #toochain

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
* Copyright (c) 2006-2024 RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -7,8 +7,11 @@
* Date Author Notes
* 2022-02-22 airm2m first version
*/
#include "board.h"
#include "drv_common.h"
#include "drv_gpio.h"
#include "drv_usart_v2.h"
uint32_t SystemCoreClock;
extern const uint32_t __isr_start_address;
@ -38,7 +41,7 @@ void SystemInit(void)
__enable_irq();
}
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
{
SystemCoreClock = HSE_VALUE * (((SYSCTRL->FREQ_SEL & SYSCTRL_FREQ_SEL_XTAL_Mask) >> SYSCTRL_FREQ_SEL_XTAL_Pos) + 1);
}
@ -56,7 +59,7 @@ void rt_hw_board_init(void)
rt_hw_systick_init();
DMA_GlobalInit();
Uart_GlobalInit();
DMA_TakeStream(DMA1_STREAM_1);//for qspi
DMA_TakeStream(DMA1_STREAM_1);/* for qspi */
CoreTick_Init();
#ifdef RT_USING_PIN
rt_hw_pin_init();

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@ -21,14 +21,14 @@
#ifndef __CORE_IRQ_H__
#define __CORE_IRQ_H__
#include <stdint.h>
/**
* @brief
*
* @param Irq 0~IRQ_LINE_MAX
* @param Handler void Irq_Handler(uint32_t IrqLine, void *pData); 1
*/
void ISR_SetHandler(int32_t Irq, void *Handler);
void ISR_SetHandler(int32_t Irq, void *Handler, void *pData);
/**
* @brief
*

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@ -18,11 +18,11 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "core_irq.h"
#include "user.h"
typedef struct
{
const DMA_TypeDef *RegBase;
DMA_TypeDef *RegBase;
const uint32_t Index;
CBFuncEx_t CB;
void *pData;
@ -65,17 +65,17 @@ typedef struct
/************ operation definition for DMA DMA_CFG_L REGISTER ************/
#define DMA_CFG_HS_SEL_SRC_Pos (11)
#define DMA_CFG_HS_SEL_SRC_Mask (0x01U<<DMA_CFG_HS_SEL_SRC_Pos)//0 HARD 1 SOFT
#define DMA_CFG_HS_SEL_SRC_Mask (0x01U<<DMA_CFG_HS_SEL_SRC_Pos)/*0 HARD 1 SOFT*/
#define DMA_CFG_HS_SEL_DST_Pos (10)
#define DMA_CFG_HS_SEL_DST_Mask (0x01U<<DMA_CFG_HS_SEL_DST_Pos)
/************ operation definition for DMA DMA_CFG_H REGISTER ************/
#define DMA_CFG_DEST_PER_Pos (11)
#define DMA_CFG_DEST_PER_Mask (0x07U<<DMA_CFG_DEST_PER_Pos)//need write current channel num
#define DMA_CFG_DEST_PER_Mask (0x07U<<DMA_CFG_DEST_PER_Pos)/*need write current channel num*/
#define DMA_CFG_SRC_PER_Pos (7)
#define DMA_CFG_SRC_PER_Mask (0x07U<<DMA_CFG_SRC_PER_Pos)//need write current channel num
#define DMA_CFG_SRC_PER_Mask (0x07U<<DMA_CFG_SRC_PER_Pos)/*need write current channel num*/
/************ operation definition for DMA DMA_LLP_L REGISTER ************/
#define DMAC_LLP_NEXT_LLI_MSK (0x3)
@ -212,7 +212,7 @@ int DMA_ConfigStream(uint8_t Stream, void *Config)
(DMA_InitStruct->DMA_PeripheralDataSize << DMA_CTL_DST_TR_WIDTH_Pos);
hwDMAChannal[Stream].TxDir = 1;
// hwDMA->CFG_L = (1 << 18);
/* hwDMA->CFG_L = (1 << 18); */
hwDMA->CFG_L = 0;
break;
default:
@ -333,7 +333,7 @@ uint32_t DMA_GetDataLength(uint8_t Stream, uint32_t FirstAddress)
static void DMA_IrqHandle(int32_t IrqLine, void *pData)
{
uint32_t i;
// DBG("%x", DMA->StatusTfr_L);
/* DBG("%x", DMA->StatusTfr_L); */
if (DMA->StatusInt_L & (1 << 0))
{
for(i = 0; i < DMA_STREAM_QTY; i++)
@ -352,7 +352,7 @@ static void DMA_IrqHandle(int32_t IrqLine, void *pData)
if (DMA->StatusErr_L & (1 << i))
{
DMA->ClearErr_L = (1 << i);
hwDMAChannal[i].CB(hwDMAChannal[i].pData, 0xffffffff);
hwDMAChannal[i].CB(hwDMAChannal[i].pData, (void *)0xffffffff);
}
}
}

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@ -29,6 +29,12 @@ void _Error_Handler(char *s, int num);
#define DMA_NOT_AVAILABLE ((DMA_INSTANCE_TYPE *)0xFFFFFFFFU)
/**
* This function is mainly used for SysTick initialization
*
*/
void rt_hw_systick_init(void);
#ifdef __cplusplus
}
#endif

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@ -1,9 +1,7 @@
import os
import sys
import shutil
import urllib
import urllib.request
out_path='./'
bin_file_name='rtthread.bin'
pack_path='./pack'
@ -17,13 +15,14 @@ if __name__=='__main__':
os.remove(out_file+'.soc')
if not os.path.exists(pack_path+'/bootloader.bin'):
urllib.urlretrieve("http://cdndownload.openluat.com/rt-thread/airm2m/air105/bootloader.bin", pack_path+'/bootloader.bin')
urllib.request.urlretrieve("http://cdndownload.openluat.com/rt-thread/airm2m/air105/bootloader.bin", pack_path + '/bootloader.bin')
if not os.path.exists(pack_path+'/soc_download.exe'):
urllib.urlretrieve("http://cdndownload.openluat.com/rt-thread/airm2m/air105/soc_download.exe", pack_path+'/soc_download.exe')
urllib.request.urlretrieve("http://cdndownload.openluat.com/rt-thread/airm2m/air105/bootloader.bin", pack_path + '/bootloader.bin')
shutil.copy(out_path+bin_file_name, pack_path+'/'+bin_file_name)
shutil.make_archive(out_file, 'zip', root_dir=pack_path)
os.remove(pack_path+'/'+bin_file_name)
os.rename(out_file+'.zip',out_file+'.soc')
print('end')