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1.modify SRAM_SIZE 

2.modify I2C gpio init
This commit is contained in:
chengy4 2021-01-18 15:55:33 +08:00
parent cceba7ca86
commit 431ddb90f5
2 changed files with 6 additions and 12 deletions
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5
bsp/hc32f4a0/board/board.h
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@ -6,8 +6,9 @@
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2020-10-30 CDT first version * 2020-10-30 CDT first version
* 2021-01-18 CDT MOdify SRAM_SIZE
*/ */
#ifndef __BOARD_H__ #ifndef __BOARD_H__
#define __BOARD_H__ #define __BOARD_H__
@ -18,7 +19,7 @@
/* board configuration */ /* board configuration */
#define SRAM_BASE 0x1FFE0000 #define SRAM_BASE 0x1FFE0000
#define SRAM_SIZE 0x20000 #define SRAM_SIZE 0x80000
#define SRAM_END (SRAM_BASE + SRAM_SIZE) #define SRAM_END (SRAM_BASE + SRAM_SIZE)
/* High speed sram. */ /* High speed sram. */

13
bsp/hc32f4a0/drivers/drv_soft_i2c.c
View File

@ -6,6 +6,7 @@
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2020-10-30 CDT first version * 2020-10-30 CDT first version
* 2021-01-18 CDT modify i2c gpio init
*/ */
@ -81,8 +82,8 @@ static void hc32_i2c_gpio_init(struct hc32_i2c *i2c)
{ {
struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)i2c->ops.data; struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)i2c->ops.data;
rt_pin_mode(cfg->scl_pin, PIN_MODE_OUTPUT); rt_pin_mode(cfg->scl_pin, PIN_MODE_OUTPUT_OD);
rt_pin_mode(cfg->sda_pin, PIN_MODE_OUTPUT); rt_pin_mode(cfg->sda_pin, PIN_MODE_OUTPUT_OD);
rt_pin_write(cfg->scl_pin, PIN_HIGH); rt_pin_write(cfg->scl_pin, PIN_HIGH);
rt_pin_write(cfg->sda_pin, PIN_HIGH); rt_pin_write(cfg->sda_pin, PIN_HIGH);
@ -98,8 +99,6 @@ static void hc32_set_sda(void *data, rt_int32_t state)
{ {
struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data; struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data;
rt_pin_mode(cfg->sda_pin, PIN_MODE_OUTPUT);
if (state) if (state)
rt_pin_write(cfg->sda_pin, PIN_HIGH); rt_pin_write(cfg->sda_pin, PIN_HIGH);
else else
@ -116,8 +115,6 @@ static void hc32_set_scl(void *data, rt_int32_t state)
{ {
struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data; struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data;
rt_pin_mode(cfg->scl_pin, PIN_MODE_OUTPUT);
if (state) if (state)
rt_pin_write(cfg->scl_pin, PIN_HIGH); rt_pin_write(cfg->scl_pin, PIN_HIGH);
else else
@ -133,8 +130,6 @@ static rt_int32_t hc32_get_sda(void *data)
{ {
struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data; struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data;
rt_pin_mode(cfg->sda_pin, PIN_MODE_INPUT);
return rt_pin_read(cfg->sda_pin); return rt_pin_read(cfg->sda_pin);
} }
@ -147,8 +142,6 @@ static rt_int32_t hc32_get_scl(void *data)
{ {
struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data; struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data;
rt_pin_mode(cfg->scl_pin, PIN_MODE_INPUT);
return rt_pin_read(cfg->scl_pin); return rt_pin_read(cfg->scl_pin);
} }