Merge pull request #5297 from chenyingchun0312/fea_nrf5x_hwtimer
[bsp/nrf5x] add hwtimer driver
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commit
3bc5ffb495
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@ -39,6 +39,9 @@ if GetDepend(['BSP_USING_WDT']):
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if GetDepend(['BSP_USING_ONCHIP_RTC']):
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src += ['drv_rtc.c']
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if GetDepend(['BSP_USING_TIM']):
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src += ['drv_hwtimer.c']
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path = [cwd]
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@ -0,0 +1,321 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-11-21 chenyingchun first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <board.h>
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#include <nrfx_timer.h>
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#ifdef SOFTDEVICE_PRESENT
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#ifdef BSP_USING_TIM0
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#error "TIMER0 cannot be used when SOFTDEVICE has been used."
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#endif
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#endif
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#ifdef BSP_USING_TIM
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#define LOG_TAG "drv.hwtimer"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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#ifdef RT_USING_HWTIMER
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#ifndef TIM_DEV_INFO_CONFIG
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// maxfreq and minfreq unit is HZ
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#define TIM_DEV_INFO_CONFIG \
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{ \
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.maxfreq = 16000000, \
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.minfreq = 31250, \
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.maxcnt = 0xFFFFFFFF, \
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.cntmode = HWTIMER_CNTMODE_UP, \
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}
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#endif
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typedef struct
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{
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nrfx_timer_t timer_inst;
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nrfx_timer_config_t timer_cfg;
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nrf_timer_cc_channel_t cc_channel;
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}nrf5x_timer_info_t;
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struct nrf5x_hwtimer
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{
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rt_hwtimer_t timer_device;
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nrf5x_timer_info_t timer_info;
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char *name;
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};
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static struct nrf5x_hwtimer nrf5x_hwtimer_obj[] =
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{
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#ifdef BSP_USING_TIM0
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{
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.timer_info.timer_inst = NRFX_TIMER_INSTANCE(0),
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.timer_info.timer_cfg = NRFX_TIMER_DEFAULT_CONFIG,
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.timer_info.cc_channel = NRF_TIMER_CC_CHANNEL0,
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.name = "timer0",
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},
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#endif
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#ifdef BSP_USING_TIM1
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{
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.timer_info.timer_inst = NRFX_TIMER_INSTANCE(1),
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.timer_info.timer_cfg = NRFX_TIMER_DEFAULT_CONFIG,
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.timer_info.cc_channel = NRF_TIMER_CC_CHANNEL1,
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.name = "timer1",
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},
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#endif
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#ifdef BSP_USING_TIM2
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{
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.timer_info.timer_inst = NRFX_TIMER_INSTANCE(2),
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.timer_info.timer_cfg = NRFX_TIMER_DEFAULT_CONFIG,
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.timer_info.cc_channel = NRF_TIMER_CC_CHANNEL2,
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.name = "timer2",
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},
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#endif
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#ifdef BSP_USING_TIM3
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{
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.timer_info.timer_inst = NRFX_TIMER_INSTANCE(3),
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.timer_info.timer_cfg = NRFX_TIMER_DEFAULT_CONFIG,
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.timer_info.cc_channel = NRF_TIMER_CC_CHANNEL3,
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.name = "timer3",
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},
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#endif
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#ifdef BSP_USING_TIM4
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{
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.timer_info.timer_inst = NRFX_TIMER_INSTANCE(4),
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.timer_info.timer_cfg = NRFX_TIMER_DEFAULT_CONFIG,
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.timer_info.cc_channel = NRF_TIMER_CC_CHANNEL4,
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.name = "timer4",
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}
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#endif
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};
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static void timer_callback(nrf_timer_event_t event_type, void* p_context)
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{
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rt_hwtimer_t *timer_device = (struct rt_hwtimer_device *)p_context;
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// no matter what event_type is(NRF_TIMER_EVENT_COMPARE0 or others), call same function "rt_device_hwtimer_isr"
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LOG_D("timer_callback event_type = %d, inst_id = %d, cc conunt = %d\r\n",
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event_type, timer_info->timer_inst.instance_id, timer_info->timer_inst.cc_channel_count);
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rt_device_hwtimer_isr(timer_device);
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}
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static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
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{
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nrf5x_timer_info_t *timer_info = RT_NULL;
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nrfx_timer_config_t *timer_cfg = RT_NULL;
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RT_ASSERT(timer != RT_NULL);
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if (state)
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{
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timer_info = (nrf5x_timer_info_t *)timer->parent.user_data;
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timer_cfg = &(timer_info->timer_cfg);
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timer_cfg->bit_width = NRF_TIMER_BIT_WIDTH_32;
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timer_cfg->p_context = timer;
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nrfx_timer_init(&(timer_info->timer_inst), timer_cfg, timer_callback);
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}
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}
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static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
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{
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nrf5x_timer_info_t *timer_info = RT_NULL;
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nrf_timer_short_mask_t mask = NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK;
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RT_ASSERT(timer != RT_NULL);
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timer_info = (nrf5x_timer_info_t *)timer->parent.user_data;
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if (opmode == HWTIMER_MODE_ONESHOT)
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{
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// means TIMER_SHORTS_COMPARE0_STOP_Msk or TIMER_SHORTS_COMPARE1_STOP_Msk ..., according to cc_channel.
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mask = (nrf_timer_short_mask_t)(1 << (timer_info->cc_channel + 8));
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}
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else
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{
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// means TIMER_SHORTS_COMPARE0_CLEAR_Msk or TIMER_SHORTS_COMPARE1_CLEAR_Msk ..., according to cc_channel.
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mask = (nrf_timer_short_mask_t)(1 << timer_info->cc_channel);
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}
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nrfx_timer_extended_compare(&(timer_info->timer_inst), timer_info->cc_channel, t, mask, true);
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nrfx_timer_enable(&(timer_info->timer_inst));
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return RT_EOK;
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}
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static void timer_stop(rt_hwtimer_t *timer)
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{
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nrf5x_timer_info_t *timer_info = RT_NULL;
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RT_ASSERT(timer != RT_NULL);
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timer_info = (nrf5x_timer_info_t *)timer->parent.user_data;
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nrfx_timer_disable(&(timer_info->timer_inst));
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/* set time count register to zero*/
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nrfx_timer_clear(&(timer_info->timer_inst));
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}
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static nrf_timer_frequency_t frequency_convert(rt_uint32_t freq)
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{
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nrf_timer_frequency_t frequency = NRF_TIMER_FREQ_1MHz;
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switch (freq)
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{
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case 16000000:
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{
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frequency = NRF_TIMER_FREQ_16MHz;
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break;
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}
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case 8000000:
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{
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frequency = NRF_TIMER_FREQ_8MHz;
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break;
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}
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case 2000000:
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{
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frequency = NRF_TIMER_FREQ_2MHz;
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break;
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}
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case 1000000:
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{
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frequency = NRF_TIMER_FREQ_1MHz;
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break;
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}
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case 500000:
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{
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frequency = NRF_TIMER_FREQ_500kHz;
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break;
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}
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case 250000:
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{
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frequency = NRF_TIMER_FREQ_250kHz;
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break;
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}
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case 125000:
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{
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frequency = NRF_TIMER_FREQ_125kHz;
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break;
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}
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case 62500:
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{
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frequency = NRF_TIMER_FREQ_62500Hz;
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break;
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}
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case 31250:
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{
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frequency = NRF_TIMER_FREQ_31250Hz;
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break;
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}
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default:
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{
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break;
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}
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}
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return frequency;
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}
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static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
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{
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rt_err_t result = RT_EOK;
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nrf5x_timer_info_t *timer_info = RT_NULL;
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nrfx_timer_t *timer_inst = RT_NULL;
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RT_ASSERT(timer != RT_NULL);
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RT_ASSERT(arg != RT_NULL);
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timer_info = (nrf5x_timer_info_t *)timer->parent.user_data;
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timer_inst = &(timer_info->timer_inst);
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switch (cmd)
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{
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case HWTIMER_CTRL_FREQ_SET:
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{
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rt_uint32_t freq;
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/* set timer frequence */
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freq = *((rt_uint32_t *)arg);
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nrf_timer_frequency_set(timer_inst->p_reg, frequency_convert(freq));
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break;
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}
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default:
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{
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result = -RT_ENOSYS;
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break;
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}
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}
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return result;
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}
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static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
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{
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rt_uint32_t count = 0;
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nrf5x_timer_info_t *timer_info = RT_NULL;
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RT_ASSERT(timer != RT_NULL);
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timer_info = (nrf5x_timer_info_t *)timer->parent.user_data;
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// capture method will copy the current counter register to the specified cc channel (here is NRF_TIMER_CC_CHANNEL5).
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// the specified cc channel cannot be same with the already used cc channels
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count = nrfx_timer_capture(&(timer_info->timer_inst), NRF_TIMER_CC_CHANNEL5);
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return count;
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}
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static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
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static const struct rt_hwtimer_ops _ops =
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{
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.init = timer_init,
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.start = timer_start,
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.stop = timer_stop,
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.count_get = timer_counter_get,
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.control = timer_ctrl,
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};
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static int nrf5x_hwtimer_init(void)
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{
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int i = 0;
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int result = RT_EOK;
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for (i = 0; i < sizeof(nrf5x_hwtimer_obj) / sizeof(nrf5x_hwtimer_obj[0]); i++)
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{
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nrf5x_hwtimer_obj[i].timer_device.info = &_info;
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nrf5x_hwtimer_obj[i].timer_device.ops = &_ops;
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if (rt_device_hwtimer_register(&nrf5x_hwtimer_obj[i].timer_device, nrf5x_hwtimer_obj[i].name, &nrf5x_hwtimer_obj[i].timer_info) == RT_EOK)
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{
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LOG_D("%s register success", nrf5x_hwtimer_obj[i].name);
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}
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else
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{
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LOG_E("%s register failed", nrf5x_hwtimer_obj[i].name);
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result = -RT_ERROR;
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}
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}
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return result;
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}
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INIT_BOARD_EXPORT(nrf5x_hwtimer_init);
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#endif /* RT_USING_HWTIMER */
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#endif /* BSP_USING_TIM */
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@ -14,7 +14,7 @@ PCA10040-nRF52832是Nordic 官方的开发板,搭载nRF52832 芯片,基于AR
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开发板外观如下图所示
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![](../docs/images/nrf52832.jpg)
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![](../docs/images/nrf52832.png)
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PCA10040-nrf52832开发板常用 **板载资源** 如下:
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@ -34,17 +34,17 @@ PCA10040-nrf52832开发板常用 **板载资源** 如下:
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本 BSP 目前对外设的支持情况如下:
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| **片上外设** | **支持情况** | **备注** |
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| :----------- | :----------: | :------: |
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| GPIO | 支持 | GPION |
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| UART | 支持 | UART0 |
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| PWM | 支持 | 支持 |
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| SPI | 支持 | 支持 |
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| RTC | 支持 | |
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| ADC | 支持 | |
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| **片上外设** | **支持情况** | **备注** |
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| :----------- | :----------: | :-----------: |
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| GPIO | 支持 | GPION |
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| UART | 支持 | UART0 |
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| PWM | 支持 | 支持 |
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| SPI | 支持 | 支持 |
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| RTC | 支持 | |
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| ADC | 支持 | |
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| TIMER | 支持 | TIMER0~TIMER4 |
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@ -419,6 +419,57 @@ menu "On-chip Peripheral Drivers"
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range 0 2
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default 2
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endif
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config BSP_USING_TIM
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bool "Enable TIMER"
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select RT_USING_HWTIMER
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default n
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if BSP_USING_TIM
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config NRFX_TIMER_ENABLED
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int
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default 1
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config BSP_USING_TIM0
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bool "Enable TIMER0"
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default n
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if BSP_USING_TIM0
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config NRFX_TIMER0_ENABLED
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int
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default 1
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endif
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config BSP_USING_TIM1
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bool "Enable TIMER1"
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default n
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if BSP_USING_TIM1
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config NRFX_TIMER1_ENABLED
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int
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default 1
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endif
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config BSP_USING_TIM2
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bool "Enable TIMER2"
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default n
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if BSP_USING_TIM2
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config NRFX_TIMER2_ENABLED
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int
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default 1
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endif
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config BSP_USING_TIM3
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bool "Enable TIMER3"
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default n
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if BSP_USING_TIM3
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config NRFX_TIMER3_ENABLED
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int
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default 1
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endif
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config BSP_USING_TIM4
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bool "Enable TIMER4"
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default n
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if BSP_USING_TIM4
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config NRFX_TIMER4_ENABLED
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int
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default 1
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endif
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endif
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endmenu
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choice
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