Merge pull request #4682 from greedyhao/ab32

[bluetrum] add fmrx support
This commit is contained in:
Bernard Xiong 2021-05-15 14:45:57 +08:00 committed by GitHub
commit 3baad47752
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GPG Key ID: 4AEE18F83AFDEB23
9 changed files with 134 additions and 52 deletions

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@ -74,7 +74,7 @@ CONFIG_RT_USING_DEVICE_OPS=y
CONFIG_RT_USING_CONSOLE=y CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
CONFIG_RT_VER_NUM=0x40003 CONFIG_RT_VER_NUM=0x40004
# CONFIG_RT_USING_CPU_FFS is not set # CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
@ -160,6 +160,7 @@ CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_LIBC=y CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set # CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_MODULE is not set # CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_FIXED_TIMEZONE=8
# #
# Network # Network
@ -197,6 +198,11 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_ULOG is not set # CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set # CONFIG_RT_USING_UTEST is not set
#
# RT-Thread Utestcases
#
# CONFIG_RT_USING_UTESTCASES is not set
# #
# RT-Thread online packages # RT-Thread online packages
# #
@ -309,9 +315,11 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_STEMWIN is not set # CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set # CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set # CONFIG_PKG_USING_TJPGD is not set
# CONFIG_PKG_USING_PDFGEN is not set
# CONFIG_PKG_USING_HELIX is not set # CONFIG_PKG_USING_HELIX is not set
# CONFIG_PKG_USING_AZUREGUIX is not set # CONFIG_PKG_USING_AZUREGUIX is not set
# CONFIG_PKG_USING_TOUCHGFX2RTT is not set # CONFIG_PKG_USING_TOUCHGFX2RTT is not set
# CONFIG_PKG_USING_NUEMWIN is not set
# #
# tools packages # tools packages
@ -349,6 +357,10 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_ANV_TESTSUIT is not set # CONFIG_PKG_USING_ANV_TESTSUIT is not set
# CONFIG_PKG_USING_ANV_BENCH is not set # CONFIG_PKG_USING_ANV_BENCH is not set
# CONFIG_PKG_USING_DEVMEM is not set # CONFIG_PKG_USING_DEVMEM is not set
# CONFIG_PKG_USING_REGEX is not set
# CONFIG_PKG_USING_MEM_SANDBOX is not set
# CONFIG_PKG_USING_SOLAR_TERMS is not set
# CONFIG_PKG_USING_GAN_ZHI is not set
# #
# system packages # system packages
@ -396,6 +408,7 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_QFPLIB_M3 is not set # CONFIG_PKG_USING_QFPLIB_M3 is not set
# CONFIG_PKG_USING_LPM is not set # CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set # CONFIG_PKG_USING_TLSF is not set
# CONFIG_PKG_USING_EVENT_RECORDER is not set
# #
# peripheral libraries and drivers # peripheral libraries and drivers
@ -463,6 +476,7 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_LIBNFC is not set # CONFIG_PKG_USING_LIBNFC is not set
# CONFIG_PKG_USING_MFOC is not set # CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set # CONFIG_PKG_USING_TMC51XX is not set
# CONFIG_PKG_USING_TCA9534 is not set
# #
# AI packages # AI packages
@ -490,6 +504,7 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set # CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_MINIZIP is not set
# CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set # CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set # CONFIG_PKG_USING_KENDRYTE_DEMO is not set

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@ -48,7 +48,7 @@ ab32vg1-prougen 是 中科蓝讯(Bluetrum) 推出的一款基于 RISC-V 内核
| FLASH | 即将支持 | 对接 FAL | | FLASH | 即将支持 | 对接 FAL |
| TIMER | 支持 | | | TIMER | 支持 | |
| PWM | 支持 | LPWM 的 G1 G2 G3 之间是互斥的,只能三选一 | | PWM | 支持 | LPWM 的 G1 G2 G3 之间是互斥的,只能三选一 |
| FM receive | 即将支持 | | | FM receive | 支持 | |
| USB Device | 暂不支持 | | | USB Device | 暂不支持 | |
| USB Host | 暂不支持 | | | USB Host | 暂不支持 | |

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@ -19,14 +19,13 @@ void rt_soft_isr(int vector, void *param);
void cpu_irq_comm(void); void cpu_irq_comm(void);
void set_cpu_irq_comm(void (*irq_hook)(void)); void set_cpu_irq_comm(void (*irq_hook)(void));
void load_cache(); void load_cache();
void os_cache_init(void);
void sys_error_hook(uint8_t err_no); void sys_error_hook(uint8_t err_no);
typedef void (*os_cache_setfunc_func)(void *load_cache_func, void *io_read);
typedef void (*spiflash_init_func)(uint8_t sf_read, uint8_t dummy); typedef void (*spiflash_init_func)(uint8_t sf_read, uint8_t dummy);
#define os_cache_setfunc ((os_cache_setfunc_func) 0x84024)
static struct rt_mutex mutex_spiflash = {0}; static struct rt_mutex mutex_spiflash = {0};
static struct rt_mutex mutex_cache = {0};
extern volatile rt_uint8_t rt_interrupt_nest; extern volatile rt_uint8_t rt_interrupt_nest;
extern uint32_t __heap_start, __heap_end; extern uint32_t __heap_start, __heap_end;
@ -148,8 +147,9 @@ void rt_hw_us_delay(rt_uint32_t us)
RT_SECTION(".irq.cache") RT_SECTION(".irq.cache")
void cache_init(void) void cache_init(void)
{ {
os_cache_setfunc(load_cache, NULL); os_cache_init();
rt_mutex_init(&mutex_spiflash, "flash_mutex", RT_IPC_FLAG_FIFO); rt_mutex_init(&mutex_spiflash, "flash_mutex", RT_IPC_FLAG_FIFO);
rt_mutex_init(&mutex_cache, "cache_mutex", RT_IPC_FLAG_FIFO);
} }
RT_SECTION(".irq.cache") RT_SECTION(".irq.cache")
@ -170,6 +170,24 @@ void os_spiflash_unlock(void)
} }
} }
RT_SECTION(".irq.cache")
void os_cache_lock(void)
{
// if (rt_thread_self()->stat == RT_THREAD_RUNNING) {
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
rt_mutex_take(&mutex_cache, RT_WAITING_FOREVER);
}
}
RT_SECTION(".irq.cache")
void os_cache_unlock(void)
{
// if (rt_thread_self()->stat == RT_THREAD_RUNNING) {
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
rt_mutex_release(&mutex_cache);
}
}
RT_SECTION(".irq.err.str") RT_SECTION(".irq.err.str")
static const char stack_info[] = "thread sp=0x%x name=%s"; static const char stack_info[] = "thread sp=0x%x name=%s";

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@ -13,8 +13,9 @@
#define DBG_LVL DBG_INFO #define DBG_LVL DBG_INFO
#include <rtdbg.h> #include <rtdbg.h>
#define SAI_AUDIO_FREQUENCY_44K ((uint32_t)44100u)
#define SAI_AUDIO_FREQUENCY_48K ((uint32_t)48000u) #define SAI_AUDIO_FREQUENCY_48K ((uint32_t)48000u)
#define SAI_AUDIO_FREQUENCY_44K ((uint32_t)44100u)
#define SAI_AUDIO_FREQUENCY_38K ((uint32_t)38000u)
#define TX_FIFO_SIZE (1024) #define TX_FIFO_SIZE (1024)
struct sound_device struct sound_device
@ -26,6 +27,7 @@ struct sound_device
rt_uint8_t *tx_fifo; rt_uint8_t *tx_fifo;
rt_uint8_t *rx_fifo; rt_uint8_t *rx_fifo;
rt_uint8_t volume; rt_uint8_t volume;
rt_uint8_t dma_to_aubuf;
}; };
static struct sound_device snd_dev = {0}; static struct sound_device snd_dev = {0};
@ -120,16 +122,15 @@ void audio_sem_pend(void)
void saia_frequency_set(uint32_t frequency) void saia_frequency_set(uint32_t frequency)
{ {
DACDIGCON0 &= ~(0xf << 2);
if (frequency == SAI_AUDIO_FREQUENCY_48K) { if (frequency == SAI_AUDIO_FREQUENCY_48K) {
DACDIGCON0 |= BIT(1); DACDIGCON0 |= (0 << 2);
DACDIGCON0 &= ~(0xf << 2);
DACDIGCON0 |= BIT(6);
} else if (frequency == SAI_AUDIO_FREQUENCY_44K) { } else if (frequency == SAI_AUDIO_FREQUENCY_44K) {
DACDIGCON0 &= ~BIT(1); DACDIGCON0 |= (1 << 2);
DACDIGCON0 &= ~(0xf << 2); } else if (frequency == SAI_AUDIO_FREQUENCY_38K) {
DACDIGCON0 |= BIT(1); DACDIGCON0 |= (2 << 2);
DACDIGCON0 |= BIT(6);
} }
DACDIGCON0 |= BIT(6);
} }
void saia_channels_set(uint8_t channels) void saia_channels_set(uint8_t channels)
@ -271,6 +272,10 @@ static rt_err_t sound_configure(struct rt_audio_device *audio, struct rt_audio_c
break; break;
} }
case AUDIO_MIXER_EXTEND:
snd_dev->dma_to_aubuf = caps->udata.value;
break;
default: default:
result = -RT_ERROR; result = -RT_ERROR;
break; break;
@ -349,6 +354,7 @@ static rt_err_t sound_init(struct rt_audio_device *audio)
/* set default params */ /* set default params */
saia_frequency_set(snd_dev->replay_config.samplerate); saia_frequency_set(snd_dev->replay_config.samplerate);
saia_channels_set(snd_dev->replay_config.channels); saia_channels_set(snd_dev->replay_config.channels);
saia_volume_set(snd_dev->volume);
return RT_EOK; return RT_EOK;
} }
@ -368,9 +374,7 @@ static rt_err_t sound_start(struct rt_audio_device *audio, int stream)
AUBUFSIZE |= (TX_FIFO_SIZE / 8) << 16; AUBUFSIZE |= (TX_FIFO_SIZE / 8) << 16;
AUBUFSTARTADDR = DMA_ADR(snd_dev->rx_fifo); AUBUFSTARTADDR = DMA_ADR(snd_dev->rx_fifo);
DACDIGCON0 = BIT(0) | BIT(10); // (0x01<<2) DACDIGCON0 |= BIT(0) | BIT(10); // (0x01<<2)
DACVOLCON = 0x7fff; // -60DB
DACVOLCON |= BIT(20);
AUBUFCON |= BIT(1); AUBUFCON |= BIT(1);
} }
@ -380,13 +384,11 @@ static rt_err_t sound_start(struct rt_audio_device *audio, int stream)
static rt_err_t sound_stop(struct rt_audio_device *audio, int stream) static rt_err_t sound_stop(struct rt_audio_device *audio, int stream)
{ {
struct sound_device *snd_dev = RT_NULL;
RT_ASSERT(audio != RT_NULL); RT_ASSERT(audio != RT_NULL);
snd_dev = (struct sound_device *)audio->parent.user_data;
if (stream == AUDIO_STREAM_REPLAY) if (stream == AUDIO_STREAM_REPLAY)
{ {
DACDIGCON0 = 0;
AUBUFCON &= ~BIT(4); AUBUFCON &= ~BIT(4);
LOG_D("close sound device"); LOG_D("close sound device");
} }
@ -463,7 +465,7 @@ static void audio_thread_entry(void *parameter)
{ {
while (1) while (1)
{ {
if (snd_dev.audio.replay->activated == RT_TRUE) { if ((snd_dev.dma_to_aubuf == RT_FALSE) && (snd_dev.audio.replay->activated == RT_TRUE)) {
rt_audio_tx_complete(&snd_dev.audio); rt_audio_tx_complete(&snd_dev.audio);
} else { } else {
rt_thread_mdelay(50); rt_thread_mdelay(50);
@ -506,7 +508,7 @@ static int rt_hw_sound_init(void)
RT_NULL, RT_NULL,
1024, 1024,
20, // must equal or lower than tshell priority 20, // must equal or lower than tshell priority
5 1
); );
if (snd_dev.thread != RT_NULL) if (snd_dev.thread != RT_NULL)
@ -516,7 +518,7 @@ static int rt_hw_sound_init(void)
/* init default configuration */ /* init default configuration */
{ {
snd_dev.replay_config.samplerate = 48000; snd_dev.replay_config.samplerate = SAI_AUDIO_FREQUENCY_48K;
snd_dev.replay_config.channels = 2; snd_dev.replay_config.channels = 2;
snd_dev.replay_config.samplebits = 16; snd_dev.replay_config.samplebits = 16;
snd_dev.volume = 55; snd_dev.volume = 55;

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@ -43,7 +43,7 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
PROVIDE(__ctors_start__ = .); PROVIDE(__ctors_start__ = .);
KEEP (*(SORT(.init_array.*))) KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array)) KEEP (*(.init_array*))
PROVIDE(__ctors_end__ = .); PROVIDE(__ctors_end__ = .);
. = ALIGN(4); . = ALIGN(4);
@ -73,21 +73,17 @@ SECTIONS
.comm __comm_vma : { .comm __comm_vma : {
. = ALIGN(4); . = ALIGN(4);
KEEP(*(.vector)) KEEP(*(.vector))
*(.irq.cache)
*(.irq*) *(.irq*)
/*applications**.o (.text .rodata)*/ *components*src**.o (.text* .rodata*)
*hal_libraries*ab32vg1_hal**.o (.text .rodata) *ab32vg1_hal**.o (.text* .rodata*)
*(.text.unlikely) *drv_gpio.o (.text* .rodata*)
*(.text.startup) *drv_usart.o (.rodata*)
*hal_drivers**.o (.rodata) EXCLUDE_FILE(*lib_a**.o *unwind*.o) *(.srodata*)
*audio*drv_sound.o (.rodata)
*system_ab32vgx.o (.rodata)
EXCLUDE_FILE(*lib_a**.o *cp-demangle.o *cp-demangle.o
*src*mem.o *src*memheap.o *dfs**.o *components.o *drivers*sdio**.o *cmd.o *msh_file.o
*drv_sdio.o *drv_wdt.o) *(.rodata.str1.4)
EXCLUDE_FILE(*lib_a**.o *unwind*.o) *(.srodata)
*(.rela*) *(.rela*)
*(.data*) *(.data*)
*(.sdata*) *(.sdata*)
*(.com_text*)
} > comm AT > flash } > comm AT > flash
.bss (NOLOAD): .bss (NOLOAD):

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@ -46,7 +46,7 @@
#define RT_USING_CONSOLE #define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0" #define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40003 #define RT_VER_NUM 0x40004
/* RT-Thread Components */ /* RT-Thread Components */
@ -90,6 +90,7 @@
/* POSIX layer and C standard library */ /* POSIX layer and C standard library */
#define RT_USING_LIBC #define RT_USING_LIBC
#define RT_LIBC_FIXED_TIMEZONE 8
/* Network */ /* Network */
@ -111,6 +112,9 @@
/* Utilities */ /* Utilities */
/* RT-Thread Utestcases */
/* RT-Thread online packages */ /* RT-Thread online packages */
/* IoT - internet of things */ /* IoT - internet of things */

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@ -0,0 +1,43 @@
#ifndef FMRX_H__
#define FMRX_H__
/**
* @brief Synchronize between FMRX and DAC
*
* @param buf_size Size of audio buffer.
*/
void fmrx_dac_sync(uint32_t buf_size);
/**
* @brief FMRX power on.
*
* @param val Make it zero now.
*/
void fmrx_power_on(uint32_t val);
/**
* @brief FMRX power off.
*
*/
void fmrx_power_off(void);
/**
* @brief FMRX digital start.
*
*/
void fmrx_digital_start(void);
/**
* @brief FMRX digital stop.
*
*/
void fmrx_digital_stop(void);
/**
* @brief FMRX dma to aubuf enable.
*
* @param enable RT_TRUE or RT_FALSE.
*/
void fmrx_dma_to_aubuf(uint8_t enable);
#endif

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@ -6,26 +6,29 @@
#include "ab32vg1.h" #include "ab32vg1.h"
.set _memcpy, 0x84044
.global _start .global _start
.section .reset, "ax" .section .reset, "ax"
_start: _start:
la tp, _tp
la gp, _gp
//load comm //load comm
la a0, __comm_vma la a0, __comm_vma
la a1, __comm_lma la a1, __comm_lma
la a2, __comm_size la a2, __comm_size
call 0x84044 call _memcpy
//load ram1 //load ram1
la a0, __ram1_vma la a0, __ram1_vma
la a1, __ram1_lma la a1, __ram1_lma
la a2, __ram1_size la a2, __ram1_size
call 0x84044 call _memcpy
la a0, __irq_stack_start //Stack0x23 la a0, __irq_stack_start //Stack0x23
li a1, 0x23 li a1, 0x23
la a2, __irq_stack_size la a2, __irq_stack_size
call memset call rt_memset
la ra, __irq_stack la ra, __irq_stack
lui a5, 0x1 lui a5, 0x1
sw zero, -1920(a5) sw zero, -1920(a5)
@ -35,7 +38,7 @@ _start:
la a0, __bss_start la a0, __bss_start
li a1, 0 li a1, 0
la a2, __bss_size la a2, __bss_size
call memset call rt_memset
call cache_init call cache_init
@ -56,32 +59,33 @@ __exception:
.org 0x40 .org 0x40
jal x0, low_prio_irq jal x0, low_prio_irq
mret
.org 0x80 .org 0x80
#define METHOD 1 #define METHOD 1
#if METHOD == 1 #if METHOD == 1
addi sp, sp, -6*4 addi sp, sp, -6*4
lw a0, PICEN(zero) # lw a0, PICEN(zero)
lw a1, EPC(zero) lw a1, EPC(zero)
lw a2, EPICCON(zero) lw a2, EPICCON(zero)
sw a0, 3*4(sp) # sw a0, 3*4(sp)
sw a1, 4*4(sp) sw a1, 4*4(sp)
sw a2, 5*4(sp) sw a2, 5*4(sp)
andi a0, a0, 1 # andi a0, a0, 1
sw a0, PICEN(zero) # sw a0, PICEN(zero)
li a2, 0
sw a2, EPICCON(zero)
la a0, 0f la a0, 0f
sw a0, EPC(zero) sw a0, EPC(zero)
j 0x84020 j isr_cache
0: 0:
sw a0, 0(sp) sw a0, 0(sp)
sw a1, 4(sp) sw a1, 4(sp)
sw a2, 8(sp) sw a2, 8(sp)
lw a0, 3*4(sp) # lw a0, 3*4(sp)
lw a1, 4*4(sp) lw a1, 4*4(sp)
lw a2, 5*4(sp) lw a2, 5*4(sp)
sw a0, PICEN(zero) # sw a0, PICEN(zero)
sw a1, EPC(zero) sw a1, EPC(zero)
sw a2, EPICCON(zero) sw a2, EPICCON(zero)
@ -90,9 +94,6 @@ __exception:
lw a2, 8(sp) lw a2, 8(sp)
addi sp, sp, 6*4 addi sp, sp, 6*4
mret mret
.align 4
1: .word 0, 0
j 0x84020
#endif #endif
.global cpu_irq_comm .global cpu_irq_comm
@ -102,3 +103,6 @@ cpu_irq_comm:
j cpu_irq_comm_do j cpu_irq_comm_do
ret ret
.global _tp
.set _tp, 0x84800