fixed loongson bsp compile flags
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parent
c66314a8b6
commit
39224e4888
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@ -11,7 +11,6 @@ sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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from building import *
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from building import *
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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rtconfig.AFLAGS += ' -I' + str('.') + ' -I ' + RTT_ROOT + '/libcpu/mips/common/'
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DefaultEnvironment(tools=[])
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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env = Environment(tools = ['mingw'],
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@ -20,6 +19,7 @@ env = Environment(tools = ['mingw'],
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AR = rtconfig.AR, ARFLAGS = '-rc',
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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env['ASCOM'] = env['ASPPCOM']
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Export('RTT_ROOT')
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Export('RTT_ROOT')
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Export('rtconfig')
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Export('rtconfig')
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@ -12,7 +12,6 @@ from building import *
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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rtconfig.AFLAGS += ' -I' + str('.') + ' -I ' + RTT_ROOT + '/libcpu/mips/gs232/'+ ' -I ' + RTT_ROOT + '/libcpu/mips/common/'
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DefaultEnvironment(tools=[])
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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env = Environment(tools = ['mingw'],
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@ -21,6 +20,7 @@ env = Environment(tools = ['mingw'],
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AR = rtconfig.AR, ARFLAGS = '-rc',
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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env['ASCOM'] = env['ASPPCOM']
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Export('RTT_ROOT')
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Export('RTT_ROOT')
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Export('rtconfig')
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Export('rtconfig')
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@ -1,7 +1,6 @@
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import os
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import os
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import sys
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import sys
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import rtconfig
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import rtconfig
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import pdb
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from rtconfig import RTT_ROOT
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from rtconfig import RTT_ROOT
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@ -10,9 +9,6 @@ from building import *
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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#rtconfig.AFLAGS += ' -I' + str(Dir('#')) + ' -I ' + RTT_ROOT + '/libcpu/mips/common/'
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rtconfig.AFLAGS += ' -I' + str('.') + ' -I ' + RTT_ROOT + '/libcpu/mips/common/'
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DefaultEnvironment(tools=[])
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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@ -21,6 +17,7 @@ env = Environment(tools = ['mingw'],
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AR = rtconfig.AR, ARFLAGS = '-rc',
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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env['ASCOM'] = env['ASPPCOM']
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Export('RTT_ROOT')
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Export('RTT_ROOT')
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Export('rtconfig')
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Export('rtconfig')
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