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move peripheral ISR from libcpu/m16c/context.asm to bsp/interrupts.s34 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@658 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
dzzxzz 2010-04-20 03:26:11 +00:00
parent 7e0ad698a3
commit 367015d3fd
3 changed files with 73 additions and 42 deletions
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69
bsp/m16c62p/interrupts.s34 Normal file
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@ -0,0 +1,69 @@
/*
* File : interrupt.s34
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2010-04-20 fify the first version
*
* For : Renesas M16C
* Toolchain : IAR's EW for M16C v3.401
*/
PUBLIC rt_hw_timer_handler
PUBLIC rt_hw_uart0_receive_handler
EXTERN rt_thread_switch_interrput_flag
EXTERN rt_interrupt_from_thread
EXTERN rt_interrupt_to_thread
EXTERN rt_interrupt_enter
EXTERN rt_interrupt_leave
EXTERN rt_tick_increase
EXTERN u0rec_handler
RSEG CSTACK
RSEG ISTACK
RSEG CODE:CODE:NOROOT(2)
rt_hw_context_switch_interrupt_do
MOV.W #0, rt_thread_switch_interrput_flag
MOV.W rt_interrupt_from_thread, A0
STC ISP, [A0]
MOV.W rt_interrupt_to_thread, A0
LDC [A0], ISP
POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore all processor registers from the new task's stack
REIT
.EVEN
rt_hw_timer_handler:
PUSHM R0,R1,R2,R3,A0,A1,SB,FB ; Save current task's registers
JSR rt_interrupt_enter
JSR rt_tick_increase
JSR rt_interrupt_leave
CMP.W #1,rt_thread_switch_interrput_flag
JEQ rt_hw_context_switch_interrupt_do
POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore current task's registers
REIT ; Return from interrup
.EVEN
rt_hw_uart0_receive_handler:
PUSHM R0,R1,R2,R3,A0,A1,SB,FB ; Save current task's registers
JSR rt_interrupt_enter
JSR u0rec_handler
JSR rt_interrupt_leave
CMP.W #1, rt_thread_switch_interrput_flag
JEQ rt_hw_context_switch_interrupt_do
POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore current task's registers
REIT ; Return from interrup
END

3
bsp/m16c62p/rtt2m16c.ewp
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@ -1773,6 +1773,9 @@
<file>
<name>$PROJ_DIR$\cstartup.s34</name>
</file>
<file>
<name>$PROJ_DIR$\interrupts.s34</name>
</file>
<file>
<name>$PROJ_DIR$\lnkm30627fhp.xcl</name>
</file>

43
libcpu/m16c/context.asm
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@ -11,6 +11,7 @@
* Date Author Notes
* 2010-04-09 fify the first version
* 2010-04-19 fify rewrite rt_hw_interrupt_disable/enable fuction
* 2010-04-20 fify move peripheral ISR to bsp/interrupts.s34
*
* For : Renesas M16C
* Toolchain : IAR's EW for M16C v3.401
@ -25,18 +26,12 @@
EXTERN rt_thread_switch_interrput_flag
EXTERN rt_interrupt_from_thread
EXTERN rt_interrupt_to_thread
EXTERN rt_interrupt_enter
EXTERN rt_tick_increase
EXTERN rt_interrupt_leave
EXTERN u0rec_handler
PUBLIC rt_hw_interrupt_disable
PUBLIC rt_hw_interrupt_enable
PUBLIC rt_hw_context_switch_to
PUBLIC rt_hw_context_switch
PUBLIC rt_hw_context_switch_interrupt
PUBLIC rt_hw_timer_handler
PUBLIC rt_hw_uart0_receive_handler
PUBLIC os_context_switch
rt_hw_interrupt_disable
@ -92,40 +87,4 @@ jump
MOV.W R1, rt_interrupt_to_thread
RTS
rt_hw_context_switch_interrupt_do
MOV.W #0, rt_thread_switch_interrput_flag
MOV.W rt_interrupt_from_thread, A0
STC ISP, [A0]
MOV.W rt_interrupt_to_thread, A0
LDC [A0], ISP
POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore all processor registers from the new task's stack
REIT
.EVEN
rt_hw_timer_handler:
PUSHM R0,R1,R2,R3,A0,A1,SB,FB ; Save current task's registers
JSR rt_interrupt_enter
JSR rt_tick_increase
JSR rt_interrupt_leave
CMP.W #1,rt_thread_switch_interrput_flag
JEQ rt_hw_context_switch_interrupt_do
POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore current task's registers
REIT ; Return from interrup
.EVEN
rt_hw_uart0_receive_handler:
PUSHM R0,R1,R2,R3,A0,A1,SB,FB ; Save current task's registers
JSR rt_interrupt_enter
JSR u0rec_handler
JSR rt_interrupt_leave
CMP.W #1, rt_thread_switch_interrput_flag
JEQ rt_hw_context_switch_interrupt_do
POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore current task's registers
REIT ; Return from interrup
END