update stm32 radio code;
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@23 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
parent
e00da562ed
commit
34f993d35a
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#include <finsh.h>
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#include <dfs_posix.h>
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#include "stm32f10x_lib.h"
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rt_uint32_t wav_length;
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rt_uint8_t* wav_buffer;
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#define WAV_MP_NUM 2
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#define WAV_MP_BUFSZ (1024 * 1)
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#define STATIC_MEMPOOL
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#ifdef STATIC_MEMPOOL
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static rt_uint8_t mempool[(WAV_MP_BUFSZ + 4)* WAV_MP_NUM]; // 5k x 2
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static struct rt_mempool _mp;
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#endif
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static rt_mp_t mp;
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static rt_err_t wav_tx_done(rt_device_t dev, void *buffer)
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{
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/* release memory block to memory pool */
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rt_mp_free(buffer);
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return RT_EOK;
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}
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void wav(char* filename)
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{
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int fd;
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#ifdef STATIC_MEMPOOL
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rt_mp_init(&_mp, "wav", &mempool[0], sizeof(mempool), WAV_MP_BUFSZ);
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mp = &_mp;
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#else
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mp = rt_mp_create("wav", WAV_MP_NUM, WAV_MP_BUFSZ);
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#endif
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fd = open(filename, O_RDONLY, 0);
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if (fd >= 0)
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{
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rt_uint8_t* buf;
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rt_size_t len;
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rt_device_t device;
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/* open audio device and set tx done call back */
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device = rt_device_find("snd");
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rt_device_set_tx_complete(device, wav_tx_done);
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rt_device_open(device, RT_DEVICE_OFLAG_WRONLY);
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// buf = rt_mp_alloc(mp, RT_WAITING_FOREVER);
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// len = read(fd, (char*)buf, WAV_MP_BUFSZ);
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do {
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buf = rt_mp_alloc(mp, RT_WAITING_FOREVER);
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rt_kprintf("read file");
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len = read(fd, (char*)buf, WAV_MP_BUFSZ);
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rt_kprintf("...done!\n");
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if (len > 0) rt_device_write(device, 0, buf, len);
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} while (len != 0);
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/* close device and file */
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rt_device_close(device);
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close(fd);
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/* delete memory pool */
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#ifdef STATIC_MEMPOOL
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rt_mp_detach(mp);
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#else
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rt_mp_delete(mp);
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#endif
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}
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}
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FINSH_FUNCTION_EXPORT(wav, wav test)
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/* DMA Test */
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#define BufferSize 32
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u8 SPI2_Buffer_Tx[BufferSize] = {0x51,0x52,0x53,0x54,0x55,0x56,0x57,0x58,0x59,
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0x5A,0x5B,0x5C,0x5D,0x5E,0x5F,0x60,0x61,0x62,
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0x63,0x64,0x65,0x66,0x67,0x68,0x69,0x6A,0x6B,
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0x6C,0x6D,0x6E,0x6F,0x70};
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void wm(int cnt)
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{
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rt_device_t device;
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rt_uint8_t *buf;
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mp = rt_mp_create("wav", WAV_MP_NUM, WAV_MP_BUFSZ);
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device = rt_device_find("snd");
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rt_device_set_tx_complete(device, wav_tx_done);
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rt_device_open(device, RT_DEVICE_OFLAG_WRONLY);
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while(cnt)
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{
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buf = rt_mp_alloc(mp, RT_WAITING_FOREVER);
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rt_memcpy(buf, SPI2_Buffer_Tx, BufferSize);
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rt_device_write(device, 0, buf, BufferSize);
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cnt --;
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}
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rt_device_close(device);
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rt_mp_delete(mp);
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}
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FINSH_FUNCTION_EXPORT(wm, wm test)
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@ -0,0 +1,494 @@
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#include <rthw.h>
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#include <rtthread.h>
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#include "stm32f10x_lib.h"
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/*
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* WM8753 Driver
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*/
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/* WM8753 register definitions */
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#define WM8753_DAC 0x01
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#define WM8753_ADC 0x02
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#define WM8753_PCM 0x03
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#define WM8753_HIFI 0x04
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#define WM8753_IOCTL 0x05
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#define WM8753_SRATE1 0x06
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#define WM8753_SRATE2 0x07
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#define WM8753_LDAC 0x08
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#define WM8753_RDAC 0x09
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#define WM8753_BASS 0x0a
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#define WM8753_TREBLE 0x0b
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#define WM8753_ALC1 0x0c
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#define WM8753_ALC2 0x0d
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#define WM8753_ALC3 0x0e
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#define WM8753_NGATE 0x0f
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#define WM8753_LADC 0x10
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#define WM8753_RADC 0x11
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#define WM8753_ADCTL1 0x12
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#define WM8753_3D 0x13
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#define WM8753_PWR1 0x14
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#define WM8753_PWR2 0x15
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#define WM8753_PWR3 0x16
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#define WM8753_PWR4 0x17
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#define WM8753_ID 0x18
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#define WM8753_INTPOL 0x19
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#define WM8753_INTEN 0x1a
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#define WM8753_GPIO1 0x1b
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#define WM8753_GPIO2 0x1c
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#define WM8753_RESET 0x1f
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#define WM8753_RECMIX1 0x20
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#define WM8753_RECMIX2 0x21
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#define WM8753_LOUTM1 0x22
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#define WM8753_LOUTM2 0x23
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#define WM8753_ROUTM1 0x24
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#define WM8753_ROUTM2 0x25
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#define WM8753_MOUTM1 0x26
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#define WM8753_MOUTM2 0x27
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#define WM8753_LOUT1V 0x28
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#define WM8753_ROUT1V 0x29
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#define WM8753_LOUT2V 0x2a
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#define WM8753_ROUT2V 0x2b
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#define WM8753_MOUTV 0x2c
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#define WM8753_OUTCTL 0x2d
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#define WM8753_ADCIN 0x2e
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#define WM8753_INCTL1 0x2f
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#define WM8753_INCTL2 0x30
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#define WM8753_LINVOL 0x31
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#define WM8753_RINVOL 0x32
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#define WM8753_MICBIAS 0x33
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#define WM8753_CLOCK 0x34
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#define WM8753_PLL1CTL1 0x35
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#define WM8753_PLL1CTL2 0x36
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#define WM8753_PLL1CTL3 0x37
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#define WM8753_PLL1CTL4 0x38
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#define WM8753_PLL2CTL1 0x39
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#define WM8753_PLL2CTL2 0x3a
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#define WM8753_PLL2CTL3 0x3b
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#define WM8753_PLL2CTL4 0x3c
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#define WM8753_BIASCTL 0x3d
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#define WM8753_ADCTL2 0x3f
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/*
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SCLK PA3 SPI1_SCK
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SDIN PA7 SPI1_MOSI
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CSB PA2 SPI1_NSS
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*/
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#define wm_sclk_0 GPIO_ResetBits(GPIOA,GPIO_Pin_3)
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#define wm_sclk_1 GPIO_SetBits(GPIOA,GPIO_Pin_3)
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#define wm_sdin_0 GPIO_ResetBits(GPIOA,GPIO_Pin_7)
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#define wm_sdin_1 GPIO_SetBits(GPIOA,GPIO_Pin_7)
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#define wm_csb_0 GPIO_ResetBits(GPIOA,GPIO_Pin_2)
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#define wm_csb_1 GPIO_SetBits(GPIOA,GPIO_Pin_2)
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#define DATA_NODE_MAX 5
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/* data node for Tx Mode */
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struct wm8753_data_node
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{
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rt_uint16_t *data_ptr;
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rt_size_t data_size;
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};
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struct wm8753_device
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{
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/* inherit from rt_device */
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struct rt_device parent;
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/* pcm data list */
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struct wm8753_data_node data_list[DATA_NODE_MAX];
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rt_uint16_t read_index, put_index;
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/* transmitted offset of current data node */
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rt_size_t offset;
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};
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struct wm8753_device wm8753;
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static void NVIC_Configuration(void)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0);
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/* SPI2 IRQ Channel configuration */
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NVIC_InitStructure.NVIC_IRQChannel = SPI2_IRQChannel;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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/* DMA1 IRQ Channel configuration */
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NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel5_IRQChannel;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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static void GPIO_Configuration(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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/* Disable the JTAG interface and enable the SWJ interface */
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GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
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/* Configure GPIOA 2, 3, 7 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_7;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;
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GPIO_Init(GPIOA,&GPIO_InitStructure);
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/* Configure SPI2 pins: CK, WS and SD */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_15;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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}
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#define SPI2_DR_Address 0x4000380C
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static void DMA_Configuration(rt_uint32_t addr, rt_size_t size)
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{
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DMA_InitTypeDef DMA_InitStructure;
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/* DMA1 Channel2 configuration ----------------------------------------------*/
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DMA_Cmd(DMA1_Channel5, DISABLE);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)SPI2_DR_Address;
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)addr;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_BufferSize = size;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
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DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_Init(DMA1_Channel5, &DMA_InitStructure);
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/* Enable SPI2 DMA Tx request */
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SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
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DMA_ITConfig(DMA1_Channel5, DMA_IT_TC, ENABLE);
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DMA_Cmd(DMA1_Channel5, ENABLE);
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}
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static void I2S_Configuration(void)
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{
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I2S_InitTypeDef I2S_InitStructure;
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/* I2S peripheral configuration */
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I2S_InitStructure.I2S_Standard = I2S_Standard_LSB;
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I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16b;
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I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable;
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I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_44k;
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I2S_InitStructure.I2S_CPOL = I2S_CPOL_High;// I2S_CPOL_Low
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/* I2S2 Master Transmitter to I2S3 Slave Receiver communication -----------*/
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/* I2S2 configuration */
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I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx;//I2S_Mode_MasterTx
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I2S_Init(SPI2, &I2S_InitStructure);
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}
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void wm8753_send(rt_uint16_t s_data)
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{
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u8 i;
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wm_sclk_0;
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for(i=0;i<16;i++)
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{
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if(s_data & 0x8000)
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{
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wm_sdin_1;
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}
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else
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{
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wm_sdin_0;
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}
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//wde();
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wm_sclk_1;
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//wde();
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s_data <<= 1;
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wm_sclk_0;
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//wde();
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}
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wm_csb_0;
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//wde();
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wm_csb_1;
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}
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void wm8753_hw_write(rt_uint16_t reg, rt_uint16_t value)
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{
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rt_uint32_t index;
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value = (reg << 9) | value;
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wm_sclk_0;
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for(index = 0; index < 16; index++)
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{
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if(value & 0x8000) wm_sdin_1;
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else wm_sdin_0;
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wm_sclk_1;
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value <<= 1;
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wm_sclk_0;
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}
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wm_csb_0;
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wm_csb_1;
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}
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static rt_err_t wm8753_init (rt_device_t dev)
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{
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wm8753_send(31<<9 | 0); // reset
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wm8753_send(20<<9 | (1<<7) | 1<<6 | 1<<3 | 1<<2 ); // 打开电源 处理部分
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//wm8753_send(21<<9 | 0x1FF);
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wm8753_send(22<<9 | 1<<3 | 1<<7 | 1<<8 | 1<<5 | 1<<6 ); // 电源管理 功率输出部分
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wm8753_send(23<<9 | 1<<1 | 1 ); // 打开左右调音台电源
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/* 设置时钟及PLL */
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#define MCLK1DIV2 0
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#define pll1_N 11 // 12
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#define pll1_K 0x1288CE // 0x126E97 //0x126E97
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#if pll1_K > 0x3FFFFF
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#warning MAX bit(21:0)
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#endif
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wm8753_send(53<<9 | 1<<5 | MCLK1DIV2<<3 | 1<<2 | 1<<1 | 1 );
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wm8753_send(54<<9 | pll1_N<<5 | (pll1_K>>18) );
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wm8753_send(55<<9 | ( (pll1_K>>9)&0x1FF ) );
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wm8753_send(56<<9 | ( (pll1_K)&0x1FF ) );
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wm8753_send(52<<9 | 1<<1 | 1 ); // 打开CLK输出 测试用 可以不设置
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/* 设置时钟及PLL */
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/* 设置IIS及DAC */
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// wm8753_send(6<<9 | 0<<1 | 0 ); // 48K
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wm8753_send(6<<9 | 1<<5 | 0 ); // 44.1K
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wm8753_send(4<<9 | 0<<6 | 2 ); // 6.master IIS
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wm8753_send(1<<9 | 0 ); // 关闭DAC静音
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/* 设置IIS及DAC */
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/* 设置模拟通道及功放输出部分 */
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wm8753_send(34<<9 | 1<<8 | 1<<7 | 4<<4 ); // DAC LINE
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wm8753_send(36<<9 | 1<<8 | 1<<7 | 4<<4 ); // DAC LINE
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wm8753_send(40<<9 | 1<<8 | 1<<7 | 110); // 耳机音量
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wm8753_send(41<<9 | 1<<8 | 1<<7 | 110); // 耳机音量
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wm8753_send(45<<9 | 1<<2); // 设置ROUT反向
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wm8753_send(43<<9 | 1<<8 | 1<<7 | 70 ); //喇叭音量
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return RT_EOK;
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}
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#include <finsh.h>
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void vol(int v)
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{
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wm8753_send(40<<9 | 1<<8 | 1<<7 | v); // 耳机音量
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wm8753_send(41<<9 | 1<<8 | 1<<7 | v); // 耳机音量
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}
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FINSH_FUNCTION_EXPORT(vol, set volume)
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static rt_err_t wm8753_open(rt_device_t dev, rt_uint16_t oflag)
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{
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/* enable I2S */
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I2S_Cmd(SPI2, ENABLE);
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return RT_EOK;
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}
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static rt_err_t wm8753_close(rt_device_t dev)
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{
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/* interrupt mode */
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if (dev->flag & RT_DEVICE_FLAG_INT_TX)
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{
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/* Disable the I2S2 */
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I2S_Cmd(SPI2, DISABLE);
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}
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/* remove all data node */
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return RT_EOK;
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}
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static rt_err_t wm8753_control(rt_device_t dev, rt_uint8_t cmd, void *args)
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{
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/* rate control */
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return RT_EOK;
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}
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static rt_size_t wm8753_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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{
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struct wm8753_device* device;
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struct wm8753_data_node* node;
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rt_uint32_t level;
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rt_uint16_t next_index;
|
||||
|
||||
device = (struct wm8753_device*)dev;
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
|
||||
next_index = device->put_index + 1;
|
||||
if (next_index >= DATA_NODE_MAX) next_index = 0;
|
||||
|
||||
/* check data_list full */
|
||||
if (next_index == device->read_index)
|
||||
{
|
||||
rt_set_errno(-RT_EFULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
level = rt_hw_interrupt_disable();
|
||||
node = &device->data_list[device->put_index];
|
||||
device->put_index = next_index;
|
||||
|
||||
// rt_kprintf("+\n");
|
||||
/* set node attribute */
|
||||
node->data_ptr = (rt_uint16_t*)buffer;
|
||||
node->data_size = size >> 1; /* size is byte unit, convert to half word unit */
|
||||
|
||||
// #if 0
|
||||
{
|
||||
/* sound patch */
|
||||
rt_uint32_t index;
|
||||
for (index = 0; index < node->data_size; index ++)
|
||||
{
|
||||
((rt_int16_t*)(node->data_ptr))[index] = (rt_int16_t)(node->data_ptr[index] + 0x8000);
|
||||
}
|
||||
}
|
||||
// #endif
|
||||
|
||||
next_index = device->read_index + 1;
|
||||
if (next_index >= DATA_NODE_MAX) next_index = 0;
|
||||
|
||||
/* check data list whether is empty */
|
||||
if (next_index == device->put_index)
|
||||
{
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_TX)
|
||||
{
|
||||
device->offset = 0;
|
||||
/* enable I2S interrupt */
|
||||
SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, ENABLE);
|
||||
}
|
||||
else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
|
||||
{
|
||||
DMA_Configuration((rt_uint32_t)node->data_ptr, node->data_size);
|
||||
}
|
||||
}
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
rt_err_t wm8753_hw_init(void)
|
||||
{
|
||||
rt_device_t dev;
|
||||
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
|
||||
|
||||
NVIC_Configuration();
|
||||
GPIO_Configuration();
|
||||
I2S_Configuration();
|
||||
|
||||
dev = (rt_device_t)&wm8753;
|
||||
dev->type = RT_Device_Class_Unknown;
|
||||
dev->rx_indicate = RT_NULL;
|
||||
dev->tx_complete = RT_NULL;
|
||||
dev->init = wm8753_init;
|
||||
dev->open = wm8753_open;
|
||||
dev->close = wm8753_close;
|
||||
dev->read = RT_NULL;
|
||||
dev->write = wm8753_write;
|
||||
dev->control = wm8753_control;
|
||||
dev->private = RT_NULL;
|
||||
|
||||
/* set read_index and put index to 0 */
|
||||
wm8753.read_index = 0;
|
||||
wm8753.put_index = 0;
|
||||
|
||||
wm_sclk_0;
|
||||
wm_sclk_1;
|
||||
wm_sclk_0;
|
||||
|
||||
wm_sdin_0;
|
||||
wm_sdin_1;
|
||||
wm_sdin_0;
|
||||
|
||||
wm_csb_0;
|
||||
wm_csb_1;
|
||||
|
||||
/* register the device */
|
||||
return rt_device_register(&wm8753.parent, "snd",
|
||||
RT_DEVICE_FLAG_WRONLY | RT_DEVICE_FLAG_DMA_TX);
|
||||
}
|
||||
|
||||
void wm8753_isr()
|
||||
{
|
||||
struct wm8753_data_node* node;
|
||||
node = &wm8753.data_list[wm8753.read_index]; /* get current data node */
|
||||
|
||||
if (SPI_I2S_GetITStatus(SPI2, SPI_I2S_IT_TXE) == SET)
|
||||
{
|
||||
SPI_I2S_SendData(SPI2, node->data_ptr[wm8753.offset++]);
|
||||
}
|
||||
|
||||
if (wm8753.offset == node->data_size)
|
||||
{
|
||||
/* move to next node */
|
||||
rt_uint16_t next_index;
|
||||
|
||||
next_index = wm8753.read_index + 1;
|
||||
if (next_index >= DATA_NODE_MAX) next_index = 0;
|
||||
|
||||
/* notify transmitted complete. */
|
||||
if (wm8753.parent.tx_complete != RT_NULL)
|
||||
{
|
||||
wm8753.parent.tx_complete (&wm8753.parent, wm8753.data_list[wm8753.read_index].data_ptr);
|
||||
rt_kprintf("-\n");
|
||||
}
|
||||
|
||||
wm8753.offset = 0;
|
||||
wm8753.read_index = next_index;
|
||||
if (next_index == wm8753.put_index)
|
||||
{
|
||||
/* no data on the list, disable I2S interrupt */
|
||||
SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, DISABLE);
|
||||
|
||||
rt_kprintf("*\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void wm8753_dma_isr()
|
||||
{
|
||||
/* switch to next buffer */
|
||||
rt_uint16_t next_index;
|
||||
void* data_ptr;
|
||||
|
||||
next_index = wm8753.read_index + 1;
|
||||
if (next_index >= DATA_NODE_MAX) next_index = 0;
|
||||
|
||||
/* save current data pointer */
|
||||
data_ptr = wm8753.data_list[wm8753.read_index].data_ptr;
|
||||
|
||||
wm8753.read_index = next_index;
|
||||
if (next_index != wm8753.put_index)
|
||||
{
|
||||
/* enable next dma request */
|
||||
DMA_Configuration((rt_uint32_t)wm8753.data_list[wm8753.read_index].data_ptr,
|
||||
wm8753.data_list[wm8753.read_index].data_size);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf("*\n");
|
||||
}
|
||||
|
||||
/* notify transmitted complete. */
|
||||
if (wm8753.parent.tx_complete != RT_NULL)
|
||||
{
|
||||
wm8753.parent.tx_complete (&wm8753.parent, data_ptr);
|
||||
// rt_kprintf("-\n");
|
||||
}
|
||||
}
|
||||
|
Loading…
Reference in New Issue