libs/rt-thread
libs/rt-thread
4
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

[update] add drivers for stm32mp1.

Browse Source
This commit is contained in:
thread-liu 2020-06-23 10:43:18 +08:00
parent 8c44edf8a2
commit 2fcd940b57
39 changed files with 4348 additions and 343 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
bsp/stm32/libraries/HAL_Drivers/SConscript
View File

@ -35,6 +35,9 @@ if GetDepend(['BSP_USING_ETH', 'RT_USING_LWIP']):
if GetDepend(['RT_USING_ADC']):
src += Glob('drv_adc.c')
if GetDepend(['RT_USING_DAC']):
src += Glob('drv_dac.c')
if GetDepend(['RT_USING_CAN']):
src += ['drv_can.c']

93
bsp/stm32/libraries/HAL_Drivers/config/mp1/adc_config.h Normal file
View File

@ -0,0 +1,93 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-16 thread-liu first version
*/
#ifndef __ADC_CONFIG_H__
#define __ADC_CONFIG_H__
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifdef BSP_USING_ADC1
#ifndef ADC1_CONFIG
#define ADC1_CONFIG \
{ \
.Instance = ADC1, \
.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2, \
.Init.Resolution = ADC_RESOLUTION_12B, \
.Init.ScanConvMode = ADC_SCAN_DISABLE, \
.Init.EOCSelection = ADC_EOC_SINGLE_CONV, \
.Init.LowPowerAutoWait = DISABLE, \
.Init.ContinuousConvMode = DISABLE, \
.Init.NbrOfConversion = 1, \
.Init.DiscontinuousConvMode = DISABLE, \
.Init.NbrOfDiscConversion = 1, \
.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE, \
.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR, \
.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN, \
.Init.OversamplingMode = DISABLE, \
}
#endif /* ADC1_CONFIG */
#endif /* BSP_USING_ADC1 */
#ifdef BSP_USING_ADC2
#ifndef ADC2_CONFIG
#define ADC2_CONFIG \
{ \
.Instance = ADC2, \
.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2, \
.Init.Resolution = ADC_RESOLUTION_12B, \
.Init.ScanConvMode = ADC_SCAN_DISABLE, \
.Init.EOCSelection = ADC_EOC_SINGLE_CONV, \
.Init.LowPowerAutoWait = DISABLE, \
.Init.ContinuousConvMode = DISABLE, \
.Init.NbrOfConversion = 1, \
.Init.DiscontinuousConvMode = DISABLE, \
.Init.NbrOfDiscConversion = 1, \
.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE, \
.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR, \
.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN, \
.Init.OversamplingMode = DISABLE, \
}
#endif /* ADC2_CONFIG */
#endif /* BSP_USING_ADC2 */
#ifdef BSP_USING_ADC3
#ifndef ADC3_CONFIG
#define ADC3_CONFIG \
{ \
.Instance = ADC3, \
.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2, \
.Init.Resolution = ADC_RESOLUTION_12B, \
.Init.ScanConvMode = ADC_SCAN_DISABLE, \
.Init.EOCSelection = ADC_EOC_SINGLE_CONV, \
.Init.LowPowerAutoWait = DISABLE, \
.Init.ContinuousConvMode = DISABLE, \
.Init.NbrOfConversion = 1, \
.Init.DiscontinuousConvMode = DISABLE, \
.Init.NbrOfDiscConversion = 1, \
.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE, \
.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR, \
.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN, \
.Init.OversamplingMode = DISABLE, \
}
#endif /* ADC3_CONFIG */
#endif /* BSP_USING_ADC3 */
#ifdef __cplusplus
}
#endif
#endif /* __ADC_CONFIG_H__ */

33
bsp/stm32/libraries/HAL_Drivers/config/mp1/dac_config.h Normal file
View File

@ -0,0 +1,33 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-16 thread-liu first version
*/
#ifndef __DAC_CONFIG_H__
#define __DAC_CONFIG_H__
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifdef BSP_USING_DAC1
#ifndef DAC1_CONFIG
#define DAC1_CONFIG \
{ \
.Instance = DAC1, \
}
#endif /* DAC1_CONFIG */
#endif /* BSP_USING_DAC1 */
#ifdef __cplusplus
}
#endif
#endif /* __DAC_CONFIG_H__ */

25
bsp/stm32/libraries/HAL_Drivers/config/mp1/dma_config.h
View File

@ -7,6 +7,7 @@
* Date Author Notes
* 2019-01-02 zylx first version
* 2019-01-08 SummerGift clean up the code
* 2020-06-20 thread-liu add stm32mp1
*/
#ifndef __DMA_CONFIG_H__
@ -19,12 +20,12 @@ extern "C" {
#endif
/* DMA2 stream0 */
#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
#define SPI1_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler
#define SPI1_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
#define SPI1_RX_DMA_INSTANCE DMA2_Stream0
#define SPI1_RX_DMA_CHANNEL DMA_REQUEST_SPI1_RX
#define SPI1_RX_DMA_IRQ DMA2_Stream0_IRQn
#if defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE)
#define UART3_RX_DMA_IRQHandler DMA2_Stream0_IRQHandler
#define UART3_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
#define UART3_RX_DMA_INSTANCE DMA2_Stream0
#define UART3_RX_DMA_CHANNEL DMA_REQUEST_USART3_RX
#define UART3_RX_DMA_IRQ DMA2_Stream0_IRQn
#elif defined(BSP_SPI4_RX_USING_DMA) && !defined(SPI4_RX_DMA_INSTANCE)
#define SPI4_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler
#define SPI4_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
@ -40,12 +41,12 @@ extern "C" {
#endif
/* DMA2 stream1 */
#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
#define SPI1_DMA_TX_IRQHandler DMA2_Stream1_IRQHandler
#define SPI1_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
#define SPI1_TX_DMA_INSTANCE DMA2_Stream1
#define SPI1_TX_DMA_CHANNEL DMA_REQUEST_SPI1_RX
#define SPI1_TX_DMA_IRQ DMA2_Stream1_IRQn
#if defined(BSP_UART3_TX_USING_DMA) && !defined(BSP_UART3_TX_USING_INSTANCE)
#define UART3_TX_DMA_IRQHandler DMA2_Stream1_IRQHandler
#define UART3_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
#define UART3_TX_DMA_INSTANCE DMA2_Stream1
#define UART3_TX_DMA_CHANNEL DMA_REQUEST_USART3_TX
#define UART3_TX_DMA_IRQ DMA2_Stream1_IRQn
#elif defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE)
#define SPI4_DMA_TX_IRQHandler DMA2_Stream1_IRQHandler
#define SPI4_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN

68
bsp/stm32/libraries/HAL_Drivers/config/mp1/pwm_config.h Normal file
View File

@ -0,0 +1,68 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-13 zylx first version
*/
#ifndef __PWM_CONFIG_H__
#define __PWM_CONFIG_H__
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifdef BSP_USING_PWM2
#ifndef PWM2_CONFIG
#define PWM2_CONFIG \
{ \
.tim_handle.Instance = TIM2, \
.name = "pwm2", \
.channel = 0 \
}
#endif /* PWM2_CONFIG */
#endif /* BSP_USING_PWM2 */
#ifdef BSP_USING_PWM3
#ifndef PWM3_CONFIG
#define PWM3_CONFIG \
{ \
.tim_handle.Instance = TIM3, \
.name = "pwm3", \
.channel = 0 \
}
#endif /* PWM3_CONFIG */
#endif /* BSP_USING_PWM3 */
#ifdef BSP_USING_PWM4
#ifndef PWM4_CONFIG
#define PWM4_CONFIG \
{ \
.tim_handle.Instance = TIM4, \
.name = "pwm4", \
.channel = 0 \
}
#endif /* PWM4_CONFIG */
#endif /* BSP_USING_PWM4 */
#ifdef BSP_USING_PWM5
#ifndef PWM5_CONFIG
#define PWM5_CONFIG \
{ \
.tim_handle.Instance = TIM5, \
.name = "pwm5", \
.channel = 0 \
}
#endif /* PWM5_CONFIG */
#endif /* BSP_USING_PWM5 */
#ifdef __cplusplus
}
#endif
#endif /* __PWM_CONFIG_H__ */

198
bsp/stm32/libraries/HAL_Drivers/config/mp1/spi_config.h Normal file
View File

@ -0,0 +1,198 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-06 SummerGift first version
*/
#ifndef __SPI_CONFIG_H__
#define __SPI_CONFIG_H__
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifdef BSP_USING_SPI1
#ifndef SPI1_BUS_CONFIG
#define SPI1_BUS_CONFIG \
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.irq_type = SPI1_IRQn, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
#ifdef BSP_SPI1_TX_USING_DMA
#ifndef SPI1_TX_DMA_CONFIG
#define SPI1_TX_DMA_CONFIG \
{ \
.dma_rcc = SPI1_TX_DMA_RCC, \
.Instance = SPI1_TX_DMA_INSTANCE, \
.request = SPI1_TX_DMA_CHANNEL, \
.dma_irq = SPI1_TX_DMA_IRQ, \
}
#endif /* SPI1_TX_DMA_CONFIG */
#endif /* BSP_SPI1_TX_USING_DMA */
#ifdef BSP_SPI1_RX_USING_DMA
#ifndef SPI1_RX_DMA_CONFIG
#define SPI1_RX_DMA_CONFIG \
{ \
.dma_rcc = SPI1_RX_DMA_RCC, \
.Instance = SPI1_RX_DMA_INSTANCE, \
.request = SPI1_RX_DMA_CHANNEL, \
.dma_irq = SPI1_RX_DMA_IRQ, \
}
#endif /* SPI1_RX_DMA_CONFIG */
#endif /* BSP_SPI1_RX_USING_DMA */
#ifdef BSP_USING_SPI2
#ifndef SPI2_BUS_CONFIG
#define SPI2_BUS_CONFIG \
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
.irq_type = SPI2_IRQn, \
}
#endif /* SPI2_BUS_CONFIG */
#endif /* BSP_USING_SPI2 */
#ifdef BSP_SPI2_TX_USING_DMA
#ifndef SPI2_TX_DMA_CONFIG
#define SPI2_TX_DMA_CONFIG \
{ \
.dma_rcc = SPI2_TX_DMA_RCC, \
.Instance = SPI2_TX_DMA_INSTANCE, \
.request = SPI2_TX_DMA_CHANNEL, \
.dma_irq = SPI2_TX_DMA_IRQ, \
}
#endif /* SPI2_TX_DMA_CONFIG */
#endif /* BSP_SPI2_TX_USING_DMA */
#ifdef BSP_SPI2_RX_USING_DMA
#ifndef SPI2_RX_DMA_CONFIG
#define SPI2_RX_DMA_CONFIG \
{ \
.dma_rcc = SPI2_RX_DMA_RCC, \
.Instance = SPI2_RX_DMA_INSTANCE, \
.request = SPI2_RX_DMA_CHANNEL, \
.dma_irq = SPI2_RX_DMA_IRQ, \
}
#endif /* SPI2_RX_DMA_CONFIG */
#endif /* BSP_SPI2_RX_USING_DMA */
#ifdef BSP_USING_SPI3
#ifndef SPI3_BUS_CONFIG
#define SPI3_BUS_CONFIG \
{ \
.Instance = SPI3, \
.bus_name = "spi3", \
.irq_type = SPI3_IRQn, \
}
#endif /* SPI3_BUS_CONFIG */
#endif /* BSP_USING_SPI3 */
#ifdef BSP_SPI3_TX_USING_DMA
#ifndef SPI3_TX_DMA_CONFIG
#define SPI3_TX_DMA_CONFIG \
{ \
.dma_rcc = SPI3_TX_DMA_RCC, \
.Instance = SPI3_TX_DMA_INSTANCE, \
.request = SPI3_TX_DMA_CHANNEL, \
.dma_irq = SPI3_TX_DMA_IRQ, \
}
#endif /* SPI3_TX_DMA_CONFIG */
#endif /* BSP_SPI3_TX_USING_DMA */
#ifdef BSP_SPI3_RX_USING_DMA
#ifndef SPI3_RX_DMA_CONFIG
#define SPI3_RX_DMA_CONFIG \
{ \
.dma_rcc = SPI3_RX_DMA_RCC, \
.Instance = SPI3_RX_DMA_INSTANCE, \
.request = SPI3_RX_DMA_CHANNEL, \
.dma_irq = SPI3_RX_DMA_IRQ, \
}
#endif /* SPI3_RX_DMA_CONFIG */
#endif /* BSP_SPI3_RX_USING_DMA */
#ifdef BSP_USING_SPI4
#ifndef SPI4_BUS_CONFIG
#define SPI4_BUS_CONFIG \
{ \
.Instance = SPI4, \
.bus_name = "spi4", \
.irq_type = SPI4_IRQn, \
}
#endif /* SPI4_BUS_CONFIG */
#endif /* BSP_USING_SPI4 */
#ifdef BSP_SPI4_TX_USING_DMA
#ifndef SPI4_TX_DMA_CONFIG
#define SPI4_TX_DMA_CONFIG \
{ \
.dma_rcc = SPI4_TX_DMA_RCC, \
.Instance = SPI4_TX_DMA_INSTANCE, \
.request = SPI4_TX_DMA_CHANNEL, \
.dma_irq = SPI4_TX_DMA_IRQ, \
}
#endif /* SPI4_TX_DMA_CONFIG */
#endif /* BSP_SPI4_TX_USING_DMA */
#ifdef BSP_SPI4_RX_USING_DMA
#ifndef SPI4_RX_DMA_CONFIG
#define SPI4_RX_DMA_CONFIG \
{ \
.dma_rcc = SPI4_RX_DMA_RCC, \
.Instance = SPI4_RX_DMA_INSTANCE, \
.request = SPI4_RX_DMA_CHANNEL, \
.dma_irq = SPI4_RX_DMA_IRQ, \
}
#endif /* SPI4_RX_DMA_CONFIG */
#endif /* BSP_SPI4_RX_USING_DMA */
#ifdef BSP_USING_SPI5
#ifndef SPI5_BUS_CONFIG
#define SPI5_BUS_CONFIG \
{ \
.Instance = SPI5, \
.bus_name = "spi5", \
}
#endif /* SPI5_BUS_CONFIG */
#endif /* BSP_USING_SPI5 */
#ifdef BSP_SPI5_TX_USING_DMA
#ifndef SPI5_TX_DMA_CONFIG
#define SPI5_TX_DMA_CONFIG \
{ \
.dma_rcc = SPI5_TX_DMA_RCC, \
.Instance = SPI5_TX_DMA_INSTANCE, \
.request = SPI5_TX_DMA_CHANNEL, \
.dma_irq = SPI5_TX_DMA_IRQ, \
}
#endif /* SPI5_TX_DMA_CONFIG */
#endif /* BSP_SPI5_TX_USING_DMA */
#ifdef BSP_SPI5_RX_USING_DMA
#ifndef SPI5_RX_DMA_CONFIG
#define SPI5_RX_DMA_CONFIG \
{ \
.dma_rcc = SPI5_RX_DMA_RCC, \
.Instance = SPI5_RX_DMA_INSTANCE, \
.request = SPI5_RX_DMA_CHANNEL, \
.dma_irq = SPI5_RX_DMA_IRQ, \
}
#endif /* SPI5_RX_DMA_CONFIG */
#endif /* BSP_SPI5_RX_USING_DMA */
#ifdef __cplusplus
}
#endif
#endif /*__SPI_CONFIG_H__ */

67
bsp/stm32/libraries/HAL_Drivers/config/mp1/tim_config.h Normal file
View File

@ -0,0 +1,67 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-11 zylx first version
*/
#ifndef __TIM_CONFIG_H__
#define __TIM_CONFIG_H__
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifndef TIM_DEV_INFO_CONFIG
#define TIM_DEV_INFO_CONFIG \
{ \
.maxfreq = 1000000, \
.minfreq = 3000, \
.maxcnt = 0xFFFF, \
.cntmode = HWTIMER_CNTMODE_UP, \
}
#endif /* TIM_DEV_INFO_CONFIG */
#ifdef BSP_USING_TIM14
#ifndef TIM14_CONFIG
#define TIM14_CONFIG \
{ \
.tim_handle.Instance = TIM14, \
.tim_irqn = TIM14_IRQn, \
.name = "timer14", \
}
#endif /* TIM14_CONFIG */
#endif /* BSP_USING_TIM14 */
#ifdef BSP_USING_TIM16
#ifndef TIM16_CONFIG
#define TIM16_CONFIG \
{ \
.tim_handle.Instance = TIM16, \
.tim_irqn = TIM16_IRQn, \
.name = "timer16", \
}
#endif /* TIM16_CONFIG */
#endif /* BSP_USING_TIM16 */
#ifdef BSP_USING_TIM17
#ifndef TIM17_CONFIG
#define TIM17_CONFIG \
{ \
.tim_handle.Instance = TIM17, \
.tim_irqn = TIM17_IRQn, \
.name = "timer17", \
}
#endif /* TIM17_CONFIG */
#endif /* BSP_USING_TIM17 */
#ifdef __cplusplus
}
#endif
#endif /* __TIM_CONFIG_H__ */

29
bsp/stm32/libraries/HAL_Drivers/drv_adc.c
View File

@ -7,7 +7,8 @@
* Date Author Notes
* 2018-12-05 zylx first version
* 2018-12-12 greedyhao Porting for stm32f7xx
* 2019-02-01 yuneizhilin fix the stm32_adc_init function initialization issue
* 2019-02-01 yuneizhilin fix the stm32_adc_init function initialization issue
* 2020-06-17 thread-liu Porting for stm32mp1xx
*/
#include <board.h>
@ -50,7 +51,7 @@ static rt_err_t stm32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chan
if (enabled)
{
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined (SOC_SERIES_STM32MP1)
ADC_Enable(stm32_adc_handler);
#else
__HAL_ADC_ENABLE(stm32_adc_handler);
@ -58,7 +59,7 @@ static rt_err_t stm32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chan
}
else
{
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined (SOC_SERIES_STM32MP1)
ADC_Disable(stm32_adc_handler);
#else
__HAL_ADC_DISABLE(stm32_adc_handler);
@ -190,7 +191,13 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch
#endif
return -RT_ERROR;
}
#if defined(SOC_SERIES_STM32MP1)
ADC_ChanConf.Rank = ADC_REGULAR_RANK_1;
#else
ADC_ChanConf.Rank = 1;
#endif
#if defined(SOC_SERIES_STM32F0)
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_71CYCLES_5;
#elif defined(SOC_SERIES_STM32F1)
@ -199,6 +206,8 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_112CYCLES;
#elif defined(SOC_SERIES_STM32L4)
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_247CYCLES_5;
#elif defined(SOC_SERIES_STM32MP1)
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_810CYCLES_5;
#endif
#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
ADC_ChanConf.Offset = 0;
@ -206,9 +215,21 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch
#ifdef SOC_SERIES_STM32L4
ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE;
ADC_ChanConf.SingleDiff = LL_ADC_SINGLE_ENDED;
#elif defined(SOC_SERIES_STM32MP1)
ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE; /* ADC channel affected to offset number */
ADC_ChanConf.Offset = 0;
ADC_ChanConf.SingleDiff = ADC_SINGLE_ENDED; /* ADC channel differential mode */
#endif
HAL_ADC_ConfigChannel(stm32_adc_handler, &ADC_ChanConf);
#ifdef SOC_SERIES_STM32MP1
/* Run the ADC linear calibration in single-ended mode */
if (HAL_ADCEx_Calibration_Start(stm32_adc_handler, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED) != HAL_OK)
{
LOG_E("ADC open linear calibration error!\n");
/* Calibration Error */
return -RT_ERROR;
}
#endif
/* start ADC */
HAL_ADC_Start(stm32_adc_handler);

5
bsp/stm32/libraries/HAL_Drivers/drv_config.h
View File

@ -107,6 +107,11 @@ extern "C" {
#elif defined(SOC_SERIES_STM32MP1)
#include "mp1/dma_config.h"
#include "mp1/uart_config.h"
#include "mp1/spi_config.h"
#include "mp1/adc_config.h"
#include "mp1/dac_config.h"
#include "mp1/tim_config.h"
#include "mp1/pwm_config.h"
#endif
#ifdef __cplusplus

189
bsp/stm32/libraries/HAL_Drivers/drv_dac.c Normal file
View File

@ -0,0 +1,189 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#include <board.h>
#if defined(BSP_USING_DAC1) || defined(BSP_USING_DAC2)
#include "drv_config.h"
//#define DRV_DEBUG
#define LOG_TAG "drv.dac"
#include <drv_log.h>
static DAC_HandleTypeDef dac_config[] =
{
#ifdef BSP_USING_DAC1
DAC1_CONFIG,
#endif
};
struct stm32_dac
{
DAC_HandleTypeDef DAC_Handler;
struct rt_dac_device stm32_dac_device;
};
static struct stm32_dac stm32_dac_obj[sizeof(dac_config) / sizeof(dac_config[0])];
static rt_err_t stm32_dac_enabled(struct rt_dac_device *device, rt_uint32_t channel)
{
DAC_HandleTypeDef *stm32_dac_handler;
RT_ASSERT(device != RT_NULL);
stm32_dac_handler = device->parent.user_data;
#if defined(SOC_SERIES_STM32MP1)
HAL_DAC_Start(stm32_dac_handler, channel);
#endif
return RT_EOK;
}
static rt_err_t stm32_dac_disabled(struct rt_dac_device *device, rt_uint32_t channel)
{
DAC_HandleTypeDef *stm32_dac_handler;
RT_ASSERT(device != RT_NULL);
stm32_dac_handler = device->parent.user_data;
#if defined(SOC_SERIES_STM32MP1)
HAL_DAC_Stop(stm32_dac_handler, channel);
#endif
return RT_EOK;
}
static rt_uint32_t stm32_dac_get_channel(rt_uint32_t channel)
{
rt_uint32_t stm32_channel = 0;
switch (channel)
{
case 1:
stm32_channel = DAC_CHANNEL_1;
break;
case 2:
stm32_channel = DAC_CHANNEL_2;
break;
default:
RT_ASSERT(0);
break;
}
return stm32_channel;
}
static rt_err_t stm32_set_dac_value(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value)
{
uint32_t dac_channel;
DAC_ChannelConfTypeDef dac_ChanConf;
DAC_HandleTypeDef *stm32_dac_handler;
RT_ASSERT(device != RT_NULL);
RT_ASSERT(value != RT_NULL);
stm32_dac_handler = device->parent.user_data;
rt_memset(&dac_ChanConf, 0, sizeof(dac_ChanConf));
#if defined(SOC_SERIES_STM32MP1)
if (channel <= 2 && channel > 0)
{
/* set stm32 dac channel */
dac_channel = stm32_dac_get_channel(channel);
}
else
{
LOG_E("dac channel must be between 1 and 2.");
return -RT_ERROR;
}
#endif
#if defined(SOC_SERIES_STM32MP1)
dac_ChanConf.DAC_Trigger=DAC_TRIGGER_NONE;
dac_ChanConf.DAC_OutputBuffer=DAC_OUTPUTBUFFER_DISABLE;
#endif
/* config dac out channel*/
if (HAL_DAC_ConfigChannel(stm32_dac_handler, &dac_ChanConf, dac_channel) != HAL_OK)
{
LOG_D("Config dac out channel Error!\n");
return -RT_ERROR;
}
/* set dac channel out value*/
if (HAL_DAC_SetValue(stm32_dac_handler, dac_channel, DAC_ALIGN_12B_R, *value) != HAL_OK)
{
LOG_D("Setting dac channel out value Error!\n");
return -RT_ERROR;
}
/* start dac */
if (HAL_DAC_Start(stm32_dac_handler, dac_channel) != HAL_OK)
{
LOG_D("Start dac Error!\n");
return -RT_ERROR;
}
return RT_EOK;
}
static const struct rt_dac_ops stm_dac_ops =
{
.disabled = stm32_dac_disabled,
.enabled = stm32_dac_enabled,
.convert = stm32_set_dac_value,
};
static int stm32_dac_init(void)
{
int result = RT_EOK;
/* save dac name */
char name_buf[5] = {'d', 'a', 'c', '0', 0};
int i = 0;
for (i = 0; i < sizeof(dac_config) / sizeof(dac_config[0]); i++)
{
/* dac init */
name_buf[3] = '0';
stm32_dac_obj[i].DAC_Handler = dac_config[i];
#if defined(DAC1)
if (stm32_dac_obj[i].DAC_Handler.Instance == DAC1)
{
name_buf[3] = '1';
}
#endif
#if defined(DAC2)
if (stm32_dac_obj[i].dac_Handler.Instance == DAC2)
{
name_buf[3] = '2';
}
#endif
if (HAL_DAC_Init(&stm32_dac_obj[i].DAC_Handler) != HAL_OK)
{
LOG_E("%s init failed", name_buf);
result = -RT_ERROR;
}
else
{
/* register dac device */
if (rt_hw_dac_register(&stm32_dac_obj[i].stm32_dac_device, name_buf, &stm_dac_ops, &stm32_dac_obj[i].DAC_Handler) == RT_EOK)
{
LOG_D("%s init success", name_buf);
}
else
{
LOG_E("%s register failed", name_buf);
result = -RT_ERROR;
}
}
}
return result;
}
INIT_DEVICE_EXPORT(stm32_dac_init);
#endif /* BSP_USING_DAC */

17
bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c
View File

@ -6,6 +6,7 @@
* Change Logs:
* Date Author Notes
* 2018-12-10 zylx first version
* 2020-06-16 thread-liu Porting for stm32mp1
*/
#include <board.h>
@ -168,6 +169,8 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
#elif defined(SOC_SERIES_STM32L4)
if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
#elif defined(SOC_SERIES_STM32MP1)
if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
if (0)
#endif
@ -192,7 +195,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
tim->Init.CounterMode = TIM_COUNTERMODE_DOWN;
}
tim->Init.RepetitionCounter = 0;
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1)
tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
#endif
if (HAL_TIM_Base_Init(tim) != HAL_OK)
@ -291,19 +294,21 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
#elif defined(SOC_SERIES_STM32L4)
if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
#elif defined(SOC_SERIES_STM32MP1)
if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
if (0)
#endif
{
#if defined(SOC_SERIES_STM32L4)
val = HAL_RCC_GetPCLK2Freq() / freq;
#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1)
val = HAL_RCC_GetPCLK2Freq() * 2 / freq;
#endif
}
else
{
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1)
val = HAL_RCC_GetPCLK1Freq() * 2 / freq;
#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
val = HAL_RCC_GetPCLK1Freq() / freq;
@ -410,7 +415,7 @@ void TIM8_UP_TIM13_IRQHandler(void)
#ifdef BSP_USING_TIM14
#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
void TIM8_TRG_COM_TIM14_IRQHandler(void)
#elif defined(SOC_SERIES_STM32F0)
#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
void TIM14_IRQHandler(void)
#endif
{
@ -434,7 +439,7 @@ void TIM1_BRK_TIM15_IRQHandler(void)
#ifdef BSP_USING_TIM16
#if defined(SOC_SERIES_STM32L4)
void TIM1_UP_TIM16_IRQHandler(void)
#elif defined(SOC_SERIES_STM32F0)
#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
void TIM16_IRQHandler(void)
#endif
{
@ -448,7 +453,7 @@ void TIM1_BRK_TIM15_IRQHandler(void)
#ifdef BSP_USING_TIM17
#if defined(SOC_SERIES_STM32L4)
void TIM1_TRG_COM_TIM17_IRQHandler(void)
#elif defined(SOC_SERIES_STM32F0)
#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
void TIM17_IRQHandler(void)
#endif
{

4
bsp/stm32/libraries/HAL_Drivers/drv_pwm.c
View File

@ -189,6 +189,8 @@ static rt_err_t drv_pwm_get(TIM_HandleTypeDef *htim, struct rt_pwm_configuration
if (htim->Instance == TIM9 || htim->Instance == TIM10 || htim->Instance == TIM11)
#elif defined(SOC_SERIES_STM32L4)
if (htim->Instance == TIM15 || htim->Instance == TIM16 || htim->Instance == TIM17)
#elif defined(SOC_SERIES_STM32MP1)
if (htim->Instance == TIM4)
#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
if (0)
#endif
@ -234,6 +236,8 @@ static rt_err_t drv_pwm_set(TIM_HandleTypeDef *htim, struct rt_pwm_configuration
if (htim->Instance == TIM9 || htim->Instance == TIM10 || htim->Instance == TIM11)
#elif defined(SOC_SERIES_STM32L4)
if (htim->Instance == TIM15 || htim->Instance == TIM16 || htim->Instance == TIM17)
#elif defined(SOC_SERIES_STM32MP1)
if (htim->Instance == TIM4)
#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
if (0)
#endif

23
bsp/stm32/libraries/HAL_Drivers/drv_spi.c
View File

@ -9,6 +9,7 @@
* 2018-12-11 greedyhao Porting for stm32f7xx
* 2019-01-03 zylx modify DMA initialization and spixfer function
* 2020-01-15 whj4674672 Porting for stm32h7xx
* 2020-06-18 thread-liu Porting for stm32mp1xx
*/
#include <rtthread.h>
@ -190,7 +191,11 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur
}
LOG_D("sys freq: %d, pclk2 freq: %d, SPI limiting freq: %d, BaudRatePrescaler: %d",
#if defined(SOC_SERIES_STM32MP1)
HAL_RCC_GetSystemCoreClockFreq(),
#else
HAL_RCC_GetSysClockFreq(),
#endif
SPI_APB_CLOCK,
cfg->max_hz,
spi_handle->Init.BaudRatePrescaler);
@ -209,7 +214,7 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur
spi_handle->State = HAL_SPI_STATE_RESET;
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32F0)
spi_handle->Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
#elif defined(SOC_SERIES_STM32H7)
#elif defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1)
spi_handle->Init.Mode = SPI_MODE_MASTER;
spi_handle->Init.NSS = SPI_NSS_SOFT;
spi_handle->Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
@ -414,7 +419,7 @@ static int rt_hw_spi_bus_init(void)
spi_bus_obj[i].dma.handle_rx.Instance = spi_config[i].dma_rx->Instance;
#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
spi_bus_obj[i].dma.handle_rx.Init.Channel = spi_config[i].dma_rx->channel;
#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1)
spi_bus_obj[i].dma.handle_rx.Init.Request = spi_config[i].dma_rx->request;
#endif
spi_bus_obj[i].dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
@ -424,7 +429,7 @@ static int rt_hw_spi_bus_init(void)
spi_bus_obj[i].dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
spi_bus_obj[i].dma.handle_rx.Init.Mode = DMA_NORMAL;
spi_bus_obj[i].dma.handle_rx.Init.Priority = DMA_PRIORITY_HIGH;
#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1)
spi_bus_obj[i].dma.handle_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
spi_bus_obj[i].dma.handle_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
spi_bus_obj[i].dma.handle_rx.Init.MemBurst = DMA_MBURST_INC4;
@ -441,6 +446,10 @@ static int rt_hw_spi_bus_init(void)
SET_BIT(RCC->AHB1ENR, spi_config[i].dma_rx->dma_rcc);
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHB1ENR, spi_config[i].dma_rx->dma_rcc);
#elif defined(SOC_SERIES_STM32MP1)
__HAL_RCC_DMAMUX_CLK_ENABLE();
SET_BIT(RCC->MP_AHB2ENSETR, spi_config[i].dma_rx->dma_rcc);
tmpreg = READ_BIT(RCC->MP_AHB2ENSETR, spi_config[i].dma_rx->dma_rcc);
#endif
UNUSED(tmpreg); /* To avoid compiler warnings */
}
@ -452,7 +461,7 @@ static int rt_hw_spi_bus_init(void)
spi_bus_obj[i].dma.handle_tx.Instance = spi_config[i].dma_tx->Instance;
#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
spi_bus_obj[i].dma.handle_tx.Init.Channel = spi_config[i].dma_tx->channel;
#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1)
spi_bus_obj[i].dma.handle_tx.Init.Request = spi_config[i].dma_tx->request;
#endif
spi_bus_obj[i].dma.handle_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
@ -462,7 +471,7 @@ static int rt_hw_spi_bus_init(void)
spi_bus_obj[i].dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
spi_bus_obj[i].dma.handle_tx.Init.Mode = DMA_NORMAL;
spi_bus_obj[i].dma.handle_tx.Init.Priority = DMA_PRIORITY_LOW;
#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1)
spi_bus_obj[i].dma.handle_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
spi_bus_obj[i].dma.handle_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
spi_bus_obj[i].dma.handle_tx.Init.MemBurst = DMA_MBURST_INC4;
@ -479,6 +488,10 @@ static int rt_hw_spi_bus_init(void)
SET_BIT(RCC->AHB1ENR, spi_config[i].dma_tx->dma_rcc);
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHB1ENR, spi_config[i].dma_tx->dma_rcc);
#elif defined(SOC_SERIES_STM32MP1)
__HAL_RCC_DMAMUX_CLK_ENABLE();
SET_BIT(RCC->MP_AHB2ENSETR, spi_config[i].dma_tx->dma_rcc);
tmpreg = READ_BIT(RCC->MP_AHB2ENSETR, spi_config[i].dma_tx->dma_rcc);
#endif
UNUSED(tmpreg); /* To avoid compiler warnings */
}

5
bsp/stm32/libraries/STM32MPxx_HAL/SConscript
View File

@ -57,6 +57,11 @@ if GetDepend(['RT_USING_CAN']):
if GetDepend(['BSP_USING_ETH']):
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_eth.c']
if GetDepend(['BSP_USING_WWDG']):
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_wwdg.c']
if GetDepend(['BSP_USING_LPTIM']):
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_lptim.c']
if GetDepend(['RT_USING_RTC']):
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rtc.c']

46
bsp/stm32/stm32mp157a-st-discovery/.config
View File

@ -108,7 +108,34 @@ CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
CONFIG_RT_USING_DFS=y
CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=2
CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
CONFIG_DFS_FD_MAX=16
# CONFIG_RT_USING_DFS_MNTTABLE is not set
CONFIG_RT_USING_DFS_ELMFAT=y
#
# elm-chan's FatFs, Generic FAT Filesystem Module
#
CONFIG_RT_DFS_ELM_CODE_PAGE=437
CONFIG_RT_DFS_ELM_WORD_ACCESS=y
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
CONFIG_RT_DFS_ELM_USE_LFN_3=y
CONFIG_RT_DFS_ELM_USE_LFN=3
CONFIG_RT_DFS_ELM_MAX_LFN=255
CONFIG_RT_DFS_ELM_DRIVES=2
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
# CONFIG_RT_USING_DFS_JFFS2 is not set
#
# Device Drivers
@ -125,6 +152,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
@ -152,6 +180,10 @@ CONFIG_RT_USING_PIN=y
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_RT_USING_MODULE is not set
#
@ -426,11 +458,21 @@ CONFIG_BSP_USING_STLINK_TO_USART=y
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
# CONFIG_BSP_USING_WWDG is not set
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART3=y
CONFIG_BSP_UART3_RX_USING_DMA=y
CONFIG_BSP_UART3_TX_USING_DMA=y
CONFIG_BSP_USING_UART4=y
# CONFIG_BSP_UART4_RX_USING_DMA is not set
# CONFIG_BSP_UART4_TX_USING_DMA is not set
# CONFIG_BSP_USING_UART5 is not set
# CONFIG_BSP_USING_TIM is not set
# CONFIG_BSP_USING_LPTIM is not set
# CONFIG_BSP_USING_PWM is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_DAC is not set
# CONFIG_BSP_USING_I2C1 is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_CRC is not set
# CONFIG_BSP_USING_RNG is not set
# CONFIG_BSP_USING_UDID is not set

98
bsp/stm32/stm32mp157a-st-discovery/README.md
View File

@ -35,25 +35,25 @@ STM32MP157A-DK1 是 ST 推出的一款基于双 Cortex-A7 + Cortex-M4 内核的
本 BSP 目前对外设的支持情况如下：
| **板载外设** | **支持情况** | **备注** |
| :----------- | :----------: | :------: |
| USB 转串口 | 支持 | |
| SD卡 | 暂不支持 | |
| 以太网 | 暂不支持 | |
| 音频接口 | 暂不支持 | |
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | |
| UART | 支持 | UART4 |
| EXTI | 支持 | |
| SPI | 暂不支持 | |
| TIM | 暂不支持 | |
| LPTIM | 暂不支持 | |
| I2C | 暂不支持 | |
| ADC | 暂不支持 | |
| DAC | 暂不支持 | |
| WWDG | 暂不支持 | |
| USB Device | 暂不支持 | |
| USB Host | 暂不支持 | |
| **板载外设** | **支持情况** | **备注** |
| :----------- | :----------: | :--------------: |
| USB 转串口 | 支持 | |
| SD卡 | 暂不支持 | |
| 以太网 | 暂不支持 | |
| 音频接口 | 暂不支持 | |
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | |
| UART | 支持 | UART4 (ST-Link) |
| EXTI | 支持 | |
| SPI | 支持 | |
| TIM | 支持 | |
| LPTIM | 支持 | |
| I2C | 支持 | 软件、硬件都支持 |
| ADC | 支持 | |
| DAC | 支持 | |
| WWDG | 支持 | |
| USB Device | 暂不支持 | |
| USB Host | 暂不支持 | |
## 使用说明
@ -99,6 +99,64 @@ STM32MP157A-DK1 是 ST 推出的一款基于双 Cortex-A7 + Cortex-M4 内核的
msh >
Hello RT-Thread!
```
#### 驱动使用
##### 1. WWDG
1. 在 bsp 下打开 env 工具；
2. 输入 `menuconfig` 命令， 进入 Hardware Drivers config 打开 wwdg，保存并退出；
3. 输入 `scons --target=iar` 命令重新生成工程；
4. wwdg 设备会在喂狗前触发中断，LD5 会在中断中不停的闪烁；
5. 在终端输入 `wwdg_sample` ，获取 wwdg 设备 Finsh 命令；
6. `wwdg_sample run` 开启 wwdg 设备；
7. wwdg_sample set [0 - 7] 设置 wwdg 设备分频率；
8. 通过调整 wwdg 设备分频率，开发板上 LD5 会有不同的闪烁频率。
##### 2. DAC
1. 在 bsp 下打开 env 工具；
2. 输入`menuconfig`命令， 进入 Hardware Drivers config 打开 dac，保存并退出；
3. 输入 `scons --target=iar` 命令重新生成工程；
###### Finsh
在使用设备前，需要先查找设备是否存在，可以使用命令 `dac probe` 后面跟注册的 DAC 设备的名称。如下所示：
```c
msh />dac probe dac1
probe dac1 success
```
使能设备的某个通道可以使用命令 `dac enable` 后面跟通道号。
```c
msh />dac enable 1
dac1 channel 1 enables success
```
设置 DAC 设备某个通道的数据可以使用命令 dac write` 后面跟通道号。
```c
msh />dac write 1 1000
dac1 channel 1 write value is 1000
```
关闭设备的某个通道可以使用命令 `dac disable` 后面跟通道号。
```c
msh />dac disable 1
dac1 channel 1 disable success
```
#### 3. LPTIM
1. 在 bsp 下打开 env 工具；
2. 输入 `menuconfig` 命令， 进入 Hardware Drivers config 打开 lptim，保存并退出；
3. 输入 `scons --target=iar` 命令重新生成工程；
4. lptim 设备计时溢出时会触发中断，中断会打印字符串 `"hello rt-thread!"`；
5. 在终端输入 `lptim_sample` ，获取 lptim 设备 Finsh 命令；
6. `lptim_sample run` 开启 lptim 设备；
7. `lptim_sample set` 设置 lptim 设备分频率。
### 进阶使用
此 BSP 默认只开启了 GPIO 和 串口4 的功能，如果需更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
@ -125,5 +183,5 @@ Hello RT-Thread!
维护人:
- [liukang](liukang@rt-thread.com)
- [liukang](https://github.com/thread-liu)

1
bsp/stm32/stm32mp157a-st-discovery/applications/main.c
View File

@ -7,6 +7,7 @@
* Date Author Notes
* 2020-06-05 thread-liu first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>

8
bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/.mxproject
View File

File diff suppressed because one or more lines are too long

10
bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Inc/stm32mp1xx_hal_conf.h
View File

@ -36,7 +36,7 @@
/*#define HAL_CEC_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
#define HAL_DAC_MODULE_ENABLED
/*#define HAL_DCMI_MODULE_ENABLED */
/*#define HAL_DSI_MODULE_ENABLED */
/*#define HAL_DFSDM_MODULE_ENABLED */
@ -46,11 +46,11 @@
/*#define HAL_HASH_MODULE_ENABLED */
/*#define HAL_HCD_MODULE_ENABLED */
#define HAL_HSEM_MODULE_ENABLED
/*#define HAL_I2C_MODULE_ENABLED */
#define HAL_I2C_MODULE_ENABLED
/*#define HAL_I2S_MODULE_ENABLED */
#define HAL_IPCC_MODULE_ENABLED
/*#define HAL_IWDG_MODULE_ENABLED */
/*#define HAL_LPTIM_MODULE_ENABLED */
#define HAL_LPTIM_MODULE_ENABLED
/*#define HAL_LTDC_MODULE_ENABLED */
/*#define HAL_NAND_MODULE_ENABLED */
/*#define HAL_NOR_MODULE_ENABLED */
@ -58,7 +58,7 @@
/*#define HAL_QSPI_MODULE_ENABLED */
/*#define HAL_RNG_MODULE_ENABLED */
/*#define HAL_SAI_MODULE_ENABLED */
#define HAL_SD_MODULE_ENABLED
/*#define HAL_SD_MODULE_ENABLED */
/*#define HAL_MMC_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */
/*#define HAL_SMBUS_MODULE_ENABLED */
@ -70,7 +70,7 @@
#define HAL_UART_MODULE_ENABLED
/*#define HAL_USART_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
#define HAL_WWDG_MODULE_ENABLED
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED

6
bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Inc/stm32mp1xx_it.h
View File

@ -56,8 +56,14 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void WWDG1_IRQHandler(void);
void LPTIM1_IRQHandler(void);
void IPCC_RX1_IRQHandler(void);
void IPCC_TX1_IRQHandler(void);
void LPTIM2_IRQHandler(void);
void LPTIM3_IRQHandler(void);
void LPTIM4_IRQHandler(void);
void LPTIM5_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */

318
bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Src/main.c
View File

@ -43,8 +43,16 @@
/* Private variables ---------------------------------------------------------*/
ADC_HandleTypeDef hadc2;
DAC_HandleTypeDef hdac1;
IPCC_HandleTypeDef hipcc;
LPTIM_HandleTypeDef hlptim1;
LPTIM_HandleTypeDef hlptim2;
LPTIM_HandleTypeDef hlptim3;
LPTIM_HandleTypeDef hlptim4;
LPTIM_HandleTypeDef hlptim5;
SPI_HandleTypeDef hspi5;
TIM_HandleTypeDef htim4;
@ -53,6 +61,9 @@ TIM_HandleTypeDef htim16;
TIM_HandleTypeDef htim17;
UART_HandleTypeDef huart4;
UART_HandleTypeDef huart3;
WWDG_HandleTypeDef hwwdg1;
/* USER CODE BEGIN PV */
@ -70,6 +81,14 @@ static void MX_TIM16_Init(void);
static void MX_TIM17_Init(void);
static void MX_UART4_Init(void);
static void MX_ADC2_Init(void);
static void MX_DAC1_Init(void);
static void MX_LPTIM1_Init(void);
static void MX_LPTIM2_Init(void);
static void MX_LPTIM3_Init(void);
static void MX_LPTIM4_Init(void);
static void MX_LPTIM5_Init(void);
static void MX_USART3_UART_Init(void);
static void MX_WWDG1_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@ -126,6 +145,14 @@ int main(void)
MX_TIM17_Init();
MX_UART4_Init();
MX_ADC2_Init();
MX_DAC1_Init();
MX_LPTIM1_Init();
MX_LPTIM2_Init();
MX_LPTIM3_Init();
MX_LPTIM4_Init();
MX_LPTIM5_Init();
MX_USART3_UART_Init();
MX_WWDG1_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
@ -251,8 +278,8 @@ static void MX_ADC2_Init(void)
/** Common config
*/
hadc2.Instance = ADC2;
hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4;
hadc2.Init.Resolution = ADC_RESOLUTION_12B;
hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2;
hadc2.Init.Resolution = ADC_RESOLUTION_16B;
hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE;
hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
hadc2.Init.LowPowerAutoWait = DISABLE;
@ -287,6 +314,48 @@ static void MX_ADC2_Init(void)
}
/**
* @brief DAC1 Initialization Function
* @param None
* @retval None
*/
static void MX_DAC1_Init(void)
{
/* USER CODE BEGIN DAC1_Init 0 */
/* USER CODE END DAC1_Init 0 */
DAC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN DAC1_Init 1 */
/* USER CODE END DAC1_Init 1 */
/** DAC Initialization
*/
hdac1.Instance = DAC1;
if (HAL_DAC_Init(&hdac1) != HAL_OK)
{
Error_Handler();
}
/** DAC channel OUT1 config
*/
sConfig.DAC_HighFrequency = DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE;
sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_DISABLE;
sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN DAC1_Init 2 */
/* USER CODE END DAC1_Init 2 */
}
/**
* @brief IPCC Initialization Function
* @param None
@ -313,6 +382,170 @@ static void MX_IPCC_Init(void)
}
/**
* @brief LPTIM1 Initialization Function
* @param None
* @retval None
*/
static void MX_LPTIM1_Init(void)
{
/* USER CODE BEGIN LPTIM1_Init 0 */
/* USER CODE END LPTIM1_Init 0 */
/* USER CODE BEGIN LPTIM1_Init 1 */
/* USER CODE END LPTIM1_Init 1 */
hlptim1.Instance = LPTIM1;
hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim1.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim1.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim1.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
hlptim1.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
hlptim1.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
if (HAL_LPTIM_Init(&hlptim1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LPTIM1_Init 2 */
/* USER CODE END LPTIM1_Init 2 */
}
/**
* @brief LPTIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_LPTIM2_Init(void)
{
/* USER CODE BEGIN LPTIM2_Init 0 */
/* USER CODE END LPTIM2_Init 0 */
/* USER CODE BEGIN LPTIM2_Init 1 */
/* USER CODE END LPTIM2_Init 1 */
hlptim2.Instance = LPTIM2;
hlptim2.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim2.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim2.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim2.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim2.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim2.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
hlptim2.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
hlptim2.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
if (HAL_LPTIM_Init(&hlptim2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LPTIM2_Init 2 */
/* USER CODE END LPTIM2_Init 2 */
}
/**
* @brief LPTIM3 Initialization Function
* @param None
* @retval None
*/
static void MX_LPTIM3_Init(void)
{
/* USER CODE BEGIN LPTIM3_Init 0 */
/* USER CODE END LPTIM3_Init 0 */
/* USER CODE BEGIN LPTIM3_Init 1 */
/* USER CODE END LPTIM3_Init 1 */
hlptim3.Instance = LPTIM3;
hlptim3.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim3.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim3.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim3.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim3.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim3.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
if (HAL_LPTIM_Init(&hlptim3) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LPTIM3_Init 2 */
/* USER CODE END LPTIM3_Init 2 */
}
/**
* @brief LPTIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_LPTIM4_Init(void)
{
/* USER CODE BEGIN LPTIM4_Init 0 */
/* USER CODE END LPTIM4_Init 0 */
/* USER CODE BEGIN LPTIM4_Init 1 */
/* USER CODE END LPTIM4_Init 1 */
hlptim4.Instance = LPTIM4;
hlptim4.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim4.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim4.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim4.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim4.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim4.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
if (HAL_LPTIM_Init(&hlptim4) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LPTIM4_Init 2 */
/* USER CODE END LPTIM4_Init 2 */
}
/**
* @brief LPTIM5 Initialization Function
* @param None
* @retval None
*/
static void MX_LPTIM5_Init(void)
{
/* USER CODE BEGIN LPTIM5_Init 0 */
/* USER CODE END LPTIM5_Init 0 */
/* USER CODE BEGIN LPTIM5_Init 1 */
/* USER CODE END LPTIM5_Init 1 */
hlptim5.Instance = LPTIM5;
hlptim5.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim5.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim5.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim5.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim5.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim5.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
if (HAL_LPTIM_Init(&hlptim5) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LPTIM5_Init 2 */
/* USER CODE END LPTIM5_Init 2 */
}
/**
* @brief SPI5 Initialization Function
* @param None
@ -563,6 +796,84 @@ static void MX_UART4_Init(void)
}
/**
* @brief USART3 Initialization Function
* @param None
* @retval None
*/
static void MX_USART3_UART_Init(void)
{
/* USER CODE BEGIN USART3_Init 0 */
/* USER CODE END USART3_Init 0 */
/* USER CODE BEGIN USART3_Init 1 */
/* USER CODE END USART3_Init 1 */
huart3.Instance = USART3;
huart3.Init.BaudRate = 115200;
huart3.Init.WordLength = UART_WORDLENGTH_8B;
huart3.Init.StopBits = UART_STOPBITS_1;
huart3.Init.Parity = UART_PARITY_NONE;
huart3.Init.Mode = UART_MODE_TX_RX;
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart3) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART3_Init 2 */
/* USER CODE END USART3_Init 2 */
}
/**
* @brief WWDG1 Initialization Function
* @param None
* @retval None
*/
static void MX_WWDG1_Init(void)
{
/* USER CODE BEGIN WWDG1_Init 0 */
/* USER CODE END WWDG1_Init 0 */
/* USER CODE BEGIN WWDG1_Init 1 */
/* USER CODE END WWDG1_Init 1 */
hwwdg1.Instance = WWDG1;
hwwdg1.Init.Prescaler = WWDG_PRESCALER_8;
hwwdg1.Init.Window = 64;
hwwdg1.Init.Counter = 64;
hwwdg1.Init.EWIMode = WWDG_EWI_DISABLE;
if (HAL_WWDG_Init(&hwwdg1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN WWDG1_Init 2 */
/* USER CODE END WWDG1_Init 2 */
}
/**
* @brief GPIO Initialization Function
* @param None
@ -574,8 +885,9 @@ static void MX_GPIO_Init(void)
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();

534
bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c
View File

@ -22,7 +22,7 @@
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
#include "stpmic.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@ -74,7 +74,18 @@ void HAL_MspInit(void)
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
if(IS_ENGINEERING_BOOT_MODE())
{
#if defined(BSP_USING_ADC) || defined(BSP_USING_DAC)
/* Configure PMIC */
BSP_PMIC_Init();
BSP_PMIC_InitRegulators();
__HAL_RCC_VREF_CLK_ENABLE();
HAL_SYSCFG_VREFBUF_HighImpedanceConfig(SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE);
HAL_SYSCFG_EnableVREFBUF();
#endif
}
/* USER CODE END MspInit 1 */
}
@ -151,6 +162,66 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
}
/**
* @brief DAC MSP Initialization
* This function configures the hardware resources used in this example
* @param hdac: DAC handle pointer
* @retval None
*/
void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hdac->Instance==DAC1)
{
/* USER CODE BEGIN DAC1_MspInit 0 */
/* USER CODE END DAC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_DAC12_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**DAC1 GPIO Configuration
PA4 ------> DAC1_OUT1
*/
GPIO_InitStruct.Pin = GPIO_PIN_4;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN DAC1_MspInit 1 */
/* USER CODE END DAC1_MspInit 1 */
}
}
/**
* @brief DAC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hdac: DAC handle pointer
* @retval None
*/
void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
{
if(hdac->Instance==DAC1)
{
/* USER CODE BEGIN DAC1_MspDeInit 0 */
/* USER CODE END DAC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_DAC12_CLK_DISABLE();
/**DAC1 GPIO Configuration
PA4 ------> DAC1_OUT1
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4);
/* USER CODE BEGIN DAC1_MspDeInit 1 */
/* USER CODE END DAC1_MspDeInit 1 */
}
}
/**
* @brief IPCC MSP Initialization
* This function configures the hardware resources used in this example
@ -204,6 +275,238 @@ void HAL_IPCC_MspDeInit(IPCC_HandleTypeDef* hipcc)
}
/**
* @brief LPTIM MSP Initialization
* This function configures the hardware resources used in this example
* @param hlptim: LPTIM handle pointer
* @retval None
*/
void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef* hlptim)
{
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(hlptim->Instance==LPTIM1)
{
/* USER CODE BEGIN LPTIM1_MspInit 0 */
/* USER CODE END LPTIM1_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
PeriphClkInit.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_LPTIM1_CLK_ENABLE();
/* LPTIM1 interrupt Init */
HAL_NVIC_SetPriority(LPTIM1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LPTIM1_IRQn);
/* USER CODE BEGIN LPTIM1_MspInit 1 */
/* USER CODE END LPTIM1_MspInit 1 */
}
else if(hlptim->Instance==LPTIM2)
{
/* USER CODE BEGIN LPTIM2_MspInit 0 */
/* USER CODE END LPTIM2_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM23;
PeriphClkInit.Lptim23ClockSelection = RCC_LPTIM23CLKSOURCE_PCLK3;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_LPTIM2_CLK_ENABLE();
/* LPTIM2 interrupt Init */
HAL_NVIC_SetPriority(LPTIM2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LPTIM2_IRQn);
/* USER CODE BEGIN LPTIM2_MspInit 1 */
/* USER CODE END LPTIM2_MspInit 1 */
}
else if(hlptim->Instance==LPTIM3)
{
/* USER CODE BEGIN LPTIM3_MspInit 0 */
/* USER CODE END LPTIM3_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM23;
PeriphClkInit.Lptim23ClockSelection = RCC_LPTIM23CLKSOURCE_PCLK3;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_LPTIM3_CLK_ENABLE();
/* LPTIM3 interrupt Init */
HAL_NVIC_SetPriority(LPTIM3_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LPTIM3_IRQn);
/* USER CODE BEGIN LPTIM3_MspInit 1 */
/* USER CODE END LPTIM3_MspInit 1 */
}
else if(hlptim->Instance==LPTIM4)
{
/* USER CODE BEGIN LPTIM4_MspInit 0 */
/* USER CODE END LPTIM4_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM45;
PeriphClkInit.Lptim45ClockSelection = RCC_LPTIM45CLKSOURCE_PCLK3;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_LPTIM4_CLK_ENABLE();
/* LPTIM4 interrupt Init */
HAL_NVIC_SetPriority(LPTIM4_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LPTIM4_IRQn);
/* USER CODE BEGIN LPTIM4_MspInit 1 */
/* USER CODE END LPTIM4_MspInit 1 */
}
else if(hlptim->Instance==LPTIM5)
{
/* USER CODE BEGIN LPTIM5_MspInit 0 */
/* USER CODE END LPTIM5_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM45;
PeriphClkInit.Lptim45ClockSelection = RCC_LPTIM45CLKSOURCE_PCLK3;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_LPTIM5_CLK_ENABLE();
/* LPTIM5 interrupt Init */
HAL_NVIC_SetPriority(LPTIM5_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LPTIM5_IRQn);
/* USER CODE BEGIN LPTIM5_MspInit 1 */
/* USER CODE END LPTIM5_MspInit 1 */
}
}
/**
* @brief LPTIM MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hlptim: LPTIM handle pointer
* @retval None
*/
void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef* hlptim)
{
if(hlptim->Instance==LPTIM1)
{
/* USER CODE BEGIN LPTIM1_MspDeInit 0 */
/* USER CODE END LPTIM1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPTIM1_CLK_DISABLE();
/* LPTIM1 interrupt DeInit */
HAL_NVIC_DisableIRQ(LPTIM1_IRQn);
/* USER CODE BEGIN LPTIM1_MspDeInit 1 */
/* USER CODE END LPTIM1_MspDeInit 1 */
}
else if(hlptim->Instance==LPTIM2)
{
/* USER CODE BEGIN LPTIM2_MspDeInit 0 */
/* USER CODE END LPTIM2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPTIM2_CLK_DISABLE();
/* LPTIM2 interrupt DeInit */
HAL_NVIC_DisableIRQ(LPTIM2_IRQn);
/* USER CODE BEGIN LPTIM2_MspDeInit 1 */
/* USER CODE END LPTIM2_MspDeInit 1 */
}
else if(hlptim->Instance==LPTIM3)
{
/* USER CODE BEGIN LPTIM3_MspDeInit 0 */
/* USER CODE END LPTIM3_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPTIM3_CLK_DISABLE();
/* LPTIM3 interrupt DeInit */
HAL_NVIC_DisableIRQ(LPTIM3_IRQn);
/* USER CODE BEGIN LPTIM3_MspDeInit 1 */
/* USER CODE END LPTIM3_MspDeInit 1 */
}
else if(hlptim->Instance==LPTIM4)
{
/* USER CODE BEGIN LPTIM4_MspDeInit 0 */
/* USER CODE END LPTIM4_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPTIM4_CLK_DISABLE();
/* LPTIM4 interrupt DeInit */
HAL_NVIC_DisableIRQ(LPTIM4_IRQn);
/* USER CODE BEGIN LPTIM4_MspDeInit 1 */
/* USER CODE END LPTIM4_MspDeInit 1 */
}
else if(hlptim->Instance==LPTIM5)
{
/* USER CODE BEGIN LPTIM5_MspDeInit 0 */
/* USER CODE END LPTIM5_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPTIM5_CLK_DISABLE();
/* LPTIM5 interrupt DeInit */
HAL_NVIC_DisableIRQ(LPTIM5_IRQn);
/* USER CODE BEGIN LPTIM5_MspDeInit 1 */
/* USER CODE END LPTIM5_MspDeInit 1 */
}
}
/**
* @brief SPI MSP Initialization
* This function configures the hardware resources used in this example
@ -473,6 +776,50 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
/* USER CODE END UART4_MspInit 1 */
}
else if(huart->Instance==USART3)
{
/* USER CODE BEGIN USART3_MspInit 0 */
/* USER CODE END USART3_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_UART35;
PeriphClkInit.Uart35ClockSelection = RCC_UART35CLKSOURCE_PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_USART3_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**USART3 GPIO Configuration
PB10 ------> USART3_TX
PB12 ------> USART3_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Alternate = GPIO_AF8_USART3;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USER CODE BEGIN USART3_MspInit 1 */
/* USER CODE END USART3_MspInit 1 */
}
}
@ -504,114 +851,125 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
/* USER CODE END UART4_MspDeInit 1 */
}
else if(huart->Instance==USART3)
{
/* USER CODE BEGIN USART3_MspDeInit 0 */
/* USER CODE END USART3_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART3_CLK_DISABLE();
/**USART3 GPIO Configuration
PB10 ------> USART3_TX
PB12 ------> USART3_RX
*/
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_12);
/* USER CODE BEGIN USART3_MspDeInit 1 */
/* USER CODE END USART3_MspDeInit 1 */
}
}
/**
* @brief WWDG MSP Initialization
* This function configures the hardware resources used in this example
* @param hwwdg: WWDG handle pointer
* @retval None
*/
void HAL_WWDG_MspInit(WWDG_HandleTypeDef* hwwdg)
{
if(hwwdg->Instance==WWDG1)
{
/* USER CODE BEGIN WWDG1_MspInit 0 */
/* USER CODE END WWDG1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_WWDG1_CLK_ENABLE();
/* WWDG1 interrupt Init */
HAL_NVIC_SetPriority(WWDG1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(WWDG1_IRQn);
/* USER CODE BEGIN WWDG1_MspInit 1 */
/* USER CODE END WWDG1_MspInit 1 */
}
}
/* USER CODE BEGIN 1 */
/**
* @brief SD MSP Initialization
* This function configures the hardware resources used in this example
* @param hsd: SD handle pointer
* @retval None
*/
void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
* @brief Initializes I2C MSP.
* @param hI2c : I2C handler
* @retval None
*/
void HAL_I2C_MspInit(I2C_HandleTypeDef *hI2c)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(hsd->Instance==SDMMC1)
{
/* USER CODE BEGIN SDMMC1_MspInit 0 */
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(hI2c->Instance == I2C4)
{
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SDMMC12;
PeriphClkInit.Sdmmc12ClockSelection = RCC_SDMMC12CLKSOURCE_HCLK6;
/*** Configure the I2C peripheral clock ***/
PeriphClkInit.I2c46ClockSelection = RCC_I2C46CLKSOURCE_HSI;
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C46;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
Error_Handler();
}
}
/* USER CODE END SDMMC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SDMMC1_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/**SDMMC1 GPIO Configuration
PC8 ------> SDMMC1_D0
PC9 ------> SDMMC1_D1
PC10 ------> SDMMC1_D2
PC11 ------> SDMMC1_D3
PC12 ------> SDMMC1_CK
PD2 ------> SDMMC1_CMD
PB2 ------> SDCARD_DETECT
*/
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO1;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_2;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO1;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* SDMMC1 interrupt Init */
HAL_NVIC_SetPriority(SDMMC1_IRQn, 2, 0);
HAL_NVIC_EnableIRQ(SDMMC1_IRQn);
/* USER CODE BEGIN SDMMC1_MspInit 1 */
/* Enable GPIO clock */
__HAL_RCC_GPIOZ_CLK_ENABLE();
/* USER CODE END SDMMC1_MspInit 1 */
}
/* Configure I2C Tx/RX as alternate function */
GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF6_I2C4;
HAL_GPIO_Init(GPIOZ, &GPIO_InitStruct);
/* Enable I2C clock */
__HAL_RCC_I2C4_CLK_ENABLE();
/* Force the I2C peripheral clock reset */
__HAL_RCC_I2C4_FORCE_RESET();
/* Release the I2C peripheral clock reset */
__HAL_RCC_I2C4_RELEASE_RESET();
HAL_NVIC_SetPriority(I2C4_ER_IRQn, 0, 1);
HAL_NVIC_EnableIRQ(I2C4_ER_IRQn);
HAL_NVIC_SetPriority(I2C4_EV_IRQn, 0, 2);
HAL_NVIC_EnableIRQ(I2C4_EV_IRQn);
}
}
/**
* @brief SD MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hsd: SD handle pointer
* @retval None
*/
void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
* @brief DeInitializes I2C MSP.
* @param hI2c : I2C handler
* @retval None
*/
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hI2c)
{
if(hsd->Instance==SDMMC1)
{
/* USER CODE BEGIN SDMMC1_MspDeInit 0 */
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hI2c->Instance == I2C4)
{
/* Configure I2C Tx, Rx as alternate function */
GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5;
HAL_GPIO_DeInit(GPIOZ, GPIO_InitStruct.Pin);
/* USER CODE END SDMMC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SDMMC1_CLK_DISABLE();
/**SDMMC1 GPIO Configuration
PC8 ------> SDMMC1_D0
PC9 ------> SDMMC1_D1
PC10 ------> SDMMC1_D2
PC11 ------> SDMMC1_D3
PC12 ------> SDMMC1_CK
PD2 ------> SDMMC1_CMD
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|GPIO_PIN_12);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
/* SDMMC1 interrupt DeInit */
HAL_NVIC_DisableIRQ(SDMMC1_IRQn);
/* USER CODE BEGIN SDMMC1_MspDeInit 1 */
/* USER CODE END SDMMC1_MspDeInit 1 */
}
/* Disable I2C clock */
__HAL_RCC_I2C4_CLK_DISABLE();
/* Disable NVIC for I2C */
HAL_NVIC_DisableIRQ(I2C4_ER_IRQn);
HAL_NVIC_DisableIRQ(I2C4_EV_IRQn);
}
}
/**
* @brief This function is executed in case of error occurrence.
* @retval None

90
bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Src/stm32mp1xx_it.c
View File

@ -57,6 +57,12 @@
/* External variables --------------------------------------------------------*/
extern IPCC_HandleTypeDef hipcc;
extern LPTIM_HandleTypeDef hlptim1;
extern LPTIM_HandleTypeDef hlptim2;
extern LPTIM_HandleTypeDef hlptim3;
extern LPTIM_HandleTypeDef hlptim4;
extern LPTIM_HandleTypeDef hlptim5;
extern WWDG_HandleTypeDef hwwdg1;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
@ -197,6 +203,34 @@ void SysTick_Handler(void)
/* please refer to the startup file (startup_stm32mp1xx.s). */
/******************************************************************************/
/**
* @brief This function handles Window watchdog interrupt.
*/
void WWDG1_IRQHandler(void)
{
/* USER CODE BEGIN WWDG1_IRQn 0 */
/* USER CODE END WWDG1_IRQn 0 */
HAL_WWDG_IRQHandler(&hwwdg1);
/* USER CODE BEGIN WWDG1_IRQn 1 */
/* USER CODE END WWDG1_IRQn 1 */
}
/**
* @brief This function handles LPTIM1 global interrupt.
*/
void LPTIM1_IRQHandler(void)
{
/* USER CODE BEGIN LPTIM1_IRQn 0 */
/* USER CODE END LPTIM1_IRQn 0 */
HAL_LPTIM_IRQHandler(&hlptim1);
/* USER CODE BEGIN LPTIM1_IRQn 1 */
/* USER CODE END LPTIM1_IRQn 1 */
}
/**
* @brief This function handles IPCC RX1 occupied interrupt.
*/
@ -225,6 +259,62 @@ void IPCC_TX1_IRQHandler(void)
/* USER CODE END IPCC_TX1_IRQn 1 */
}
/**
* @brief This function handles LPTIM2 global interrupt.
*/
void LPTIM2_IRQHandler(void)
{
/* USER CODE BEGIN LPTIM2_IRQn 0 */
/* USER CODE END LPTIM2_IRQn 0 */
HAL_LPTIM_IRQHandler(&hlptim2);
/* USER CODE BEGIN LPTIM2_IRQn 1 */
/* USER CODE END LPTIM2_IRQn 1 */
}
/**
* @brief This function handles LPTIM3 global interrupt.
*/
void LPTIM3_IRQHandler(void)
{
/* USER CODE BEGIN LPTIM3_IRQn 0 */
/* USER CODE END LPTIM3_IRQn 0 */
HAL_LPTIM_IRQHandler(&hlptim3);
/* USER CODE BEGIN LPTIM3_IRQn 1 */
/* USER CODE END LPTIM3_IRQn 1 */
}
/**
* @brief This function handles LPTIM4 global interrupt.
*/
void LPTIM4_IRQHandler(void)
{
/* USER CODE BEGIN LPTIM4_IRQn 0 */
/* USER CODE END LPTIM4_IRQn 0 */
HAL_LPTIM_IRQHandler(&hlptim4);
/* USER CODE BEGIN LPTIM4_IRQn 1 */
/* USER CODE END LPTIM4_IRQn 1 */
}
/**
* @brief This function handles LPTIM5 global interrupt.
*/
void LPTIM5_IRQHandler(void)
{
/* USER CODE BEGIN LPTIM5_IRQn 0 */
/* USER CODE END LPTIM5_IRQn 0 */
HAL_LPTIM_IRQHandler(&hlptim5);
/* USER CODE BEGIN LPTIM5_IRQn 1 */
/* USER CODE END LPTIM5_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

176
bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/STM32MP157-DK1.ioc
View File

@ -1,17 +1,17 @@
#MicroXplorer Configuration settings - do not modify
ADC2.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_6
ADC2.ClockPrescaler=ADC_CLOCK_ASYNC_DIV4
ADC2.ClockPrescaler=ADC_CLOCK_ASYNC_DIV2
ADC2.IPParameters=Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,NbrOfConversionFlag,Resolution,ClockPrescaler
ADC2.NbrOfConversionFlag=1
ADC2.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE
ADC2.Rank-2\#ChannelRegularConversion=1
ADC2.Resolution=ADC_RESOLUTION_12B
ADC2.Resolution=ADC_RESOLUTION_16B
ADC2.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
BootLoader.IPs=RCC,DDR
BootROM.IPs=RCC
CortexA7NS.IPs=DDR\:I,RCC\:I,RTC\:I,BSEC,ETZPC,GIC,TAMP\:I,DMA\:I,PWR,SPI2\:I,I2S2\:I,IPCC\:I,TIM3\:I,VREFBUF\:I,SAI4\:I,HSEM\:I,RNG1,DMA1\:I,MDMA_A7NS\:I
CortexA7S.IPs=BSEC\:I,ETZPC\:I,GIC\:I,RCC,PWR\:I,RNG1\:I,RTC,DDR,HSEM,TAMP,MDMA_A7S\:I
CortexM4.IPs=IPCC,HSEM,RCC,NVIC\:I,ETZPC,FREERTOS\:I,DMA,PWR,SYS\:I,TIM4\:I,TIM14\:I,TIM16\:I,TIM17\:I,SPI5\:I,UART4\:I,UART5\:I,USART2\:I,ADC1\:I,ADC2\:I,DMA2\:I
CortexM4.IPs=IPCC,HSEM,RCC,NVIC\:I,ETZPC,FREERTOS\:I,DMA,PWR,SYS\:I,TIM4\:I,TIM14\:I,TIM16\:I,TIM17\:I,SPI5\:I,UART4\:I,UART5\:I,USART2\:I,ADC1\:I,ADC2\:I,USART3\:I,DAC1\:I,WWDG1\:I,LPTIM1\:I,LPTIM2\:I,LPTIM3\:I,LPTIM4\:I,LPTIM5\:I,DMA2\:I
DDR.ADDRMAP1=0x00070707
DDR.ADDRMAP3=0x1F000000
DDR.ADDRMAP5=0x06060606
@ -325,30 +325,47 @@ Mcu.ContextNb=5
Mcu.Family=STM32MP1
Mcu.IP0=ADC2
Mcu.IP1=BSEC
Mcu.IP10=SPI5
Mcu.IP11=SYS
Mcu.IP12=TAMP
Mcu.IP13=TIM4
Mcu.IP14=TIM14
Mcu.IP15=TIM16
Mcu.IP16=TIM17
Mcu.IP17=UART4
Mcu.IP18=VREFBUF
Mcu.IP2=DDR
Mcu.IP3=GIC
Mcu.IP4=HSEM
Mcu.IP5=IPCC
Mcu.IP6=NVIC
Mcu.IP7=PWR
Mcu.IP8=RCC
Mcu.IP9=RTC
Mcu.IPNb=19
Mcu.IP10=LPTIM4
Mcu.IP11=LPTIM5
Mcu.IP12=NVIC
Mcu.IP13=PWR
Mcu.IP14=RCC
Mcu.IP15=RTC
Mcu.IP16=SPI5
Mcu.IP17=SYS
Mcu.IP18=TAMP
Mcu.IP19=TIM4
Mcu.IP2=DAC1
Mcu.IP20=TIM14
Mcu.IP21=TIM16
Mcu.IP22=TIM17
Mcu.IP23=UART4
Mcu.IP24=USART3
Mcu.IP25=VREFBUF
Mcu.IP26=WWDG1
Mcu.IP3=DDR
Mcu.IP4=GIC
Mcu.IP5=HSEM
Mcu.IP6=IPCC
Mcu.IP7=LPTIM1
Mcu.IP8=LPTIM2
Mcu.IP9=LPTIM3
Mcu.IPNb=27
Mcu.Name=STM32MP157AACx
Mcu.Package=TFBGA361
Mcu.Pin0=PH5
Mcu.Pin1=PF2
Mcu.Pin10=DDR_DQ3
Mcu.Pin100=VP_MDMA_VS_MDMA_A7NS_8
Mcu.Pin100=VP_TAMP_VS_TAMP_Activate
Mcu.Pin101=VP_TIM4_VS_ClockSourceINT
Mcu.Pin102=VP_TIM14_VS_ClockSourceINT
Mcu.Pin103=VP_TIM16_VS_ClockSourceINT
Mcu.Pin104=VP_TIM17_VS_ClockSourceINT
Mcu.Pin105=VP_VREFBUF_VS_VREFBUF
Mcu.Pin106=VP_WWDG1_VS_WWDG
Mcu.Pin107=VP_DMA_VS_DMA1_A7NS
Mcu.Pin108=VP_DMA_VS_DMA2_M4
Mcu.Pin109=VP_MDMA_VS_MDMA_A7NS_8
Mcu.Pin11=DDR_DQ0
Mcu.Pin12=DDR_A13
Mcu.Pin13=DDR_DQ1
@ -404,49 +421,49 @@ Mcu.Pin58=DDR_DQ9
Mcu.Pin59=DDR_DQS1P
Mcu.Pin6=PB7
Mcu.Pin60=DDR_DQS1N
Mcu.Pin61=DDR_A4
Mcu.Pin62=DDR_DQM1
Mcu.Pin63=PG1
Mcu.Pin64=PH7
Mcu.Pin65=DDR_A6
Mcu.Pin66=DDR_DQ11
Mcu.Pin67=DDR_DQ14
Mcu.Pin68=DDR_DQ12
Mcu.Pin69=PG11
Mcu.Pin61=PA4
Mcu.Pin62=DDR_A4
Mcu.Pin63=DDR_DQM1
Mcu.Pin64=PG1
Mcu.Pin65=PH7
Mcu.Pin66=DDR_A6
Mcu.Pin67=DDR_DQ11
Mcu.Pin68=DDR_DQ14
Mcu.Pin69=DDR_DQ12
Mcu.Pin7=PE4
Mcu.Pin70=PG9
Mcu.Pin71=PB2
Mcu.Pin72=PA10
Mcu.Pin73=DDR_ATO
Mcu.Pin74=DDR_A8
Mcu.Pin75=DDR_DQ15
Mcu.Pin76=PF9
Mcu.Pin77=PD13
Mcu.Pin78=PA0
Mcu.Pin79=PF7
Mcu.Pin70=PB10
Mcu.Pin71=PG11
Mcu.Pin72=PG9
Mcu.Pin73=PB2
Mcu.Pin74=PA10
Mcu.Pin75=DDR_ATO
Mcu.Pin76=DDR_A8
Mcu.Pin77=DDR_DQ15
Mcu.Pin78=PF9
Mcu.Pin79=PD13
Mcu.Pin8=DDR_RESETN
Mcu.Pin80=PF14
Mcu.Pin81=PA6
Mcu.Pin82=PD11
Mcu.Pin83=DDR_VREF
Mcu.Pin84=VP_BSEC_VS_BSEC
Mcu.Pin85=VP_DDR_DDR3
Mcu.Pin86=VP_DDR_DDR_16_bits
Mcu.Pin87=VP_DDR_DDR3_16_4Gb
Mcu.Pin88=VP_HSEM_VS_HSEM
Mcu.Pin89=VP_IPCC_VS_IPCC
Mcu.Pin80=PA0
Mcu.Pin81=PF7
Mcu.Pin82=PF14
Mcu.Pin83=PB12
Mcu.Pin84=PA6
Mcu.Pin85=PD11
Mcu.Pin86=DDR_VREF
Mcu.Pin87=VP_BSEC_VS_BSEC
Mcu.Pin88=VP_DDR_DDR3
Mcu.Pin89=VP_DDR_DDR_16_bits
Mcu.Pin9=DDR_A7
Mcu.Pin90=VP_RTC_VS_RTC_Activate
Mcu.Pin91=VP_SYS_VS_Systick
Mcu.Pin92=VP_TAMP_VS_TAMP_Activate
Mcu.Pin93=VP_TIM4_VS_ClockSourceINT
Mcu.Pin94=VP_TIM14_VS_ClockSourceINT
Mcu.Pin95=VP_TIM16_VS_ClockSourceINT
Mcu.Pin96=VP_TIM17_VS_ClockSourceINT
Mcu.Pin97=VP_VREFBUF_VS_VREFBUF
Mcu.Pin98=VP_DMA_VS_DMA1_A7NS
Mcu.Pin99=VP_DMA_VS_DMA2_M4
Mcu.PinsNb=101
Mcu.Pin90=VP_DDR_DDR3_16_4Gb
Mcu.Pin91=VP_HSEM_VS_HSEM
Mcu.Pin92=VP_IPCC_VS_IPCC
Mcu.Pin93=VP_LPTIM1_VS_LPTIM_counterModeInternalClock
Mcu.Pin94=VP_LPTIM2_VS_LPTIM_counterModeInternalClock
Mcu.Pin95=VP_LPTIM3_VS_LPTIM_counterModeInternalClock
Mcu.Pin96=VP_LPTIM4_VS_LPTIM_counterModeInternalClock
Mcu.Pin97=VP_LPTIM5_VS_LPTIM_counterModeInternalClock
Mcu.Pin98=VP_RTC_VS_RTC_Activate
Mcu.Pin99=VP_SYS_VS_Systick
Mcu.PinsNb=110
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32MP157AACx
@ -458,6 +475,11 @@ NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.IPCC_RX1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.IPCC_TX1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.LPTIM1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.LPTIM2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.LPTIM3_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.LPTIM4_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.LPTIM5_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
@ -465,6 +487,7 @@ NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.WWDG1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
PA0.Locked=true
PA0.Mode=WakeUp1
PA0.Signal=PWR_WKUP1
@ -484,10 +507,17 @@ PA15.GPIOParameters=GPIO_Label
PA15.GPIO_Label=BL_CTRL [STLD40DPUR_EN]
PA15.Locked=true
PA15.Signal=GPIO_Output
PA4.Signal=COMP_DAC11_group
PA6.GPIOParameters=GPIO_Label
PA6.GPIO_Label=ETH_MDINT [RTL8211F_INT]
PA6.Locked=true
PA6.Signal=GPIO_Input
PB10.Locked=true
PB10.Mode=Asynchronous
PB10.Signal=USART3_TX
PB12.Locked=true
PB12.Mode=Asynchronous
PB12.Signal=USART3_RX
PB2.GPIOParameters=GPIO_Label
PB2.GPIO_Label=STLINK_TX [STM32F103CBT6_PA2]
PB2.Locked=true
@ -587,7 +617,7 @@ ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32MP157AACx
ProjectManager.DeviceTreeLocation=D\:\\3_work\\GitRepositories\\stm32-mp1\\board\\CubeMX_Config\\STM32MP157-DK1\\CA7\\DeviceTree\\
ProjectManager.DeviceTreeLocation=D\:\\3_work\\GitRepositories\\rt-thread\\bsp\\stm32\\stm32mp157a-st-discovery\\board\\CubeMX_Config\\STM32MP157-DK1\\CA7\\DeviceTree\\
ProjectManager.FirmwarePackage=STM32Cube FW_MP1 V1.2.0
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
@ -605,7 +635,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=EWARM V8.32
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_IPCC_Init-IPCC-false-HAL-true,4-MX_SPI5_Init-SPI5-false-HAL-true,5-MX_TIM4_Init-TIM4-false-HAL-true,6-MX_TIM14_Init-TIM14-false-HAL-true,7-MX_TIM16_Init-TIM16-false-HAL-true,8-MX_TIM17_Init-TIM17-false-HAL-true,9-MX_UART4_Init-UART4-false-HAL-true,10-MX_ADC1_Init-ADC1-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_IPCC_Init-IPCC-false-HAL-true,4-MX_SPI5_Init-SPI5-false-HAL-true,5-MX_TIM4_Init-TIM4-false-HAL-true,6-MX_TIM14_Init-TIM14-false-HAL-true,7-MX_TIM16_Init-TIM16-false-HAL-true,8-MX_TIM17_Init-TIM17-false-HAL-true,9-MX_UART4_Init-UART4-false-HAL-true,10-MX_ADC2_Init-ADC2-false-HAL-true,11-MX_DAC1_Init-DAC1-false-HAL-true,12-MX_LPTIM1_Init-LPTIM1-false-HAL-true,13-MX_LPTIM2_Init-LPTIM2-false-HAL-true,14-MX_LPTIM3_Init-LPTIM3-false-HAL-true,15-MX_LPTIM4_Init-LPTIM4-false-HAL-true,16-MX_LPTIM5_Init-LPTIM5-false-HAL-true,17-MX_USART3_UART_Init-USART3-false-HAL-true,18-MX_WWDG1_Init-WWDG1-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
RCC.ADCCLockSelection=RCC_ADCCLKSOURCE_PER
RCC.ADCFreq_Value=24000000
RCC.AHB1234Freq_Value=208877929.6875
@ -762,6 +792,8 @@ RCC.VCOInput1Freq_Value=8000000
RCC.VCOInput2Freq_Value=8000000
RCC.VCOInput3Freq_Value=12000000
RCC.VCOInput4Freq_Value=6000000
SH.COMP_DAC11_group.0=DAC1_OUT1,DAC_OUT1
SH.COMP_DAC11_group.ConfNb=1
SH.S_TIM4_CH2.0=TIM4_CH2,PWM Generation2 CH2
SH.S_TIM4_CH2.ConfNb=1
SPI5.CalculateBaudRate=26.10974 MBits/s
@ -771,6 +803,8 @@ SPI5.Mode=SPI_MODE_MASTER
SPI5.VirtualType=VM_MASTER
TIM4.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
TIM4.IPParameters=Channel-PWM Generation2 CH2
USART3.IPParameters=VirtualMode-Asynchronous
USART3.VirtualMode-Asynchronous=VM_ASYNC
VP_BSEC_VS_BSEC.Mode=BSEC_Activate
VP_BSEC_VS_BSEC.Signal=BSEC_VS_BSEC
VP_DDR_DDR3.Mode=DDR3
@ -787,6 +821,16 @@ VP_HSEM_VS_HSEM.Mode=HSEM_Activate
VP_HSEM_VS_HSEM.Signal=HSEM_VS_HSEM
VP_IPCC_VS_IPCC.Mode=IPCC_Activate
VP_IPCC_VS_IPCC.Signal=IPCC_VS_IPCC
VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Signal=LPTIM1_VS_LPTIM_counterModeInternalClock
VP_LPTIM2_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
VP_LPTIM2_VS_LPTIM_counterModeInternalClock.Signal=LPTIM2_VS_LPTIM_counterModeInternalClock
VP_LPTIM3_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
VP_LPTIM3_VS_LPTIM_counterModeInternalClock.Signal=LPTIM3_VS_LPTIM_counterModeInternalClock
VP_LPTIM4_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
VP_LPTIM4_VS_LPTIM_counterModeInternalClock.Signal=LPTIM4_VS_LPTIM_counterModeInternalClock
VP_LPTIM5_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
VP_LPTIM5_VS_LPTIM_counterModeInternalClock.Signal=LPTIM5_VS_LPTIM_counterModeInternalClock
VP_MDMA_VS_MDMA_A7NS_8.Mode=8\:8
VP_MDMA_VS_MDMA_A7NS_8.Signal=MDMA_VS_MDMA_A7NS_8
VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
@ -805,5 +849,9 @@ VP_TIM4_VS_ClockSourceINT.Mode=Internal
VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT
VP_VREFBUF_VS_VREFBUF.Mode=VREFBUF_Activate
VP_VREFBUF_VS_VREFBUF.Signal=VREFBUF_VS_VREFBUF
VP_WWDG1_VS_WWDG.Mode=WWDG_Activate
VP_WWDG1_VS_WWDG.Signal=WWDG1_VS_WWDG
WWDG1.IPParameters=Prescaler
WWDG1.Prescaler=WWDG_PRESCALER_8
board=STM32MP157A-DK1
boardIOC=true

125
bsp/stm32/stm32mp157a-st-discovery/board/Kconfig
View File

@ -22,13 +22,31 @@ menu "On-chip Peripheral Drivers"
bool "Enable GPIO"
select RT_USING_PIN
default y
config BSP_USING_WWDG
bool "Enable WWDG"
select RT_USING_WWDG
default n
menuconfig BSP_USING_UART
bool "Enable UART"
select RT_USING_SERIAL
default y
if BSP_USING_UART
config BSP_USING_UART3
bool "Enable UART3"
default y
config BSP_UART3_RX_USING_DMA
bool "Enable UART3 RX DMA"
depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
default n
config BSP_UART3_TX_USING_DMA
bool "Enable UART3 TX DMA"
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART4
bool "Enable UART4"
default y
@ -43,11 +61,112 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART5
bool "Enable UART5"
endif
menuconfig BSP_USING_TIM
bool "Enable timer"
default n
select RT_USING_HWTIMER
if BSP_USING_TIM
config BSP_USING_TIM14
bool "Enable TIM14"
default n
config BSP_USING_TIM16
bool "Enable TIM16"
default n
config BSP_USING_TIM17
bool "Enable TIM17"
default n
endif
menuconfig BSP_USING_LPTIM
bool "Enable lptimer"
default n
select RT_USING_LPTIMER
if BSP_USING_LPTIM
config BSP_USING_LPTIM1
bool "Enable LPTIM1"
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
menuconfig BSP_USING_PWM
bool "Enable pwm"
default n
select RT_USING_PWM
if BSP_USING_PWM
menuconfig BSP_USING_PWM4
bool "Enable timer4 output pwm"
default n
if BSP_USING_PWM4
config BSP_USING_PWM4_CH2
bool "Enable PWM4 channel2"
default n
endif
endif
menuconfig BSP_USING_ADC
bool "Enable ADC"
default n
select RT_USING_ADC
if BSP_USING_ADC
config BSP_USING_ADC2
bool "Enable ADC2"
default n
endif
menuconfig BSP_USING_DAC
bool "Enable DAC"
default n
select RT_USING_DAC
if BSP_USING_DAC
config BSP_USING_DAC1
bool "Enable DAC1"
default n
endif
menuconfig BSP_USING_I2C1
bool "Enable I2C1 BUS (software simulation)"
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
default n
if BSP_USING_I2C1
comment "Notice: PD7 --> 55; PG15 --> 111"
config BSP_I2C1_SCL_PIN
int "I2C1 scl pin number"
range 1 176
default 55
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 1 176
default 111
endif
menuconfig BSP_USING_SPI
bool "Enable SPI BUS"
select RT_USING_SPI
default n
if BSP_USING_SPI
config BSP_USING_SPI5
bool "Enable SPI5 BUS"
default n
config BSP_SPI5_TX_USING_DMA
bool "Enable SPI5 TX DMA"
depends on BSP_USING_SPI5
default n
config BSP_SPI5_RX_USING_DMA
bool "Enable SPI5 RX DMA"
depends on BSP_USING_SPI5
select BSP_SPI5_TX_USING_DMA
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu

14
bsp/stm32/stm32mp157a-st-discovery/board/SConscript
View File

@ -13,6 +13,20 @@ CubeMX_Config/Common/System/system_stm32mp1xx.c
CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c
''')
if GetDepend(['BSP_USING_ADC']):
src += Glob('ports/drv_hard_i2c.c')
src += Glob('ports/stpmic.c')
if GetDepend(['BSP_USING_DAC']):
src += Glob('ports/drv_hard_i2c.c')
src += Glob('ports/stpmic.c')
if GetDepend(['BSP_USING_WWDG']):
src += Glob('ports/drv_wwdg.c')
if GetDepend(['BSP_USING_LPTIM']):
src += Glob('ports/drv_lptim.c')
path = [cwd]
path += [cwd + '/CubeMX_Config/CM4/Inc']
path += [cwd + '/ports']

124
bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_hard_i2c.c Normal file
View File

@ -0,0 +1,124 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#include <board.h>
#include "drv_hard_i2c.h"
//#define DRV_DEBUG
#define LOG_TAG "drv.hardi2c"
#include <drv_log.h>
I2C_HandleTypeDef hI2c4;
int32_t BSP_I2C4_Init(void)
{
int32_t status = RT_EOK;
if (HAL_I2C_GetState(&hI2c4) == HAL_I2C_STATE_RESET)
{
if (MX_I2C4_Init(&hI2c4) != HAL_OK)
{
status = -RT_EBUSY;
}
/* Init the I2C Msp */
if (HAL_I2C_Init(&hI2c4) != HAL_OK)
{
LOG_D("I2C4 Init Error!\n");
status = -RT_EBUSY;
}
}
return status;
}
int32_t BSP_I2C4_DeInit(void)
{
int32_t status = RT_EOK;
HAL_I2C_MspDeInit(&hI2c4);
/* Init the I2C */
if (HAL_I2C_DeInit(&hI2c4) != HAL_OK)
{
status = -RT_EEMPTY;
}
return status;
}
HAL_StatusTypeDef MX_I2C4_Init(I2C_HandleTypeDef *hI2c)
{
hI2c4.Instance = I2C4;
hI2c->Init.Timing = I2C4_TIMING;
hI2c->Init.OwnAddress1 = STPMU1_I2C_ADDRESS;
hI2c->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hI2c->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hI2c->Init.OwnAddress2 = 0;
hI2c->Init.OwnAddress2Masks = I2C_OA2_NOMASK;
hI2c->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hI2c->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
return HAL_I2C_Init(hI2c);
}
int32_t BSP_I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length);
}
int32_t BSP_I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length);
}
int32_t BSP_I2C4_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length);
}
int32_t BSP_I2C4_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length);
}
int32_t BSP_I2C4_IsReady(uint16_t DevAddr, uint32_t Trials)
{
int32_t status = RT_EOK;
if(HAL_I2C_IsDeviceReady(&hI2c4, DevAddr, Trials, 1000) != HAL_OK)
{
status = -RT_EBUSY;
}
return status;
}
static int32_t I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
{
int32_t status = -RT_EIO;
if(HAL_I2C_Mem_Write(&hI2c4, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
{
status = RT_EOK;
}
return status;
}
static int32_t I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
{
int32_t status = -RT_EIO;
if (HAL_I2C_Mem_Read(&hI2c4, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
{
status = RT_EOK;
}
return status;
}

48
bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_hard_i2c.h Normal file
View File

@ -0,0 +1,48 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#ifndef __DRV_HARD_I2C_H__
#define __DRV_HARD_I2C_H__
/* Includes ------------------------------------------------------------------*/
#include "stm32mp1xx_hal.h"
#ifdef __cplusplus
extern "C" {
#endif
#define STPMU1_I2C_ADDRESS ((0x33 & 0x7F) << 1)
#ifndef I2C_SPEED
#define I2C_SPEED ((uint32_t)100000)
#endif /* I2C_SPEED */
#ifndef I2C4_TIMING
#define I2C4_TIMING ((uint32_t)0x10805E89)
#endif
static int32_t I2C4_WriteReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
static int32_t I2C4_ReadReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_Init(void);
int32_t BSP_I2C4_DeInit(void);
int32_t BSP_I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_IsReady(uint16_t DevAddr, uint32_t Trials);
HAL_StatusTypeDef MX_I2C4_Init(I2C_HandleTypeDef *hI2c);
#ifdef __cplusplus
}
#endif
#endif

128
bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_lptim.c Normal file
View File

@ -0,0 +1,128 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-19 thread-liu first version
*/
#include <board.h>
#ifdef BSP_USING_LPTIM
#include "drv_config.h"
#include <string.h>
#include <stdlib.h>
//#define DRV_DEBUG
#define LOG_TAG "drv.lptimer"
#include <drv_log.h>
LPTIM_HandleTypeDef hlptim1;
void LPTIM1_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_LPTIM_IRQHandler(&hlptim1);
/* leave interrupt */
rt_interrupt_leave();
}
void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
{
if(hlptim->Instance == LPTIM1)
{
rt_kprintf("hello rt-thread!\n");
}
}
static int lptim_control(uint8_t pre_value)
{
if(pre_value > 7)
{
pre_value = 7;
}
hlptim1.Instance->CFGR &= ~(7 << 9); /* clear PRESC[2:0] */
hlptim1.Instance->CFGR |= pre_value << 9; /* set PRESC[2:0] */
return RT_EOK;
}
/**
* This function initialize the lptim
*/
static int lptim_init(void)
{
hlptim1.Instance = LPTIM1;
hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim1.Init.UltraLowPowerClock.Polarity = LPTIM_CLOCKPOLARITY_RISING;
hlptim1.Init.UltraLowPowerClock.SampleTime = LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION;
hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim1.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim1.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim1.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
hlptim1.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
hlptim1.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
if (HAL_LPTIM_Init(&hlptim1) != HAL_OK)
{
LOG_D("LPTIM Init Error!\n");
return -RT_ERROR;
}
/* ### Start counting in interrupt mode ############################# */
if (HAL_LPTIM_Counter_Start_IT(&hlptim1, 5000) != HAL_OK)
{
LOG_D("LPTIM Start Counting Error!\n");
return -RT_ERROR;
}
return RT_EOK;
}
static int lptim_deinit()
{
if (HAL_LPTIM_DeInit(&hlptim1) != HAL_OK)
{
LOG_D("LPTIM Deinit Error!\n");
return -RT_ERROR;
}
return RT_EOK;
}
static int lptim_sample(int argc, char *argv[])
{
if (argc > 1)
{
if (!strcmp(argv[1], "run"))
{
lptim_init();
}
else if (!strcmp(argv[1], "stop"))
{
lptim_deinit();
}
else if (!strcmp(argv[1], "set"))
{
if (argc > 2)
{
lptim_control(atoi(argv[2]));
}
}
}
else
{
rt_kprintf("Usage:\n");
rt_kprintf("lptim_sample run - open lptim, shell will printf 'hello rt-thread'\n");
rt_kprintf("lptim_sample set - set the lptim prescaler, lptim_sample set [0 - 7]\n");
}
return RT_EOK;
}
MSH_CMD_EXPORT(lptim_sample, low power timer sample);
#endif

103
bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_wwdg.c Normal file
View File

@ -0,0 +1,103 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#include <board.h>
#if defined(BSP_USING_WWDG)
#include "drv_config.h"
#include <string.h>
#include <stdlib.h>
//#define DRV_DEBUG
#define LOG_TAG "drv.wwg"
#include <drv_log.h>
#define LED5_PIN GET_PIN(A, 14)
WWDG_HandleTypeDef hwwdg1;
void WWDG1_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_WWDG_IRQHandler(&hwwdg1);
/* leave interrupt */
rt_interrupt_leave();
}
void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg)
{
static unsigned char led_value = 0x00;
led_value = !led_value;
if(hwwdg->Instance==WWDG1)
{
HAL_WWDG_Refresh(&hwwdg1);
rt_pin_write(LED5_PIN, led_value);
}
}
static void wwdg_init()
{
rt_pin_mode(LED5_PIN, PIN_MODE_OUTPUT);
hwwdg1.Instance = WWDG1;
hwwdg1.Init.Prescaler = WWDG_PRESCALER_8;
hwwdg1.Init.Window = 0X5F;
hwwdg1.Init.Counter = 0x7F;
hwwdg1.Init.EWIMode = WWDG_EWI_ENABLE;
if (HAL_WWDG_Init(&hwwdg1) != HAL_OK)
{
Error_Handler();
}
}
static void wwdg_control(uint8_t pre_value)
{
if(pre_value > 7)
{
pre_value = 7;
}
hwwdg1.Instance->CFR &= ~(7 << 11); /* clear WDGTB[2:0] */
hwwdg1.Instance->CFR |= pre_value << 11; /* set WDGTB[2:0] */
}
static int wwdg_sample(int argc, char *argv[])
{
if (argc > 1)
{
if (!strcmp(argv[1], "run"))
{
wwdg_init();
}
else if (!strcmp(argv[1], "set"))
{
if (argc > 2)
{
wwdg_control(atoi(argv[2]));
}
}
}
else
{
rt_kprintf("Usage:\n");
rt_kprintf("wwdg_sample run - open wwdg, when feed wwdg in wwdg irq, the LD5 will blink\n");
rt_kprintf("wwdg_sample set - set the wwdg prescaler, wwdg_sample set [0 - 7]\n");
}
return RT_EOK;
}
MSH_CMD_EXPORT(wwdg_sample, window watch dog sample);
#endif

1225
bsp/stm32/stm32mp157a-st-discovery/board/ports/stpmic.c Normal file
View File

File diff suppressed because it is too large Load Diff

315
bsp/stm32/stm32mp157a-st-discovery/board/ports/stpmic.h Normal file
View File

@ -0,0 +1,315 @@
/**
******************************************************************************
* @file stm32mp15xx__stpmic1.h
* @author MCD Application Team
* @brief stpmu driver functions used for ST internal validation
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
*
******************************************************************************
*/
#ifndef __STPMIC_H__
#define __STPMIC_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32mp1xx_hal.h"
/* Exported types ------------------------------------------------------------*/
typedef enum
{
STPMU1_BUCK1=1,
STPMU1_BUCK2,
STPMU1_BUCK3,
STPMU1_BUCK4,
STPMU1_LDO1,
STPMU1_LDO2,
STPMU1_LDO3,
STPMU1_LDO4,
STPMU1_LDO5,
STPMU1_LDO6,
STPMU1_VREFDDR,
}PMIC_RegulId_TypeDef;
/* IRQ definitions */
typedef enum {
/* Interrupt Register 1 (0x50 for latch) */
IT_SWOUT_R,
IT_SWOUT_F,
IT_VBUS_OTG_R,
IT_VBUS_OTG_F,
IT_WAKEUP_R,
IT_WAKEUP_F,
IT_PONKEY_R,
IT_PONKEY_F,
/* Interrupt Register 2 (0x51 for latch) */
IT_OVP_BOOST,
IT_OCP_BOOST,
IT_OCP_SWOUT,
IT_OCP_OTG,
IT_CURLIM_BUCK4,
IT_CURLIM_BUCK3,
IT_CURLIM_BUCK2,
IT_CURLIM_BUCK1,
/* Interrupt Register 3 (0x52 for latch) */
IT_SHORT_SWOUT,
IT_SHORT_SWOTG,
IT_CURLIM_LDO6,
IT_CURLIM_LDO5,
IT_CURLIM_LDO4,
IT_CURLIM_LDO3,
IT_CURLIM_LDO2,
IT_CURLIM_LDO1,
/* Interrupt Register 3 (0x52 for latch) */
IT_SWIN_R,
IT_SWIN_F,
IT_RESERVED_1,
IT_RESERVED_2,
IT_VINLOW_R,
IT_VINLOW_F,
IT_TWARN_R,
IT_TWARN_F,
IRQ_NR,
} PMIC_IRQn;
/**
* @}
*/
/** @defgroup STM32MP15XX_EVAL_STPMU_Exported_Constants Exported Constants
* @{
*/
/* Exported constants --------------------------------------------------------*/
#define BIT(_x) (1<<(_x))
#define STM32_PMIC_NUM_IRQ_REGS 4
#define TURN_ON_REG 0x1
#define TURN_OFF_REG 0x2
#define ICC_LDO_TURN_OFF_REG 0x3
#define ICC_BUCK_TURN_OFF_REG 0x4
#define RESET_STATUS_REG 0x5
#define VERSION_STATUS_REG 0x6
#define MAIN_CONTROL_REG 0x10
#define PADS_PULL_REG 0x11
#define BUCK_PULL_DOWN_REG 0x12
#define LDO14_PULL_DOWN_REG 0x13
#define LDO56_PULL_DOWN_REG 0x14
#define VIN_CONTROL_REG 0x15
#define PONKEY_TIMER_REG 0x16
#define MASK_RANK_BUCK_REG 0x17
#define MASK_RESET_BUCK_REG 0x18
#define MASK_RANK_LDO_REG 0x19
#define MASK_RESET_LDO_REG 0x1A
#define WATCHDOG_CONTROL_REG 0x1B
#define WATCHDOG_TIMER_REG 0x1C
#define BUCK_ICC_TURNOFF_REG 0x1D
#define LDO_ICC_TURNOFF_REG 0x1E
#define BUCK_APM_CONTROL_REG 0x1F
#define BUCK1_CONTROL_REG 0x20
#define BUCK2_CONTROL_REG 0x21
#define BUCK3_CONTROL_REG 0x22
#define BUCK4_CONTROL_REG 0x23
#define VREF_DDR_CONTROL_REG 0x24
#define LDO1_CONTROL_REG 0x25
#define LDO2_CONTROL_REG 0x26
#define LDO3_CONTROL_REG 0x27
#define LDO4_CONTROL_REG 0x28
#define LDO5_CONTROL_REG 0x29
#define LDO6_CONTROL_REG 0x2A
#define BUCK1_PWRCTRL_REG 0x30
#define BUCK2_PWRCTRL_REG 0x31
#define BUCK3_PWRCTRL_REG 0x32
#define BUCK4_PWRCTRL_REG 0x33
#define VREF_DDR_PWRCTRL_REG 0x34
#define LDO1_PWRCTRL_REG 0x35
#define LDO2_PWRCTRL_REG 0x36
#define LDO3_PWRCTRL_REG 0x37
#define LDO4_PWRCTRL_REG 0x38
#define LDO5_PWRCTRL_REG 0x39
#define LDO6_PWRCTRL_REG 0x3A
#define FREQUENCY_SPREADING_REG 0x3B
#define USB_CONTROL_REG 0x40
#define ITLATCH1_REG 0x50
#define ITLATCH2_REG 0x51
#define ITLATCH3_REG 0x52
#define ITLATCH4_REG 0x53
#define ITSETLATCH1_REG 0x60
#define ITSETLATCH2_REG 0x61
#define ITSETLATCH3_REG 0x62
#define ITSETLATCH4_REG 0x63
#define ITCLEARLATCH1_REG 0x70
#define ITCLEARLATCH2_REG 0x71
#define ITCLEARLATCH3_REG 0x72
#define ITCLEARLATCH4_REG 0x73
#define ITMASK1_REG 0x80
#define ITMASK2_REG 0x81
#define ITMASK3_REG 0x82
#define ITMASK4_REG 0x83
#define ITSETMASK1_REG 0x90
#define ITSETMASK2_REG 0x91
#define ITSETMASK3_REG 0x92
#define ITSETMASK4_REG 0x93
#define ITCLEARMASK1_REG 0xA0
#define ITCLEARMASK2_REG 0xA1
#define ITCLEARMASK3_REG 0xA2
#define ITCLEARMASK4_REG 0xA3
#define ITSOURCE1_REG 0xB0
#define ITSOURCE2_REG 0xB1
#define ITSOURCE3_REG 0xB2
#define ITSOURCE4_REG 0xB3
#define LDO_VOLTAGE_MASK 0x7C
#define BUCK_VOLTAGE_MASK 0xFC
#define LDO_BUCK_VOLTAGE_SHIFT 2
#define LDO_ENABLE_MASK 0x01
#define BUCK_ENABLE_MASK 0x01
#define BUCK_HPLP_ENABLE_MASK 0x02
#define LDO_HPLP_ENABLE_MASK 0x02
#define LDO_BUCK_HPLP_SHIFT 1
#define LDO_BUCK_RANK_MASK 0x01
#define LDO_BUCK_RESET_MASK 0x01
#define LDO_BUCK_PULL_DOWN_MASK 0x03
/* Main PMIC Control Register
* MAIN_CONTROL_REG
* Address : 0x10
* */
#define ICC_EVENT_ENABLED BIT(4)
#define PWRCTRL_POLARITY_HIGH BIT(3)
#define PWRCTRL_PIN_VALID BIT(2)
#define RESTART_REQUEST_ENABLED BIT(1)
#define SOFTWARE_SWITCH_OFF_ENABLED BIT(0)
/* Main PMIC PADS Control Register
* PADS_PULL_REG
* Address : 0x11
* */
#define WAKEUP_DETECTOR_DISABLED BIT(4)
#define PWRCTRL_PD_ACTIVE BIT(3)
#define PWRCTRL_PU_ACTIVE BIT(2)
#define WAKEUP_PD_ACTIVE BIT(1)
#define PONKEY_PU_ACTIVE BIT(0)
/* Main PMIC VINLOW Control Register
* VIN_CONTROL_REGC DMSC
* Address : 0x15
* */
#define SWIN_DETECTOR_ENABLED BIT(7)
#define SWOUT_DETECTOR_ENABLED BIT(6)
#define VINLOW_HYST_MASK 0x3
#define VINLOW_HYST_SHIFT 4
#define VINLOW_THRESHOLD_MASK 0x7
#define VINLOW_THRESHOLD_SHIFT 1
#define VINLOW_ENABLED 0x01
#define VINLOW_CTRL_REG_MASK 0xFF
/* USB Control Register
* Address : 0x40
* */
#define BOOST_OVP_DISABLED BIT(7)
#define VBUS_OTG_DETECTION_DISABLED BIT(6)
// Discharge not implemented
#define OCP_LIMIT_HIGH BIT(3)
#define SWIN_SWOUT_ENABLED BIT(2)
#define USBSW_OTG_SWITCH_ENABLED BIT(1)
/* IRQ masks */
/* Interrupt Mask for Register 1 (0x50 for latch) */
#define IT_SWOUT_R_MASK BIT(7)
#define IT_SWOUT_F_MASK BIT(6)
#define IT_VBUS_OTG_R_MASK BIT(5)
#define IT_VBUS_OTG_F_MASK BIT(4)
#define IT_WAKEUP_R_MASK BIT(3)
#define IT_WAKEUP_F_MASK BIT(2)
#define IT_PONKEY_R_MASK BIT(1)
#define IT_PONKEY_F_MASK BIT(0)
/* Interrupt Mask for Register 2 (0x51 for latch) */
#define IT_OVP_BOOST_MASK BIT(7)
#define IT_OCP_BOOST_MASK BIT(6)
#define IT_OCP_SWOUT_MASK BIT(5)
#define IT_OCP_OTG_MASK BIT(4)
#define IT_CURLIM_BUCK4_MASK BIT(3)
#define IT_CURLIM_BUCK3_MASK BIT(2)
#define IT_CURLIM_BUCK2_MASK BIT(1)
#define IT_CURLIM_BUCK1_MASK BIT(0)
/* Interrupt Mask for Register 3 (0x52 for latch) */
#define IT_SHORT_SWOUT_MASK BIT(7)
#define IT_SHORT_SWOTG_MASK BIT(6)
#define IT_CURLIM_LDO6_MASK BIT(5)
#define IT_CURLIM_LDO5_MASK BIT(4)
#define IT_CURLIM_LDO4_MASK BIT(3)
#define IT_CURLIM_LDO3_MASK BIT(2)
#define IT_CURLIM_LDO2_MASK BIT(1)
#define IT_CURLIM_LDO1_MASK BIT(0)
/* Interrupt Mask for Register 4 (0x53 for latch) */
#define IT_SWIN_R_MASK BIT(7)
#define IT_SWIN_F_MASK BIT(6)
/* Reserved 1 */
/* Reserved 2 */
#define IT_VINLOW_R_MASK BIT(3)
#define IT_VINLOW_F_MASK BIT(2)
#define IT_TWARN_R_MASK BIT(1)
#define IT_TWARN_F_MASK BIT(0)
#define PMIC_VERSION_ID 0x10
#define NVM_SECTOR3_REGISTER_7 0x33
//#define STPMU1_I2C_ADDRESS ((NVM_SECTOR3_REGISTER_7 & 0x7F) << 1 )
/**
* @}
*/
/** @defgroup STM32MP15XX_EVAL_STPMU_Exported_Functions Exported Functions
* @{
*/
/* Exported functions --------------------------------------------------------*/
uint8_t STPMU1_Register_Read(uint8_t register_id);
void STPMU1_Register_Write(uint8_t register_id, uint8_t value);
void STPMU1_Register_Update(uint8_t register_id, uint8_t value, uint8_t mask);
void STPMU1_Enable_Interrupt(PMIC_IRQn IRQn);
void STPMU1_Disable_Interrupt(PMIC_IRQn IRQn);
void STPMU1_Regulator_Enable(PMIC_RegulId_TypeDef id);
void STPMU1_Regulator_Disable(PMIC_RegulId_TypeDef id);
uint8_t STPMU1_Is_Regulator_Enabled(PMIC_RegulId_TypeDef id);
void STPMU1_Regulator_Voltage_Set(PMIC_RegulId_TypeDef id,uint16_t milivolts);
uint32_t BSP_PMIC_Init(void);
uint32_t BSP_PMIC_DeInit(void);
uint32_t BSP_PMIC_Is_Device_Ready(void);
uint32_t BSP_PMIC_InitRegulators (void);
__weak void BSP_PMIC_INTn_Callback(PMIC_IRQn IRQn);
#ifdef __cplusplus
}
#endif
#endif

257
bsp/stm32/stm32mp157a-st-discovery/project.ewt
View File

@ -2375,133 +2375,130 @@
<name>$PROJ_DIR$\applications\main.c</name>
</file>
</group>
<group>
<name>at24cxx</name>
<file>
<name>$PROJ_DIR$\packages\at24cxx-latest\at24cxx.c</name>
</file>
</group>
<group>
<name>cpu</name>
<file>
<name>$PROJ_DIR$\rt-thread\libcpu\arm\common\backtrace.c</name>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-m4\context_iar.S</name>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\context_iar.S</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\libcpu\arm\cortex-m4\cpuport.c</name>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\cpuport.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\libcpu\arm\common\div0.c</name>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\libcpu\arm\common\showmem.c</name>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c</name>
</file>
</group>
<group>
<name>DeviceDrivers</name>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\misc\adc.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\misc\adc.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\sdio\block_dev.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\sdio\block_dev.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\src\completion.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\completion.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\src\dataqueue.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\misc\dac.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\hwtimer\hwtimer.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\i2c\i2c-bit-ops.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\i2c\i2c_core.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\i2c\i2c-bit-ops.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\i2c\i2c_dev.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\i2c\i2c_core.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\sdio\mmc.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\i2c\i2c_dev.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\sdio\mmcsd_core.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\sdio\mmc.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\misc\pin.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\sdio\mmcsd_core.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\src\pipe.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\misc\pin.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\src\ringblk_buf.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\pipe.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\src\ringbuffer.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\misc\rt_drv_pwm.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\sdio\sd.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\misc\rt_drv_pwm.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\sdio\sdio.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\sdio\sd.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\serial\serial.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\sdio\sdio.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\spi\spi_core.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\serial\serial.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\spi\spi_dev.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\spi\spi_core.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\src\waitqueue.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\spi\spi_dev.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\drivers\src\workqueue.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c</name>
</file>
</group>
<group>
<name>dlib</name>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\environ.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\environ.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\libc.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\libc.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\rmtx.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\rmtx.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\stdio.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\stdio.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_close.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_lseek.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_mem.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_open.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_read.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_remove.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\dlib\syscall_write.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_write.c</name>
</file>
</group>
<group>
@ -2510,41 +2507,50 @@
<name>$PROJ_DIR$\board\board.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\HAL_Drivers\drv_adc.c</name>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_adc.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\HAL_Drivers\drv_common.c</name>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_common.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\HAL_Drivers\drv_gpio.c</name>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_dac.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\HAL_Drivers\drv_hwtimer.c</name>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_gpio.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\HAL_Drivers\drv_lcd.c</name>
<name>$PROJ_DIR$\board\ports\drv_hard_i2c.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\HAL_Drivers\drv_pwm.c</name>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_hwtimer.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\HAL_Drivers\drv_sdio.c</name>
<name>$PROJ_DIR$\board\ports\drv_lptim.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\HAL_Drivers\drv_soft_i2c.c</name>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_pwm.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\HAL_Drivers\drv_spi.c</name>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_soft_i2c.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\HAL_Drivers\drv_usart.c</name>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_spi.c</name>
</file>
<file>
<name>$PROJ_DIR$\board\CubeMX_Config\EWARM\startup_stm32mp15xx.s</name>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_usart.c</name>
</file>
<file>
<name>$PROJ_DIR$\board\ports\drv_wwdg.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Device\ST\STM32MP1xx\Source\Templates\iar\startup_stm32mp15xx.s</name>
</file>
<file>
<name>$PROJ_DIR$\board\CubeMX_Config\CM4\Src\stm32mp1xx_hal_msp.c</name>
</file>
<file>
<name>$PROJ_DIR$\board\ports\stpmic.c</name>
</file>
<file>
<name>$PROJ_DIR$\board\CubeMX_Config\Common\System\system_stm32mp1xx.c</name>
</file>
@ -2552,220 +2558,217 @@
<group>
<name>Filesystem</name>
<file>
<name>$PROJ_DIR$\rt-thread\components\dfs\filesystems\elmfat\option\ccsbcs.c</name>
<name>$PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat\option\ccsbcs.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\dfs\filesystems\devfs\devfs.c</name>
<name>$PROJ_DIR$\..\..\..\components\dfs\filesystems\devfs\devfs.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\dfs\src\dfs.c</name>
<name>$PROJ_DIR$\..\..\..\components\dfs\src\dfs.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\dfs\filesystems\elmfat\dfs_elm.c</name>
<name>$PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat\dfs_elm.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\dfs\src\dfs_file.c</name>
<name>$PROJ_DIR$\..\..\..\components\dfs\src\dfs_file.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\dfs\src\dfs_fs.c</name>
<name>$PROJ_DIR$\..\..\..\components\dfs\src\dfs_fs.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\dfs\src\dfs_posix.c</name>
<name>$PROJ_DIR$\..\..\..\components\dfs\src\dfs_posix.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\dfs\filesystems\elmfat\ff.c</name>
<name>$PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat\ff.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\dfs\src\poll.c</name>
<name>$PROJ_DIR$\..\..\..\components\dfs\src\poll.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\dfs\src\select.c</name>
<name>$PROJ_DIR$\..\..\..\components\dfs\src\select.c</name>
</file>
</group>
<group>
<name>finsh</name>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\cmd.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\cmd.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\finsh_compiler.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\finsh_compiler.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\finsh_error.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\finsh_error.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\finsh_heap.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\finsh_heap.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\finsh_init.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\finsh_init.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\finsh_node.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\finsh_node.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\finsh_ops.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\finsh_ops.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\finsh_parser.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\finsh_parser.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\finsh_token.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\finsh_token.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\finsh_var.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\finsh_var.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\finsh_vm.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\finsh_vm.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\msh.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\msh.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\msh_file.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\msh_file.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\finsh\shell.c</name>
<name>$PROJ_DIR$\..\..\..\components\finsh\shell.c</name>
</file>
</group>
<group>
<name>Kernel</name>
<file>
<name>$PROJ_DIR$\rt-thread\src\clock.c</name>
<name>$PROJ_DIR$\..\..\..\src\clock.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\components.c</name>
<name>$PROJ_DIR$\..\..\..\src\components.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\idle.c</name>
<name>$PROJ_DIR$\..\..\..\src\device.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\ipc.c</name>
<name>$PROJ_DIR$\..\..\..\src\idle.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\kservice.c</name>
<name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\memheap.c</name>
<name>$PROJ_DIR$\..\..\..\src\irq.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\mempool.c</name>
<name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\object.c</name>
<name>$PROJ_DIR$\..\..\..\src\memheap.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\rtt_device.c</name>
<name>$PROJ_DIR$\..\..\..\src\mempool.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\rtt_irq.c</name>
<name>$PROJ_DIR$\..\..\..\src\object.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\scheduler.c</name>
<name>$PROJ_DIR$\..\..\..\src\scheduler.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\signal.c</name>
<name>$PROJ_DIR$\..\..\..\src\signal.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\thread.c</name>
<name>$PROJ_DIR$\..\..\..\src\thread.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\src\timer.c</name>
<name>$PROJ_DIR$\..\..\..\src\timer.c</name>
</file>
</group>
<group>
<name>libc</name>
<file>
<name>$PROJ_DIR$\rt-thread\components\libc\compilers\common\rtt_time.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\common\time.c</name>
</file>
</group>
<group>
<name>STM32_HAL</name>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc_ex.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_adc_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_cortex.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_cortex.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac_ex.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dac_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma_ex.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_dma_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_exti.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_exti.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_gpio.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_gpio.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_hsem.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_hsem.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c_ex.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_i2c_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_ipcc.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_ipcc.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_mdma.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_lptim.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_mdma.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr_ex.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_pwr_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc_ex.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_sd.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_rcc_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_spi.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_sd.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_spi.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim_ex.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_tim_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart_ex.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart.c</name>
</file>
<file>
<name>$PROJ_DIR$\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_ll_sdmmc.c</name>
</file>
</group>
<group>
<name>Utilities</name>
<file>
<name>$PROJ_DIR$\rt-thread\components\utilities\ulog\backend\console_be.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_uart_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\rt-thread\components\utilities\ulog\ulog.c</name>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_hal_wwdg.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Src\stm32mp1xx_ll_sdmmc.c</name>
</file>
</group>
</project>

22
bsp/stm32/stm32mp157a-st-discovery/rtconfig.h
View File

@ -76,6 +76,24 @@
/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEM_TYPES_MAX 2
#define DFS_FD_MAX 16
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_DFS_ELM_REENTRANT
#define RT_USING_DFS_DEVFS
/* Device Drivers */
@ -92,6 +110,7 @@
/* POSIX layer and C standard library */
#define RT_USING_LIBC
#define RT_USING_POSIX
/* Network */
@ -167,6 +186,9 @@
#define BSP_USING_GPIO
#define BSP_USING_UART
#define BSP_USING_UART3
#define BSP_UART3_RX_USING_DMA
#define BSP_UART3_TX_USING_DMA
#define BSP_USING_UART4
/* Board extended module Drivers */

4
components/drivers/Kconfig
View File

@ -111,6 +111,10 @@ config RT_USING_ADC
bool "Using ADC device drivers"
default n
config RT_USING_DAC
bool "Using DAC device drivers"
default n
config RT_USING_PWM
bool "Using PWM device drivers"
default n

42
components/drivers/include/drivers/dac.h Normal file
View File

@ -0,0 +1,42 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-19 thread-liu the first version
*/
#ifndef __DAC_H__
#define __DAC_H__
#include <rtthread.h>
struct rt_dac_device;
struct rt_dac_ops
{
rt_err_t (*disabled)(struct rt_dac_device *device, rt_uint32_t channel);
rt_err_t (*enabled)(struct rt_dac_device *device, rt_uint32_t channel);
rt_err_t (*convert)(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value);
};
struct rt_dac_device
{
struct rt_device parent;
const struct rt_dac_ops *ops;
};
typedef struct rt_dac_device *rt_dac_device_t;
typedef enum
{
RT_dac_CMD_ENABLE,
RT_dac_CMD_DISABLE,
} rt_dac_cmd_t;
rt_err_t rt_hw_dac_register(rt_dac_device_t dac,const char *name, const struct rt_dac_ops *ops, const void *user_data);
rt_uint32_t rt_dac_write(rt_dac_device_t dev, rt_uint32_t channel, rt_uint32_t value);
rt_err_t rt_dac_enable(rt_dac_device_t dev, rt_uint32_t channel);
rt_err_t rt_dac_disable(rt_dac_device_t dev, rt_uint32_t channel);
#endif /* __dac_H__ */

4
components/drivers/include/rtdevice.h
View File

@ -103,6 +103,10 @@ extern "C" {
#include "drivers/adc.h"
#endif
#ifdef RT_USING_DAC
#include "drivers/dac.h"
#endif
#ifdef RT_USING_PWM
#include "drivers/rt_drv_pwm.h"
#endif

3
components/drivers/misc/SConscript
View File

@ -11,6 +11,9 @@ if GetDepend(['RT_USING_PIN']):
if GetDepend(['RT_USING_ADC']):
src = src + ['adc.c']
if GetDepend(['RT_USING_DAC']):
src = src + ['dac.c']
if GetDepend(['RT_USING_PWM']):
src = src + ['rt_drv_pwm.c']

231
components/drivers/misc/dac.c Normal file
View File

@ -0,0 +1,231 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-19 thread-liu the first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <string.h>
#include <stdlib.h>
#define DBG_TAG "dac"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
static rt_size_t _dac_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
rt_err_t result = RT_EOK;
rt_size_t i;
struct rt_dac_device *dac = (struct rt_dac_device *)dev;
rt_uint32_t *value = (rt_uint32_t *)buffer;
for (i = 0; i < size; i += sizeof(int))
{
result = dac->ops->convert(dac, pos + i, value);
if (result != RT_EOK)
{
return 0;
}
value++;
}
return i;
}
static rt_err_t _dac_control(rt_device_t dev, int cmd, void *args)
{
rt_err_t result = RT_EOK;
rt_dac_device_t dac = (struct rt_dac_device *)dev;
if (dac->ops->enabled == RT_NULL)
{
return -RT_ENOSYS;
}
if (cmd == RT_dac_CMD_ENABLE)
{
result = dac->ops->enabled(dac, (rt_uint32_t)args);
}
else if (cmd == RT_dac_CMD_DISABLE)
{
result = dac->ops->disabled(dac, (rt_uint32_t)args);
}
return result;
}
#ifdef RT_USING_DEVICE_OPS
const static struct rt_device_ops dac_ops =
{
RT_NULL,
RT_NULL,
RT_NULL,
RT_NULL,
_dac_write,
_dac_control,
};
#endif
rt_err_t rt_hw_dac_register(rt_dac_device_t device, const char *name, const struct rt_dac_ops *ops, const void *user_data)
{
rt_err_t result = RT_EOK;
RT_ASSERT(ops != RT_NULL && ops->convert != RT_NULL);
device->parent.type = RT_Device_Class_Miscellaneous;
device->parent.rx_indicate = RT_NULL;
device->parent.tx_complete = RT_NULL;
#ifdef RT_USING_DEVICE_OPS
device->parent.ops = &dac_ops;
#else
device->parent.init = RT_NULL;
device->parent.open = RT_NULL;
device->parent.close = RT_NULL;
device->parent.read = RT_NULL;
device->parent.write = _dac_write;
device->parent.control = _dac_control;
#endif
device->ops = ops;
device->parent.user_data = (void *)user_data;
result = rt_device_register(&device->parent, name, RT_DEVICE_FLAG_RDWR);
return result;
}
rt_uint32_t rt_dac_write(rt_dac_device_t dev, rt_uint32_t channel, rt_uint32_t value)
{
RT_ASSERT(dev);
dev->ops->convert(dev, channel, &value);
return RT_EOK;
}
rt_err_t rt_dac_enable(rt_dac_device_t dev, rt_uint32_t channel)
{
rt_err_t result = RT_EOK;
RT_ASSERT(dev);
if (dev->ops->enabled != RT_NULL)
{
result = dev->ops->enabled(dev, channel);
}
else
{
result = -RT_ENOSYS;
}
return result;
}
rt_err_t rt_dac_disabled(rt_dac_device_t dev, rt_uint32_t channel)
{
rt_err_t result = RT_EOK;
RT_ASSERT(dev);
if (dev->ops->disabled != RT_NULL)
{
result = dev->ops->disabled(dev, channel);
}
else
{
result = -RT_ENOSYS;
}
return result;
}
#ifdef FINSH_USING_MSH
static int dac(int argc, char **argv)
{
int result = RT_EOK;
static rt_dac_device_t dac_device = RT_NULL;
char *result_str;
if (argc > 1)
{
if (!strcmp(argv[1], "probe"))
{
if (argc == 3)
{
dac_device = (rt_dac_device_t)rt_device_find(argv[2]);
result_str = (dac_device == RT_NULL) ? "failure" : "success";
rt_kprintf("probe %s %s \n", argv[2], result_str);
}
else
{
rt_kprintf("dac probe <dac_name> - probe dac by name\n");
}
}
else
{
if (dac_device == RT_NULL)
{
rt_kprintf("Please using 'dac probe <dac_name>' first\n");
return -RT_ERROR;
}
if (!strcmp(argv[1], "enable"))
{
if (argc == 3)
{
result = rt_dac_enable(dac_device, atoi(argv[2]));
result_str = (result == RT_EOK) ? "success" : "failure";
rt_kprintf("%s channel %d enables %s \n", dac_device->parent.parent.name, atoi(argv[2]), result_str);
}
else
{
rt_kprintf("dac enable <channel> - enable dac channel\n");
}
}
else if (!strcmp(argv[1], "write"))
{
if (argc == 4)
{
rt_dac_write(dac_device, atoi(argv[2]), atoi(argv[3]));
rt_kprintf("%s channel %d write value is %d \n", dac_device->parent.parent.name, atoi(argv[2]), atoi(argv[3]));
}
else
{
rt_kprintf("dac write <channel> <value> - write dac value on the channel\n");
}
}
else if (!strcmp(argv[1], "disable"))
{
if (argc == 3)
{
result = rt_dac_disabled(dac_device, atoi(argv[2]));
result_str = (result == RT_EOK) ? "success" : "failure";
rt_kprintf("%s channel %d disable %s \n", dac_device->parent.parent.name, atoi(argv[2]), result_str);
}
else
{
rt_kprintf("dac disable <channel> - disable dac channel\n");
}
}
else
{
rt_kprintf("Unknown command. Please enter 'dac' for help\n");
}
}
}
else
{
rt_kprintf("Usage: \n");
rt_kprintf("dac probe <dac_name> - probe dac by name\n");
rt_kprintf("dac write <channel> <value> - write dac value on the channel\n");
rt_kprintf("dac disable <channel> - disable dac channel\n");
rt_kprintf("dac enable <channel> - enable dac channel\n");
result = -RT_ERROR;
}
return RT_EOK;
}
MSH_CMD_EXPORT(dac, dac function);
#endif /* FINSH_USING_MSH */