[add] sdio driver for stm32mp1-dk1.
This commit is contained in:
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a0f6579167
commit
2f5bfddde3
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@ -102,6 +102,10 @@ if GetDepend(['BSP_USING_LTDC']):
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src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_dma2d.c']
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src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dsi.c']
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if GetDepend(['BSP_USING_SDMMC']):
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src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_sdmmc.c']
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src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sd.c']
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path = [cwd + '/STM32MP1xx_HAL_Driver/Inc',
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cwd + '/CMSIS/Device/ST/STM32MP1xx/Include',
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cwd + '/CMSIS/Core/Include',
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@ -58,7 +58,7 @@
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/*#define HAL_QSPI_MODULE_ENABLED */
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/*#define HAL_RNG_MODULE_ENABLED */
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/*#define HAL_SAI_MODULE_ENABLED */
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/*#define HAL_SD_MODULE_ENABLED */
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#define HAL_SD_MODULE_ENABLED
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/*#define HAL_MMC_MODULE_ENABLED */
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/*#define HAL_RTC_MODULE_ENABLED */
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/*#define HAL_SMBUS_MODULE_ENABLED */
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@ -58,8 +58,7 @@
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/* USER CODE END 0 */
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void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
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/**
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/**
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* Initializes the Global MSP.
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*/
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void HAL_MspInit(void)
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@ -942,6 +941,107 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef *hI2c)
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}
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}
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/**
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* @brief SD MSP Initialization
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* This function configures the hardware resources used in this example
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* @param hsd: SD handle pointer
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* @retval None
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*/
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void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
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if(hsd->Instance==SDMMC1)
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{
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/* USER CODE BEGIN SDMMC1_MspInit 0 */
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if (IS_ENGINEERING_BOOT_MODE())
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{
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/** Initializes the peripherals clock
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*/
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PeriphClkInit.Sdmmc12ClockSelection = RCC_SDMMC12CLKSOURCE_PLL4;
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SDMMC12;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
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{
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Error_Handler();
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}
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}
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/* USER CODE END SDMMC1_MspInit 0 */
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/* Peripheral clock enable */
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__HAL_RCC_SDMMC1_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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/**SDMMC1 GPIO Configuration
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PC8 ------> SDMMC1_D0
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PC9 ------> SDMMC1_D1
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PC10 ------> SDMMC1_D2
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PC11 ------> SDMMC1_D3
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PC12 ------> SDMMC1_CK
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PD2 ------> SDMMC1_CMD
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*/
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GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
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|GPIO_PIN_12;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_SDIO1;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_2;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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__HAL_RCC_SDMMC1_FORCE_RESET();
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__HAL_RCC_SDMMC1_RELEASE_RESET();
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/* SDMMC1 interrupt Init */
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HAL_NVIC_SetPriority(SDMMC1_IRQn, 2, 0);
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HAL_NVIC_EnableIRQ(SDMMC1_IRQn);
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/* USER CODE BEGIN SDMMC1_MspInit 1 */
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/* USER CODE END SDMMC1_MspInit 1 */
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}
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}
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/**
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* @brief SD MSP De-Initialization
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* This function freeze the hardware resources used in this example
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* @param hsd: SD handle pointer
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* @retval None
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*/
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void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
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{
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if(hsd->Instance==SDMMC1)
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{
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/* USER CODE BEGIN SDMMC1_MspDeInit 0 */
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/* USER CODE END SDMMC1_MspDeInit 0 */
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/* Peripheral clock disable */
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__HAL_RCC_SDMMC1_CLK_DISABLE();
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/**SDMMC1 GPIO Configuration
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PC8 ------> SDMMC1_D0
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PC9 ------> SDMMC1_D1
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PC10 ------> SDMMC1_D2
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PC11 ------> SDMMC1_D3
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PC12 ------> SDMMC1_CK
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PD2 ------> SDMMC1_CMD
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*/
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HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
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|GPIO_PIN_12);
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HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
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/* SDMMC1 interrupt DeInit */
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HAL_NVIC_DisableIRQ(SDMMC1_IRQn);
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/* USER CODE BEGIN SDMMC1_MspDeInit 1 */
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/* USER CODE END SDMMC1_MspDeInit 1 */
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}
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}
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/**
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* @brief DeInitializes I2C MSP.
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* @param hI2c : I2C handler
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@ -56,6 +56,13 @@ menu "Onboard Peripheral Drivers"
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bool "Enable Ethernet"
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default n
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select RT_USING_LWIP
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config BSP_USING_SDMMC
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bool "Enable SDMMC (SD card)"
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select RT_USING_SDIO
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select RT_USING_DFS
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select RT_USING_DFS_ELMFAT
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default n
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endmenu
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@ -43,6 +43,9 @@ if GetDepend(['BSP_USING_RS485']):
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if GetDepend(['BSP_USING_GBE']):
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src += Glob('ports/drv_eth.c')
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if GetDepend(['BSP_USING_SDMMC']):
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src += Glob('ports/drv_sdio.c')
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if GetDepend(['BSP_USING_OPENAMP']):
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src += Glob('CubeMX_Config/CM4/Src/ipcc.c')
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src += Glob('CubeMX_Config/CM4/Src/openamp.c')
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@ -27,11 +27,6 @@ define symbol __OPENAMP_region_size__ = 0x8000;
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export symbol __OPENAMP_region_start__;
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export symbol __OPENAMP_region_size__;
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define symbol __SDMMC_region_start__ = 0x10048000;
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define symbol __SDMMC_region_size__ = 0x1FFFF;
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export symbol __SDMMC_region_start__;
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export symbol __SDMMC_region_size__;
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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@ -0,0 +1,554 @@
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/*
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* Copyright (c) 2006-2020, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-07-16 thread-liu first version
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*/
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#include "board.h"
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#include "drv_sdio.h"
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#include <dfs_fs.h>
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#ifdef BSP_USING_SDMMC
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//#define DRV_DEBUG
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#define DBG_TAG "drv.sdio"
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#ifdef DRV_DEBUG
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#define DBG_LVL DBG_LOG
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#else
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#define DBG_LVL DBG_INFO
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#endif /* DRV_DEBUG */
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#include <rtdbg.h>
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static SD_HandleTypeDef hsd;
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static struct rt_mmcsd_host *host;
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#define SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS (100000)
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#define RTHW_SDIO_LOCK(_sdio) rt_mutex_take(&_sdio->mutex, RT_WAITING_FOREVER)
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#define RTHW_SDIO_UNLOCK(_sdio) rt_mutex_release(&_sdio->mutex);
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struct sdio_pkg
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{
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struct rt_mmcsd_cmd *cmd;
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void *buff;
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rt_uint32_t flag;
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};
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struct rthw_sdio
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{
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struct rt_mmcsd_host *host;
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struct stm32_sdio_des sdio_des;
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struct rt_event event;
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struct rt_mutex mutex;
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struct sdio_pkg *pkg;
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};
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/* SYSRAM SDMMC1/2 accesses */
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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rt_uint8_t cache_buf[SDIO_BUFF_SIZE] __attribute__((at(0x2FFC0000)));
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#elif defined(__ICCARM__)
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#pragma location=0x2FFC0000
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rt_uint8_t cache_buf[SDIO_BUFF_SIZE];
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#elif defined(__GNUC__)
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rt_uint8_t cache_buf[SDIO_BUFF_SIZE] __attribute__((at(0x2FFC0000)));
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#endif
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/**
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* @brief This function get order from sdio.
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* @param data
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* @retval sdio order
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*/
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static int get_order(rt_uint32_t data)
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{
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int order = 0;
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switch (data)
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{
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case 1:
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order = 0;
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break;
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case 2:
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order = 1;
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break;
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case 4:
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order = 2;
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break;
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case 8:
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order = 3;
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break;
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case 16:
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order = 4;
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break;
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case 32:
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order = 5;
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break;
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case 64:
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order = 6;
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break;
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case 128:
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order = 7;
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break;
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case 256:
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order = 8;
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break;
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case 512:
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order = 9;
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break;
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case 1024:
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order = 10;
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break;
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case 2048:
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order = 11;
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break;
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case 4096:
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order = 12;
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break;
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case 8192:
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order = 13;
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break;
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case 16384:
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order = 14;
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break;
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default :
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order = 0;
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break;
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}
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return order;
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}
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/**
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* @brief This function wait sdio cmd completed.
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* @param sdio rthw_sdio
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* @retval None
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*/
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static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
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{
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rt_uint32_t status;
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struct rt_mmcsd_cmd *cmd = sdio->pkg->cmd;
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struct rt_mmcsd_data *data = cmd->data;
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struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
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if (rt_event_recv(&sdio->event, 0xffffffff, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
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rt_tick_from_millisecond(5000), &status) != RT_EOK)
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{
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LOG_E("wait cmd completed timeout");
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cmd->err = -RT_ETIMEOUT;
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return;
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}
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if (sdio->pkg == RT_NULL)
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{
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return;
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}
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cmd->resp[0] = hw_sdio->resp1;
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cmd->resp[1] = hw_sdio->resp2;
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cmd->resp[2] = hw_sdio->resp3;
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cmd->resp[3] = hw_sdio->resp4;
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if (status & SDIO_ERRORS)
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{
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if ((status & SDMMC_STA_CCRCFAIL) && (resp_type(cmd) & (RESP_R3 | RESP_R4)))
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{
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cmd->err = RT_EOK;
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}
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else
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{
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cmd->err = -RT_ERROR;
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}
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if (status & SDMMC_STA_CTIMEOUT)
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{
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cmd->err = -RT_ETIMEOUT;
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}
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if (status & SDMMC_STA_DCRCFAIL)
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{
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data->err = -RT_ERROR;
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}
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if (status & SDMMC_STA_DTIMEOUT)
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{
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data->err = -RT_ETIMEOUT;
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}
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if (cmd->err == RT_EOK)
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{
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LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
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}
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else
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{
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LOG_D("err:0x%08x, %s%s%s%s%s%s%s cmd:%d arg:0x%08x rw:%c len:%d blksize:%d",
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status,
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status & SDMMC_STA_CCRCFAIL ? "CCRCFAIL " : "",
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status & SDMMC_STA_DCRCFAIL ? "DCRCFAIL " : "",
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status & SDMMC_STA_CTIMEOUT ? "CTIMEOUT " : "",
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status & SDMMC_STA_DTIMEOUT ? "DTIMEOUT " : "",
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status & SDMMC_STA_TXUNDERR ? "TXUNDERR " : "",
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status & SDMMC_STA_RXOVERR ? "RXOVERR " : "",
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status == 0 ? "NULL" : "",
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cmd->cmd_code,
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cmd->arg,
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data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
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data ? data->blks * data->blksize : 0,
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data ? data->blksize : 0
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);
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}
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}
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else
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{
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cmd->err = RT_EOK;
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LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
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}
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}
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/**
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* @brief This function send command.
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* @param sdio rthw_sdio
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* @param pkg sdio package
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* @retval None
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*/
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static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
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{
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struct rt_mmcsd_cmd *cmd = pkg->cmd;
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struct rt_mmcsd_data *data = cmd->data;
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struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
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rt_uint32_t reg_cmd;
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sdio->pkg = pkg;
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LOG_D("CMD:%d ARG:0x%08x RES:%s%s%s%s%s%s%s%s%s rw:%c len:%d blksize:%d\n",
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cmd->cmd_code,
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cmd->arg,
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resp_type(cmd) == RESP_NONE ? "NONE" : "",
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resp_type(cmd) == RESP_R1 ? "R1" : "",
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resp_type(cmd) == RESP_R1B ? "R1B" : "",
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resp_type(cmd) == RESP_R2 ? "R2" : "",
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resp_type(cmd) == RESP_R3 ? "R3" : "",
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resp_type(cmd) == RESP_R4 ? "R4" : "",
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resp_type(cmd) == RESP_R5 ? "R5" : "",
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resp_type(cmd) == RESP_R6 ? "R6" : "",
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resp_type(cmd) == RESP_R7 ? "R7" : "",
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data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
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data ? data->blks * data->blksize : 0,
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data ? data->blksize : 0
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);
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/* config cmd reg */
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reg_cmd = cmd->cmd_code | SDMMC_CMD_CPSMEN;
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if (resp_type(cmd) == RESP_NONE)
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reg_cmd |= SDMMC_RESPONSE_NO;
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else if (resp_type(cmd) == RESP_R2)
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reg_cmd |= SDMMC_RESPONSE_LONG;
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else
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reg_cmd |= SDMMC_RESPONSE_SHORT;
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hw_sdio->mask |= SDIO_MASKR_ALL;
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/* data pre configuration */
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if (data != RT_NULL)
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{
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hw_sdio->dctrl = 0;
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hw_sdio->mask &= ~(SDMMC_MASK_CMDRENDIE | SDMMC_MASK_CMDSENTIE);
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reg_cmd |= SDMMC_CMD_CMDTRANS;
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hw_sdio->dtimer = HW_SDIO_DATATIMEOUT;
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hw_sdio->dlen = data->blks * data->blksize;
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hw_sdio->dctrl = (get_order(data->blksize)<<4) | (data->flags & DATA_DIR_READ ? SDMMC_DCTRL_DTDIR : 0);
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hw_sdio->idmabase0r = (rt_uint32_t)cache_buf;
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hw_sdio->idmatrlr = SDMMC_ENABLE_IDMA_SINGLE_BUFF;
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}
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hw_sdio->arg = cmd->arg;
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hw_sdio->cmd = reg_cmd;
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/* wait completed */
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rthw_sdio_wait_completed(sdio);
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/* Waiting for data to be sent to completion */
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if (data != RT_NULL)
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{
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volatile rt_uint32_t count = SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS;
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while (count && (hw_sdio->sta & SDMMC_STA_DPSMACT))
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{
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count--;
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}
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if ((count == 0) || (hw_sdio->sta & SDIO_ERRORS))
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{
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cmd->err = -RT_ERROR;
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}
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||||
}
|
||||
|
||||
/* close irq, keep sdio irq */
|
||||
hw_sdio->mask = hw_sdio->mask & SDMMC_IT_SDIOIT ? SDMMC_IT_SDIOIT : 0x00;
|
||||
|
||||
/* data post configuration */
|
||||
if (data != RT_NULL)
|
||||
{
|
||||
if (data->flags & DATA_DIR_READ)
|
||||
{
|
||||
rt_memcpy(data->buf, cache_buf, data->blks * data->blksize);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function send sdio request.
|
||||
* @param sdio rthw_sdio
|
||||
* @param req request
|
||||
* @retval None
|
||||
*/
|
||||
static void rthw_sdio_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
|
||||
{
|
||||
struct sdio_pkg pkg;
|
||||
struct rthw_sdio *sdio = host->private_data;
|
||||
struct rt_mmcsd_data *data;
|
||||
|
||||
RTHW_SDIO_LOCK(sdio);
|
||||
|
||||
if (req->cmd != RT_NULL)
|
||||
{
|
||||
rt_memset(&pkg, 0, sizeof(pkg));
|
||||
data = req->cmd->data;
|
||||
pkg.cmd = req->cmd;
|
||||
|
||||
if (data != RT_NULL)
|
||||
{
|
||||
rt_uint32_t size = data->blks * data->blksize;
|
||||
|
||||
RT_ASSERT(size <= SDIO_BUFF_SIZE);
|
||||
|
||||
if (data->flags & DATA_DIR_WRITE)
|
||||
{
|
||||
rt_memcpy(cache_buf, data->buf, size);
|
||||
}
|
||||
}
|
||||
|
||||
rthw_sdio_send_command(sdio, &pkg);
|
||||
}
|
||||
|
||||
if (req->stop != RT_NULL)
|
||||
{
|
||||
rt_memset(&pkg, 0, sizeof(pkg));
|
||||
pkg.cmd = req->stop;
|
||||
rthw_sdio_send_command(sdio, &pkg);
|
||||
}
|
||||
|
||||
RTHW_SDIO_UNLOCK(sdio);
|
||||
|
||||
mmcsd_req_complete(sdio->host);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief This function interrupt process function.
|
||||
* @param host rt_mmcsd_host
|
||||
* @retval None
|
||||
*/
|
||||
void rthw_sdio_irq_process(struct rt_mmcsd_host *host)
|
||||
{
|
||||
struct rthw_sdio *sdio = host->private_data;
|
||||
struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
|
||||
rt_uint32_t intstatus = hw_sdio->sta;
|
||||
|
||||
/* clear irq flag*/
|
||||
hw_sdio->icr = intstatus;
|
||||
|
||||
rt_event_send(&sdio->event, intstatus);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function config sdio.
|
||||
* @param host rt_mmcsd_host
|
||||
* @param io_cfg rt_mmcsd_io_cfg
|
||||
* @retval None
|
||||
*/
|
||||
static void rthw_sdio_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
|
||||
{
|
||||
rt_uint32_t temp, clk_src;
|
||||
rt_uint32_t clk = io_cfg->clock;
|
||||
struct rthw_sdio *sdio = host->private_data;
|
||||
struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
|
||||
|
||||
LOG_D("clk:%dK width:%s%s%s power:%s%s%s",
|
||||
clk/1000,
|
||||
io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "",
|
||||
io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "",
|
||||
io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "",
|
||||
io_cfg->power_mode == MMCSD_POWER_OFF ? "OFF" : "",
|
||||
io_cfg->power_mode == MMCSD_POWER_UP ? "UP" : "",
|
||||
io_cfg->power_mode == MMCSD_POWER_ON ? "ON" : ""
|
||||
);
|
||||
|
||||
RTHW_SDIO_LOCK(sdio);
|
||||
|
||||
clk_src = SDIO_CLOCK_FREQ;
|
||||
|
||||
if (clk > 0)
|
||||
{
|
||||
if (clk > host->freq_max)
|
||||
{
|
||||
clk = host->freq_max;
|
||||
}
|
||||
temp = DIV_ROUND_UP(clk_src, 2 * clk);
|
||||
if (temp > 0x3FF)
|
||||
{
|
||||
temp = 0x3FF;
|
||||
}
|
||||
}
|
||||
|
||||
if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8)
|
||||
{
|
||||
temp |= SDMMC_BUS_WIDE_8B;
|
||||
}
|
||||
else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4)
|
||||
{
|
||||
temp |= SDMMC_BUS_WIDE_4B;
|
||||
}
|
||||
else
|
||||
{
|
||||
temp |= SDMMC_BUS_WIDE_1B;
|
||||
}
|
||||
|
||||
hw_sdio->clkcr = temp;
|
||||
|
||||
if (io_cfg->power_mode == MMCSD_POWER_ON)
|
||||
hw_sdio->power |= SDMMC_POWER_PWRCTRL;
|
||||
|
||||
RTHW_SDIO_UNLOCK(sdio);
|
||||
}
|
||||
|
||||
static const struct rt_mmcsd_host_ops ops =
|
||||
{
|
||||
rthw_sdio_request,
|
||||
rthw_sdio_iocfg,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief This function create mmcsd host.
|
||||
* @param sdio_des stm32_sdio_des
|
||||
* @retval rt_mmcsd_host
|
||||
*/
|
||||
struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des)
|
||||
{
|
||||
struct rt_mmcsd_host *host;
|
||||
struct rthw_sdio *sdio = RT_NULL;
|
||||
|
||||
if (sdio_des == RT_NULL)
|
||||
{
|
||||
return RT_NULL;
|
||||
}
|
||||
|
||||
sdio = rt_malloc(sizeof(struct rthw_sdio));
|
||||
if (sdio == RT_NULL)
|
||||
{
|
||||
LOG_E("malloc rthw_sdio fail");
|
||||
return RT_NULL;
|
||||
}
|
||||
rt_memset(sdio, 0, sizeof(struct rthw_sdio));
|
||||
|
||||
host = mmcsd_alloc_host();
|
||||
if (host == RT_NULL)
|
||||
{
|
||||
LOG_E("alloc host fail");
|
||||
goto err;
|
||||
}
|
||||
|
||||
rt_memcpy(&sdio->sdio_des, sdio_des, sizeof(struct stm32_sdio_des));
|
||||
|
||||
sdio->sdio_des.hw_sdio = (struct stm32_sdio *)SDIO_BASE_ADDRESS;
|
||||
|
||||
rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO);
|
||||
rt_mutex_init(&sdio->mutex, "sdio", RT_IPC_FLAG_FIFO);
|
||||
/* set host default attributes */
|
||||
host->ops = &ops;
|
||||
host->freq_min = 400 * 1000;
|
||||
host->freq_max = SDIO_MAX_FREQ;
|
||||
host->valid_ocr = 0X00FFFF80;/* The voltage range supported is 1.65v-3.6v */
|
||||
#ifndef SDIO_USING_1_BIT
|
||||
host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED;
|
||||
#else
|
||||
host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED;
|
||||
#endif
|
||||
|
||||
host->max_seg_size = SDIO_BUFF_SIZE;
|
||||
host->max_dma_segs = 1;
|
||||
host->max_blk_size = 512;
|
||||
host->max_blk_count = 512;
|
||||
|
||||
/* link up host and sdio */
|
||||
sdio->host = host;
|
||||
host->private_data = sdio;
|
||||
|
||||
/* ready to change */
|
||||
mmcsd_change(host);
|
||||
|
||||
return host;
|
||||
|
||||
err:
|
||||
if (sdio)
|
||||
{
|
||||
rt_free(sdio);
|
||||
}
|
||||
|
||||
return RT_NULL;
|
||||
}
|
||||
|
||||
void SDMMC1_IRQHandler(void)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
/* Process All SDIO Interrupt Sources */
|
||||
rthw_sdio_irq_process(host);
|
||||
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
int rt_hw_sdio_init(void)
|
||||
{
|
||||
struct stm32_sdio_des sdio_des;
|
||||
|
||||
hsd.Instance = SDMMC1;
|
||||
HAL_SD_MspInit(&hsd);
|
||||
|
||||
host = sdio_host_create(&sdio_des);
|
||||
if (host == RT_NULL)
|
||||
{
|
||||
LOG_E("host create fail");
|
||||
return RT_NULL;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_sdio_init);
|
||||
|
||||
int mnt_init(void)
|
||||
{
|
||||
rt_device_t sd = RT_NULL;
|
||||
|
||||
rt_thread_delay(RT_TICK_PER_SECOND);
|
||||
|
||||
sd = rt_device_find("sd0");
|
||||
if (sd == RT_NULL)
|
||||
{
|
||||
rt_kprintf("can't find sd0 device!\n");
|
||||
return RT_ERROR;
|
||||
}
|
||||
|
||||
if (dfs_mount("sd0", "/", "elm", 0, 0) != 0)
|
||||
{
|
||||
rt_kprintf("file system mount failed!\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf("file system mount success!\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_ENV_EXPORT(mnt_init);
|
||||
|
||||
#endif /* BSP_USING_SDMMC */
|
|
@ -0,0 +1,117 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-07-16 thread-liu first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_SDIO_H__
|
||||
#define __DRV_SDIO_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "rtdevice.h"
|
||||
#include <rthw.h>
|
||||
#include <drv_common.h>
|
||||
#include <string.h>
|
||||
#include <drivers/mmcsd_core.h>
|
||||
#include <drivers/sdio.h>
|
||||
|
||||
#define SDIO_BUFF_SIZE 4096
|
||||
#define SDIO_ALIGN_LEN 32
|
||||
|
||||
#ifndef SDIO_BASE_ADDRESS
|
||||
#define SDIO_BASE_ADDRESS (SDMMC1)
|
||||
#endif
|
||||
|
||||
#ifndef SDIO_CLOCK_FREQ
|
||||
#define SDIO_CLOCK_FREQ (99U * 1000 * 1000)
|
||||
#endif
|
||||
|
||||
#ifndef SDIO_BUFF_SIZE
|
||||
#define SDIO_BUFF_SIZE (4096)
|
||||
#endif
|
||||
|
||||
#ifndef SDIO_ALIGN_LEN
|
||||
#define SDIO_ALIGN_LEN (32)
|
||||
#endif
|
||||
|
||||
#ifndef SDIO_MAX_FREQ
|
||||
#define SDIO_MAX_FREQ (50 * 1000 * 1000)
|
||||
#endif
|
||||
|
||||
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
|
||||
|
||||
#define SDMMC_POWER_OFF (0x00U)
|
||||
#define SDMMC_POWER_UP (0x02U)
|
||||
#define SDMMC_POWER_ON (0x03U)
|
||||
|
||||
#define SDIO_ERRORS \
|
||||
(SDMMC_STA_IDMATE | SDMMC_STA_ACKTIMEOUT | \
|
||||
SDMMC_STA_RXOVERR | SDMMC_STA_TXUNDERR | \
|
||||
SDMMC_STA_DTIMEOUT | SDMMC_STA_CTIMEOUT | \
|
||||
SDMMC_STA_DCRCFAIL | SDMMC_STA_CCRCFAIL)
|
||||
|
||||
#define SDIO_MASKR_ALL \
|
||||
(SDMMC_MASK_CCRCFAILIE | SDMMC_MASK_DCRCFAILIE | SDMMC_MASK_CTIMEOUTIE | \
|
||||
SDMMC_MASK_TXUNDERRIE | SDMMC_MASK_RXOVERRIE | SDMMC_MASK_CMDRENDIE | \
|
||||
SDMMC_MASK_CMDSENTIE | SDMMC_MASK_DATAENDIE | SDMMC_MASK_ACKTIMEOUTIE)
|
||||
|
||||
#define HW_SDIO_DATATIMEOUT (0xFFFFFFFFU)
|
||||
|
||||
struct stm32_sdio
|
||||
{
|
||||
volatile rt_uint32_t power; /* offset 0x00 */
|
||||
volatile rt_uint32_t clkcr; /* offset 0x04 */
|
||||
volatile rt_uint32_t arg; /* offset 0x08 */
|
||||
volatile rt_uint32_t cmd; /* offset 0x0C */
|
||||
volatile rt_uint32_t respcmd; /* offset 0x10 */
|
||||
volatile rt_uint32_t resp1; /* offset 0x14 */
|
||||
volatile rt_uint32_t resp2; /* offset 0x18 */
|
||||
volatile rt_uint32_t resp3; /* offset 0x1C */
|
||||
volatile rt_uint32_t resp4; /* offset 0x20 */
|
||||
volatile rt_uint32_t dtimer; /* offset 0x24 */
|
||||
volatile rt_uint32_t dlen; /* offset 0x28 */
|
||||
volatile rt_uint32_t dctrl; /* offset 0x2C */
|
||||
volatile rt_uint32_t dcount; /* offset 0x30 */
|
||||
volatile rt_uint32_t sta; /* offset 0x34 */
|
||||
volatile rt_uint32_t icr; /* offset 0x38 */
|
||||
volatile rt_uint32_t mask; /* offset 0x3C */
|
||||
volatile rt_uint32_t acktimer; /* offset 0x40 */
|
||||
volatile rt_uint32_t reserved0[3]; /* offset 0x44 ~ 0x4C */
|
||||
volatile rt_uint32_t idmatrlr; /* offset 0x50 */
|
||||
volatile rt_uint32_t idmabsizer; /* offset 0x54 */
|
||||
volatile rt_uint32_t idmabase0r; /* offset 0x58 */
|
||||
volatile rt_uint32_t idmabase1r; /* offset 0x5C */
|
||||
volatile rt_uint32_t reserved1[1]; /* offset 0x60 */
|
||||
volatile rt_uint32_t idmalar;
|
||||
volatile rt_uint32_t idmabar;
|
||||
volatile rt_uint32_t reserved2[5];
|
||||
volatile rt_uint32_t fifo;
|
||||
volatile rt_uint32_t reserved3[220];
|
||||
volatile rt_uint32_t verr;
|
||||
volatile rt_uint32_t ipidr;
|
||||
volatile rt_uint32_t sidr;
|
||||
};
|
||||
|
||||
typedef rt_uint32_t (*sdio_clk_get)(struct stm32_sdio *hw_sdio);
|
||||
|
||||
struct stm32_sdio_des
|
||||
{
|
||||
struct stm32_sdio *hw_sdio;
|
||||
sdio_clk_get clk_get;
|
||||
};
|
||||
|
||||
/* stm32 sdio dirver class */
|
||||
struct stm32_sdio_class
|
||||
{
|
||||
struct stm32_sdio_des *des;
|
||||
const struct stm32_sdio_config *cfg;
|
||||
struct rt_mmcsd_host host;
|
||||
};
|
||||
|
||||
extern void stm32_mmcsd_change(void);
|
||||
|
||||
#endif /* __DRV_SDIO_H__ */
|
Loading…
Reference in New Issue