Merge pull request #3056 from niannianyouyu/master
Add UART1 driver of rv32m1_vega
This commit is contained in:
Bernard Xiong
GitHub
commit
2ed84b61b0
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@ -54,7 +54,7 @@ msh />
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| 驱动 | 支持情况 | 备注 |
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| ------ | ---- | :------ |
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| UART | 支持 | UART0, RX(PTC7), TX(PTC8) |
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| | 未支持 | UART1, RX(PTA25), TX(PTA26) |
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| | 支持 | UART1, RX(PTA25), TX(PTA26) |
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| clock | 支持 | |
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| GPIO | 支持（列表可能不完善，同时也需要按照使用到的IO调整pinmux、clock） | |
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| MMC/SD | 支持 | |
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@ -67,6 +67,8 @@ msh />
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| PTA23 | LED_GREEN |
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| PTA24 | LED_RED |
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| PTA24 | LED_STS |
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| PTA25 | UART1_RX |
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| PTA26 | UART1_TX |
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| PTE8 | BTN_SW3 |
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| PTE9 | BTN_SW4 |
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| PTE12 | BTN_SW5 |
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@ -39,6 +39,8 @@ void BOARD_InitBootPins(void) {
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#define PIN22_IDX 22u /*!< Pin number for pin 22 in a port */
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#define PIN23_IDX 23u /*!< Pin number for pin 23 in a port */
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#define PIN24_IDX 24u /*!< Pin number for pin 24 in a port */
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#define PIN25_IDX 25u /*!< Pin number for pin 25 in a port */
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#define PIN26_IDX 26u /*!< Pin number for pin 26 in a port */
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#define PIN27_IDX 27u /*!< Pin number for pin 27 in a port */
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/*
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@ -48,6 +50,8 @@ BOARD_InitPins:
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- pin_list:
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- {pin_num: N2, peripheral: LPUART0, signal: RX, pin_signal: LPCMP0_IN0/PTC7/LLWU_P15/LPSPI0_PCS3/LPUART0_RX/LPI2C1_HREQ/TPM0_CH0/LPTMR1_ALT1}
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- {pin_num: P3, peripheral: LPUART0, signal: TX, pin_signal: LPCMP0_IN1/PTC8/LPSPI0_SCK/LPUART0_TX/LPI2C0_HREQ/TPM0_CH1}
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- {pin_num: B5, peripheral: LPUART1, signal: RX, pin_signal: PTA25/LPUART1_RX/LPSPI3_SOUT/LPI2C2_SDAS/FB_AD31}
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- {pin_num: A5, peripheral: LPUART1, signal: TX, pin_signal: PTA26/LPUART1_TX/LPSPI3_PCS2/LPI2C2_SCLS/FB_AD30}
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- {pin_num: U11, peripheral: SDHC0, signal: CMD, pin_signal: ADC0_SE12/PTD9/SDHC0_CMD/LPSPI2_SIN/LPI2C1_SCLS/TRACE_DATA0/TPM2_CH2/FXIO0_D29, slew_rate: fast, open_drain: disable,
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drive_strength: low, pull_select: up, pull_enable: enable}
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- {pin_num: P10, peripheral: SDHC0, signal: 'DATA, 0', pin_signal: ADC0_SE10/PTD7/SDHC0_D0/LPSPI2_SOUT/EMVSIM0_PD/TRACE_DATA2/TPM2_CH4/FXIO0_D27, slew_rate: fast,
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@ -87,6 +91,7 @@ void BOARD_InitPins(void) {
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PORT_SetPinConfig(PORTC, PIN27_IDX, &portc27_pinP6_config); /* PORTC27 (pin P6) is configured as PTC27 */
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PORT_SetPinMux(PORTC, PIN7_IDX, kPORT_MuxAlt3); /* PORTC7 (pin N2) is configured as LPUART0_RX */
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PORT_SetPinMux(PORTC, PIN8_IDX, kPORT_MuxAlt3); /* PORTC8 (pin P3) is configured as LPUART0_TX */
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const port_pin_config_t portd10_pinP11_config = {
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kPORT_PullUp, /* Internal pull-up resistor is enabled */
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kPORT_FastSlewRate, /* Fast slew rate is configured */
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@ -151,6 +156,8 @@ void BOARD_InitPins(void) {
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PORT_SetPinMux(PORTA, PIN22_IDX, kPORT_MuxAsGpio); /* PORTA22 (pin D6) is configured as PTA24 */
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PORT_SetPinMux(PORTA, PIN23_IDX, kPORT_MuxAsGpio); /* PORTA23 (pin D6) is configured as PTA24 */
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PORT_SetPinMux(PORTA, PIN24_IDX, kPORT_MuxAsGpio); /* PORTA24 (pin D6) is configured as PTA24 */
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PORT_SetPinMux(PORTA, PIN25_IDX, kPORT_MuxAlt2); /* PORTA25 (pin B5) is configured as LPUART1_RX */
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PORT_SetPinMux(PORTA, PIN26_IDX, kPORT_MuxAlt2); /* PORTA26 (pin A5) is configured as LPUART1_TX */
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}
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/*******************************************************************************
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@ -1,3 +1,6 @@
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config BSP_USING_UART0
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bool "Enable UART0 (PTC7/PTC8)"
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default y
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config BSP_USING_UART1
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bool "Enable UART1 (PTA25/PTA26)"
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default y
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@ -6,6 +6,7 @@
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* Change Logs:
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* Date Author Notes
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* 2018/10/28 Bernard Unify UART driver for FSL library.
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* 2019/09/07 niannianyouyu Add the driver of UART1
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*/
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#include <rthw.h>
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@ -54,6 +55,15 @@ void LPUART0_IRQHandler(void)
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}
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#endif
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#if defined(BSP_USING_UART1)
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struct rt_serial_device serial1;
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void LPUART1_IRQHandler(void)
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{
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uart_isr(&serial1);
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}
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#endif
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static const struct fsl_uart uarts[] =
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{
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#ifdef BSP_USING_UART0
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@ -63,9 +73,18 @@ static const struct fsl_uart uarts[] =
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&serial0,
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"uart0",
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},
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#ifdef BSP_USING_UART1
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{
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LPUART1,
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LPUART1_IRQn,
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&serial1,
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"uart1",
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},
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#endif
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#endif
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};
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/*
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* UART Initiation
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*/
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@ -146,8 +165,14 @@ static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_co
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CLOCK_SetIpSrc(kCLOCK_Lpuart0, kCLOCK_IpSrcFircAsync);
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uint32_t uartClkSrcFreq = CLOCK_GetIpFreq(kCLOCK_Lpuart0);
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LPUART_Init(uart->uart_base, &config, uartClkSrcFreq);
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uint32_t uartClkSrcFreq0 = CLOCK_GetIpFreq(kCLOCK_Lpuart0);
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LPUART_Init(uart->uart_base, &config, uartClkSrcFreq0);
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LPUART_EnableInterrupts(uart->uart_base, kLPUART_RxDataRegFullInterruptEnable);
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CLOCK_SetIpSrc(kCLOCK_Lpuart1, kCLOCK_IpSrcFircAsync);
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uint32_t uartClkSrcFreq1 = CLOCK_GetIpFreq(kCLOCK_Lpuart1);
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LPUART_Init(uart->uart_base, &config, uartClkSrcFreq1);
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LPUART_EnableInterrupts(uart->uart_base, kLPUART_RxDataRegFullInterruptEnable);
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return RT_EOK;
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