Merge pull request #2581 from wangyq2018/es32f0334

[bsp/es32f0334] add pm/adc driver
This commit is contained in:
Bernard Xiong 2019-04-17 21:49:13 +08:00 committed by GitHub
commit 2d78d56834
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GPG Key ID: 4AEE18F83AFDEB23
9 changed files with 375 additions and 0 deletions

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@ -357,6 +357,16 @@ CONFIG_BSP_USING_UART1=y
#
# CONFIG_BSP_USING_RTC is not set
#
# PM Drivers
#
# CONFIG_BSP_USING_PM is not set
#
# ADC Drivers
#
# CONFIG_BSP_USING_ADC is not set
#
# Onboard Peripheral Drivers
#

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@ -44,6 +44,8 @@ ES-PDS-ES32F0334-V1.1
| PWM | 支持 | PWM0/1/2/3 |
| TIMER | 支持 | TIMER0/1/2/3 |
| RTC | 支持 | RTC |
| PM | 支持 | Power Management |
| ADC | 支持 | ADC0 |
更多详细信息请咨询[上海东软载波微电子技术支持](http://www.essemi.com/)

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@ -95,6 +95,20 @@ menu "Hardware Drivers Config"
default n
endmenu
menu "PM Drivers"
config BSP_USING_PM
bool "Using PM"
select RT_USING_PM
default n
endmenu
menu "ADC Drivers"
config BSP_USING_ADC
bool "Using ADC"
select RT_USING_ADC
default n
endmenu
endmenu
menu "Onboard Peripheral Drivers"

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@ -39,6 +39,14 @@ if GetDepend('BSP_USING_HWTIMER0') or GetDepend('BSP_USING_HWTIMER1') or GetDepe
if GetDepend(['BSP_USING_RTC']):
src += ['drv_rtc.c']
# add pm driver code
if GetDepend(['BSP_USING_PM']):
src += ['drv_pm.c']
# add adc driver code
if GetDepend(['BSP_USING_ADC']):
src += ['drv_adc.c']
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)

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@ -0,0 +1,193 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-04-08 wangyq the first version
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include "board.h"
#include "drv_adc.h"
#include <ald_gpio.h>
#include <ald_adc.h>
#ifdef RT_USING_ADC
/* define adc instance */
static struct rt_adc_device _device_adc0;
/* enable or disable adc */
static rt_err_t es32f0_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
{
adc_handle_t *_hadc = (adc_handle_t *)device->parent.user_data;
RT_ASSERT(device != RT_NULL);
if (enabled)
{
ADC_ENABLE(_hadc);
}
else
{
ADC_DISABLE(_hadc);
}
return RT_EOK;
}
static adc_channel_t es32f0_adc_get_channel(rt_uint32_t channel)
{
adc_channel_t es32f0_channel;
gpio_init_t gpio_initstruct;
/* Initialize ADC pin */
gpio_initstruct.mode = GPIO_MODE_INPUT;
gpio_initstruct.pupd = GPIO_FLOATING;
gpio_initstruct.odrv = GPIO_OUT_DRIVE_NORMAL;
gpio_initstruct.flt = GPIO_FILTER_DISABLE;
gpio_initstruct.type = GPIO_TYPE_CMOS;
gpio_initstruct.func = GPIO_FUNC_0;
/* select gpio pin as adc function */
switch (channel)
{
case 0:
es32f0_channel = ADC_CHANNEL_0;
gpio_init(GPIOC, GPIO_PIN_0, &gpio_initstruct);
break;
case 1:
es32f0_channel = ADC_CHANNEL_1;
gpio_init(GPIOC, GPIO_PIN_1, &gpio_initstruct);
break;
case 2:
es32f0_channel = ADC_CHANNEL_2;
gpio_init(GPIOC, GPIO_PIN_2, &gpio_initstruct);
break;
case 3:
es32f0_channel = ADC_CHANNEL_3;
gpio_init(GPIOC, GPIO_PIN_3, &gpio_initstruct);
break;
case 4:
es32f0_channel = ADC_CHANNEL_4;
gpio_init(GPIOA, GPIO_PIN_0, &gpio_initstruct);
break;
case 5:
es32f0_channel = ADC_CHANNEL_5;
gpio_init(GPIOA, GPIO_PIN_1, &gpio_initstruct);
break;
case 6:
es32f0_channel = ADC_CHANNEL_6;
gpio_init(GPIOA, GPIO_PIN_2, &gpio_initstruct);
break;
case 7:
es32f0_channel = ADC_CHANNEL_7;
gpio_init(GPIOA, GPIO_PIN_3, &gpio_initstruct);
break;
case 8:
es32f0_channel = ADC_CHANNEL_8;
gpio_init(GPIOA, GPIO_PIN_4, &gpio_initstruct);
break;
case 9:
es32f0_channel = ADC_CHANNEL_9;
gpio_init(GPIOA, GPIO_PIN_5, &gpio_initstruct);
break;
case 10:
es32f0_channel = ADC_CHANNEL_10;
gpio_init(GPIOA, GPIO_PIN_6, &gpio_initstruct);
break;
case 11:
es32f0_channel = ADC_CHANNEL_11;
gpio_init(GPIOA, GPIO_PIN_7, &gpio_initstruct);
break;
case 12:
es32f0_channel = ADC_CHANNEL_12;
gpio_init(GPIOC, GPIO_PIN_4, &gpio_initstruct);
break;
case 13:
es32f0_channel = ADC_CHANNEL_13;
gpio_init(GPIOC, GPIO_PIN_5, &gpio_initstruct);
break;
case 14:
es32f0_channel = ADC_CHANNEL_14;
gpio_init(GPIOB, GPIO_PIN_0, &gpio_initstruct);
break;
case 15:
es32f0_channel = ADC_CHANNEL_15;
gpio_init(GPIOB, GPIO_PIN_1, &gpio_initstruct);
break;
case 16:
es32f0_channel = ADC_CHANNEL_16;
break;
case 17:
es32f0_channel = ADC_CHANNEL_17;
break;
case 18:
es32f0_channel = ADC_CHANNEL_18;
break;
default:
break;
}
return es32f0_channel;
}
static rt_err_t es32f0_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
{
adc_handle_t *_hadc = (adc_handle_t *)device->parent.user_data;
adc_channel_conf_t nm_config;
RT_ASSERT(device != RT_NULL);
RT_ASSERT(value != RT_NULL);
/* config adc channel */
nm_config.channel = es32f0_adc_get_channel(channel);
nm_config.rank = ADC_NC_RANK_1;
nm_config.sampling_time = ADC_SAMPLETIME_4;
adc_normal_channel_config(_hadc, &nm_config);
adc_normal_start(_hadc);
if (adc_normal_poll_for_conversion(_hadc, 5000) == OK)
*value = adc_normal_get_value(_hadc);
return RT_EOK;
}
static const struct rt_adc_ops es32f0_adc_ops =
{
es32f0_adc_enabled,
es32f0_get_adc_value,
};
int rt_hw_adc_init(void)
{
int result = RT_EOK;
static adc_handle_t _h_adc0;
/* adc function initialization */
_h_adc0.perh = ADC0;
_h_adc0.init.data_align = ADC_DATAALIGN_RIGHT;
_h_adc0.init.scan_mode = ADC_SCAN_DISABLE;
_h_adc0.init.cont_mode = DISABLE;
_h_adc0.init.conv_nbr = ADC_NM_NBR_1;
_h_adc0.init.disc_mode = DISABLE;
_h_adc0.init.disc_nbr = ADC_DISC_NBR_1;
_h_adc0.init.conv_res = ADC_CONV_RES_10;
_h_adc0.init.clk_div = ADC_CKDIV_128;
_h_adc0.init.nche_mode = ADC_NCHESEL_MODE_ALL;
_h_adc0.init.neg_ref = ADC_NEG_REF_VSS;
_h_adc0.init.pos_ref = ADC_POS_REF_VDD;
adc_init(&_h_adc0);
rt_hw_adc_register(&_device_adc0, "adc0", &es32f0_adc_ops, &_h_adc0);
return result;
}
INIT_BOARD_EXPORT(rt_hw_adc_init);
#endif

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@ -0,0 +1,16 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-04-03 wangyq the first version
*/
#ifndef DRV_ADC_H__
#define DRV_ADC_H__
int rt_hw_adc_init(void);
#endif

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@ -0,0 +1,110 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-04-08 wangyq the first version
*/
#include <rthw.h>
#include <rtdevice.h>
#include "board.h"
#include "drv_pm.h"
#include <ald_pmu.h>
#ifdef RT_USING_PM
static void _drv_pm_enter(struct rt_pm *pm)
{
rt_uint32_t mode;
mode = pm->current_mode;
switch (mode)
{
case PM_RUN_MODE_NORMAL:
break;
case PM_SLEEP_MODE_SLEEP:
__WFI();
break;
case PM_SLEEP_MODE_TIMER:
pmu_stop2_enter();
break;
case PM_SLEEP_MODE_SHUTDOWN:
pmu_standby_enter(PMU_STANDBY_PORT_NONE);
break;
default:
RT_ASSERT(0);
break;
}
}
static void _drv_pm_exit(struct rt_pm *pm)
{
rt_uint32_t mode;
RT_ASSERT(pm != RT_NULL);
mode = pm->current_mode;
switch (mode)
{
case PM_RUN_MODE_NORMAL:
break;
case PM_SLEEP_MODE_SLEEP:
break;
case PM_SLEEP_MODE_TIMER:
break;
case PM_SLEEP_MODE_SHUTDOWN:
break;
default:
RT_ASSERT(0);
break;
}
}
#if PM_RUN_MODE_COUNT > 1
static void _drv_pm_frequency_change(struct rt_pm *pm, rt_uint32_t frequency)
{
return;
}
#endif
static int drv_hw_pm_init(void)
{
static const struct rt_pm_ops _ops =
{
_drv_pm_enter,
_drv_pm_exit,
#if PM_RUN_MODE_COUNT > 1
_drv_pm_frequency_change,
#endif
RT_NULL,
RT_NULL,
RT_NULL
};
rt_uint8_t timer_mask;
/* initialize timer mask */
timer_mask = 1UL << PM_SLEEP_MODE_TIMER;
/* initialize system pm module */
rt_system_pm_init(&_ops, timer_mask, RT_NULL);
return 0;
}
INIT_BOARD_EXPORT(drv_hw_pm_init);
#endif

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@ -0,0 +1,16 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-04-01 wangyq the first version
*/
#ifndef DRV_PM_H__
#define DRV_PM_H__
int rt_hw_pm_init(void);
#endif

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@ -178,6 +178,12 @@
/* RTC Drivers */
/* PM Drivers */
/* ADC Drivers */
/* Onboard Peripheral Drivers */