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[BSP] cleanup for hifive1 bsp.

This commit is contained in:
Bernard Xiong 2017-08-26 11:02:39 +08:00
parent 5b1aa2a75f
commit 2ac493698b
2 changed files with 65 additions and 149 deletions
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86
bsp/hifive1/rtconfig.py
View File

@ -10,14 +10,7 @@ if os.getenv('RTT_CC'):
if CROSS_TOOL == 'gcc': if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc' PLATFORM = 'gcc'
# EXEC_PATH = 'D:/ArdaArmTools/Sourcery_Lite/bin'
EXEC_PATH = '/home/zj/risc-v/riscv64-unknown-elf-gcc-20170612-x86_64-linux-centos6/bin' EXEC_PATH = '/home/zj/risc-v/riscv64-unknown-elf-gcc-20170612-x86_64-linux-centos6/bin'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = 'C:/Keil_v5'
elif CROSS_TOOL == 'iar':
PLATFORM = 'iar'
IAR_PATH = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.0'
if os.getenv('RTT_EXEC_PATH'): if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH') EXEC_PATH = os.getenv('RTT_EXEC_PATH')
@ -33,8 +26,7 @@ TARGET_NAME = 'rtthread.bin'
#------- GCC settings ---------------------------------------------------------- #------- GCC settings ----------------------------------------------------------
if PLATFORM == 'gcc': if PLATFORM == 'gcc':
# toolchains # toolchains
PREFIX = '/home/zj/risc-v/riscv64-unknown-elf-gcc-20170612-x86_64-linux-centos6/bin/riscv64-unknown-elf-' PREFIX = 'riscv64-unknown-elf-'
#PREFIX = 'arm-none-linux-gnueabi-'
CC = PREFIX + 'gcc' CC = PREFIX + 'gcc'
AS = PREFIX + 'gcc' AS = PREFIX + 'gcc'
AR = PREFIX + 'ar' AR = PREFIX + 'ar'
@ -45,9 +37,7 @@ if PLATFORM == 'gcc':
OBJCPY = PREFIX + 'objcopy' OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -march=rv32imac -mabi=ilp32 -DUSE_PLIC -DUSE_M_TIME -mcmodel=medany -msmall-data-limit=8 -g -L. -nostartfiles -lc ' DEVICE = ' -march=rv32imac -mabi=ilp32 -DUSE_PLIC -DUSE_M_TIME -mcmodel=medany -msmall-data-limit=8 -g -L. -nostartfiles -lc '
# DEVICE += '-Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit'
CFLAGS = DEVICE CFLAGS = DEVICE
# CFLAGS += ' -I ./mx28_registers/'
CFLAGS += '' CFLAGS += ''
AFLAGS = '-c'+ DEVICE + ' -x assembler-with-cpp' AFLAGS = '-c'+ DEVICE + ' -x assembler-with-cpp'
AFLAGS += ' -Iplatform' AFLAGS += ' -Iplatform'
@ -66,77 +56,3 @@ if PLATFORM == 'gcc':
POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n' POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n'
POST_ACTION += SIZE + ' $TARGET\n' POST_ACTION += SIZE + ' $TARGET\n'
#------- Keil settings ---------------------------------------------------------
elif PLATFORM == 'armcc':
# toolchains
CC = 'armcc'
AS = 'armasm'
AR = 'armar'
LINK = 'armlink'
TARGET_EXT = 'axf'
EXEC_PATH += '/arm/armcc/bin/'
DEVICE = ' --cpu=' + CORE
CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
AFLAGS = DEVICE + ' -Iplatform'
LFLAGS = DEVICE + ' --strict'
LFLAGS += ' --info sizes --info totals --info unused --info veneers'
LFLAGS += ' --list ' + MAP_FILE
LFLAGS += ' --scatter ' + LINK_FILE + '.scat'
if BUILD == 'debug':
CFLAGS += ' -g -O0'
AFLAGS += ' -g'
else:
CFLAGS += ' -O2'
POST_ACTION = 'fromelf --bin $TARGET --output ' + TARGET_NAME + ' \n'
POST_ACTION += 'fromelf -z $TARGET\n'
#------- IAR settings ----------------------------------------------------------
elif PLATFORM == 'iar':
# toolchains
CC = 'iccarm'
AS = 'iasmarm'
AR = 'iarchive'
LINK = 'ilinkarm'
TARGET_EXT = 'axf'
DEVICE = CORE
CFLAGS = '--cpu=' + DEVICE
CFLAGS += ' --diag_suppress Pa050'
CFLAGS += ' --no_cse'
CFLAGS += ' --no_unroll'
CFLAGS += ' --no_inline'
CFLAGS += ' --no_code_motion'
CFLAGS += ' --no_tbaa'
CFLAGS += ' --no_clustering'
CFLAGS += ' --no_scheduling'
CFLAGS += ' --endian=little'
CFLAGS += ' -e'
CFLAGS += ' --fpu=none'
CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
CFLAGS += ' --silent'
AFLAGS = '--cpu '+ DEVICE
AFLAGS += ' -s+'
AFLAGS += ' -w+'
AFLAGS += ' -r'
AFLAGS += ' --fpu none'
AFLAGS += ' -S'
AFLAGS += ' -Iplatform'
if BUILD == 'debug':
CFLAGS += ' --debug'
CFLAGS += ' -On'
else:
CFLAGS += ' -Oh'
LFLAGS = '--config ' + LINK_FILE +'.icf'
LFLAGS += ' --entry __iar_program_start'
LFLAGS += ' --map ' + MAP_FILE
LFLAGS += ' --silent'
EXEC_PATH = IAR_PATH + '/arm/bin/'
POST_ACTION = 'ielftool --silent --bin $TARGET ' + TARGET_NAME

126
libcpu/risc-v/e310/start_gcc.S
View File

@ -21,7 +21,7 @@
; * Date Author Notes ; * Date Author Notes
; * 2017-07-16 zhangjun for hifive1 ; * 2017-07-16 zhangjun for hifive1
; */ ; */
#include <sifive/smp.h> #include "sifive/smp.h"
#define CLINT_CTRL_ADDR 0x02000000 #define CLINT_CTRL_ADDR 0x02000000
.section .init .section .init
@ -29,111 +29,111 @@
.type _start,@function .type _start,@function
_start: _start:
.cfi_startproc .cfi_startproc
.cfi_undefined ra .cfi_undefined ra
.option push .option push
.option norelax .option norelax
la gp, __global_pointer$ la gp, __global_pointer$
.option pop .option pop
la sp, _sp la sp, _sp
/* /*
*disable all interrupt at startup *disable all interrupt at startup
*/ */
csrrc a5, mstatus, 0xb csrrc a5, mstatus, 0xb
#if defined(ENABLE_SMP) #if defined(ENABLE_SMP)
smp_pause(t0, t1) smp_pause(t0, t1)
#endif #endif
/* Load data section */ /* Load data section */
la a0, _data_lma la a0, _data_lma
la a1, _data la a1, _data
la a2, _edata la a2, _edata
bgeu a1, a2, 2f bgeu a1, a2, 2f
1: 1:
lw t0, (a0) lw t0, (a0)
sw t0, (a1) sw t0, (a1)
addi a0, a0, 4 addi a0, a0, 4
addi a1, a1, 4 addi a1, a1, 4
bltu a1, a2, 1b bltu a1, a2, 1b
2: 2:
/* Clear bss section */ /* Clear bss section */
la a0, __bss_start la a0, __bss_start
la a1, _end la a1, _end
bgeu a0, a1, 2f bgeu a0, a1, 2f
1: 1:
sw zero, (a0) sw zero, (a0)
addi a0, a0, 4 addi a0, a0, 4
bltu a0, a1, 1b bltu a0, a1, 1b
2: 2:
/* Call global constructors */ /* Call global constructors */
la a0, __libc_fini_array la a0, __libc_fini_array
call atexit call atexit
call __libc_init_array call __libc_init_array
/*call _init directly in rt-thread*/ /*call _init directly in rt-thread*/
call _init call _init
#ifndef __riscv_float_abi_soft #ifndef __riscv_float_abi_soft
/* Enable FPU */ /* Enable FPU */
li t0, MSTATUS_FS li t0, MSTATUS_FS
csrs mstatus, t0 csrs mstatus, t0
csrr t1, mstatus csrr t1, mstatus
and t1, t1, t0 and t1, t1, t0
beqz t1, 1f beqz t1, 1f
fssr x0 fssr x0
1: 1:
#endif #endif
#if defined(ENABLE_SMP) #if defined(ENABLE_SMP)
smp_resume(t0, t1) smp_resume(t0, t1)
csrr a0, mhartid csrr a0, mhartid
bnez a0, 2f bnez a0, 2f
#endif #endif
auipc ra, 0 auipc ra, 0
addi sp, sp, -16 addi sp, sp, -16
#if __riscv_xlen == 32 #if __riscv_xlen == 32
sw ra, 8(sp) sw ra, 8(sp)
#else #else
sd ra, 8(sp) sd ra, 8(sp)
#endif #endif
/* argc = argv = 0 */ /* argc = argv = 0 */
li a0, 0 li a0, 0
li a1, 0 li a1, 0
call main call main
tail exit tail exit
1: 1:
j 1b j 1b
#if defined(ENABLE_SMP) #if defined(ENABLE_SMP)
2: 2:
la t0, trap_entry la t0, trap_entry
csrw mtvec, t0 csrw mtvec, t0
csrr a0, mhartid csrr a0, mhartid
la t1, _sp la t1, _sp
slli t0, a0, 10 slli t0, a0, 10
sub sp, t1, t0 sub sp, t1, t0
auipc ra, 0 auipc ra, 0
addi sp, sp, -16 addi sp, sp, -16
#if __riscv_xlen == 32 #if __riscv_xlen == 32
sw ra, 8(sp) sw ra, 8(sp)
#else #else
sd ra, 8(sp) sd ra, 8(sp)
#endif #endif
call secondary_main call secondary_main
tail exit tail exit
1: 1:
j 1b j 1b
#endif #endif
.cfi_endproc .cfi_endproc
#include "encoding.h" #include "encoding.h"
#include "sifive/bits.h" #include "sifive/bits.h"